LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/ARM - ARMGenDAGISel.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 573 606 94.6 %
Date: 2017-09-14 15:23:50 Functions: 4 4 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* DAG Instruction Selector for the ARM target                                *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : // *** NOTE: This file is #included into the middle of the target
      10             : // *** instruction selector class.  These functions are really methods.
      11             : 
      12             : // The main instruction selector code.
      13             : void SelectCode(SDNode *N) {
      14             :   // Some target values are emitted as 2 bytes, TARGET_VAL handles
      15             :   // this.
      16             :   #define TARGET_VAL(X) X & 255, unsigned(X) >> 8
      17             :   static const unsigned char MatcherTable[] = {
      18             : /*0*/       OPC_SwitchOpcode /*174 cases */, 95|128,43/*5599*/, TARGET_VAL(ISD::OR),// ->5604
      19             : /*5*/         OPC_Scope, 101|128,5/*741*/, /*->749*/ // 17 children in Scope
      20             : /*8*/           OPC_MoveChild0,
      21             : /*9*/           OPC_Scope, 74, /*->85*/ // 9 children in Scope
      22             : /*11*/            OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
      23             : /*14*/            OPC_MoveChild0,
      24             : /*15*/            OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
      25             : /*18*/            OPC_RecordChild0, // #0 = $Rm
      26             : /*19*/            OPC_CheckChild1Integer, 24, 
      27             : /*21*/            OPC_CheckChild1Type, MVT::i32,
      28             : /*23*/            OPC_MoveParent,
      29             : /*24*/            OPC_CheckChild1Integer, 16, 
      30             : /*26*/            OPC_CheckChild1Type, MVT::i32,
      31             : /*28*/            OPC_MoveParent,
      32             : /*29*/            OPC_MoveChild1,
      33             : /*30*/            OPC_CheckAndImm, 127|128,1/*255*/, 
      34             : /*33*/            OPC_MoveChild0,
      35             : /*34*/            OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
      36             : /*37*/            OPC_CheckChild0Same, 0,
      37             : /*39*/            OPC_CheckChild1Integer, 8, 
      38             : /*41*/            OPC_CheckChild1Type, MVT::i32,
      39             : /*43*/            OPC_MoveParent,
      40             : /*44*/            OPC_MoveParent,
      41             : /*45*/            OPC_CheckType, MVT::i32,
      42             : /*47*/            OPC_Scope, 17, /*->66*/ // 2 children in Scope
      43             : /*49*/              OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
      44             : /*51*/              OPC_EmitInteger, MVT::i32, 14, 
      45             : /*54*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
      46             : /*57*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::REVSH), 0,
      47             :                         MVT::i32, 3/*#Ops*/, 0, 1, 2, 
      48             :                     // Src: (or:i32 (sra:i32 (shl:i32 GPR:i32:$Rm, 24:i32), 16:i32), (and:i32 (srl:i32 GPR:i32:$Rm, 8:i32), 255:i32)) - Complexity = 35
      49             :                     // Dst: (REVSH:i32 GPR:i32:$Rm)
      50             : /*66*/            /*Scope*/ 17, /*->84*/
      51             : /*67*/              OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
      52             : /*69*/              OPC_EmitInteger, MVT::i32, 14, 
      53             : /*72*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
      54             : /*75*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::t2REVSH), 0,
      55             :                         MVT::i32, 3/*#Ops*/, 0, 1, 2, 
      56             :                     // Src: (or:i32 (sra:i32 (shl:i32 rGPR:i32:$Rm, 24:i32), 16:i32), (and:i32 (srl:i32 rGPR:i32:$Rm, 8:i32), 255:i32)) - Complexity = 35
      57             :                     // Dst: (t2REVSH:i32 rGPR:i32:$Rm)
      58             : /*84*/            0, /*End of Scope*/
      59             : /*85*/          /*Scope*/ 74, /*->160*/
      60             : /*86*/            OPC_CheckAndImm, 127|128,1/*255*/, 
      61             : /*89*/            OPC_MoveChild0,
      62             : /*90*/            OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
      63             : /*93*/            OPC_RecordChild0, // #0 = $Rm
      64             : /*94*/            OPC_CheckChild1Integer, 8, 
      65             : /*96*/            OPC_CheckChild1Type, MVT::i32,
      66             : /*98*/            OPC_MoveParent,
      67             : /*99*/            OPC_MoveParent,
      68             : /*100*/           OPC_MoveChild1,
      69             : /*101*/           OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
      70             : /*104*/           OPC_MoveChild0,
      71             : /*105*/           OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
      72             : /*108*/           OPC_CheckChild0Same, 0,
      73             : /*110*/           OPC_CheckChild1Integer, 24, 
      74             : /*112*/           OPC_CheckChild1Type, MVT::i32,
      75             : /*114*/           OPC_MoveParent,
      76             : /*115*/           OPC_CheckChild1Integer, 16, 
      77             : /*117*/           OPC_CheckChild1Type, MVT::i32,
      78             : /*119*/           OPC_MoveParent,
      79             : /*120*/           OPC_CheckType, MVT::i32,
      80             : /*122*/           OPC_Scope, 17, /*->141*/ // 2 children in Scope
      81             : /*124*/             OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
      82             : /*126*/             OPC_EmitInteger, MVT::i32, 14, 
      83             : /*129*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
      84             : /*132*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::REVSH), 0,
      85             :                         MVT::i32, 3/*#Ops*/, 0, 1, 2, 
      86             :                     // Src: (or:i32 (and:i32 (srl:i32 GPR:i32:$Rm, 8:i32), 255:i32), (sra:i32 (shl:i32 GPR:i32:$Rm, 24:i32), 16:i32)) - Complexity = 35
      87             :                     // Dst: (REVSH:i32 GPR:i32:$Rm)
      88             : /*141*/           /*Scope*/ 17, /*->159*/
      89             : /*142*/             OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
      90             : /*144*/             OPC_EmitInteger, MVT::i32, 14, 
      91             : /*147*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
      92             : /*150*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2REVSH), 0,
      93             :                         MVT::i32, 3/*#Ops*/, 0, 1, 2, 
      94             :                     // Src: (or:i32 (and:i32 (srl:i32 rGPR:i32:$Rm, 8:i32), 255:i32), (sra:i32 (shl:i32 rGPR:i32:$Rm, 24:i32), 16:i32)) - Complexity = 35
      95             :                     // Dst: (t2REVSH:i32 rGPR:i32:$Rm)
      96             : /*159*/           0, /*End of Scope*/
      97             : /*160*/         /*Scope*/ 53, /*->214*/
      98             : /*161*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
      99             : /*165*/           OPC_RecordChild0, // #0 = $Rn
     100             : /*166*/           OPC_MoveParent,
     101             : /*167*/           OPC_MoveChild1,
     102             : /*168*/           OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     103             : /*174*/           OPC_MoveChild0,
     104             : /*175*/           OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
     105             : /*178*/           OPC_RecordChild0, // #1 = $Rm
     106             : /*179*/           OPC_RecordChild1, // #2 = $sh
     107             : /*180*/           OPC_MoveChild1,
     108             : /*181*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     109             : /*184*/           OPC_CheckPredicate, 0, // Predicate_pkh_lsl_amt
     110             : /*186*/           OPC_CheckType, MVT::i32,
     111             : /*188*/           OPC_MoveParent,
     112             : /*189*/           OPC_MoveParent,
     113             : /*190*/           OPC_MoveParent,
     114             : /*191*/           OPC_CheckType, MVT::i32,
     115             : /*193*/           OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     116             : /*195*/           OPC_EmitConvertToTarget, 2,
     117             : /*197*/           OPC_EmitInteger, MVT::i32, 14, 
     118             : /*200*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     119             : /*203*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHBT), 0,
     120             :                       MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     121             :                   // Src: (or:i32 (and:i32 GPRnopc:i32:$Rn, 65535:i32), (and:i32 (shl:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_pkh_lsl_amt>>:$sh), 4294901760:i32)) - Complexity = 26
     122             :                   // Dst: (PKHBT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, (imm:i32):$sh)
     123             : /*214*/         /*Scope*/ 94, /*->309*/
     124             : /*215*/           OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     125             : /*221*/           OPC_RecordChild0, // #0 = $Rn
     126             : /*222*/           OPC_MoveParent,
     127             : /*223*/           OPC_MoveChild1,
     128             : /*224*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     129             : /*228*/           OPC_MoveChild0,
     130             : /*229*/           OPC_SwitchOpcode /*2 cases */, 36, TARGET_VAL(ISD::SRA),// ->269
     131             : /*233*/             OPC_RecordChild0, // #1 = $Rm
     132             : /*234*/             OPC_RecordChild1, // #2 = $sh
     133             : /*235*/             OPC_MoveChild1,
     134             : /*236*/             OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     135             : /*239*/             OPC_CheckPredicate, 1, // Predicate_pkh_asr_amt
     136             : /*241*/             OPC_CheckType, MVT::i32,
     137             : /*243*/             OPC_MoveParent,
     138             : /*244*/             OPC_MoveParent,
     139             : /*245*/             OPC_MoveParent,
     140             : /*246*/             OPC_CheckType, MVT::i32,
     141             : /*248*/             OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     142             : /*250*/             OPC_EmitConvertToTarget, 2,
     143             : /*252*/             OPC_EmitInteger, MVT::i32, 14, 
     144             : /*255*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     145             : /*258*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHTB), 0,
     146             :                         MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     147             :                     // Src: (or:i32 (and:i32 GPRnopc:i32:$Rn, 4294901760:i32), (and:i32 (sra:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_pkh_asr_amt>>:$sh), 65535:i32)) - Complexity = 26
     148             :                     // Dst: (PKHTB:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, (imm:i32):$sh)
     149             : /*269*/           /*SwitchOpcode*/ 36, TARGET_VAL(ISD::SRL),// ->308
     150             : /*272*/             OPC_RecordChild0, // #1 = $src2
     151             : /*273*/             OPC_RecordChild1, // #2 = $sh
     152             : /*274*/             OPC_MoveChild1,
     153             : /*275*/             OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     154             : /*278*/             OPC_CheckPredicate, 2, // Predicate_imm1_15
     155             : /*280*/             OPC_CheckType, MVT::i32,
     156             : /*282*/             OPC_MoveParent,
     157             : /*283*/             OPC_MoveParent,
     158             : /*284*/             OPC_MoveParent,
     159             : /*285*/             OPC_CheckType, MVT::i32,
     160             : /*287*/             OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     161             : /*289*/             OPC_EmitConvertToTarget, 2,
     162             : /*291*/             OPC_EmitInteger, MVT::i32, 14, 
     163             : /*294*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     164             : /*297*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHTB), 0,
     165             :                         MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     166             :                     // Src: (or:i32 (and:i32 GPRnopc:i32:$src1, 4294901760:i32), (and:i32 (srl:i32 GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm1_15>>:$sh), 65535:i32)) - Complexity = 26
     167             :                     // Dst: (PKHTB:i32 GPRnopc:i32:$src1, GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm1_15>>:$sh)
     168             : /*308*/           0, // EndSwitchOpcode
     169             : /*309*/         /*Scope*/ 53, /*->363*/
     170             : /*310*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     171             : /*314*/           OPC_RecordChild0, // #0 = $Rn
     172             : /*315*/           OPC_MoveParent,
     173             : /*316*/           OPC_MoveChild1,
     174             : /*317*/           OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     175             : /*323*/           OPC_MoveChild0,
     176             : /*324*/           OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
     177             : /*327*/           OPC_RecordChild0, // #1 = $Rm
     178             : /*328*/           OPC_RecordChild1, // #2 = $sh
     179             : /*329*/           OPC_MoveChild1,
     180             : /*330*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     181             : /*333*/           OPC_CheckPredicate, 0, // Predicate_pkh_lsl_amt
     182             : /*335*/           OPC_CheckType, MVT::i32,
     183             : /*337*/           OPC_MoveParent,
     184             : /*338*/           OPC_MoveParent,
     185             : /*339*/           OPC_MoveParent,
     186             : /*340*/           OPC_CheckType, MVT::i32,
     187             : /*342*/           OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     188             : /*344*/           OPC_EmitConvertToTarget, 2,
     189             : /*346*/           OPC_EmitInteger, MVT::i32, 14, 
     190             : /*349*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     191             : /*352*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHBT), 0,
     192             :                       MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     193             :                   // Src: (or:i32 (and:i32 rGPR:i32:$Rn, 65535:i32), (and:i32 (shl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_pkh_lsl_amt>>:$sh), 4294901760:i32)) - Complexity = 26
     194             :                   // Dst: (t2PKHBT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (imm:i32):$sh)
     195             : /*363*/         /*Scope*/ 17|128,1/*145*/, /*->510*/
     196             : /*365*/           OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     197             : /*371*/           OPC_Scope, 88, /*->461*/ // 2 children in Scope
     198             : /*373*/             OPC_RecordChild0, // #0 = $Rn
     199             : /*374*/             OPC_MoveParent,
     200             : /*375*/             OPC_MoveChild1,
     201             : /*376*/             OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     202             : /*380*/             OPC_MoveChild0,
     203             : /*381*/             OPC_SwitchOpcode /*2 cases */, 36, TARGET_VAL(ISD::SRA),// ->421
     204             : /*385*/               OPC_RecordChild0, // #1 = $Rm
     205             : /*386*/               OPC_RecordChild1, // #2 = $sh
     206             : /*387*/               OPC_MoveChild1,
     207             : /*388*/               OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     208             : /*391*/               OPC_CheckPredicate, 1, // Predicate_pkh_asr_amt
     209             : /*393*/               OPC_CheckType, MVT::i32,
     210             : /*395*/               OPC_MoveParent,
     211             : /*396*/               OPC_MoveParent,
     212             : /*397*/               OPC_MoveParent,
     213             : /*398*/               OPC_CheckType, MVT::i32,
     214             : /*400*/               OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     215             : /*402*/               OPC_EmitConvertToTarget, 2,
     216             : /*404*/               OPC_EmitInteger, MVT::i32, 14, 
     217             : /*407*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     218             : /*410*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHTB), 0,
     219             :                           MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     220             :                       // Src: (or:i32 (and:i32 rGPR:i32:$Rn, 4294901760:i32), (and:i32 (sra:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_pkh_asr_amt>>:$sh), 65535:i32)) - Complexity = 26
     221             :                       // Dst: (t2PKHTB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (imm:i32):$sh)
     222             : /*421*/             /*SwitchOpcode*/ 36, TARGET_VAL(ISD::SRL),// ->460
     223             : /*424*/               OPC_RecordChild0, // #1 = $src2
     224             : /*425*/               OPC_RecordChild1, // #2 = $sh
     225             : /*426*/               OPC_MoveChild1,
     226             : /*427*/               OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     227             : /*430*/               OPC_CheckPredicate, 2, // Predicate_imm1_15
     228             : /*432*/               OPC_CheckType, MVT::i32,
     229             : /*434*/               OPC_MoveParent,
     230             : /*435*/               OPC_MoveParent,
     231             : /*436*/               OPC_MoveParent,
     232             : /*437*/               OPC_CheckType, MVT::i32,
     233             : /*439*/               OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     234             : /*441*/               OPC_EmitConvertToTarget, 2,
     235             : /*443*/               OPC_EmitInteger, MVT::i32, 14, 
     236             : /*446*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     237             : /*449*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHTB), 0,
     238             :                           MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     239             :                       // Src: (or:i32 (and:i32 rGPR:i32:$src1, 4294901760:i32), (and:i32 (srl:i32 rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm1_15>>:$sh), 65535:i32)) - Complexity = 26
     240             :                       // Dst: (t2PKHTB:i32 rGPR:i32:$src1, rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm1_15>>:$sh)
     241             : /*460*/             0, // EndSwitchOpcode
     242             : /*461*/           /*Scope*/ 47, /*->509*/
     243             : /*462*/             OPC_MoveChild0,
     244             : /*463*/             OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
     245             : /*466*/             OPC_RecordChild0, // #0 = $Rm
     246             : /*467*/             OPC_RecordChild1, // #1 = $sh
     247             : /*468*/             OPC_MoveChild1,
     248             : /*469*/             OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     249             : /*472*/             OPC_CheckPredicate, 0, // Predicate_pkh_lsl_amt
     250             : /*474*/             OPC_CheckType, MVT::i32,
     251             : /*476*/             OPC_MoveParent,
     252             : /*477*/             OPC_MoveParent,
     253             : /*478*/             OPC_MoveParent,
     254             : /*479*/             OPC_MoveChild1,
     255             : /*480*/             OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     256             : /*484*/             OPC_RecordChild0, // #2 = $Rn
     257             : /*485*/             OPC_MoveParent,
     258             : /*486*/             OPC_CheckType, MVT::i32,
     259             : /*488*/             OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     260             : /*490*/             OPC_EmitConvertToTarget, 1,
     261             : /*492*/             OPC_EmitInteger, MVT::i32, 14, 
     262             : /*495*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     263             : /*498*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHBT), 0,
     264             :                         MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     265             :                     // Src: (or:i32 (and:i32 (shl:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_pkh_lsl_amt>>:$sh), 4294901760:i32), (and:i32 GPRnopc:i32:$Rn, 65535:i32)) - Complexity = 26
     266             :                     // Dst: (PKHBT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, (imm:i32):$sh)
     267             : /*509*/           0, /*End of Scope*/
     268             : /*510*/         /*Scope*/ 53, /*->564*/
     269             : /*511*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     270             : /*515*/           OPC_MoveChild0,
     271             : /*516*/           OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
     272             : /*519*/           OPC_RecordChild0, // #0 = $Rm
     273             : /*520*/           OPC_RecordChild1, // #1 = $sh
     274             : /*521*/           OPC_MoveChild1,
     275             : /*522*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     276             : /*525*/           OPC_CheckPredicate, 1, // Predicate_pkh_asr_amt
     277             : /*527*/           OPC_CheckType, MVT::i32,
     278             : /*529*/           OPC_MoveParent,
     279             : /*530*/           OPC_MoveParent,
     280             : /*531*/           OPC_MoveParent,
     281             : /*532*/           OPC_MoveChild1,
     282             : /*533*/           OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     283             : /*539*/           OPC_RecordChild0, // #2 = $Rn
     284             : /*540*/           OPC_MoveParent,
     285             : /*541*/           OPC_CheckType, MVT::i32,
     286             : /*543*/           OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     287             : /*545*/           OPC_EmitConvertToTarget, 1,
     288             : /*547*/           OPC_EmitInteger, MVT::i32, 14, 
     289             : /*550*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     290             : /*553*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHTB), 0,
     291             :                       MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     292             :                   // Src: (or:i32 (and:i32 (sra:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_pkh_asr_amt>>:$sh), 65535:i32), (and:i32 GPRnopc:i32:$Rn, 4294901760:i32)) - Complexity = 26
     293             :                   // Dst: (PKHTB:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, (imm:i32):$sh)
     294             : /*564*/         /*Scope*/ 53, /*->618*/
     295             : /*565*/           OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     296             : /*571*/           OPC_MoveChild0,
     297             : /*572*/           OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
     298             : /*575*/           OPC_RecordChild0, // #0 = $Rm
     299             : /*576*/           OPC_RecordChild1, // #1 = $sh
     300             : /*577*/           OPC_MoveChild1,
     301             : /*578*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     302             : /*581*/           OPC_CheckPredicate, 0, // Predicate_pkh_lsl_amt
     303             : /*583*/           OPC_CheckType, MVT::i32,
     304             : /*585*/           OPC_MoveParent,
     305             : /*586*/           OPC_MoveParent,
     306             : /*587*/           OPC_MoveParent,
     307             : /*588*/           OPC_MoveChild1,
     308             : /*589*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     309             : /*593*/           OPC_RecordChild0, // #2 = $Rn
     310             : /*594*/           OPC_MoveParent,
     311             : /*595*/           OPC_CheckType, MVT::i32,
     312             : /*597*/           OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     313             : /*599*/           OPC_EmitConvertToTarget, 1,
     314             : /*601*/           OPC_EmitInteger, MVT::i32, 14, 
     315             : /*604*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     316             : /*607*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHBT), 0,
     317             :                       MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     318             :                   // Src: (or:i32 (and:i32 (shl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_pkh_lsl_amt>>:$sh), 4294901760:i32), (and:i32 rGPR:i32:$Rn, 65535:i32)) - Complexity = 26
     319             :                   // Dst: (t2PKHBT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (imm:i32):$sh)
     320             : /*618*/         /*Scope*/ 0|128,1/*128*/, /*->748*/
     321             : /*620*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     322             : /*624*/           OPC_MoveChild0,
     323             : /*625*/           OPC_SwitchOpcode /*2 cases */, 45, TARGET_VAL(ISD::SRA),// ->674
     324             : /*629*/             OPC_RecordChild0, // #0 = $Rm
     325             : /*630*/             OPC_RecordChild1, // #1 = $sh
     326             : /*631*/             OPC_MoveChild1,
     327             : /*632*/             OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     328             : /*635*/             OPC_CheckPredicate, 1, // Predicate_pkh_asr_amt
     329             : /*637*/             OPC_CheckType, MVT::i32,
     330             : /*639*/             OPC_MoveParent,
     331             : /*640*/             OPC_MoveParent,
     332             : /*641*/             OPC_MoveParent,
     333             : /*642*/             OPC_MoveChild1,
     334             : /*643*/             OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     335             : /*649*/             OPC_RecordChild0, // #2 = $Rn
     336             : /*650*/             OPC_MoveParent,
     337             : /*651*/             OPC_CheckType, MVT::i32,
     338             : /*653*/             OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     339             : /*655*/             OPC_EmitConvertToTarget, 1,
     340             : /*657*/             OPC_EmitInteger, MVT::i32, 14, 
     341             : /*660*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     342             : /*663*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHTB), 0,
     343             :                         MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     344             :                     // Src: (or:i32 (and:i32 (sra:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_pkh_asr_amt>>:$sh), 65535:i32), (and:i32 rGPR:i32:$Rn, 4294901760:i32)) - Complexity = 26
     345             :                     // Dst: (t2PKHTB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (imm:i32):$sh)
     346             : /*674*/           /*SwitchOpcode*/ 70, TARGET_VAL(ISD::SRL),// ->747
     347             : /*677*/             OPC_RecordChild0, // #0 = $src2
     348             : /*678*/             OPC_RecordChild1, // #1 = $sh
     349             : /*679*/             OPC_MoveChild1,
     350             : /*680*/             OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     351             : /*683*/             OPC_CheckPredicate, 2, // Predicate_imm1_15
     352             : /*685*/             OPC_CheckType, MVT::i32,
     353             : /*687*/             OPC_MoveParent,
     354             : /*688*/             OPC_MoveParent,
     355             : /*689*/             OPC_MoveParent,
     356             : /*690*/             OPC_MoveChild1,
     357             : /*691*/             OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     358             : /*697*/             OPC_RecordChild0, // #2 = $src1
     359             : /*698*/             OPC_MoveParent,
     360             : /*699*/             OPC_CheckType, MVT::i32,
     361             : /*701*/             OPC_Scope, 21, /*->724*/ // 2 children in Scope
     362             : /*703*/               OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     363             : /*705*/               OPC_EmitConvertToTarget, 1,
     364             : /*707*/               OPC_EmitInteger, MVT::i32, 14, 
     365             : /*710*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     366             : /*713*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHTB), 0,
     367             :                           MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     368             :                       // Src: (or:i32 (and:i32 (srl:i32 GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm1_15>>:$sh), 65535:i32), (and:i32 GPRnopc:i32:$src1, 4294901760:i32)) - Complexity = 26
     369             :                       // Dst: (PKHTB:i32 GPRnopc:i32:$src1, GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm1_15>>:$sh)
     370             : /*724*/             /*Scope*/ 21, /*->746*/
     371             : /*725*/               OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     372             : /*727*/               OPC_EmitConvertToTarget, 1,
     373             : /*729*/               OPC_EmitInteger, MVT::i32, 14, 
     374             : /*732*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     375             : /*735*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHTB), 0,
     376             :                           MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     377             :                       // Src: (or:i32 (and:i32 (srl:i32 rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm1_15>>:$sh), 65535:i32), (and:i32 rGPR:i32:$src1, 4294901760:i32)) - Complexity = 26
     378             :                       // Dst: (t2PKHTB:i32 rGPR:i32:$src1, rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm1_15>>:$sh)
     379             : /*746*/             0, /*End of Scope*/
     380             : /*747*/           0, // EndSwitchOpcode
     381             : /*748*/         0, /*End of Scope*/
     382             : /*749*/       /*Scope*/ 46, /*->796*/
     383             : /*750*/         OPC_RecordChild0, // #0 = $Rn
     384             : /*751*/         OPC_MoveChild1,
     385             : /*752*/         OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
     386             : /*755*/         OPC_RecordChild0, // #1 = $ShiftedRm
     387             : /*756*/         OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
     388             : /*767*/         OPC_MoveParent,
     389             : /*768*/         OPC_CheckType, MVT::i32,
     390             : /*770*/         OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     391             : /*772*/         OPC_CheckComplexPat, /*CP*/0, /*#*/1, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
     392             : /*775*/         OPC_EmitInteger, MVT::i32, 14, 
     393             : /*778*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     394             : /*781*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     395             : /*784*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNrs), 0,
     396             :                     MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
     397             :                 // Src: (or:i32 rGPR:i32:$Rn, (xor:i32 t2_so_reg:i32:$ShiftedRm, -1:i32)) - Complexity = 20
     398             :                 // Dst: (t2ORNrs:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
     399             : /*796*/       /*Scope*/ 66|128,5/*706*/, /*->1504*/
     400             : /*798*/         OPC_MoveChild0,
     401             : /*799*/         OPC_Scope, 45, /*->846*/ // 11 children in Scope
     402             : /*801*/           OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
     403             : /*804*/           OPC_RecordChild0, // #0 = $ShiftedRm
     404             : /*805*/           OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
     405             : /*816*/           OPC_MoveParent,
     406             : /*817*/           OPC_RecordChild1, // #1 = $Rn
     407             : /*818*/           OPC_CheckType, MVT::i32,
     408             : /*820*/           OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     409             : /*822*/           OPC_CheckComplexPat, /*CP*/0, /*#*/0, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
     410             : /*825*/           OPC_EmitInteger, MVT::i32, 14, 
     411             : /*828*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     412             : /*831*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     413             : /*834*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNrs), 0,
     414             :                       MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
     415             :                   // Src: (or:i32 (xor:i32 t2_so_reg:i32:$ShiftedRm, -1:i32), rGPR:i32:$Rn) - Complexity = 20
     416             :                   // Dst: (t2ORNrs:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
     417             : /*846*/         /*Scope*/ 65, /*->912*/
     418             : /*847*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     419             : /*851*/           OPC_RecordChild0, // #0 = $Rn
     420             : /*852*/           OPC_MoveParent,
     421             : /*853*/           OPC_MoveChild1,
     422             : /*854*/           OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     423             : /*860*/           OPC_RecordChild0, // #1 = $Rm
     424             : /*861*/           OPC_MoveParent,
     425             : /*862*/           OPC_CheckType, MVT::i32,
     426             : /*864*/           OPC_Scope, 22, /*->888*/ // 2 children in Scope
     427             : /*866*/             OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     428             : /*868*/             OPC_EmitInteger, MVT::i32, 0, 
     429             : /*871*/             OPC_EmitInteger, MVT::i32, 14, 
     430             : /*874*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     431             : /*877*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHBT), 0,
     432             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
     433             :                     // Src: (or:i32 (and:i32 GPRnopc:i32:$Rn, 65535:i32), (and:i32 GPRnopc:i32:$Rm, 4294901760:i32)) - Complexity = 19
     434             :                     // Dst: (PKHBT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, 0:i32)
     435             : /*888*/           /*Scope*/ 22, /*->911*/
     436             : /*889*/             OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     437             : /*891*/             OPC_EmitInteger, MVT::i32, 0, 
     438             : /*894*/             OPC_EmitInteger, MVT::i32, 14, 
     439             : /*897*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     440             : /*900*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHBT), 0,
     441             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
     442             :                     // Src: (or:i32 (and:i32 rGPR:i32:$src1, 65535:i32), (and:i32 rGPR:i32:$src2, 4294901760:i32)) - Complexity = 19
     443             :                     // Dst: (t2PKHBT:i32 rGPR:i32:$src1, rGPR:i32:$src2, 0:i32)
     444             : /*911*/           0, /*End of Scope*/
     445             : /*912*/         /*Scope*/ 65, /*->978*/
     446             : /*913*/           OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     447             : /*919*/           OPC_RecordChild0, // #0 = $Rm
     448             : /*920*/           OPC_MoveParent,
     449             : /*921*/           OPC_MoveChild1,
     450             : /*922*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     451             : /*926*/           OPC_RecordChild0, // #1 = $Rn
     452             : /*927*/           OPC_MoveParent,
     453             : /*928*/           OPC_CheckType, MVT::i32,
     454             : /*930*/           OPC_Scope, 22, /*->954*/ // 2 children in Scope
     455             : /*932*/             OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     456             : /*934*/             OPC_EmitInteger, MVT::i32, 0, 
     457             : /*937*/             OPC_EmitInteger, MVT::i32, 14, 
     458             : /*940*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     459             : /*943*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHBT), 0,
     460             :                         MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
     461             :                     // Src: (or:i32 (and:i32 GPRnopc:i32:$Rm, 4294901760:i32), (and:i32 GPRnopc:i32:$Rn, 65535:i32)) - Complexity = 19
     462             :                     // Dst: (PKHBT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, 0:i32)
     463             : /*954*/           /*Scope*/ 22, /*->977*/
     464             : /*955*/             OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     465             : /*957*/             OPC_EmitInteger, MVT::i32, 0, 
     466             : /*960*/             OPC_EmitInteger, MVT::i32, 14, 
     467             : /*963*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     468             : /*966*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHBT), 0,
     469             :                         MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
     470             :                     // Src: (or:i32 (and:i32 rGPR:i32:$src2, 4294901760:i32), (and:i32 rGPR:i32:$src1, 65535:i32)) - Complexity = 19
     471             :                     // Dst: (t2PKHBT:i32 rGPR:i32:$src1, rGPR:i32:$src2, 0:i32)
     472             : /*977*/           0, /*End of Scope*/
     473             : /*978*/         /*Scope*/ 45, /*->1024*/
     474             : /*979*/           OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     475             : /*983*/           OPC_RecordChild0, // #0 = $Rn
     476             : /*984*/           OPC_MoveParent,
     477             : /*985*/           OPC_MoveChild1,
     478             : /*986*/           OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
     479             : /*989*/           OPC_RecordChild0, // #1 = $Rm
     480             : /*990*/           OPC_RecordChild1, // #2 = $sh
     481             : /*991*/           OPC_MoveChild1,
     482             : /*992*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     483             : /*995*/           OPC_CheckPredicate, 3, // Predicate_imm16_31
     484             : /*997*/           OPC_CheckType, MVT::i32,
     485             : /*999*/           OPC_MoveParent,
     486             : /*1000*/          OPC_MoveParent,
     487             : /*1001*/          OPC_CheckType, MVT::i32,
     488             : /*1003*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     489             : /*1005*/          OPC_EmitConvertToTarget, 2,
     490             : /*1007*/          OPC_EmitInteger, MVT::i32, 14, 
     491             : /*1010*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     492             : /*1013*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHBT), 0,
     493             :                       MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     494             :                   // Src: (or:i32 (and:i32 GPRnopc:i32:$Rn, 65535:i32), (shl:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_imm16_31>>:$sh)) - Complexity = 18
     495             :                   // Dst: (PKHBT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_imm16_31>>:$sh)
     496             : /*1024*/        /*Scope*/ 87, /*->1112*/
     497             : /*1025*/          OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     498             : /*1031*/          OPC_RecordChild0, // #0 = $src1
     499             : /*1032*/          OPC_MoveParent,
     500             : /*1033*/          OPC_MoveChild1,
     501             : /*1034*/          OPC_SwitchOpcode /*2 cases */, 35, TARGET_VAL(ISD::SRL),// ->1073
     502             : /*1038*/            OPC_RecordChild0, // #1 = $src2
     503             : /*1039*/            OPC_RecordChild1, // #2 = $sh
     504             : /*1040*/            OPC_MoveChild1,
     505             : /*1041*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     506             : /*1044*/            OPC_CheckPredicate, 4, // Predicate_imm16
     507             : /*1046*/            OPC_CheckType, MVT::i32,
     508             : /*1048*/            OPC_MoveParent,
     509             : /*1049*/            OPC_MoveParent,
     510             : /*1050*/            OPC_CheckType, MVT::i32,
     511             : /*1052*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     512             : /*1054*/            OPC_EmitConvertToTarget, 2,
     513             : /*1056*/            OPC_EmitInteger, MVT::i32, 14, 
     514             : /*1059*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     515             : /*1062*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHTB), 0,
     516             :                         MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     517             :                     // Src: (or:i32 (and:i32 GPRnopc:i32:$src1, 4294901760:i32), (srl:i32 GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm16>>:$sh)) - Complexity = 18
     518             :                     // Dst: (PKHTB:i32 GPRnopc:i32:$src1, GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm16>>:$sh)
     519             : /*1073*/          /*SwitchOpcode*/ 35, TARGET_VAL(ISD::SRA),// ->1111
     520             : /*1076*/            OPC_RecordChild0, // #1 = $src2
     521             : /*1077*/            OPC_RecordChild1, // #2 = $sh
     522             : /*1078*/            OPC_MoveChild1,
     523             : /*1079*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     524             : /*1082*/            OPC_CheckPredicate, 3, // Predicate_imm16_31
     525             : /*1084*/            OPC_CheckType, MVT::i32,
     526             : /*1086*/            OPC_MoveParent,
     527             : /*1087*/            OPC_MoveParent,
     528             : /*1088*/            OPC_CheckType, MVT::i32,
     529             : /*1090*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     530             : /*1092*/            OPC_EmitConvertToTarget, 2,
     531             : /*1094*/            OPC_EmitInteger, MVT::i32, 14, 
     532             : /*1097*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     533             : /*1100*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHTB), 0,
     534             :                         MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     535             :                     // Src: (or:i32 (and:i32 GPRnopc:i32:$src1, 4294901760:i32), (sra:i32 GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)) - Complexity = 18
     536             :                     // Dst: (PKHTB:i32 GPRnopc:i32:$src1, GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)
     537             : /*1111*/          0, // EndSwitchOpcode
     538             : /*1112*/        /*Scope*/ 45, /*->1158*/
     539             : /*1113*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     540             : /*1117*/          OPC_RecordChild0, // #0 = $src1
     541             : /*1118*/          OPC_MoveParent,
     542             : /*1119*/          OPC_MoveChild1,
     543             : /*1120*/          OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
     544             : /*1123*/          OPC_RecordChild0, // #1 = $src2
     545             : /*1124*/          OPC_RecordChild1, // #2 = $sh
     546             : /*1125*/          OPC_MoveChild1,
     547             : /*1126*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     548             : /*1129*/          OPC_CheckPredicate, 3, // Predicate_imm16_31
     549             : /*1131*/          OPC_CheckType, MVT::i32,
     550             : /*1133*/          OPC_MoveParent,
     551             : /*1134*/          OPC_MoveParent,
     552             : /*1135*/          OPC_CheckType, MVT::i32,
     553             : /*1137*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     554             : /*1139*/          OPC_EmitConvertToTarget, 2,
     555             : /*1141*/          OPC_EmitInteger, MVT::i32, 14, 
     556             : /*1144*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     557             : /*1147*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHBT), 0,
     558             :                       MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     559             :                   // Src: (or:i32 (and:i32 rGPR:i32:$src1, 65535:i32), (shl:i32 rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)) - Complexity = 18
     560             :                   // Dst: (t2PKHBT:i32 rGPR:i32:$src1, rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)
     561             : /*1158*/        /*Scope*/ 87, /*->1246*/
     562             : /*1159*/          OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     563             : /*1165*/          OPC_RecordChild0, // #0 = $src1
     564             : /*1166*/          OPC_MoveParent,
     565             : /*1167*/          OPC_MoveChild1,
     566             : /*1168*/          OPC_SwitchOpcode /*2 cases */, 35, TARGET_VAL(ISD::SRL),// ->1207
     567             : /*1172*/            OPC_RecordChild0, // #1 = $src2
     568             : /*1173*/            OPC_RecordChild1, // #2 = $sh
     569             : /*1174*/            OPC_MoveChild1,
     570             : /*1175*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     571             : /*1178*/            OPC_CheckPredicate, 4, // Predicate_imm16
     572             : /*1180*/            OPC_CheckType, MVT::i32,
     573             : /*1182*/            OPC_MoveParent,
     574             : /*1183*/            OPC_MoveParent,
     575             : /*1184*/            OPC_CheckType, MVT::i32,
     576             : /*1186*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     577             : /*1188*/            OPC_EmitConvertToTarget, 2,
     578             : /*1190*/            OPC_EmitInteger, MVT::i32, 14, 
     579             : /*1193*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     580             : /*1196*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHTB), 0,
     581             :                         MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     582             :                     // Src: (or:i32 (and:i32 rGPR:i32:$src1, 4294901760:i32), (srl:i32 rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16>>:$sh)) - Complexity = 18
     583             :                     // Dst: (t2PKHTB:i32 rGPR:i32:$src1, rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16>>:$sh)
     584             : /*1207*/          /*SwitchOpcode*/ 35, TARGET_VAL(ISD::SRA),// ->1245
     585             : /*1210*/            OPC_RecordChild0, // #1 = $src2
     586             : /*1211*/            OPC_RecordChild1, // #2 = $sh
     587             : /*1212*/            OPC_MoveChild1,
     588             : /*1213*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     589             : /*1216*/            OPC_CheckPredicate, 3, // Predicate_imm16_31
     590             : /*1218*/            OPC_CheckType, MVT::i32,
     591             : /*1220*/            OPC_MoveParent,
     592             : /*1221*/            OPC_MoveParent,
     593             : /*1222*/            OPC_CheckType, MVT::i32,
     594             : /*1224*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     595             : /*1226*/            OPC_EmitConvertToTarget, 2,
     596             : /*1228*/            OPC_EmitInteger, MVT::i32, 14, 
     597             : /*1231*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     598             : /*1234*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHTB), 0,
     599             :                         MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
     600             :                     // Src: (or:i32 (and:i32 rGPR:i32:$src1, 4294901760:i32), (sra:i32 rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)) - Complexity = 18
     601             :                     // Dst: (t2PKHTB:i32 rGPR:i32:$src1, rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)
     602             : /*1245*/          0, // EndSwitchOpcode
     603             : /*1246*/        /*Scope*/ 70, /*->1317*/
     604             : /*1247*/          OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
     605             : /*1250*/          OPC_RecordChild0, // #0 = $Rm
     606             : /*1251*/          OPC_RecordChild1, // #1 = $sh
     607             : /*1252*/          OPC_MoveChild1,
     608             : /*1253*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     609             : /*1256*/          OPC_CheckPredicate, 3, // Predicate_imm16_31
     610             : /*1258*/          OPC_CheckType, MVT::i32,
     611             : /*1260*/          OPC_MoveParent,
     612             : /*1261*/          OPC_MoveParent,
     613             : /*1262*/          OPC_MoveChild1,
     614             : /*1263*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     615             : /*1267*/          OPC_RecordChild0, // #2 = $Rn
     616             : /*1268*/          OPC_MoveParent,
     617             : /*1269*/          OPC_CheckType, MVT::i32,
     618             : /*1271*/          OPC_Scope, 21, /*->1294*/ // 2 children in Scope
     619             : /*1273*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     620             : /*1275*/            OPC_EmitConvertToTarget, 1,
     621             : /*1277*/            OPC_EmitInteger, MVT::i32, 14, 
     622             : /*1280*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     623             : /*1283*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHBT), 0,
     624             :                         MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     625             :                     // Src: (or:i32 (shl:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_imm16_31>>:$sh), (and:i32 GPRnopc:i32:$Rn, 65535:i32)) - Complexity = 18
     626             :                     // Dst: (PKHBT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_imm16_31>>:$sh)
     627             : /*1294*/          /*Scope*/ 21, /*->1316*/
     628             : /*1295*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     629             : /*1297*/            OPC_EmitConvertToTarget, 1,
     630             : /*1299*/            OPC_EmitInteger, MVT::i32, 14, 
     631             : /*1302*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     632             : /*1305*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHBT), 0,
     633             :                         MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     634             :                     // Src: (or:i32 (shl:i32 rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh), (and:i32 rGPR:i32:$src1, 65535:i32)) - Complexity = 18
     635             :                     // Dst: (t2PKHBT:i32 rGPR:i32:$src1, rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)
     636             : /*1316*/          0, /*End of Scope*/
     637             : /*1317*/        /*Scope*/ 72, /*->1390*/
     638             : /*1318*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
     639             : /*1321*/          OPC_RecordChild0, // #0 = $src2
     640             : /*1322*/          OPC_RecordChild1, // #1 = $sh
     641             : /*1323*/          OPC_MoveChild1,
     642             : /*1324*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     643             : /*1327*/          OPC_CheckPredicate, 4, // Predicate_imm16
     644             : /*1329*/          OPC_CheckType, MVT::i32,
     645             : /*1331*/          OPC_MoveParent,
     646             : /*1332*/          OPC_MoveParent,
     647             : /*1333*/          OPC_MoveChild1,
     648             : /*1334*/          OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     649             : /*1340*/          OPC_RecordChild0, // #2 = $src1
     650             : /*1341*/          OPC_MoveParent,
     651             : /*1342*/          OPC_CheckType, MVT::i32,
     652             : /*1344*/          OPC_Scope, 21, /*->1367*/ // 2 children in Scope
     653             : /*1346*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     654             : /*1348*/            OPC_EmitConvertToTarget, 1,
     655             : /*1350*/            OPC_EmitInteger, MVT::i32, 14, 
     656             : /*1353*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     657             : /*1356*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHTB), 0,
     658             :                         MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     659             :                     // Src: (or:i32 (srl:i32 GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm16>>:$sh), (and:i32 GPRnopc:i32:$src1, 4294901760:i32)) - Complexity = 18
     660             :                     // Dst: (PKHTB:i32 GPRnopc:i32:$src1, GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm16>>:$sh)
     661             : /*1367*/          /*Scope*/ 21, /*->1389*/
     662             : /*1368*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     663             : /*1370*/            OPC_EmitConvertToTarget, 1,
     664             : /*1372*/            OPC_EmitInteger, MVT::i32, 14, 
     665             : /*1375*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     666             : /*1378*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHTB), 0,
     667             :                         MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     668             :                     // Src: (or:i32 (srl:i32 rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16>>:$sh), (and:i32 rGPR:i32:$src1, 4294901760:i32)) - Complexity = 18
     669             :                     // Dst: (t2PKHTB:i32 rGPR:i32:$src1, rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16>>:$sh)
     670             : /*1389*/          0, /*End of Scope*/
     671             : /*1390*/        /*Scope*/ 72, /*->1463*/
     672             : /*1391*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
     673             : /*1394*/          OPC_RecordChild0, // #0 = $src2
     674             : /*1395*/          OPC_RecordChild1, // #1 = $sh
     675             : /*1396*/          OPC_MoveChild1,
     676             : /*1397*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     677             : /*1400*/          OPC_CheckPredicate, 3, // Predicate_imm16_31
     678             : /*1402*/          OPC_CheckType, MVT::i32,
     679             : /*1404*/          OPC_MoveParent,
     680             : /*1405*/          OPC_MoveParent,
     681             : /*1406*/          OPC_MoveChild1,
     682             : /*1407*/          OPC_CheckAndImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     683             : /*1413*/          OPC_RecordChild0, // #2 = $src1
     684             : /*1414*/          OPC_MoveParent,
     685             : /*1415*/          OPC_CheckType, MVT::i32,
     686             : /*1417*/          OPC_Scope, 21, /*->1440*/ // 2 children in Scope
     687             : /*1419*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
     688             : /*1421*/            OPC_EmitConvertToTarget, 1,
     689             : /*1423*/            OPC_EmitInteger, MVT::i32, 14, 
     690             : /*1426*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     691             : /*1429*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::PKHTB), 0,
     692             :                         MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     693             :                     // Src: (or:i32 (sra:i32 GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh), (and:i32 GPRnopc:i32:$src1, 4294901760:i32)) - Complexity = 18
     694             :                     // Dst: (PKHTB:i32 GPRnopc:i32:$src1, GPRnopc:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)
     695             : /*1440*/          /*Scope*/ 21, /*->1462*/
     696             : /*1441*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
     697             : /*1443*/            OPC_EmitConvertToTarget, 1,
     698             : /*1445*/            OPC_EmitInteger, MVT::i32, 14, 
     699             : /*1448*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     700             : /*1451*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2PKHTB), 0,
     701             :                         MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
     702             :                     // Src: (or:i32 (sra:i32 rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh), (and:i32 rGPR:i32:$src1, 4294901760:i32)) - Complexity = 18
     703             :                     // Dst: (t2PKHTB:i32 rGPR:i32:$src1, rGPR:i32:$src2, (imm:i32)<<P:Predicate_imm16_31>>:$sh)
     704             : /*1462*/          0, /*End of Scope*/
     705             : /*1463*/        /*Scope*/ 39, /*->1503*/
     706             : /*1464*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     707             : /*1468*/          OPC_RecordChild0, // #0 = $src
     708             : /*1469*/          OPC_MoveParent,
     709             : /*1470*/          OPC_RecordChild1, // #1 = $imm
     710             : /*1471*/          OPC_MoveChild1,
     711             : /*1472*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     712             : /*1475*/          OPC_CheckPredicate, 5, // Predicate_lo16AllZero
     713             : /*1477*/          OPC_MoveParent,
     714             : /*1478*/          OPC_CheckType, MVT::i32,
     715             : /*1480*/          OPC_CheckPatternPredicate, 3, // (Subtarget->hasV6T2Ops()) && (!Subtarget->isThumb())
     716             : /*1482*/          OPC_EmitConvertToTarget, 1,
     717             : /*1484*/          OPC_EmitNodeXForm, 0, 2, // hi16
     718             : /*1487*/          OPC_EmitInteger, MVT::i32, 14, 
     719             : /*1490*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     720             : /*1493*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVTi16), 0,
     721             :                       MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
     722             :                   // Src: (or:i32 (and:i32 GPR:i32:$src, 65535:i32), (imm:i32)<<P:Predicate_lo16AllZero>><<X:hi16>>:$imm) - Complexity = 15
     723             :                   // Dst: (MOVTi16:i32 GPR:i32:$src, (hi16:i32 (imm:i32):$imm))
     724             : /*1503*/        0, /*End of Scope*/
     725             : /*1504*/      /*Scope*/ 31, /*->1536*/
     726             : /*1505*/        OPC_RecordChild0, // #0 = $Rn
     727             : /*1506*/        OPC_RecordChild1, // #1 = $shift
     728             : /*1507*/        OPC_CheckType, MVT::i32,
     729             : /*1509*/        OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
     730             : /*1511*/        OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectRegShifterOperand:$shift #2 #3 #4
     731             : /*1514*/        OPC_EmitInteger, MVT::i32, 14, 
     732             : /*1517*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     733             : /*1520*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     734             : /*1523*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::ORRrsr), 0,
     735             :                     MVT::i32, 7/*#Ops*/, 0, 2, 3, 4, 5, 6, 7, 
     736             :                 // Src: (or:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift) - Complexity = 15
     737             :                 // Dst: (ORRrsr:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift)
     738             : /*1536*/      /*Scope*/ 40, /*->1577*/
     739             : /*1537*/        OPC_MoveChild0,
     740             : /*1538*/        OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
     741             : /*1542*/        OPC_RecordChild0, // #0 = $src
     742             : /*1543*/        OPC_MoveParent,
     743             : /*1544*/        OPC_RecordChild1, // #1 = $imm
     744             : /*1545*/        OPC_MoveChild1,
     745             : /*1546*/        OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     746             : /*1549*/        OPC_CheckPredicate, 5, // Predicate_lo16AllZero
     747             : /*1551*/        OPC_MoveParent,
     748             : /*1552*/        OPC_CheckType, MVT::i32,
     749             : /*1554*/        OPC_CheckPatternPredicate, 5, // (Subtarget->hasV8MBaselineOps()) && (Subtarget->isThumb())
     750             : /*1556*/        OPC_EmitConvertToTarget, 1,
     751             : /*1558*/        OPC_EmitNodeXForm, 0, 2, // hi16
     752             : /*1561*/        OPC_EmitInteger, MVT::i32, 14, 
     753             : /*1564*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     754             : /*1567*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::t2MOVTi16), 0,
     755             :                     MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
     756             :                 // Src: (or:i32 (and:i32 rGPR:i32:$src, 65535:i32), (imm:i32)<<P:Predicate_lo16AllZero>><<X:hi16>>:$imm) - Complexity = 15
     757             :                 // Dst: (t2MOVTi16:i32 rGPR:i32:$src, (hi16:i32 (imm:i32):$imm))
     758             : /*1577*/      /*Scope*/ 8|128,1/*136*/, /*->1715*/
     759             : /*1579*/        OPC_RecordChild0, // #0 = $Rn
     760             : /*1580*/        OPC_Scope, 50, /*->1632*/ // 3 children in Scope
     761             : /*1582*/          OPC_MoveChild1,
     762             : /*1583*/          OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
     763             : /*1586*/          OPC_RecordChild0, // #1 = $imm
     764             : /*1587*/          OPC_MoveChild0,
     765             : /*1588*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     766             : /*1591*/          OPC_CheckPredicate, 6, // Predicate_t2_so_imm
     767             : /*1593*/          OPC_MoveParent,
     768             : /*1594*/          OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
     769             : /*1605*/          OPC_MoveParent,
     770             : /*1606*/          OPC_CheckType, MVT::i32,
     771             : /*1608*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     772             : /*1610*/          OPC_EmitConvertToTarget, 1,
     773             : /*1612*/          OPC_EmitInteger, MVT::i32, 14, 
     774             : /*1615*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     775             : /*1618*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     776             : /*1621*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNri), 0,
     777             :                       MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
     778             :                   // Src: (or:i32 rGPR:i32:$Rn, (xor:i32 (imm:i32)<<P:Predicate_t2_so_imm>>:$imm, -1:i32)) - Complexity = 15
     779             :                   // Dst: (t2ORNri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
     780             : /*1632*/        /*Scope*/ 30, /*->1663*/
     781             : /*1633*/          OPC_RecordChild1, // #1 = $Rn
     782             : /*1634*/          OPC_CheckType, MVT::i32,
     783             : /*1636*/          OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
     784             : /*1638*/          OPC_CheckComplexPat, /*CP*/1, /*#*/0, // SelectRegShifterOperand:$shift #2 #3 #4
     785             : /*1641*/          OPC_EmitInteger, MVT::i32, 14, 
     786             : /*1644*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     787             : /*1647*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     788             : /*1650*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::ORRrsr), 0,
     789             :                       MVT::i32, 7/*#Ops*/, 1, 2, 3, 4, 5, 6, 7, 
     790             :                   // Src: (or:i32 so_reg_reg:i32:$shift, GPR:i32:$Rn) - Complexity = 15
     791             :                   // Dst: (ORRrsr:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift)
     792             : /*1663*/        /*Scope*/ 50, /*->1714*/
     793             : /*1664*/          OPC_MoveChild1,
     794             : /*1665*/          OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
     795             : /*1668*/          OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
     796             : /*1679*/          OPC_RecordChild1, // #1 = $imm
     797             : /*1680*/          OPC_MoveChild1,
     798             : /*1681*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     799             : /*1684*/          OPC_CheckPredicate, 6, // Predicate_t2_so_imm
     800             : /*1686*/          OPC_MoveParent,
     801             : /*1687*/          OPC_MoveParent,
     802             : /*1688*/          OPC_CheckType, MVT::i32,
     803             : /*1690*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     804             : /*1692*/          OPC_EmitConvertToTarget, 1,
     805             : /*1694*/          OPC_EmitInteger, MVT::i32, 14, 
     806             : /*1697*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     807             : /*1700*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     808             : /*1703*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNri), 0,
     809             :                       MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
     810             :                   // Src: (or:i32 rGPR:i32:$Rn, (xor:i32 -1:i32, (imm:i32)<<P:Predicate_t2_so_imm>>:$imm)) - Complexity = 15
     811             :                   // Dst: (t2ORNri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
     812             : /*1714*/        0, /*End of Scope*/
     813             : /*1715*/      /*Scope*/ 102, /*->1818*/
     814             : /*1716*/        OPC_MoveChild0,
     815             : /*1717*/        OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
     816             : /*1720*/        OPC_Scope, 47, /*->1769*/ // 2 children in Scope
     817             : /*1722*/          OPC_RecordChild0, // #0 = $imm
     818             : /*1723*/          OPC_MoveChild0,
     819             : /*1724*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     820             : /*1727*/          OPC_CheckPredicate, 6, // Predicate_t2_so_imm
     821             : /*1729*/          OPC_MoveParent,
     822             : /*1730*/          OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
     823             : /*1741*/          OPC_MoveParent,
     824             : /*1742*/          OPC_RecordChild1, // #1 = $Rn
     825             : /*1743*/          OPC_CheckType, MVT::i32,
     826             : /*1745*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     827             : /*1747*/          OPC_EmitConvertToTarget, 0,
     828             : /*1749*/          OPC_EmitInteger, MVT::i32, 14, 
     829             : /*1752*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     830             : /*1755*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     831             : /*1758*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNri), 0,
     832             :                       MVT::i32, 5/*#Ops*/, 1, 2, 3, 4, 5, 
     833             :                   // Src: (or:i32 (xor:i32 (imm:i32)<<P:Predicate_t2_so_imm>>:$imm, -1:i32), rGPR:i32:$Rn) - Complexity = 15
     834             :                   // Dst: (t2ORNri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
     835             : /*1769*/        /*Scope*/ 47, /*->1817*/
     836             : /*1770*/          OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
     837             : /*1781*/          OPC_RecordChild1, // #0 = $imm
     838             : /*1782*/          OPC_MoveChild1,
     839             : /*1783*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     840             : /*1786*/          OPC_CheckPredicate, 6, // Predicate_t2_so_imm
     841             : /*1788*/          OPC_MoveParent,
     842             : /*1789*/          OPC_MoveParent,
     843             : /*1790*/          OPC_RecordChild1, // #1 = $Rn
     844             : /*1791*/          OPC_CheckType, MVT::i32,
     845             : /*1793*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     846             : /*1795*/          OPC_EmitConvertToTarget, 0,
     847             : /*1797*/          OPC_EmitInteger, MVT::i32, 14, 
     848             : /*1800*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     849             : /*1803*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     850             : /*1806*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNri), 0,
     851             :                       MVT::i32, 5/*#Ops*/, 1, 2, 3, 4, 5, 
     852             :                   // Src: (or:i32 (xor:i32 -1:i32, (imm:i32)<<P:Predicate_t2_so_imm>>:$imm), rGPR:i32:$Rn) - Complexity = 15
     853             :                   // Dst: (t2ORNri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
     854             : /*1817*/        0, /*End of Scope*/
     855             : /*1818*/      /*Scope*/ 31|128,1/*159*/, /*->1979*/
     856             : /*1820*/        OPC_RecordChild0, // #0 = $Rn
     857             : /*1821*/        OPC_Scope, 113, /*->1936*/ // 2 children in Scope
     858             : /*1823*/          OPC_RecordChild1, // #1 = $shift
     859             : /*1824*/          OPC_CheckType, MVT::i32,
     860             : /*1826*/          OPC_Scope, 26, /*->1854*/ // 4 children in Scope
     861             : /*1828*/            OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
     862             : /*1830*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // SelectImmShifterOperand:$shift #2 #3
     863             : /*1833*/            OPC_EmitInteger, MVT::i32, 14, 
     864             : /*1836*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     865             : /*1839*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     866             : /*1842*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::ORRrsi), 0,
     867             :                         MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
     868             :                     // Src: (or:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift) - Complexity = 12
     869             :                     // Dst: (ORRrsi:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift)
     870             : /*1854*/          /*Scope*/ 26, /*->1881*/
     871             : /*1855*/            OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     872             : /*1857*/            OPC_CheckComplexPat, /*CP*/0, /*#*/1, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
     873             : /*1860*/            OPC_EmitInteger, MVT::i32, 14, 
     874             : /*1863*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     875             : /*1866*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     876             : /*1869*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORRrs), 0,
     877             :                         MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
     878             :                     // Src: (or:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm) - Complexity = 12
     879             :                     // Dst: (t2ORRrs:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
     880             : /*1881*/          /*Scope*/ 26, /*->1908*/
     881             : /*1882*/            OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
     882             : /*1884*/            OPC_CheckComplexPat, /*CP*/2, /*#*/0, // SelectImmShifterOperand:$shift #2 #3
     883             : /*1887*/            OPC_EmitInteger, MVT::i32, 14, 
     884             : /*1890*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     885             : /*1893*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     886             : /*1896*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::ORRrsi), 0,
     887             :                         MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
     888             :                     // Src: (or:i32 so_reg_imm:i32:$shift, GPR:i32:$Rn) - Complexity = 12
     889             :                     // Dst: (ORRrsi:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift)
     890             : /*1908*/          /*Scope*/ 26, /*->1935*/
     891             : /*1909*/            OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     892             : /*1911*/            OPC_CheckComplexPat, /*CP*/0, /*#*/0, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
     893             : /*1914*/            OPC_EmitInteger, MVT::i32, 14, 
     894             : /*1917*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     895             : /*1920*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     896             : /*1923*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORRrs), 0,
     897             :                         MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
     898             :                     // Src: (or:i32 t2_so_reg:i32:$ShiftedRm, rGPR:i32:$Rn) - Complexity = 12
     899             :                     // Dst: (t2ORRrs:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
     900             : /*1935*/          0, /*End of Scope*/
     901             : /*1936*/        /*Scope*/ 41, /*->1978*/
     902             : /*1937*/          OPC_MoveChild1,
     903             : /*1938*/          OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
     904             : /*1941*/          OPC_RecordChild0, // #1 = $Rm
     905             : /*1942*/          OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
     906             : /*1953*/          OPC_MoveParent,
     907             : /*1954*/          OPC_CheckType, MVT::i32,
     908             : /*1956*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     909             : /*1958*/          OPC_EmitInteger, MVT::i32, 14, 
     910             : /*1961*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     911             : /*1964*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     912             : /*1967*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNrr), 0,
     913             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
     914             :                   // Src: (or:i32 rGPR:i32:$Rn, (xor:i32 rGPR:i32:$Rm, -1:i32)) - Complexity = 11
     915             :                   // Dst: (t2ORNrr:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)
     916             : /*1978*/        0, /*End of Scope*/
     917             : /*1979*/      /*Scope*/ 42, /*->2022*/
     918             : /*1980*/        OPC_MoveChild0,
     919             : /*1981*/        OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
     920             : /*1984*/        OPC_RecordChild0, // #0 = $Rm
     921             : /*1985*/        OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
     922             : /*1996*/        OPC_MoveParent,
     923             : /*1997*/        OPC_RecordChild1, // #1 = $Rn
     924             : /*1998*/        OPC_CheckType, MVT::i32,
     925             : /*2000*/        OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     926             : /*2002*/        OPC_EmitInteger, MVT::i32, 14, 
     927             : /*2005*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     928             : /*2008*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     929             : /*2011*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNrr), 0,
     930             :                     MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
     931             :                 // Src: (or:i32 (xor:i32 rGPR:i32:$Rm, -1:i32), rGPR:i32:$Rn) - Complexity = 11
     932             :                 // Dst: (t2ORNrr:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)
     933             : /*2022*/      /*Scope*/ 59, /*->2082*/
     934             : /*2023*/        OPC_CheckOrImm, 0|128,0|128,124|128,127|128,15/*4294901760*/, 
     935             : /*2029*/        OPC_RecordChild0, // #0 = $src
     936             : /*2030*/        OPC_CheckType, MVT::i32,
     937             : /*2032*/        OPC_Scope, 23, /*->2057*/ // 2 children in Scope
     938             : /*2034*/          OPC_CheckPatternPredicate, 3, // (Subtarget->hasV6T2Ops()) && (!Subtarget->isThumb())
     939             : /*2036*/          OPC_EmitInteger, MVT::i32, 127|128,127|128,3/*65535*/, 
     940             : /*2041*/          OPC_EmitInteger, MVT::i32, 14, 
     941             : /*2044*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     942             : /*2047*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVTi16), 0,
     943             :                       MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
     944             :                   // Src: (or:i32 GPR:i32:$src, 4294901760:i32) - Complexity = 8
     945             :                   // Dst: (MOVTi16:i32 GPR:i32:$src, 65535:i32)
     946             : /*2057*/        /*Scope*/ 23, /*->2081*/
     947             : /*2058*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     948             : /*2060*/          OPC_EmitInteger, MVT::i32, 127|128,127|128,3/*65535*/, 
     949             : /*2065*/          OPC_EmitInteger, MVT::i32, 14, 
     950             : /*2068*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     951             : /*2071*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2MOVTi16), 0,
     952             :                       MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
     953             :                   // Src: (or:i32 rGPR:i32:$src, 4294901760:i32) - Complexity = 8
     954             :                   // Dst: (t2MOVTi16:i32 rGPR:i32:$src, 65535:i32)
     955             : /*2081*/        0, /*End of Scope*/
     956             : /*2082*/      /*Scope*/ 50|128,1/*178*/, /*->2262*/
     957             : /*2084*/        OPC_RecordChild0, // #0 = $Rn
     958             : /*2085*/        OPC_RecordChild1, // #1 = $imm
     959             : /*2086*/        OPC_Scope, 99, /*->2187*/ // 2 children in Scope
     960             : /*2088*/          OPC_MoveChild1,
     961             : /*2089*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
     962             : /*2092*/          OPC_Scope, 29, /*->2123*/ // 3 children in Scope
     963             : /*2094*/            OPC_CheckPredicate, 7, // Predicate_mod_imm
     964             : /*2096*/            OPC_MoveParent,
     965             : /*2097*/            OPC_CheckType, MVT::i32,
     966             : /*2099*/            OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
     967             : /*2101*/            OPC_EmitConvertToTarget, 1,
     968             : /*2103*/            OPC_EmitInteger, MVT::i32, 14, 
     969             : /*2106*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     970             : /*2109*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     971             : /*2112*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::ORRri), 0,
     972             :                         MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
     973             :                     // Src: (or:i32 GPR:i32:$Rn, (imm:i32)<<P:Predicate_mod_imm>>:$imm) - Complexity = 7
     974             :                     // Dst: (ORRri:i32 GPR:i32:$Rn, (imm:i32):$imm)
     975             : /*2123*/          /*Scope*/ 29, /*->2153*/
     976             : /*2124*/            OPC_CheckPredicate, 6, // Predicate_t2_so_imm
     977             : /*2126*/            OPC_MoveParent,
     978             : /*2127*/            OPC_CheckType, MVT::i32,
     979             : /*2129*/            OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     980             : /*2131*/            OPC_EmitConvertToTarget, 1,
     981             : /*2133*/            OPC_EmitInteger, MVT::i32, 14, 
     982             : /*2136*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     983             : /*2139*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     984             : /*2142*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORRri), 0,
     985             :                         MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
     986             :                     // Src: (or:i32 rGPR:i32:$Rn, (imm:i32)<<P:Predicate_t2_so_imm>>:$imm) - Complexity = 7
     987             :                     // Dst: (t2ORRri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
     988             : /*2153*/          /*Scope*/ 32, /*->2186*/
     989             : /*2154*/            OPC_CheckPredicate, 8, // Predicate_t2_so_imm_not
     990             : /*2156*/            OPC_MoveParent,
     991             : /*2157*/            OPC_CheckType, MVT::i32,
     992             : /*2159*/            OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
     993             : /*2161*/            OPC_EmitConvertToTarget, 1,
     994             : /*2163*/            OPC_EmitNodeXForm, 1, 2, // t2_so_imm_not_XFORM
     995             : /*2166*/            OPC_EmitInteger, MVT::i32, 14, 
     996             : /*2169*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     997             : /*2172*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
     998             : /*2175*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORNri), 0,
     999             :                         MVT::i32, 5/*#Ops*/, 0, 3, 4, 5, 6, 
    1000             :                     // Src: (or:i32 rGPR:i32:$src, (imm:i32)<<P:Predicate_t2_so_imm_not>><<X:t2_so_imm_not_XFORM>>:$imm) - Complexity = 7
    1001             :                     // Dst: (t2ORNri:i32 rGPR:i32:$src, (t2_so_imm_not_XFORM:i32 (imm:i32)<<P:Predicate_t2_so_imm_not>>:$imm))
    1002             : /*2186*/          0, /*End of Scope*/
    1003             : /*2187*/        /*Scope*/ 73, /*->2261*/
    1004             : /*2188*/          OPC_CheckType, MVT::i32,
    1005             : /*2190*/          OPC_Scope, 22, /*->2214*/ // 3 children in Scope
    1006             : /*2192*/            OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    1007             : /*2194*/            OPC_EmitInteger, MVT::i32, 14, 
    1008             : /*2197*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1009             : /*2200*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1010             : /*2203*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::ORRrr), 0,
    1011             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1012             :                     // Src: (or:i32 GPR:i32:$Rn, GPR:i32:$Rm) - Complexity = 3
    1013             :                     // Dst: (ORRrr:i32 GPR:i32:$Rn, GPR:i32:$Rm)
    1014             : /*2214*/          /*Scope*/ 22, /*->2237*/
    1015             : /*2215*/            OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    1016             : /*2217*/            OPC_EmitRegister, MVT::i32, ARM::CPSR,
    1017             : /*2220*/            OPC_EmitInteger, MVT::i32, 14, 
    1018             : /*2223*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1019             : /*2226*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::tORR), 0,
    1020             :                         MVT::i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    1021             :                     // Src: (or:i32 tGPR:i32:$Rn, tGPR:i32:$Rm) - Complexity = 3
    1022             :                     // Dst: (tORR:i32 tGPR:i32:$Rn, tGPR:i32:$Rm)
    1023             : /*2237*/          /*Scope*/ 22, /*->2260*/
    1024             : /*2238*/            OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    1025             : /*2240*/            OPC_EmitInteger, MVT::i32, 14, 
    1026             : /*2243*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1027             : /*2246*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1028             : /*2249*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ORRrr), 0,
    1029             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1030             :                     // Src: (or:i32 rGPR:i32:$Rn, rGPR:i32:$Rm) - Complexity = 3
    1031             :                     // Dst: (t2ORRrr:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)
    1032             : /*2260*/          0, /*End of Scope*/
    1033             : /*2261*/        0, /*End of Scope*/
    1034             : /*2262*/      /*Scope*/ 126|128,22/*2942*/, /*->5206*/
    1035             : /*2264*/        OPC_MoveChild0,
    1036             : /*2265*/        OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1037             : /*2268*/        OPC_Scope, 13|128,5/*653*/, /*->2924*/ // 8 children in Scope
    1038             : /*2271*/          OPC_RecordChild0, // #0 = $Vn
    1039             : /*2272*/          OPC_Scope, 94|128,3/*478*/, /*->2753*/ // 2 children in Scope
    1040             : /*2275*/            OPC_RecordChild1, // #1 = $Vd
    1041             : /*2276*/            OPC_MoveParent,
    1042             : /*2277*/            OPC_MoveChild1,
    1043             : /*2278*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1044             : /*2281*/            OPC_Scope, 44|128,1/*172*/, /*->2456*/ // 4 children in Scope
    1045             : /*2284*/              OPC_RecordChild0, // #2 = $Vm
    1046             : /*2285*/              OPC_MoveChild1,
    1047             : /*2286*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1048             : /*2289*/              OPC_Scope, 119, /*->2410*/ // 2 children in Scope
    1049             : /*2291*/                OPC_CheckChild0Same, 1,
    1050             : /*2293*/                OPC_MoveChild1,
    1051             : /*2294*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1052             : /*2297*/                OPC_MoveChild0,
    1053             : /*2298*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1054             : /*2301*/                OPC_MoveChild0,
    1055             : /*2302*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1056             : /*2305*/                OPC_MoveParent,
    1057             : /*2306*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1058             : /*2308*/                OPC_SwitchType /*2 cases */, 48, MVT::v8i8,// ->2359
    1059             : /*2311*/                  OPC_MoveParent,
    1060             : /*2312*/                  OPC_MoveParent,
    1061             : /*2313*/                  OPC_MoveParent,
    1062             : /*2314*/                  OPC_MoveParent,
    1063             : /*2315*/                  OPC_SwitchType /*2 cases */, 19, MVT::v2i32,// ->2337
    1064             : /*2318*/                    OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1065             : /*2320*/                    OPC_EmitInteger, MVT::i32, 14, 
    1066             : /*2323*/                    OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1067             : /*2326*/                    OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1068             :                                 MVT::v2i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1069             :                             // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vd), (and:v2i32 DPR:v2i32:$Vm, (xor:v2i32 DPR:v2i32:$Vd, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)))) - Complexity = 22
    1070             :                             // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1071             : /*2337*/                  /*SwitchType*/ 19, MVT::v1i64,// ->2358
    1072             : /*2339*/                    OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1073             : /*2341*/                    OPC_EmitInteger, MVT::i32, 14, 
    1074             : /*2344*/                    OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1075             : /*2347*/                    OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1076             :                                 MVT::v1i64, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1077             :                             // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vd), (and:v1i64 DPR:v1i64:$Vm, (xor:v1i64 DPR:v1i64:$Vd, (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)))) - Complexity = 22
    1078             :                             // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1079             : /*2358*/                  0, // EndSwitchType
    1080             : /*2359*/                /*SwitchType*/ 48, MVT::v16i8,// ->2409
    1081             : /*2361*/                  OPC_MoveParent,
    1082             : /*2362*/                  OPC_MoveParent,
    1083             : /*2363*/                  OPC_MoveParent,
    1084             : /*2364*/                  OPC_MoveParent,
    1085             : /*2365*/                  OPC_SwitchType /*2 cases */, 19, MVT::v4i32,// ->2387
    1086             : /*2368*/                    OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1087             : /*2370*/                    OPC_EmitInteger, MVT::i32, 14, 
    1088             : /*2373*/                    OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1089             : /*2376*/                    OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    1090             :                                 MVT::v4i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1091             :                             // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vd), (and:v4i32 QPR:v4i32:$Vm, (xor:v4i32 QPR:v4i32:$Vd, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)))) - Complexity = 22
    1092             :                             // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    1093             : /*2387*/                  /*SwitchType*/ 19, MVT::v2i64,// ->2408
    1094             : /*2389*/                    OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1095             : /*2391*/                    OPC_EmitInteger, MVT::i32, 14, 
    1096             : /*2394*/                    OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1097             : /*2397*/                    OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    1098             :                                 MVT::v2i64, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1099             :                             // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vd), (and:v2i64 QPR:v2i64:$Vm, (xor:v2i64 QPR:v2i64:$Vd, (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)))) - Complexity = 22
    1100             :                             // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    1101             : /*2408*/                  0, // EndSwitchType
    1102             : /*2409*/                0, // EndSwitchType
    1103             : /*2410*/              /*Scope*/ 44, /*->2455*/
    1104             : /*2411*/                OPC_MoveChild0,
    1105             : /*2412*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1106             : /*2415*/                OPC_MoveChild0,
    1107             : /*2416*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1108             : /*2419*/                OPC_MoveChild0,
    1109             : /*2420*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1110             : /*2423*/                OPC_MoveParent,
    1111             : /*2424*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1112             : /*2426*/                OPC_CheckType, MVT::v8i8,
    1113             : /*2428*/                OPC_MoveParent,
    1114             : /*2429*/                OPC_MoveParent,
    1115             : /*2430*/                OPC_CheckChild1Same, 1,
    1116             : /*2432*/                OPC_MoveParent,
    1117             : /*2433*/                OPC_MoveParent,
    1118             : /*2434*/                OPC_CheckType, MVT::v2i32,
    1119             : /*2436*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1120             : /*2438*/                OPC_EmitInteger, MVT::i32, 14, 
    1121             : /*2441*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1122             : /*2444*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1123             :                             MVT::v2i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1124             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vd), (and:v2i32 DPR:v2i32:$Vm, (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vd))) - Complexity = 22
    1125             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1126             : /*2455*/              0, /*End of Scope*/
    1127             : /*2456*/            /*Scope*/ 98, /*->2555*/
    1128             : /*2457*/              OPC_MoveChild0,
    1129             : /*2458*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1130             : /*2461*/              OPC_Scope, 45, /*->2508*/ // 2 children in Scope
    1131             : /*2463*/                OPC_CheckChild0Same, 1,
    1132             : /*2465*/                OPC_MoveChild1,
    1133             : /*2466*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1134             : /*2469*/                OPC_MoveChild0,
    1135             : /*2470*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1136             : /*2473*/                OPC_MoveChild0,
    1137             : /*2474*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1138             : /*2477*/                OPC_MoveParent,
    1139             : /*2478*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1140             : /*2480*/                OPC_CheckType, MVT::v8i8,
    1141             : /*2482*/                OPC_MoveParent,
    1142             : /*2483*/                OPC_MoveParent,
    1143             : /*2484*/                OPC_MoveParent,
    1144             : /*2485*/                OPC_RecordChild1, // #2 = $Vm
    1145             : /*2486*/                OPC_MoveParent,
    1146             : /*2487*/                OPC_CheckType, MVT::v2i32,
    1147             : /*2489*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1148             : /*2491*/                OPC_EmitInteger, MVT::i32, 14, 
    1149             : /*2494*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1150             : /*2497*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1151             :                             MVT::v2i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1152             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vd), (and:v2i32 (xor:v2i32 DPR:v2i32:$Vd, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v2i32:$Vm)) - Complexity = 22
    1153             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1154             : /*2508*/              /*Scope*/ 45, /*->2554*/
    1155             : /*2509*/                OPC_MoveChild0,
    1156             : /*2510*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1157             : /*2513*/                OPC_MoveChild0,
    1158             : /*2514*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1159             : /*2517*/                OPC_MoveChild0,
    1160             : /*2518*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1161             : /*2521*/                OPC_MoveParent,
    1162             : /*2522*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1163             : /*2524*/                OPC_CheckType, MVT::v8i8,
    1164             : /*2526*/                OPC_MoveParent,
    1165             : /*2527*/                OPC_MoveParent,
    1166             : /*2528*/                OPC_CheckChild1Same, 1,
    1167             : /*2530*/                OPC_MoveParent,
    1168             : /*2531*/                OPC_RecordChild1, // #2 = $Vm
    1169             : /*2532*/                OPC_MoveParent,
    1170             : /*2533*/                OPC_CheckType, MVT::v2i32,
    1171             : /*2535*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1172             : /*2537*/                OPC_EmitInteger, MVT::i32, 14, 
    1173             : /*2540*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1174             : /*2543*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1175             :                             MVT::v2i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1176             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vd), (and:v2i32 (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vd), DPR:v2i32:$Vm)) - Complexity = 22
    1177             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1178             : /*2554*/              0, /*End of Scope*/
    1179             : /*2555*/            /*Scope*/ 97, /*->2653*/
    1180             : /*2556*/              OPC_RecordChild0, // #2 = $Vm
    1181             : /*2557*/              OPC_MoveChild1,
    1182             : /*2558*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1183             : /*2561*/              OPC_Scope, 44, /*->2607*/ // 2 children in Scope
    1184             : /*2563*/                OPC_CheckChild0Same, 0,
    1185             : /*2565*/                OPC_MoveChild1,
    1186             : /*2566*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1187             : /*2569*/                OPC_MoveChild0,
    1188             : /*2570*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1189             : /*2573*/                OPC_MoveChild0,
    1190             : /*2574*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1191             : /*2577*/                OPC_MoveParent,
    1192             : /*2578*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1193             : /*2580*/                OPC_CheckType, MVT::v8i8,
    1194             : /*2582*/                OPC_MoveParent,
    1195             : /*2583*/                OPC_MoveParent,
    1196             : /*2584*/                OPC_MoveParent,
    1197             : /*2585*/                OPC_MoveParent,
    1198             : /*2586*/                OPC_CheckType, MVT::v2i32,
    1199             : /*2588*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1200             : /*2590*/                OPC_EmitInteger, MVT::i32, 14, 
    1201             : /*2593*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1202             : /*2596*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1203             :                             MVT::v2i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1204             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn), (and:v2i32 DPR:v2i32:$Vm, (xor:v2i32 DPR:v2i32:$Vd, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)))) - Complexity = 22
    1205             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1206             : /*2607*/              /*Scope*/ 44, /*->2652*/
    1207             : /*2608*/                OPC_MoveChild0,
    1208             : /*2609*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1209             : /*2612*/                OPC_MoveChild0,
    1210             : /*2613*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1211             : /*2616*/                OPC_MoveChild0,
    1212             : /*2617*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1213             : /*2620*/                OPC_MoveParent,
    1214             : /*2621*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1215             : /*2623*/                OPC_CheckType, MVT::v8i8,
    1216             : /*2625*/                OPC_MoveParent,
    1217             : /*2626*/                OPC_MoveParent,
    1218             : /*2627*/                OPC_CheckChild1Same, 0,
    1219             : /*2629*/                OPC_MoveParent,
    1220             : /*2630*/                OPC_MoveParent,
    1221             : /*2631*/                OPC_CheckType, MVT::v2i32,
    1222             : /*2633*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1223             : /*2635*/                OPC_EmitInteger, MVT::i32, 14, 
    1224             : /*2638*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1225             : /*2641*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1226             :                             MVT::v2i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1227             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn), (and:v2i32 DPR:v2i32:$Vm, (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vd))) - Complexity = 22
    1228             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1229             : /*2652*/              0, /*End of Scope*/
    1230             : /*2653*/            /*Scope*/ 98, /*->2752*/
    1231             : /*2654*/              OPC_MoveChild0,
    1232             : /*2655*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1233             : /*2658*/              OPC_Scope, 45, /*->2705*/ // 2 children in Scope
    1234             : /*2660*/                OPC_CheckChild0Same, 0,
    1235             : /*2662*/                OPC_MoveChild1,
    1236             : /*2663*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1237             : /*2666*/                OPC_MoveChild0,
    1238             : /*2667*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1239             : /*2670*/                OPC_MoveChild0,
    1240             : /*2671*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1241             : /*2674*/                OPC_MoveParent,
    1242             : /*2675*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1243             : /*2677*/                OPC_CheckType, MVT::v8i8,
    1244             : /*2679*/                OPC_MoveParent,
    1245             : /*2680*/                OPC_MoveParent,
    1246             : /*2681*/                OPC_MoveParent,
    1247             : /*2682*/                OPC_RecordChild1, // #2 = $Vm
    1248             : /*2683*/                OPC_MoveParent,
    1249             : /*2684*/                OPC_CheckType, MVT::v2i32,
    1250             : /*2686*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1251             : /*2688*/                OPC_EmitInteger, MVT::i32, 14, 
    1252             : /*2691*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1253             : /*2694*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1254             :                             MVT::v2i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1255             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn), (and:v2i32 (xor:v2i32 DPR:v2i32:$Vd, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v2i32:$Vm)) - Complexity = 22
    1256             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1257             : /*2705*/              /*Scope*/ 45, /*->2751*/
    1258             : /*2706*/                OPC_MoveChild0,
    1259             : /*2707*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1260             : /*2710*/                OPC_MoveChild0,
    1261             : /*2711*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1262             : /*2714*/                OPC_MoveChild0,
    1263             : /*2715*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1264             : /*2718*/                OPC_MoveParent,
    1265             : /*2719*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1266             : /*2721*/                OPC_CheckType, MVT::v8i8,
    1267             : /*2723*/                OPC_MoveParent,
    1268             : /*2724*/                OPC_MoveParent,
    1269             : /*2725*/                OPC_CheckChild1Same, 0,
    1270             : /*2727*/                OPC_MoveParent,
    1271             : /*2728*/                OPC_RecordChild1, // #2 = $Vm
    1272             : /*2729*/                OPC_MoveParent,
    1273             : /*2730*/                OPC_CheckType, MVT::v2i32,
    1274             : /*2732*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1275             : /*2734*/                OPC_EmitInteger, MVT::i32, 14, 
    1276             : /*2737*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1277             : /*2740*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1278             :                             MVT::v2i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1279             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn), (and:v2i32 (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vd), DPR:v2i32:$Vm)) - Complexity = 22
    1280             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1281             : /*2751*/              0, /*End of Scope*/
    1282             : /*2752*/            0, /*End of Scope*/
    1283             : /*2753*/          /*Scope*/ 40|128,1/*168*/, /*->2923*/
    1284             : /*2755*/            OPC_MoveChild1,
    1285             : /*2756*/            OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1286             : /*2759*/            OPC_Scope, 80, /*->2841*/ // 2 children in Scope
    1287             : /*2761*/              OPC_RecordChild0, // #1 = $Vd
    1288             : /*2762*/              OPC_MoveChild1,
    1289             : /*2763*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1290             : /*2766*/              OPC_MoveChild0,
    1291             : /*2767*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1292             : /*2770*/              OPC_MoveChild0,
    1293             : /*2771*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1294             : /*2774*/              OPC_MoveParent,
    1295             : /*2775*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1296             : /*2777*/              OPC_CheckType, MVT::v8i8,
    1297             : /*2779*/              OPC_MoveParent,
    1298             : /*2780*/              OPC_MoveParent,
    1299             : /*2781*/              OPC_MoveParent,
    1300             : /*2782*/              OPC_MoveParent,
    1301             : /*2783*/              OPC_MoveChild1,
    1302             : /*2784*/              OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1303             : /*2787*/              OPC_Scope, 25, /*->2814*/ // 2 children in Scope
    1304             : /*2789*/                OPC_RecordChild0, // #2 = $Vn
    1305             : /*2790*/                OPC_CheckChild1Same, 1,
    1306             : /*2792*/                OPC_MoveParent,
    1307             : /*2793*/                OPC_CheckType, MVT::v2i32,
    1308             : /*2795*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1309             : /*2797*/                OPC_EmitInteger, MVT::i32, 14, 
    1310             : /*2800*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1311             : /*2803*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1312             :                             MVT::v2i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    1313             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vm, (xor:v2i32 DPR:v2i32:$Vd, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))), (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vd)) - Complexity = 22
    1314             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1315             : /*2814*/              /*Scope*/ 25, /*->2840*/
    1316             : /*2815*/                OPC_CheckChild0Same, 1,
    1317             : /*2817*/                OPC_RecordChild1, // #2 = $Vn
    1318             : /*2818*/                OPC_MoveParent,
    1319             : /*2819*/                OPC_CheckType, MVT::v2i32,
    1320             : /*2821*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1321             : /*2823*/                OPC_EmitInteger, MVT::i32, 14, 
    1322             : /*2826*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1323             : /*2829*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1324             :                             MVT::v2i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    1325             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vm, (xor:v2i32 DPR:v2i32:$Vd, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))), (and:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn)) - Complexity = 22
    1326             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1327             : /*2840*/              0, /*End of Scope*/
    1328             : /*2841*/            /*Scope*/ 80, /*->2922*/
    1329             : /*2842*/              OPC_MoveChild0,
    1330             : /*2843*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1331             : /*2846*/              OPC_MoveChild0,
    1332             : /*2847*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1333             : /*2850*/              OPC_MoveChild0,
    1334             : /*2851*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1335             : /*2854*/              OPC_MoveParent,
    1336             : /*2855*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1337             : /*2857*/              OPC_CheckType, MVT::v8i8,
    1338             : /*2859*/              OPC_MoveParent,
    1339             : /*2860*/              OPC_MoveParent,
    1340             : /*2861*/              OPC_RecordChild1, // #1 = $Vd
    1341             : /*2862*/              OPC_MoveParent,
    1342             : /*2863*/              OPC_MoveParent,
    1343             : /*2864*/              OPC_MoveChild1,
    1344             : /*2865*/              OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1345             : /*2868*/              OPC_Scope, 25, /*->2895*/ // 2 children in Scope
    1346             : /*2870*/                OPC_RecordChild0, // #2 = $Vn
    1347             : /*2871*/                OPC_CheckChild1Same, 1,
    1348             : /*2873*/                OPC_MoveParent,
    1349             : /*2874*/                OPC_CheckType, MVT::v2i32,
    1350             : /*2876*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1351             : /*2878*/                OPC_EmitInteger, MVT::i32, 14, 
    1352             : /*2881*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1353             : /*2884*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1354             :                             MVT::v2i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    1355             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vm, (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vd)), (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vd)) - Complexity = 22
    1356             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1357             : /*2895*/              /*Scope*/ 25, /*->2921*/
    1358             : /*2896*/                OPC_CheckChild0Same, 1,
    1359             : /*2898*/                OPC_RecordChild1, // #2 = $Vn
    1360             : /*2899*/                OPC_MoveParent,
    1361             : /*2900*/                OPC_CheckType, MVT::v2i32,
    1362             : /*2902*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1363             : /*2904*/                OPC_EmitInteger, MVT::i32, 14, 
    1364             : /*2907*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1365             : /*2910*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1366             :                             MVT::v2i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    1367             :                         // Src: (or:v2i32 (and:v2i32 DPR:v2i32:$Vm, (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vd)), (and:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn)) - Complexity = 22
    1368             :                         // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1369             : /*2921*/              0, /*End of Scope*/
    1370             : /*2922*/            0, /*End of Scope*/
    1371             : /*2923*/          0, /*End of Scope*/
    1372             : /*2924*/        /*Scope*/ 42|128,1/*170*/, /*->3096*/
    1373             : /*2926*/          OPC_MoveChild0,
    1374             : /*2927*/          OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1375             : /*2930*/          OPC_Scope, 81, /*->3013*/ // 2 children in Scope
    1376             : /*2932*/            OPC_RecordChild0, // #0 = $Vd
    1377             : /*2933*/            OPC_MoveChild1,
    1378             : /*2934*/            OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1379             : /*2937*/            OPC_MoveChild0,
    1380             : /*2938*/            OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1381             : /*2941*/            OPC_MoveChild0,
    1382             : /*2942*/            OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1383             : /*2945*/            OPC_MoveParent,
    1384             : /*2946*/            OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1385             : /*2948*/            OPC_CheckType, MVT::v8i8,
    1386             : /*2950*/            OPC_MoveParent,
    1387             : /*2951*/            OPC_MoveParent,
    1388             : /*2952*/            OPC_MoveParent,
    1389             : /*2953*/            OPC_RecordChild1, // #1 = $Vm
    1390             : /*2954*/            OPC_MoveParent,
    1391             : /*2955*/            OPC_MoveChild1,
    1392             : /*2956*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1393             : /*2959*/            OPC_Scope, 25, /*->2986*/ // 2 children in Scope
    1394             : /*2961*/              OPC_RecordChild0, // #2 = $Vn
    1395             : /*2962*/              OPC_CheckChild1Same, 0,
    1396             : /*2964*/              OPC_MoveParent,
    1397             : /*2965*/              OPC_CheckType, MVT::v2i32,
    1398             : /*2967*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1399             : /*2969*/              OPC_EmitInteger, MVT::i32, 14, 
    1400             : /*2972*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1401             : /*2975*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1402             :                           MVT::v2i32, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    1403             :                       // Src: (or:v2i32 (and:v2i32 (xor:v2i32 DPR:v2i32:$Vd, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v2i32:$Vm), (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vd)) - Complexity = 22
    1404             :                       // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1405             : /*2986*/            /*Scope*/ 25, /*->3012*/
    1406             : /*2987*/              OPC_CheckChild0Same, 0,
    1407             : /*2989*/              OPC_RecordChild1, // #2 = $Vn
    1408             : /*2990*/              OPC_MoveParent,
    1409             : /*2991*/              OPC_CheckType, MVT::v2i32,
    1410             : /*2993*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1411             : /*2995*/              OPC_EmitInteger, MVT::i32, 14, 
    1412             : /*2998*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1413             : /*3001*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1414             :                           MVT::v2i32, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    1415             :                       // Src: (or:v2i32 (and:v2i32 (xor:v2i32 DPR:v2i32:$Vd, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v2i32:$Vm), (and:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn)) - Complexity = 22
    1416             :                       // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1417             : /*3012*/            0, /*End of Scope*/
    1418             : /*3013*/          /*Scope*/ 81, /*->3095*/
    1419             : /*3014*/            OPC_MoveChild0,
    1420             : /*3015*/            OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1421             : /*3018*/            OPC_MoveChild0,
    1422             : /*3019*/            OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1423             : /*3022*/            OPC_MoveChild0,
    1424             : /*3023*/            OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1425             : /*3026*/            OPC_MoveParent,
    1426             : /*3027*/            OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1427             : /*3029*/            OPC_CheckType, MVT::v8i8,
    1428             : /*3031*/            OPC_MoveParent,
    1429             : /*3032*/            OPC_MoveParent,
    1430             : /*3033*/            OPC_RecordChild1, // #0 = $Vd
    1431             : /*3034*/            OPC_MoveParent,
    1432             : /*3035*/            OPC_RecordChild1, // #1 = $Vm
    1433             : /*3036*/            OPC_MoveParent,
    1434             : /*3037*/            OPC_MoveChild1,
    1435             : /*3038*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1436             : /*3041*/            OPC_Scope, 25, /*->3068*/ // 2 children in Scope
    1437             : /*3043*/              OPC_RecordChild0, // #2 = $Vn
    1438             : /*3044*/              OPC_CheckChild1Same, 0,
    1439             : /*3046*/              OPC_MoveParent,
    1440             : /*3047*/              OPC_CheckType, MVT::v2i32,
    1441             : /*3049*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1442             : /*3051*/              OPC_EmitInteger, MVT::i32, 14, 
    1443             : /*3054*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1444             : /*3057*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1445             :                           MVT::v2i32, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    1446             :                       // Src: (or:v2i32 (and:v2i32 (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vd), DPR:v2i32:$Vm), (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vd)) - Complexity = 22
    1447             :                       // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1448             : /*3068*/            /*Scope*/ 25, /*->3094*/
    1449             : /*3069*/              OPC_CheckChild0Same, 0,
    1450             : /*3071*/              OPC_RecordChild1, // #2 = $Vn
    1451             : /*3072*/              OPC_MoveParent,
    1452             : /*3073*/              OPC_CheckType, MVT::v2i32,
    1453             : /*3075*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1454             : /*3077*/              OPC_EmitInteger, MVT::i32, 14, 
    1455             : /*3080*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1456             : /*3083*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1457             :                           MVT::v2i32, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    1458             :                       // Src: (or:v2i32 (and:v2i32 (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vd), DPR:v2i32:$Vm), (and:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn)) - Complexity = 22
    1459             :                       // Dst: (VBSLd:v2i32 DPR:v2i32:$Vd, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    1460             : /*3094*/            0, /*End of Scope*/
    1461             : /*3095*/          0, /*End of Scope*/
    1462             : /*3096*/        /*Scope*/ 17|128,4/*529*/, /*->3627*/
    1463             : /*3098*/          OPC_RecordChild0, // #0 = $Vn
    1464             : /*3099*/          OPC_Scope, 98|128,2/*354*/, /*->3456*/ // 2 children in Scope
    1465             : /*3102*/            OPC_RecordChild1, // #1 = $Vd
    1466             : /*3103*/            OPC_MoveParent,
    1467             : /*3104*/            OPC_MoveChild1,
    1468             : /*3105*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1469             : /*3108*/            OPC_Scope, 49, /*->3159*/ // 4 children in Scope
    1470             : /*3110*/              OPC_RecordChild0, // #2 = $Vm
    1471             : /*3111*/              OPC_MoveChild1,
    1472             : /*3112*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1473             : /*3115*/              OPC_MoveChild0,
    1474             : /*3116*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1475             : /*3119*/              OPC_MoveChild0,
    1476             : /*3120*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1477             : /*3123*/              OPC_MoveChild0,
    1478             : /*3124*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1479             : /*3127*/              OPC_MoveParent,
    1480             : /*3128*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1481             : /*3130*/              OPC_CheckType, MVT::v8i8,
    1482             : /*3132*/              OPC_MoveParent,
    1483             : /*3133*/              OPC_MoveParent,
    1484             : /*3134*/              OPC_CheckChild1Same, 1,
    1485             : /*3136*/              OPC_MoveParent,
    1486             : /*3137*/              OPC_MoveParent,
    1487             : /*3138*/              OPC_CheckType, MVT::v1i64,
    1488             : /*3140*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1489             : /*3142*/              OPC_EmitInteger, MVT::i32, 14, 
    1490             : /*3145*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1491             : /*3148*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1492             :                           MVT::v1i64, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1493             :                       // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vd), (and:v1i64 DPR:v1i64:$Vm, (xor:v1i64 (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v1i64:$Vd))) - Complexity = 22
    1494             :                       // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1495             : /*3159*/            /*Scope*/ 98, /*->3258*/
    1496             : /*3160*/              OPC_MoveChild0,
    1497             : /*3161*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1498             : /*3164*/              OPC_Scope, 45, /*->3211*/ // 2 children in Scope
    1499             : /*3166*/                OPC_CheckChild0Same, 1,
    1500             : /*3168*/                OPC_MoveChild1,
    1501             : /*3169*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1502             : /*3172*/                OPC_MoveChild0,
    1503             : /*3173*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1504             : /*3176*/                OPC_MoveChild0,
    1505             : /*3177*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1506             : /*3180*/                OPC_MoveParent,
    1507             : /*3181*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1508             : /*3183*/                OPC_CheckType, MVT::v8i8,
    1509             : /*3185*/                OPC_MoveParent,
    1510             : /*3186*/                OPC_MoveParent,
    1511             : /*3187*/                OPC_MoveParent,
    1512             : /*3188*/                OPC_RecordChild1, // #2 = $Vm
    1513             : /*3189*/                OPC_MoveParent,
    1514             : /*3190*/                OPC_CheckType, MVT::v1i64,
    1515             : /*3192*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1516             : /*3194*/                OPC_EmitInteger, MVT::i32, 14, 
    1517             : /*3197*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1518             : /*3200*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1519             :                             MVT::v1i64, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1520             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vd), (and:v1i64 (xor:v1i64 DPR:v1i64:$Vd, (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v1i64:$Vm)) - Complexity = 22
    1521             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1522             : /*3211*/              /*Scope*/ 45, /*->3257*/
    1523             : /*3212*/                OPC_MoveChild0,
    1524             : /*3213*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1525             : /*3216*/                OPC_MoveChild0,
    1526             : /*3217*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1527             : /*3220*/                OPC_MoveChild0,
    1528             : /*3221*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1529             : /*3224*/                OPC_MoveParent,
    1530             : /*3225*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1531             : /*3227*/                OPC_CheckType, MVT::v8i8,
    1532             : /*3229*/                OPC_MoveParent,
    1533             : /*3230*/                OPC_MoveParent,
    1534             : /*3231*/                OPC_CheckChild1Same, 1,
    1535             : /*3233*/                OPC_MoveParent,
    1536             : /*3234*/                OPC_RecordChild1, // #2 = $Vm
    1537             : /*3235*/                OPC_MoveParent,
    1538             : /*3236*/                OPC_CheckType, MVT::v1i64,
    1539             : /*3238*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1540             : /*3240*/                OPC_EmitInteger, MVT::i32, 14, 
    1541             : /*3243*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1542             : /*3246*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1543             :                             MVT::v1i64, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1544             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vd), (and:v1i64 (xor:v1i64 (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v1i64:$Vd), DPR:v1i64:$Vm)) - Complexity = 22
    1545             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1546             : /*3257*/              0, /*End of Scope*/
    1547             : /*3258*/            /*Scope*/ 97, /*->3356*/
    1548             : /*3259*/              OPC_RecordChild0, // #2 = $Vm
    1549             : /*3260*/              OPC_MoveChild1,
    1550             : /*3261*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1551             : /*3264*/              OPC_Scope, 44, /*->3310*/ // 2 children in Scope
    1552             : /*3266*/                OPC_CheckChild0Same, 0,
    1553             : /*3268*/                OPC_MoveChild1,
    1554             : /*3269*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1555             : /*3272*/                OPC_MoveChild0,
    1556             : /*3273*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1557             : /*3276*/                OPC_MoveChild0,
    1558             : /*3277*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1559             : /*3280*/                OPC_MoveParent,
    1560             : /*3281*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1561             : /*3283*/                OPC_CheckType, MVT::v8i8,
    1562             : /*3285*/                OPC_MoveParent,
    1563             : /*3286*/                OPC_MoveParent,
    1564             : /*3287*/                OPC_MoveParent,
    1565             : /*3288*/                OPC_MoveParent,
    1566             : /*3289*/                OPC_CheckType, MVT::v1i64,
    1567             : /*3291*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1568             : /*3293*/                OPC_EmitInteger, MVT::i32, 14, 
    1569             : /*3296*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1570             : /*3299*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1571             :                             MVT::v1i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1572             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn), (and:v1i64 DPR:v1i64:$Vm, (xor:v1i64 DPR:v1i64:$Vd, (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)))) - Complexity = 22
    1573             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1574             : /*3310*/              /*Scope*/ 44, /*->3355*/
    1575             : /*3311*/                OPC_MoveChild0,
    1576             : /*3312*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1577             : /*3315*/                OPC_MoveChild0,
    1578             : /*3316*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1579             : /*3319*/                OPC_MoveChild0,
    1580             : /*3320*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1581             : /*3323*/                OPC_MoveParent,
    1582             : /*3324*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1583             : /*3326*/                OPC_CheckType, MVT::v8i8,
    1584             : /*3328*/                OPC_MoveParent,
    1585             : /*3329*/                OPC_MoveParent,
    1586             : /*3330*/                OPC_CheckChild1Same, 0,
    1587             : /*3332*/                OPC_MoveParent,
    1588             : /*3333*/                OPC_MoveParent,
    1589             : /*3334*/                OPC_CheckType, MVT::v1i64,
    1590             : /*3336*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1591             : /*3338*/                OPC_EmitInteger, MVT::i32, 14, 
    1592             : /*3341*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1593             : /*3344*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1594             :                             MVT::v1i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1595             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn), (and:v1i64 DPR:v1i64:$Vm, (xor:v1i64 (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v1i64:$Vd))) - Complexity = 22
    1596             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1597             : /*3355*/              0, /*End of Scope*/
    1598             : /*3356*/            /*Scope*/ 98, /*->3455*/
    1599             : /*3357*/              OPC_MoveChild0,
    1600             : /*3358*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1601             : /*3361*/              OPC_Scope, 45, /*->3408*/ // 2 children in Scope
    1602             : /*3363*/                OPC_CheckChild0Same, 0,
    1603             : /*3365*/                OPC_MoveChild1,
    1604             : /*3366*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1605             : /*3369*/                OPC_MoveChild0,
    1606             : /*3370*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1607             : /*3373*/                OPC_MoveChild0,
    1608             : /*3374*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1609             : /*3377*/                OPC_MoveParent,
    1610             : /*3378*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1611             : /*3380*/                OPC_CheckType, MVT::v8i8,
    1612             : /*3382*/                OPC_MoveParent,
    1613             : /*3383*/                OPC_MoveParent,
    1614             : /*3384*/                OPC_MoveParent,
    1615             : /*3385*/                OPC_RecordChild1, // #2 = $Vm
    1616             : /*3386*/                OPC_MoveParent,
    1617             : /*3387*/                OPC_CheckType, MVT::v1i64,
    1618             : /*3389*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1619             : /*3391*/                OPC_EmitInteger, MVT::i32, 14, 
    1620             : /*3394*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1621             : /*3397*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1622             :                             MVT::v1i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1623             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn), (and:v1i64 (xor:v1i64 DPR:v1i64:$Vd, (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v1i64:$Vm)) - Complexity = 22
    1624             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1625             : /*3408*/              /*Scope*/ 45, /*->3454*/
    1626             : /*3409*/                OPC_MoveChild0,
    1627             : /*3410*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1628             : /*3413*/                OPC_MoveChild0,
    1629             : /*3414*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1630             : /*3417*/                OPC_MoveChild0,
    1631             : /*3418*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1632             : /*3421*/                OPC_MoveParent,
    1633             : /*3422*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1634             : /*3424*/                OPC_CheckType, MVT::v8i8,
    1635             : /*3426*/                OPC_MoveParent,
    1636             : /*3427*/                OPC_MoveParent,
    1637             : /*3428*/                OPC_CheckChild1Same, 0,
    1638             : /*3430*/                OPC_MoveParent,
    1639             : /*3431*/                OPC_RecordChild1, // #2 = $Vm
    1640             : /*3432*/                OPC_MoveParent,
    1641             : /*3433*/                OPC_CheckType, MVT::v1i64,
    1642             : /*3435*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1643             : /*3437*/                OPC_EmitInteger, MVT::i32, 14, 
    1644             : /*3440*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1645             : /*3443*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1646             :                             MVT::v1i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1647             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn), (and:v1i64 (xor:v1i64 (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v1i64:$Vd), DPR:v1i64:$Vm)) - Complexity = 22
    1648             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1649             : /*3454*/              0, /*End of Scope*/
    1650             : /*3455*/            0, /*End of Scope*/
    1651             : /*3456*/          /*Scope*/ 40|128,1/*168*/, /*->3626*/
    1652             : /*3458*/            OPC_MoveChild1,
    1653             : /*3459*/            OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1654             : /*3462*/            OPC_Scope, 80, /*->3544*/ // 2 children in Scope
    1655             : /*3464*/              OPC_RecordChild0, // #1 = $Vd
    1656             : /*3465*/              OPC_MoveChild1,
    1657             : /*3466*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1658             : /*3469*/              OPC_MoveChild0,
    1659             : /*3470*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1660             : /*3473*/              OPC_MoveChild0,
    1661             : /*3474*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1662             : /*3477*/              OPC_MoveParent,
    1663             : /*3478*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1664             : /*3480*/              OPC_CheckType, MVT::v8i8,
    1665             : /*3482*/              OPC_MoveParent,
    1666             : /*3483*/              OPC_MoveParent,
    1667             : /*3484*/              OPC_MoveParent,
    1668             : /*3485*/              OPC_MoveParent,
    1669             : /*3486*/              OPC_MoveChild1,
    1670             : /*3487*/              OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1671             : /*3490*/              OPC_Scope, 25, /*->3517*/ // 2 children in Scope
    1672             : /*3492*/                OPC_RecordChild0, // #2 = $Vn
    1673             : /*3493*/                OPC_CheckChild1Same, 1,
    1674             : /*3495*/                OPC_MoveParent,
    1675             : /*3496*/                OPC_CheckType, MVT::v1i64,
    1676             : /*3498*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1677             : /*3500*/                OPC_EmitInteger, MVT::i32, 14, 
    1678             : /*3503*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1679             : /*3506*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1680             :                             MVT::v1i64, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    1681             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vm, (xor:v1i64 DPR:v1i64:$Vd, (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))), (and:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vd)) - Complexity = 22
    1682             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1683             : /*3517*/              /*Scope*/ 25, /*->3543*/
    1684             : /*3518*/                OPC_CheckChild0Same, 1,
    1685             : /*3520*/                OPC_RecordChild1, // #2 = $Vn
    1686             : /*3521*/                OPC_MoveParent,
    1687             : /*3522*/                OPC_CheckType, MVT::v1i64,
    1688             : /*3524*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1689             : /*3526*/                OPC_EmitInteger, MVT::i32, 14, 
    1690             : /*3529*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1691             : /*3532*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1692             :                             MVT::v1i64, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    1693             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vm, (xor:v1i64 DPR:v1i64:$Vd, (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))), (and:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn)) - Complexity = 22
    1694             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1695             : /*3543*/              0, /*End of Scope*/
    1696             : /*3544*/            /*Scope*/ 80, /*->3625*/
    1697             : /*3545*/              OPC_MoveChild0,
    1698             : /*3546*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1699             : /*3549*/              OPC_MoveChild0,
    1700             : /*3550*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1701             : /*3553*/              OPC_MoveChild0,
    1702             : /*3554*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1703             : /*3557*/              OPC_MoveParent,
    1704             : /*3558*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1705             : /*3560*/              OPC_CheckType, MVT::v8i8,
    1706             : /*3562*/              OPC_MoveParent,
    1707             : /*3563*/              OPC_MoveParent,
    1708             : /*3564*/              OPC_RecordChild1, // #1 = $Vd
    1709             : /*3565*/              OPC_MoveParent,
    1710             : /*3566*/              OPC_MoveParent,
    1711             : /*3567*/              OPC_MoveChild1,
    1712             : /*3568*/              OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1713             : /*3571*/              OPC_Scope, 25, /*->3598*/ // 2 children in Scope
    1714             : /*3573*/                OPC_RecordChild0, // #2 = $Vn
    1715             : /*3574*/                OPC_CheckChild1Same, 1,
    1716             : /*3576*/                OPC_MoveParent,
    1717             : /*3577*/                OPC_CheckType, MVT::v1i64,
    1718             : /*3579*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1719             : /*3581*/                OPC_EmitInteger, MVT::i32, 14, 
    1720             : /*3584*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1721             : /*3587*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1722             :                             MVT::v1i64, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    1723             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vm, (xor:v1i64 (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v1i64:$Vd)), (and:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vd)) - Complexity = 22
    1724             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1725             : /*3598*/              /*Scope*/ 25, /*->3624*/
    1726             : /*3599*/                OPC_CheckChild0Same, 1,
    1727             : /*3601*/                OPC_RecordChild1, // #2 = $Vn
    1728             : /*3602*/                OPC_MoveParent,
    1729             : /*3603*/                OPC_CheckType, MVT::v1i64,
    1730             : /*3605*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1731             : /*3607*/                OPC_EmitInteger, MVT::i32, 14, 
    1732             : /*3610*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1733             : /*3613*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1734             :                             MVT::v1i64, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    1735             :                         // Src: (or:v1i64 (and:v1i64 DPR:v1i64:$Vm, (xor:v1i64 (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v1i64:$Vd)), (and:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn)) - Complexity = 22
    1736             :                         // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1737             : /*3624*/              0, /*End of Scope*/
    1738             : /*3625*/            0, /*End of Scope*/
    1739             : /*3626*/          0, /*End of Scope*/
    1740             : /*3627*/        /*Scope*/ 42|128,1/*170*/, /*->3799*/
    1741             : /*3629*/          OPC_MoveChild0,
    1742             : /*3630*/          OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1743             : /*3633*/          OPC_Scope, 81, /*->3716*/ // 2 children in Scope
    1744             : /*3635*/            OPC_RecordChild0, // #0 = $Vd
    1745             : /*3636*/            OPC_MoveChild1,
    1746             : /*3637*/            OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1747             : /*3640*/            OPC_MoveChild0,
    1748             : /*3641*/            OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1749             : /*3644*/            OPC_MoveChild0,
    1750             : /*3645*/            OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1751             : /*3648*/            OPC_MoveParent,
    1752             : /*3649*/            OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1753             : /*3651*/            OPC_CheckType, MVT::v8i8,
    1754             : /*3653*/            OPC_MoveParent,
    1755             : /*3654*/            OPC_MoveParent,
    1756             : /*3655*/            OPC_MoveParent,
    1757             : /*3656*/            OPC_RecordChild1, // #1 = $Vm
    1758             : /*3657*/            OPC_MoveParent,
    1759             : /*3658*/            OPC_MoveChild1,
    1760             : /*3659*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1761             : /*3662*/            OPC_Scope, 25, /*->3689*/ // 2 children in Scope
    1762             : /*3664*/              OPC_RecordChild0, // #2 = $Vn
    1763             : /*3665*/              OPC_CheckChild1Same, 0,
    1764             : /*3667*/              OPC_MoveParent,
    1765             : /*3668*/              OPC_CheckType, MVT::v1i64,
    1766             : /*3670*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1767             : /*3672*/              OPC_EmitInteger, MVT::i32, 14, 
    1768             : /*3675*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1769             : /*3678*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1770             :                           MVT::v1i64, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    1771             :                       // Src: (or:v1i64 (and:v1i64 (xor:v1i64 DPR:v1i64:$Vd, (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v1i64:$Vm), (and:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vd)) - Complexity = 22
    1772             :                       // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1773             : /*3689*/            /*Scope*/ 25, /*->3715*/
    1774             : /*3690*/              OPC_CheckChild0Same, 0,
    1775             : /*3692*/              OPC_RecordChild1, // #2 = $Vn
    1776             : /*3693*/              OPC_MoveParent,
    1777             : /*3694*/              OPC_CheckType, MVT::v1i64,
    1778             : /*3696*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1779             : /*3698*/              OPC_EmitInteger, MVT::i32, 14, 
    1780             : /*3701*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1781             : /*3704*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1782             :                           MVT::v1i64, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    1783             :                       // Src: (or:v1i64 (and:v1i64 (xor:v1i64 DPR:v1i64:$Vd, (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v1i64:$Vm), (and:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn)) - Complexity = 22
    1784             :                       // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1785             : /*3715*/            0, /*End of Scope*/
    1786             : /*3716*/          /*Scope*/ 81, /*->3798*/
    1787             : /*3717*/            OPC_MoveChild0,
    1788             : /*3718*/            OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1789             : /*3721*/            OPC_MoveChild0,
    1790             : /*3722*/            OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1791             : /*3725*/            OPC_MoveChild0,
    1792             : /*3726*/            OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1793             : /*3729*/            OPC_MoveParent,
    1794             : /*3730*/            OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1795             : /*3732*/            OPC_CheckType, MVT::v8i8,
    1796             : /*3734*/            OPC_MoveParent,
    1797             : /*3735*/            OPC_MoveParent,
    1798             : /*3736*/            OPC_RecordChild1, // #0 = $Vd
    1799             : /*3737*/            OPC_MoveParent,
    1800             : /*3738*/            OPC_RecordChild1, // #1 = $Vm
    1801             : /*3739*/            OPC_MoveParent,
    1802             : /*3740*/            OPC_MoveChild1,
    1803             : /*3741*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1804             : /*3744*/            OPC_Scope, 25, /*->3771*/ // 2 children in Scope
    1805             : /*3746*/              OPC_RecordChild0, // #2 = $Vn
    1806             : /*3747*/              OPC_CheckChild1Same, 0,
    1807             : /*3749*/              OPC_MoveParent,
    1808             : /*3750*/              OPC_CheckType, MVT::v1i64,
    1809             : /*3752*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1810             : /*3754*/              OPC_EmitInteger, MVT::i32, 14, 
    1811             : /*3757*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1812             : /*3760*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1813             :                           MVT::v1i64, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    1814             :                       // Src: (or:v1i64 (and:v1i64 (xor:v1i64 (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v1i64:$Vd), DPR:v1i64:$Vm), (and:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vd)) - Complexity = 22
    1815             :                       // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1816             : /*3771*/            /*Scope*/ 25, /*->3797*/
    1817             : /*3772*/              OPC_CheckChild0Same, 0,
    1818             : /*3774*/              OPC_RecordChild1, // #2 = $Vn
    1819             : /*3775*/              OPC_MoveParent,
    1820             : /*3776*/              OPC_CheckType, MVT::v1i64,
    1821             : /*3778*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1822             : /*3780*/              OPC_EmitInteger, MVT::i32, 14, 
    1823             : /*3783*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1824             : /*3786*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLd), 0,
    1825             :                           MVT::v1i64, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    1826             :                       // Src: (or:v1i64 (and:v1i64 (xor:v1i64 (bitconvert:v1i64 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v1i64:$Vd), DPR:v1i64:$Vm), (and:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn)) - Complexity = 22
    1827             :                       // Dst: (VBSLd:v1i64 DPR:v1i64:$Vd, DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    1828             : /*3797*/            0, /*End of Scope*/
    1829             : /*3798*/          0, /*End of Scope*/
    1830             : /*3799*/        /*Scope*/ 17|128,4/*529*/, /*->4330*/
    1831             : /*3801*/          OPC_RecordChild0, // #0 = $Vn
    1832             : /*3802*/          OPC_Scope, 98|128,2/*354*/, /*->4159*/ // 2 children in Scope
    1833             : /*3805*/            OPC_RecordChild1, // #1 = $Vd
    1834             : /*3806*/            OPC_MoveParent,
    1835             : /*3807*/            OPC_MoveChild1,
    1836             : /*3808*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1837             : /*3811*/            OPC_Scope, 49, /*->3862*/ // 4 children in Scope
    1838             : /*3813*/              OPC_RecordChild0, // #2 = $Vm
    1839             : /*3814*/              OPC_MoveChild1,
    1840             : /*3815*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1841             : /*3818*/              OPC_MoveChild0,
    1842             : /*3819*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1843             : /*3822*/              OPC_MoveChild0,
    1844             : /*3823*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1845             : /*3826*/              OPC_MoveChild0,
    1846             : /*3827*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1847             : /*3830*/              OPC_MoveParent,
    1848             : /*3831*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1849             : /*3833*/              OPC_CheckType, MVT::v16i8,
    1850             : /*3835*/              OPC_MoveParent,
    1851             : /*3836*/              OPC_MoveParent,
    1852             : /*3837*/              OPC_CheckChild1Same, 1,
    1853             : /*3839*/              OPC_MoveParent,
    1854             : /*3840*/              OPC_MoveParent,
    1855             : /*3841*/              OPC_CheckType, MVT::v4i32,
    1856             : /*3843*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1857             : /*3845*/              OPC_EmitInteger, MVT::i32, 14, 
    1858             : /*3848*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1859             : /*3851*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    1860             :                           MVT::v4i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1861             :                       // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vd), (and:v4i32 QPR:v4i32:$Vm, (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vd))) - Complexity = 22
    1862             :                       // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    1863             : /*3862*/            /*Scope*/ 98, /*->3961*/
    1864             : /*3863*/              OPC_MoveChild0,
    1865             : /*3864*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1866             : /*3867*/              OPC_Scope, 45, /*->3914*/ // 2 children in Scope
    1867             : /*3869*/                OPC_CheckChild0Same, 1,
    1868             : /*3871*/                OPC_MoveChild1,
    1869             : /*3872*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1870             : /*3875*/                OPC_MoveChild0,
    1871             : /*3876*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1872             : /*3879*/                OPC_MoveChild0,
    1873             : /*3880*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1874             : /*3883*/                OPC_MoveParent,
    1875             : /*3884*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1876             : /*3886*/                OPC_CheckType, MVT::v16i8,
    1877             : /*3888*/                OPC_MoveParent,
    1878             : /*3889*/                OPC_MoveParent,
    1879             : /*3890*/                OPC_MoveParent,
    1880             : /*3891*/                OPC_RecordChild1, // #2 = $Vm
    1881             : /*3892*/                OPC_MoveParent,
    1882             : /*3893*/                OPC_CheckType, MVT::v4i32,
    1883             : /*3895*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1884             : /*3897*/                OPC_EmitInteger, MVT::i32, 14, 
    1885             : /*3900*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1886             : /*3903*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    1887             :                             MVT::v4i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1888             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vd), (and:v4i32 (xor:v4i32 QPR:v4i32:$Vd, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v4i32:$Vm)) - Complexity = 22
    1889             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    1890             : /*3914*/              /*Scope*/ 45, /*->3960*/
    1891             : /*3915*/                OPC_MoveChild0,
    1892             : /*3916*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1893             : /*3919*/                OPC_MoveChild0,
    1894             : /*3920*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1895             : /*3923*/                OPC_MoveChild0,
    1896             : /*3924*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1897             : /*3927*/                OPC_MoveParent,
    1898             : /*3928*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1899             : /*3930*/                OPC_CheckType, MVT::v16i8,
    1900             : /*3932*/                OPC_MoveParent,
    1901             : /*3933*/                OPC_MoveParent,
    1902             : /*3934*/                OPC_CheckChild1Same, 1,
    1903             : /*3936*/                OPC_MoveParent,
    1904             : /*3937*/                OPC_RecordChild1, // #2 = $Vm
    1905             : /*3938*/                OPC_MoveParent,
    1906             : /*3939*/                OPC_CheckType, MVT::v4i32,
    1907             : /*3941*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1908             : /*3943*/                OPC_EmitInteger, MVT::i32, 14, 
    1909             : /*3946*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1910             : /*3949*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    1911             :                             MVT::v4i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    1912             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vd), (and:v4i32 (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vd), QPR:v4i32:$Vm)) - Complexity = 22
    1913             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    1914             : /*3960*/              0, /*End of Scope*/
    1915             : /*3961*/            /*Scope*/ 97, /*->4059*/
    1916             : /*3962*/              OPC_RecordChild0, // #2 = $Vm
    1917             : /*3963*/              OPC_MoveChild1,
    1918             : /*3964*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1919             : /*3967*/              OPC_Scope, 44, /*->4013*/ // 2 children in Scope
    1920             : /*3969*/                OPC_CheckChild0Same, 0,
    1921             : /*3971*/                OPC_MoveChild1,
    1922             : /*3972*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1923             : /*3975*/                OPC_MoveChild0,
    1924             : /*3976*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1925             : /*3979*/                OPC_MoveChild0,
    1926             : /*3980*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1927             : /*3983*/                OPC_MoveParent,
    1928             : /*3984*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1929             : /*3986*/                OPC_CheckType, MVT::v16i8,
    1930             : /*3988*/                OPC_MoveParent,
    1931             : /*3989*/                OPC_MoveParent,
    1932             : /*3990*/                OPC_MoveParent,
    1933             : /*3991*/                OPC_MoveParent,
    1934             : /*3992*/                OPC_CheckType, MVT::v4i32,
    1935             : /*3994*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1936             : /*3996*/                OPC_EmitInteger, MVT::i32, 14, 
    1937             : /*3999*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1938             : /*4002*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    1939             :                             MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1940             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn), (and:v4i32 QPR:v4i32:$Vm, (xor:v4i32 QPR:v4i32:$Vd, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)))) - Complexity = 22
    1941             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    1942             : /*4013*/              /*Scope*/ 44, /*->4058*/
    1943             : /*4014*/                OPC_MoveChild0,
    1944             : /*4015*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1945             : /*4018*/                OPC_MoveChild0,
    1946             : /*4019*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1947             : /*4022*/                OPC_MoveChild0,
    1948             : /*4023*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1949             : /*4026*/                OPC_MoveParent,
    1950             : /*4027*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1951             : /*4029*/                OPC_CheckType, MVT::v16i8,
    1952             : /*4031*/                OPC_MoveParent,
    1953             : /*4032*/                OPC_MoveParent,
    1954             : /*4033*/                OPC_CheckChild1Same, 0,
    1955             : /*4035*/                OPC_MoveParent,
    1956             : /*4036*/                OPC_MoveParent,
    1957             : /*4037*/                OPC_CheckType, MVT::v4i32,
    1958             : /*4039*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1959             : /*4041*/                OPC_EmitInteger, MVT::i32, 14, 
    1960             : /*4044*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1961             : /*4047*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    1962             :                             MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1963             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn), (and:v4i32 QPR:v4i32:$Vm, (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vd))) - Complexity = 22
    1964             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    1965             : /*4058*/              0, /*End of Scope*/
    1966             : /*4059*/            /*Scope*/ 98, /*->4158*/
    1967             : /*4060*/              OPC_MoveChild0,
    1968             : /*4061*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    1969             : /*4064*/              OPC_Scope, 45, /*->4111*/ // 2 children in Scope
    1970             : /*4066*/                OPC_CheckChild0Same, 0,
    1971             : /*4068*/                OPC_MoveChild1,
    1972             : /*4069*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1973             : /*4072*/                OPC_MoveChild0,
    1974             : /*4073*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1975             : /*4076*/                OPC_MoveChild0,
    1976             : /*4077*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    1977             : /*4080*/                OPC_MoveParent,
    1978             : /*4081*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    1979             : /*4083*/                OPC_CheckType, MVT::v16i8,
    1980             : /*4085*/                OPC_MoveParent,
    1981             : /*4086*/                OPC_MoveParent,
    1982             : /*4087*/                OPC_MoveParent,
    1983             : /*4088*/                OPC_RecordChild1, // #2 = $Vm
    1984             : /*4089*/                OPC_MoveParent,
    1985             : /*4090*/                OPC_CheckType, MVT::v4i32,
    1986             : /*4092*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    1987             : /*4094*/                OPC_EmitInteger, MVT::i32, 14, 
    1988             : /*4097*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    1989             : /*4100*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    1990             :                             MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    1991             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn), (and:v4i32 (xor:v4i32 QPR:v4i32:$Vd, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v4i32:$Vm)) - Complexity = 22
    1992             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    1993             : /*4111*/              /*Scope*/ 45, /*->4157*/
    1994             : /*4112*/                OPC_MoveChild0,
    1995             : /*4113*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    1996             : /*4116*/                OPC_MoveChild0,
    1997             : /*4117*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    1998             : /*4120*/                OPC_MoveChild0,
    1999             : /*4121*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2000             : /*4124*/                OPC_MoveParent,
    2001             : /*4125*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2002             : /*4127*/                OPC_CheckType, MVT::v16i8,
    2003             : /*4129*/                OPC_MoveParent,
    2004             : /*4130*/                OPC_MoveParent,
    2005             : /*4131*/                OPC_CheckChild1Same, 0,
    2006             : /*4133*/                OPC_MoveParent,
    2007             : /*4134*/                OPC_RecordChild1, // #2 = $Vm
    2008             : /*4135*/                OPC_MoveParent,
    2009             : /*4136*/                OPC_CheckType, MVT::v4i32,
    2010             : /*4138*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2011             : /*4140*/                OPC_EmitInteger, MVT::i32, 14, 
    2012             : /*4143*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2013             : /*4146*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2014             :                             MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    2015             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn), (and:v4i32 (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vd), QPR:v4i32:$Vm)) - Complexity = 22
    2016             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2017             : /*4157*/              0, /*End of Scope*/
    2018             : /*4158*/            0, /*End of Scope*/
    2019             : /*4159*/          /*Scope*/ 40|128,1/*168*/, /*->4329*/
    2020             : /*4161*/            OPC_MoveChild1,
    2021             : /*4162*/            OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2022             : /*4165*/            OPC_Scope, 80, /*->4247*/ // 2 children in Scope
    2023             : /*4167*/              OPC_RecordChild0, // #1 = $Vd
    2024             : /*4168*/              OPC_MoveChild1,
    2025             : /*4169*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2026             : /*4172*/              OPC_MoveChild0,
    2027             : /*4173*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2028             : /*4176*/              OPC_MoveChild0,
    2029             : /*4177*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2030             : /*4180*/              OPC_MoveParent,
    2031             : /*4181*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2032             : /*4183*/              OPC_CheckType, MVT::v16i8,
    2033             : /*4185*/              OPC_MoveParent,
    2034             : /*4186*/              OPC_MoveParent,
    2035             : /*4187*/              OPC_MoveParent,
    2036             : /*4188*/              OPC_MoveParent,
    2037             : /*4189*/              OPC_MoveChild1,
    2038             : /*4190*/              OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2039             : /*4193*/              OPC_Scope, 25, /*->4220*/ // 2 children in Scope
    2040             : /*4195*/                OPC_RecordChild0, // #2 = $Vn
    2041             : /*4196*/                OPC_CheckChild1Same, 1,
    2042             : /*4198*/                OPC_MoveParent,
    2043             : /*4199*/                OPC_CheckType, MVT::v4i32,
    2044             : /*4201*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2045             : /*4203*/                OPC_EmitInteger, MVT::i32, 14, 
    2046             : /*4206*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2047             : /*4209*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2048             :                             MVT::v4i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    2049             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vm, (xor:v4i32 QPR:v4i32:$Vd, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))), (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vd)) - Complexity = 22
    2050             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2051             : /*4220*/              /*Scope*/ 25, /*->4246*/
    2052             : /*4221*/                OPC_CheckChild0Same, 1,
    2053             : /*4223*/                OPC_RecordChild1, // #2 = $Vn
    2054             : /*4224*/                OPC_MoveParent,
    2055             : /*4225*/                OPC_CheckType, MVT::v4i32,
    2056             : /*4227*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2057             : /*4229*/                OPC_EmitInteger, MVT::i32, 14, 
    2058             : /*4232*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2059             : /*4235*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2060             :                             MVT::v4i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    2061             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vm, (xor:v4i32 QPR:v4i32:$Vd, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))), (and:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn)) - Complexity = 22
    2062             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2063             : /*4246*/              0, /*End of Scope*/
    2064             : /*4247*/            /*Scope*/ 80, /*->4328*/
    2065             : /*4248*/              OPC_MoveChild0,
    2066             : /*4249*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2067             : /*4252*/              OPC_MoveChild0,
    2068             : /*4253*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2069             : /*4256*/              OPC_MoveChild0,
    2070             : /*4257*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2071             : /*4260*/              OPC_MoveParent,
    2072             : /*4261*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2073             : /*4263*/              OPC_CheckType, MVT::v16i8,
    2074             : /*4265*/              OPC_MoveParent,
    2075             : /*4266*/              OPC_MoveParent,
    2076             : /*4267*/              OPC_RecordChild1, // #1 = $Vd
    2077             : /*4268*/              OPC_MoveParent,
    2078             : /*4269*/              OPC_MoveParent,
    2079             : /*4270*/              OPC_MoveChild1,
    2080             : /*4271*/              OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2081             : /*4274*/              OPC_Scope, 25, /*->4301*/ // 2 children in Scope
    2082             : /*4276*/                OPC_RecordChild0, // #2 = $Vn
    2083             : /*4277*/                OPC_CheckChild1Same, 1,
    2084             : /*4279*/                OPC_MoveParent,
    2085             : /*4280*/                OPC_CheckType, MVT::v4i32,
    2086             : /*4282*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2087             : /*4284*/                OPC_EmitInteger, MVT::i32, 14, 
    2088             : /*4287*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2089             : /*4290*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2090             :                             MVT::v4i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    2091             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vm, (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vd)), (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vd)) - Complexity = 22
    2092             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2093             : /*4301*/              /*Scope*/ 25, /*->4327*/
    2094             : /*4302*/                OPC_CheckChild0Same, 1,
    2095             : /*4304*/                OPC_RecordChild1, // #2 = $Vn
    2096             : /*4305*/                OPC_MoveParent,
    2097             : /*4306*/                OPC_CheckType, MVT::v4i32,
    2098             : /*4308*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2099             : /*4310*/                OPC_EmitInteger, MVT::i32, 14, 
    2100             : /*4313*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2101             : /*4316*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2102             :                             MVT::v4i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    2103             :                         // Src: (or:v4i32 (and:v4i32 QPR:v4i32:$Vm, (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vd)), (and:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn)) - Complexity = 22
    2104             :                         // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2105             : /*4327*/              0, /*End of Scope*/
    2106             : /*4328*/            0, /*End of Scope*/
    2107             : /*4329*/          0, /*End of Scope*/
    2108             : /*4330*/        /*Scope*/ 42|128,1/*170*/, /*->4502*/
    2109             : /*4332*/          OPC_MoveChild0,
    2110             : /*4333*/          OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2111             : /*4336*/          OPC_Scope, 81, /*->4419*/ // 2 children in Scope
    2112             : /*4338*/            OPC_RecordChild0, // #0 = $Vd
    2113             : /*4339*/            OPC_MoveChild1,
    2114             : /*4340*/            OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2115             : /*4343*/            OPC_MoveChild0,
    2116             : /*4344*/            OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2117             : /*4347*/            OPC_MoveChild0,
    2118             : /*4348*/            OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2119             : /*4351*/            OPC_MoveParent,
    2120             : /*4352*/            OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2121             : /*4354*/            OPC_CheckType, MVT::v16i8,
    2122             : /*4356*/            OPC_MoveParent,
    2123             : /*4357*/            OPC_MoveParent,
    2124             : /*4358*/            OPC_MoveParent,
    2125             : /*4359*/            OPC_RecordChild1, // #1 = $Vm
    2126             : /*4360*/            OPC_MoveParent,
    2127             : /*4361*/            OPC_MoveChild1,
    2128             : /*4362*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2129             : /*4365*/            OPC_Scope, 25, /*->4392*/ // 2 children in Scope
    2130             : /*4367*/              OPC_RecordChild0, // #2 = $Vn
    2131             : /*4368*/              OPC_CheckChild1Same, 0,
    2132             : /*4370*/              OPC_MoveParent,
    2133             : /*4371*/              OPC_CheckType, MVT::v4i32,
    2134             : /*4373*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2135             : /*4375*/              OPC_EmitInteger, MVT::i32, 14, 
    2136             : /*4378*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2137             : /*4381*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2138             :                           MVT::v4i32, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    2139             :                       // Src: (or:v4i32 (and:v4i32 (xor:v4i32 QPR:v4i32:$Vd, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v4i32:$Vm), (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vd)) - Complexity = 22
    2140             :                       // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2141             : /*4392*/            /*Scope*/ 25, /*->4418*/
    2142             : /*4393*/              OPC_CheckChild0Same, 0,
    2143             : /*4395*/              OPC_RecordChild1, // #2 = $Vn
    2144             : /*4396*/              OPC_MoveParent,
    2145             : /*4397*/              OPC_CheckType, MVT::v4i32,
    2146             : /*4399*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2147             : /*4401*/              OPC_EmitInteger, MVT::i32, 14, 
    2148             : /*4404*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2149             : /*4407*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2150             :                           MVT::v4i32, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    2151             :                       // Src: (or:v4i32 (and:v4i32 (xor:v4i32 QPR:v4i32:$Vd, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v4i32:$Vm), (and:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn)) - Complexity = 22
    2152             :                       // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2153             : /*4418*/            0, /*End of Scope*/
    2154             : /*4419*/          /*Scope*/ 81, /*->4501*/
    2155             : /*4420*/            OPC_MoveChild0,
    2156             : /*4421*/            OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2157             : /*4424*/            OPC_MoveChild0,
    2158             : /*4425*/            OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2159             : /*4428*/            OPC_MoveChild0,
    2160             : /*4429*/            OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2161             : /*4432*/            OPC_MoveParent,
    2162             : /*4433*/            OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2163             : /*4435*/            OPC_CheckType, MVT::v16i8,
    2164             : /*4437*/            OPC_MoveParent,
    2165             : /*4438*/            OPC_MoveParent,
    2166             : /*4439*/            OPC_RecordChild1, // #0 = $Vd
    2167             : /*4440*/            OPC_MoveParent,
    2168             : /*4441*/            OPC_RecordChild1, // #1 = $Vm
    2169             : /*4442*/            OPC_MoveParent,
    2170             : /*4443*/            OPC_MoveChild1,
    2171             : /*4444*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2172             : /*4447*/            OPC_Scope, 25, /*->4474*/ // 2 children in Scope
    2173             : /*4449*/              OPC_RecordChild0, // #2 = $Vn
    2174             : /*4450*/              OPC_CheckChild1Same, 0,
    2175             : /*4452*/              OPC_MoveParent,
    2176             : /*4453*/              OPC_CheckType, MVT::v4i32,
    2177             : /*4455*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2178             : /*4457*/              OPC_EmitInteger, MVT::i32, 14, 
    2179             : /*4460*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2180             : /*4463*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2181             :                           MVT::v4i32, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    2182             :                       // Src: (or:v4i32 (and:v4i32 (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vd), QPR:v4i32:$Vm), (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vd)) - Complexity = 22
    2183             :                       // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2184             : /*4474*/            /*Scope*/ 25, /*->4500*/
    2185             : /*4475*/              OPC_CheckChild0Same, 0,
    2186             : /*4477*/              OPC_RecordChild1, // #2 = $Vn
    2187             : /*4478*/              OPC_MoveParent,
    2188             : /*4479*/              OPC_CheckType, MVT::v4i32,
    2189             : /*4481*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2190             : /*4483*/              OPC_EmitInteger, MVT::i32, 14, 
    2191             : /*4486*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2192             : /*4489*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2193             :                           MVT::v4i32, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    2194             :                       // Src: (or:v4i32 (and:v4i32 (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vd), QPR:v4i32:$Vm), (and:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn)) - Complexity = 22
    2195             :                       // Dst: (VBSLq:v4i32 QPR:v4i32:$Vd, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2196             : /*4500*/            0, /*End of Scope*/
    2197             : /*4501*/          0, /*End of Scope*/
    2198             : /*4502*/        /*Scope*/ 17|128,4/*529*/, /*->5033*/
    2199             : /*4504*/          OPC_RecordChild0, // #0 = $Vn
    2200             : /*4505*/          OPC_Scope, 98|128,2/*354*/, /*->4862*/ // 2 children in Scope
    2201             : /*4508*/            OPC_RecordChild1, // #1 = $Vd
    2202             : /*4509*/            OPC_MoveParent,
    2203             : /*4510*/            OPC_MoveChild1,
    2204             : /*4511*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2205             : /*4514*/            OPC_Scope, 49, /*->4565*/ // 4 children in Scope
    2206             : /*4516*/              OPC_RecordChild0, // #2 = $Vm
    2207             : /*4517*/              OPC_MoveChild1,
    2208             : /*4518*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2209             : /*4521*/              OPC_MoveChild0,
    2210             : /*4522*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2211             : /*4525*/              OPC_MoveChild0,
    2212             : /*4526*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2213             : /*4529*/              OPC_MoveChild0,
    2214             : /*4530*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2215             : /*4533*/              OPC_MoveParent,
    2216             : /*4534*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2217             : /*4536*/              OPC_CheckType, MVT::v16i8,
    2218             : /*4538*/              OPC_MoveParent,
    2219             : /*4539*/              OPC_MoveParent,
    2220             : /*4540*/              OPC_CheckChild1Same, 1,
    2221             : /*4542*/              OPC_MoveParent,
    2222             : /*4543*/              OPC_MoveParent,
    2223             : /*4544*/              OPC_CheckType, MVT::v2i64,
    2224             : /*4546*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2225             : /*4548*/              OPC_EmitInteger, MVT::i32, 14, 
    2226             : /*4551*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2227             : /*4554*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2228             :                           MVT::v2i64, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    2229             :                       // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vd), (and:v2i64 QPR:v2i64:$Vm, (xor:v2i64 (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v2i64:$Vd))) - Complexity = 22
    2230             :                       // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2231             : /*4565*/            /*Scope*/ 98, /*->4664*/
    2232             : /*4566*/              OPC_MoveChild0,
    2233             : /*4567*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2234             : /*4570*/              OPC_Scope, 45, /*->4617*/ // 2 children in Scope
    2235             : /*4572*/                OPC_CheckChild0Same, 1,
    2236             : /*4574*/                OPC_MoveChild1,
    2237             : /*4575*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2238             : /*4578*/                OPC_MoveChild0,
    2239             : /*4579*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2240             : /*4582*/                OPC_MoveChild0,
    2241             : /*4583*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2242             : /*4586*/                OPC_MoveParent,
    2243             : /*4587*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2244             : /*4589*/                OPC_CheckType, MVT::v16i8,
    2245             : /*4591*/                OPC_MoveParent,
    2246             : /*4592*/                OPC_MoveParent,
    2247             : /*4593*/                OPC_MoveParent,
    2248             : /*4594*/                OPC_RecordChild1, // #2 = $Vm
    2249             : /*4595*/                OPC_MoveParent,
    2250             : /*4596*/                OPC_CheckType, MVT::v2i64,
    2251             : /*4598*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2252             : /*4600*/                OPC_EmitInteger, MVT::i32, 14, 
    2253             : /*4603*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2254             : /*4606*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2255             :                             MVT::v2i64, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    2256             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vd), (and:v2i64 (xor:v2i64 QPR:v2i64:$Vd, (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v2i64:$Vm)) - Complexity = 22
    2257             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2258             : /*4617*/              /*Scope*/ 45, /*->4663*/
    2259             : /*4618*/                OPC_MoveChild0,
    2260             : /*4619*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2261             : /*4622*/                OPC_MoveChild0,
    2262             : /*4623*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2263             : /*4626*/                OPC_MoveChild0,
    2264             : /*4627*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2265             : /*4630*/                OPC_MoveParent,
    2266             : /*4631*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2267             : /*4633*/                OPC_CheckType, MVT::v16i8,
    2268             : /*4635*/                OPC_MoveParent,
    2269             : /*4636*/                OPC_MoveParent,
    2270             : /*4637*/                OPC_CheckChild1Same, 1,
    2271             : /*4639*/                OPC_MoveParent,
    2272             : /*4640*/                OPC_RecordChild1, // #2 = $Vm
    2273             : /*4641*/                OPC_MoveParent,
    2274             : /*4642*/                OPC_CheckType, MVT::v2i64,
    2275             : /*4644*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2276             : /*4646*/                OPC_EmitInteger, MVT::i32, 14, 
    2277             : /*4649*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2278             : /*4652*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2279             :                             MVT::v2i64, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    2280             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vd), (and:v2i64 (xor:v2i64 (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v2i64:$Vd), QPR:v2i64:$Vm)) - Complexity = 22
    2281             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2282             : /*4663*/              0, /*End of Scope*/
    2283             : /*4664*/            /*Scope*/ 97, /*->4762*/
    2284             : /*4665*/              OPC_RecordChild0, // #2 = $Vm
    2285             : /*4666*/              OPC_MoveChild1,
    2286             : /*4667*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2287             : /*4670*/              OPC_Scope, 44, /*->4716*/ // 2 children in Scope
    2288             : /*4672*/                OPC_CheckChild0Same, 0,
    2289             : /*4674*/                OPC_MoveChild1,
    2290             : /*4675*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2291             : /*4678*/                OPC_MoveChild0,
    2292             : /*4679*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2293             : /*4682*/                OPC_MoveChild0,
    2294             : /*4683*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2295             : /*4686*/                OPC_MoveParent,
    2296             : /*4687*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2297             : /*4689*/                OPC_CheckType, MVT::v16i8,
    2298             : /*4691*/                OPC_MoveParent,
    2299             : /*4692*/                OPC_MoveParent,
    2300             : /*4693*/                OPC_MoveParent,
    2301             : /*4694*/                OPC_MoveParent,
    2302             : /*4695*/                OPC_CheckType, MVT::v2i64,
    2303             : /*4697*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2304             : /*4699*/                OPC_EmitInteger, MVT::i32, 14, 
    2305             : /*4702*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2306             : /*4705*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2307             :                             MVT::v2i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    2308             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn), (and:v2i64 QPR:v2i64:$Vm, (xor:v2i64 QPR:v2i64:$Vd, (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)))) - Complexity = 22
    2309             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2310             : /*4716*/              /*Scope*/ 44, /*->4761*/
    2311             : /*4717*/                OPC_MoveChild0,
    2312             : /*4718*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2313             : /*4721*/                OPC_MoveChild0,
    2314             : /*4722*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2315             : /*4725*/                OPC_MoveChild0,
    2316             : /*4726*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2317             : /*4729*/                OPC_MoveParent,
    2318             : /*4730*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2319             : /*4732*/                OPC_CheckType, MVT::v16i8,
    2320             : /*4734*/                OPC_MoveParent,
    2321             : /*4735*/                OPC_MoveParent,
    2322             : /*4736*/                OPC_CheckChild1Same, 0,
    2323             : /*4738*/                OPC_MoveParent,
    2324             : /*4739*/                OPC_MoveParent,
    2325             : /*4740*/                OPC_CheckType, MVT::v2i64,
    2326             : /*4742*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2327             : /*4744*/                OPC_EmitInteger, MVT::i32, 14, 
    2328             : /*4747*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2329             : /*4750*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2330             :                             MVT::v2i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    2331             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn), (and:v2i64 QPR:v2i64:$Vm, (xor:v2i64 (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v2i64:$Vd))) - Complexity = 22
    2332             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2333             : /*4761*/              0, /*End of Scope*/
    2334             : /*4762*/            /*Scope*/ 98, /*->4861*/
    2335             : /*4763*/              OPC_MoveChild0,
    2336             : /*4764*/              OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2337             : /*4767*/              OPC_Scope, 45, /*->4814*/ // 2 children in Scope
    2338             : /*4769*/                OPC_CheckChild0Same, 0,
    2339             : /*4771*/                OPC_MoveChild1,
    2340             : /*4772*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2341             : /*4775*/                OPC_MoveChild0,
    2342             : /*4776*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2343             : /*4779*/                OPC_MoveChild0,
    2344             : /*4780*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2345             : /*4783*/                OPC_MoveParent,
    2346             : /*4784*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2347             : /*4786*/                OPC_CheckType, MVT::v16i8,
    2348             : /*4788*/                OPC_MoveParent,
    2349             : /*4789*/                OPC_MoveParent,
    2350             : /*4790*/                OPC_MoveParent,
    2351             : /*4791*/                OPC_RecordChild1, // #2 = $Vm
    2352             : /*4792*/                OPC_MoveParent,
    2353             : /*4793*/                OPC_CheckType, MVT::v2i64,
    2354             : /*4795*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2355             : /*4797*/                OPC_EmitInteger, MVT::i32, 14, 
    2356             : /*4800*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2357             : /*4803*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2358             :                             MVT::v2i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    2359             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn), (and:v2i64 (xor:v2i64 QPR:v2i64:$Vd, (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v2i64:$Vm)) - Complexity = 22
    2360             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2361             : /*4814*/              /*Scope*/ 45, /*->4860*/
    2362             : /*4815*/                OPC_MoveChild0,
    2363             : /*4816*/                OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2364             : /*4819*/                OPC_MoveChild0,
    2365             : /*4820*/                OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2366             : /*4823*/                OPC_MoveChild0,
    2367             : /*4824*/                OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2368             : /*4827*/                OPC_MoveParent,
    2369             : /*4828*/                OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2370             : /*4830*/                OPC_CheckType, MVT::v16i8,
    2371             : /*4832*/                OPC_MoveParent,
    2372             : /*4833*/                OPC_MoveParent,
    2373             : /*4834*/                OPC_CheckChild1Same, 0,
    2374             : /*4836*/                OPC_MoveParent,
    2375             : /*4837*/                OPC_RecordChild1, // #2 = $Vm
    2376             : /*4838*/                OPC_MoveParent,
    2377             : /*4839*/                OPC_CheckType, MVT::v2i64,
    2378             : /*4841*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2379             : /*4843*/                OPC_EmitInteger, MVT::i32, 14, 
    2380             : /*4846*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2381             : /*4849*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2382             :                             MVT::v2i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    2383             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn), (and:v2i64 (xor:v2i64 (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v2i64:$Vd), QPR:v2i64:$Vm)) - Complexity = 22
    2384             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2385             : /*4860*/              0, /*End of Scope*/
    2386             : /*4861*/            0, /*End of Scope*/
    2387             : /*4862*/          /*Scope*/ 40|128,1/*168*/, /*->5032*/
    2388             : /*4864*/            OPC_MoveChild1,
    2389             : /*4865*/            OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2390             : /*4868*/            OPC_Scope, 80, /*->4950*/ // 2 children in Scope
    2391             : /*4870*/              OPC_RecordChild0, // #1 = $Vd
    2392             : /*4871*/              OPC_MoveChild1,
    2393             : /*4872*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2394             : /*4875*/              OPC_MoveChild0,
    2395             : /*4876*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2396             : /*4879*/              OPC_MoveChild0,
    2397             : /*4880*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2398             : /*4883*/              OPC_MoveParent,
    2399             : /*4884*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2400             : /*4886*/              OPC_CheckType, MVT::v16i8,
    2401             : /*4888*/              OPC_MoveParent,
    2402             : /*4889*/              OPC_MoveParent,
    2403             : /*4890*/              OPC_MoveParent,
    2404             : /*4891*/              OPC_MoveParent,
    2405             : /*4892*/              OPC_MoveChild1,
    2406             : /*4893*/              OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2407             : /*4896*/              OPC_Scope, 25, /*->4923*/ // 2 children in Scope
    2408             : /*4898*/                OPC_RecordChild0, // #2 = $Vn
    2409             : /*4899*/                OPC_CheckChild1Same, 1,
    2410             : /*4901*/                OPC_MoveParent,
    2411             : /*4902*/                OPC_CheckType, MVT::v2i64,
    2412             : /*4904*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2413             : /*4906*/                OPC_EmitInteger, MVT::i32, 14, 
    2414             : /*4909*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2415             : /*4912*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2416             :                             MVT::v2i64, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    2417             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vm, (xor:v2i64 QPR:v2i64:$Vd, (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))), (and:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vd)) - Complexity = 22
    2418             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2419             : /*4923*/              /*Scope*/ 25, /*->4949*/
    2420             : /*4924*/                OPC_CheckChild0Same, 1,
    2421             : /*4926*/                OPC_RecordChild1, // #2 = $Vn
    2422             : /*4927*/                OPC_MoveParent,
    2423             : /*4928*/                OPC_CheckType, MVT::v2i64,
    2424             : /*4930*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2425             : /*4932*/                OPC_EmitInteger, MVT::i32, 14, 
    2426             : /*4935*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2427             : /*4938*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2428             :                             MVT::v2i64, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    2429             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vm, (xor:v2i64 QPR:v2i64:$Vd, (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))), (and:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn)) - Complexity = 22
    2430             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2431             : /*4949*/              0, /*End of Scope*/
    2432             : /*4950*/            /*Scope*/ 80, /*->5031*/
    2433             : /*4951*/              OPC_MoveChild0,
    2434             : /*4952*/              OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2435             : /*4955*/              OPC_MoveChild0,
    2436             : /*4956*/              OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2437             : /*4959*/              OPC_MoveChild0,
    2438             : /*4960*/              OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2439             : /*4963*/              OPC_MoveParent,
    2440             : /*4964*/              OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2441             : /*4966*/              OPC_CheckType, MVT::v16i8,
    2442             : /*4968*/              OPC_MoveParent,
    2443             : /*4969*/              OPC_MoveParent,
    2444             : /*4970*/              OPC_RecordChild1, // #1 = $Vd
    2445             : /*4971*/              OPC_MoveParent,
    2446             : /*4972*/              OPC_MoveParent,
    2447             : /*4973*/              OPC_MoveChild1,
    2448             : /*4974*/              OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2449             : /*4977*/              OPC_Scope, 25, /*->5004*/ // 2 children in Scope
    2450             : /*4979*/                OPC_RecordChild0, // #2 = $Vn
    2451             : /*4980*/                OPC_CheckChild1Same, 1,
    2452             : /*4982*/                OPC_MoveParent,
    2453             : /*4983*/                OPC_CheckType, MVT::v2i64,
    2454             : /*4985*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2455             : /*4987*/                OPC_EmitInteger, MVT::i32, 14, 
    2456             : /*4990*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2457             : /*4993*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2458             :                             MVT::v2i64, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    2459             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vm, (xor:v2i64 (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v2i64:$Vd)), (and:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vd)) - Complexity = 22
    2460             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2461             : /*5004*/              /*Scope*/ 25, /*->5030*/
    2462             : /*5005*/                OPC_CheckChild0Same, 1,
    2463             : /*5007*/                OPC_RecordChild1, // #2 = $Vn
    2464             : /*5008*/                OPC_MoveParent,
    2465             : /*5009*/                OPC_CheckType, MVT::v2i64,
    2466             : /*5011*/                OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2467             : /*5013*/                OPC_EmitInteger, MVT::i32, 14, 
    2468             : /*5016*/                OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2469             : /*5019*/                OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2470             :                             MVT::v2i64, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    2471             :                         // Src: (or:v2i64 (and:v2i64 QPR:v2i64:$Vm, (xor:v2i64 (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v2i64:$Vd)), (and:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn)) - Complexity = 22
    2472             :                         // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2473             : /*5030*/              0, /*End of Scope*/
    2474             : /*5031*/            0, /*End of Scope*/
    2475             : /*5032*/          0, /*End of Scope*/
    2476             : /*5033*/        /*Scope*/ 42|128,1/*170*/, /*->5205*/
    2477             : /*5035*/          OPC_MoveChild0,
    2478             : /*5036*/          OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2479             : /*5039*/          OPC_Scope, 81, /*->5122*/ // 2 children in Scope
    2480             : /*5041*/            OPC_RecordChild0, // #0 = $Vd
    2481             : /*5042*/            OPC_MoveChild1,
    2482             : /*5043*/            OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2483             : /*5046*/            OPC_MoveChild0,
    2484             : /*5047*/            OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2485             : /*5050*/            OPC_MoveChild0,
    2486             : /*5051*/            OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2487             : /*5054*/            OPC_MoveParent,
    2488             : /*5055*/            OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2489             : /*5057*/            OPC_CheckType, MVT::v16i8,
    2490             : /*5059*/            OPC_MoveParent,
    2491             : /*5060*/            OPC_MoveParent,
    2492             : /*5061*/            OPC_MoveParent,
    2493             : /*5062*/            OPC_RecordChild1, // #1 = $Vm
    2494             : /*5063*/            OPC_MoveParent,
    2495             : /*5064*/            OPC_MoveChild1,
    2496             : /*5065*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2497             : /*5068*/            OPC_Scope, 25, /*->5095*/ // 2 children in Scope
    2498             : /*5070*/              OPC_RecordChild0, // #2 = $Vn
    2499             : /*5071*/              OPC_CheckChild1Same, 0,
    2500             : /*5073*/              OPC_MoveParent,
    2501             : /*5074*/              OPC_CheckType, MVT::v2i64,
    2502             : /*5076*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2503             : /*5078*/              OPC_EmitInteger, MVT::i32, 14, 
    2504             : /*5081*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2505             : /*5084*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2506             :                           MVT::v2i64, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    2507             :                       // Src: (or:v2i64 (and:v2i64 (xor:v2i64 QPR:v2i64:$Vd, (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v2i64:$Vm), (and:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vd)) - Complexity = 22
    2508             :                       // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2509             : /*5095*/            /*Scope*/ 25, /*->5121*/
    2510             : /*5096*/              OPC_CheckChild0Same, 0,
    2511             : /*5098*/              OPC_RecordChild1, // #2 = $Vn
    2512             : /*5099*/              OPC_MoveParent,
    2513             : /*5100*/              OPC_CheckType, MVT::v2i64,
    2514             : /*5102*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2515             : /*5104*/              OPC_EmitInteger, MVT::i32, 14, 
    2516             : /*5107*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2517             : /*5110*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2518             :                           MVT::v2i64, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    2519             :                       // Src: (or:v2i64 (and:v2i64 (xor:v2i64 QPR:v2i64:$Vd, (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v2i64:$Vm), (and:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn)) - Complexity = 22
    2520             :                       // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2521             : /*5121*/            0, /*End of Scope*/
    2522             : /*5122*/          /*Scope*/ 81, /*->5204*/
    2523             : /*5123*/            OPC_MoveChild0,
    2524             : /*5124*/            OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2525             : /*5127*/            OPC_MoveChild0,
    2526             : /*5128*/            OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2527             : /*5131*/            OPC_MoveChild0,
    2528             : /*5132*/            OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2529             : /*5135*/            OPC_MoveParent,
    2530             : /*5136*/            OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2531             : /*5138*/            OPC_CheckType, MVT::v16i8,
    2532             : /*5140*/            OPC_MoveParent,
    2533             : /*5141*/            OPC_MoveParent,
    2534             : /*5142*/            OPC_RecordChild1, // #0 = $Vd
    2535             : /*5143*/            OPC_MoveParent,
    2536             : /*5144*/            OPC_RecordChild1, // #1 = $Vm
    2537             : /*5145*/            OPC_MoveParent,
    2538             : /*5146*/            OPC_MoveChild1,
    2539             : /*5147*/            OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    2540             : /*5150*/            OPC_Scope, 25, /*->5177*/ // 2 children in Scope
    2541             : /*5152*/              OPC_RecordChild0, // #2 = $Vn
    2542             : /*5153*/              OPC_CheckChild1Same, 0,
    2543             : /*5155*/              OPC_MoveParent,
    2544             : /*5156*/              OPC_CheckType, MVT::v2i64,
    2545             : /*5158*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2546             : /*5160*/              OPC_EmitInteger, MVT::i32, 14, 
    2547             : /*5163*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2548             : /*5166*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2549             :                           MVT::v2i64, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    2550             :                       // Src: (or:v2i64 (and:v2i64 (xor:v2i64 (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v2i64:$Vd), QPR:v2i64:$Vm), (and:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vd)) - Complexity = 22
    2551             :                       // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2552             : /*5177*/            /*Scope*/ 25, /*->5203*/
    2553             : /*5178*/              OPC_CheckChild0Same, 0,
    2554             : /*5180*/              OPC_RecordChild1, // #2 = $Vn
    2555             : /*5181*/              OPC_MoveParent,
    2556             : /*5182*/              OPC_CheckType, MVT::v2i64,
    2557             : /*5184*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2558             : /*5186*/              OPC_EmitInteger, MVT::i32, 14, 
    2559             : /*5189*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2560             : /*5192*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::VBSLq), 0,
    2561             :                           MVT::v2i64, 5/*#Ops*/, 0, 2, 1, 3, 4, 
    2562             :                       // Src: (or:v2i64 (and:v2i64 (xor:v2i64 (bitconvert:v2i64 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v2i64:$Vd), QPR:v2i64:$Vm), (and:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn)) - Complexity = 22
    2563             :                       // Dst: (VBSLq:v2i64 QPR:v2i64:$Vd, QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    2564             : /*5203*/            0, /*End of Scope*/
    2565             : /*5204*/          0, /*End of Scope*/
    2566             : /*5205*/        0, /*End of Scope*/
    2567             : /*5206*/      /*Scope*/ 118, /*->5325*/
    2568             : /*5207*/        OPC_RecordChild0, // #0 = $Vn
    2569             : /*5208*/        OPC_MoveChild1,
    2570             : /*5209*/        OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2571             : /*5212*/        OPC_Scope, 68, /*->5282*/ // 2 children in Scope
    2572             : /*5214*/          OPC_RecordChild0, // #1 = $Vm
    2573             : /*5215*/          OPC_MoveChild1,
    2574             : /*5216*/          OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2575             : /*5219*/          OPC_MoveChild0,
    2576             : /*5220*/          OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2577             : /*5223*/          OPC_MoveChild0,
    2578             : /*5224*/          OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2579             : /*5227*/          OPC_MoveParent,
    2580             : /*5228*/          OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2581             : /*5230*/          OPC_SwitchType /*2 cases */, 23, MVT::v8i8,// ->5256
    2582             : /*5233*/            OPC_MoveParent,
    2583             : /*5234*/            OPC_MoveParent,
    2584             : /*5235*/            OPC_MoveParent,
    2585             : /*5236*/            OPC_CheckType, MVT::v2i32,
    2586             : /*5238*/            OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2587             : /*5240*/            OPC_EmitInteger, MVT::i32, 14, 
    2588             : /*5243*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2589             : /*5246*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::VORNd), 0,
    2590             :                         MVT::v2i32, 4/*#Ops*/, 0, 1, 2, 3, 
    2591             :                     // Src: (or:v2i32 DPR:v2i32:$Vn, (xor:v2i32 DPR:v2i32:$Vm, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))) - Complexity = 16
    2592             :                     // Dst: (VORNd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    2593             : /*5256*/          /*SwitchType*/ 23, MVT::v16i8,// ->5281
    2594             : /*5258*/            OPC_MoveParent,
    2595             : /*5259*/            OPC_MoveParent,
    2596             : /*5260*/            OPC_MoveParent,
    2597             : /*5261*/            OPC_CheckType, MVT::v4i32,
    2598             : /*5263*/            OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2599             : /*5265*/            OPC_EmitInteger, MVT::i32, 14, 
    2600             : /*5268*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2601             : /*5271*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::VORNq), 0,
    2602             :                         MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    2603             :                     // Src: (or:v4i32 QPR:v4i32:$Vn, (xor:v4i32 QPR:v4i32:$Vm, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))) - Complexity = 16
    2604             :                     // Dst: (VORNq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2605             : /*5281*/          0, // EndSwitchType
    2606             : /*5282*/        /*Scope*/ 41, /*->5324*/
    2607             : /*5283*/          OPC_MoveChild0,
    2608             : /*5284*/          OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2609             : /*5287*/          OPC_MoveChild0,
    2610             : /*5288*/          OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2611             : /*5291*/          OPC_MoveChild0,
    2612             : /*5292*/          OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2613             : /*5295*/          OPC_MoveParent,
    2614             : /*5296*/          OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2615             : /*5298*/          OPC_CheckType, MVT::v8i8,
    2616             : /*5300*/          OPC_MoveParent,
    2617             : /*5301*/          OPC_MoveParent,
    2618             : /*5302*/          OPC_RecordChild1, // #1 = $Vm
    2619             : /*5303*/          OPC_MoveParent,
    2620             : /*5304*/          OPC_CheckType, MVT::v2i32,
    2621             : /*5306*/          OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2622             : /*5308*/          OPC_EmitInteger, MVT::i32, 14, 
    2623             : /*5311*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2624             : /*5314*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::VORNd), 0,
    2625             :                       MVT::v2i32, 4/*#Ops*/, 0, 1, 2, 3, 
    2626             :                   // Src: (or:v2i32 DPR:v2i32:$Vn, (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vm)) - Complexity = 16
    2627             :                   // Dst: (VORNd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    2628             : /*5324*/        0, /*End of Scope*/
    2629             : /*5325*/      /*Scope*/ 92, /*->5418*/
    2630             : /*5326*/        OPC_MoveChild0,
    2631             : /*5327*/        OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2632             : /*5330*/        OPC_Scope, 42, /*->5374*/ // 2 children in Scope
    2633             : /*5332*/          OPC_RecordChild0, // #0 = $Vm
    2634             : /*5333*/          OPC_MoveChild1,
    2635             : /*5334*/          OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2636             : /*5337*/          OPC_MoveChild0,
    2637             : /*5338*/          OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2638             : /*5341*/          OPC_MoveChild0,
    2639             : /*5342*/          OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2640             : /*5345*/          OPC_MoveParent,
    2641             : /*5346*/          OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2642             : /*5348*/          OPC_CheckType, MVT::v8i8,
    2643             : /*5350*/          OPC_MoveParent,
    2644             : /*5351*/          OPC_MoveParent,
    2645             : /*5352*/          OPC_MoveParent,
    2646             : /*5353*/          OPC_RecordChild1, // #1 = $Vn
    2647             : /*5354*/          OPC_CheckType, MVT::v2i32,
    2648             : /*5356*/          OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2649             : /*5358*/          OPC_EmitInteger, MVT::i32, 14, 
    2650             : /*5361*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2651             : /*5364*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::VORNd), 0,
    2652             :                       MVT::v2i32, 4/*#Ops*/, 1, 0, 2, 3, 
    2653             :                   // Src: (or:v2i32 (xor:v2i32 DPR:v2i32:$Vm, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v2i32:$Vn) - Complexity = 16
    2654             :                   // Dst: (VORNd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    2655             : /*5374*/        /*Scope*/ 42, /*->5417*/
    2656             : /*5375*/          OPC_MoveChild0,
    2657             : /*5376*/          OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2658             : /*5379*/          OPC_MoveChild0,
    2659             : /*5380*/          OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2660             : /*5383*/          OPC_MoveChild0,
    2661             : /*5384*/          OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2662             : /*5387*/          OPC_MoveParent,
    2663             : /*5388*/          OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2664             : /*5390*/          OPC_CheckType, MVT::v8i8,
    2665             : /*5392*/          OPC_MoveParent,
    2666             : /*5393*/          OPC_MoveParent,
    2667             : /*5394*/          OPC_RecordChild1, // #0 = $Vm
    2668             : /*5395*/          OPC_MoveParent,
    2669             : /*5396*/          OPC_RecordChild1, // #1 = $Vn
    2670             : /*5397*/          OPC_CheckType, MVT::v2i32,
    2671             : /*5399*/          OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2672             : /*5401*/          OPC_EmitInteger, MVT::i32, 14, 
    2673             : /*5404*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2674             : /*5407*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::VORNd), 0,
    2675             :                       MVT::v2i32, 4/*#Ops*/, 1, 0, 2, 3, 
    2676             :                   // Src: (or:v2i32 (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vm), DPR:v2i32:$Vn) - Complexity = 16
    2677             :                   // Dst: (VORNd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    2678             : /*5417*/        0, /*End of Scope*/
    2679             : /*5418*/      /*Scope*/ 46, /*->5465*/
    2680             : /*5419*/        OPC_RecordChild0, // #0 = $Vn
    2681             : /*5420*/        OPC_MoveChild1,
    2682             : /*5421*/        OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2683             : /*5424*/        OPC_MoveChild0,
    2684             : /*5425*/        OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2685             : /*5428*/        OPC_MoveChild0,
    2686             : /*5429*/        OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2687             : /*5432*/        OPC_MoveChild0,
    2688             : /*5433*/        OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2689             : /*5436*/        OPC_MoveParent,
    2690             : /*5437*/        OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2691             : /*5439*/        OPC_CheckType, MVT::v16i8,
    2692             : /*5441*/        OPC_MoveParent,
    2693             : /*5442*/        OPC_MoveParent,
    2694             : /*5443*/        OPC_RecordChild1, // #1 = $Vm
    2695             : /*5444*/        OPC_MoveParent,
    2696             : /*5445*/        OPC_CheckType, MVT::v4i32,
    2697             : /*5447*/        OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2698             : /*5449*/        OPC_EmitInteger, MVT::i32, 14, 
    2699             : /*5452*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2700             : /*5455*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::VORNq), 0,
    2701             :                     MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    2702             :                 // Src: (or:v4i32 QPR:v4i32:$Vn, (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vm)) - Complexity = 16
    2703             :                 // Dst: (VORNq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2704             : /*5465*/      /*Scope*/ 92, /*->5558*/
    2705             : /*5466*/        OPC_MoveChild0,
    2706             : /*5467*/        OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    2707             : /*5470*/        OPC_Scope, 42, /*->5514*/ // 2 children in Scope
    2708             : /*5472*/          OPC_RecordChild0, // #0 = $Vm
    2709             : /*5473*/          OPC_MoveChild1,
    2710             : /*5474*/          OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2711             : /*5477*/          OPC_MoveChild0,
    2712             : /*5478*/          OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2713             : /*5481*/          OPC_MoveChild0,
    2714             : /*5482*/          OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2715             : /*5485*/          OPC_MoveParent,
    2716             : /*5486*/          OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2717             : /*5488*/          OPC_CheckType, MVT::v16i8,
    2718             : /*5490*/          OPC_MoveParent,
    2719             : /*5491*/          OPC_MoveParent,
    2720             : /*5492*/          OPC_MoveParent,
    2721             : /*5493*/          OPC_RecordChild1, // #1 = $Vn
    2722             : /*5494*/          OPC_CheckType, MVT::v4i32,
    2723             : /*5496*/          OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2724             : /*5498*/          OPC_EmitInteger, MVT::i32, 14, 
    2725             : /*5501*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2726             : /*5504*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::VORNq), 0,
    2727             :                       MVT::v4i32, 4/*#Ops*/, 1, 0, 2, 3, 
    2728             :                   // Src: (or:v4i32 (xor:v4i32 QPR:v4i32:$Vm, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v4i32:$Vn) - Complexity = 16
    2729             :                   // Dst: (VORNq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2730             : /*5514*/        /*Scope*/ 42, /*->5557*/
    2731             : /*5515*/          OPC_MoveChild0,
    2732             : /*5516*/          OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    2733             : /*5519*/          OPC_MoveChild0,
    2734             : /*5520*/          OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    2735             : /*5523*/          OPC_MoveChild0,
    2736             : /*5524*/          OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    2737             : /*5527*/          OPC_MoveParent,
    2738             : /*5528*/          OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    2739             : /*5530*/          OPC_CheckType, MVT::v16i8,
    2740             : /*5532*/          OPC_MoveParent,
    2741             : /*5533*/          OPC_MoveParent,
    2742             : /*5534*/          OPC_RecordChild1, // #0 = $Vm
    2743             : /*5535*/          OPC_MoveParent,
    2744             : /*5536*/          OPC_RecordChild1, // #1 = $Vn
    2745             : /*5537*/          OPC_CheckType, MVT::v4i32,
    2746             : /*5539*/          OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2747             : /*5541*/          OPC_EmitInteger, MVT::i32, 14, 
    2748             : /*5544*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2749             : /*5547*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::VORNq), 0,
    2750             :                       MVT::v4i32, 4/*#Ops*/, 1, 0, 2, 3, 
    2751             :                   // Src: (or:v4i32 (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vm), QPR:v4i32:$Vn) - Complexity = 16
    2752             :                   // Dst: (VORNq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2753             : /*5557*/        0, /*End of Scope*/
    2754             : /*5558*/      /*Scope*/ 44, /*->5603*/
    2755             : /*5559*/        OPC_RecordChild0, // #0 = $Vn
    2756             : /*5560*/        OPC_RecordChild1, // #1 = $Vm
    2757             : /*5561*/        OPC_SwitchType /*2 cases */, 18, MVT::v2i32,// ->5582
    2758             : /*5564*/          OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2759             : /*5566*/          OPC_EmitInteger, MVT::i32, 14, 
    2760             : /*5569*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2761             : /*5572*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::VORRd), 0,
    2762             :                       MVT::v2i32, 4/*#Ops*/, 0, 1, 2, 3, 
    2763             :                   // Src: (or:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm) - Complexity = 3
    2764             :                   // Dst: (VORRd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    2765             : /*5582*/        /*SwitchType*/ 18, MVT::v4i32,// ->5602
    2766             : /*5584*/          OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    2767             : /*5586*/          OPC_EmitInteger, MVT::i32, 14, 
    2768             : /*5589*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2769             : /*5592*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::VORRq), 0,
    2770             :                       MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    2771             :                   // Src: (or:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm) - Complexity = 3
    2772             :                   // Dst: (VORRq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    2773             : /*5602*/        0, // EndSwitchType
    2774             : /*5603*/      0, /*End of Scope*/
    2775             : /*5604*/    /*SwitchOpcode*/ 114|128,77/*9970*/, TARGET_VAL(ISD::ADD),// ->15578
    2776             : /*5608*/      OPC_Scope, 0|128,3/*384*/, /*->5995*/ // 51 children in Scope
    2777             : /*5611*/        OPC_RecordChild0, // #0 = $Rn
    2778             : /*5612*/        OPC_MoveChild1,
    2779             : /*5613*/        OPC_Scope, 46, /*->5661*/ // 8 children in Scope
    2780             : /*5615*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    2781             : /*5618*/          OPC_MoveChild0,
    2782             : /*5619*/          OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    2783             : /*5622*/          OPC_RecordChild0, // #1 = $Rm
    2784             : /*5623*/          OPC_RecordChild1, // #2 = $rot
    2785             : /*5624*/          OPC_MoveChild1,
    2786             : /*5625*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2787             : /*5628*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    2788             : /*5630*/          OPC_CheckType, MVT::i32,
    2789             : /*5632*/          OPC_MoveParent,
    2790             : /*5633*/          OPC_MoveParent,
    2791             : /*5634*/          OPC_MoveParent,
    2792             : /*5635*/          OPC_CheckType, MVT::i32,
    2793             : /*5637*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    2794             : /*5639*/          OPC_EmitConvertToTarget, 2,
    2795             : /*5641*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2796             : /*5644*/          OPC_EmitInteger, MVT::i32, 14, 
    2797             : /*5647*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2798             : /*5650*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAB), 0,
    2799             :                       MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    2800             :                   // Src: (add:i32 GPR:i32:$Rn, (and:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32)) - Complexity = 34
    2801             :                   // Dst: (UXTAB:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    2802             : /*5661*/        /*Scope*/ 47, /*->5709*/
    2803             : /*5662*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    2804             : /*5666*/          OPC_MoveChild0,
    2805             : /*5667*/          OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    2806             : /*5670*/          OPC_RecordChild0, // #1 = $Rm
    2807             : /*5671*/          OPC_RecordChild1, // #2 = $rot
    2808             : /*5672*/          OPC_MoveChild1,
    2809             : /*5673*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2810             : /*5676*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    2811             : /*5678*/          OPC_CheckType, MVT::i32,
    2812             : /*5680*/          OPC_MoveParent,
    2813             : /*5681*/          OPC_MoveParent,
    2814             : /*5682*/          OPC_MoveParent,
    2815             : /*5683*/          OPC_CheckType, MVT::i32,
    2816             : /*5685*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    2817             : /*5687*/          OPC_EmitConvertToTarget, 2,
    2818             : /*5689*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2819             : /*5692*/          OPC_EmitInteger, MVT::i32, 14, 
    2820             : /*5695*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2821             : /*5698*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAH), 0,
    2822             :                       MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    2823             :                   // Src: (add:i32 GPR:i32:$Rn, (and:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 65535:i32)) - Complexity = 34
    2824             :                   // Dst: (UXTAH:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    2825             : /*5709*/        /*Scope*/ 46, /*->5756*/
    2826             : /*5710*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    2827             : /*5713*/          OPC_MoveChild0,
    2828             : /*5714*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    2829             : /*5717*/          OPC_RecordChild0, // #1 = $Rm
    2830             : /*5718*/          OPC_RecordChild1, // #2 = $rot
    2831             : /*5719*/          OPC_MoveChild1,
    2832             : /*5720*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2833             : /*5723*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    2834             : /*5725*/          OPC_CheckType, MVT::i32,
    2835             : /*5727*/          OPC_MoveParent,
    2836             : /*5728*/          OPC_MoveParent,
    2837             : /*5729*/          OPC_MoveParent,
    2838             : /*5730*/          OPC_CheckType, MVT::i32,
    2839             : /*5732*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    2840             : /*5734*/          OPC_EmitConvertToTarget, 2,
    2841             : /*5736*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2842             : /*5739*/          OPC_EmitInteger, MVT::i32, 14, 
    2843             : /*5742*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2844             : /*5745*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAB), 0,
    2845             :                       MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    2846             :                   // Src: (add:i32 rGPR:i32:$Rn, (and:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32)) - Complexity = 34
    2847             :                   // Dst: (UXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    2848             : /*5756*/        /*Scope*/ 47, /*->5804*/
    2849             : /*5757*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    2850             : /*5761*/          OPC_MoveChild0,
    2851             : /*5762*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    2852             : /*5765*/          OPC_RecordChild0, // #1 = $Rm
    2853             : /*5766*/          OPC_RecordChild1, // #2 = $rot
    2854             : /*5767*/          OPC_MoveChild1,
    2855             : /*5768*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2856             : /*5771*/          OPC_CheckPredicate, 11, // Predicate_imm8_or_16
    2857             : /*5773*/          OPC_CheckType, MVT::i32,
    2858             : /*5775*/          OPC_MoveParent,
    2859             : /*5776*/          OPC_MoveParent,
    2860             : /*5777*/          OPC_MoveParent,
    2861             : /*5778*/          OPC_CheckType, MVT::i32,
    2862             : /*5780*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    2863             : /*5782*/          OPC_EmitConvertToTarget, 2,
    2864             : /*5784*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2865             : /*5787*/          OPC_EmitInteger, MVT::i32, 14, 
    2866             : /*5790*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2867             : /*5793*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAH), 0,
    2868             :                       MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    2869             :                   // Src: (add:i32 rGPR:i32:$Rn, (and:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm8_or_16>>:$rot), 65535:i32)) - Complexity = 34
    2870             :                   // Dst: (UXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    2871             : /*5804*/        /*Scope*/ 46, /*->5851*/
    2872             : /*5805*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    2873             : /*5808*/          OPC_MoveChild0,
    2874             : /*5809*/          OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    2875             : /*5812*/          OPC_RecordChild0, // #1 = $Rm
    2876             : /*5813*/          OPC_RecordChild1, // #2 = $rot
    2877             : /*5814*/          OPC_MoveChild1,
    2878             : /*5815*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2879             : /*5818*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    2880             : /*5820*/          OPC_CheckType, MVT::i32,
    2881             : /*5822*/          OPC_MoveParent,
    2882             : /*5823*/          OPC_MoveParent,
    2883             : /*5824*/          OPC_MoveParent,
    2884             : /*5825*/          OPC_CheckType, MVT::i32,
    2885             : /*5827*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    2886             : /*5829*/          OPC_EmitConvertToTarget, 2,
    2887             : /*5831*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2888             : /*5834*/          OPC_EmitInteger, MVT::i32, 14, 
    2889             : /*5837*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2890             : /*5840*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAB), 0,
    2891             :                       MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    2892             :                   // Src: (add:i32 rGPR:i32:$Rn, (and:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32)) - Complexity = 34
    2893             :                   // Dst: (t2UXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    2894             : /*5851*/        /*Scope*/ 47, /*->5899*/
    2895             : /*5852*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    2896             : /*5856*/          OPC_MoveChild0,
    2897             : /*5857*/          OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    2898             : /*5860*/          OPC_RecordChild0, // #1 = $Rm
    2899             : /*5861*/          OPC_RecordChild1, // #2 = $rot
    2900             : /*5862*/          OPC_MoveChild1,
    2901             : /*5863*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2902             : /*5866*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    2903             : /*5868*/          OPC_CheckType, MVT::i32,
    2904             : /*5870*/          OPC_MoveParent,
    2905             : /*5871*/          OPC_MoveParent,
    2906             : /*5872*/          OPC_MoveParent,
    2907             : /*5873*/          OPC_CheckType, MVT::i32,
    2908             : /*5875*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    2909             : /*5877*/          OPC_EmitConvertToTarget, 2,
    2910             : /*5879*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2911             : /*5882*/          OPC_EmitInteger, MVT::i32, 14, 
    2912             : /*5885*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2913             : /*5888*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAH), 0,
    2914             :                       MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    2915             :                   // Src: (add:i32 rGPR:i32:$Rn, (and:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 65535:i32)) - Complexity = 34
    2916             :                   // Dst: (t2UXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    2917             : /*5899*/        /*Scope*/ 46, /*->5946*/
    2918             : /*5900*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    2919             : /*5903*/          OPC_MoveChild0,
    2920             : /*5904*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    2921             : /*5907*/          OPC_RecordChild0, // #1 = $Rm
    2922             : /*5908*/          OPC_RecordChild1, // #2 = $rot
    2923             : /*5909*/          OPC_MoveChild1,
    2924             : /*5910*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2925             : /*5913*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    2926             : /*5915*/          OPC_CheckType, MVT::i32,
    2927             : /*5917*/          OPC_MoveParent,
    2928             : /*5918*/          OPC_MoveParent,
    2929             : /*5919*/          OPC_MoveParent,
    2930             : /*5920*/          OPC_CheckType, MVT::i32,
    2931             : /*5922*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    2932             : /*5924*/          OPC_EmitConvertToTarget, 2,
    2933             : /*5926*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2934             : /*5929*/          OPC_EmitInteger, MVT::i32, 14, 
    2935             : /*5932*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2936             : /*5935*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAB), 0,
    2937             :                       MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    2938             :                   // Src: (add:i32 rGPR:i32:$Rn, (and:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32)) - Complexity = 34
    2939             :                   // Dst: (t2UXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    2940             : /*5946*/        /*Scope*/ 47, /*->5994*/
    2941             : /*5947*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    2942             : /*5951*/          OPC_MoveChild0,
    2943             : /*5952*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    2944             : /*5955*/          OPC_RecordChild0, // #1 = $Rm
    2945             : /*5956*/          OPC_RecordChild1, // #2 = $rot
    2946             : /*5957*/          OPC_MoveChild1,
    2947             : /*5958*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2948             : /*5961*/          OPC_CheckPredicate, 11, // Predicate_imm8_or_16
    2949             : /*5963*/          OPC_CheckType, MVT::i32,
    2950             : /*5965*/          OPC_MoveParent,
    2951             : /*5966*/          OPC_MoveParent,
    2952             : /*5967*/          OPC_MoveParent,
    2953             : /*5968*/          OPC_CheckType, MVT::i32,
    2954             : /*5970*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    2955             : /*5972*/          OPC_EmitConvertToTarget, 2,
    2956             : /*5974*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2957             : /*5977*/          OPC_EmitInteger, MVT::i32, 14, 
    2958             : /*5980*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2959             : /*5983*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAH), 0,
    2960             :                       MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    2961             :                   // Src: (add:i32 rGPR:i32:$Rn, (and:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm8_or_16>>:$rot), 65535:i32)) - Complexity = 34
    2962             :                   // Dst: (t2UXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    2963             : /*5994*/        0, /*End of Scope*/
    2964             : /*5995*/      /*Scope*/ 7|128,3/*391*/, /*->6388*/
    2965             : /*5997*/        OPC_MoveChild0,
    2966             : /*5998*/        OPC_Scope, 47, /*->6047*/ // 8 children in Scope
    2967             : /*6000*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    2968             : /*6003*/          OPC_MoveChild0,
    2969             : /*6004*/          OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    2970             : /*6007*/          OPC_RecordChild0, // #0 = $Rm
    2971             : /*6008*/          OPC_RecordChild1, // #1 = $rot
    2972             : /*6009*/          OPC_MoveChild1,
    2973             : /*6010*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2974             : /*6013*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    2975             : /*6015*/          OPC_CheckType, MVT::i32,
    2976             : /*6017*/          OPC_MoveParent,
    2977             : /*6018*/          OPC_MoveParent,
    2978             : /*6019*/          OPC_MoveParent,
    2979             : /*6020*/          OPC_RecordChild1, // #2 = $Rn
    2980             : /*6021*/          OPC_CheckType, MVT::i32,
    2981             : /*6023*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    2982             : /*6025*/          OPC_EmitConvertToTarget, 1,
    2983             : /*6027*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    2984             : /*6030*/          OPC_EmitInteger, MVT::i32, 14, 
    2985             : /*6033*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    2986             : /*6036*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAB), 0,
    2987             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    2988             :                   // Src: (add:i32 (and:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32), GPR:i32:$Rn) - Complexity = 34
    2989             :                   // Dst: (UXTAB:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    2990             : /*6047*/        /*Scope*/ 48, /*->6096*/
    2991             : /*6048*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    2992             : /*6052*/          OPC_MoveChild0,
    2993             : /*6053*/          OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    2994             : /*6056*/          OPC_RecordChild0, // #0 = $Rm
    2995             : /*6057*/          OPC_RecordChild1, // #1 = $rot
    2996             : /*6058*/          OPC_MoveChild1,
    2997             : /*6059*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2998             : /*6062*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    2999             : /*6064*/          OPC_CheckType, MVT::i32,
    3000             : /*6066*/          OPC_MoveParent,
    3001             : /*6067*/          OPC_MoveParent,
    3002             : /*6068*/          OPC_MoveParent,
    3003             : /*6069*/          OPC_RecordChild1, // #2 = $Rn
    3004             : /*6070*/          OPC_CheckType, MVT::i32,
    3005             : /*6072*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3006             : /*6074*/          OPC_EmitConvertToTarget, 1,
    3007             : /*6076*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3008             : /*6079*/          OPC_EmitInteger, MVT::i32, 14, 
    3009             : /*6082*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3010             : /*6085*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAH), 0,
    3011             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    3012             :                   // Src: (add:i32 (and:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 65535:i32), GPR:i32:$Rn) - Complexity = 34
    3013             :                   // Dst: (UXTAH:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    3014             : /*6096*/        /*Scope*/ 47, /*->6144*/
    3015             : /*6097*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    3016             : /*6100*/          OPC_MoveChild0,
    3017             : /*6101*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    3018             : /*6104*/          OPC_RecordChild0, // #0 = $Rm
    3019             : /*6105*/          OPC_RecordChild1, // #1 = $rot
    3020             : /*6106*/          OPC_MoveChild1,
    3021             : /*6107*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3022             : /*6110*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    3023             : /*6112*/          OPC_CheckType, MVT::i32,
    3024             : /*6114*/          OPC_MoveParent,
    3025             : /*6115*/          OPC_MoveParent,
    3026             : /*6116*/          OPC_MoveParent,
    3027             : /*6117*/          OPC_RecordChild1, // #2 = $Rn
    3028             : /*6118*/          OPC_CheckType, MVT::i32,
    3029             : /*6120*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3030             : /*6122*/          OPC_EmitConvertToTarget, 1,
    3031             : /*6124*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3032             : /*6127*/          OPC_EmitInteger, MVT::i32, 14, 
    3033             : /*6130*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3034             : /*6133*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAB), 0,
    3035             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    3036             :                   // Src: (add:i32 (and:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32), rGPR:i32:$Rn) - Complexity = 34
    3037             :                   // Dst: (UXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3038             : /*6144*/        /*Scope*/ 48, /*->6193*/
    3039             : /*6145*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    3040             : /*6149*/          OPC_MoveChild0,
    3041             : /*6150*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    3042             : /*6153*/          OPC_RecordChild0, // #0 = $Rm
    3043             : /*6154*/          OPC_RecordChild1, // #1 = $rot
    3044             : /*6155*/          OPC_MoveChild1,
    3045             : /*6156*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3046             : /*6159*/          OPC_CheckPredicate, 11, // Predicate_imm8_or_16
    3047             : /*6161*/          OPC_CheckType, MVT::i32,
    3048             : /*6163*/          OPC_MoveParent,
    3049             : /*6164*/          OPC_MoveParent,
    3050             : /*6165*/          OPC_MoveParent,
    3051             : /*6166*/          OPC_RecordChild1, // #2 = $Rn
    3052             : /*6167*/          OPC_CheckType, MVT::i32,
    3053             : /*6169*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3054             : /*6171*/          OPC_EmitConvertToTarget, 1,
    3055             : /*6173*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3056             : /*6176*/          OPC_EmitInteger, MVT::i32, 14, 
    3057             : /*6179*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3058             : /*6182*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAH), 0,
    3059             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    3060             :                   // Src: (add:i32 (and:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm8_or_16>>:$rot), 65535:i32), rGPR:i32:$Rn) - Complexity = 34
    3061             :                   // Dst: (UXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3062             : /*6193*/        /*Scope*/ 47, /*->6241*/
    3063             : /*6194*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    3064             : /*6197*/          OPC_MoveChild0,
    3065             : /*6198*/          OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    3066             : /*6201*/          OPC_RecordChild0, // #0 = $Rm
    3067             : /*6202*/          OPC_RecordChild1, // #1 = $rot
    3068             : /*6203*/          OPC_MoveChild1,
    3069             : /*6204*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3070             : /*6207*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    3071             : /*6209*/          OPC_CheckType, MVT::i32,
    3072             : /*6211*/          OPC_MoveParent,
    3073             : /*6212*/          OPC_MoveParent,
    3074             : /*6213*/          OPC_MoveParent,
    3075             : /*6214*/          OPC_RecordChild1, // #2 = $Rn
    3076             : /*6215*/          OPC_CheckType, MVT::i32,
    3077             : /*6217*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3078             : /*6219*/          OPC_EmitConvertToTarget, 1,
    3079             : /*6221*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3080             : /*6224*/          OPC_EmitInteger, MVT::i32, 14, 
    3081             : /*6227*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3082             : /*6230*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAB), 0,
    3083             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    3084             :                   // Src: (add:i32 (and:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32), rGPR:i32:$Rn) - Complexity = 34
    3085             :                   // Dst: (t2UXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3086             : /*6241*/        /*Scope*/ 48, /*->6290*/
    3087             : /*6242*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    3088             : /*6246*/          OPC_MoveChild0,
    3089             : /*6247*/          OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    3090             : /*6250*/          OPC_RecordChild0, // #0 = $Rm
    3091             : /*6251*/          OPC_RecordChild1, // #1 = $rot
    3092             : /*6252*/          OPC_MoveChild1,
    3093             : /*6253*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3094             : /*6256*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    3095             : /*6258*/          OPC_CheckType, MVT::i32,
    3096             : /*6260*/          OPC_MoveParent,
    3097             : /*6261*/          OPC_MoveParent,
    3098             : /*6262*/          OPC_MoveParent,
    3099             : /*6263*/          OPC_RecordChild1, // #2 = $Rn
    3100             : /*6264*/          OPC_CheckType, MVT::i32,
    3101             : /*6266*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3102             : /*6268*/          OPC_EmitConvertToTarget, 1,
    3103             : /*6270*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3104             : /*6273*/          OPC_EmitInteger, MVT::i32, 14, 
    3105             : /*6276*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3106             : /*6279*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAH), 0,
    3107             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    3108             :                   // Src: (add:i32 (and:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 65535:i32), rGPR:i32:$Rn) - Complexity = 34
    3109             :                   // Dst: (t2UXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3110             : /*6290*/        /*Scope*/ 47, /*->6338*/
    3111             : /*6291*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    3112             : /*6294*/          OPC_MoveChild0,
    3113             : /*6295*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    3114             : /*6298*/          OPC_RecordChild0, // #0 = $Rm
    3115             : /*6299*/          OPC_RecordChild1, // #1 = $rot
    3116             : /*6300*/          OPC_MoveChild1,
    3117             : /*6301*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3118             : /*6304*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    3119             : /*6306*/          OPC_CheckType, MVT::i32,
    3120             : /*6308*/          OPC_MoveParent,
    3121             : /*6309*/          OPC_MoveParent,
    3122             : /*6310*/          OPC_MoveParent,
    3123             : /*6311*/          OPC_RecordChild1, // #2 = $Rn
    3124             : /*6312*/          OPC_CheckType, MVT::i32,
    3125             : /*6314*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3126             : /*6316*/          OPC_EmitConvertToTarget, 1,
    3127             : /*6318*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3128             : /*6321*/          OPC_EmitInteger, MVT::i32, 14, 
    3129             : /*6324*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3130             : /*6327*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAB), 0,
    3131             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    3132             :                   // Src: (add:i32 (and:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32), rGPR:i32:$Rn) - Complexity = 34
    3133             :                   // Dst: (t2UXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3134             : /*6338*/        /*Scope*/ 48, /*->6387*/
    3135             : /*6339*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    3136             : /*6343*/          OPC_MoveChild0,
    3137             : /*6344*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    3138             : /*6347*/          OPC_RecordChild0, // #0 = $Rm
    3139             : /*6348*/          OPC_RecordChild1, // #1 = $rot
    3140             : /*6349*/          OPC_MoveChild1,
    3141             : /*6350*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3142             : /*6353*/          OPC_CheckPredicate, 11, // Predicate_imm8_or_16
    3143             : /*6355*/          OPC_CheckType, MVT::i32,
    3144             : /*6357*/          OPC_MoveParent,
    3145             : /*6358*/          OPC_MoveParent,
    3146             : /*6359*/          OPC_MoveParent,
    3147             : /*6360*/          OPC_RecordChild1, // #2 = $Rn
    3148             : /*6361*/          OPC_CheckType, MVT::i32,
    3149             : /*6363*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3150             : /*6365*/          OPC_EmitConvertToTarget, 1,
    3151             : /*6367*/          OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3152             : /*6370*/          OPC_EmitInteger, MVT::i32, 14, 
    3153             : /*6373*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3154             : /*6376*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAH), 0,
    3155             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    3156             :                   // Src: (add:i32 (and:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm8_or_16>>:$rot), 65535:i32), rGPR:i32:$Rn) - Complexity = 34
    3157             :                   // Dst: (t2UXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3158             : /*6387*/        0, /*End of Scope*/
    3159             : /*6388*/      /*Scope*/ 126, /*->6515*/
    3160             : /*6389*/        OPC_RecordChild0, // #0 = $Rn
    3161             : /*6390*/        OPC_MoveChild1,
    3162             : /*6391*/        OPC_Scope, 29, /*->6422*/ // 4 children in Scope
    3163             : /*6393*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    3164             : /*6396*/          OPC_RecordChild0, // #1 = $Rm
    3165             : /*6397*/          OPC_MoveParent,
    3166             : /*6398*/          OPC_CheckType, MVT::i32,
    3167             : /*6400*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3168             : /*6402*/          OPC_EmitInteger, MVT::i32, 0, 
    3169             : /*6405*/          OPC_EmitInteger, MVT::i32, 14, 
    3170             : /*6408*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3171             : /*6411*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAB), 0,
    3172             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3173             :                   // Src: (add:i32 GPR:i32:$Rn, (and:i32 GPR:i32:$Rm, 255:i32)) - Complexity = 27
    3174             :                   // Dst: (UXTAB:i32 GPR:i32:$Rn, GPR:i32:$Rm, 0:i32)
    3175             : /*6422*/        /*Scope*/ 30, /*->6453*/
    3176             : /*6423*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    3177             : /*6427*/          OPC_RecordChild0, // #1 = $Rm
    3178             : /*6428*/          OPC_MoveParent,
    3179             : /*6429*/          OPC_CheckType, MVT::i32,
    3180             : /*6431*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3181             : /*6433*/          OPC_EmitInteger, MVT::i32, 0, 
    3182             : /*6436*/          OPC_EmitInteger, MVT::i32, 14, 
    3183             : /*6439*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3184             : /*6442*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAH), 0,
    3185             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3186             :                   // Src: (add:i32 GPR:i32:$Rn, (and:i32 GPR:i32:$Rm, 65535:i32)) - Complexity = 27
    3187             :                   // Dst: (UXTAH:i32 GPR:i32:$Rn, GPR:i32:$Rm, 0:i32)
    3188             : /*6453*/        /*Scope*/ 29, /*->6483*/
    3189             : /*6454*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    3190             : /*6457*/          OPC_RecordChild0, // #1 = $Rm
    3191             : /*6458*/          OPC_MoveParent,
    3192             : /*6459*/          OPC_CheckType, MVT::i32,
    3193             : /*6461*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3194             : /*6463*/          OPC_EmitInteger, MVT::i32, 0, 
    3195             : /*6466*/          OPC_EmitInteger, MVT::i32, 14, 
    3196             : /*6469*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3197             : /*6472*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAB), 0,
    3198             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3199             :                   // Src: (add:i32 rGPR:i32:$Rn, (and:i32 rGPR:i32:$Rm, 255:i32)) - Complexity = 27
    3200             :                   // Dst: (t2UXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 0:i32)
    3201             : /*6483*/        /*Scope*/ 30, /*->6514*/
    3202             : /*6484*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    3203             : /*6488*/          OPC_RecordChild0, // #1 = $Rm
    3204             : /*6489*/          OPC_MoveParent,
    3205             : /*6490*/          OPC_CheckType, MVT::i32,
    3206             : /*6492*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3207             : /*6494*/          OPC_EmitInteger, MVT::i32, 0, 
    3208             : /*6497*/          OPC_EmitInteger, MVT::i32, 14, 
    3209             : /*6500*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3210             : /*6503*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAH), 0,
    3211             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3212             :                   // Src: (add:i32 rGPR:i32:$Rn, (and:i32 rGPR:i32:$Rm, 65535:i32)) - Complexity = 27
    3213             :                   // Dst: (t2UXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 0:i32)
    3214             : /*6514*/        0, /*End of Scope*/
    3215             : /*6515*/      /*Scope*/ 1|128,1/*129*/, /*->6646*/
    3216             : /*6517*/        OPC_MoveChild0,
    3217             : /*6518*/        OPC_Scope, 30, /*->6550*/ // 4 children in Scope
    3218             : /*6520*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    3219             : /*6523*/          OPC_RecordChild0, // #0 = $Rm
    3220             : /*6524*/          OPC_MoveParent,
    3221             : /*6525*/          OPC_RecordChild1, // #1 = $Rn
    3222             : /*6526*/          OPC_CheckType, MVT::i32,
    3223             : /*6528*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3224             : /*6530*/          OPC_EmitInteger, MVT::i32, 0, 
    3225             : /*6533*/          OPC_EmitInteger, MVT::i32, 14, 
    3226             : /*6536*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3227             : /*6539*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAB), 0,
    3228             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3229             :                   // Src: (add:i32 (and:i32 GPR:i32:$Rm, 255:i32), GPR:i32:$Rn) - Complexity = 27
    3230             :                   // Dst: (UXTAB:i32 GPR:i32:$Rn, GPR:i32:$Rm, 0:i32)
    3231             : /*6550*/        /*Scope*/ 31, /*->6582*/
    3232             : /*6551*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    3233             : /*6555*/          OPC_RecordChild0, // #0 = $Rm
    3234             : /*6556*/          OPC_MoveParent,
    3235             : /*6557*/          OPC_RecordChild1, // #1 = $Rn
    3236             : /*6558*/          OPC_CheckType, MVT::i32,
    3237             : /*6560*/          OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3238             : /*6562*/          OPC_EmitInteger, MVT::i32, 0, 
    3239             : /*6565*/          OPC_EmitInteger, MVT::i32, 14, 
    3240             : /*6568*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3241             : /*6571*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTAH), 0,
    3242             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3243             :                   // Src: (add:i32 (and:i32 GPR:i32:$Rm, 65535:i32), GPR:i32:$Rn) - Complexity = 27
    3244             :                   // Dst: (UXTAH:i32 GPR:i32:$Rn, GPR:i32:$Rm, 0:i32)
    3245             : /*6582*/        /*Scope*/ 30, /*->6613*/
    3246             : /*6583*/          OPC_CheckAndImm, 127|128,1/*255*/, 
    3247             : /*6586*/          OPC_RecordChild0, // #0 = $Rm
    3248             : /*6587*/          OPC_MoveParent,
    3249             : /*6588*/          OPC_RecordChild1, // #1 = $Rn
    3250             : /*6589*/          OPC_CheckType, MVT::i32,
    3251             : /*6591*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3252             : /*6593*/          OPC_EmitInteger, MVT::i32, 0, 
    3253             : /*6596*/          OPC_EmitInteger, MVT::i32, 14, 
    3254             : /*6599*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3255             : /*6602*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAB), 0,
    3256             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3257             :                   // Src: (add:i32 (and:i32 rGPR:i32:$Rm, 255:i32), rGPR:i32:$Rn) - Complexity = 27
    3258             :                   // Dst: (t2UXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 0:i32)
    3259             : /*6613*/        /*Scope*/ 31, /*->6645*/
    3260             : /*6614*/          OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    3261             : /*6618*/          OPC_RecordChild0, // #0 = $Rm
    3262             : /*6619*/          OPC_MoveParent,
    3263             : /*6620*/          OPC_RecordChild1, // #1 = $Rn
    3264             : /*6621*/          OPC_CheckType, MVT::i32,
    3265             : /*6623*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3266             : /*6625*/          OPC_EmitInteger, MVT::i32, 0, 
    3267             : /*6628*/          OPC_EmitInteger, MVT::i32, 14, 
    3268             : /*6631*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3269             : /*6634*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTAH), 0,
    3270             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3271             :                   // Src: (add:i32 (and:i32 rGPR:i32:$Rm, 65535:i32), rGPR:i32:$Rn) - Complexity = 27
    3272             :                   // Dst: (t2UXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 0:i32)
    3273             : /*6645*/        0, /*End of Scope*/
    3274             : /*6646*/      /*Scope*/ 108, /*->6755*/
    3275             : /*6647*/        OPC_RecordChild0, // #0 = $Rn
    3276             : /*6648*/        OPC_MoveChild1,
    3277             : /*6649*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    3278             : /*6652*/        OPC_MoveChild0,
    3279             : /*6653*/        OPC_CheckOpcode, TARGET_VAL(ISD::OR),
    3280             : /*6656*/        OPC_MoveChild0,
    3281             : /*6657*/        OPC_SwitchOpcode /*2 cases */, 45, TARGET_VAL(ISD::SRL),// ->6706
    3282             : /*6661*/          OPC_RecordChild0, // #1 = $Rm
    3283             : /*6662*/          OPC_CheckChild1Integer, 24, 
    3284             : /*6664*/          OPC_CheckChild1Type, MVT::i32,
    3285             : /*6666*/          OPC_MoveParent,
    3286             : /*6667*/          OPC_MoveChild1,
    3287             : /*6668*/          OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
    3288             : /*6671*/          OPC_CheckChild0Same, 1,
    3289             : /*6673*/          OPC_CheckChild1Integer, 8, 
    3290             : /*6675*/          OPC_CheckChild1Type, MVT::i32,
    3291             : /*6677*/          OPC_MoveParent,
    3292             : /*6678*/          OPC_MoveParent,
    3293             : /*6679*/          OPC_MoveChild1,
    3294             : /*6680*/          OPC_CheckValueType, MVT::i16,
    3295             : /*6682*/          OPC_MoveParent,
    3296             : /*6683*/          OPC_MoveParent,
    3297             : /*6684*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3298             : /*6686*/          OPC_EmitInteger, MVT::i32, 3, 
    3299             : /*6689*/          OPC_EmitInteger, MVT::i32, 14, 
    3300             : /*6692*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3301             : /*6695*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    3302             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3303             :                   // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (or:i32 (srl:i32 rGPR:i32:$Rm, 24:i32), (shl:i32 rGPR:i32:$Rm, 8:i32)), i16:Other)) - Complexity = 25
    3304             :                   // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 3:i32)
    3305             : /*6706*/        /*SwitchOpcode*/ 45, TARGET_VAL(ISD::SHL),// ->6754
    3306             : /*6709*/          OPC_RecordChild0, // #1 = $Rm
    3307             : /*6710*/          OPC_CheckChild1Integer, 8, 
    3308             : /*6712*/          OPC_CheckChild1Type, MVT::i32,
    3309             : /*6714*/          OPC_MoveParent,
    3310             : /*6715*/          OPC_MoveChild1,
    3311             : /*6716*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    3312             : /*6719*/          OPC_CheckChild0Same, 1,
    3313             : /*6721*/          OPC_CheckChild1Integer, 24, 
    3314             : /*6723*/          OPC_CheckChild1Type, MVT::i32,
    3315             : /*6725*/          OPC_MoveParent,
    3316             : /*6726*/          OPC_MoveParent,
    3317             : /*6727*/          OPC_MoveChild1,
    3318             : /*6728*/          OPC_CheckValueType, MVT::i16,
    3319             : /*6730*/          OPC_MoveParent,
    3320             : /*6731*/          OPC_MoveParent,
    3321             : /*6732*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3322             : /*6734*/          OPC_EmitInteger, MVT::i32, 3, 
    3323             : /*6737*/          OPC_EmitInteger, MVT::i32, 14, 
    3324             : /*6740*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3325             : /*6743*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    3326             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3327             :                   // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (or:i32 (shl:i32 rGPR:i32:$Rm, 8:i32), (srl:i32 rGPR:i32:$Rm, 24:i32)), i16:Other)) - Complexity = 25
    3328             :                   // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 3:i32)
    3329             : /*6754*/        0, // EndSwitchOpcode
    3330             : /*6755*/      /*Scope*/ 109, /*->6865*/
    3331             : /*6756*/        OPC_MoveChild0,
    3332             : /*6757*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    3333             : /*6760*/        OPC_MoveChild0,
    3334             : /*6761*/        OPC_CheckOpcode, TARGET_VAL(ISD::OR),
    3335             : /*6764*/        OPC_MoveChild0,
    3336             : /*6765*/        OPC_SwitchOpcode /*2 cases */, 46, TARGET_VAL(ISD::SRL),// ->6815
    3337             : /*6769*/          OPC_RecordChild0, // #0 = $Rm
    3338             : /*6770*/          OPC_CheckChild1Integer, 24, 
    3339             : /*6772*/          OPC_CheckChild1Type, MVT::i32,
    3340             : /*6774*/          OPC_MoveParent,
    3341             : /*6775*/          OPC_MoveChild1,
    3342             : /*6776*/          OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
    3343             : /*6779*/          OPC_CheckChild0Same, 0,
    3344             : /*6781*/          OPC_CheckChild1Integer, 8, 
    3345             : /*6783*/          OPC_CheckChild1Type, MVT::i32,
    3346             : /*6785*/          OPC_MoveParent,
    3347             : /*6786*/          OPC_MoveParent,
    3348             : /*6787*/          OPC_MoveChild1,
    3349             : /*6788*/          OPC_CheckValueType, MVT::i16,
    3350             : /*6790*/          OPC_MoveParent,
    3351             : /*6791*/          OPC_MoveParent,
    3352             : /*6792*/          OPC_RecordChild1, // #1 = $Rn
    3353             : /*6793*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3354             : /*6795*/          OPC_EmitInteger, MVT::i32, 3, 
    3355             : /*6798*/          OPC_EmitInteger, MVT::i32, 14, 
    3356             : /*6801*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3357             : /*6804*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    3358             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3359             :                   // Src: (add:i32 (sext_inreg:i32 (or:i32 (srl:i32 rGPR:i32:$Rm, 24:i32), (shl:i32 rGPR:i32:$Rm, 8:i32)), i16:Other), rGPR:i32:$Rn) - Complexity = 25
    3360             :                   // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 3:i32)
    3361             : /*6815*/        /*SwitchOpcode*/ 46, TARGET_VAL(ISD::SHL),// ->6864
    3362             : /*6818*/          OPC_RecordChild0, // #0 = $Rm
    3363             : /*6819*/          OPC_CheckChild1Integer, 8, 
    3364             : /*6821*/          OPC_CheckChild1Type, MVT::i32,
    3365             : /*6823*/          OPC_MoveParent,
    3366             : /*6824*/          OPC_MoveChild1,
    3367             : /*6825*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    3368             : /*6828*/          OPC_CheckChild0Same, 0,
    3369             : /*6830*/          OPC_CheckChild1Integer, 24, 
    3370             : /*6832*/          OPC_CheckChild1Type, MVT::i32,
    3371             : /*6834*/          OPC_MoveParent,
    3372             : /*6835*/          OPC_MoveParent,
    3373             : /*6836*/          OPC_MoveChild1,
    3374             : /*6837*/          OPC_CheckValueType, MVT::i16,
    3375             : /*6839*/          OPC_MoveParent,
    3376             : /*6840*/          OPC_MoveParent,
    3377             : /*6841*/          OPC_RecordChild1, // #1 = $Rn
    3378             : /*6842*/          OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3379             : /*6844*/          OPC_EmitInteger, MVT::i32, 3, 
    3380             : /*6847*/          OPC_EmitInteger, MVT::i32, 14, 
    3381             : /*6850*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3382             : /*6853*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    3383             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3384             :                   // Src: (add:i32 (sext_inreg:i32 (or:i32 (shl:i32 rGPR:i32:$Rm, 8:i32), (srl:i32 rGPR:i32:$Rm, 24:i32)), i16:Other), rGPR:i32:$Rn) - Complexity = 25
    3385             :                   // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 3:i32)
    3386             : /*6864*/        0, // EndSwitchOpcode
    3387             : /*6865*/      /*Scope*/ 70, /*->6936*/
    3388             : /*6866*/        OPC_RecordChild0, // #0 = $Ra
    3389             : /*6867*/        OPC_MoveChild1,
    3390             : /*6868*/        OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    3391             : /*6871*/        OPC_MoveChild0,
    3392             : /*6872*/        OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3393             : /*6875*/        OPC_RecordChild0, // #1 = $Rn
    3394             : /*6876*/        OPC_CheckChild1Integer, 16, 
    3395             : /*6878*/        OPC_CheckChild1Type, MVT::i32,
    3396             : /*6880*/        OPC_MoveParent,
    3397             : /*6881*/        OPC_MoveChild1,
    3398             : /*6882*/        OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3399             : /*6885*/        OPC_RecordChild0, // #2 = $Rm
    3400             : /*6886*/        OPC_CheckChild1Integer, 16, 
    3401             : /*6888*/        OPC_CheckChild1Type, MVT::i32,
    3402             : /*6890*/        OPC_MoveParent,
    3403             : /*6891*/        OPC_MoveParent,
    3404             : /*6892*/        OPC_CheckType, MVT::i32,
    3405             : /*6894*/        OPC_Scope, 19, /*->6915*/ // 2 children in Scope
    3406             : /*6896*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3407             : /*6898*/          OPC_EmitInteger, MVT::i32, 14, 
    3408             : /*6901*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3409             : /*6904*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLATT), 0,
    3410             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3411             :                   // Src: (add:i32 GPR:i32:$Ra, (mul:i32 (sra:i32 GPRnopc:i32:$Rn, 16:i32), (sra:i32 GPRnopc:i32:$Rm, 16:i32))) - Complexity = 22
    3412             :                   // Dst: (SMLATT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    3413             : /*6915*/        /*Scope*/ 19, /*->6935*/
    3414             : /*6916*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3415             : /*6918*/          OPC_EmitInteger, MVT::i32, 14, 
    3416             : /*6921*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3417             : /*6924*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLATT), 0,
    3418             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3419             :                   // Src: (add:i32 rGPR:i32:$Ra, (mul:i32 (sra:i32 rGPR:i32:$Rn, 16:i32), (sra:i32 rGPR:i32:$Rm, 16:i32))) - Complexity = 22
    3420             :                   // Dst: (t2SMLATT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3421             : /*6935*/        0, /*End of Scope*/
    3422             : /*6936*/      /*Scope*/ 70, /*->7007*/
    3423             : /*6937*/        OPC_MoveChild0,
    3424             : /*6938*/        OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    3425             : /*6941*/        OPC_MoveChild0,
    3426             : /*6942*/        OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3427             : /*6945*/        OPC_RecordChild0, // #0 = $Rn
    3428             : /*6946*/        OPC_CheckChild1Integer, 16, 
    3429             : /*6948*/        OPC_CheckChild1Type, MVT::i32,
    3430             : /*6950*/        OPC_MoveParent,
    3431             : /*6951*/        OPC_MoveChild1,
    3432             : /*6952*/        OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3433             : /*6955*/        OPC_RecordChild0, // #1 = $Rm
    3434             : /*6956*/        OPC_CheckChild1Integer, 16, 
    3435             : /*6958*/        OPC_CheckChild1Type, MVT::i32,
    3436             : /*6960*/        OPC_MoveParent,
    3437             : /*6961*/        OPC_MoveParent,
    3438             : /*6962*/        OPC_RecordChild1, // #2 = $Ra
    3439             : /*6963*/        OPC_CheckType, MVT::i32,
    3440             : /*6965*/        OPC_Scope, 19, /*->6986*/ // 2 children in Scope
    3441             : /*6967*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3442             : /*6969*/          OPC_EmitInteger, MVT::i32, 14, 
    3443             : /*6972*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3444             : /*6975*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLATT), 0,
    3445             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3446             :                   // Src: (add:i32 (mul:i32 (sra:i32 GPRnopc:i32:$Rn, 16:i32), (sra:i32 GPRnopc:i32:$Rm, 16:i32)), GPR:i32:$Ra) - Complexity = 22
    3447             :                   // Dst: (SMLATT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    3448             : /*6986*/        /*Scope*/ 19, /*->7006*/
    3449             : /*6987*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3450             : /*6989*/          OPC_EmitInteger, MVT::i32, 14, 
    3451             : /*6992*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3452             : /*6995*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLATT), 0,
    3453             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3454             :                   // Src: (add:i32 (mul:i32 (sra:i32 rGPR:i32:$Rn, 16:i32), (sra:i32 rGPR:i32:$Rm, 16:i32)), rGPR:i32:$Ra) - Complexity = 22
    3455             :                   // Dst: (t2SMLATT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3456             : /*7006*/        0, /*End of Scope*/
    3457             : /*7007*/      /*Scope*/ 4|128,1/*132*/, /*->7141*/
    3458             : /*7009*/        OPC_RecordChild0, // #0 = $Ra
    3459             : /*7010*/        OPC_MoveChild1,
    3460             : /*7011*/        OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    3461             : /*7014*/        OPC_MoveChild0,
    3462             : /*7015*/        OPC_SwitchOpcode /*2 cases */, 59, TARGET_VAL(ISD::SIGN_EXTEND_INREG),// ->7078
    3463             : /*7019*/          OPC_RecordChild0, // #1 = $Rn
    3464             : /*7020*/          OPC_MoveChild1,
    3465             : /*7021*/          OPC_CheckValueType, MVT::i16,
    3466             : /*7023*/          OPC_MoveParent,
    3467             : /*7024*/          OPC_MoveParent,
    3468             : /*7025*/          OPC_MoveChild1,
    3469             : /*7026*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3470             : /*7029*/          OPC_RecordChild0, // #2 = $Rm
    3471             : /*7030*/          OPC_CheckChild1Integer, 16, 
    3472             : /*7032*/          OPC_CheckChild1Type, MVT::i32,
    3473             : /*7034*/          OPC_MoveParent,
    3474             : /*7035*/          OPC_MoveParent,
    3475             : /*7036*/          OPC_Scope, 19, /*->7057*/ // 2 children in Scope
    3476             : /*7038*/            OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3477             : /*7040*/            OPC_EmitInteger, MVT::i32, 14, 
    3478             : /*7043*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3479             : /*7046*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABT), 0,
    3480             :                         MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3481             :                     // Src: (add:i32 GPR:i32:$Ra, (mul:i32 (sext_inreg:i32 GPRnopc:i32:$Rn, i16:Other), (sra:i32 GPRnopc:i32:$Rm, 16:i32))) - Complexity = 17
    3482             :                     // Dst: (SMLABT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    3483             : /*7057*/          /*Scope*/ 19, /*->7077*/
    3484             : /*7058*/            OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3485             : /*7060*/            OPC_EmitInteger, MVT::i32, 14, 
    3486             : /*7063*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3487             : /*7066*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABT), 0,
    3488             :                         MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3489             :                     // Src: (add:i32 rGPR:i32:$Ra, (mul:i32 (sext_inreg:i32 rGPR:i32:$Rn, i16:Other), (sra:i32 rGPR:i32:$Rm, 16:i32))) - Complexity = 17
    3490             :                     // Dst: (t2SMLABT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3491             : /*7077*/          0, /*End of Scope*/
    3492             : /*7078*/        /*SwitchOpcode*/ 59, TARGET_VAL(ISD::SRA),// ->7140
    3493             : /*7081*/          OPC_RecordChild0, // #1 = $Rn
    3494             : /*7082*/          OPC_CheckChild1Integer, 16, 
    3495             : /*7084*/          OPC_CheckChild1Type, MVT::i32,
    3496             : /*7086*/          OPC_MoveParent,
    3497             : /*7087*/          OPC_MoveChild1,
    3498             : /*7088*/          OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    3499             : /*7091*/          OPC_RecordChild0, // #2 = $Rm
    3500             : /*7092*/          OPC_MoveChild1,
    3501             : /*7093*/          OPC_CheckValueType, MVT::i16,
    3502             : /*7095*/          OPC_MoveParent,
    3503             : /*7096*/          OPC_MoveParent,
    3504             : /*7097*/          OPC_MoveParent,
    3505             : /*7098*/          OPC_Scope, 19, /*->7119*/ // 2 children in Scope
    3506             : /*7100*/            OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3507             : /*7102*/            OPC_EmitInteger, MVT::i32, 14, 
    3508             : /*7105*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3509             : /*7108*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLATB), 0,
    3510             :                         MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3511             :                     // Src: (add:i32 GPR:i32:$Ra, (mul:i32 (sra:i32 GPRnopc:i32:$Rn, 16:i32), (sext_inreg:i32 GPRnopc:i32:$Rm, i16:Other))) - Complexity = 17
    3512             :                     // Dst: (SMLATB:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    3513             : /*7119*/          /*Scope*/ 19, /*->7139*/
    3514             : /*7120*/            OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3515             : /*7122*/            OPC_EmitInteger, MVT::i32, 14, 
    3516             : /*7125*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3517             : /*7128*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLATB), 0,
    3518             :                         MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3519             :                     // Src: (add:i32 rGPR:i32:$Ra, (mul:i32 (sra:i32 rGPR:i32:$Rn, 16:i32), (sext_inreg:i32 rGPR:i32:$Rm, i16:Other))) - Complexity = 17
    3520             :                     // Dst: (t2SMLATB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3521             : /*7139*/          0, /*End of Scope*/
    3522             : /*7140*/        0, // EndSwitchOpcode
    3523             : /*7141*/      /*Scope*/ 5|128,1/*133*/, /*->7276*/
    3524             : /*7143*/        OPC_MoveChild0,
    3525             : /*7144*/        OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    3526             : /*7147*/        OPC_MoveChild0,
    3527             : /*7148*/        OPC_SwitchOpcode /*2 cases */, 60, TARGET_VAL(ISD::SIGN_EXTEND_INREG),// ->7212
    3528             : /*7152*/          OPC_RecordChild0, // #0 = $Rn
    3529             : /*7153*/          OPC_MoveChild1,
    3530             : /*7154*/          OPC_CheckValueType, MVT::i16,
    3531             : /*7156*/          OPC_MoveParent,
    3532             : /*7157*/          OPC_MoveParent,
    3533             : /*7158*/          OPC_MoveChild1,
    3534             : /*7159*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3535             : /*7162*/          OPC_RecordChild0, // #1 = $Rm
    3536             : /*7163*/          OPC_CheckChild1Integer, 16, 
    3537             : /*7165*/          OPC_CheckChild1Type, MVT::i32,
    3538             : /*7167*/          OPC_MoveParent,
    3539             : /*7168*/          OPC_MoveParent,
    3540             : /*7169*/          OPC_RecordChild1, // #2 = $Ra
    3541             : /*7170*/          OPC_Scope, 19, /*->7191*/ // 2 children in Scope
    3542             : /*7172*/            OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3543             : /*7174*/            OPC_EmitInteger, MVT::i32, 14, 
    3544             : /*7177*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3545             : /*7180*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABT), 0,
    3546             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3547             :                     // Src: (add:i32 (mul:i32 (sext_inreg:i32 GPRnopc:i32:$Rn, i16:Other), (sra:i32 GPRnopc:i32:$Rm, 16:i32)), GPR:i32:$Ra) - Complexity = 17
    3548             :                     // Dst: (SMLABT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    3549             : /*7191*/          /*Scope*/ 19, /*->7211*/
    3550             : /*7192*/            OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3551             : /*7194*/            OPC_EmitInteger, MVT::i32, 14, 
    3552             : /*7197*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3553             : /*7200*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABT), 0,
    3554             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3555             :                     // Src: (add:i32 (mul:i32 (sext_inreg:i32 rGPR:i32:$Rn, i16:Other), (sra:i32 rGPR:i32:$Rm, 16:i32)), rGPR:i32:$Ra) - Complexity = 17
    3556             :                     // Dst: (t2SMLABT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3557             : /*7211*/          0, /*End of Scope*/
    3558             : /*7212*/        /*SwitchOpcode*/ 60, TARGET_VAL(ISD::SRA),// ->7275
    3559             : /*7215*/          OPC_RecordChild0, // #0 = $Rm
    3560             : /*7216*/          OPC_CheckChild1Integer, 16, 
    3561             : /*7218*/          OPC_CheckChild1Type, MVT::i32,
    3562             : /*7220*/          OPC_MoveParent,
    3563             : /*7221*/          OPC_MoveChild1,
    3564             : /*7222*/          OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    3565             : /*7225*/          OPC_RecordChild0, // #1 = $Rn
    3566             : /*7226*/          OPC_MoveChild1,
    3567             : /*7227*/          OPC_CheckValueType, MVT::i16,
    3568             : /*7229*/          OPC_MoveParent,
    3569             : /*7230*/          OPC_MoveParent,
    3570             : /*7231*/          OPC_MoveParent,
    3571             : /*7232*/          OPC_RecordChild1, // #2 = $Ra
    3572             : /*7233*/          OPC_Scope, 19, /*->7254*/ // 2 children in Scope
    3573             : /*7235*/            OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3574             : /*7237*/            OPC_EmitInteger, MVT::i32, 14, 
    3575             : /*7240*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3576             : /*7243*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABT), 0,
    3577             :                         MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3578             :                     // Src: (add:i32 (mul:i32 (sra:i32 GPRnopc:i32:$Rm, 16:i32), (sext_inreg:i32 GPRnopc:i32:$Rn, i16:Other)), GPR:i32:$Ra) - Complexity = 17
    3579             :                     // Dst: (SMLABT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    3580             : /*7254*/          /*Scope*/ 19, /*->7274*/
    3581             : /*7255*/            OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3582             : /*7257*/            OPC_EmitInteger, MVT::i32, 14, 
    3583             : /*7260*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3584             : /*7263*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABT), 0,
    3585             :                         MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3586             :                     // Src: (add:i32 (mul:i32 (sra:i32 rGPR:i32:$Rm, 16:i32), (sext_inreg:i32 rGPR:i32:$Rn, i16:Other)), rGPR:i32:$Ra) - Complexity = 17
    3587             :                     // Dst: (t2SMLABT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3588             : /*7274*/          0, /*End of Scope*/
    3589             : /*7275*/        0, // EndSwitchOpcode
    3590             : /*7276*/      /*Scope*/ 97|128,1/*225*/, /*->7503*/
    3591             : /*7278*/        OPC_RecordChild0, // #0 = $Rn
    3592             : /*7279*/        OPC_Scope, 30, /*->7311*/ // 3 children in Scope
    3593             : /*7281*/          OPC_RecordChild1, // #1 = $shift
    3594             : /*7282*/          OPC_CheckType, MVT::i32,
    3595             : /*7284*/          OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    3596             : /*7286*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectRegShifterOperand:$shift #2 #3 #4
    3597             : /*7289*/          OPC_EmitInteger, MVT::i32, 14, 
    3598             : /*7292*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3599             : /*7295*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3600             : /*7298*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::ADDrsr), 0,
    3601             :                       MVT::i32, 7/*#Ops*/, 0, 2, 3, 4, 5, 6, 7, 
    3602             :                   // Src: (add:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift) - Complexity = 15
    3603             :                   // Dst: (ADDrsr:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift)
    3604             : /*7311*/        /*Scope*/ 30|128,1/*158*/, /*->7471*/
    3605             : /*7313*/          OPC_MoveChild1,
    3606             : /*7314*/          OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    3607             : /*7317*/          OPC_Scope, 37, /*->7356*/ // 4 children in Scope
    3608             : /*7319*/            OPC_RecordChild0, // #1 = $a
    3609             : /*7320*/            OPC_MoveChild0,
    3610             : /*7321*/            OPC_CheckPredicate, 12, // Predicate_sext_16_node
    3611             : /*7323*/            OPC_MoveParent,
    3612             : /*7324*/            OPC_MoveChild1,
    3613             : /*7325*/            OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3614             : /*7328*/            OPC_RecordChild0, // #2 = $b
    3615             : /*7329*/            OPC_CheckChild1Integer, 16, 
    3616             : /*7331*/            OPC_CheckChild1Type, MVT::i32,
    3617             : /*7333*/            OPC_MoveParent,
    3618             : /*7334*/            OPC_MoveParent,
    3619             : /*7335*/            OPC_CheckType, MVT::i32,
    3620             : /*7337*/            OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3621             : /*7339*/            OPC_EmitInteger, MVT::i32, 14, 
    3622             : /*7342*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3623             : /*7345*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABT), 0,
    3624             :                         MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3625             :                     // Src: (add:i32 GPR:i32:$acc, (mul:i32 GPR:i32<<P:Predicate_sext_16_node>>:$a, (sra:i32 GPR:i32:$b, 16:i32))) - Complexity = 15
    3626             :                     // Dst: (SMLABT:i32 GPR:i32:$a, GPR:i32:$b, GPR:i32:$acc)
    3627             : /*7356*/          /*Scope*/ 37, /*->7394*/
    3628             : /*7357*/            OPC_MoveChild0,
    3629             : /*7358*/            OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3630             : /*7361*/            OPC_RecordChild0, // #1 = $a
    3631             : /*7362*/            OPC_CheckChild1Integer, 16, 
    3632             : /*7364*/            OPC_CheckChild1Type, MVT::i32,
    3633             : /*7366*/            OPC_MoveParent,
    3634             : /*7367*/            OPC_RecordChild1, // #2 = $b
    3635             : /*7368*/            OPC_MoveChild1,
    3636             : /*7369*/            OPC_CheckPredicate, 12, // Predicate_sext_16_node
    3637             : /*7371*/            OPC_MoveParent,
    3638             : /*7372*/            OPC_MoveParent,
    3639             : /*7373*/            OPC_CheckType, MVT::i32,
    3640             : /*7375*/            OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3641             : /*7377*/            OPC_EmitInteger, MVT::i32, 14, 
    3642             : /*7380*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3643             : /*7383*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLATB), 0,
    3644             :                         MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3645             :                     // Src: (add:i32 GPR:i32:$acc, (mul:i32 (sra:i32 GPR:i32:$a, 16:i32), GPR:i32<<P:Predicate_sext_16_node>>:$b)) - Complexity = 15
    3646             :                     // Dst: (SMLATB:i32 GPR:i32:$a, GPR:i32:$b, GPR:i32:$acc)
    3647             : /*7394*/          /*Scope*/ 37, /*->7432*/
    3648             : /*7395*/            OPC_RecordChild0, // #1 = $Rn
    3649             : /*7396*/            OPC_MoveChild0,
    3650             : /*7397*/            OPC_CheckPredicate, 12, // Predicate_sext_16_node
    3651             : /*7399*/            OPC_MoveParent,
    3652             : /*7400*/            OPC_MoveChild1,
    3653             : /*7401*/            OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3654             : /*7404*/            OPC_RecordChild0, // #2 = $Rm
    3655             : /*7405*/            OPC_CheckChild1Integer, 16, 
    3656             : /*7407*/            OPC_CheckChild1Type, MVT::i32,
    3657             : /*7409*/            OPC_MoveParent,
    3658             : /*7410*/            OPC_MoveParent,
    3659             : /*7411*/            OPC_CheckType, MVT::i32,
    3660             : /*7413*/            OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3661             : /*7415*/            OPC_EmitInteger, MVT::i32, 14, 
    3662             : /*7418*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3663             : /*7421*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABT), 0,
    3664             :                         MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3665             :                     // Src: (add:i32 rGPR:i32:$Ra, (mul:i32 GPR:i32<<P:Predicate_sext_16_node>>:$Rn, (sra:i32 rGPR:i32:$Rm, 16:i32))) - Complexity = 15
    3666             :                     // Dst: (t2SMLABT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3667             : /*7432*/          /*Scope*/ 37, /*->7470*/
    3668             : /*7433*/            OPC_MoveChild0,
    3669             : /*7434*/            OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3670             : /*7437*/            OPC_RecordChild0, // #1 = $Rn
    3671             : /*7438*/            OPC_CheckChild1Integer, 16, 
    3672             : /*7440*/            OPC_CheckChild1Type, MVT::i32,
    3673             : /*7442*/            OPC_MoveParent,
    3674             : /*7443*/            OPC_RecordChild1, // #2 = $Rm
    3675             : /*7444*/            OPC_MoveChild1,
    3676             : /*7445*/            OPC_CheckPredicate, 12, // Predicate_sext_16_node
    3677             : /*7447*/            OPC_MoveParent,
    3678             : /*7448*/            OPC_MoveParent,
    3679             : /*7449*/            OPC_CheckType, MVT::i32,
    3680             : /*7451*/            OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3681             : /*7453*/            OPC_EmitInteger, MVT::i32, 14, 
    3682             : /*7456*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3683             : /*7459*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLATB), 0,
    3684             :                         MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    3685             :                     // Src: (add:i32 rGPR:i32:$Ra, (mul:i32 (sra:i32 rGPR:i32:$Rn, 16:i32), GPR:i32<<P:Predicate_sext_16_node>>:$Rm)) - Complexity = 15
    3686             :                     // Dst: (t2SMLATB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3687             : /*7470*/          0, /*End of Scope*/
    3688             : /*7471*/        /*Scope*/ 30, /*->7502*/
    3689             : /*7472*/          OPC_RecordChild1, // #1 = $Rn
    3690             : /*7473*/          OPC_CheckType, MVT::i32,
    3691             : /*7475*/          OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    3692             : /*7477*/          OPC_CheckComplexPat, /*CP*/1, /*#*/0, // SelectRegShifterOperand:$shift #2 #3 #4
    3693             : /*7480*/          OPC_EmitInteger, MVT::i32, 14, 
    3694             : /*7483*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3695             : /*7486*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3696             : /*7489*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::ADDrsr), 0,
    3697             :                       MVT::i32, 7/*#Ops*/, 1, 2, 3, 4, 5, 6, 7, 
    3698             :                   // Src: (add:i32 so_reg_reg:i32:$shift, GPR:i32:$Rn) - Complexity = 15
    3699             :                   // Dst: (ADDrsr:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift)
    3700             : /*7502*/        0, /*End of Scope*/
    3701             : /*7503*/      /*Scope*/ 34|128,1/*162*/, /*->7667*/
    3702             : /*7505*/        OPC_MoveChild0,
    3703             : /*7506*/        OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    3704             : /*7509*/        OPC_Scope, 38, /*->7549*/ // 4 children in Scope
    3705             : /*7511*/          OPC_RecordChild0, // #0 = $a
    3706             : /*7512*/          OPC_MoveChild0,
    3707             : /*7513*/          OPC_CheckPredicate, 12, // Predicate_sext_16_node
    3708             : /*7515*/          OPC_MoveParent,
    3709             : /*7516*/          OPC_MoveChild1,
    3710             : /*7517*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3711             : /*7520*/          OPC_RecordChild0, // #1 = $b
    3712             : /*7521*/          OPC_CheckChild1Integer, 16, 
    3713             : /*7523*/          OPC_CheckChild1Type, MVT::i32,
    3714             : /*7525*/          OPC_MoveParent,
    3715             : /*7526*/          OPC_MoveParent,
    3716             : /*7527*/          OPC_RecordChild1, // #2 = $acc
    3717             : /*7528*/          OPC_CheckType, MVT::i32,
    3718             : /*7530*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3719             : /*7532*/          OPC_EmitInteger, MVT::i32, 14, 
    3720             : /*7535*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3721             : /*7538*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABT), 0,
    3722             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3723             :                   // Src: (add:i32 (mul:i32 GPR:i32<<P:Predicate_sext_16_node>>:$a, (sra:i32 GPR:i32:$b, 16:i32)), GPR:i32:$acc) - Complexity = 15
    3724             :                   // Dst: (SMLABT:i32 GPR:i32:$a, GPR:i32:$b, GPR:i32:$acc)
    3725             : /*7549*/        /*Scope*/ 38, /*->7588*/
    3726             : /*7550*/          OPC_MoveChild0,
    3727             : /*7551*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3728             : /*7554*/          OPC_RecordChild0, // #0 = $b
    3729             : /*7555*/          OPC_CheckChild1Integer, 16, 
    3730             : /*7557*/          OPC_CheckChild1Type, MVT::i32,
    3731             : /*7559*/          OPC_MoveParent,
    3732             : /*7560*/          OPC_RecordChild1, // #1 = $a
    3733             : /*7561*/          OPC_MoveChild1,
    3734             : /*7562*/          OPC_CheckPredicate, 12, // Predicate_sext_16_node
    3735             : /*7564*/          OPC_MoveParent,
    3736             : /*7565*/          OPC_MoveParent,
    3737             : /*7566*/          OPC_RecordChild1, // #2 = $acc
    3738             : /*7567*/          OPC_CheckType, MVT::i32,
    3739             : /*7569*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    3740             : /*7571*/          OPC_EmitInteger, MVT::i32, 14, 
    3741             : /*7574*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3742             : /*7577*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABT), 0,
    3743             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3744             :                   // Src: (add:i32 (mul:i32 (sra:i32 GPR:i32:$b, 16:i32), GPR:i32<<P:Predicate_sext_16_node>>:$a), GPR:i32:$acc) - Complexity = 15
    3745             :                   // Dst: (SMLABT:i32 GPR:i32:$a, GPR:i32:$b, GPR:i32:$acc)
    3746             : /*7588*/        /*Scope*/ 38, /*->7627*/
    3747             : /*7589*/          OPC_RecordChild0, // #0 = $Rn
    3748             : /*7590*/          OPC_MoveChild0,
    3749             : /*7591*/          OPC_CheckPredicate, 12, // Predicate_sext_16_node
    3750             : /*7593*/          OPC_MoveParent,
    3751             : /*7594*/          OPC_MoveChild1,
    3752             : /*7595*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3753             : /*7598*/          OPC_RecordChild0, // #1 = $Rm
    3754             : /*7599*/          OPC_CheckChild1Integer, 16, 
    3755             : /*7601*/          OPC_CheckChild1Type, MVT::i32,
    3756             : /*7603*/          OPC_MoveParent,
    3757             : /*7604*/          OPC_MoveParent,
    3758             : /*7605*/          OPC_RecordChild1, // #2 = $Ra
    3759             : /*7606*/          OPC_CheckType, MVT::i32,
    3760             : /*7608*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3761             : /*7610*/          OPC_EmitInteger, MVT::i32, 14, 
    3762             : /*7613*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3763             : /*7616*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABT), 0,
    3764             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3765             :                   // Src: (add:i32 (mul:i32 GPR:i32<<P:Predicate_sext_16_node>>:$Rn, (sra:i32 rGPR:i32:$Rm, 16:i32)), rGPR:i32:$Ra) - Complexity = 15
    3766             :                   // Dst: (t2SMLABT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3767             : /*7627*/        /*Scope*/ 38, /*->7666*/
    3768             : /*7628*/          OPC_MoveChild0,
    3769             : /*7629*/          OPC_CheckOpcode, TARGET_VAL(ISD::SRA),
    3770             : /*7632*/          OPC_RecordChild0, // #0 = $Rm
    3771             : /*7633*/          OPC_CheckChild1Integer, 16, 
    3772             : /*7635*/          OPC_CheckChild1Type, MVT::i32,
    3773             : /*7637*/          OPC_MoveParent,
    3774             : /*7638*/          OPC_RecordChild1, // #1 = $Rn
    3775             : /*7639*/          OPC_MoveChild1,
    3776             : /*7640*/          OPC_CheckPredicate, 12, // Predicate_sext_16_node
    3777             : /*7642*/          OPC_MoveParent,
    3778             : /*7643*/          OPC_MoveParent,
    3779             : /*7644*/          OPC_RecordChild1, // #2 = $Ra
    3780             : /*7645*/          OPC_CheckType, MVT::i32,
    3781             : /*7647*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    3782             : /*7649*/          OPC_EmitInteger, MVT::i32, 14, 
    3783             : /*7652*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3784             : /*7655*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABT), 0,
    3785             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3786             :                   // Src: (add:i32 (mul:i32 (sra:i32 rGPR:i32:$Rm, 16:i32), GPR:i32<<P:Predicate_sext_16_node>>:$Rn), rGPR:i32:$Ra) - Complexity = 15
    3787             :                   // Dst: (t2SMLABT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    3788             : /*7666*/        0, /*End of Scope*/
    3789             : /*7667*/      /*Scope*/ 42, /*->7710*/
    3790             : /*7668*/        OPC_RecordChild0, // #0 = $Rn
    3791             : /*7669*/        OPC_MoveChild1,
    3792             : /*7670*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    3793             : /*7673*/        OPC_MoveChild0,
    3794             : /*7674*/        OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    3795             : /*7677*/        OPC_RecordChild0, // #1 = $Rm
    3796             : /*7678*/        OPC_CheckChild1Integer, 24, 
    3797             : /*7680*/        OPC_CheckChild1Type, MVT::i32,
    3798             : /*7682*/        OPC_MoveParent,
    3799             : /*7683*/        OPC_MoveChild1,
    3800             : /*7684*/        OPC_CheckValueType, MVT::i16,
    3801             : /*7686*/        OPC_MoveParent,
    3802             : /*7687*/        OPC_MoveParent,
    3803             : /*7688*/        OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3804             : /*7690*/        OPC_EmitInteger, MVT::i32, 3, 
    3805             : /*7693*/        OPC_EmitInteger, MVT::i32, 14, 
    3806             : /*7696*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3807             : /*7699*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    3808             :                     MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    3809             :                 // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (rotr:i32 rGPR:i32:$Rm, 24:i32), i16:Other)) - Complexity = 14
    3810             :                 // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 3:i32)
    3811             : /*7710*/      /*Scope*/ 42, /*->7753*/
    3812             : /*7711*/        OPC_MoveChild0,
    3813             : /*7712*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    3814             : /*7715*/        OPC_MoveChild0,
    3815             : /*7716*/        OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    3816             : /*7719*/        OPC_RecordChild0, // #0 = $Rm
    3817             : /*7720*/        OPC_CheckChild1Integer, 24, 
    3818             : /*7722*/        OPC_CheckChild1Type, MVT::i32,
    3819             : /*7724*/        OPC_MoveParent,
    3820             : /*7725*/        OPC_MoveChild1,
    3821             : /*7726*/        OPC_CheckValueType, MVT::i16,
    3822             : /*7728*/        OPC_MoveParent,
    3823             : /*7729*/        OPC_MoveParent,
    3824             : /*7730*/        OPC_RecordChild1, // #1 = $Rn
    3825             : /*7731*/        OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3826             : /*7733*/        OPC_EmitInteger, MVT::i32, 3, 
    3827             : /*7736*/        OPC_EmitInteger, MVT::i32, 14, 
    3828             : /*7739*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3829             : /*7742*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    3830             :                     MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    3831             :                 // Src: (add:i32 (sext_inreg:i32 (rotr:i32 rGPR:i32:$Rm, 24:i32), i16:Other), rGPR:i32:$Rn) - Complexity = 14
    3832             :                 // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 3:i32)
    3833             : /*7753*/      /*Scope*/ 35|128,2/*291*/, /*->8046*/
    3834             : /*7755*/        OPC_RecordChild0, // #0 = $Rn
    3835             : /*7756*/        OPC_MoveChild1,
    3836             : /*7757*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    3837             : /*7760*/        OPC_MoveChild0,
    3838             : /*7761*/        OPC_SwitchOpcode /*2 cases */, 1|128,1/*129*/, TARGET_VAL(ISD::ROTR),// ->7895
    3839             : /*7766*/          OPC_RecordChild0, // #1 = $Rm
    3840             : /*7767*/          OPC_RecordChild1, // #2 = $rot
    3841             : /*7768*/          OPC_MoveChild1,
    3842             : /*7769*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3843             : /*7772*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    3844             : /*7774*/          OPC_CheckType, MVT::i32,
    3845             : /*7776*/          OPC_MoveParent,
    3846             : /*7777*/          OPC_MoveParent,
    3847             : /*7778*/          OPC_MoveChild1,
    3848             : /*7779*/          OPC_Scope, 56, /*->7837*/ // 2 children in Scope
    3849             : /*7781*/            OPC_CheckValueType, MVT::i8,
    3850             : /*7783*/            OPC_MoveParent,
    3851             : /*7784*/            OPC_MoveParent,
    3852             : /*7785*/            OPC_Scope, 24, /*->7811*/ // 2 children in Scope
    3853             : /*7787*/              OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3854             : /*7789*/              OPC_EmitConvertToTarget, 2,
    3855             : /*7791*/              OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3856             : /*7794*/              OPC_EmitInteger, MVT::i32, 14, 
    3857             : /*7797*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3858             : /*7800*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAB), 0,
    3859             :                           MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    3860             :                       // Src: (add:i32 GPR:i32:$Rn, (sext_inreg:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i8:Other)) - Complexity = 13
    3861             :                       // Dst: (SXTAB:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    3862             : /*7811*/            /*Scope*/ 24, /*->7836*/
    3863             : /*7812*/              OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3864             : /*7814*/              OPC_EmitConvertToTarget, 2,
    3865             : /*7816*/              OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3866             : /*7819*/              OPC_EmitInteger, MVT::i32, 14, 
    3867             : /*7822*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3868             : /*7825*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAB), 0,
    3869             :                           MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    3870             :                       // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i8:Other)) - Complexity = 13
    3871             :                       // Dst: (t2SXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3872             : /*7836*/            0, /*End of Scope*/
    3873             : /*7837*/          /*Scope*/ 56, /*->7894*/
    3874             : /*7838*/            OPC_CheckValueType, MVT::i16,
    3875             : /*7840*/            OPC_MoveParent,
    3876             : /*7841*/            OPC_MoveParent,
    3877             : /*7842*/            OPC_Scope, 24, /*->7868*/ // 2 children in Scope
    3878             : /*7844*/              OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3879             : /*7846*/              OPC_EmitConvertToTarget, 2,
    3880             : /*7848*/              OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3881             : /*7851*/              OPC_EmitInteger, MVT::i32, 14, 
    3882             : /*7854*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3883             : /*7857*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAH), 0,
    3884             :                           MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    3885             :                       // Src: (add:i32 GPR:i32:$Rn, (sext_inreg:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i16:Other)) - Complexity = 13
    3886             :                       // Dst: (SXTAH:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    3887             : /*7868*/            /*Scope*/ 24, /*->7893*/
    3888             : /*7869*/              OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3889             : /*7871*/              OPC_EmitConvertToTarget, 2,
    3890             : /*7873*/              OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3891             : /*7876*/              OPC_EmitInteger, MVT::i32, 14, 
    3892             : /*7879*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3893             : /*7882*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    3894             :                           MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    3895             :                       // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i16:Other)) - Complexity = 13
    3896             :                       // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3897             : /*7893*/            0, /*End of Scope*/
    3898             : /*7894*/          0, /*End of Scope*/
    3899             : /*7895*/        /*SwitchOpcode*/ 18|128,1/*146*/, TARGET_VAL(ISD::SRL),// ->8045
    3900             : /*7899*/          OPC_RecordChild0, // #1 = $Rm
    3901             : /*7900*/          OPC_RecordChild1, // #2 = $rot
    3902             : /*7901*/          OPC_MoveChild1,
    3903             : /*7902*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3904             : /*7905*/          OPC_CheckType, MVT::i32,
    3905             : /*7907*/          OPC_Scope, 33, /*->7942*/ // 4 children in Scope
    3906             : /*7909*/            OPC_CheckPredicate, 10, // Predicate_rot_imm
    3907             : /*7911*/            OPC_MoveParent,
    3908             : /*7912*/            OPC_MoveParent,
    3909             : /*7913*/            OPC_MoveChild1,
    3910             : /*7914*/            OPC_CheckValueType, MVT::i8,
    3911             : /*7916*/            OPC_MoveParent,
    3912             : /*7917*/            OPC_MoveParent,
    3913             : /*7918*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3914             : /*7920*/            OPC_EmitConvertToTarget, 2,
    3915             : /*7922*/            OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3916             : /*7925*/            OPC_EmitInteger, MVT::i32, 14, 
    3917             : /*7928*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3918             : /*7931*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAB), 0,
    3919             :                         MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    3920             :                     // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i8:Other)) - Complexity = 13
    3921             :                     // Dst: (SXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3922             : /*7942*/          /*Scope*/ 33, /*->7976*/
    3923             : /*7943*/            OPC_CheckPredicate, 11, // Predicate_imm8_or_16
    3924             : /*7945*/            OPC_MoveParent,
    3925             : /*7946*/            OPC_MoveParent,
    3926             : /*7947*/            OPC_MoveChild1,
    3927             : /*7948*/            OPC_CheckValueType, MVT::i16,
    3928             : /*7950*/            OPC_MoveParent,
    3929             : /*7951*/            OPC_MoveParent,
    3930             : /*7952*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3931             : /*7954*/            OPC_EmitConvertToTarget, 2,
    3932             : /*7956*/            OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3933             : /*7959*/            OPC_EmitInteger, MVT::i32, 14, 
    3934             : /*7962*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3935             : /*7965*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAH), 0,
    3936             :                         MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    3937             :                     // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm8_or_16>>:$rot), i16:Other)) - Complexity = 13
    3938             :                     // Dst: (SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3939             : /*7976*/          /*Scope*/ 33, /*->8010*/
    3940             : /*7977*/            OPC_CheckPredicate, 10, // Predicate_rot_imm
    3941             : /*7979*/            OPC_MoveParent,
    3942             : /*7980*/            OPC_MoveParent,
    3943             : /*7981*/            OPC_MoveChild1,
    3944             : /*7982*/            OPC_CheckValueType, MVT::i8,
    3945             : /*7984*/            OPC_MoveParent,
    3946             : /*7985*/            OPC_MoveParent,
    3947             : /*7986*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3948             : /*7988*/            OPC_EmitConvertToTarget, 2,
    3949             : /*7990*/            OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3950             : /*7993*/            OPC_EmitInteger, MVT::i32, 14, 
    3951             : /*7996*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3952             : /*7999*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAB), 0,
    3953             :                         MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    3954             :                     // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i8:Other)) - Complexity = 13
    3955             :                     // Dst: (t2SXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3956             : /*8010*/          /*Scope*/ 33, /*->8044*/
    3957             : /*8011*/            OPC_CheckPredicate, 11, // Predicate_imm8_or_16
    3958             : /*8013*/            OPC_MoveParent,
    3959             : /*8014*/            OPC_MoveParent,
    3960             : /*8015*/            OPC_MoveChild1,
    3961             : /*8016*/            OPC_CheckValueType, MVT::i16,
    3962             : /*8018*/            OPC_MoveParent,
    3963             : /*8019*/            OPC_MoveParent,
    3964             : /*8020*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    3965             : /*8022*/            OPC_EmitConvertToTarget, 2,
    3966             : /*8024*/            OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3967             : /*8027*/            OPC_EmitInteger, MVT::i32, 14, 
    3968             : /*8030*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    3969             : /*8033*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    3970             :                         MVT::i32, 5/*#Ops*/, 0, 1, 4, 5, 6, 
    3971             :                     // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm8_or_16>>:$rot), i16:Other)) - Complexity = 13
    3972             :                     // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    3973             : /*8044*/          0, /*End of Scope*/
    3974             : /*8045*/        0, // EndSwitchOpcode
    3975             : /*8046*/      /*Scope*/ 40|128,2/*296*/, /*->8344*/
    3976             : /*8048*/        OPC_MoveChild0,
    3977             : /*8049*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    3978             : /*8052*/        OPC_MoveChild0,
    3979             : /*8053*/        OPC_SwitchOpcode /*2 cases */, 3|128,1/*131*/, TARGET_VAL(ISD::ROTR),// ->8189
    3980             : /*8058*/          OPC_RecordChild0, // #0 = $Rm
    3981             : /*8059*/          OPC_RecordChild1, // #1 = $rot
    3982             : /*8060*/          OPC_MoveChild1,
    3983             : /*8061*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3984             : /*8064*/          OPC_CheckPredicate, 10, // Predicate_rot_imm
    3985             : /*8066*/          OPC_CheckType, MVT::i32,
    3986             : /*8068*/          OPC_MoveParent,
    3987             : /*8069*/          OPC_MoveParent,
    3988             : /*8070*/          OPC_MoveChild1,
    3989             : /*8071*/          OPC_Scope, 57, /*->8130*/ // 2 children in Scope
    3990             : /*8073*/            OPC_CheckValueType, MVT::i8,
    3991             : /*8075*/            OPC_MoveParent,
    3992             : /*8076*/            OPC_MoveParent,
    3993             : /*8077*/            OPC_RecordChild1, // #2 = $Rn
    3994             : /*8078*/            OPC_Scope, 24, /*->8104*/ // 2 children in Scope
    3995             : /*8080*/              OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    3996             : /*8082*/              OPC_EmitConvertToTarget, 1,
    3997             : /*8084*/              OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    3998             : /*8087*/              OPC_EmitInteger, MVT::i32, 14, 
    3999             : /*8090*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4000             : /*8093*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAB), 0,
    4001             :                           MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4002             :                       // Src: (add:i32 (sext_inreg:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i8:Other), GPR:i32:$Rn) - Complexity = 13
    4003             :                       // Dst: (SXTAB:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    4004             : /*8104*/            /*Scope*/ 24, /*->8129*/
    4005             : /*8105*/              OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    4006             : /*8107*/              OPC_EmitConvertToTarget, 1,
    4007             : /*8109*/              OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    4008             : /*8112*/              OPC_EmitInteger, MVT::i32, 14, 
    4009             : /*8115*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4010             : /*8118*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAB), 0,
    4011             :                           MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4012             :                       // Src: (add:i32 (sext_inreg:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i8:Other), rGPR:i32:$Rn) - Complexity = 13
    4013             :                       // Dst: (t2SXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    4014             : /*8129*/            0, /*End of Scope*/
    4015             : /*8130*/          /*Scope*/ 57, /*->8188*/
    4016             : /*8131*/            OPC_CheckValueType, MVT::i16,
    4017             : /*8133*/            OPC_MoveParent,
    4018             : /*8134*/            OPC_MoveParent,
    4019             : /*8135*/            OPC_RecordChild1, // #2 = $Rn
    4020             : /*8136*/            OPC_Scope, 24, /*->8162*/ // 2 children in Scope
    4021             : /*8138*/              OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    4022             : /*8140*/              OPC_EmitConvertToTarget, 1,
    4023             : /*8142*/              OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    4024             : /*8145*/              OPC_EmitInteger, MVT::i32, 14, 
    4025             : /*8148*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4026             : /*8151*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAH), 0,
    4027             :                           MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4028             :                       // Src: (add:i32 (sext_inreg:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i16:Other), GPR:i32:$Rn) - Complexity = 13
    4029             :                       // Dst: (SXTAH:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    4030             : /*8162*/            /*Scope*/ 24, /*->8187*/
    4031             : /*8163*/              OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    4032             : /*8165*/              OPC_EmitConvertToTarget, 1,
    4033             : /*8167*/              OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    4034             : /*8170*/              OPC_EmitInteger, MVT::i32, 14, 
    4035             : /*8173*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4036             : /*8176*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    4037             :                           MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4038             :                       // Src: (add:i32 (sext_inreg:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i16:Other), rGPR:i32:$Rn) - Complexity = 13
    4039             :                       // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    4040             : /*8187*/            0, /*End of Scope*/
    4041             : /*8188*/          0, /*End of Scope*/
    4042             : /*8189*/        /*SwitchOpcode*/ 22|128,1/*150*/, TARGET_VAL(ISD::SRL),// ->8343
    4043             : /*8193*/          OPC_RecordChild0, // #0 = $Rm
    4044             : /*8194*/          OPC_RecordChild1, // #1 = $rot
    4045             : /*8195*/          OPC_MoveChild1,
    4046             : /*8196*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4047             : /*8199*/          OPC_CheckType, MVT::i32,
    4048             : /*8201*/          OPC_Scope, 34, /*->8237*/ // 4 children in Scope
    4049             : /*8203*/            OPC_CheckPredicate, 10, // Predicate_rot_imm
    4050             : /*8205*/            OPC_MoveParent,
    4051             : /*8206*/            OPC_MoveParent,
    4052             : /*8207*/            OPC_MoveChild1,
    4053             : /*8208*/            OPC_CheckValueType, MVT::i8,
    4054             : /*8210*/            OPC_MoveParent,
    4055             : /*8211*/            OPC_MoveParent,
    4056             : /*8212*/            OPC_RecordChild1, // #2 = $Rn
    4057             : /*8213*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    4058             : /*8215*/            OPC_EmitConvertToTarget, 1,
    4059             : /*8217*/            OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    4060             : /*8220*/            OPC_EmitInteger, MVT::i32, 14, 
    4061             : /*8223*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4062             : /*8226*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAB), 0,
    4063             :                         MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4064             :                     // Src: (add:i32 (sext_inreg:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i8:Other), rGPR:i32:$Rn) - Complexity = 13
    4065             :                     // Dst: (SXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    4066             : /*8237*/          /*Scope*/ 34, /*->8272*/
    4067             : /*8238*/            OPC_CheckPredicate, 11, // Predicate_imm8_or_16
    4068             : /*8240*/            OPC_MoveParent,
    4069             : /*8241*/            OPC_MoveParent,
    4070             : /*8242*/            OPC_MoveChild1,
    4071             : /*8243*/            OPC_CheckValueType, MVT::i16,
    4072             : /*8245*/            OPC_MoveParent,
    4073             : /*8246*/            OPC_MoveParent,
    4074             : /*8247*/            OPC_RecordChild1, // #2 = $Rn
    4075             : /*8248*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    4076             : /*8250*/            OPC_EmitConvertToTarget, 1,
    4077             : /*8252*/            OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    4078             : /*8255*/            OPC_EmitInteger, MVT::i32, 14, 
    4079             : /*8258*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4080             : /*8261*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAH), 0,
    4081             :                         MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4082             :                     // Src: (add:i32 (sext_inreg:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm8_or_16>>:$rot), i16:Other), rGPR:i32:$Rn) - Complexity = 13
    4083             :                     // Dst: (SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    4084             : /*8272*/          /*Scope*/ 34, /*->8307*/
    4085             : /*8273*/            OPC_CheckPredicate, 10, // Predicate_rot_imm
    4086             : /*8275*/            OPC_MoveParent,
    4087             : /*8276*/            OPC_MoveParent,
    4088             : /*8277*/            OPC_MoveChild1,
    4089             : /*8278*/            OPC_CheckValueType, MVT::i8,
    4090             : /*8280*/            OPC_MoveParent,
    4091             : /*8281*/            OPC_MoveParent,
    4092             : /*8282*/            OPC_RecordChild1, // #2 = $Rn
    4093             : /*8283*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    4094             : /*8285*/            OPC_EmitConvertToTarget, 1,
    4095             : /*8287*/            OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    4096             : /*8290*/            OPC_EmitInteger, MVT::i32, 14, 
    4097             : /*8293*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4098             : /*8296*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAB), 0,
    4099             :                         MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4100             :                     // Src: (add:i32 (sext_inreg:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), i8:Other), rGPR:i32:$Rn) - Complexity = 13
    4101             :                     // Dst: (t2SXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    4102             : /*8307*/          /*Scope*/ 34, /*->8342*/
    4103             : /*8308*/            OPC_CheckPredicate, 11, // Predicate_imm8_or_16
    4104             : /*8310*/            OPC_MoveParent,
    4105             : /*8311*/            OPC_MoveParent,
    4106             : /*8312*/            OPC_MoveChild1,
    4107             : /*8313*/            OPC_CheckValueType, MVT::i16,
    4108             : /*8315*/            OPC_MoveParent,
    4109             : /*8316*/            OPC_MoveParent,
    4110             : /*8317*/            OPC_RecordChild1, // #2 = $Rn
    4111             : /*8318*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    4112             : /*8320*/            OPC_EmitConvertToTarget, 1,
    4113             : /*8322*/            OPC_EmitNodeXForm, 2, 3, // rot_imm_XFORM
    4114             : /*8325*/            OPC_EmitInteger, MVT::i32, 14, 
    4115             : /*8328*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4116             : /*8331*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    4117             :                         MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4118             :                     // Src: (add:i32 (sext_inreg:i32 (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm8_or_16>>:$rot), i16:Other), rGPR:i32:$Rn) - Complexity = 13
    4119             :                     // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    4120             : /*8342*/          0, /*End of Scope*/
    4121             : /*8343*/        0, // EndSwitchOpcode
    4122             : /*8344*/      /*Scope*/ 55|128,1/*183*/, /*->8529*/
    4123             : /*8346*/        OPC_RecordChild0, // #0 = $Rn
    4124             : /*8347*/        OPC_Scope, 29, /*->8378*/ // 5 children in Scope
    4125             : /*8349*/          OPC_RecordChild1, // #1 = $shift
    4126             : /*8350*/          OPC_CheckType, MVT::i32,
    4127             : /*8352*/          OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    4128             : /*8354*/          OPC_CheckComplexPat, /*CP*/2, /*#*/1, // SelectImmShifterOperand:$shift #2 #3
    4129             : /*8357*/          OPC_EmitInteger, MVT::i32, 14, 
    4130             : /*8360*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4131             : /*8363*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4132             : /*8366*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::ADDrsi), 0,
    4133             :                       MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
    4134             :                   // Src: (add:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift) - Complexity = 12
    4135             :                   // Dst: (ADDrsi:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift)
    4136             : /*8378*/        /*Scope*/ 44, /*->8423*/
    4137             : /*8379*/          OPC_MoveChild1,
    4138             : /*8380*/          OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    4139             : /*8383*/          OPC_MoveChild0,
    4140             : /*8384*/          OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    4141             : /*8387*/          OPC_RecordChild0, // #1 = $Rn
    4142             : /*8388*/          OPC_MoveChild1,
    4143             : /*8389*/          OPC_CheckValueType, MVT::i16,
    4144             : /*8391*/          OPC_MoveParent,
    4145             : /*8392*/          OPC_MoveParent,
    4146             : /*8393*/          OPC_MoveChild1,
    4147             : /*8394*/          OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    4148             : /*8397*/          OPC_RecordChild0, // #2 = $Rm
    4149             : /*8398*/          OPC_MoveChild1,
    4150             : /*8399*/          OPC_CheckValueType, MVT::i16,
    4151             : /*8401*/          OPC_MoveParent,
    4152             : /*8402*/          OPC_MoveParent,
    4153             : /*8403*/          OPC_MoveParent,
    4154             : /*8404*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4155             : /*8406*/          OPC_EmitInteger, MVT::i32, 14, 
    4156             : /*8409*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4157             : /*8412*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABB), 0,
    4158             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4159             :                   // Src: (add:i32 GPR:i32:$Ra, (mul:i32 (sext_inreg:i32 GPRnopc:i32:$Rn, i16:Other), (sext_inreg:i32 GPRnopc:i32:$Rm, i16:Other))) - Complexity = 12
    4160             :                   // Dst: (SMLABB:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    4161             : /*8423*/        /*Scope*/ 29, /*->8453*/
    4162             : /*8424*/          OPC_RecordChild1, // #1 = $ShiftedRm
    4163             : /*8425*/          OPC_CheckType, MVT::i32,
    4164             : /*8427*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4165             : /*8429*/          OPC_CheckComplexPat, /*CP*/0, /*#*/1, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
    4166             : /*8432*/          OPC_EmitInteger, MVT::i32, 14, 
    4167             : /*8435*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4168             : /*8438*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4169             : /*8441*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDrs), 0,
    4170             :                       MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
    4171             :                   // Src: (add:i32 GPRnopc:i32:$Rn, t2_so_reg:i32:$ShiftedRm) - Complexity = 12
    4172             :                   // Dst: (t2ADDrs:i32 GPRnopc:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
    4173             : /*8453*/        /*Scope*/ 44, /*->8498*/
    4174             : /*8454*/          OPC_MoveChild1,
    4175             : /*8455*/          OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    4176             : /*8458*/          OPC_MoveChild0,
    4177             : /*8459*/          OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    4178             : /*8462*/          OPC_RecordChild0, // #1 = $Rn
    4179             : /*8463*/          OPC_MoveChild1,
    4180             : /*8464*/          OPC_CheckValueType, MVT::i16,
    4181             : /*8466*/          OPC_MoveParent,
    4182             : /*8467*/          OPC_MoveParent,
    4183             : /*8468*/          OPC_MoveChild1,
    4184             : /*8469*/          OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    4185             : /*8472*/          OPC_RecordChild0, // #2 = $Rm
    4186             : /*8473*/          OPC_MoveChild1,
    4187             : /*8474*/          OPC_CheckValueType, MVT::i16,
    4188             : /*8476*/          OPC_MoveParent,
    4189             : /*8477*/          OPC_MoveParent,
    4190             : /*8478*/          OPC_MoveParent,
    4191             : /*8479*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4192             : /*8481*/          OPC_EmitInteger, MVT::i32, 14, 
    4193             : /*8484*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4194             : /*8487*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABB), 0,
    4195             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4196             :                   // Src: (add:i32 rGPR:i32:$Ra, (mul:i32 (sext_inreg:i32 rGPR:i32:$Rn, i16:Other), (sext_inreg:i32 rGPR:i32:$Rm, i16:Other))) - Complexity = 12
    4197             :                   // Dst: (t2SMLABB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4198             : /*8498*/        /*Scope*/ 29, /*->8528*/
    4199             : /*8499*/          OPC_RecordChild1, // #1 = $Rn
    4200             : /*8500*/          OPC_CheckType, MVT::i32,
    4201             : /*8502*/          OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    4202             : /*8504*/          OPC_CheckComplexPat, /*CP*/2, /*#*/0, // SelectImmShifterOperand:$shift #2 #3
    4203             : /*8507*/          OPC_EmitInteger, MVT::i32, 14, 
    4204             : /*8510*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4205             : /*8513*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4206             : /*8516*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::ADDrsi), 0,
    4207             :                       MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
    4208             :                   // Src: (add:i32 so_reg_imm:i32:$shift, GPR:i32:$Rn) - Complexity = 12
    4209             :                   // Dst: (ADDrsi:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift)
    4210             : /*8528*/        0, /*End of Scope*/
    4211             : /*8529*/      /*Scope*/ 45, /*->8575*/
    4212             : /*8530*/        OPC_MoveChild0,
    4213             : /*8531*/        OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    4214             : /*8534*/        OPC_MoveChild0,
    4215             : /*8535*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    4216             : /*8538*/        OPC_RecordChild0, // #0 = $Rn
    4217             : /*8539*/        OPC_MoveChild1,
    4218             : /*8540*/        OPC_CheckValueType, MVT::i16,
    4219             : /*8542*/        OPC_MoveParent,
    4220             : /*8543*/        OPC_MoveParent,
    4221             : /*8544*/        OPC_MoveChild1,
    4222             : /*8545*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    4223             : /*8548*/        OPC_RecordChild0, // #1 = $Rm
    4224             : /*8549*/        OPC_MoveChild1,
    4225             : /*8550*/        OPC_CheckValueType, MVT::i16,
    4226             : /*8552*/        OPC_MoveParent,
    4227             : /*8553*/        OPC_MoveParent,
    4228             : /*8554*/        OPC_MoveParent,
    4229             : /*8555*/        OPC_RecordChild1, // #2 = $Ra
    4230             : /*8556*/        OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4231             : /*8558*/        OPC_EmitInteger, MVT::i32, 14, 
    4232             : /*8561*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4233             : /*8564*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABB), 0,
    4234             :                     MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4235             :                 // Src: (add:i32 (mul:i32 (sext_inreg:i32 GPRnopc:i32:$Rn, i16:Other), (sext_inreg:i32 GPRnopc:i32:$Rm, i16:Other)), GPR:i32:$Ra) - Complexity = 12
    4236             :                 // Dst: (SMLABB:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    4237             : /*8575*/      /*Scope*/ 30, /*->8606*/
    4238             : /*8576*/        OPC_RecordChild0, // #0 = $ShiftedRm
    4239             : /*8577*/        OPC_RecordChild1, // #1 = $Rn
    4240             : /*8578*/        OPC_CheckType, MVT::i32,
    4241             : /*8580*/        OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4242             : /*8582*/        OPC_CheckComplexPat, /*CP*/0, /*#*/0, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
    4243             : /*8585*/        OPC_EmitInteger, MVT::i32, 14, 
    4244             : /*8588*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4245             : /*8591*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4246             : /*8594*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDrs), 0,
    4247             :                     MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
    4248             :                 // Src: (add:i32 t2_so_reg:i32:$ShiftedRm, GPRnopc:i32:$Rn) - Complexity = 12
    4249             :                 // Dst: (t2ADDrs:i32 GPRnopc:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
    4250             : /*8606*/      /*Scope*/ 45, /*->8652*/
    4251             : /*8607*/        OPC_MoveChild0,
    4252             : /*8608*/        OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    4253             : /*8611*/        OPC_MoveChild0,
    4254             : /*8612*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    4255             : /*8615*/        OPC_RecordChild0, // #0 = $Rn
    4256             : /*8616*/        OPC_MoveChild1,
    4257             : /*8617*/        OPC_CheckValueType, MVT::i16,
    4258             : /*8619*/        OPC_MoveParent,
    4259             : /*8620*/        OPC_MoveParent,
    4260             : /*8621*/        OPC_MoveChild1,
    4261             : /*8622*/        OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND_INREG),
    4262             : /*8625*/        OPC_RecordChild0, // #1 = $Rm
    4263             : /*8626*/        OPC_MoveChild1,
    4264             : /*8627*/        OPC_CheckValueType, MVT::i16,
    4265             : /*8629*/        OPC_MoveParent,
    4266             : /*8630*/        OPC_MoveParent,
    4267             : /*8631*/        OPC_MoveParent,
    4268             : /*8632*/        OPC_RecordChild1, // #2 = $Ra
    4269             : /*8633*/        OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4270             : /*8635*/        OPC_EmitInteger, MVT::i32, 14, 
    4271             : /*8638*/        OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4272             : /*8641*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABB), 0,
    4273             :                     MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4274             :                 // Src: (add:i32 (mul:i32 (sext_inreg:i32 rGPR:i32:$Rn, i16:Other), (sext_inreg:i32 rGPR:i32:$Rm, i16:Other)), rGPR:i32:$Ra) - Complexity = 12
    4275             :                 // Dst: (t2SMLABB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4276             : /*8652*/      /*Scope*/ 115, /*->8768*/
    4277             : /*8653*/        OPC_RecordChild0, // #0 = $acc
    4278             : /*8654*/        OPC_Scope, 36, /*->8692*/ // 3 children in Scope
    4279             : /*8656*/          OPC_MoveChild1,
    4280             : /*8657*/          OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    4281             : /*8660*/          OPC_RecordChild0, // #1 = $a
    4282             : /*8661*/          OPC_MoveChild0,
    4283             : /*8662*/          OPC_CheckPredicate, 12, // Predicate_sext_16_node
    4284             : /*8664*/          OPC_MoveParent,
    4285             : /*8665*/          OPC_RecordChild1, // #2 = $b
    4286             : /*8666*/          OPC_MoveChild1,
    4287             : /*8667*/          OPC_CheckPredicate, 12, // Predicate_sext_16_node
    4288             : /*8669*/          OPC_MoveParent,
    4289             : /*8670*/          OPC_MoveParent,
    4290             : /*8671*/          OPC_CheckType, MVT::i32,
    4291             : /*8673*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4292             : /*8675*/          OPC_EmitInteger, MVT::i32, 14, 
    4293             : /*8678*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4294             : /*8681*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABB), 0,
    4295             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4296             :                   // Src: (add:i32 GPR:i32:$acc, (mul:i32 GPR:i32<<P:Predicate_sext_16_node>>:$a, GPR:i32<<P:Predicate_sext_16_node>>:$b)) - Complexity = 8
    4297             :                   // Dst: (SMLABB:i32 GPR:i32:$a, GPR:i32:$b, GPR:i32:$acc)
    4298             : /*8692*/        /*Scope*/ 37, /*->8730*/
    4299             : /*8693*/          OPC_RecordChild1, // #1 = $imm
    4300             : /*8694*/          OPC_MoveChild1,
    4301             : /*8695*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4302             : /*8698*/          OPC_CheckPredicate, 13, // Predicate_imm1_255_neg
    4303             : /*8700*/          OPC_MoveParent,
    4304             : /*8701*/          OPC_CheckType, MVT::i32,
    4305             : /*8703*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4306             : /*8705*/          OPC_EmitConvertToTarget, 1,
    4307             : /*8707*/          OPC_EmitNodeXForm, 3, 2, // imm_neg_XFORM
    4308             : /*8710*/          OPC_EmitInteger, MVT::i32, 14, 
    4309             : /*8713*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4310             : /*8716*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4311             : /*8719*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SUBri), 0,
    4312             :                       MVT::i32, 5/*#Ops*/, 0, 3, 4, 5, 6, 
    4313             :                   // Src: (add:i32 GPR:i32:$src, (imm:i32)<<P:Predicate_imm1_255_neg>><<X:imm_neg_XFORM>>:$imm) - Complexity = 8
    4314             :                   // Dst: (t2SUBri:i32 GPR:i32:$src, (imm_neg_XFORM:i32 (imm:i32)<<P:Predicate_imm1_255_neg>>:$imm))
    4315             : /*8730*/        /*Scope*/ 36, /*->8767*/
    4316             : /*8731*/          OPC_MoveChild1,
    4317             : /*8732*/          OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    4318             : /*8735*/          OPC_RecordChild0, // #1 = $Rn
    4319             : /*8736*/          OPC_MoveChild0,
    4320             : /*8737*/          OPC_CheckPredicate, 12, // Predicate_sext_16_node
    4321             : /*8739*/          OPC_MoveParent,
    4322             : /*8740*/          OPC_RecordChild1, // #2 = $Rm
    4323             : /*8741*/          OPC_MoveChild1,
    4324             : /*8742*/          OPC_CheckPredicate, 12, // Predicate_sext_16_node
    4325             : /*8744*/          OPC_MoveParent,
    4326             : /*8745*/          OPC_MoveParent,
    4327             : /*8746*/          OPC_CheckType, MVT::i32,
    4328             : /*8748*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4329             : /*8750*/          OPC_EmitInteger, MVT::i32, 14, 
    4330             : /*8753*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4331             : /*8756*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABB), 0,
    4332             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4333             :                   // Src: (add:i32 rGPR:i32:$Ra, (mul:i32 GPR:i32<<P:Predicate_sext_16_node>>:$Rn, GPR:i32<<P:Predicate_sext_16_node>>:$Rm)) - Complexity = 8
    4334             :                   // Dst: (t2SMLABB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4335             : /*8767*/        0, /*End of Scope*/
    4336             : /*8768*/      /*Scope*/ 60, /*->8829*/
    4337             : /*8769*/        OPC_MoveChild0,
    4338             : /*8770*/        OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    4339             : /*8773*/        OPC_RecordChild0, // #0 = $a
    4340             : /*8774*/        OPC_MoveChild0,
    4341             : /*8775*/        OPC_CheckPredicate, 12, // Predicate_sext_16_node
    4342             : /*8777*/        OPC_MoveParent,
    4343             : /*8778*/        OPC_RecordChild1, // #1 = $b
    4344             : /*8779*/        OPC_MoveChild1,
    4345             : /*8780*/        OPC_CheckPredicate, 12, // Predicate_sext_16_node
    4346             : /*8782*/        OPC_MoveParent,
    4347             : /*8783*/        OPC_MoveParent,
    4348             : /*8784*/        OPC_RecordChild1, // #2 = $acc
    4349             : /*8785*/        OPC_CheckType, MVT::i32,
    4350             : /*8787*/        OPC_Scope, 19, /*->8808*/ // 2 children in Scope
    4351             : /*8789*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4352             : /*8791*/          OPC_EmitInteger, MVT::i32, 14, 
    4353             : /*8794*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4354             : /*8797*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLABB), 0,
    4355             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4356             :                   // Src: (add:i32 (mul:i32 GPR:i32<<P:Predicate_sext_16_node>>:$a, GPR:i32<<P:Predicate_sext_16_node>>:$b), GPR:i32:$acc) - Complexity = 8
    4357             :                   // Dst: (SMLABB:i32 GPR:i32:$a, GPR:i32:$b, GPR:i32:$acc)
    4358             : /*8808*/        /*Scope*/ 19, /*->8828*/
    4359             : /*8809*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4360             : /*8811*/          OPC_EmitInteger, MVT::i32, 14, 
    4361             : /*8814*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4362             : /*8817*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLABB), 0,
    4363             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4364             :                   // Src: (add:i32 (mul:i32 GPR:i32<<P:Predicate_sext_16_node>>:$Rn, GPR:i32<<P:Predicate_sext_16_node>>:$Rm), rGPR:i32:$Ra) - Complexity = 8
    4365             :                   // Dst: (t2SMLABB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4366             : /*8828*/        0, /*End of Scope*/
    4367             : /*8829*/      /*Scope*/ 25|128,3/*409*/, /*->9240*/
    4368             : /*8831*/        OPC_RecordChild0, // #0 = $Rn
    4369             : /*8832*/        OPC_RecordChild1, // #1 = $imm
    4370             : /*8833*/        OPC_MoveChild1,
    4371             : /*8834*/        OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4372             : /*8837*/        OPC_Scope, 29, /*->8868*/ // 11 children in Scope
    4373             : /*8839*/          OPC_CheckPredicate, 7, // Predicate_mod_imm
    4374             : /*8841*/          OPC_MoveParent,
    4375             : /*8842*/          OPC_CheckType, MVT::i32,
    4376             : /*8844*/          OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    4377             : /*8846*/          OPC_EmitConvertToTarget, 1,
    4378             : /*8848*/          OPC_EmitInteger, MVT::i32, 14, 
    4379             : /*8851*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4380             : /*8854*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4381             : /*8857*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::ADDri), 0,
    4382             :                       MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
    4383             :                   // Src: (add:i32 GPR:i32:$Rn, (imm:i32)<<P:Predicate_mod_imm>>:$imm) - Complexity = 7
    4384             :                   // Dst: (ADDri:i32 GPR:i32:$Rn, (imm:i32):$imm)
    4385             : /*8868*/        /*Scope*/ 32, /*->8901*/
    4386             : /*8869*/          OPC_CheckPredicate, 14, // Predicate_mod_imm_neg
    4387             : /*8871*/          OPC_MoveParent,
    4388             : /*8872*/          OPC_CheckType, MVT::i32,
    4389             : /*8874*/          OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    4390             : /*8876*/          OPC_EmitConvertToTarget, 1,
    4391             : /*8878*/          OPC_EmitNodeXForm, 3, 2, // imm_neg_XFORM
    4392             : /*8881*/          OPC_EmitInteger, MVT::i32, 14, 
    4393             : /*8884*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4394             : /*8887*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4395             : /*8890*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SUBri), 0,
    4396             :                       MVT::i32, 5/*#Ops*/, 0, 3, 4, 5, 6, 
    4397             :                   // Src: (add:i32 GPR:i32:$src, (imm:i32)<<P:Predicate_mod_imm_neg>><<X:imm_neg_XFORM>>:$imm) - Complexity = 7
    4398             :                   // Dst: (SUBri:i32 GPR:i32:$src, (imm_neg_XFORM:i32 (imm:i32)<<P:Predicate_mod_imm_neg>>:$imm))
    4399             : /*8901*/        /*Scope*/ 29, /*->8931*/
    4400             : /*8902*/          OPC_CheckPredicate, 15, // Predicate_imm0_7
    4401             : /*8904*/          OPC_MoveParent,
    4402             : /*8905*/          OPC_CheckType, MVT::i32,
    4403             : /*8907*/          OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    4404             : /*8909*/          OPC_EmitRegister, MVT::i32, ARM::CPSR,
    4405             : /*8912*/          OPC_EmitConvertToTarget, 1,
    4406             : /*8914*/          OPC_EmitInteger, MVT::i32, 14, 
    4407             : /*8917*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4408             : /*8920*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::tADDi3), 0,
    4409             :                       MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    4410             :                   // Src: (add:i32 tGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm0_7>>:$imm3) - Complexity = 7
    4411             :                   // Dst: (tADDi3:i32 tGPR:i32:$Rm, (imm:i32):$imm3)
    4412             : /*8931*/        /*Scope*/ 29, /*->8961*/
    4413             : /*8932*/          OPC_CheckPredicate, 16, // Predicate_imm8_255
    4414             : /*8934*/          OPC_MoveParent,
    4415             : /*8935*/          OPC_CheckType, MVT::i32,
    4416             : /*8937*/          OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    4417             : /*8939*/          OPC_EmitRegister, MVT::i32, ARM::CPSR,
    4418             : /*8942*/          OPC_EmitConvertToTarget, 1,
    4419             : /*8944*/          OPC_EmitInteger, MVT::i32, 14, 
    4420             : /*8947*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4421             : /*8950*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::tADDi8), 0,
    4422             :                       MVT::i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    4423             :                   // Src: (add:i32 tGPR:i32:$Rn, (imm:i32)<<P:Predicate_imm8_255>>:$imm8) - Complexity = 7
    4424             :                   // Dst: (tADDi8:i32 tGPR:i32:$Rn, (imm:i32):$imm8)
    4425             : /*8961*/        /*Scope*/ 32, /*->8994*/
    4426             : /*8962*/          OPC_CheckPredicate, 17, // Predicate_imm0_7_neg
    4427             : /*8964*/          OPC_MoveParent,
    4428             : /*8965*/          OPC_CheckType, MVT::i32,
    4429             : /*8967*/          OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    4430             : /*8969*/          OPC_EmitRegister, MVT::i32, ARM::CPSR,
    4431             : /*8972*/          OPC_EmitConvertToTarget, 1,
    4432             : /*8974*/          OPC_EmitNodeXForm, 3, 3, // imm_neg_XFORM
    4433             : /*8977*/          OPC_EmitInteger, MVT::i32, 14, 
    4434             : /*8980*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4435             : /*8983*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::tSUBi3), 0,
    4436             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4437             :                   // Src: (add:i32 tGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm0_7_neg>><<X:imm_neg_XFORM>>:$imm3) - Complexity = 7
    4438             :                   // Dst: (tSUBi3:i32 tGPR:i32:$Rm, (imm_neg_XFORM:i32 (imm:i32):$imm3))
    4439             : /*8994*/        /*Scope*/ 32, /*->9027*/
    4440             : /*8995*/          OPC_CheckPredicate, 18, // Predicate_imm8_255_neg
    4441             : /*8997*/          OPC_MoveParent,
    4442             : /*8998*/          OPC_CheckType, MVT::i32,
    4443             : /*9000*/          OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    4444             : /*9002*/          OPC_EmitRegister, MVT::i32, ARM::CPSR,
    4445             : /*9005*/          OPC_EmitConvertToTarget, 1,
    4446             : /*9007*/          OPC_EmitNodeXForm, 3, 3, // imm_neg_XFORM
    4447             : /*9010*/          OPC_EmitInteger, MVT::i32, 14, 
    4448             : /*9013*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4449             : /*9016*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::tSUBi8), 0,
    4450             :                       MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    4451             :                   // Src: (add:i32 tGPR:i32:$Rn, (imm:i32)<<P:Predicate_imm8_255_neg>><<X:imm_neg_XFORM>>:$imm8) - Complexity = 7
    4452             :                   // Dst: (tSUBi8:i32 tGPR:i32:$Rn, (imm_neg_XFORM:i32 (imm:i32):$imm8))
    4453             : /*9027*/        /*Scope*/ 29, /*->9057*/
    4454             : /*9028*/          OPC_CheckPredicate, 6, // Predicate_t2_so_imm
    4455             : /*9030*/          OPC_MoveParent,
    4456             : /*9031*/          OPC_CheckType, MVT::i32,
    4457             : /*9033*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4458             : /*9035*/          OPC_EmitConvertToTarget, 1,
    4459             : /*9037*/          OPC_EmitInteger, MVT::i32, 14, 
    4460             : /*9040*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4461             : /*9043*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4462             : /*9046*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDri), 0,
    4463             :                       MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
    4464             :                   // Src: (add:i32 GPRnopc:i32:$Rn, (imm:i32)<<P:Predicate_t2_so_imm>>:$imm) - Complexity = 7
    4465             :                   // Dst: (t2ADDri:i32 GPRnopc:i32:$Rn, (imm:i32):$imm)
    4466             : /*9057*/        /*Scope*/ 25, /*->9083*/
    4467             : /*9058*/          OPC_CheckPredicate, 19, // Predicate_imm0_4095
    4468             : /*9060*/          OPC_MoveParent,
    4469             : /*9061*/          OPC_CheckType, MVT::i32,
    4470             : /*9063*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4471             : /*9065*/          OPC_EmitConvertToTarget, 1,
    4472             : /*9067*/          OPC_EmitInteger, MVT::i32, 14, 
    4473             : /*9070*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4474             : /*9073*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDri12), 0,
    4475             :                       MVT::i32, 4/*#Ops*/, 0, 2, 3, 4, 
    4476             :                   // Src: (add:i32 GPR:i32:$Rn, (imm:i32)<<P:Predicate_imm0_4095>>:$imm) - Complexity = 7
    4477             :                   // Dst: (t2ADDri12:i32 GPR:i32:$Rn, (imm:i32):$imm)
    4478             : /*9083*/        /*Scope*/ 32, /*->9116*/
    4479             : /*9084*/          OPC_CheckPredicate, 20, // Predicate_t2_so_imm_neg
    4480             : /*9086*/          OPC_MoveParent,
    4481             : /*9087*/          OPC_CheckType, MVT::i32,
    4482             : /*9089*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4483             : /*9091*/          OPC_EmitConvertToTarget, 1,
    4484             : /*9093*/          OPC_EmitNodeXForm, 4, 2, // t2_so_imm_neg_XFORM
    4485             : /*9096*/          OPC_EmitInteger, MVT::i32, 14, 
    4486             : /*9099*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4487             : /*9102*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4488             : /*9105*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SUBri), 0,
    4489             :                       MVT::i32, 5/*#Ops*/, 0, 3, 4, 5, 6, 
    4490             :                   // Src: (add:i32 GPR:i32:$src, (imm:i32)<<P:Predicate_t2_so_imm_neg>><<X:t2_so_imm_neg_XFORM>>:$imm) - Complexity = 7
    4491             :                   // Dst: (t2SUBri:i32 GPR:i32:$src, (t2_so_imm_neg_XFORM:i32 (imm:i32)<<P:Predicate_t2_so_imm_neg>>:$imm))
    4492             : /*9116*/        /*Scope*/ 28, /*->9145*/
    4493             : /*9117*/          OPC_CheckPredicate, 21, // Predicate_imm0_4095_neg
    4494             : /*9119*/          OPC_MoveParent,
    4495             : /*9120*/          OPC_CheckType, MVT::i32,
    4496             : /*9122*/          OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4497             : /*9124*/          OPC_EmitConvertToTarget, 1,
    4498             : /*9126*/          OPC_EmitNodeXForm, 3, 2, // imm_neg_XFORM
    4499             : /*9129*/          OPC_EmitInteger, MVT::i32, 14, 
    4500             : /*9132*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4501             : /*9135*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SUBri12), 0,
    4502             :                       MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
    4503             :                   // Src: (add:i32 GPR:i32:$src, (imm:i32)<<P:Predicate_imm0_4095_neg>><<X:imm_neg_XFORM>>:$imm) - Complexity = 7
    4504             :                   // Dst: (t2SUBri12:i32 GPR:i32:$src, (imm_neg_XFORM:i32 (imm:i32)<<P:Predicate_imm0_4095_neg>>:$imm))
    4505             : /*9145*/        /*Scope*/ 93, /*->9239*/
    4506             : /*9146*/          OPC_CheckPredicate, 22, // Predicate_imm0_65535_neg
    4507             : /*9148*/          OPC_MoveParent,
    4508             : /*9149*/          OPC_CheckType, MVT::i32,
    4509             : /*9151*/          OPC_Scope, 42, /*->9195*/ // 2 children in Scope
    4510             : /*9153*/            OPC_CheckPatternPredicate, 3, // (Subtarget->hasV6T2Ops()) && (!Subtarget->isThumb())
    4511             : /*9155*/            OPC_EmitConvertToTarget, 1,
    4512             : /*9157*/            OPC_EmitNodeXForm, 3, 2, // imm_neg_XFORM
    4513             : /*9160*/            OPC_EmitInteger, MVT::i32, 14, 
    4514             : /*9163*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4515             : /*9166*/            OPC_EmitNode1, TARGET_VAL(ARM::MOVi16), 0,
    4516             :                         MVT::i32, 3/*#Ops*/, 3, 4, 5,  // Results = #6
    4517             : /*9175*/            OPC_EmitInteger, MVT::i32, 14, 
    4518             : /*9178*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4519             : /*9181*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4520             : /*9184*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SUBrr), 0,
    4521             :                         MVT::i32, 5/*#Ops*/, 0, 6, 7, 8, 9, 
    4522             :                     // Src: (add:i32 GPR:i32:$src, (imm:i32)<<P:Predicate_imm0_65535_neg>>:$imm) - Complexity = 7
    4523             :                     // Dst: (SUBrr:i32 GPR:i32:$src, (MOVi16:i32 (imm_neg_XFORM:i32 (imm:i32):$imm)))
    4524             : /*9195*/          /*Scope*/ 42, /*->9238*/
    4525             : /*9196*/            OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4526             : /*9198*/            OPC_EmitConvertToTarget, 1,
    4527             : /*9200*/            OPC_EmitNodeXForm, 3, 2, // imm_neg_XFORM
    4528             : /*9203*/            OPC_EmitInteger, MVT::i32, 14, 
    4529             : /*9206*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4530             : /*9209*/            OPC_EmitNode1, TARGET_VAL(ARM::t2MOVi16), 0,
    4531             :                         MVT::i32, 3/*#Ops*/, 3, 4, 5,  // Results = #6
    4532             : /*9218*/            OPC_EmitInteger, MVT::i32, 14, 
    4533             : /*9221*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4534             : /*9224*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4535             : /*9227*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SUBrr), 0,
    4536             :                         MVT::i32, 5/*#Ops*/, 0, 6, 7, 8, 9, 
    4537             :                     // Src: (add:i32 GPR:i32:$src, (imm:i32)<<P:Predicate_imm0_65535_neg>>:$imm) - Complexity = 7
    4538             :                     // Dst: (t2SUBrr:i32 GPR:i32:$src, (t2MOVi16:i32 (imm_neg_XFORM:i32 (imm:i32):$imm)))
    4539             : /*9238*/          0, /*End of Scope*/
    4540             : /*9239*/        0, /*End of Scope*/
    4541             : /*9240*/      /*Scope*/ 90, /*->9331*/
    4542             : /*9241*/        OPC_MoveChild0,
    4543             : /*9242*/        OPC_SwitchOpcode /*2 cases */, 56, TARGET_VAL(ISD::MUL),// ->9302
    4544             : /*9246*/          OPC_RecordChild0, // #0 = $Rn
    4545             : /*9247*/          OPC_RecordChild1, // #1 = $Rm
    4546             : /*9248*/          OPC_MoveParent,
    4547             : /*9249*/          OPC_RecordChild1, // #2 = $Ra
    4548             : /*9250*/          OPC_CheckType, MVT::i32,
    4549             : /*9252*/          OPC_Scope, 23, /*->9277*/ // 2 children in Scope
    4550             : /*9254*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4551             : /*9256*/            OPC_EmitInteger, MVT::i32, 14, 
    4552             : /*9259*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4553             : /*9262*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4554             : /*9265*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MLA), 0,
    4555             :                         MVT::i32, 6/*#Ops*/, 0, 1, 2, 3, 4, 5, 
    4556             :                     // Src: (add:i32 (mul:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm), GPRnopc:i32:$Ra) - Complexity = 6
    4557             :                     // Dst: (MLA:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPRnopc:i32:$Ra)
    4558             : /*9277*/          /*Scope*/ 23, /*->9301*/
    4559             : /*9278*/            OPC_CheckPatternPredicate, 11, // (!Subtarget->isThumb()) && (!Subtarget->hasV6Ops())
    4560             : /*9280*/            OPC_EmitInteger, MVT::i32, 14, 
    4561             : /*9283*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4562             : /*9286*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4563             : /*9289*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MLAv5), 0,
    4564             :                         MVT::i32, 6/*#Ops*/, 0, 1, 2, 3, 4, 5, 
    4565             :                     // Src: (add:i32 (mul:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm), GPRnopc:i32:$Ra) - Complexity = 6
    4566             :                     // Dst: (MLAv5:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPRnopc:i32:$Ra)
    4567             : /*9301*/          0, /*End of Scope*/
    4568             : /*9302*/        /*SwitchOpcode*/ 25, TARGET_VAL(ISD::MULHS),// ->9330
    4569             : /*9305*/          OPC_RecordChild0, // #0 = $Rn
    4570             : /*9306*/          OPC_RecordChild1, // #1 = $Rm
    4571             : /*9307*/          OPC_MoveParent,
    4572             : /*9308*/          OPC_RecordChild1, // #2 = $Ra
    4573             : /*9309*/          OPC_CheckType, MVT::i32,
    4574             : /*9311*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4575             : /*9313*/          OPC_EmitInteger, MVT::i32, 14, 
    4576             : /*9316*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4577             : /*9319*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMMLA), 0,
    4578             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4579             :                   // Src: (add:i32 (mulhs:i32 GPR:i32:$Rn, GPR:i32:$Rm), GPR:i32:$Ra) - Complexity = 6
    4580             :                   // Dst: (SMMLA:i32 GPR:i32:$Rn, GPR:i32:$Rm, GPR:i32:$Ra)
    4581             : /*9330*/        0, // EndSwitchOpcode
    4582             : /*9331*/      /*Scope*/ 119, /*->9451*/
    4583             : /*9332*/        OPC_RecordChild0, // #0 = $Ra
    4584             : /*9333*/        OPC_MoveChild1,
    4585             : /*9334*/        OPC_SwitchOpcode /*3 cases */, 24, TARGET_VAL(ARMISD::SMULWB),// ->9362
    4586             : /*9338*/          OPC_RecordChild0, // #1 = $Rn
    4587             : /*9339*/          OPC_RecordChild1, // #2 = $Rm
    4588             : /*9340*/          OPC_MoveParent,
    4589             : /*9341*/          OPC_CheckType, MVT::i32,
    4590             : /*9343*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4591             : /*9345*/          OPC_EmitInteger, MVT::i32, 14, 
    4592             : /*9348*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4593             : /*9351*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLAWB), 0,
    4594             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4595             :                   // Src: (add:i32 GPR:i32:$Ra, (ARMsmulwb:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm)) - Complexity = 6
    4596             :                   // Dst: (SMLAWB:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    4597             : /*9362*/        /*SwitchOpcode*/ 24, TARGET_VAL(ARMISD::SMULWT),// ->9389
    4598             : /*9365*/          OPC_RecordChild0, // #1 = $Rn
    4599             : /*9366*/          OPC_RecordChild1, // #2 = $Rm
    4600             : /*9367*/          OPC_MoveParent,
    4601             : /*9368*/          OPC_CheckType, MVT::i32,
    4602             : /*9370*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4603             : /*9372*/          OPC_EmitInteger, MVT::i32, 14, 
    4604             : /*9375*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4605             : /*9378*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLAWT), 0,
    4606             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4607             :                   // Src: (add:i32 GPR:i32:$Ra, (ARMsmulwt:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm)) - Complexity = 6
    4608             :                   // Dst: (SMLAWT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    4609             : /*9389*/        /*SwitchOpcode*/ 58, TARGET_VAL(ISD::SIGN_EXTEND_INREG),// ->9450
    4610             : /*9392*/          OPC_RecordChild0, // #1 = $Rm
    4611             : /*9393*/          OPC_MoveChild1,
    4612             : /*9394*/          OPC_Scope, 26, /*->9422*/ // 2 children in Scope
    4613             : /*9396*/            OPC_CheckValueType, MVT::i8,
    4614             : /*9398*/            OPC_MoveParent,
    4615             : /*9399*/            OPC_MoveParent,
    4616             : /*9400*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    4617             : /*9402*/            OPC_EmitInteger, MVT::i32, 0, 
    4618             : /*9405*/            OPC_EmitInteger, MVT::i32, 14, 
    4619             : /*9408*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4620             : /*9411*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAB), 0,
    4621             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4622             :                     // Src: (add:i32 GPR:i32:$Rn, (sext_inreg:i32 GPRnopc:i32:$Rm, i8:Other)) - Complexity = 6
    4623             :                     // Dst: (SXTAB:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, 0:i32)
    4624             : /*9422*/          /*Scope*/ 26, /*->9449*/
    4625             : /*9423*/            OPC_CheckValueType, MVT::i16,
    4626             : /*9425*/            OPC_MoveParent,
    4627             : /*9426*/            OPC_MoveParent,
    4628             : /*9427*/            OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    4629             : /*9429*/            OPC_EmitInteger, MVT::i32, 0, 
    4630             : /*9432*/            OPC_EmitInteger, MVT::i32, 14, 
    4631             : /*9435*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4632             : /*9438*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAH), 0,
    4633             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4634             :                     // Src: (add:i32 GPR:i32:$Rn, (sext_inreg:i32 GPRnopc:i32:$Rm, i16:Other)) - Complexity = 6
    4635             :                     // Dst: (SXTAH:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, 0:i32)
    4636             : /*9449*/          0, /*End of Scope*/
    4637             : /*9450*/        0, // EndSwitchOpcode
    4638             : /*9451*/      /*Scope*/ 59, /*->9511*/
    4639             : /*9452*/        OPC_MoveChild0,
    4640             : /*9453*/        OPC_SwitchOpcode /*2 cases */, 25, TARGET_VAL(ISD::MUL),// ->9482
    4641             : /*9457*/          OPC_RecordChild0, // #0 = $Rn
    4642             : /*9458*/          OPC_RecordChild1, // #1 = $Rm
    4643             : /*9459*/          OPC_MoveParent,
    4644             : /*9460*/          OPC_RecordChild1, // #2 = $Ra
    4645             : /*9461*/          OPC_CheckType, MVT::i32,
    4646             : /*9463*/          OPC_CheckPatternPredicate, 12, // (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4647             : /*9465*/          OPC_EmitInteger, MVT::i32, 14, 
    4648             : /*9468*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4649             : /*9471*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2MLA), 0,
    4650             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4651             :                   // Src: (add:i32 (mul:i32 rGPR:i32:$Rn, rGPR:i32:$Rm), rGPR:i32:$Ra) - Complexity = 6
    4652             :                   // Dst: (t2MLA:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4653             : /*9482*/        /*SwitchOpcode*/ 25, TARGET_VAL(ISD::MULHS),// ->9510
    4654             : /*9485*/          OPC_RecordChild0, // #0 = $Rm
    4655             : /*9486*/          OPC_RecordChild1, // #1 = $Rn
    4656             : /*9487*/          OPC_MoveParent,
    4657             : /*9488*/          OPC_RecordChild1, // #2 = $Ra
    4658             : /*9489*/          OPC_CheckType, MVT::i32,
    4659             : /*9491*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4660             : /*9493*/          OPC_EmitInteger, MVT::i32, 14, 
    4661             : /*9496*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4662             : /*9499*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMMLA), 0,
    4663             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    4664             :                   // Src: (add:i32 (mulhs:i32 rGPR:i32:$Rm, rGPR:i32:$Rn), rGPR:i32:$Ra) - Complexity = 6
    4665             :                   // Dst: (t2SMMLA:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4666             : /*9510*/        0, // EndSwitchOpcode
    4667             : /*9511*/      /*Scope*/ 76|128,1/*204*/, /*->9717*/
    4668             : /*9513*/        OPC_RecordChild0, // #0 = $Ra
    4669             : /*9514*/        OPC_MoveChild1,
    4670             : /*9515*/        OPC_SwitchOpcode /*5 cases */, 24, TARGET_VAL(ARMISD::SMULWB),// ->9543
    4671             : /*9519*/          OPC_RecordChild0, // #1 = $Rn
    4672             : /*9520*/          OPC_RecordChild1, // #2 = $Rm
    4673             : /*9521*/          OPC_MoveParent,
    4674             : /*9522*/          OPC_CheckType, MVT::i32,
    4675             : /*9524*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4676             : /*9526*/          OPC_EmitInteger, MVT::i32, 14, 
    4677             : /*9529*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4678             : /*9532*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLAWB), 0,
    4679             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4680             :                   // Src: (add:i32 rGPR:i32:$Ra, (ARMsmulwb:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)) - Complexity = 6
    4681             :                   // Dst: (t2SMLAWB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4682             : /*9543*/        /*SwitchOpcode*/ 24, TARGET_VAL(ARMISD::SMULWT),// ->9570
    4683             : /*9546*/          OPC_RecordChild0, // #1 = $Rn
    4684             : /*9547*/          OPC_RecordChild1, // #2 = $Rm
    4685             : /*9548*/          OPC_MoveParent,
    4686             : /*9549*/          OPC_CheckType, MVT::i32,
    4687             : /*9551*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4688             : /*9553*/          OPC_EmitInteger, MVT::i32, 14, 
    4689             : /*9556*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4690             : /*9559*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLAWT), 0,
    4691             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4692             :                   // Src: (add:i32 rGPR:i32:$Ra, (ARMsmulwt:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)) - Complexity = 6
    4693             :                   // Dst: (t2SMLAWT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4694             : /*9570*/        /*SwitchOpcode*/ 58, TARGET_VAL(ISD::SIGN_EXTEND_INREG),// ->9631
    4695             : /*9573*/          OPC_RecordChild0, // #1 = $Rm
    4696             : /*9574*/          OPC_MoveChild1,
    4697             : /*9575*/          OPC_Scope, 26, /*->9603*/ // 2 children in Scope
    4698             : /*9577*/            OPC_CheckValueType, MVT::i8,
    4699             : /*9579*/            OPC_MoveParent,
    4700             : /*9580*/            OPC_MoveParent,
    4701             : /*9581*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    4702             : /*9583*/            OPC_EmitInteger, MVT::i32, 0, 
    4703             : /*9586*/            OPC_EmitInteger, MVT::i32, 14, 
    4704             : /*9589*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4705             : /*9592*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAB), 0,
    4706             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4707             :                     // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 rGPR:i32:$Rm, i8:Other)) - Complexity = 6
    4708             :                     // Dst: (t2SXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 0:i32)
    4709             : /*9603*/          /*Scope*/ 26, /*->9630*/
    4710             : /*9604*/            OPC_CheckValueType, MVT::i16,
    4711             : /*9606*/            OPC_MoveParent,
    4712             : /*9607*/            OPC_MoveParent,
    4713             : /*9608*/            OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    4714             : /*9610*/            OPC_EmitInteger, MVT::i32, 0, 
    4715             : /*9613*/            OPC_EmitInteger, MVT::i32, 14, 
    4716             : /*9616*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4717             : /*9619*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    4718             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4719             :                     // Src: (add:i32 rGPR:i32:$Rn, (sext_inreg:i32 rGPR:i32:$Rm, i16:Other)) - Complexity = 6
    4720             :                     // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 0:i32)
    4721             : /*9630*/          0, /*End of Scope*/
    4722             : /*9631*/        /*SwitchOpcode*/ 55, TARGET_VAL(ISD::MUL),// ->9689
    4723             : /*9634*/          OPC_RecordChild0, // #1 = $Rn
    4724             : /*9635*/          OPC_RecordChild1, // #2 = $Rm
    4725             : /*9636*/          OPC_MoveParent,
    4726             : /*9637*/          OPC_CheckType, MVT::i32,
    4727             : /*9639*/          OPC_Scope, 23, /*->9664*/ // 2 children in Scope
    4728             : /*9641*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4729             : /*9643*/            OPC_EmitInteger, MVT::i32, 14, 
    4730             : /*9646*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4731             : /*9649*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4732             : /*9652*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MLA), 0,
    4733             :                         MVT::i32, 6/*#Ops*/, 1, 2, 0, 3, 4, 5, 
    4734             :                     // Src: (add:i32 GPRnopc:i32:$Ra, (mul:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm)) - Complexity = 6
    4735             :                     // Dst: (MLA:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPRnopc:i32:$Ra)
    4736             : /*9664*/          /*Scope*/ 23, /*->9688*/
    4737             : /*9665*/            OPC_CheckPatternPredicate, 11, // (!Subtarget->isThumb()) && (!Subtarget->hasV6Ops())
    4738             : /*9667*/            OPC_EmitInteger, MVT::i32, 14, 
    4739             : /*9670*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4740             : /*9673*/            OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4741             : /*9676*/            OPC_MorphNodeTo1, TARGET_VAL(ARM::MLAv5), 0,
    4742             :                         MVT::i32, 6/*#Ops*/, 1, 2, 0, 3, 4, 5, 
    4743             :                     // Src: (add:i32 GPRnopc:i32:$Ra, (mul:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm)) - Complexity = 6
    4744             :                     // Dst: (MLAv5:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPRnopc:i32:$Ra)
    4745             : /*9688*/          0, /*End of Scope*/
    4746             : /*9689*/        /*SwitchOpcode*/ 24, TARGET_VAL(ISD::MULHS),// ->9716
    4747             : /*9692*/          OPC_RecordChild0, // #1 = $Rn
    4748             : /*9693*/          OPC_RecordChild1, // #2 = $Rm
    4749             : /*9694*/          OPC_MoveParent,
    4750             : /*9695*/          OPC_CheckType, MVT::i32,
    4751             : /*9697*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4752             : /*9699*/          OPC_EmitInteger, MVT::i32, 14, 
    4753             : /*9702*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4754             : /*9705*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMMLA), 0,
    4755             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4756             :                   // Src: (add:i32 GPR:i32:$Ra, (mulhs:i32 GPR:i32:$Rn, GPR:i32:$Rm)) - Complexity = 6
    4757             :                   // Dst: (SMMLA:i32 GPR:i32:$Rn, GPR:i32:$Rm, GPR:i32:$Ra)
    4758             : /*9716*/        0, // EndSwitchOpcode
    4759             : /*9717*/      /*Scope*/ 59, /*->9777*/
    4760             : /*9718*/        OPC_MoveChild0,
    4761             : /*9719*/        OPC_SwitchOpcode /*2 cases */, 25, TARGET_VAL(ARMISD::SMULWB),// ->9748
    4762             : /*9723*/          OPC_RecordChild0, // #0 = $Rn
    4763             : /*9724*/          OPC_RecordChild1, // #1 = $Rm
    4764             : /*9725*/          OPC_MoveParent,
    4765             : /*9726*/          OPC_RecordChild1, // #2 = $Ra
    4766             : /*9727*/          OPC_CheckType, MVT::i32,
    4767             : /*9729*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4768             : /*9731*/          OPC_EmitInteger, MVT::i32, 14, 
    4769             : /*9734*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4770             : /*9737*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLAWB), 0,
    4771             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4772             :                   // Src: (add:i32 (ARMsmulwb:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm), GPR:i32:$Ra) - Complexity = 6
    4773             :                   // Dst: (SMLAWB:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    4774             : /*9748*/        /*SwitchOpcode*/ 25, TARGET_VAL(ARMISD::SMULWT),// ->9776
    4775             : /*9751*/          OPC_RecordChild0, // #0 = $Rn
    4776             : /*9752*/          OPC_RecordChild1, // #1 = $Rm
    4777             : /*9753*/          OPC_MoveParent,
    4778             : /*9754*/          OPC_RecordChild1, // #2 = $Ra
    4779             : /*9755*/          OPC_CheckType, MVT::i32,
    4780             : /*9757*/          OPC_CheckPatternPredicate, 8, // (Subtarget->hasV5TEOps()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps())
    4781             : /*9759*/          OPC_EmitInteger, MVT::i32, 14, 
    4782             : /*9762*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4783             : /*9765*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::SMLAWT), 0,
    4784             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4785             :                   // Src: (add:i32 (ARMsmulwt:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm), GPR:i32:$Ra) - Complexity = 6
    4786             :                   // Dst: (SMLAWT:i32 GPRnopc:i32:$Rn, GPRnopc:i32:$Rm, GPR:i32:$Ra)
    4787             : /*9776*/        0, // EndSwitchOpcode
    4788             : /*9777*/      /*Scope*/ 58, /*->9836*/
    4789             : /*9778*/        OPC_RecordChild0, // #0 = $Ra
    4790             : /*9779*/        OPC_MoveChild1,
    4791             : /*9780*/        OPC_SwitchOpcode /*2 cases */, 24, TARGET_VAL(ISD::MUL),// ->9808
    4792             : /*9784*/          OPC_RecordChild0, // #1 = $Rn
    4793             : /*9785*/          OPC_RecordChild1, // #2 = $Rm
    4794             : /*9786*/          OPC_MoveParent,
    4795             : /*9787*/          OPC_CheckType, MVT::i32,
    4796             : /*9789*/          OPC_CheckPatternPredicate, 12, // (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4797             : /*9791*/          OPC_EmitInteger, MVT::i32, 14, 
    4798             : /*9794*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4799             : /*9797*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2MLA), 0,
    4800             :                       MVT::i32, 5/*#Ops*/, 1, 2, 0, 3, 4, 
    4801             :                   // Src: (add:i32 rGPR:i32:$Ra, (mul:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)) - Complexity = 6
    4802             :                   // Dst: (t2MLA:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4803             : /*9808*/        /*SwitchOpcode*/ 24, TARGET_VAL(ISD::MULHS),// ->9835
    4804             : /*9811*/          OPC_RecordChild0, // #1 = $Rm
    4805             : /*9812*/          OPC_RecordChild1, // #2 = $Rn
    4806             : /*9813*/          OPC_MoveParent,
    4807             : /*9814*/          OPC_CheckType, MVT::i32,
    4808             : /*9816*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4809             : /*9818*/          OPC_EmitInteger, MVT::i32, 14, 
    4810             : /*9821*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4811             : /*9824*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMMLA), 0,
    4812             :                       MVT::i32, 5/*#Ops*/, 2, 1, 0, 3, 4, 
    4813             :                   // Src: (add:i32 rGPR:i32:$Ra, (mulhs:i32 rGPR:i32:$Rm, rGPR:i32:$Rn)) - Complexity = 6
    4814             :                   // Dst: (t2SMMLA:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4815             : /*9835*/        0, // EndSwitchOpcode
    4816             : /*9836*/      /*Scope*/ 46|128,1/*174*/, /*->10012*/
    4817             : /*9838*/        OPC_MoveChild0,
    4818             : /*9839*/        OPC_SwitchOpcode /*3 cases */, 25, TARGET_VAL(ARMISD::SMULWB),// ->9868
    4819             : /*9843*/          OPC_RecordChild0, // #0 = $Rn
    4820             : /*9844*/          OPC_RecordChild1, // #1 = $Rm
    4821             : /*9845*/          OPC_MoveParent,
    4822             : /*9846*/          OPC_RecordChild1, // #2 = $Ra
    4823             : /*9847*/          OPC_CheckType, MVT::i32,
    4824             : /*9849*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4825             : /*9851*/          OPC_EmitInteger, MVT::i32, 14, 
    4826             : /*9854*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4827             : /*9857*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLAWB), 0,
    4828             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4829             :                   // Src: (add:i32 (ARMsmulwb:i32 rGPR:i32:$Rn, rGPR:i32:$Rm), rGPR:i32:$Ra) - Complexity = 6
    4830             :                   // Dst: (t2SMLAWB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4831             : /*9868*/        /*SwitchOpcode*/ 25, TARGET_VAL(ARMISD::SMULWT),// ->9896
    4832             : /*9871*/          OPC_RecordChild0, // #0 = $Rn
    4833             : /*9872*/          OPC_RecordChild1, // #1 = $Rm
    4834             : /*9873*/          OPC_MoveParent,
    4835             : /*9874*/          OPC_RecordChild1, // #2 = $Ra
    4836             : /*9875*/          OPC_CheckType, MVT::i32,
    4837             : /*9877*/          OPC_CheckPatternPredicate, 9, // (Subtarget->hasDSP()) && (Subtarget->isThumb2()) && (Subtarget->useMulOps())
    4838             : /*9879*/          OPC_EmitInteger, MVT::i32, 14, 
    4839             : /*9882*/          OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4840             : /*9885*/          OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SMLAWT), 0,
    4841             :                       MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4842             :                   // Src: (add:i32 (ARMsmulwt:i32 rGPR:i32:$Rn, rGPR:i32:$Rm), rGPR:i32:$Ra) - Complexity = 6
    4843             :                   // Dst: (t2SMLAWT:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, rGPR:i32:$Ra)
    4844             : /*9896*/        /*SwitchOpcode*/ 112, TARGET_VAL(ISD::SIGN_EXTEND_INREG),// ->10011
    4845             : /*9899*/          OPC_RecordChild0, // #0 = $Rm
    4846             : /*9900*/          OPC_MoveChild1,
    4847             : /*9901*/          OPC_Scope, 53, /*->9956*/ // 2 children in Scope
    4848             : /*9903*/            OPC_CheckValueType, MVT::i8,
    4849             : /*9905*/            OPC_MoveParent,
    4850             : /*9906*/            OPC_MoveParent,
    4851             : /*9907*/            OPC_RecordChild1, // #1 = $Rn
    4852             : /*9908*/            OPC_Scope, 22, /*->9932*/ // 2 children in Scope
    4853             : /*9910*/              OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    4854             : /*9912*/              OPC_EmitInteger, MVT::i32, 0, 
    4855             : /*9915*/              OPC_EmitInteger, MVT::i32, 14, 
    4856             : /*9918*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4857             : /*9921*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAB), 0,
    4858             :                           MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    4859             :                       // Src: (add:i32 (sext_inreg:i32 GPRnopc:i32:$Rm, i8:Other), GPR:i32:$Rn) - Complexity = 6
    4860             :                       // Dst: (SXTAB:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, 0:i32)
    4861             : /*9932*/            /*Scope*/ 22, /*->9955*/
    4862             : /*9933*/              OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    4863             : /*9935*/              OPC_EmitInteger, MVT::i32, 0, 
    4864             : /*9938*/              OPC_EmitInteger, MVT::i32, 14, 
    4865             : /*9941*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4866             : /*9944*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAB), 0,
    4867             :                           MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    4868             :                       // Src: (add:i32 (sext_inreg:i32 rGPR:i32:$Rm, i8:Other), rGPR:i32:$Rn) - Complexity = 6
    4869             :                       // Dst: (t2SXTAB:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 0:i32)
    4870             : /*9955*/            0, /*End of Scope*/
    4871             : /*9956*/          /*Scope*/ 53, /*->10010*/
    4872             : /*9957*/            OPC_CheckValueType, MVT::i16,
    4873             : /*9959*/            OPC_MoveParent,
    4874             : /*9960*/            OPC_MoveParent,
    4875             : /*9961*/            OPC_RecordChild1, // #1 = $Rn
    4876             : /*9962*/            OPC_Scope, 22, /*->9986*/ // 2 children in Scope
    4877             : /*9964*/              OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    4878             : /*9966*/              OPC_EmitInteger, MVT::i32, 0, 
    4879             : /*9969*/              OPC_EmitInteger, MVT::i32, 14, 
    4880             : /*9972*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4881             : /*9975*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::SXTAH), 0,
    4882             :                           MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    4883             :                       // Src: (add:i32 (sext_inreg:i32 GPRnopc:i32:$Rm, i16:Other), GPR:i32:$Rn) - Complexity = 6
    4884             :                       // Dst: (SXTAH:i32 GPR:i32:$Rn, GPRnopc:i32:$Rm, 0:i32)
    4885             : /*9986*/            /*Scope*/ 22, /*->10009*/
    4886             : /*9987*/              OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    4887             : /*9989*/              OPC_EmitInteger, MVT::i32, 0, 
    4888             : /*9992*/              OPC_EmitInteger, MVT::i32, 14, 
    4889             : /*9995*/              OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4890             : /*9998*/              OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SXTAH), 0,
    4891             :                           MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    4892             :                       // Src: (add:i32 (sext_inreg:i32 rGPR:i32:$Rm, i16:Other), rGPR:i32:$Rn) - Complexity = 6
    4893             :                       // Dst: (t2SXTAH:i32 rGPR:i32:$Rn, rGPR:i32:$Rm, 0:i32)
    4894             : /*10009*/           0, /*End of Scope*/
    4895             : /*10010*/         0, /*End of Scope*/
    4896             : /*10011*/       0, // EndSwitchOpcode
    4897             : /*10012*/     /*Scope*/ 37|128,2/*293*/, /*->10307*/
    4898             : /*10014*/       OPC_RecordChild0, // #0 = $Rn
    4899             : /*10015*/       OPC_Scope, 89, /*->10106*/ // 2 children in Scope
    4900             : /*10017*/         OPC_RecordChild1, // #1 = $Rm
    4901             : /*10018*/         OPC_CheckType, MVT::i32,
    4902             : /*10020*/         OPC_Scope, 22, /*->10044*/ // 3 children in Scope
    4903             : /*10022*/           OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    4904             : /*10024*/           OPC_EmitInteger, MVT::i32, 14, 
    4905             : /*10027*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4906             : /*10030*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4907             : /*10033*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::ADDrr), 0,
    4908             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4909             :                     // Src: (add:i32 GPR:i32:$Rn, GPR:i32:$Rm) - Complexity = 3
    4910             :                     // Dst: (ADDrr:i32 GPR:i32:$Rn, GPR:i32:$Rm)
    4911             : /*10044*/         /*Scope*/ 22, /*->10067*/
    4912             : /*10045*/           OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    4913             : /*10047*/           OPC_EmitRegister, MVT::i32, ARM::CPSR,
    4914             : /*10050*/           OPC_EmitInteger, MVT::i32, 14, 
    4915             : /*10053*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4916             : /*10056*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::tADDrr), 0,
    4917             :                         MVT::i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    4918             :                     // Src: (add:i32 tGPR:i32:$Rn, tGPR:i32:$Rm) - Complexity = 3
    4919             :                     // Dst: (tADDrr:i32 tGPR:i32:$Rn, tGPR:i32:$Rm)
    4920             : /*10067*/         /*Scope*/ 37, /*->10105*/
    4921             : /*10068*/           OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    4922             : /*10070*/           OPC_EmitInteger, MVT::i32, 14, 
    4923             : /*10073*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4924             : /*10076*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4925             : /*10079*/           OPC_Scope, 11, /*->10092*/ // 2 children in Scope
    4926             : /*10081*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDrr), 0,
    4927             :                           MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4928             :                       // Src: (add:i32 GPRnopc:i32:$Rn, rGPR:i32:$Rm) - Complexity = 3
    4929             :                       // Dst: (t2ADDrr:i32 GPRnopc:i32:$Rn, rGPR:i32:$Rm)
    4930             : /*10092*/           /*Scope*/ 11, /*->10104*/
    4931             : /*10093*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ADDrr), 0,
    4932             :                           MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    4933             :                       // Src: (add:i32 rGPR:i32:$Rm, GPRnopc:i32:$Rn) - Complexity = 3
    4934             :                       // Dst: (t2ADDrr:i32 GPRnopc:i32:$Rn, rGPR:i32:$Rm)
    4935             : /*10104*/           0, /*End of Scope*/
    4936             : /*10105*/         0, /*End of Scope*/
    4937             : /*10106*/       /*Scope*/ 70|128,1/*198*/, /*->10306*/
    4938             : /*10108*/         OPC_MoveChild1,
    4939             : /*10109*/         OPC_CheckOpcode, TARGET_VAL(ISD::ZERO_EXTEND),
    4940             : /*10112*/         OPC_MoveChild0,
    4941             : /*10113*/         OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_WO_CHAIN),
    4942             : /*10116*/         OPC_Scope, 93, /*->10211*/ // 2 children in Scope
    4943             : /*10118*/           OPC_CheckChild0Integer, 97|128,4/*609*/, 
    4944             : /*10121*/           OPC_RecordChild1, // #1 = $Vn
    4945             : /*10122*/           OPC_Scope, 28, /*->10152*/ // 3 children in Scope
    4946             : /*10124*/             OPC_CheckChild1Type, MVT::v8i8,
    4947             : /*10126*/             OPC_RecordChild2, // #2 = $Vm
    4948             : /*10127*/             OPC_CheckChild2Type, MVT::v8i8,
    4949             : /*10129*/             OPC_MoveParent,
    4950             : /*10130*/             OPC_MoveParent,
    4951             : /*10131*/             OPC_CheckType, MVT::v8i16,
    4952             : /*10133*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    4953             : /*10135*/             OPC_EmitInteger, MVT::i32, 14, 
    4954             : /*10138*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4955             : /*10141*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALsv8i16), 0,
    4956             :                           MVT::v8i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4957             :                       // Src: (add:v8i16 QPR:v8i16:$src1, (zext:v8i16 (intrinsic_wo_chain:v8i8 609:iPTR, DPR:v8i8:$Vn, DPR:v8i8:$Vm))) - Complexity = 14
    4958             :                       // Dst: (VABALsv8i16:v8i16 QPR:v8i16:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    4959             : /*10152*/           /*Scope*/ 28, /*->10181*/
    4960             : /*10153*/             OPC_CheckChild1Type, MVT::v4i16,
    4961             : /*10155*/             OPC_RecordChild2, // #2 = $Vm
    4962             : /*10156*/             OPC_CheckChild2Type, MVT::v4i16,
    4963             : /*10158*/             OPC_MoveParent,
    4964             : /*10159*/             OPC_MoveParent,
    4965             : /*10160*/             OPC_CheckType, MVT::v4i32,
    4966             : /*10162*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    4967             : /*10164*/             OPC_EmitInteger, MVT::i32, 14, 
    4968             : /*10167*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4969             : /*10170*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALsv4i32), 0,
    4970             :                           MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4971             :                       // Src: (add:v4i32 QPR:v4i32:$src1, (zext:v4i32 (intrinsic_wo_chain:v4i16 609:iPTR, DPR:v4i16:$Vn, DPR:v4i16:$Vm))) - Complexity = 14
    4972             :                       // Dst: (VABALsv4i32:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    4973             : /*10181*/           /*Scope*/ 28, /*->10210*/
    4974             : /*10182*/             OPC_CheckChild1Type, MVT::v2i32,
    4975             : /*10184*/             OPC_RecordChild2, // #2 = $Vm
    4976             : /*10185*/             OPC_CheckChild2Type, MVT::v2i32,
    4977             : /*10187*/             OPC_MoveParent,
    4978             : /*10188*/             OPC_MoveParent,
    4979             : /*10189*/             OPC_CheckType, MVT::v2i64,
    4980             : /*10191*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    4981             : /*10193*/             OPC_EmitInteger, MVT::i32, 14, 
    4982             : /*10196*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    4983             : /*10199*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALsv2i64), 0,
    4984             :                           MVT::v2i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    4985             :                       // Src: (add:v2i64 QPR:v2i64:$src1, (zext:v2i64 (intrinsic_wo_chain:v2i32 609:iPTR, DPR:v2i32:$Vn, DPR:v2i32:$Vm))) - Complexity = 14
    4986             :                       // Dst: (VABALsv2i64:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    4987             : /*10210*/           0, /*End of Scope*/
    4988             : /*10211*/         /*Scope*/ 93, /*->10305*/
    4989             : /*10212*/           OPC_CheckChild0Integer, 98|128,4/*610*/, 
    4990             : /*10215*/           OPC_RecordChild1, // #1 = $Vn
    4991             : /*10216*/           OPC_Scope, 28, /*->10246*/ // 3 children in Scope
    4992             : /*10218*/             OPC_CheckChild1Type, MVT::v8i8,
    4993             : /*10220*/             OPC_RecordChild2, // #2 = $Vm
    4994             : /*10221*/             OPC_CheckChild2Type, MVT::v8i8,
    4995             : /*10223*/             OPC_MoveParent,
    4996             : /*10224*/             OPC_MoveParent,
    4997             : /*10225*/             OPC_CheckType, MVT::v8i16,
    4998             : /*10227*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    4999             : /*10229*/             OPC_EmitInteger, MVT::i32, 14, 
    5000             : /*10232*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5001             : /*10235*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALuv8i16), 0,
    5002             :                           MVT::v8i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5003             :                       // Src: (add:v8i16 QPR:v8i16:$src1, (zext:v8i16 (intrinsic_wo_chain:v8i8 610:iPTR, DPR:v8i8:$Vn, DPR:v8i8:$Vm))) - Complexity = 14
    5004             :                       // Dst: (VABALuv8i16:v8i16 QPR:v8i16:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    5005             : /*10246*/           /*Scope*/ 28, /*->10275*/
    5006             : /*10247*/             OPC_CheckChild1Type, MVT::v4i16,
    5007             : /*10249*/             OPC_RecordChild2, // #2 = $Vm
    5008             : /*10250*/             OPC_CheckChild2Type, MVT::v4i16,
    5009             : /*10252*/             OPC_MoveParent,
    5010             : /*10253*/             OPC_MoveParent,
    5011             : /*10254*/             OPC_CheckType, MVT::v4i32,
    5012             : /*10256*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5013             : /*10258*/             OPC_EmitInteger, MVT::i32, 14, 
    5014             : /*10261*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5015             : /*10264*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALuv4i32), 0,
    5016             :                           MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5017             :                       // Src: (add:v4i32 QPR:v4i32:$src1, (zext:v4i32 (intrinsic_wo_chain:v4i16 610:iPTR, DPR:v4i16:$Vn, DPR:v4i16:$Vm))) - Complexity = 14
    5018             :                       // Dst: (VABALuv4i32:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    5019             : /*10275*/           /*Scope*/ 28, /*->10304*/
    5020             : /*10276*/             OPC_CheckChild1Type, MVT::v2i32,
    5021             : /*10278*/             OPC_RecordChild2, // #2 = $Vm
    5022             : /*10279*/             OPC_CheckChild2Type, MVT::v2i32,
    5023             : /*10281*/             OPC_MoveParent,
    5024             : /*10282*/             OPC_MoveParent,
    5025             : /*10283*/             OPC_CheckType, MVT::v2i64,
    5026             : /*10285*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5027             : /*10287*/             OPC_EmitInteger, MVT::i32, 14, 
    5028             : /*10290*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5029             : /*10293*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALuv2i64), 0,
    5030             :                           MVT::v2i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5031             :                       // Src: (add:v2i64 QPR:v2i64:$src1, (zext:v2i64 (intrinsic_wo_chain:v2i32 610:iPTR, DPR:v2i32:$Vn, DPR:v2i32:$Vm))) - Complexity = 14
    5032             :                       // Dst: (VABALuv2i64:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    5033             : /*10304*/           0, /*End of Scope*/
    5034             : /*10305*/         0, /*End of Scope*/
    5035             : /*10306*/       0, /*End of Scope*/
    5036             : /*10307*/     /*Scope*/ 76|128,1/*204*/, /*->10513*/
    5037             : /*10309*/       OPC_MoveChild0,
    5038             : /*10310*/       OPC_CheckOpcode, TARGET_VAL(ISD::ZERO_EXTEND),
    5039             : /*10313*/       OPC_MoveChild0,
    5040             : /*10314*/       OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_WO_CHAIN),
    5041             : /*10317*/       OPC_Scope, 96, /*->10415*/ // 2 children in Scope
    5042             : /*10319*/         OPC_CheckChild0Integer, 97|128,4/*609*/, 
    5043             : /*10322*/         OPC_RecordChild1, // #0 = $Vn
    5044             : /*10323*/         OPC_Scope, 29, /*->10354*/ // 3 children in Scope
    5045             : /*10325*/           OPC_CheckChild1Type, MVT::v8i8,
    5046             : /*10327*/           OPC_RecordChild2, // #1 = $Vm
    5047             : /*10328*/           OPC_CheckChild2Type, MVT::v8i8,
    5048             : /*10330*/           OPC_MoveParent,
    5049             : /*10331*/           OPC_MoveParent,
    5050             : /*10332*/           OPC_RecordChild1, // #2 = $src1
    5051             : /*10333*/           OPC_CheckType, MVT::v8i16,
    5052             : /*10335*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5053             : /*10337*/           OPC_EmitInteger, MVT::i32, 14, 
    5054             : /*10340*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5055             : /*10343*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALsv8i16), 0,
    5056             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    5057             :                     // Src: (add:v8i16 (zext:v8i16 (intrinsic_wo_chain:v8i8 609:iPTR, DPR:v8i8:$Vn, DPR:v8i8:$Vm)), QPR:v8i16:$src1) - Complexity = 14
    5058             :                     // Dst: (VABALsv8i16:v8i16 QPR:v8i16:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    5059             : /*10354*/         /*Scope*/ 29, /*->10384*/
    5060             : /*10355*/           OPC_CheckChild1Type, MVT::v4i16,
    5061             : /*10357*/           OPC_RecordChild2, // #1 = $Vm
    5062             : /*10358*/           OPC_CheckChild2Type, MVT::v4i16,
    5063             : /*10360*/           OPC_MoveParent,
    5064             : /*10361*/           OPC_MoveParent,
    5065             : /*10362*/           OPC_RecordChild1, // #2 = $src1
    5066             : /*10363*/           OPC_CheckType, MVT::v4i32,
    5067             : /*10365*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5068             : /*10367*/           OPC_EmitInteger, MVT::i32, 14, 
    5069             : /*10370*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5070             : /*10373*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALsv4i32), 0,
    5071             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    5072             :                     // Src: (add:v4i32 (zext:v4i32 (intrinsic_wo_chain:v4i16 609:iPTR, DPR:v4i16:$Vn, DPR:v4i16:$Vm)), QPR:v4i32:$src1) - Complexity = 14
    5073             :                     // Dst: (VABALsv4i32:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    5074             : /*10384*/         /*Scope*/ 29, /*->10414*/
    5075             : /*10385*/           OPC_CheckChild1Type, MVT::v2i32,
    5076             : /*10387*/           OPC_RecordChild2, // #1 = $Vm
    5077             : /*10388*/           OPC_CheckChild2Type, MVT::v2i32,
    5078             : /*10390*/           OPC_MoveParent,
    5079             : /*10391*/           OPC_MoveParent,
    5080             : /*10392*/           OPC_RecordChild1, // #2 = $src1
    5081             : /*10393*/           OPC_CheckType, MVT::v2i64,
    5082             : /*10395*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5083             : /*10397*/           OPC_EmitInteger, MVT::i32, 14, 
    5084             : /*10400*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5085             : /*10403*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALsv2i64), 0,
    5086             :                         MVT::v2i64, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    5087             :                     // Src: (add:v2i64 (zext:v2i64 (intrinsic_wo_chain:v2i32 609:iPTR, DPR:v2i32:$Vn, DPR:v2i32:$Vm)), QPR:v2i64:$src1) - Complexity = 14
    5088             :                     // Dst: (VABALsv2i64:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    5089             : /*10414*/         0, /*End of Scope*/
    5090             : /*10415*/       /*Scope*/ 96, /*->10512*/
    5091             : /*10416*/         OPC_CheckChild0Integer, 98|128,4/*610*/, 
    5092             : /*10419*/         OPC_RecordChild1, // #0 = $Vn
    5093             : /*10420*/         OPC_Scope, 29, /*->10451*/ // 3 children in Scope
    5094             : /*10422*/           OPC_CheckChild1Type, MVT::v8i8,
    5095             : /*10424*/           OPC_RecordChild2, // #1 = $Vm
    5096             : /*10425*/           OPC_CheckChild2Type, MVT::v8i8,
    5097             : /*10427*/           OPC_MoveParent,
    5098             : /*10428*/           OPC_MoveParent,
    5099             : /*10429*/           OPC_RecordChild1, // #2 = $src1
    5100             : /*10430*/           OPC_CheckType, MVT::v8i16,
    5101             : /*10432*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5102             : /*10434*/           OPC_EmitInteger, MVT::i32, 14, 
    5103             : /*10437*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5104             : /*10440*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALuv8i16), 0,
    5105             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    5106             :                     // Src: (add:v8i16 (zext:v8i16 (intrinsic_wo_chain:v8i8 610:iPTR, DPR:v8i8:$Vn, DPR:v8i8:$Vm)), QPR:v8i16:$src1) - Complexity = 14
    5107             :                     // Dst: (VABALuv8i16:v8i16 QPR:v8i16:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    5108             : /*10451*/         /*Scope*/ 29, /*->10481*/
    5109             : /*10452*/           OPC_CheckChild1Type, MVT::v4i16,
    5110             : /*10454*/           OPC_RecordChild2, // #1 = $Vm
    5111             : /*10455*/           OPC_CheckChild2Type, MVT::v4i16,
    5112             : /*10457*/           OPC_MoveParent,
    5113             : /*10458*/           OPC_MoveParent,
    5114             : /*10459*/           OPC_RecordChild1, // #2 = $src1
    5115             : /*10460*/           OPC_CheckType, MVT::v4i32,
    5116             : /*10462*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5117             : /*10464*/           OPC_EmitInteger, MVT::i32, 14, 
    5118             : /*10467*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5119             : /*10470*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALuv4i32), 0,
    5120             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    5121             :                     // Src: (add:v4i32 (zext:v4i32 (intrinsic_wo_chain:v4i16 610:iPTR, DPR:v4i16:$Vn, DPR:v4i16:$Vm)), QPR:v4i32:$src1) - Complexity = 14
    5122             :                     // Dst: (VABALuv4i32:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    5123             : /*10481*/         /*Scope*/ 29, /*->10511*/
    5124             : /*10482*/           OPC_CheckChild1Type, MVT::v2i32,
    5125             : /*10484*/           OPC_RecordChild2, // #1 = $Vm
    5126             : /*10485*/           OPC_CheckChild2Type, MVT::v2i32,
    5127             : /*10487*/           OPC_MoveParent,
    5128             : /*10488*/           OPC_MoveParent,
    5129             : /*10489*/           OPC_RecordChild1, // #2 = $src1
    5130             : /*10490*/           OPC_CheckType, MVT::v2i64,
    5131             : /*10492*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5132             : /*10494*/           OPC_EmitInteger, MVT::i32, 14, 
    5133             : /*10497*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5134             : /*10500*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABALuv2i64), 0,
    5135             :                         MVT::v2i64, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    5136             :                     // Src: (add:v2i64 (zext:v2i64 (intrinsic_wo_chain:v2i32 610:iPTR, DPR:v2i32:$Vn, DPR:v2i32:$Vm)), QPR:v2i64:$src1) - Complexity = 14
    5137             :                     // Dst: (VABALuv2i64:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    5138             : /*10511*/         0, /*End of Scope*/
    5139             : /*10512*/       0, /*End of Scope*/
    5140             : /*10513*/     /*Scope*/ 107|128,2/*363*/, /*->10878*/
    5141             : /*10515*/       OPC_RecordChild0, // #0 = $src1
    5142             : /*10516*/       OPC_MoveChild1,
    5143             : /*10517*/       OPC_SwitchOpcode /*3 cases */, 47|128,1/*175*/, TARGET_VAL(ISD::MUL),// ->10697
    5144             : /*10522*/         OPC_Scope, 2|128,1/*130*/, /*->10655*/ // 2 children in Scope
    5145             : /*10525*/           OPC_RecordChild0, // #1 = $Vn
    5146             : /*10526*/           OPC_MoveChild1,
    5147             : /*10527*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5148             : /*10530*/           OPC_RecordChild0, // #2 = $Vm
    5149             : /*10531*/           OPC_Scope, 60, /*->10593*/ // 2 children in Scope
    5150             : /*10533*/             OPC_CheckChild0Type, MVT::v4i16,
    5151             : /*10535*/             OPC_RecordChild1, // #3 = $lane
    5152             : /*10536*/             OPC_MoveChild1,
    5153             : /*10537*/             OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5154             : /*10540*/             OPC_MoveParent,
    5155             : /*10541*/             OPC_MoveParent,
    5156             : /*10542*/             OPC_MoveParent,
    5157             : /*10543*/             OPC_SwitchType /*2 cases */, 22, MVT::v4i16,// ->10568
    5158             : /*10546*/               OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5159             : /*10548*/               OPC_EmitConvertToTarget, 3,
    5160             : /*10550*/               OPC_EmitInteger, MVT::i32, 14, 
    5161             : /*10553*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5162             : /*10556*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i16), 0,
    5163             :                             MVT::v4i16, 6/*#Ops*/, 0, 1, 2, 4, 5, 6, 
    5164             :                         // Src: (add:v4i16 DPR:v4i16:$src1, (mul:v4i16 DPR:v4i16:$Vn, (NEONvduplane:v4i16 DPR_8:v4i16:$Vm, (imm:i32):$lane))) - Complexity = 12
    5165             :                         // Dst: (VMLAslv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5166             : /*10568*/             /*SwitchType*/ 22, MVT::v8i16,// ->10592
    5167             : /*10570*/               OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5168             : /*10572*/               OPC_EmitConvertToTarget, 3,
    5169             : /*10574*/               OPC_EmitInteger, MVT::i32, 14, 
    5170             : /*10577*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5171             : /*10580*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv8i16), 0,
    5172             :                             MVT::v8i16, 6/*#Ops*/, 0, 1, 2, 4, 5, 6, 
    5173             :                         // Src: (add:v8i16 QPR:v8i16:$src1, (mul:v8i16 QPR:v8i16:$Vn, (NEONvduplane:v8i16 DPR_8:v4i16:$Vm, (imm:i32):$lane))) - Complexity = 12
    5174             :                         // Dst: (VMLAslv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5175             : /*10592*/             0, // EndSwitchType
    5176             : /*10593*/           /*Scope*/ 60, /*->10654*/
    5177             : /*10594*/             OPC_CheckChild0Type, MVT::v2i32,
    5178             : /*10596*/             OPC_RecordChild1, // #3 = $lane
    5179             : /*10597*/             OPC_MoveChild1,
    5180             : /*10598*/             OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5181             : /*10601*/             OPC_MoveParent,
    5182             : /*10602*/             OPC_MoveParent,
    5183             : /*10603*/             OPC_MoveParent,
    5184             : /*10604*/             OPC_SwitchType /*2 cases */, 22, MVT::v2i32,// ->10629
    5185             : /*10607*/               OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5186             : /*10609*/               OPC_EmitConvertToTarget, 3,
    5187             : /*10611*/               OPC_EmitInteger, MVT::i32, 14, 
    5188             : /*10614*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5189             : /*10617*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv2i32), 0,
    5190             :                             MVT::v2i32, 6/*#Ops*/, 0, 1, 2, 4, 5, 6, 
    5191             :                         // Src: (add:v2i32 DPR:v2i32:$src1, (mul:v2i32 DPR:v2i32:$Vn, (NEONvduplane:v2i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane))) - Complexity = 12
    5192             :                         // Dst: (VMLAslv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5193             : /*10629*/             /*SwitchType*/ 22, MVT::v4i32,// ->10653
    5194             : /*10631*/               OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5195             : /*10633*/               OPC_EmitConvertToTarget, 3,
    5196             : /*10635*/               OPC_EmitInteger, MVT::i32, 14, 
    5197             : /*10638*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5198             : /*10641*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i32), 0,
    5199             :                             MVT::v4i32, 6/*#Ops*/, 0, 1, 2, 4, 5, 6, 
    5200             :                         // Src: (add:v4i32 QPR:v4i32:$src1, (mul:v4i32 QPR:v4i32:$Vn, (NEONvduplane:v4i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane))) - Complexity = 12
    5201             :                         // Dst: (VMLAslv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5202             : /*10653*/             0, // EndSwitchType
    5203             : /*10654*/           0, /*End of Scope*/
    5204             : /*10655*/         /*Scope*/ 40, /*->10696*/
    5205             : /*10656*/           OPC_MoveChild0,
    5206             : /*10657*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5207             : /*10660*/           OPC_RecordChild0, // #1 = $Vm
    5208             : /*10661*/           OPC_CheckChild0Type, MVT::v4i16,
    5209             : /*10663*/           OPC_RecordChild1, // #2 = $lane
    5210             : /*10664*/           OPC_MoveChild1,
    5211             : /*10665*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5212             : /*10668*/           OPC_MoveParent,
    5213             : /*10669*/           OPC_MoveParent,
    5214             : /*10670*/           OPC_RecordChild1, // #3 = $Vn
    5215             : /*10671*/           OPC_MoveParent,
    5216             : /*10672*/           OPC_CheckType, MVT::v4i16,
    5217             : /*10674*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5218             : /*10676*/           OPC_EmitConvertToTarget, 2,
    5219             : /*10678*/           OPC_EmitInteger, MVT::i32, 14, 
    5220             : /*10681*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5221             : /*10684*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i16), 0,
    5222             :                         MVT::v4i16, 6/*#Ops*/, 0, 3, 1, 4, 5, 6, 
    5223             :                     // Src: (add:v4i16 DPR:v4i16:$src1, (mul:v4i16 (NEONvduplane:v4i16 DPR_8:v4i16:$Vm, (imm:i32):$lane), DPR:v4i16:$Vn)) - Complexity = 12
    5224             :                     // Dst: (VMLAslv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5225             : /*10696*/         0, /*End of Scope*/
    5226             : /*10697*/       /*SwitchOpcode*/ 87, TARGET_VAL(ARMISD::VMULLs),// ->10787
    5227             : /*10700*/         OPC_RecordChild0, // #1 = $Vn
    5228             : /*10701*/         OPC_Scope, 41, /*->10744*/ // 2 children in Scope
    5229             : /*10703*/           OPC_CheckChild0Type, MVT::v4i16,
    5230             : /*10705*/           OPC_MoveChild1,
    5231             : /*10706*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5232             : /*10709*/           OPC_RecordChild0, // #2 = $Vm
    5233             : /*10710*/           OPC_CheckChild0Type, MVT::v4i16,
    5234             : /*10712*/           OPC_RecordChild1, // #3 = $lane
    5235             : /*10713*/           OPC_MoveChild1,
    5236             : /*10714*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5237             : /*10717*/           OPC_MoveParent,
    5238             : /*10718*/           OPC_MoveParent,
    5239             : /*10719*/           OPC_MoveParent,
    5240             : /*10720*/           OPC_CheckType, MVT::v4i32,
    5241             : /*10722*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5242             : /*10724*/           OPC_EmitConvertToTarget, 3,
    5243             : /*10726*/           OPC_EmitInteger, MVT::i32, 14, 
    5244             : /*10729*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5245             : /*10732*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALslsv4i16), 0,
    5246             :                         MVT::v4i32, 6/*#Ops*/, 0, 1, 2, 4, 5, 6, 
    5247             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (NEONvmulls:v4i32 DPR:v4i16:$Vn, (NEONvduplane:v4i16 DPR_8:v4i16:$Vm, (imm:i32):$lane))) - Complexity = 12
    5248             :                     // Dst: (VMLALslsv4i16:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5249             : /*10744*/         /*Scope*/ 41, /*->10786*/
    5250             : /*10745*/           OPC_CheckChild0Type, MVT::v2i32,
    5251             : /*10747*/           OPC_MoveChild1,
    5252             : /*10748*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5253             : /*10751*/           OPC_RecordChild0, // #2 = $Vm
    5254             : /*10752*/           OPC_CheckChild0Type, MVT::v2i32,
    5255             : /*10754*/           OPC_RecordChild1, // #3 = $lane
    5256             : /*10755*/           OPC_MoveChild1,
    5257             : /*10756*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5258             : /*10759*/           OPC_MoveParent,
    5259             : /*10760*/           OPC_MoveParent,
    5260             : /*10761*/           OPC_MoveParent,
    5261             : /*10762*/           OPC_CheckType, MVT::v2i64,
    5262             : /*10764*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5263             : /*10766*/           OPC_EmitConvertToTarget, 3,
    5264             : /*10768*/           OPC_EmitInteger, MVT::i32, 14, 
    5265             : /*10771*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5266             : /*10774*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALslsv2i32), 0,
    5267             :                         MVT::v2i64, 6/*#Ops*/, 0, 1, 2, 4, 5, 6, 
    5268             :                     // Src: (add:v2i64 QPR:v2i64:$src1, (NEONvmulls:v2i64 DPR:v2i32:$Vn, (NEONvduplane:v2i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane))) - Complexity = 12
    5269             :                     // Dst: (VMLALslsv2i32:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5270             : /*10786*/         0, /*End of Scope*/
    5271             : /*10787*/       /*SwitchOpcode*/ 87, TARGET_VAL(ARMISD::VMULLu),// ->10877
    5272             : /*10790*/         OPC_RecordChild0, // #1 = $Vn
    5273             : /*10791*/         OPC_Scope, 41, /*->10834*/ // 2 children in Scope
    5274             : /*10793*/           OPC_CheckChild0Type, MVT::v4i16,
    5275             : /*10795*/           OPC_MoveChild1,
    5276             : /*10796*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5277             : /*10799*/           OPC_RecordChild0, // #2 = $Vm
    5278             : /*10800*/           OPC_CheckChild0Type, MVT::v4i16,
    5279             : /*10802*/           OPC_RecordChild1, // #3 = $lane
    5280             : /*10803*/           OPC_MoveChild1,
    5281             : /*10804*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5282             : /*10807*/           OPC_MoveParent,
    5283             : /*10808*/           OPC_MoveParent,
    5284             : /*10809*/           OPC_MoveParent,
    5285             : /*10810*/           OPC_CheckType, MVT::v4i32,
    5286             : /*10812*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5287             : /*10814*/           OPC_EmitConvertToTarget, 3,
    5288             : /*10816*/           OPC_EmitInteger, MVT::i32, 14, 
    5289             : /*10819*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5290             : /*10822*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsluv4i16), 0,
    5291             :                         MVT::v4i32, 6/*#Ops*/, 0, 1, 2, 4, 5, 6, 
    5292             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (NEONvmullu:v4i32 DPR:v4i16:$Vn, (NEONvduplane:v4i16 DPR_8:v4i16:$Vm, (imm:i32):$lane))) - Complexity = 12
    5293             :                     // Dst: (VMLALsluv4i16:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5294             : /*10834*/         /*Scope*/ 41, /*->10876*/
    5295             : /*10835*/           OPC_CheckChild0Type, MVT::v2i32,
    5296             : /*10837*/           OPC_MoveChild1,
    5297             : /*10838*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5298             : /*10841*/           OPC_RecordChild0, // #2 = $Vm
    5299             : /*10842*/           OPC_CheckChild0Type, MVT::v2i32,
    5300             : /*10844*/           OPC_RecordChild1, // #3 = $lane
    5301             : /*10845*/           OPC_MoveChild1,
    5302             : /*10846*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5303             : /*10849*/           OPC_MoveParent,
    5304             : /*10850*/           OPC_MoveParent,
    5305             : /*10851*/           OPC_MoveParent,
    5306             : /*10852*/           OPC_CheckType, MVT::v2i64,
    5307             : /*10854*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5308             : /*10856*/           OPC_EmitConvertToTarget, 3,
    5309             : /*10858*/           OPC_EmitInteger, MVT::i32, 14, 
    5310             : /*10861*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5311             : /*10864*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsluv2i32), 0,
    5312             :                         MVT::v2i64, 6/*#Ops*/, 0, 1, 2, 4, 5, 6, 
    5313             :                     // Src: (add:v2i64 QPR:v2i64:$src1, (NEONvmullu:v2i64 DPR:v2i32:$Vn, (NEONvduplane:v2i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane))) - Complexity = 12
    5314             :                     // Dst: (VMLALsluv2i32:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5315             : /*10876*/         0, /*End of Scope*/
    5316             : /*10877*/       0, // EndSwitchOpcode
    5317             : /*10878*/     /*Scope*/ 90, /*->10969*/
    5318             : /*10879*/       OPC_MoveChild0,
    5319             : /*10880*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5320             : /*10883*/       OPC_Scope, 41, /*->10926*/ // 2 children in Scope
    5321             : /*10885*/         OPC_RecordChild0, // #0 = $Vn
    5322             : /*10886*/         OPC_MoveChild1,
    5323             : /*10887*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5324             : /*10890*/         OPC_RecordChild0, // #1 = $Vm
    5325             : /*10891*/         OPC_CheckChild0Type, MVT::v4i16,
    5326             : /*10893*/         OPC_RecordChild1, // #2 = $lane
    5327             : /*10894*/         OPC_MoveChild1,
    5328             : /*10895*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5329             : /*10898*/         OPC_MoveParent,
    5330             : /*10899*/         OPC_MoveParent,
    5331             : /*10900*/         OPC_MoveParent,
    5332             : /*10901*/         OPC_RecordChild1, // #3 = $src1
    5333             : /*10902*/         OPC_CheckType, MVT::v4i16,
    5334             : /*10904*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5335             : /*10906*/         OPC_EmitConvertToTarget, 2,
    5336             : /*10908*/         OPC_EmitInteger, MVT::i32, 14, 
    5337             : /*10911*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5338             : /*10914*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i16), 0,
    5339             :                       MVT::v4i16, 6/*#Ops*/, 3, 0, 1, 4, 5, 6, 
    5340             :                   // Src: (add:v4i16 (mul:v4i16 DPR:v4i16:$Vn, (NEONvduplane:v4i16 DPR_8:v4i16:$Vm, (imm:i32):$lane)), DPR:v4i16:$src1) - Complexity = 12
    5341             :                   // Dst: (VMLAslv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5342             : /*10926*/       /*Scope*/ 41, /*->10968*/
    5343             : /*10927*/         OPC_MoveChild0,
    5344             : /*10928*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5345             : /*10931*/         OPC_RecordChild0, // #0 = $Vm
    5346             : /*10932*/         OPC_CheckChild0Type, MVT::v4i16,
    5347             : /*10934*/         OPC_RecordChild1, // #1 = $lane
    5348             : /*10935*/         OPC_MoveChild1,
    5349             : /*10936*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5350             : /*10939*/         OPC_MoveParent,
    5351             : /*10940*/         OPC_MoveParent,
    5352             : /*10941*/         OPC_RecordChild1, // #2 = $Vn
    5353             : /*10942*/         OPC_MoveParent,
    5354             : /*10943*/         OPC_RecordChild1, // #3 = $src1
    5355             : /*10944*/         OPC_CheckType, MVT::v4i16,
    5356             : /*10946*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5357             : /*10948*/         OPC_EmitConvertToTarget, 1,
    5358             : /*10950*/         OPC_EmitInteger, MVT::i32, 14, 
    5359             : /*10953*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5360             : /*10956*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i16), 0,
    5361             :                       MVT::v4i16, 6/*#Ops*/, 3, 2, 0, 4, 5, 6, 
    5362             :                   // Src: (add:v4i16 (mul:v4i16 (NEONvduplane:v4i16 DPR_8:v4i16:$Vm, (imm:i32):$lane), DPR:v4i16:$Vn), DPR:v4i16:$src1) - Complexity = 12
    5363             :                   // Dst: (VMLAslv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5364             : /*10968*/       0, /*End of Scope*/
    5365             : /*10969*/     /*Scope*/ 45, /*->11015*/
    5366             : /*10970*/       OPC_RecordChild0, // #0 = $src1
    5367             : /*10971*/       OPC_MoveChild1,
    5368             : /*10972*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5369             : /*10975*/       OPC_MoveChild0,
    5370             : /*10976*/       OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5371             : /*10979*/       OPC_RecordChild0, // #1 = $Vm
    5372             : /*10980*/       OPC_CheckChild0Type, MVT::v2i32,
    5373             : /*10982*/       OPC_RecordChild1, // #2 = $lane
    5374             : /*10983*/       OPC_MoveChild1,
    5375             : /*10984*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5376             : /*10987*/       OPC_MoveParent,
    5377             : /*10988*/       OPC_MoveParent,
    5378             : /*10989*/       OPC_RecordChild1, // #3 = $Vn
    5379             : /*10990*/       OPC_MoveParent,
    5380             : /*10991*/       OPC_CheckType, MVT::v2i32,
    5381             : /*10993*/       OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5382             : /*10995*/       OPC_EmitConvertToTarget, 2,
    5383             : /*10997*/       OPC_EmitInteger, MVT::i32, 14, 
    5384             : /*11000*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5385             : /*11003*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv2i32), 0,
    5386             :                     MVT::v2i32, 6/*#Ops*/, 0, 3, 1, 4, 5, 6, 
    5387             :                 // Src: (add:v2i32 DPR:v2i32:$src1, (mul:v2i32 (NEONvduplane:v2i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane), DPR:v2i32:$Vn)) - Complexity = 12
    5388             :                 // Dst: (VMLAslv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5389             : /*11015*/     /*Scope*/ 90, /*->11106*/
    5390             : /*11016*/       OPC_MoveChild0,
    5391             : /*11017*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5392             : /*11020*/       OPC_Scope, 41, /*->11063*/ // 2 children in Scope
    5393             : /*11022*/         OPC_RecordChild0, // #0 = $Vn
    5394             : /*11023*/         OPC_MoveChild1,
    5395             : /*11024*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5396             : /*11027*/         OPC_RecordChild0, // #1 = $Vm
    5397             : /*11028*/         OPC_CheckChild0Type, MVT::v2i32,
    5398             : /*11030*/         OPC_RecordChild1, // #2 = $lane
    5399             : /*11031*/         OPC_MoveChild1,
    5400             : /*11032*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5401             : /*11035*/         OPC_MoveParent,
    5402             : /*11036*/         OPC_MoveParent,
    5403             : /*11037*/         OPC_MoveParent,
    5404             : /*11038*/         OPC_RecordChild1, // #3 = $src1
    5405             : /*11039*/         OPC_CheckType, MVT::v2i32,
    5406             : /*11041*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5407             : /*11043*/         OPC_EmitConvertToTarget, 2,
    5408             : /*11045*/         OPC_EmitInteger, MVT::i32, 14, 
    5409             : /*11048*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5410             : /*11051*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv2i32), 0,
    5411             :                       MVT::v2i32, 6/*#Ops*/, 3, 0, 1, 4, 5, 6, 
    5412             :                   // Src: (add:v2i32 (mul:v2i32 DPR:v2i32:$Vn, (NEONvduplane:v2i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)), DPR:v2i32:$src1) - Complexity = 12
    5413             :                   // Dst: (VMLAslv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5414             : /*11063*/       /*Scope*/ 41, /*->11105*/
    5415             : /*11064*/         OPC_MoveChild0,
    5416             : /*11065*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5417             : /*11068*/         OPC_RecordChild0, // #0 = $Vm
    5418             : /*11069*/         OPC_CheckChild0Type, MVT::v2i32,
    5419             : /*11071*/         OPC_RecordChild1, // #1 = $lane
    5420             : /*11072*/         OPC_MoveChild1,
    5421             : /*11073*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5422             : /*11076*/         OPC_MoveParent,
    5423             : /*11077*/         OPC_MoveParent,
    5424             : /*11078*/         OPC_RecordChild1, // #2 = $Vn
    5425             : /*11079*/         OPC_MoveParent,
    5426             : /*11080*/         OPC_RecordChild1, // #3 = $src1
    5427             : /*11081*/         OPC_CheckType, MVT::v2i32,
    5428             : /*11083*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5429             : /*11085*/         OPC_EmitConvertToTarget, 1,
    5430             : /*11087*/         OPC_EmitInteger, MVT::i32, 14, 
    5431             : /*11090*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5432             : /*11093*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv2i32), 0,
    5433             :                       MVT::v2i32, 6/*#Ops*/, 3, 2, 0, 4, 5, 6, 
    5434             :                   // Src: (add:v2i32 (mul:v2i32 (NEONvduplane:v2i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane), DPR:v2i32:$Vn), DPR:v2i32:$src1) - Complexity = 12
    5435             :                   // Dst: (VMLAslv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5436             : /*11105*/       0, /*End of Scope*/
    5437             : /*11106*/     /*Scope*/ 45, /*->11152*/
    5438             : /*11107*/       OPC_RecordChild0, // #0 = $src1
    5439             : /*11108*/       OPC_MoveChild1,
    5440             : /*11109*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5441             : /*11112*/       OPC_MoveChild0,
    5442             : /*11113*/       OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5443             : /*11116*/       OPC_RecordChild0, // #1 = $Vm
    5444             : /*11117*/       OPC_CheckChild0Type, MVT::v4i16,
    5445             : /*11119*/       OPC_RecordChild1, // #2 = $lane
    5446             : /*11120*/       OPC_MoveChild1,
    5447             : /*11121*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5448             : /*11124*/       OPC_MoveParent,
    5449             : /*11125*/       OPC_MoveParent,
    5450             : /*11126*/       OPC_RecordChild1, // #3 = $Vn
    5451             : /*11127*/       OPC_MoveParent,
    5452             : /*11128*/       OPC_CheckType, MVT::v8i16,
    5453             : /*11130*/       OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5454             : /*11132*/       OPC_EmitConvertToTarget, 2,
    5455             : /*11134*/       OPC_EmitInteger, MVT::i32, 14, 
    5456             : /*11137*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5457             : /*11140*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv8i16), 0,
    5458             :                     MVT::v8i16, 6/*#Ops*/, 0, 3, 1, 4, 5, 6, 
    5459             :                 // Src: (add:v8i16 QPR:v8i16:$src1, (mul:v8i16 (NEONvduplane:v8i16 DPR_8:v4i16:$Vm, (imm:i32):$lane), QPR:v8i16:$Vn)) - Complexity = 12
    5460             :                 // Dst: (VMLAslv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5461             : /*11152*/     /*Scope*/ 90, /*->11243*/
    5462             : /*11153*/       OPC_MoveChild0,
    5463             : /*11154*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5464             : /*11157*/       OPC_Scope, 41, /*->11200*/ // 2 children in Scope
    5465             : /*11159*/         OPC_RecordChild0, // #0 = $Vn
    5466             : /*11160*/         OPC_MoveChild1,
    5467             : /*11161*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5468             : /*11164*/         OPC_RecordChild0, // #1 = $Vm
    5469             : /*11165*/         OPC_CheckChild0Type, MVT::v4i16,
    5470             : /*11167*/         OPC_RecordChild1, // #2 = $lane
    5471             : /*11168*/         OPC_MoveChild1,
    5472             : /*11169*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5473             : /*11172*/         OPC_MoveParent,
    5474             : /*11173*/         OPC_MoveParent,
    5475             : /*11174*/         OPC_MoveParent,
    5476             : /*11175*/         OPC_RecordChild1, // #3 = $src1
    5477             : /*11176*/         OPC_CheckType, MVT::v8i16,
    5478             : /*11178*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5479             : /*11180*/         OPC_EmitConvertToTarget, 2,
    5480             : /*11182*/         OPC_EmitInteger, MVT::i32, 14, 
    5481             : /*11185*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5482             : /*11188*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv8i16), 0,
    5483             :                       MVT::v8i16, 6/*#Ops*/, 3, 0, 1, 4, 5, 6, 
    5484             :                   // Src: (add:v8i16 (mul:v8i16 QPR:v8i16:$Vn, (NEONvduplane:v8i16 DPR_8:v4i16:$Vm, (imm:i32):$lane)), QPR:v8i16:$src1) - Complexity = 12
    5485             :                   // Dst: (VMLAslv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5486             : /*11200*/       /*Scope*/ 41, /*->11242*/
    5487             : /*11201*/         OPC_MoveChild0,
    5488             : /*11202*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5489             : /*11205*/         OPC_RecordChild0, // #0 = $Vm
    5490             : /*11206*/         OPC_CheckChild0Type, MVT::v4i16,
    5491             : /*11208*/         OPC_RecordChild1, // #1 = $lane
    5492             : /*11209*/         OPC_MoveChild1,
    5493             : /*11210*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5494             : /*11213*/         OPC_MoveParent,
    5495             : /*11214*/         OPC_MoveParent,
    5496             : /*11215*/         OPC_RecordChild1, // #2 = $Vn
    5497             : /*11216*/         OPC_MoveParent,
    5498             : /*11217*/         OPC_RecordChild1, // #3 = $src1
    5499             : /*11218*/         OPC_CheckType, MVT::v8i16,
    5500             : /*11220*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5501             : /*11222*/         OPC_EmitConvertToTarget, 1,
    5502             : /*11224*/         OPC_EmitInteger, MVT::i32, 14, 
    5503             : /*11227*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5504             : /*11230*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv8i16), 0,
    5505             :                       MVT::v8i16, 6/*#Ops*/, 3, 2, 0, 4, 5, 6, 
    5506             :                   // Src: (add:v8i16 (mul:v8i16 (NEONvduplane:v8i16 DPR_8:v4i16:$Vm, (imm:i32):$lane), QPR:v8i16:$Vn), QPR:v8i16:$src1) - Complexity = 12
    5507             :                   // Dst: (VMLAslv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5508             : /*11242*/       0, /*End of Scope*/
    5509             : /*11243*/     /*Scope*/ 45, /*->11289*/
    5510             : /*11244*/       OPC_RecordChild0, // #0 = $src1
    5511             : /*11245*/       OPC_MoveChild1,
    5512             : /*11246*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5513             : /*11249*/       OPC_MoveChild0,
    5514             : /*11250*/       OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5515             : /*11253*/       OPC_RecordChild0, // #1 = $Vm
    5516             : /*11254*/       OPC_CheckChild0Type, MVT::v2i32,
    5517             : /*11256*/       OPC_RecordChild1, // #2 = $lane
    5518             : /*11257*/       OPC_MoveChild1,
    5519             : /*11258*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5520             : /*11261*/       OPC_MoveParent,
    5521             : /*11262*/       OPC_MoveParent,
    5522             : /*11263*/       OPC_RecordChild1, // #3 = $Vn
    5523             : /*11264*/       OPC_MoveParent,
    5524             : /*11265*/       OPC_CheckType, MVT::v4i32,
    5525             : /*11267*/       OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5526             : /*11269*/       OPC_EmitConvertToTarget, 2,
    5527             : /*11271*/       OPC_EmitInteger, MVT::i32, 14, 
    5528             : /*11274*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5529             : /*11277*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i32), 0,
    5530             :                     MVT::v4i32, 6/*#Ops*/, 0, 3, 1, 4, 5, 6, 
    5531             :                 // Src: (add:v4i32 QPR:v4i32:$src1, (mul:v4i32 (NEONvduplane:v4i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane), QPR:v4i32:$Vn)) - Complexity = 12
    5532             :                 // Dst: (VMLAslv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5533             : /*11289*/     /*Scope*/ 20|128,2/*276*/, /*->11567*/
    5534             : /*11291*/       OPC_MoveChild0,
    5535             : /*11292*/       OPC_SwitchOpcode /*3 cases */, 86, TARGET_VAL(ISD::MUL),// ->11382
    5536             : /*11296*/         OPC_Scope, 41, /*->11339*/ // 2 children in Scope
    5537             : /*11298*/           OPC_RecordChild0, // #0 = $Vn
    5538             : /*11299*/           OPC_MoveChild1,
    5539             : /*11300*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5540             : /*11303*/           OPC_RecordChild0, // #1 = $Vm
    5541             : /*11304*/           OPC_CheckChild0Type, MVT::v2i32,
    5542             : /*11306*/           OPC_RecordChild1, // #2 = $lane
    5543             : /*11307*/           OPC_MoveChild1,
    5544             : /*11308*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5545             : /*11311*/           OPC_MoveParent,
    5546             : /*11312*/           OPC_MoveParent,
    5547             : /*11313*/           OPC_MoveParent,
    5548             : /*11314*/           OPC_RecordChild1, // #3 = $src1
    5549             : /*11315*/           OPC_CheckType, MVT::v4i32,
    5550             : /*11317*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5551             : /*11319*/           OPC_EmitConvertToTarget, 2,
    5552             : /*11321*/           OPC_EmitInteger, MVT::i32, 14, 
    5553             : /*11324*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5554             : /*11327*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i32), 0,
    5555             :                         MVT::v4i32, 6/*#Ops*/, 3, 0, 1, 4, 5, 6, 
    5556             :                     // Src: (add:v4i32 (mul:v4i32 QPR:v4i32:$Vn, (NEONvduplane:v4i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)), QPR:v4i32:$src1) - Complexity = 12
    5557             :                     // Dst: (VMLAslv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5558             : /*11339*/         /*Scope*/ 41, /*->11381*/
    5559             : /*11340*/           OPC_MoveChild0,
    5560             : /*11341*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5561             : /*11344*/           OPC_RecordChild0, // #0 = $Vm
    5562             : /*11345*/           OPC_CheckChild0Type, MVT::v2i32,
    5563             : /*11347*/           OPC_RecordChild1, // #1 = $lane
    5564             : /*11348*/           OPC_MoveChild1,
    5565             : /*11349*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5566             : /*11352*/           OPC_MoveParent,
    5567             : /*11353*/           OPC_MoveParent,
    5568             : /*11354*/           OPC_RecordChild1, // #2 = $Vn
    5569             : /*11355*/           OPC_MoveParent,
    5570             : /*11356*/           OPC_RecordChild1, // #3 = $src1
    5571             : /*11357*/           OPC_CheckType, MVT::v4i32,
    5572             : /*11359*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5573             : /*11361*/           OPC_EmitConvertToTarget, 1,
    5574             : /*11363*/           OPC_EmitInteger, MVT::i32, 14, 
    5575             : /*11366*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5576             : /*11369*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i32), 0,
    5577             :                         MVT::v4i32, 6/*#Ops*/, 3, 2, 0, 4, 5, 6, 
    5578             :                     // Src: (add:v4i32 (mul:v4i32 (NEONvduplane:v4i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane), QPR:v4i32:$Vn), QPR:v4i32:$src1) - Complexity = 12
    5579             :                     // Dst: (VMLAslv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5580             : /*11381*/         0, /*End of Scope*/
    5581             : /*11382*/       /*SwitchOpcode*/ 89, TARGET_VAL(ARMISD::VMULLs),// ->11474
    5582             : /*11385*/         OPC_RecordChild0, // #0 = $Vn
    5583             : /*11386*/         OPC_Scope, 42, /*->11430*/ // 2 children in Scope
    5584             : /*11388*/           OPC_CheckChild0Type, MVT::v4i16,
    5585             : /*11390*/           OPC_MoveChild1,
    5586             : /*11391*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5587             : /*11394*/           OPC_RecordChild0, // #1 = $Vm
    5588             : /*11395*/           OPC_CheckChild0Type, MVT::v4i16,
    5589             : /*11397*/           OPC_RecordChild1, // #2 = $lane
    5590             : /*11398*/           OPC_MoveChild1,
    5591             : /*11399*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5592             : /*11402*/           OPC_MoveParent,
    5593             : /*11403*/           OPC_MoveParent,
    5594             : /*11404*/           OPC_MoveParent,
    5595             : /*11405*/           OPC_RecordChild1, // #3 = $src1
    5596             : /*11406*/           OPC_CheckType, MVT::v4i32,
    5597             : /*11408*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5598             : /*11410*/           OPC_EmitConvertToTarget, 2,
    5599             : /*11412*/           OPC_EmitInteger, MVT::i32, 14, 
    5600             : /*11415*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5601             : /*11418*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALslsv4i16), 0,
    5602             :                         MVT::v4i32, 6/*#Ops*/, 3, 0, 1, 4, 5, 6, 
    5603             :                     // Src: (add:v4i32 (NEONvmulls:v4i32 DPR:v4i16:$Vn, (NEONvduplane:v4i16 DPR_8:v4i16:$Vm, (imm:i32):$lane)), QPR:v4i32:$src1) - Complexity = 12
    5604             :                     // Dst: (VMLALslsv4i16:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5605             : /*11430*/         /*Scope*/ 42, /*->11473*/
    5606             : /*11431*/           OPC_CheckChild0Type, MVT::v2i32,
    5607             : /*11433*/           OPC_MoveChild1,
    5608             : /*11434*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5609             : /*11437*/           OPC_RecordChild0, // #1 = $Vm
    5610             : /*11438*/           OPC_CheckChild0Type, MVT::v2i32,
    5611             : /*11440*/           OPC_RecordChild1, // #2 = $lane
    5612             : /*11441*/           OPC_MoveChild1,
    5613             : /*11442*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5614             : /*11445*/           OPC_MoveParent,
    5615             : /*11446*/           OPC_MoveParent,
    5616             : /*11447*/           OPC_MoveParent,
    5617             : /*11448*/           OPC_RecordChild1, // #3 = $src1
    5618             : /*11449*/           OPC_CheckType, MVT::v2i64,
    5619             : /*11451*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5620             : /*11453*/           OPC_EmitConvertToTarget, 2,
    5621             : /*11455*/           OPC_EmitInteger, MVT::i32, 14, 
    5622             : /*11458*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5623             : /*11461*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALslsv2i32), 0,
    5624             :                         MVT::v2i64, 6/*#Ops*/, 3, 0, 1, 4, 5, 6, 
    5625             :                     // Src: (add:v2i64 (NEONvmulls:v2i64 DPR:v2i32:$Vn, (NEONvduplane:v2i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)), QPR:v2i64:$src1) - Complexity = 12
    5626             :                     // Dst: (VMLALslsv2i32:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5627             : /*11473*/         0, /*End of Scope*/
    5628             : /*11474*/       /*SwitchOpcode*/ 89, TARGET_VAL(ARMISD::VMULLu),// ->11566
    5629             : /*11477*/         OPC_RecordChild0, // #0 = $Vn
    5630             : /*11478*/         OPC_Scope, 42, /*->11522*/ // 2 children in Scope
    5631             : /*11480*/           OPC_CheckChild0Type, MVT::v4i16,
    5632             : /*11482*/           OPC_MoveChild1,
    5633             : /*11483*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5634             : /*11486*/           OPC_RecordChild0, // #1 = $Vm
    5635             : /*11487*/           OPC_CheckChild0Type, MVT::v4i16,
    5636             : /*11489*/           OPC_RecordChild1, // #2 = $lane
    5637             : /*11490*/           OPC_MoveChild1,
    5638             : /*11491*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5639             : /*11494*/           OPC_MoveParent,
    5640             : /*11495*/           OPC_MoveParent,
    5641             : /*11496*/           OPC_MoveParent,
    5642             : /*11497*/           OPC_RecordChild1, // #3 = $src1
    5643             : /*11498*/           OPC_CheckType, MVT::v4i32,
    5644             : /*11500*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5645             : /*11502*/           OPC_EmitConvertToTarget, 2,
    5646             : /*11504*/           OPC_EmitInteger, MVT::i32, 14, 
    5647             : /*11507*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5648             : /*11510*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsluv4i16), 0,
    5649             :                         MVT::v4i32, 6/*#Ops*/, 3, 0, 1, 4, 5, 6, 
    5650             :                     // Src: (add:v4i32 (NEONvmullu:v4i32 DPR:v4i16:$Vn, (NEONvduplane:v4i16 DPR_8:v4i16:$Vm, (imm:i32):$lane)), QPR:v4i32:$src1) - Complexity = 12
    5651             :                     // Dst: (VMLALsluv4i16:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR_8:v4i16:$Vm, (imm:i32):$lane)
    5652             : /*11522*/         /*Scope*/ 42, /*->11565*/
    5653             : /*11523*/           OPC_CheckChild0Type, MVT::v2i32,
    5654             : /*11525*/           OPC_MoveChild1,
    5655             : /*11526*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5656             : /*11529*/           OPC_RecordChild0, // #1 = $Vm
    5657             : /*11530*/           OPC_CheckChild0Type, MVT::v2i32,
    5658             : /*11532*/           OPC_RecordChild1, // #2 = $lane
    5659             : /*11533*/           OPC_MoveChild1,
    5660             : /*11534*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5661             : /*11537*/           OPC_MoveParent,
    5662             : /*11538*/           OPC_MoveParent,
    5663             : /*11539*/           OPC_MoveParent,
    5664             : /*11540*/           OPC_RecordChild1, // #3 = $src1
    5665             : /*11541*/           OPC_CheckType, MVT::v2i64,
    5666             : /*11543*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5667             : /*11545*/           OPC_EmitConvertToTarget, 2,
    5668             : /*11547*/           OPC_EmitInteger, MVT::i32, 14, 
    5669             : /*11550*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5670             : /*11553*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsluv2i32), 0,
    5671             :                         MVT::v2i64, 6/*#Ops*/, 3, 0, 1, 4, 5, 6, 
    5672             :                     // Src: (add:v2i64 (NEONvmullu:v2i64 DPR:v2i32:$Vn, (NEONvduplane:v2i32 DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)), QPR:v2i64:$src1) - Complexity = 12
    5673             :                     // Dst: (VMLALsluv2i32:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR_VFP2:v2i32:$Vm, (imm:i32):$lane)
    5674             : /*11565*/         0, /*End of Scope*/
    5675             : /*11566*/       0, // EndSwitchOpcode
    5676             : /*11567*/     /*Scope*/ 41|128,1/*169*/, /*->11738*/
    5677             : /*11569*/       OPC_RecordChild0, // #0 = $src1
    5678             : /*11570*/       OPC_MoveChild1,
    5679             : /*11571*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5680             : /*11574*/       OPC_Scope, 106, /*->11682*/ // 2 children in Scope
    5681             : /*11576*/         OPC_RecordChild0, // #1 = $src2
    5682             : /*11577*/         OPC_MoveChild1,
    5683             : /*11578*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5684             : /*11581*/         OPC_RecordChild0, // #2 = $src3
    5685             : /*11582*/         OPC_Scope, 48, /*->11632*/ // 2 children in Scope
    5686             : /*11584*/           OPC_CheckChild0Type, MVT::v8i16,
    5687             : /*11586*/           OPC_RecordChild1, // #3 = $lane
    5688             : /*11587*/           OPC_MoveChild1,
    5689             : /*11588*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5690             : /*11591*/           OPC_MoveParent,
    5691             : /*11592*/           OPC_MoveParent,
    5692             : /*11593*/           OPC_MoveParent,
    5693             : /*11594*/           OPC_CheckType, MVT::v8i16,
    5694             : /*11596*/           OPC_EmitConvertToTarget, 3,
    5695             : /*11598*/           OPC_EmitNodeXForm, 5, 4, // DSubReg_i16_reg
    5696             : /*11601*/           OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0,
    5697             :                         MVT::v4i16, 2/*#Ops*/, 2, 5,  // Results = #6
    5698             : /*11609*/           OPC_EmitConvertToTarget, 3,
    5699             : /*11611*/           OPC_EmitNodeXForm, 6, 7, // SubReg_i16_lane
    5700             : /*11614*/           OPC_EmitInteger, MVT::i32, 14, 
    5701             : /*11617*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5702             : /*11620*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv8i16), 0,
    5703             :                         MVT::v8i16, 6/*#Ops*/, 0, 1, 6, 8, 9, 10, 
    5704             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (mul:v8i16 QPR:v8i16:$src2, (NEONvduplane:v8i16 QPR:v8i16:$src3, (imm:i32):$lane))) - Complexity = 12
    5705             :                     // Dst: (VMLAslv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$src2, (EXTRACT_SUBREG:v4i16 QPR:v8i16:$src3, (DSubReg_i16_reg:i32 (imm:i32):$lane)), (SubReg_i16_lane:i32 (imm:i32):$lane))
    5706             : /*11632*/         /*Scope*/ 48, /*->11681*/
    5707             : /*11633*/           OPC_CheckChild0Type, MVT::v4i32,
    5708             : /*11635*/           OPC_RecordChild1, // #3 = $lane
    5709             : /*11636*/           OPC_MoveChild1,
    5710             : /*11637*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5711             : /*11640*/           OPC_MoveParent,
    5712             : /*11641*/           OPC_MoveParent,
    5713             : /*11642*/           OPC_MoveParent,
    5714             : /*11643*/           OPC_CheckType, MVT::v4i32,
    5715             : /*11645*/           OPC_EmitConvertToTarget, 3,
    5716             : /*11647*/           OPC_EmitNodeXForm, 7, 4, // DSubReg_i32_reg
    5717             : /*11650*/           OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0,
    5718             :                         MVT::v2i32, 2/*#Ops*/, 2, 5,  // Results = #6
    5719             : /*11658*/           OPC_EmitConvertToTarget, 3,
    5720             : /*11660*/           OPC_EmitNodeXForm, 8, 7, // SubReg_i32_lane
    5721             : /*11663*/           OPC_EmitInteger, MVT::i32, 14, 
    5722             : /*11666*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5723             : /*11669*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i32), 0,
    5724             :                         MVT::v4i32, 6/*#Ops*/, 0, 1, 6, 8, 9, 10, 
    5725             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (mul:v4i32 QPR:v4i32:$src2, (NEONvduplane:v4i32 QPR:v4i32:$src3, (imm:i32):$lane))) - Complexity = 12
    5726             :                     // Dst: (VMLAslv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$src2, (EXTRACT_SUBREG:v2i32 QPR:v4i32:$src3, (DSubReg_i32_reg:i32 (imm:i32):$lane)), (SubReg_i32_lane:i32 (imm:i32):$lane))
    5727             : /*11681*/         0, /*End of Scope*/
    5728             : /*11682*/       /*Scope*/ 54, /*->11737*/
    5729             : /*11683*/         OPC_MoveChild0,
    5730             : /*11684*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5731             : /*11687*/         OPC_RecordChild0, // #1 = $src3
    5732             : /*11688*/         OPC_CheckChild0Type, MVT::v8i16,
    5733             : /*11690*/         OPC_RecordChild1, // #2 = $lane
    5734             : /*11691*/         OPC_MoveChild1,
    5735             : /*11692*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5736             : /*11695*/         OPC_MoveParent,
    5737             : /*11696*/         OPC_MoveParent,
    5738             : /*11697*/         OPC_RecordChild1, // #3 = $src2
    5739             : /*11698*/         OPC_MoveParent,
    5740             : /*11699*/         OPC_CheckType, MVT::v8i16,
    5741             : /*11701*/         OPC_EmitConvertToTarget, 2,
    5742             : /*11703*/         OPC_EmitNodeXForm, 5, 4, // DSubReg_i16_reg
    5743             : /*11706*/         OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0,
    5744             :                       MVT::v4i16, 2/*#Ops*/, 1, 5,  // Results = #6
    5745             : /*11714*/         OPC_EmitConvertToTarget, 2,
    5746             : /*11716*/         OPC_EmitNodeXForm, 6, 7, // SubReg_i16_lane
    5747             : /*11719*/         OPC_EmitInteger, MVT::i32, 14, 
    5748             : /*11722*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5749             : /*11725*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv8i16), 0,
    5750             :                       MVT::v8i16, 6/*#Ops*/, 0, 3, 6, 8, 9, 10, 
    5751             :                   // Src: (add:v8i16 QPR:v8i16:$src1, (mul:v8i16 (NEONvduplane:v8i16 QPR:v8i16:$src3, (imm:i32):$lane), QPR:v8i16:$src2)) - Complexity = 12
    5752             :                   // Dst: (VMLAslv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$src2, (EXTRACT_SUBREG:v4i16 QPR:v8i16:$src3, (DSubReg_i16_reg:i32 (imm:i32):$lane)), (SubReg_i16_lane:i32 (imm:i32):$lane))
    5753             : /*11737*/       0, /*End of Scope*/
    5754             : /*11738*/     /*Scope*/ 118, /*->11857*/
    5755             : /*11739*/       OPC_MoveChild0,
    5756             : /*11740*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5757             : /*11743*/       OPC_Scope, 55, /*->11800*/ // 2 children in Scope
    5758             : /*11745*/         OPC_RecordChild0, // #0 = $src2
    5759             : /*11746*/         OPC_MoveChild1,
    5760             : /*11747*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5761             : /*11750*/         OPC_RecordChild0, // #1 = $src3
    5762             : /*11751*/         OPC_CheckChild0Type, MVT::v8i16,
    5763             : /*11753*/         OPC_RecordChild1, // #2 = $lane
    5764             : /*11754*/         OPC_MoveChild1,
    5765             : /*11755*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5766             : /*11758*/         OPC_MoveParent,
    5767             : /*11759*/         OPC_MoveParent,
    5768             : /*11760*/         OPC_MoveParent,
    5769             : /*11761*/         OPC_RecordChild1, // #3 = $src1
    5770             : /*11762*/         OPC_CheckType, MVT::v8i16,
    5771             : /*11764*/         OPC_EmitConvertToTarget, 2,
    5772             : /*11766*/         OPC_EmitNodeXForm, 5, 4, // DSubReg_i16_reg
    5773             : /*11769*/         OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0,
    5774             :                       MVT::v4i16, 2/*#Ops*/, 1, 5,  // Results = #6
    5775             : /*11777*/         OPC_EmitConvertToTarget, 2,
    5776             : /*11779*/         OPC_EmitNodeXForm, 6, 7, // SubReg_i16_lane
    5777             : /*11782*/         OPC_EmitInteger, MVT::i32, 14, 
    5778             : /*11785*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5779             : /*11788*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv8i16), 0,
    5780             :                       MVT::v8i16, 6/*#Ops*/, 3, 0, 6, 8, 9, 10, 
    5781             :                   // Src: (add:v8i16 (mul:v8i16 QPR:v8i16:$src2, (NEONvduplane:v8i16 QPR:v8i16:$src3, (imm:i32):$lane)), QPR:v8i16:$src1) - Complexity = 12
    5782             :                   // Dst: (VMLAslv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$src2, (EXTRACT_SUBREG:v4i16 QPR:v8i16:$src3, (DSubReg_i16_reg:i32 (imm:i32):$lane)), (SubReg_i16_lane:i32 (imm:i32):$lane))
    5783             : /*11800*/       /*Scope*/ 55, /*->11856*/
    5784             : /*11801*/         OPC_MoveChild0,
    5785             : /*11802*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5786             : /*11805*/         OPC_RecordChild0, // #0 = $src3
    5787             : /*11806*/         OPC_CheckChild0Type, MVT::v8i16,
    5788             : /*11808*/         OPC_RecordChild1, // #1 = $lane
    5789             : /*11809*/         OPC_MoveChild1,
    5790             : /*11810*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5791             : /*11813*/         OPC_MoveParent,
    5792             : /*11814*/         OPC_MoveParent,
    5793             : /*11815*/         OPC_RecordChild1, // #2 = $src2
    5794             : /*11816*/         OPC_MoveParent,
    5795             : /*11817*/         OPC_RecordChild1, // #3 = $src1
    5796             : /*11818*/         OPC_CheckType, MVT::v8i16,
    5797             : /*11820*/         OPC_EmitConvertToTarget, 1,
    5798             : /*11822*/         OPC_EmitNodeXForm, 5, 4, // DSubReg_i16_reg
    5799             : /*11825*/         OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0,
    5800             :                       MVT::v4i16, 2/*#Ops*/, 0, 5,  // Results = #6
    5801             : /*11833*/         OPC_EmitConvertToTarget, 1,
    5802             : /*11835*/         OPC_EmitNodeXForm, 6, 7, // SubReg_i16_lane
    5803             : /*11838*/         OPC_EmitInteger, MVT::i32, 14, 
    5804             : /*11841*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5805             : /*11844*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv8i16), 0,
    5806             :                       MVT::v8i16, 6/*#Ops*/, 3, 2, 6, 8, 9, 10, 
    5807             :                   // Src: (add:v8i16 (mul:v8i16 (NEONvduplane:v8i16 QPR:v8i16:$src3, (imm:i32):$lane), QPR:v8i16:$src2), QPR:v8i16:$src1) - Complexity = 12
    5808             :                   // Dst: (VMLAslv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$src2, (EXTRACT_SUBREG:v4i16 QPR:v8i16:$src3, (DSubReg_i16_reg:i32 (imm:i32):$lane)), (SubReg_i16_lane:i32 (imm:i32):$lane))
    5809             : /*11856*/       0, /*End of Scope*/
    5810             : /*11857*/     /*Scope*/ 59, /*->11917*/
    5811             : /*11858*/       OPC_RecordChild0, // #0 = $src1
    5812             : /*11859*/       OPC_MoveChild1,
    5813             : /*11860*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5814             : /*11863*/       OPC_MoveChild0,
    5815             : /*11864*/       OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5816             : /*11867*/       OPC_RecordChild0, // #1 = $src3
    5817             : /*11868*/       OPC_CheckChild0Type, MVT::v4i32,
    5818             : /*11870*/       OPC_RecordChild1, // #2 = $lane
    5819             : /*11871*/       OPC_MoveChild1,
    5820             : /*11872*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5821             : /*11875*/       OPC_MoveParent,
    5822             : /*11876*/       OPC_MoveParent,
    5823             : /*11877*/       OPC_RecordChild1, // #3 = $src2
    5824             : /*11878*/       OPC_MoveParent,
    5825             : /*11879*/       OPC_CheckType, MVT::v4i32,
    5826             : /*11881*/       OPC_EmitConvertToTarget, 2,
    5827             : /*11883*/       OPC_EmitNodeXForm, 7, 4, // DSubReg_i32_reg
    5828             : /*11886*/       OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0,
    5829             :                     MVT::v2i32, 2/*#Ops*/, 1, 5,  // Results = #6
    5830             : /*11894*/       OPC_EmitConvertToTarget, 2,
    5831             : /*11896*/       OPC_EmitNodeXForm, 8, 7, // SubReg_i32_lane
    5832             : /*11899*/       OPC_EmitInteger, MVT::i32, 14, 
    5833             : /*11902*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5834             : /*11905*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i32), 0,
    5835             :                     MVT::v4i32, 6/*#Ops*/, 0, 3, 6, 8, 9, 10, 
    5836             :                 // Src: (add:v4i32 QPR:v4i32:$src1, (mul:v4i32 (NEONvduplane:v4i32 QPR:v4i32:$src3, (imm:i32):$lane), QPR:v4i32:$src2)) - Complexity = 12
    5837             :                 // Dst: (VMLAslv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$src2, (EXTRACT_SUBREG:v2i32 QPR:v4i32:$src3, (DSubReg_i32_reg:i32 (imm:i32):$lane)), (SubReg_i32_lane:i32 (imm:i32):$lane))
    5838             : /*11917*/     /*Scope*/ 118, /*->12036*/
    5839             : /*11918*/       OPC_MoveChild0,
    5840             : /*11919*/       OPC_CheckOpcode, TARGET_VAL(ISD::MUL),
    5841             : /*11922*/       OPC_Scope, 55, /*->11979*/ // 2 children in Scope
    5842             : /*11924*/         OPC_RecordChild0, // #0 = $src2
    5843             : /*11925*/         OPC_MoveChild1,
    5844             : /*11926*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5845             : /*11929*/         OPC_RecordChild0, // #1 = $src3
    5846             : /*11930*/         OPC_CheckChild0Type, MVT::v4i32,
    5847             : /*11932*/         OPC_RecordChild1, // #2 = $lane
    5848             : /*11933*/         OPC_MoveChild1,
    5849             : /*11934*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5850             : /*11937*/         OPC_MoveParent,
    5851             : /*11938*/         OPC_MoveParent,
    5852             : /*11939*/         OPC_MoveParent,
    5853             : /*11940*/         OPC_RecordChild1, // #3 = $src1
    5854             : /*11941*/         OPC_CheckType, MVT::v4i32,
    5855             : /*11943*/         OPC_EmitConvertToTarget, 2,
    5856             : /*11945*/         OPC_EmitNodeXForm, 7, 4, // DSubReg_i32_reg
    5857             : /*11948*/         OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0,
    5858             :                       MVT::v2i32, 2/*#Ops*/, 1, 5,  // Results = #6
    5859             : /*11956*/         OPC_EmitConvertToTarget, 2,
    5860             : /*11958*/         OPC_EmitNodeXForm, 8, 7, // SubReg_i32_lane
    5861             : /*11961*/         OPC_EmitInteger, MVT::i32, 14, 
    5862             : /*11964*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5863             : /*11967*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i32), 0,
    5864             :                       MVT::v4i32, 6/*#Ops*/, 3, 0, 6, 8, 9, 10, 
    5865             :                   // Src: (add:v4i32 (mul:v4i32 QPR:v4i32:$src2, (NEONvduplane:v4i32 QPR:v4i32:$src3, (imm:i32):$lane)), QPR:v4i32:$src1) - Complexity = 12
    5866             :                   // Dst: (VMLAslv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$src2, (EXTRACT_SUBREG:v2i32 QPR:v4i32:$src3, (DSubReg_i32_reg:i32 (imm:i32):$lane)), (SubReg_i32_lane:i32 (imm:i32):$lane))
    5867             : /*11979*/       /*Scope*/ 55, /*->12035*/
    5868             : /*11980*/         OPC_MoveChild0,
    5869             : /*11981*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VDUPLANE),
    5870             : /*11984*/         OPC_RecordChild0, // #0 = $src3
    5871             : /*11985*/         OPC_CheckChild0Type, MVT::v4i32,
    5872             : /*11987*/         OPC_RecordChild1, // #1 = $lane
    5873             : /*11988*/         OPC_MoveChild1,
    5874             : /*11989*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5875             : /*11992*/         OPC_MoveParent,
    5876             : /*11993*/         OPC_MoveParent,
    5877             : /*11994*/         OPC_RecordChild1, // #2 = $src2
    5878             : /*11995*/         OPC_MoveParent,
    5879             : /*11996*/         OPC_RecordChild1, // #3 = $src1
    5880             : /*11997*/         OPC_CheckType, MVT::v4i32,
    5881             : /*11999*/         OPC_EmitConvertToTarget, 1,
    5882             : /*12001*/         OPC_EmitNodeXForm, 7, 4, // DSubReg_i32_reg
    5883             : /*12004*/         OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0,
    5884             :                       MVT::v2i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5885             : /*12012*/         OPC_EmitConvertToTarget, 1,
    5886             : /*12014*/         OPC_EmitNodeXForm, 8, 7, // SubReg_i32_lane
    5887             : /*12017*/         OPC_EmitInteger, MVT::i32, 14, 
    5888             : /*12020*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5889             : /*12023*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAslv4i32), 0,
    5890             :                       MVT::v4i32, 6/*#Ops*/, 3, 2, 6, 8, 9, 10, 
    5891             :                   // Src: (add:v4i32 (mul:v4i32 (NEONvduplane:v4i32 QPR:v4i32:$src3, (imm:i32):$lane), QPR:v4i32:$src2), QPR:v4i32:$src1) - Complexity = 12
    5892             :                   // Dst: (VMLAslv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$src2, (EXTRACT_SUBREG:v2i32 QPR:v4i32:$src3, (DSubReg_i32_reg:i32 (imm:i32):$lane)), (SubReg_i32_lane:i32 (imm:i32):$lane))
    5893             : /*12035*/       0, /*End of Scope*/
    5894             : /*12036*/     /*Scope*/ 103|128,2/*359*/, /*->12397*/
    5895             : /*12038*/       OPC_RecordChild0, // #0 = $src1
    5896             : /*12039*/       OPC_MoveChild1,
    5897             : /*12040*/       OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_WO_CHAIN),
    5898             : /*12043*/       OPC_Scope, 46|128,1/*174*/, /*->12220*/ // 2 children in Scope
    5899             : /*12046*/         OPC_CheckChild0Integer, 97|128,4/*609*/, 
    5900             : /*12049*/         OPC_RecordChild1, // #1 = $Vn
    5901             : /*12050*/         OPC_Scope, 27, /*->12079*/ // 6 children in Scope
    5902             : /*12052*/           OPC_CheckChild1Type, MVT::v8i8,
    5903             : /*12054*/           OPC_RecordChild2, // #2 = $Vm
    5904             : /*12055*/           OPC_CheckChild2Type, MVT::v8i8,
    5905             : /*12057*/           OPC_MoveParent,
    5906             : /*12058*/           OPC_CheckType, MVT::v8i8,
    5907             : /*12060*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5908             : /*12062*/           OPC_EmitInteger, MVT::i32, 14, 
    5909             : /*12065*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5910             : /*12068*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv8i8), 0,
    5911             :                         MVT::v8i8, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5912             :                     // Src: (add:v8i8 DPR:v8i8:$src1, (intrinsic_wo_chain:v8i8 609:iPTR, DPR:v8i8:$Vn, DPR:v8i8:$Vm)) - Complexity = 11
    5913             :                     // Dst: (VABAsv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    5914             : /*12079*/         /*Scope*/ 27, /*->12107*/
    5915             : /*12080*/           OPC_CheckChild1Type, MVT::v4i16,
    5916             : /*12082*/           OPC_RecordChild2, // #2 = $Vm
    5917             : /*12083*/           OPC_CheckChild2Type, MVT::v4i16,
    5918             : /*12085*/           OPC_MoveParent,
    5919             : /*12086*/           OPC_CheckType, MVT::v4i16,
    5920             : /*12088*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5921             : /*12090*/           OPC_EmitInteger, MVT::i32, 14, 
    5922             : /*12093*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5923             : /*12096*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv4i16), 0,
    5924             :                         MVT::v4i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5925             :                     // Src: (add:v4i16 DPR:v4i16:$src1, (intrinsic_wo_chain:v4i16 609:iPTR, DPR:v4i16:$Vn, DPR:v4i16:$Vm)) - Complexity = 11
    5926             :                     // Dst: (VABAsv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    5927             : /*12107*/         /*Scope*/ 27, /*->12135*/
    5928             : /*12108*/           OPC_CheckChild1Type, MVT::v2i32,
    5929             : /*12110*/           OPC_RecordChild2, // #2 = $Vm
    5930             : /*12111*/           OPC_CheckChild2Type, MVT::v2i32,
    5931             : /*12113*/           OPC_MoveParent,
    5932             : /*12114*/           OPC_CheckType, MVT::v2i32,
    5933             : /*12116*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5934             : /*12118*/           OPC_EmitInteger, MVT::i32, 14, 
    5935             : /*12121*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5936             : /*12124*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv2i32), 0,
    5937             :                         MVT::v2i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5938             :                     // Src: (add:v2i32 DPR:v2i32:$src1, (intrinsic_wo_chain:v2i32 609:iPTR, DPR:v2i32:$Vn, DPR:v2i32:$Vm)) - Complexity = 11
    5939             :                     // Dst: (VABAsv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    5940             : /*12135*/         /*Scope*/ 27, /*->12163*/
    5941             : /*12136*/           OPC_CheckChild1Type, MVT::v16i8,
    5942             : /*12138*/           OPC_RecordChild2, // #2 = $Vm
    5943             : /*12139*/           OPC_CheckChild2Type, MVT::v16i8,
    5944             : /*12141*/           OPC_MoveParent,
    5945             : /*12142*/           OPC_CheckType, MVT::v16i8,
    5946             : /*12144*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5947             : /*12146*/           OPC_EmitInteger, MVT::i32, 14, 
    5948             : /*12149*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5949             : /*12152*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv16i8), 0,
    5950             :                         MVT::v16i8, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5951             :                     // Src: (add:v16i8 QPR:v16i8:$src1, (intrinsic_wo_chain:v16i8 609:iPTR, QPR:v16i8:$Vn, QPR:v16i8:$Vm)) - Complexity = 11
    5952             :                     // Dst: (VABAsv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vn, QPR:v16i8:$Vm)
    5953             : /*12163*/         /*Scope*/ 27, /*->12191*/
    5954             : /*12164*/           OPC_CheckChild1Type, MVT::v8i16,
    5955             : /*12166*/           OPC_RecordChild2, // #2 = $Vm
    5956             : /*12167*/           OPC_CheckChild2Type, MVT::v8i16,
    5957             : /*12169*/           OPC_MoveParent,
    5958             : /*12170*/           OPC_CheckType, MVT::v8i16,
    5959             : /*12172*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5960             : /*12174*/           OPC_EmitInteger, MVT::i32, 14, 
    5961             : /*12177*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5962             : /*12180*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv8i16), 0,
    5963             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5964             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (intrinsic_wo_chain:v8i16 609:iPTR, QPR:v8i16:$Vn, QPR:v8i16:$Vm)) - Complexity = 11
    5965             :                     // Dst: (VABAsv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, QPR:v8i16:$Vm)
    5966             : /*12191*/         /*Scope*/ 27, /*->12219*/
    5967             : /*12192*/           OPC_CheckChild1Type, MVT::v4i32,
    5968             : /*12194*/           OPC_RecordChild2, // #2 = $Vm
    5969             : /*12195*/           OPC_CheckChild2Type, MVT::v4i32,
    5970             : /*12197*/           OPC_MoveParent,
    5971             : /*12198*/           OPC_CheckType, MVT::v4i32,
    5972             : /*12200*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5973             : /*12202*/           OPC_EmitInteger, MVT::i32, 14, 
    5974             : /*12205*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5975             : /*12208*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv4i32), 0,
    5976             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5977             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (intrinsic_wo_chain:v4i32 609:iPTR, QPR:v4i32:$Vn, QPR:v4i32:$Vm)) - Complexity = 11
    5978             :                     // Dst: (VABAsv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    5979             : /*12219*/         0, /*End of Scope*/
    5980             : /*12220*/       /*Scope*/ 46|128,1/*174*/, /*->12396*/
    5981             : /*12222*/         OPC_CheckChild0Integer, 98|128,4/*610*/, 
    5982             : /*12225*/         OPC_RecordChild1, // #1 = $Vn
    5983             : /*12226*/         OPC_Scope, 27, /*->12255*/ // 6 children in Scope
    5984             : /*12228*/           OPC_CheckChild1Type, MVT::v8i8,
    5985             : /*12230*/           OPC_RecordChild2, // #2 = $Vm
    5986             : /*12231*/           OPC_CheckChild2Type, MVT::v8i8,
    5987             : /*12233*/           OPC_MoveParent,
    5988             : /*12234*/           OPC_CheckType, MVT::v8i8,
    5989             : /*12236*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    5990             : /*12238*/           OPC_EmitInteger, MVT::i32, 14, 
    5991             : /*12241*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    5992             : /*12244*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv8i8), 0,
    5993             :                         MVT::v8i8, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    5994             :                     // Src: (add:v8i8 DPR:v8i8:$src1, (intrinsic_wo_chain:v8i8 610:iPTR, DPR:v8i8:$Vn, DPR:v8i8:$Vm)) - Complexity = 11
    5995             :                     // Dst: (VABAuv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    5996             : /*12255*/         /*Scope*/ 27, /*->12283*/
    5997             : /*12256*/           OPC_CheckChild1Type, MVT::v4i16,
    5998             : /*12258*/           OPC_RecordChild2, // #2 = $Vm
    5999             : /*12259*/           OPC_CheckChild2Type, MVT::v4i16,
    6000             : /*12261*/           OPC_MoveParent,
    6001             : /*12262*/           OPC_CheckType, MVT::v4i16,
    6002             : /*12264*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6003             : /*12266*/           OPC_EmitInteger, MVT::i32, 14, 
    6004             : /*12269*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6005             : /*12272*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv4i16), 0,
    6006             :                         MVT::v4i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    6007             :                     // Src: (add:v4i16 DPR:v4i16:$src1, (intrinsic_wo_chain:v4i16 610:iPTR, DPR:v4i16:$Vn, DPR:v4i16:$Vm)) - Complexity = 11
    6008             :                     // Dst: (VABAuv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    6009             : /*12283*/         /*Scope*/ 27, /*->12311*/
    6010             : /*12284*/           OPC_CheckChild1Type, MVT::v2i32,
    6011             : /*12286*/           OPC_RecordChild2, // #2 = $Vm
    6012             : /*12287*/           OPC_CheckChild2Type, MVT::v2i32,
    6013             : /*12289*/           OPC_MoveParent,
    6014             : /*12290*/           OPC_CheckType, MVT::v2i32,
    6015             : /*12292*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6016             : /*12294*/           OPC_EmitInteger, MVT::i32, 14, 
    6017             : /*12297*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6018             : /*12300*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv2i32), 0,
    6019             :                         MVT::v2i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    6020             :                     // Src: (add:v2i32 DPR:v2i32:$src1, (intrinsic_wo_chain:v2i32 610:iPTR, DPR:v2i32:$Vn, DPR:v2i32:$Vm)) - Complexity = 11
    6021             :                     // Dst: (VABAuv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    6022             : /*12311*/         /*Scope*/ 27, /*->12339*/
    6023             : /*12312*/           OPC_CheckChild1Type, MVT::v16i8,
    6024             : /*12314*/           OPC_RecordChild2, // #2 = $Vm
    6025             : /*12315*/           OPC_CheckChild2Type, MVT::v16i8,
    6026             : /*12317*/           OPC_MoveParent,
    6027             : /*12318*/           OPC_CheckType, MVT::v16i8,
    6028             : /*12320*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6029             : /*12322*/           OPC_EmitInteger, MVT::i32, 14, 
    6030             : /*12325*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6031             : /*12328*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv16i8), 0,
    6032             :                         MVT::v16i8, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    6033             :                     // Src: (add:v16i8 QPR:v16i8:$src1, (intrinsic_wo_chain:v16i8 610:iPTR, QPR:v16i8:$Vn, QPR:v16i8:$Vm)) - Complexity = 11
    6034             :                     // Dst: (VABAuv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vn, QPR:v16i8:$Vm)
    6035             : /*12339*/         /*Scope*/ 27, /*->12367*/
    6036             : /*12340*/           OPC_CheckChild1Type, MVT::v8i16,
    6037             : /*12342*/           OPC_RecordChild2, // #2 = $Vm
    6038             : /*12343*/           OPC_CheckChild2Type, MVT::v8i16,
    6039             : /*12345*/           OPC_MoveParent,
    6040             : /*12346*/           OPC_CheckType, MVT::v8i16,
    6041             : /*12348*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6042             : /*12350*/           OPC_EmitInteger, MVT::i32, 14, 
    6043             : /*12353*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6044             : /*12356*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv8i16), 0,
    6045             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    6046             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (intrinsic_wo_chain:v8i16 610:iPTR, QPR:v8i16:$Vn, QPR:v8i16:$Vm)) - Complexity = 11
    6047             :                     // Dst: (VABAuv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, QPR:v8i16:$Vm)
    6048             : /*12367*/         /*Scope*/ 27, /*->12395*/
    6049             : /*12368*/           OPC_CheckChild1Type, MVT::v4i32,
    6050             : /*12370*/           OPC_RecordChild2, // #2 = $Vm
    6051             : /*12371*/           OPC_CheckChild2Type, MVT::v4i32,
    6052             : /*12373*/           OPC_MoveParent,
    6053             : /*12374*/           OPC_CheckType, MVT::v4i32,
    6054             : /*12376*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6055             : /*12378*/           OPC_EmitInteger, MVT::i32, 14, 
    6056             : /*12381*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6057             : /*12384*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv4i32), 0,
    6058             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    6059             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (intrinsic_wo_chain:v4i32 610:iPTR, QPR:v4i32:$Vn, QPR:v4i32:$Vm)) - Complexity = 11
    6060             :                     // Dst: (VABAuv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    6061             : /*12395*/         0, /*End of Scope*/
    6062             : /*12396*/       0, /*End of Scope*/
    6063             : /*12397*/     /*Scope*/ 7|128,4/*519*/, /*->12918*/
    6064             : /*12399*/       OPC_MoveChild0,
    6065             : /*12400*/       OPC_SwitchOpcode /*3 cases */, 110|128,2/*366*/, TARGET_VAL(ISD::INTRINSIC_WO_CHAIN),// ->12771
    6066             : /*12405*/         OPC_Scope, 52|128,1/*180*/, /*->12588*/ // 2 children in Scope
    6067             : /*12408*/           OPC_CheckChild0Integer, 97|128,4/*609*/, 
    6068             : /*12411*/           OPC_RecordChild1, // #0 = $Vn
    6069             : /*12412*/           OPC_Scope, 28, /*->12442*/ // 6 children in Scope
    6070             : /*12414*/             OPC_CheckChild1Type, MVT::v8i8,
    6071             : /*12416*/             OPC_RecordChild2, // #1 = $Vm
    6072             : /*12417*/             OPC_CheckChild2Type, MVT::v8i8,
    6073             : /*12419*/             OPC_MoveParent,
    6074             : /*12420*/             OPC_RecordChild1, // #2 = $src1
    6075             : /*12421*/             OPC_CheckType, MVT::v8i8,
    6076             : /*12423*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6077             : /*12425*/             OPC_EmitInteger, MVT::i32, 14, 
    6078             : /*12428*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6079             : /*12431*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv8i8), 0,
    6080             :                           MVT::v8i8, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6081             :                       // Src: (add:v8i8 (intrinsic_wo_chain:v8i8 609:iPTR, DPR:v8i8:$Vn, DPR:v8i8:$Vm), DPR:v8i8:$src1) - Complexity = 11
    6082             :                       // Dst: (VABAsv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    6083             : /*12442*/           /*Scope*/ 28, /*->12471*/
    6084             : /*12443*/             OPC_CheckChild1Type, MVT::v4i16,
    6085             : /*12445*/             OPC_RecordChild2, // #1 = $Vm
    6086             : /*12446*/             OPC_CheckChild2Type, MVT::v4i16,
    6087             : /*12448*/             OPC_MoveParent,
    6088             : /*12449*/             OPC_RecordChild1, // #2 = $src1
    6089             : /*12450*/             OPC_CheckType, MVT::v4i16,
    6090             : /*12452*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6091             : /*12454*/             OPC_EmitInteger, MVT::i32, 14, 
    6092             : /*12457*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6093             : /*12460*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv4i16), 0,
    6094             :                           MVT::v4i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6095             :                       // Src: (add:v4i16 (intrinsic_wo_chain:v4i16 609:iPTR, DPR:v4i16:$Vn, DPR:v4i16:$Vm), DPR:v4i16:$src1) - Complexity = 11
    6096             :                       // Dst: (VABAsv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    6097             : /*12471*/           /*Scope*/ 28, /*->12500*/
    6098             : /*12472*/             OPC_CheckChild1Type, MVT::v2i32,
    6099             : /*12474*/             OPC_RecordChild2, // #1 = $Vm
    6100             : /*12475*/             OPC_CheckChild2Type, MVT::v2i32,
    6101             : /*12477*/             OPC_MoveParent,
    6102             : /*12478*/             OPC_RecordChild1, // #2 = $src1
    6103             : /*12479*/             OPC_CheckType, MVT::v2i32,
    6104             : /*12481*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6105             : /*12483*/             OPC_EmitInteger, MVT::i32, 14, 
    6106             : /*12486*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6107             : /*12489*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv2i32), 0,
    6108             :                           MVT::v2i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6109             :                       // Src: (add:v2i32 (intrinsic_wo_chain:v2i32 609:iPTR, DPR:v2i32:$Vn, DPR:v2i32:$Vm), DPR:v2i32:$src1) - Complexity = 11
    6110             :                       // Dst: (VABAsv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    6111             : /*12500*/           /*Scope*/ 28, /*->12529*/
    6112             : /*12501*/             OPC_CheckChild1Type, MVT::v16i8,
    6113             : /*12503*/             OPC_RecordChild2, // #1 = $Vm
    6114             : /*12504*/             OPC_CheckChild2Type, MVT::v16i8,
    6115             : /*12506*/             OPC_MoveParent,
    6116             : /*12507*/             OPC_RecordChild1, // #2 = $src1
    6117             : /*12508*/             OPC_CheckType, MVT::v16i8,
    6118             : /*12510*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6119             : /*12512*/             OPC_EmitInteger, MVT::i32, 14, 
    6120             : /*12515*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6121             : /*12518*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv16i8), 0,
    6122             :                           MVT::v16i8, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6123             :                       // Src: (add:v16i8 (intrinsic_wo_chain:v16i8 609:iPTR, QPR:v16i8:$Vn, QPR:v16i8:$Vm), QPR:v16i8:$src1) - Complexity = 11
    6124             :                       // Dst: (VABAsv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vn, QPR:v16i8:$Vm)
    6125             : /*12529*/           /*Scope*/ 28, /*->12558*/
    6126             : /*12530*/             OPC_CheckChild1Type, MVT::v8i16,
    6127             : /*12532*/             OPC_RecordChild2, // #1 = $Vm
    6128             : /*12533*/             OPC_CheckChild2Type, MVT::v8i16,
    6129             : /*12535*/             OPC_MoveParent,
    6130             : /*12536*/             OPC_RecordChild1, // #2 = $src1
    6131             : /*12537*/             OPC_CheckType, MVT::v8i16,
    6132             : /*12539*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6133             : /*12541*/             OPC_EmitInteger, MVT::i32, 14, 
    6134             : /*12544*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6135             : /*12547*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv8i16), 0,
    6136             :                           MVT::v8i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6137             :                       // Src: (add:v8i16 (intrinsic_wo_chain:v8i16 609:iPTR, QPR:v8i16:$Vn, QPR:v8i16:$Vm), QPR:v8i16:$src1) - Complexity = 11
    6138             :                       // Dst: (VABAsv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, QPR:v8i16:$Vm)
    6139             : /*12558*/           /*Scope*/ 28, /*->12587*/
    6140             : /*12559*/             OPC_CheckChild1Type, MVT::v4i32,
    6141             : /*12561*/             OPC_RecordChild2, // #1 = $Vm
    6142             : /*12562*/             OPC_CheckChild2Type, MVT::v4i32,
    6143             : /*12564*/             OPC_MoveParent,
    6144             : /*12565*/             OPC_RecordChild1, // #2 = $src1
    6145             : /*12566*/             OPC_CheckType, MVT::v4i32,
    6146             : /*12568*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6147             : /*12570*/             OPC_EmitInteger, MVT::i32, 14, 
    6148             : /*12573*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6149             : /*12576*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAsv4i32), 0,
    6150             :                           MVT::v4i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6151             :                       // Src: (add:v4i32 (intrinsic_wo_chain:v4i32 609:iPTR, QPR:v4i32:$Vn, QPR:v4i32:$Vm), QPR:v4i32:$src1) - Complexity = 11
    6152             :                       // Dst: (VABAsv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    6153             : /*12587*/           0, /*End of Scope*/
    6154             : /*12588*/         /*Scope*/ 52|128,1/*180*/, /*->12770*/
    6155             : /*12590*/           OPC_CheckChild0Integer, 98|128,4/*610*/, 
    6156             : /*12593*/           OPC_RecordChild1, // #0 = $Vn
    6157             : /*12594*/           OPC_Scope, 28, /*->12624*/ // 6 children in Scope
    6158             : /*12596*/             OPC_CheckChild1Type, MVT::v8i8,
    6159             : /*12598*/             OPC_RecordChild2, // #1 = $Vm
    6160             : /*12599*/             OPC_CheckChild2Type, MVT::v8i8,
    6161             : /*12601*/             OPC_MoveParent,
    6162             : /*12602*/             OPC_RecordChild1, // #2 = $src1
    6163             : /*12603*/             OPC_CheckType, MVT::v8i8,
    6164             : /*12605*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6165             : /*12607*/             OPC_EmitInteger, MVT::i32, 14, 
    6166             : /*12610*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6167             : /*12613*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv8i8), 0,
    6168             :                           MVT::v8i8, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6169             :                       // Src: (add:v8i8 (intrinsic_wo_chain:v8i8 610:iPTR, DPR:v8i8:$Vn, DPR:v8i8:$Vm), DPR:v8i8:$src1) - Complexity = 11
    6170             :                       // Dst: (VABAuv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    6171             : /*12624*/           /*Scope*/ 28, /*->12653*/
    6172             : /*12625*/             OPC_CheckChild1Type, MVT::v4i16,
    6173             : /*12627*/             OPC_RecordChild2, // #1 = $Vm
    6174             : /*12628*/             OPC_CheckChild2Type, MVT::v4i16,
    6175             : /*12630*/             OPC_MoveParent,
    6176             : /*12631*/             OPC_RecordChild1, // #2 = $src1
    6177             : /*12632*/             OPC_CheckType, MVT::v4i16,
    6178             : /*12634*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6179             : /*12636*/             OPC_EmitInteger, MVT::i32, 14, 
    6180             : /*12639*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6181             : /*12642*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv4i16), 0,
    6182             :                           MVT::v4i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6183             :                       // Src: (add:v4i16 (intrinsic_wo_chain:v4i16 610:iPTR, DPR:v4i16:$Vn, DPR:v4i16:$Vm), DPR:v4i16:$src1) - Complexity = 11
    6184             :                       // Dst: (VABAuv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    6185             : /*12653*/           /*Scope*/ 28, /*->12682*/
    6186             : /*12654*/             OPC_CheckChild1Type, MVT::v2i32,
    6187             : /*12656*/             OPC_RecordChild2, // #1 = $Vm
    6188             : /*12657*/             OPC_CheckChild2Type, MVT::v2i32,
    6189             : /*12659*/             OPC_MoveParent,
    6190             : /*12660*/             OPC_RecordChild1, // #2 = $src1
    6191             : /*12661*/             OPC_CheckType, MVT::v2i32,
    6192             : /*12663*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6193             : /*12665*/             OPC_EmitInteger, MVT::i32, 14, 
    6194             : /*12668*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6195             : /*12671*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv2i32), 0,
    6196             :                           MVT::v2i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6197             :                       // Src: (add:v2i32 (intrinsic_wo_chain:v2i32 610:iPTR, DPR:v2i32:$Vn, DPR:v2i32:$Vm), DPR:v2i32:$src1) - Complexity = 11
    6198             :                       // Dst: (VABAuv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    6199             : /*12682*/           /*Scope*/ 28, /*->12711*/
    6200             : /*12683*/             OPC_CheckChild1Type, MVT::v16i8,
    6201             : /*12685*/             OPC_RecordChild2, // #1 = $Vm
    6202             : /*12686*/             OPC_CheckChild2Type, MVT::v16i8,
    6203             : /*12688*/             OPC_MoveParent,
    6204             : /*12689*/             OPC_RecordChild1, // #2 = $src1
    6205             : /*12690*/             OPC_CheckType, MVT::v16i8,
    6206             : /*12692*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6207             : /*12694*/             OPC_EmitInteger, MVT::i32, 14, 
    6208             : /*12697*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6209             : /*12700*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv16i8), 0,
    6210             :                           MVT::v16i8, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6211             :                       // Src: (add:v16i8 (intrinsic_wo_chain:v16i8 610:iPTR, QPR:v16i8:$Vn, QPR:v16i8:$Vm), QPR:v16i8:$src1) - Complexity = 11
    6212             :                       // Dst: (VABAuv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vn, QPR:v16i8:$Vm)
    6213             : /*12711*/           /*Scope*/ 28, /*->12740*/
    6214             : /*12712*/             OPC_CheckChild1Type, MVT::v8i16,
    6215             : /*12714*/             OPC_RecordChild2, // #1 = $Vm
    6216             : /*12715*/             OPC_CheckChild2Type, MVT::v8i16,
    6217             : /*12717*/             OPC_MoveParent,
    6218             : /*12718*/             OPC_RecordChild1, // #2 = $src1
    6219             : /*12719*/             OPC_CheckType, MVT::v8i16,
    6220             : /*12721*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6221             : /*12723*/             OPC_EmitInteger, MVT::i32, 14, 
    6222             : /*12726*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6223             : /*12729*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv8i16), 0,
    6224             :                           MVT::v8i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6225             :                       // Src: (add:v8i16 (intrinsic_wo_chain:v8i16 610:iPTR, QPR:v8i16:$Vn, QPR:v8i16:$Vm), QPR:v8i16:$src1) - Complexity = 11
    6226             :                       // Dst: (VABAuv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, QPR:v8i16:$Vm)
    6227             : /*12740*/           /*Scope*/ 28, /*->12769*/
    6228             : /*12741*/             OPC_CheckChild1Type, MVT::v4i32,
    6229             : /*12743*/             OPC_RecordChild2, // #1 = $Vm
    6230             : /*12744*/             OPC_CheckChild2Type, MVT::v4i32,
    6231             : /*12746*/             OPC_MoveParent,
    6232             : /*12747*/             OPC_RecordChild1, // #2 = $src1
    6233             : /*12748*/             OPC_CheckType, MVT::v4i32,
    6234             : /*12750*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6235             : /*12752*/             OPC_EmitInteger, MVT::i32, 14, 
    6236             : /*12755*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6237             : /*12758*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VABAuv4i32), 0,
    6238             :                           MVT::v4i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    6239             :                       // Src: (add:v4i32 (intrinsic_wo_chain:v4i32 610:iPTR, QPR:v4i32:$Vn, QPR:v4i32:$Vm), QPR:v4i32:$src1) - Complexity = 11
    6240             :                       // Dst: (VABAuv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    6241             : /*12769*/           0, /*End of Scope*/
    6242             : /*12770*/         0, /*End of Scope*/
    6243             : /*12771*/       /*SwitchOpcode*/ 70, TARGET_VAL(ISD::SIGN_EXTEND),// ->12844
    6244             : /*12774*/         OPC_RecordChild0, // #0 = $Vn
    6245             : /*12775*/         OPC_MoveParent,
    6246             : /*12776*/         OPC_MoveChild1,
    6247             : /*12777*/         OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND),
    6248             : /*12780*/         OPC_RecordChild0, // #1 = $Vm
    6249             : /*12781*/         OPC_MoveParent,
    6250             : /*12782*/         OPC_SwitchType /*3 cases */, 18, MVT::v8i16,// ->12803
    6251             : /*12785*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6252             : /*12787*/           OPC_EmitInteger, MVT::i32, 14, 
    6253             : /*12790*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6254             : /*12793*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDLsv8i16), 0,
    6255             :                         MVT::v8i16, 4/*#Ops*/, 0, 1, 2, 3, 
    6256             :                     // Src: (add:v8i16 (sext:v8i16 DPR:v8i8:$Vn), (sext:v8i16 DPR:v8i8:$Vm)) - Complexity = 9
    6257             :                     // Dst: (VADDLsv8i16:v8i16 DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    6258             : /*12803*/         /*SwitchType*/ 18, MVT::v4i32,// ->12823
    6259             : /*12805*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6260             : /*12807*/           OPC_EmitInteger, MVT::i32, 14, 
    6261             : /*12810*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6262             : /*12813*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDLsv4i32), 0,
    6263             :                         MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    6264             :                     // Src: (add:v4i32 (sext:v4i32 DPR:v4i16:$Vn), (sext:v4i32 DPR:v4i16:$Vm)) - Complexity = 9
    6265             :                     // Dst: (VADDLsv4i32:v4i32 DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    6266             : /*12823*/         /*SwitchType*/ 18, MVT::v2i64,// ->12843
    6267             : /*12825*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6268             : /*12827*/           OPC_EmitInteger, MVT::i32, 14, 
    6269             : /*12830*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6270             : /*12833*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDLsv2i64), 0,
    6271             :                         MVT::v2i64, 4/*#Ops*/, 0, 1, 2, 3, 
    6272             :                     // Src: (add:v2i64 (sext:v2i64 DPR:v2i32:$Vn), (sext:v2i64 DPR:v2i32:$Vm)) - Complexity = 9
    6273             :                     // Dst: (VADDLsv2i64:v2i64 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    6274             : /*12843*/         0, // EndSwitchType
    6275             : /*12844*/       /*SwitchOpcode*/ 70, TARGET_VAL(ISD::ZERO_EXTEND),// ->12917
    6276             : /*12847*/         OPC_RecordChild0, // #0 = $Vn
    6277             : /*12848*/         OPC_MoveParent,
    6278             : /*12849*/         OPC_MoveChild1,
    6279             : /*12850*/         OPC_CheckOpcode, TARGET_VAL(ISD::ZERO_EXTEND),
    6280             : /*12853*/         OPC_RecordChild0, // #1 = $Vm
    6281             : /*12854*/         OPC_MoveParent,
    6282             : /*12855*/         OPC_SwitchType /*3 cases */, 18, MVT::v8i16,// ->12876
    6283             : /*12858*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6284             : /*12860*/           OPC_EmitInteger, MVT::i32, 14, 
    6285             : /*12863*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6286             : /*12866*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDLuv8i16), 0,
    6287             :                         MVT::v8i16, 4/*#Ops*/, 0, 1, 2, 3, 
    6288             :                     // Src: (add:v8i16 (zext:v8i16 DPR:v8i8:$Vn), (zext:v8i16 DPR:v8i8:$Vm)) - Complexity = 9
    6289             :                     // Dst: (VADDLuv8i16:v8i16 DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    6290             : /*12876*/         /*SwitchType*/ 18, MVT::v4i32,// ->12896
    6291             : /*12878*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6292             : /*12880*/           OPC_EmitInteger, MVT::i32, 14, 
    6293             : /*12883*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6294             : /*12886*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDLuv4i32), 0,
    6295             :                         MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    6296             :                     // Src: (add:v4i32 (zext:v4i32 DPR:v4i16:$Vn), (zext:v4i32 DPR:v4i16:$Vm)) - Complexity = 9
    6297             :                     // Dst: (VADDLuv4i32:v4i32 DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    6298             : /*12896*/         /*SwitchType*/ 18, MVT::v2i64,// ->12916
    6299             : /*12898*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6300             : /*12900*/           OPC_EmitInteger, MVT::i32, 14, 
    6301             : /*12903*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6302             : /*12906*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDLuv2i64), 0,
    6303             :                         MVT::v2i64, 4/*#Ops*/, 0, 1, 2, 3, 
    6304             :                     // Src: (add:v2i64 (zext:v2i64 DPR:v2i32:$Vn), (zext:v2i64 DPR:v2i32:$Vm)) - Complexity = 9
    6305             :                     // Dst: (VADDLuv2i64:v2i64 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    6306             : /*12916*/         0, // EndSwitchType
    6307             : /*12917*/       0, // EndSwitchOpcode
    6308             : /*12918*/     /*Scope*/ 28|128,6/*796*/, /*->13716*/
    6309             : /*12920*/       OPC_RecordChild0, // #0 = $src1
    6310             : /*12921*/       OPC_MoveChild1,
    6311             : /*12922*/       OPC_SwitchOpcode /*4 cases */, 66|128,1/*194*/, TARGET_VAL(ARMISD::VSHRs),// ->13121
    6312             : /*12927*/         OPC_RecordChild0, // #1 = $Vm
    6313             : /*12928*/         OPC_RecordChild1, // #2 = $SIMM
    6314             : /*12929*/         OPC_MoveChild1,
    6315             : /*12930*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6316             : /*12933*/         OPC_MoveParent,
    6317             : /*12934*/         OPC_MoveParent,
    6318             : /*12935*/         OPC_SwitchType /*8 cases */, 21, MVT::v8i8,// ->12959
    6319             : /*12938*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6320             : /*12940*/           OPC_EmitConvertToTarget, 2,
    6321             : /*12942*/           OPC_EmitInteger, MVT::i32, 14, 
    6322             : /*12945*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6323             : /*12948*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv8i8), 0,
    6324             :                         MVT::v8i8, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6325             :                     // Src: (add:v8i8 DPR:v8i8:$src1, (NEONvshrs:v8i8 DPR:v8i8:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6326             :                     // Dst: (VSRAsv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vm, (imm:i32):$SIMM)
    6327             : /*12959*/         /*SwitchType*/ 21, MVT::v4i16,// ->12982
    6328             : /*12961*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6329             : /*12963*/           OPC_EmitConvertToTarget, 2,
    6330             : /*12965*/           OPC_EmitInteger, MVT::i32, 14, 
    6331             : /*12968*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6332             : /*12971*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv4i16), 0,
    6333             :                         MVT::v4i16, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6334             :                     // Src: (add:v4i16 DPR:v4i16:$src1, (NEONvshrs:v4i16 DPR:v4i16:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6335             :                     // Dst: (VSRAsv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vm, (imm:i32):$SIMM)
    6336             : /*12982*/         /*SwitchType*/ 21, MVT::v2i32,// ->13005
    6337             : /*12984*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6338             : /*12986*/           OPC_EmitConvertToTarget, 2,
    6339             : /*12988*/           OPC_EmitInteger, MVT::i32, 14, 
    6340             : /*12991*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6341             : /*12994*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv2i32), 0,
    6342             :                         MVT::v2i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6343             :                     // Src: (add:v2i32 DPR:v2i32:$src1, (NEONvshrs:v2i32 DPR:v2i32:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6344             :                     // Dst: (VSRAsv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vm, (imm:i32):$SIMM)
    6345             : /*13005*/         /*SwitchType*/ 21, MVT::v1i64,// ->13028
    6346             : /*13007*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6347             : /*13009*/           OPC_EmitConvertToTarget, 2,
    6348             : /*13011*/           OPC_EmitInteger, MVT::i32, 14, 
    6349             : /*13014*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6350             : /*13017*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv1i64), 0,
    6351             :                         MVT::v1i64, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6352             :                     // Src: (add:v1i64 DPR:v1i64:$src1, (NEONvshrs:v1i64 DPR:v1i64:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6353             :                     // Dst: (VSRAsv1i64:v1i64 DPR:v1i64:$src1, DPR:v1i64:$Vm, (imm:i32):$SIMM)
    6354             : /*13028*/         /*SwitchType*/ 21, MVT::v16i8,// ->13051
    6355             : /*13030*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6356             : /*13032*/           OPC_EmitConvertToTarget, 2,
    6357             : /*13034*/           OPC_EmitInteger, MVT::i32, 14, 
    6358             : /*13037*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6359             : /*13040*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv16i8), 0,
    6360             :                         MVT::v16i8, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6361             :                     // Src: (add:v16i8 QPR:v16i8:$src1, (NEONvshrs:v16i8 QPR:v16i8:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6362             :                     // Dst: (VSRAsv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vm, (imm:i32):$SIMM)
    6363             : /*13051*/         /*SwitchType*/ 21, MVT::v8i16,// ->13074
    6364             : /*13053*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6365             : /*13055*/           OPC_EmitConvertToTarget, 2,
    6366             : /*13057*/           OPC_EmitInteger, MVT::i32, 14, 
    6367             : /*13060*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6368             : /*13063*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv8i16), 0,
    6369             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6370             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (NEONvshrs:v8i16 QPR:v8i16:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6371             :                     // Dst: (VSRAsv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vm, (imm:i32):$SIMM)
    6372             : /*13074*/         /*SwitchType*/ 21, MVT::v4i32,// ->13097
    6373             : /*13076*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6374             : /*13078*/           OPC_EmitConvertToTarget, 2,
    6375             : /*13080*/           OPC_EmitInteger, MVT::i32, 14, 
    6376             : /*13083*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6377             : /*13086*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv4i32), 0,
    6378             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6379             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (NEONvshrs:v4i32 QPR:v4i32:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6380             :                     // Dst: (VSRAsv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vm, (imm:i32):$SIMM)
    6381             : /*13097*/         /*SwitchType*/ 21, MVT::v2i64,// ->13120
    6382             : /*13099*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6383             : /*13101*/           OPC_EmitConvertToTarget, 2,
    6384             : /*13103*/           OPC_EmitInteger, MVT::i32, 14, 
    6385             : /*13106*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6386             : /*13109*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv2i64), 0,
    6387             :                         MVT::v2i64, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6388             :                     // Src: (add:v2i64 QPR:v2i64:$src1, (NEONvshrs:v2i64 QPR:v2i64:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6389             :                     // Dst: (VSRAsv2i64:v2i64 QPR:v2i64:$src1, QPR:v2i64:$Vm, (imm:i32):$SIMM)
    6390             : /*13120*/         0, // EndSwitchType
    6391             : /*13121*/       /*SwitchOpcode*/ 66|128,1/*194*/, TARGET_VAL(ARMISD::VSHRu),// ->13319
    6392             : /*13125*/         OPC_RecordChild0, // #1 = $Vm
    6393             : /*13126*/         OPC_RecordChild1, // #2 = $SIMM
    6394             : /*13127*/         OPC_MoveChild1,
    6395             : /*13128*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6396             : /*13131*/         OPC_MoveParent,
    6397             : /*13132*/         OPC_MoveParent,
    6398             : /*13133*/         OPC_SwitchType /*8 cases */, 21, MVT::v8i8,// ->13157
    6399             : /*13136*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6400             : /*13138*/           OPC_EmitConvertToTarget, 2,
    6401             : /*13140*/           OPC_EmitInteger, MVT::i32, 14, 
    6402             : /*13143*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6403             : /*13146*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv8i8), 0,
    6404             :                         MVT::v8i8, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6405             :                     // Src: (add:v8i8 DPR:v8i8:$src1, (NEONvshru:v8i8 DPR:v8i8:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6406             :                     // Dst: (VSRAuv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vm, (imm:i32):$SIMM)
    6407             : /*13157*/         /*SwitchType*/ 21, MVT::v4i16,// ->13180
    6408             : /*13159*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6409             : /*13161*/           OPC_EmitConvertToTarget, 2,
    6410             : /*13163*/           OPC_EmitInteger, MVT::i32, 14, 
    6411             : /*13166*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6412             : /*13169*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv4i16), 0,
    6413             :                         MVT::v4i16, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6414             :                     // Src: (add:v4i16 DPR:v4i16:$src1, (NEONvshru:v4i16 DPR:v4i16:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6415             :                     // Dst: (VSRAuv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vm, (imm:i32):$SIMM)
    6416             : /*13180*/         /*SwitchType*/ 21, MVT::v2i32,// ->13203
    6417             : /*13182*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6418             : /*13184*/           OPC_EmitConvertToTarget, 2,
    6419             : /*13186*/           OPC_EmitInteger, MVT::i32, 14, 
    6420             : /*13189*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6421             : /*13192*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv2i32), 0,
    6422             :                         MVT::v2i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6423             :                     // Src: (add:v2i32 DPR:v2i32:$src1, (NEONvshru:v2i32 DPR:v2i32:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6424             :                     // Dst: (VSRAuv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vm, (imm:i32):$SIMM)
    6425             : /*13203*/         /*SwitchType*/ 21, MVT::v1i64,// ->13226
    6426             : /*13205*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6427             : /*13207*/           OPC_EmitConvertToTarget, 2,
    6428             : /*13209*/           OPC_EmitInteger, MVT::i32, 14, 
    6429             : /*13212*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6430             : /*13215*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv1i64), 0,
    6431             :                         MVT::v1i64, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6432             :                     // Src: (add:v1i64 DPR:v1i64:$src1, (NEONvshru:v1i64 DPR:v1i64:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6433             :                     // Dst: (VSRAuv1i64:v1i64 DPR:v1i64:$src1, DPR:v1i64:$Vm, (imm:i32):$SIMM)
    6434             : /*13226*/         /*SwitchType*/ 21, MVT::v16i8,// ->13249
    6435             : /*13228*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6436             : /*13230*/           OPC_EmitConvertToTarget, 2,
    6437             : /*13232*/           OPC_EmitInteger, MVT::i32, 14, 
    6438             : /*13235*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6439             : /*13238*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv16i8), 0,
    6440             :                         MVT::v16i8, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6441             :                     // Src: (add:v16i8 QPR:v16i8:$src1, (NEONvshru:v16i8 QPR:v16i8:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6442             :                     // Dst: (VSRAuv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vm, (imm:i32):$SIMM)
    6443             : /*13249*/         /*SwitchType*/ 21, MVT::v8i16,// ->13272
    6444             : /*13251*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6445             : /*13253*/           OPC_EmitConvertToTarget, 2,
    6446             : /*13255*/           OPC_EmitInteger, MVT::i32, 14, 
    6447             : /*13258*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6448             : /*13261*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv8i16), 0,
    6449             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6450             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (NEONvshru:v8i16 QPR:v8i16:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6451             :                     // Dst: (VSRAuv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vm, (imm:i32):$SIMM)
    6452             : /*13272*/         /*SwitchType*/ 21, MVT::v4i32,// ->13295
    6453             : /*13274*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6454             : /*13276*/           OPC_EmitConvertToTarget, 2,
    6455             : /*13278*/           OPC_EmitInteger, MVT::i32, 14, 
    6456             : /*13281*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6457             : /*13284*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv4i32), 0,
    6458             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6459             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (NEONvshru:v4i32 QPR:v4i32:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6460             :                     // Dst: (VSRAuv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vm, (imm:i32):$SIMM)
    6461             : /*13295*/         /*SwitchType*/ 21, MVT::v2i64,// ->13318
    6462             : /*13297*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6463             : /*13299*/           OPC_EmitConvertToTarget, 2,
    6464             : /*13301*/           OPC_EmitInteger, MVT::i32, 14, 
    6465             : /*13304*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6466             : /*13307*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv2i64), 0,
    6467             :                         MVT::v2i64, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6468             :                     // Src: (add:v2i64 QPR:v2i64:$src1, (NEONvshru:v2i64 QPR:v2i64:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6469             :                     // Dst: (VSRAuv2i64:v2i64 QPR:v2i64:$src1, QPR:v2i64:$Vm, (imm:i32):$SIMM)
    6470             : /*13318*/         0, // EndSwitchType
    6471             : /*13319*/       /*SwitchOpcode*/ 66|128,1/*194*/, TARGET_VAL(ARMISD::VRSHRs),// ->13517
    6472             : /*13323*/         OPC_RecordChild0, // #1 = $Vm
    6473             : /*13324*/         OPC_RecordChild1, // #2 = $SIMM
    6474             : /*13325*/         OPC_MoveChild1,
    6475             : /*13326*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6476             : /*13329*/         OPC_MoveParent,
    6477             : /*13330*/         OPC_MoveParent,
    6478             : /*13331*/         OPC_SwitchType /*8 cases */, 21, MVT::v8i8,// ->13355
    6479             : /*13334*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6480             : /*13336*/           OPC_EmitConvertToTarget, 2,
    6481             : /*13338*/           OPC_EmitInteger, MVT::i32, 14, 
    6482             : /*13341*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6483             : /*13344*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv8i8), 0,
    6484             :                         MVT::v8i8, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6485             :                     // Src: (add:v8i8 DPR:v8i8:$src1, (NEONvrshrs:v8i8 DPR:v8i8:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6486             :                     // Dst: (VRSRAsv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vm, (imm:i32):$SIMM)
    6487             : /*13355*/         /*SwitchType*/ 21, MVT::v4i16,// ->13378
    6488             : /*13357*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6489             : /*13359*/           OPC_EmitConvertToTarget, 2,
    6490             : /*13361*/           OPC_EmitInteger, MVT::i32, 14, 
    6491             : /*13364*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6492             : /*13367*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv4i16), 0,
    6493             :                         MVT::v4i16, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6494             :                     // Src: (add:v4i16 DPR:v4i16:$src1, (NEONvrshrs:v4i16 DPR:v4i16:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6495             :                     // Dst: (VRSRAsv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vm, (imm:i32):$SIMM)
    6496             : /*13378*/         /*SwitchType*/ 21, MVT::v2i32,// ->13401
    6497             : /*13380*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6498             : /*13382*/           OPC_EmitConvertToTarget, 2,
    6499             : /*13384*/           OPC_EmitInteger, MVT::i32, 14, 
    6500             : /*13387*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6501             : /*13390*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv2i32), 0,
    6502             :                         MVT::v2i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6503             :                     // Src: (add:v2i32 DPR:v2i32:$src1, (NEONvrshrs:v2i32 DPR:v2i32:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6504             :                     // Dst: (VRSRAsv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vm, (imm:i32):$SIMM)
    6505             : /*13401*/         /*SwitchType*/ 21, MVT::v1i64,// ->13424
    6506             : /*13403*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6507             : /*13405*/           OPC_EmitConvertToTarget, 2,
    6508             : /*13407*/           OPC_EmitInteger, MVT::i32, 14, 
    6509             : /*13410*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6510             : /*13413*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv1i64), 0,
    6511             :                         MVT::v1i64, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6512             :                     // Src: (add:v1i64 DPR:v1i64:$src1, (NEONvrshrs:v1i64 DPR:v1i64:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6513             :                     // Dst: (VRSRAsv1i64:v1i64 DPR:v1i64:$src1, DPR:v1i64:$Vm, (imm:i32):$SIMM)
    6514             : /*13424*/         /*SwitchType*/ 21, MVT::v16i8,// ->13447
    6515             : /*13426*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6516             : /*13428*/           OPC_EmitConvertToTarget, 2,
    6517             : /*13430*/           OPC_EmitInteger, MVT::i32, 14, 
    6518             : /*13433*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6519             : /*13436*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv16i8), 0,
    6520             :                         MVT::v16i8, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6521             :                     // Src: (add:v16i8 QPR:v16i8:$src1, (NEONvrshrs:v16i8 QPR:v16i8:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6522             :                     // Dst: (VRSRAsv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vm, (imm:i32):$SIMM)
    6523             : /*13447*/         /*SwitchType*/ 21, MVT::v8i16,// ->13470
    6524             : /*13449*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6525             : /*13451*/           OPC_EmitConvertToTarget, 2,
    6526             : /*13453*/           OPC_EmitInteger, MVT::i32, 14, 
    6527             : /*13456*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6528             : /*13459*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv8i16), 0,
    6529             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6530             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (NEONvrshrs:v8i16 QPR:v8i16:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6531             :                     // Dst: (VRSRAsv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vm, (imm:i32):$SIMM)
    6532             : /*13470*/         /*SwitchType*/ 21, MVT::v4i32,// ->13493
    6533             : /*13472*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6534             : /*13474*/           OPC_EmitConvertToTarget, 2,
    6535             : /*13476*/           OPC_EmitInteger, MVT::i32, 14, 
    6536             : /*13479*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6537             : /*13482*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv4i32), 0,
    6538             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6539             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (NEONvrshrs:v4i32 QPR:v4i32:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6540             :                     // Dst: (VRSRAsv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vm, (imm:i32):$SIMM)
    6541             : /*13493*/         /*SwitchType*/ 21, MVT::v2i64,// ->13516
    6542             : /*13495*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6543             : /*13497*/           OPC_EmitConvertToTarget, 2,
    6544             : /*13499*/           OPC_EmitInteger, MVT::i32, 14, 
    6545             : /*13502*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6546             : /*13505*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv2i64), 0,
    6547             :                         MVT::v2i64, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6548             :                     // Src: (add:v2i64 QPR:v2i64:$src1, (NEONvrshrs:v2i64 QPR:v2i64:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6549             :                     // Dst: (VRSRAsv2i64:v2i64 QPR:v2i64:$src1, QPR:v2i64:$Vm, (imm:i32):$SIMM)
    6550             : /*13516*/         0, // EndSwitchType
    6551             : /*13517*/       /*SwitchOpcode*/ 66|128,1/*194*/, TARGET_VAL(ARMISD::VRSHRu),// ->13715
    6552             : /*13521*/         OPC_RecordChild0, // #1 = $Vm
    6553             : /*13522*/         OPC_RecordChild1, // #2 = $SIMM
    6554             : /*13523*/         OPC_MoveChild1,
    6555             : /*13524*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6556             : /*13527*/         OPC_MoveParent,
    6557             : /*13528*/         OPC_MoveParent,
    6558             : /*13529*/         OPC_SwitchType /*8 cases */, 21, MVT::v8i8,// ->13553
    6559             : /*13532*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6560             : /*13534*/           OPC_EmitConvertToTarget, 2,
    6561             : /*13536*/           OPC_EmitInteger, MVT::i32, 14, 
    6562             : /*13539*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6563             : /*13542*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv8i8), 0,
    6564             :                         MVT::v8i8, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6565             :                     // Src: (add:v8i8 DPR:v8i8:$src1, (NEONvrshru:v8i8 DPR:v8i8:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6566             :                     // Dst: (VRSRAuv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vm, (imm:i32):$SIMM)
    6567             : /*13553*/         /*SwitchType*/ 21, MVT::v4i16,// ->13576
    6568             : /*13555*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6569             : /*13557*/           OPC_EmitConvertToTarget, 2,
    6570             : /*13559*/           OPC_EmitInteger, MVT::i32, 14, 
    6571             : /*13562*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6572             : /*13565*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv4i16), 0,
    6573             :                         MVT::v4i16, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6574             :                     // Src: (add:v4i16 DPR:v4i16:$src1, (NEONvrshru:v4i16 DPR:v4i16:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6575             :                     // Dst: (VRSRAuv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vm, (imm:i32):$SIMM)
    6576             : /*13576*/         /*SwitchType*/ 21, MVT::v2i32,// ->13599
    6577             : /*13578*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6578             : /*13580*/           OPC_EmitConvertToTarget, 2,
    6579             : /*13582*/           OPC_EmitInteger, MVT::i32, 14, 
    6580             : /*13585*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6581             : /*13588*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv2i32), 0,
    6582             :                         MVT::v2i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6583             :                     // Src: (add:v2i32 DPR:v2i32:$src1, (NEONvrshru:v2i32 DPR:v2i32:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6584             :                     // Dst: (VRSRAuv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vm, (imm:i32):$SIMM)
    6585             : /*13599*/         /*SwitchType*/ 21, MVT::v1i64,// ->13622
    6586             : /*13601*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6587             : /*13603*/           OPC_EmitConvertToTarget, 2,
    6588             : /*13605*/           OPC_EmitInteger, MVT::i32, 14, 
    6589             : /*13608*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6590             : /*13611*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv1i64), 0,
    6591             :                         MVT::v1i64, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6592             :                     // Src: (add:v1i64 DPR:v1i64:$src1, (NEONvrshru:v1i64 DPR:v1i64:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6593             :                     // Dst: (VRSRAuv1i64:v1i64 DPR:v1i64:$src1, DPR:v1i64:$Vm, (imm:i32):$SIMM)
    6594             : /*13622*/         /*SwitchType*/ 21, MVT::v16i8,// ->13645
    6595             : /*13624*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6596             : /*13626*/           OPC_EmitConvertToTarget, 2,
    6597             : /*13628*/           OPC_EmitInteger, MVT::i32, 14, 
    6598             : /*13631*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6599             : /*13634*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv16i8), 0,
    6600             :                         MVT::v16i8, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6601             :                     // Src: (add:v16i8 QPR:v16i8:$src1, (NEONvrshru:v16i8 QPR:v16i8:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6602             :                     // Dst: (VRSRAuv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vm, (imm:i32):$SIMM)
    6603             : /*13645*/         /*SwitchType*/ 21, MVT::v8i16,// ->13668
    6604             : /*13647*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6605             : /*13649*/           OPC_EmitConvertToTarget, 2,
    6606             : /*13651*/           OPC_EmitInteger, MVT::i32, 14, 
    6607             : /*13654*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6608             : /*13657*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv8i16), 0,
    6609             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6610             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (NEONvrshru:v8i16 QPR:v8i16:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6611             :                     // Dst: (VRSRAuv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vm, (imm:i32):$SIMM)
    6612             : /*13668*/         /*SwitchType*/ 21, MVT::v4i32,// ->13691
    6613             : /*13670*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6614             : /*13672*/           OPC_EmitConvertToTarget, 2,
    6615             : /*13674*/           OPC_EmitInteger, MVT::i32, 14, 
    6616             : /*13677*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6617             : /*13680*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv4i32), 0,
    6618             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6619             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (NEONvrshru:v4i32 QPR:v4i32:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6620             :                     // Dst: (VRSRAuv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vm, (imm:i32):$SIMM)
    6621             : /*13691*/         /*SwitchType*/ 21, MVT::v2i64,// ->13714
    6622             : /*13693*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6623             : /*13695*/           OPC_EmitConvertToTarget, 2,
    6624             : /*13697*/           OPC_EmitInteger, MVT::i32, 14, 
    6625             : /*13700*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6626             : /*13703*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv2i64), 0,
    6627             :                         MVT::v2i64, 5/*#Ops*/, 0, 1, 3, 4, 5, 
    6628             :                     // Src: (add:v2i64 QPR:v2i64:$src1, (NEONvrshru:v2i64 QPR:v2i64:$Vm, (imm:i32):$SIMM)) - Complexity = 9
    6629             :                     // Dst: (VRSRAuv2i64:v2i64 QPR:v2i64:$src1, QPR:v2i64:$Vm, (imm:i32):$SIMM)
    6630             : /*13714*/         0, // EndSwitchType
    6631             : /*13715*/       0, // EndSwitchOpcode
    6632             : /*13716*/     /*Scope*/ 31|128,6/*799*/, /*->14517*/
    6633             : /*13718*/       OPC_MoveChild0,
    6634             : /*13719*/       OPC_SwitchOpcode /*4 cases */, 67|128,1/*195*/, TARGET_VAL(ARMISD::VSHRs),// ->13919
    6635             : /*13724*/         OPC_RecordChild0, // #0 = $Vm
    6636             : /*13725*/         OPC_RecordChild1, // #1 = $SIMM
    6637             : /*13726*/         OPC_MoveChild1,
    6638             : /*13727*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6639             : /*13730*/         OPC_MoveParent,
    6640             : /*13731*/         OPC_MoveParent,
    6641             : /*13732*/         OPC_RecordChild1, // #2 = $src1
    6642             : /*13733*/         OPC_SwitchType /*8 cases */, 21, MVT::v8i8,// ->13757
    6643             : /*13736*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6644             : /*13738*/           OPC_EmitConvertToTarget, 1,
    6645             : /*13740*/           OPC_EmitInteger, MVT::i32, 14, 
    6646             : /*13743*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6647             : /*13746*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv8i8), 0,
    6648             :                         MVT::v8i8, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6649             :                     // Src: (add:v8i8 (NEONvshrs:v8i8 DPR:v8i8:$Vm, (imm:i32):$SIMM), DPR:v8i8:$src1) - Complexity = 9
    6650             :                     // Dst: (VSRAsv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vm, (imm:i32):$SIMM)
    6651             : /*13757*/         /*SwitchType*/ 21, MVT::v4i16,// ->13780
    6652             : /*13759*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6653             : /*13761*/           OPC_EmitConvertToTarget, 1,
    6654             : /*13763*/           OPC_EmitInteger, MVT::i32, 14, 
    6655             : /*13766*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6656             : /*13769*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv4i16), 0,
    6657             :                         MVT::v4i16, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6658             :                     // Src: (add:v4i16 (NEONvshrs:v4i16 DPR:v4i16:$Vm, (imm:i32):$SIMM), DPR:v4i16:$src1) - Complexity = 9
    6659             :                     // Dst: (VSRAsv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vm, (imm:i32):$SIMM)
    6660             : /*13780*/         /*SwitchType*/ 21, MVT::v2i32,// ->13803
    6661             : /*13782*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6662             : /*13784*/           OPC_EmitConvertToTarget, 1,
    6663             : /*13786*/           OPC_EmitInteger, MVT::i32, 14, 
    6664             : /*13789*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6665             : /*13792*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv2i32), 0,
    6666             :                         MVT::v2i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6667             :                     // Src: (add:v2i32 (NEONvshrs:v2i32 DPR:v2i32:$Vm, (imm:i32):$SIMM), DPR:v2i32:$src1) - Complexity = 9
    6668             :                     // Dst: (VSRAsv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vm, (imm:i32):$SIMM)
    6669             : /*13803*/         /*SwitchType*/ 21, MVT::v1i64,// ->13826
    6670             : /*13805*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6671             : /*13807*/           OPC_EmitConvertToTarget, 1,
    6672             : /*13809*/           OPC_EmitInteger, MVT::i32, 14, 
    6673             : /*13812*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6674             : /*13815*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv1i64), 0,
    6675             :                         MVT::v1i64, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6676             :                     // Src: (add:v1i64 (NEONvshrs:v1i64 DPR:v1i64:$Vm, (imm:i32):$SIMM), DPR:v1i64:$src1) - Complexity = 9
    6677             :                     // Dst: (VSRAsv1i64:v1i64 DPR:v1i64:$src1, DPR:v1i64:$Vm, (imm:i32):$SIMM)
    6678             : /*13826*/         /*SwitchType*/ 21, MVT::v16i8,// ->13849
    6679             : /*13828*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6680             : /*13830*/           OPC_EmitConvertToTarget, 1,
    6681             : /*13832*/           OPC_EmitInteger, MVT::i32, 14, 
    6682             : /*13835*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6683             : /*13838*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv16i8), 0,
    6684             :                         MVT::v16i8, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6685             :                     // Src: (add:v16i8 (NEONvshrs:v16i8 QPR:v16i8:$Vm, (imm:i32):$SIMM), QPR:v16i8:$src1) - Complexity = 9
    6686             :                     // Dst: (VSRAsv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vm, (imm:i32):$SIMM)
    6687             : /*13849*/         /*SwitchType*/ 21, MVT::v8i16,// ->13872
    6688             : /*13851*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6689             : /*13853*/           OPC_EmitConvertToTarget, 1,
    6690             : /*13855*/           OPC_EmitInteger, MVT::i32, 14, 
    6691             : /*13858*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6692             : /*13861*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv8i16), 0,
    6693             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6694             :                     // Src: (add:v8i16 (NEONvshrs:v8i16 QPR:v8i16:$Vm, (imm:i32):$SIMM), QPR:v8i16:$src1) - Complexity = 9
    6695             :                     // Dst: (VSRAsv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vm, (imm:i32):$SIMM)
    6696             : /*13872*/         /*SwitchType*/ 21, MVT::v4i32,// ->13895
    6697             : /*13874*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6698             : /*13876*/           OPC_EmitConvertToTarget, 1,
    6699             : /*13878*/           OPC_EmitInteger, MVT::i32, 14, 
    6700             : /*13881*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6701             : /*13884*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv4i32), 0,
    6702             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6703             :                     // Src: (add:v4i32 (NEONvshrs:v4i32 QPR:v4i32:$Vm, (imm:i32):$SIMM), QPR:v4i32:$src1) - Complexity = 9
    6704             :                     // Dst: (VSRAsv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vm, (imm:i32):$SIMM)
    6705             : /*13895*/         /*SwitchType*/ 21, MVT::v2i64,// ->13918
    6706             : /*13897*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6707             : /*13899*/           OPC_EmitConvertToTarget, 1,
    6708             : /*13901*/           OPC_EmitInteger, MVT::i32, 14, 
    6709             : /*13904*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6710             : /*13907*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAsv2i64), 0,
    6711             :                         MVT::v2i64, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6712             :                     // Src: (add:v2i64 (NEONvshrs:v2i64 QPR:v2i64:$Vm, (imm:i32):$SIMM), QPR:v2i64:$src1) - Complexity = 9
    6713             :                     // Dst: (VSRAsv2i64:v2i64 QPR:v2i64:$src1, QPR:v2i64:$Vm, (imm:i32):$SIMM)
    6714             : /*13918*/         0, // EndSwitchType
    6715             : /*13919*/       /*SwitchOpcode*/ 67|128,1/*195*/, TARGET_VAL(ARMISD::VSHRu),// ->14118
    6716             : /*13923*/         OPC_RecordChild0, // #0 = $Vm
    6717             : /*13924*/         OPC_RecordChild1, // #1 = $SIMM
    6718             : /*13925*/         OPC_MoveChild1,
    6719             : /*13926*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6720             : /*13929*/         OPC_MoveParent,
    6721             : /*13930*/         OPC_MoveParent,
    6722             : /*13931*/         OPC_RecordChild1, // #2 = $src1
    6723             : /*13932*/         OPC_SwitchType /*8 cases */, 21, MVT::v8i8,// ->13956
    6724             : /*13935*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6725             : /*13937*/           OPC_EmitConvertToTarget, 1,
    6726             : /*13939*/           OPC_EmitInteger, MVT::i32, 14, 
    6727             : /*13942*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6728             : /*13945*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv8i8), 0,
    6729             :                         MVT::v8i8, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6730             :                     // Src: (add:v8i8 (NEONvshru:v8i8 DPR:v8i8:$Vm, (imm:i32):$SIMM), DPR:v8i8:$src1) - Complexity = 9
    6731             :                     // Dst: (VSRAuv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vm, (imm:i32):$SIMM)
    6732             : /*13956*/         /*SwitchType*/ 21, MVT::v4i16,// ->13979
    6733             : /*13958*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6734             : /*13960*/           OPC_EmitConvertToTarget, 1,
    6735             : /*13962*/           OPC_EmitInteger, MVT::i32, 14, 
    6736             : /*13965*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6737             : /*13968*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv4i16), 0,
    6738             :                         MVT::v4i16, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6739             :                     // Src: (add:v4i16 (NEONvshru:v4i16 DPR:v4i16:$Vm, (imm:i32):$SIMM), DPR:v4i16:$src1) - Complexity = 9
    6740             :                     // Dst: (VSRAuv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vm, (imm:i32):$SIMM)
    6741             : /*13979*/         /*SwitchType*/ 21, MVT::v2i32,// ->14002
    6742             : /*13981*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6743             : /*13983*/           OPC_EmitConvertToTarget, 1,
    6744             : /*13985*/           OPC_EmitInteger, MVT::i32, 14, 
    6745             : /*13988*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6746             : /*13991*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv2i32), 0,
    6747             :                         MVT::v2i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6748             :                     // Src: (add:v2i32 (NEONvshru:v2i32 DPR:v2i32:$Vm, (imm:i32):$SIMM), DPR:v2i32:$src1) - Complexity = 9
    6749             :                     // Dst: (VSRAuv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vm, (imm:i32):$SIMM)
    6750             : /*14002*/         /*SwitchType*/ 21, MVT::v1i64,// ->14025
    6751             : /*14004*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6752             : /*14006*/           OPC_EmitConvertToTarget, 1,
    6753             : /*14008*/           OPC_EmitInteger, MVT::i32, 14, 
    6754             : /*14011*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6755             : /*14014*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv1i64), 0,
    6756             :                         MVT::v1i64, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6757             :                     // Src: (add:v1i64 (NEONvshru:v1i64 DPR:v1i64:$Vm, (imm:i32):$SIMM), DPR:v1i64:$src1) - Complexity = 9
    6758             :                     // Dst: (VSRAuv1i64:v1i64 DPR:v1i64:$src1, DPR:v1i64:$Vm, (imm:i32):$SIMM)
    6759             : /*14025*/         /*SwitchType*/ 21, MVT::v16i8,// ->14048
    6760             : /*14027*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6761             : /*14029*/           OPC_EmitConvertToTarget, 1,
    6762             : /*14031*/           OPC_EmitInteger, MVT::i32, 14, 
    6763             : /*14034*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6764             : /*14037*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv16i8), 0,
    6765             :                         MVT::v16i8, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6766             :                     // Src: (add:v16i8 (NEONvshru:v16i8 QPR:v16i8:$Vm, (imm:i32):$SIMM), QPR:v16i8:$src1) - Complexity = 9
    6767             :                     // Dst: (VSRAuv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vm, (imm:i32):$SIMM)
    6768             : /*14048*/         /*SwitchType*/ 21, MVT::v8i16,// ->14071
    6769             : /*14050*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6770             : /*14052*/           OPC_EmitConvertToTarget, 1,
    6771             : /*14054*/           OPC_EmitInteger, MVT::i32, 14, 
    6772             : /*14057*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6773             : /*14060*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv8i16), 0,
    6774             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6775             :                     // Src: (add:v8i16 (NEONvshru:v8i16 QPR:v8i16:$Vm, (imm:i32):$SIMM), QPR:v8i16:$src1) - Complexity = 9
    6776             :                     // Dst: (VSRAuv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vm, (imm:i32):$SIMM)
    6777             : /*14071*/         /*SwitchType*/ 21, MVT::v4i32,// ->14094
    6778             : /*14073*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6779             : /*14075*/           OPC_EmitConvertToTarget, 1,
    6780             : /*14077*/           OPC_EmitInteger, MVT::i32, 14, 
    6781             : /*14080*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6782             : /*14083*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv4i32), 0,
    6783             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6784             :                     // Src: (add:v4i32 (NEONvshru:v4i32 QPR:v4i32:$Vm, (imm:i32):$SIMM), QPR:v4i32:$src1) - Complexity = 9
    6785             :                     // Dst: (VSRAuv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vm, (imm:i32):$SIMM)
    6786             : /*14094*/         /*SwitchType*/ 21, MVT::v2i64,// ->14117
    6787             : /*14096*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6788             : /*14098*/           OPC_EmitConvertToTarget, 1,
    6789             : /*14100*/           OPC_EmitInteger, MVT::i32, 14, 
    6790             : /*14103*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6791             : /*14106*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VSRAuv2i64), 0,
    6792             :                         MVT::v2i64, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6793             :                     // Src: (add:v2i64 (NEONvshru:v2i64 QPR:v2i64:$Vm, (imm:i32):$SIMM), QPR:v2i64:$src1) - Complexity = 9
    6794             :                     // Dst: (VSRAuv2i64:v2i64 QPR:v2i64:$src1, QPR:v2i64:$Vm, (imm:i32):$SIMM)
    6795             : /*14117*/         0, // EndSwitchType
    6796             : /*14118*/       /*SwitchOpcode*/ 67|128,1/*195*/, TARGET_VAL(ARMISD::VRSHRs),// ->14317
    6797             : /*14122*/         OPC_RecordChild0, // #0 = $Vm
    6798             : /*14123*/         OPC_RecordChild1, // #1 = $SIMM
    6799             : /*14124*/         OPC_MoveChild1,
    6800             : /*14125*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6801             : /*14128*/         OPC_MoveParent,
    6802             : /*14129*/         OPC_MoveParent,
    6803             : /*14130*/         OPC_RecordChild1, // #2 = $src1
    6804             : /*14131*/         OPC_SwitchType /*8 cases */, 21, MVT::v8i8,// ->14155
    6805             : /*14134*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6806             : /*14136*/           OPC_EmitConvertToTarget, 1,
    6807             : /*14138*/           OPC_EmitInteger, MVT::i32, 14, 
    6808             : /*14141*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6809             : /*14144*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv8i8), 0,
    6810             :                         MVT::v8i8, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6811             :                     // Src: (add:v8i8 (NEONvrshrs:v8i8 DPR:v8i8:$Vm, (imm:i32):$SIMM), DPR:v8i8:$src1) - Complexity = 9
    6812             :                     // Dst: (VRSRAsv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vm, (imm:i32):$SIMM)
    6813             : /*14155*/         /*SwitchType*/ 21, MVT::v4i16,// ->14178
    6814             : /*14157*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6815             : /*14159*/           OPC_EmitConvertToTarget, 1,
    6816             : /*14161*/           OPC_EmitInteger, MVT::i32, 14, 
    6817             : /*14164*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6818             : /*14167*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv4i16), 0,
    6819             :                         MVT::v4i16, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6820             :                     // Src: (add:v4i16 (NEONvrshrs:v4i16 DPR:v4i16:$Vm, (imm:i32):$SIMM), DPR:v4i16:$src1) - Complexity = 9
    6821             :                     // Dst: (VRSRAsv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vm, (imm:i32):$SIMM)
    6822             : /*14178*/         /*SwitchType*/ 21, MVT::v2i32,// ->14201
    6823             : /*14180*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6824             : /*14182*/           OPC_EmitConvertToTarget, 1,
    6825             : /*14184*/           OPC_EmitInteger, MVT::i32, 14, 
    6826             : /*14187*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6827             : /*14190*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv2i32), 0,
    6828             :                         MVT::v2i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6829             :                     // Src: (add:v2i32 (NEONvrshrs:v2i32 DPR:v2i32:$Vm, (imm:i32):$SIMM), DPR:v2i32:$src1) - Complexity = 9
    6830             :                     // Dst: (VRSRAsv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vm, (imm:i32):$SIMM)
    6831             : /*14201*/         /*SwitchType*/ 21, MVT::v1i64,// ->14224
    6832             : /*14203*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6833             : /*14205*/           OPC_EmitConvertToTarget, 1,
    6834             : /*14207*/           OPC_EmitInteger, MVT::i32, 14, 
    6835             : /*14210*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6836             : /*14213*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv1i64), 0,
    6837             :                         MVT::v1i64, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6838             :                     // Src: (add:v1i64 (NEONvrshrs:v1i64 DPR:v1i64:$Vm, (imm:i32):$SIMM), DPR:v1i64:$src1) - Complexity = 9
    6839             :                     // Dst: (VRSRAsv1i64:v1i64 DPR:v1i64:$src1, DPR:v1i64:$Vm, (imm:i32):$SIMM)
    6840             : /*14224*/         /*SwitchType*/ 21, MVT::v16i8,// ->14247
    6841             : /*14226*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6842             : /*14228*/           OPC_EmitConvertToTarget, 1,
    6843             : /*14230*/           OPC_EmitInteger, MVT::i32, 14, 
    6844             : /*14233*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6845             : /*14236*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv16i8), 0,
    6846             :                         MVT::v16i8, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6847             :                     // Src: (add:v16i8 (NEONvrshrs:v16i8 QPR:v16i8:$Vm, (imm:i32):$SIMM), QPR:v16i8:$src1) - Complexity = 9
    6848             :                     // Dst: (VRSRAsv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vm, (imm:i32):$SIMM)
    6849             : /*14247*/         /*SwitchType*/ 21, MVT::v8i16,// ->14270
    6850             : /*14249*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6851             : /*14251*/           OPC_EmitConvertToTarget, 1,
    6852             : /*14253*/           OPC_EmitInteger, MVT::i32, 14, 
    6853             : /*14256*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6854             : /*14259*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv8i16), 0,
    6855             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6856             :                     // Src: (add:v8i16 (NEONvrshrs:v8i16 QPR:v8i16:$Vm, (imm:i32):$SIMM), QPR:v8i16:$src1) - Complexity = 9
    6857             :                     // Dst: (VRSRAsv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vm, (imm:i32):$SIMM)
    6858             : /*14270*/         /*SwitchType*/ 21, MVT::v4i32,// ->14293
    6859             : /*14272*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6860             : /*14274*/           OPC_EmitConvertToTarget, 1,
    6861             : /*14276*/           OPC_EmitInteger, MVT::i32, 14, 
    6862             : /*14279*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6863             : /*14282*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv4i32), 0,
    6864             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6865             :                     // Src: (add:v4i32 (NEONvrshrs:v4i32 QPR:v4i32:$Vm, (imm:i32):$SIMM), QPR:v4i32:$src1) - Complexity = 9
    6866             :                     // Dst: (VRSRAsv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vm, (imm:i32):$SIMM)
    6867             : /*14293*/         /*SwitchType*/ 21, MVT::v2i64,// ->14316
    6868             : /*14295*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6869             : /*14297*/           OPC_EmitConvertToTarget, 1,
    6870             : /*14299*/           OPC_EmitInteger, MVT::i32, 14, 
    6871             : /*14302*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6872             : /*14305*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAsv2i64), 0,
    6873             :                         MVT::v2i64, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6874             :                     // Src: (add:v2i64 (NEONvrshrs:v2i64 QPR:v2i64:$Vm, (imm:i32):$SIMM), QPR:v2i64:$src1) - Complexity = 9
    6875             :                     // Dst: (VRSRAsv2i64:v2i64 QPR:v2i64:$src1, QPR:v2i64:$Vm, (imm:i32):$SIMM)
    6876             : /*14316*/         0, // EndSwitchType
    6877             : /*14317*/       /*SwitchOpcode*/ 67|128,1/*195*/, TARGET_VAL(ARMISD::VRSHRu),// ->14516
    6878             : /*14321*/         OPC_RecordChild0, // #0 = $Vm
    6879             : /*14322*/         OPC_RecordChild1, // #1 = $SIMM
    6880             : /*14323*/         OPC_MoveChild1,
    6881             : /*14324*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6882             : /*14327*/         OPC_MoveParent,
    6883             : /*14328*/         OPC_MoveParent,
    6884             : /*14329*/         OPC_RecordChild1, // #2 = $src1
    6885             : /*14330*/         OPC_SwitchType /*8 cases */, 21, MVT::v8i8,// ->14354
    6886             : /*14333*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6887             : /*14335*/           OPC_EmitConvertToTarget, 1,
    6888             : /*14337*/           OPC_EmitInteger, MVT::i32, 14, 
    6889             : /*14340*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6890             : /*14343*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv8i8), 0,
    6891             :                         MVT::v8i8, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6892             :                     // Src: (add:v8i8 (NEONvrshru:v8i8 DPR:v8i8:$Vm, (imm:i32):$SIMM), DPR:v8i8:$src1) - Complexity = 9
    6893             :                     // Dst: (VRSRAuv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vm, (imm:i32):$SIMM)
    6894             : /*14354*/         /*SwitchType*/ 21, MVT::v4i16,// ->14377
    6895             : /*14356*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6896             : /*14358*/           OPC_EmitConvertToTarget, 1,
    6897             : /*14360*/           OPC_EmitInteger, MVT::i32, 14, 
    6898             : /*14363*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6899             : /*14366*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv4i16), 0,
    6900             :                         MVT::v4i16, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6901             :                     // Src: (add:v4i16 (NEONvrshru:v4i16 DPR:v4i16:$Vm, (imm:i32):$SIMM), DPR:v4i16:$src1) - Complexity = 9
    6902             :                     // Dst: (VRSRAuv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vm, (imm:i32):$SIMM)
    6903             : /*14377*/         /*SwitchType*/ 21, MVT::v2i32,// ->14400
    6904             : /*14379*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6905             : /*14381*/           OPC_EmitConvertToTarget, 1,
    6906             : /*14383*/           OPC_EmitInteger, MVT::i32, 14, 
    6907             : /*14386*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6908             : /*14389*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv2i32), 0,
    6909             :                         MVT::v2i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6910             :                     // Src: (add:v2i32 (NEONvrshru:v2i32 DPR:v2i32:$Vm, (imm:i32):$SIMM), DPR:v2i32:$src1) - Complexity = 9
    6911             :                     // Dst: (VRSRAuv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vm, (imm:i32):$SIMM)
    6912             : /*14400*/         /*SwitchType*/ 21, MVT::v1i64,// ->14423
    6913             : /*14402*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6914             : /*14404*/           OPC_EmitConvertToTarget, 1,
    6915             : /*14406*/           OPC_EmitInteger, MVT::i32, 14, 
    6916             : /*14409*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6917             : /*14412*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv1i64), 0,
    6918             :                         MVT::v1i64, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6919             :                     // Src: (add:v1i64 (NEONvrshru:v1i64 DPR:v1i64:$Vm, (imm:i32):$SIMM), DPR:v1i64:$src1) - Complexity = 9
    6920             :                     // Dst: (VRSRAuv1i64:v1i64 DPR:v1i64:$src1, DPR:v1i64:$Vm, (imm:i32):$SIMM)
    6921             : /*14423*/         /*SwitchType*/ 21, MVT::v16i8,// ->14446
    6922             : /*14425*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6923             : /*14427*/           OPC_EmitConvertToTarget, 1,
    6924             : /*14429*/           OPC_EmitInteger, MVT::i32, 14, 
    6925             : /*14432*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6926             : /*14435*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv16i8), 0,
    6927             :                         MVT::v16i8, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6928             :                     // Src: (add:v16i8 (NEONvrshru:v16i8 QPR:v16i8:$Vm, (imm:i32):$SIMM), QPR:v16i8:$src1) - Complexity = 9
    6929             :                     // Dst: (VRSRAuv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vm, (imm:i32):$SIMM)
    6930             : /*14446*/         /*SwitchType*/ 21, MVT::v8i16,// ->14469
    6931             : /*14448*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6932             : /*14450*/           OPC_EmitConvertToTarget, 1,
    6933             : /*14452*/           OPC_EmitInteger, MVT::i32, 14, 
    6934             : /*14455*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6935             : /*14458*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv8i16), 0,
    6936             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6937             :                     // Src: (add:v8i16 (NEONvrshru:v8i16 QPR:v8i16:$Vm, (imm:i32):$SIMM), QPR:v8i16:$src1) - Complexity = 9
    6938             :                     // Dst: (VRSRAuv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vm, (imm:i32):$SIMM)
    6939             : /*14469*/         /*SwitchType*/ 21, MVT::v4i32,// ->14492
    6940             : /*14471*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6941             : /*14473*/           OPC_EmitConvertToTarget, 1,
    6942             : /*14475*/           OPC_EmitInteger, MVT::i32, 14, 
    6943             : /*14478*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6944             : /*14481*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv4i32), 0,
    6945             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6946             :                     // Src: (add:v4i32 (NEONvrshru:v4i32 QPR:v4i32:$Vm, (imm:i32):$SIMM), QPR:v4i32:$src1) - Complexity = 9
    6947             :                     // Dst: (VRSRAuv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vm, (imm:i32):$SIMM)
    6948             : /*14492*/         /*SwitchType*/ 21, MVT::v2i64,// ->14515
    6949             : /*14494*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6950             : /*14496*/           OPC_EmitConvertToTarget, 1,
    6951             : /*14498*/           OPC_EmitInteger, MVT::i32, 14, 
    6952             : /*14501*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6953             : /*14504*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VRSRAuv2i64), 0,
    6954             :                         MVT::v2i64, 5/*#Ops*/, 2, 0, 3, 4, 5, 
    6955             :                     // Src: (add:v2i64 (NEONvrshru:v2i64 QPR:v2i64:$Vm, (imm:i32):$SIMM), QPR:v2i64:$src1) - Complexity = 9
    6956             :                     // Dst: (VRSRAuv2i64:v2i64 QPR:v2i64:$src1, QPR:v2i64:$Vm, (imm:i32):$SIMM)
    6957             : /*14515*/         0, // EndSwitchType
    6958             : /*14516*/       0, // EndSwitchOpcode
    6959             : /*14517*/     /*Scope*/ 57|128,3/*441*/, /*->14960*/
    6960             : /*14519*/       OPC_RecordChild0, // #0 = $Vn
    6961             : /*14520*/       OPC_MoveChild1,
    6962             : /*14521*/       OPC_SwitchOpcode /*5 cases */, 64, TARGET_VAL(ISD::SIGN_EXTEND),// ->14589
    6963             : /*14525*/         OPC_RecordChild0, // #1 = $Vm
    6964             : /*14526*/         OPC_MoveParent,
    6965             : /*14527*/         OPC_SwitchType /*3 cases */, 18, MVT::v8i16,// ->14548
    6966             : /*14530*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6967             : /*14532*/           OPC_EmitInteger, MVT::i32, 14, 
    6968             : /*14535*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6969             : /*14538*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWsv8i16), 0,
    6970             :                         MVT::v8i16, 4/*#Ops*/, 0, 1, 2, 3, 
    6971             :                     // Src: (add:v8i16 QPR:v8i16:$Vn, (sext:v8i16 DPR:v8i8:$Vm)) - Complexity = 6
    6972             :                     // Dst: (VADDWsv8i16:v8i16 QPR:v8i16:$Vn, DPR:v8i8:$Vm)
    6973             : /*14548*/         /*SwitchType*/ 18, MVT::v4i32,// ->14568
    6974             : /*14550*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6975             : /*14552*/           OPC_EmitInteger, MVT::i32, 14, 
    6976             : /*14555*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6977             : /*14558*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWsv4i32), 0,
    6978             :                         MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    6979             :                     // Src: (add:v4i32 QPR:v4i32:$Vn, (sext:v4i32 DPR:v4i16:$Vm)) - Complexity = 6
    6980             :                     // Dst: (VADDWsv4i32:v4i32 QPR:v4i32:$Vn, DPR:v4i16:$Vm)
    6981             : /*14568*/         /*SwitchType*/ 18, MVT::v2i64,// ->14588
    6982             : /*14570*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6983             : /*14572*/           OPC_EmitInteger, MVT::i32, 14, 
    6984             : /*14575*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6985             : /*14578*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWsv2i64), 0,
    6986             :                         MVT::v2i64, 4/*#Ops*/, 0, 1, 2, 3, 
    6987             :                     // Src: (add:v2i64 QPR:v2i64:$Vn, (sext:v2i64 DPR:v2i32:$Vm)) - Complexity = 6
    6988             :                     // Dst: (VADDWsv2i64:v2i64 QPR:v2i64:$Vn, DPR:v2i32:$Vm)
    6989             : /*14588*/         0, // EndSwitchType
    6990             : /*14589*/       /*SwitchOpcode*/ 64, TARGET_VAL(ISD::ZERO_EXTEND),// ->14656
    6991             : /*14592*/         OPC_RecordChild0, // #1 = $Vm
    6992             : /*14593*/         OPC_MoveParent,
    6993             : /*14594*/         OPC_SwitchType /*3 cases */, 18, MVT::v8i16,// ->14615
    6994             : /*14597*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    6995             : /*14599*/           OPC_EmitInteger, MVT::i32, 14, 
    6996             : /*14602*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    6997             : /*14605*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWuv8i16), 0,
    6998             :                         MVT::v8i16, 4/*#Ops*/, 0, 1, 2, 3, 
    6999             :                     // Src: (add:v8i16 QPR:v8i16:$Vn, (zext:v8i16 DPR:v8i8:$Vm)) - Complexity = 6
    7000             :                     // Dst: (VADDWuv8i16:v8i16 QPR:v8i16:$Vn, DPR:v8i8:$Vm)
    7001             : /*14615*/         /*SwitchType*/ 18, MVT::v4i32,// ->14635
    7002             : /*14617*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7003             : /*14619*/           OPC_EmitInteger, MVT::i32, 14, 
    7004             : /*14622*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7005             : /*14625*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWuv4i32), 0,
    7006             :                         MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7007             :                     // Src: (add:v4i32 QPR:v4i32:$Vn, (zext:v4i32 DPR:v4i16:$Vm)) - Complexity = 6
    7008             :                     // Dst: (VADDWuv4i32:v4i32 QPR:v4i32:$Vn, DPR:v4i16:$Vm)
    7009             : /*14635*/         /*SwitchType*/ 18, MVT::v2i64,// ->14655
    7010             : /*14637*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7011             : /*14639*/           OPC_EmitInteger, MVT::i32, 14, 
    7012             : /*14642*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7013             : /*14645*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWuv2i64), 0,
    7014             :                         MVT::v2i64, 4/*#Ops*/, 0, 1, 2, 3, 
    7015             :                     // Src: (add:v2i64 QPR:v2i64:$Vn, (zext:v2i64 DPR:v2i32:$Vm)) - Complexity = 6
    7016             :                     // Dst: (VADDWuv2i64:v2i64 QPR:v2i64:$Vn, DPR:v2i32:$Vm)
    7017             : /*14655*/         0, // EndSwitchType
    7018             : /*14656*/       /*SwitchOpcode*/ 3|128,1/*131*/, TARGET_VAL(ISD::MUL),// ->14791
    7019             : /*14660*/         OPC_RecordChild0, // #1 = $Vn
    7020             : /*14661*/         OPC_RecordChild1, // #2 = $Vm
    7021             : /*14662*/         OPC_MoveParent,
    7022             : /*14663*/         OPC_SwitchType /*6 cases */, 19, MVT::v8i8,// ->14685
    7023             : /*14666*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7024             : /*14668*/           OPC_EmitInteger, MVT::i32, 14, 
    7025             : /*14671*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7026             : /*14674*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv8i8), 0,
    7027             :                         MVT::v8i8, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7028             :                     // Src: (add:v8i8 DPR:v8i8:$src1, (mul:v8i8 DPR:v8i8:$Vn, DPR:v8i8:$Vm)) - Complexity = 6
    7029             :                     // Dst: (VMLAv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    7030             : /*14685*/         /*SwitchType*/ 19, MVT::v4i16,// ->14706
    7031             : /*14687*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7032             : /*14689*/           OPC_EmitInteger, MVT::i32, 14, 
    7033             : /*14692*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7034             : /*14695*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv4i16), 0,
    7035             :                         MVT::v4i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7036             :                     // Src: (add:v4i16 DPR:v4i16:$src1, (mul:v4i16 DPR:v4i16:$Vn, DPR:v4i16:$Vm)) - Complexity = 6
    7037             :                     // Dst: (VMLAv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    7038             : /*14706*/         /*SwitchType*/ 19, MVT::v2i32,// ->14727
    7039             : /*14708*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7040             : /*14710*/           OPC_EmitInteger, MVT::i32, 14, 
    7041             : /*14713*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7042             : /*14716*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv2i32), 0,
    7043             :                         MVT::v2i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7044             :                     // Src: (add:v2i32 DPR:v2i32:$src1, (mul:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)) - Complexity = 6
    7045             :                     // Dst: (VMLAv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    7046             : /*14727*/         /*SwitchType*/ 19, MVT::v16i8,// ->14748
    7047             : /*14729*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7048             : /*14731*/           OPC_EmitInteger, MVT::i32, 14, 
    7049             : /*14734*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7050             : /*14737*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv16i8), 0,
    7051             :                         MVT::v16i8, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7052             :                     // Src: (add:v16i8 QPR:v16i8:$src1, (mul:v16i8 QPR:v16i8:$Vn, QPR:v16i8:$Vm)) - Complexity = 6
    7053             :                     // Dst: (VMLAv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vn, QPR:v16i8:$Vm)
    7054             : /*14748*/         /*SwitchType*/ 19, MVT::v8i16,// ->14769
    7055             : /*14750*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7056             : /*14752*/           OPC_EmitInteger, MVT::i32, 14, 
    7057             : /*14755*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7058             : /*14758*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv8i16), 0,
    7059             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7060             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (mul:v8i16 QPR:v8i16:$Vn, QPR:v8i16:$Vm)) - Complexity = 6
    7061             :                     // Dst: (VMLAv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, QPR:v8i16:$Vm)
    7062             : /*14769*/         /*SwitchType*/ 19, MVT::v4i32,// ->14790
    7063             : /*14771*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7064             : /*14773*/           OPC_EmitInteger, MVT::i32, 14, 
    7065             : /*14776*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7066             : /*14779*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv4i32), 0,
    7067             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7068             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (mul:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)) - Complexity = 6
    7069             :                     // Dst: (VMLAv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    7070             : /*14790*/         0, // EndSwitchType
    7071             : /*14791*/       /*SwitchOpcode*/ 81, TARGET_VAL(ARMISD::VMULLs),// ->14875
    7072             : /*14794*/         OPC_RecordChild0, // #1 = $Vn
    7073             : /*14795*/         OPC_Scope, 25, /*->14822*/ // 3 children in Scope
    7074             : /*14797*/           OPC_CheckChild0Type, MVT::v8i8,
    7075             : /*14799*/           OPC_RecordChild1, // #2 = $Vm
    7076             : /*14800*/           OPC_MoveParent,
    7077             : /*14801*/           OPC_CheckType, MVT::v8i16,
    7078             : /*14803*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7079             : /*14805*/           OPC_EmitInteger, MVT::i32, 14, 
    7080             : /*14808*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7081             : /*14811*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsv8i16), 0,
    7082             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7083             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (NEONvmulls:v8i16 DPR:v8i8:$Vn, DPR:v8i8:$Vm)) - Complexity = 6
    7084             :                     // Dst: (VMLALsv8i16:v8i16 QPR:v8i16:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    7085             : /*14822*/         /*Scope*/ 25, /*->14848*/
    7086             : /*14823*/           OPC_CheckChild0Type, MVT::v4i16,
    7087             : /*14825*/           OPC_RecordChild1, // #2 = $Vm
    7088             : /*14826*/           OPC_MoveParent,
    7089             : /*14827*/           OPC_CheckType, MVT::v4i32,
    7090             : /*14829*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7091             : /*14831*/           OPC_EmitInteger, MVT::i32, 14, 
    7092             : /*14834*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7093             : /*14837*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsv4i32), 0,
    7094             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7095             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (NEONvmulls:v4i32 DPR:v4i16:$Vn, DPR:v4i16:$Vm)) - Complexity = 6
    7096             :                     // Dst: (VMLALsv4i32:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    7097             : /*14848*/         /*Scope*/ 25, /*->14874*/
    7098             : /*14849*/           OPC_CheckChild0Type, MVT::v2i32,
    7099             : /*14851*/           OPC_RecordChild1, // #2 = $Vm
    7100             : /*14852*/           OPC_MoveParent,
    7101             : /*14853*/           OPC_CheckType, MVT::v2i64,
    7102             : /*14855*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7103             : /*14857*/           OPC_EmitInteger, MVT::i32, 14, 
    7104             : /*14860*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7105             : /*14863*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsv2i64), 0,
    7106             :                         MVT::v2i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7107             :                     // Src: (add:v2i64 QPR:v2i64:$src1, (NEONvmulls:v2i64 DPR:v2i32:$Vn, DPR:v2i32:$Vm)) - Complexity = 6
    7108             :                     // Dst: (VMLALsv2i64:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    7109             : /*14874*/         0, /*End of Scope*/
    7110             : /*14875*/       /*SwitchOpcode*/ 81, TARGET_VAL(ARMISD::VMULLu),// ->14959
    7111             : /*14878*/         OPC_RecordChild0, // #1 = $Vn
    7112             : /*14879*/         OPC_Scope, 25, /*->14906*/ // 3 children in Scope
    7113             : /*14881*/           OPC_CheckChild0Type, MVT::v8i8,
    7114             : /*14883*/           OPC_RecordChild1, // #2 = $Vm
    7115             : /*14884*/           OPC_MoveParent,
    7116             : /*14885*/           OPC_CheckType, MVT::v8i16,
    7117             : /*14887*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7118             : /*14889*/           OPC_EmitInteger, MVT::i32, 14, 
    7119             : /*14892*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7120             : /*14895*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALuv8i16), 0,
    7121             :                         MVT::v8i16, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7122             :                     // Src: (add:v8i16 QPR:v8i16:$src1, (NEONvmullu:v8i16 DPR:v8i8:$Vn, DPR:v8i8:$Vm)) - Complexity = 6
    7123             :                     // Dst: (VMLALuv8i16:v8i16 QPR:v8i16:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    7124             : /*14906*/         /*Scope*/ 25, /*->14932*/
    7125             : /*14907*/           OPC_CheckChild0Type, MVT::v4i16,
    7126             : /*14909*/           OPC_RecordChild1, // #2 = $Vm
    7127             : /*14910*/           OPC_MoveParent,
    7128             : /*14911*/           OPC_CheckType, MVT::v4i32,
    7129             : /*14913*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7130             : /*14915*/           OPC_EmitInteger, MVT::i32, 14, 
    7131             : /*14918*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7132             : /*14921*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALuv4i32), 0,
    7133             :                         MVT::v4i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7134             :                     // Src: (add:v4i32 QPR:v4i32:$src1, (NEONvmullu:v4i32 DPR:v4i16:$Vn, DPR:v4i16:$Vm)) - Complexity = 6
    7135             :                     // Dst: (VMLALuv4i32:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    7136             : /*14932*/         /*Scope*/ 25, /*->14958*/
    7137             : /*14933*/           OPC_CheckChild0Type, MVT::v2i32,
    7138             : /*14935*/           OPC_RecordChild1, // #2 = $Vm
    7139             : /*14936*/           OPC_MoveParent,
    7140             : /*14937*/           OPC_CheckType, MVT::v2i64,
    7141             : /*14939*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7142             : /*14941*/           OPC_EmitInteger, MVT::i32, 14, 
    7143             : /*14944*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7144             : /*14947*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALuv2i64), 0,
    7145             :                         MVT::v2i64, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    7146             :                     // Src: (add:v2i64 QPR:v2i64:$src1, (NEONvmullu:v2i64 DPR:v2i32:$Vn, DPR:v2i32:$Vm)) - Complexity = 6
    7147             :                     // Dst: (VMLALuv2i64:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    7148             : /*14958*/         0, /*End of Scope*/
    7149             : /*14959*/       0, // EndSwitchOpcode
    7150             : /*14960*/     /*Scope*/ 65|128,3/*449*/, /*->15411*/
    7151             : /*14962*/       OPC_MoveChild0,
    7152             : /*14963*/       OPC_SwitchOpcode /*5 cases */, 65, TARGET_VAL(ISD::SIGN_EXTEND),// ->15032
    7153             : /*14967*/         OPC_RecordChild0, // #0 = $Vm
    7154             : /*14968*/         OPC_MoveParent,
    7155             : /*14969*/         OPC_RecordChild1, // #1 = $Vn
    7156             : /*14970*/         OPC_SwitchType /*3 cases */, 18, MVT::v8i16,// ->14991
    7157             : /*14973*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7158             : /*14975*/           OPC_EmitInteger, MVT::i32, 14, 
    7159             : /*14978*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7160             : /*14981*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWsv8i16), 0,
    7161             :                         MVT::v8i16, 4/*#Ops*/, 1, 0, 2, 3, 
    7162             :                     // Src: (add:v8i16 (sext:v8i16 DPR:v8i8:$Vm), QPR:v8i16:$Vn) - Complexity = 6
    7163             :                     // Dst: (VADDWsv8i16:v8i16 QPR:v8i16:$Vn, DPR:v8i8:$Vm)
    7164             : /*14991*/         /*SwitchType*/ 18, MVT::v4i32,// ->15011
    7165             : /*14993*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7166             : /*14995*/           OPC_EmitInteger, MVT::i32, 14, 
    7167             : /*14998*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7168             : /*15001*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWsv4i32), 0,
    7169             :                         MVT::v4i32, 4/*#Ops*/, 1, 0, 2, 3, 
    7170             :                     // Src: (add:v4i32 (sext:v4i32 DPR:v4i16:$Vm), QPR:v4i32:$Vn) - Complexity = 6
    7171             :                     // Dst: (VADDWsv4i32:v4i32 QPR:v4i32:$Vn, DPR:v4i16:$Vm)
    7172             : /*15011*/         /*SwitchType*/ 18, MVT::v2i64,// ->15031
    7173             : /*15013*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7174             : /*15015*/           OPC_EmitInteger, MVT::i32, 14, 
    7175             : /*15018*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7176             : /*15021*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWsv2i64), 0,
    7177             :                         MVT::v2i64, 4/*#Ops*/, 1, 0, 2, 3, 
    7178             :                     // Src: (add:v2i64 (sext:v2i64 DPR:v2i32:$Vm), QPR:v2i64:$Vn) - Complexity = 6
    7179             :                     // Dst: (VADDWsv2i64:v2i64 QPR:v2i64:$Vn, DPR:v2i32:$Vm)
    7180             : /*15031*/         0, // EndSwitchType
    7181             : /*15032*/       /*SwitchOpcode*/ 65, TARGET_VAL(ISD::ZERO_EXTEND),// ->15100
    7182             : /*15035*/         OPC_RecordChild0, // #0 = $Vm
    7183             : /*15036*/         OPC_MoveParent,
    7184             : /*15037*/         OPC_RecordChild1, // #1 = $Vn
    7185             : /*15038*/         OPC_SwitchType /*3 cases */, 18, MVT::v8i16,// ->15059
    7186             : /*15041*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7187             : /*15043*/           OPC_EmitInteger, MVT::i32, 14, 
    7188             : /*15046*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7189             : /*15049*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWuv8i16), 0,
    7190             :                         MVT::v8i16, 4/*#Ops*/, 1, 0, 2, 3, 
    7191             :                     // Src: (add:v8i16 (zext:v8i16 DPR:v8i8:$Vm), QPR:v8i16:$Vn) - Complexity = 6
    7192             :                     // Dst: (VADDWuv8i16:v8i16 QPR:v8i16:$Vn, DPR:v8i8:$Vm)
    7193             : /*15059*/         /*SwitchType*/ 18, MVT::v4i32,// ->15079
    7194             : /*15061*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7195             : /*15063*/           OPC_EmitInteger, MVT::i32, 14, 
    7196             : /*15066*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7197             : /*15069*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWuv4i32), 0,
    7198             :                         MVT::v4i32, 4/*#Ops*/, 1, 0, 2, 3, 
    7199             :                     // Src: (add:v4i32 (zext:v4i32 DPR:v4i16:$Vm), QPR:v4i32:$Vn) - Complexity = 6
    7200             :                     // Dst: (VADDWuv4i32:v4i32 QPR:v4i32:$Vn, DPR:v4i16:$Vm)
    7201             : /*15079*/         /*SwitchType*/ 18, MVT::v2i64,// ->15099
    7202             : /*15081*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7203             : /*15083*/           OPC_EmitInteger, MVT::i32, 14, 
    7204             : /*15086*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7205             : /*15089*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDWuv2i64), 0,
    7206             :                         MVT::v2i64, 4/*#Ops*/, 1, 0, 2, 3, 
    7207             :                     // Src: (add:v2i64 (zext:v2i64 DPR:v2i32:$Vm), QPR:v2i64:$Vn) - Complexity = 6
    7208             :                     // Dst: (VADDWuv2i64:v2i64 QPR:v2i64:$Vn, DPR:v2i32:$Vm)
    7209             : /*15099*/         0, // EndSwitchType
    7210             : /*15100*/       /*SwitchOpcode*/ 4|128,1/*132*/, TARGET_VAL(ISD::MUL),// ->15236
    7211             : /*15104*/         OPC_RecordChild0, // #0 = $Vn
    7212             : /*15105*/         OPC_RecordChild1, // #1 = $Vm
    7213             : /*15106*/         OPC_MoveParent,
    7214             : /*15107*/         OPC_RecordChild1, // #2 = $src1
    7215             : /*15108*/         OPC_SwitchType /*6 cases */, 19, MVT::v8i8,// ->15130
    7216             : /*15111*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7217             : /*15113*/           OPC_EmitInteger, MVT::i32, 14, 
    7218             : /*15116*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7219             : /*15119*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv8i8), 0,
    7220             :                         MVT::v8i8, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7221             :                     // Src: (add:v8i8 (mul:v8i8 DPR:v8i8:$Vn, DPR:v8i8:$Vm), DPR:v8i8:$src1) - Complexity = 6
    7222             :                     // Dst: (VMLAv8i8:v8i8 DPR:v8i8:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    7223             : /*15130*/         /*SwitchType*/ 19, MVT::v4i16,// ->15151
    7224             : /*15132*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7225             : /*15134*/           OPC_EmitInteger, MVT::i32, 14, 
    7226             : /*15137*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7227             : /*15140*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv4i16), 0,
    7228             :                         MVT::v4i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7229             :                     // Src: (add:v4i16 (mul:v4i16 DPR:v4i16:$Vn, DPR:v4i16:$Vm), DPR:v4i16:$src1) - Complexity = 6
    7230             :                     // Dst: (VMLAv4i16:v4i16 DPR:v4i16:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    7231             : /*15151*/         /*SwitchType*/ 19, MVT::v2i32,// ->15172
    7232             : /*15153*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7233             : /*15155*/           OPC_EmitInteger, MVT::i32, 14, 
    7234             : /*15158*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7235             : /*15161*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv2i32), 0,
    7236             :                         MVT::v2i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7237             :                     // Src: (add:v2i32 (mul:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm), DPR:v2i32:$src1) - Complexity = 6
    7238             :                     // Dst: (VMLAv2i32:v2i32 DPR:v2i32:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    7239             : /*15172*/         /*SwitchType*/ 19, MVT::v16i8,// ->15193
    7240             : /*15174*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7241             : /*15176*/           OPC_EmitInteger, MVT::i32, 14, 
    7242             : /*15179*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7243             : /*15182*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv16i8), 0,
    7244             :                         MVT::v16i8, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7245             :                     // Src: (add:v16i8 (mul:v16i8 QPR:v16i8:$Vn, QPR:v16i8:$Vm), QPR:v16i8:$src1) - Complexity = 6
    7246             :                     // Dst: (VMLAv16i8:v16i8 QPR:v16i8:$src1, QPR:v16i8:$Vn, QPR:v16i8:$Vm)
    7247             : /*15193*/         /*SwitchType*/ 19, MVT::v8i16,// ->15214
    7248             : /*15195*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7249             : /*15197*/           OPC_EmitInteger, MVT::i32, 14, 
    7250             : /*15200*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7251             : /*15203*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv8i16), 0,
    7252             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7253             :                     // Src: (add:v8i16 (mul:v8i16 QPR:v8i16:$Vn, QPR:v8i16:$Vm), QPR:v8i16:$src1) - Complexity = 6
    7254             :                     // Dst: (VMLAv8i16:v8i16 QPR:v8i16:$src1, QPR:v8i16:$Vn, QPR:v8i16:$Vm)
    7255             : /*15214*/         /*SwitchType*/ 19, MVT::v4i32,// ->15235
    7256             : /*15216*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7257             : /*15218*/           OPC_EmitInteger, MVT::i32, 14, 
    7258             : /*15221*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7259             : /*15224*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLAv4i32), 0,
    7260             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7261             :                     // Src: (add:v4i32 (mul:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm), QPR:v4i32:$src1) - Complexity = 6
    7262             :                     // Dst: (VMLAv4i32:v4i32 QPR:v4i32:$src1, QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    7263             : /*15235*/         0, // EndSwitchType
    7264             : /*15236*/       /*SwitchOpcode*/ 84, TARGET_VAL(ARMISD::VMULLs),// ->15323
    7265             : /*15239*/         OPC_RecordChild0, // #0 = $Vn
    7266             : /*15240*/         OPC_Scope, 26, /*->15268*/ // 3 children in Scope
    7267             : /*15242*/           OPC_CheckChild0Type, MVT::v8i8,
    7268             : /*15244*/           OPC_RecordChild1, // #1 = $Vm
    7269             : /*15245*/           OPC_MoveParent,
    7270             : /*15246*/           OPC_RecordChild1, // #2 = $src1
    7271             : /*15247*/           OPC_CheckType, MVT::v8i16,
    7272             : /*15249*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7273             : /*15251*/           OPC_EmitInteger, MVT::i32, 14, 
    7274             : /*15254*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7275             : /*15257*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsv8i16), 0,
    7276             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7277             :                     // Src: (add:v8i16 (NEONvmulls:v8i16 DPR:v8i8:$Vn, DPR:v8i8:$Vm), QPR:v8i16:$src1) - Complexity = 6
    7278             :                     // Dst: (VMLALsv8i16:v8i16 QPR:v8i16:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    7279             : /*15268*/         /*Scope*/ 26, /*->15295*/
    7280             : /*15269*/           OPC_CheckChild0Type, MVT::v4i16,
    7281             : /*15271*/           OPC_RecordChild1, // #1 = $Vm
    7282             : /*15272*/           OPC_MoveParent,
    7283             : /*15273*/           OPC_RecordChild1, // #2 = $src1
    7284             : /*15274*/           OPC_CheckType, MVT::v4i32,
    7285             : /*15276*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7286             : /*15278*/           OPC_EmitInteger, MVT::i32, 14, 
    7287             : /*15281*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7288             : /*15284*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsv4i32), 0,
    7289             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7290             :                     // Src: (add:v4i32 (NEONvmulls:v4i32 DPR:v4i16:$Vn, DPR:v4i16:$Vm), QPR:v4i32:$src1) - Complexity = 6
    7291             :                     // Dst: (VMLALsv4i32:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    7292             : /*15295*/         /*Scope*/ 26, /*->15322*/
    7293             : /*15296*/           OPC_CheckChild0Type, MVT::v2i32,
    7294             : /*15298*/           OPC_RecordChild1, // #1 = $Vm
    7295             : /*15299*/           OPC_MoveParent,
    7296             : /*15300*/           OPC_RecordChild1, // #2 = $src1
    7297             : /*15301*/           OPC_CheckType, MVT::v2i64,
    7298             : /*15303*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7299             : /*15305*/           OPC_EmitInteger, MVT::i32, 14, 
    7300             : /*15308*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7301             : /*15311*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALsv2i64), 0,
    7302             :                         MVT::v2i64, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7303             :                     // Src: (add:v2i64 (NEONvmulls:v2i64 DPR:v2i32:$Vn, DPR:v2i32:$Vm), QPR:v2i64:$src1) - Complexity = 6
    7304             :                     // Dst: (VMLALsv2i64:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    7305             : /*15322*/         0, /*End of Scope*/
    7306             : /*15323*/       /*SwitchOpcode*/ 84, TARGET_VAL(ARMISD::VMULLu),// ->15410
    7307             : /*15326*/         OPC_RecordChild0, // #0 = $Vn
    7308             : /*15327*/         OPC_Scope, 26, /*->15355*/ // 3 children in Scope
    7309             : /*15329*/           OPC_CheckChild0Type, MVT::v8i8,
    7310             : /*15331*/           OPC_RecordChild1, // #1 = $Vm
    7311             : /*15332*/           OPC_MoveParent,
    7312             : /*15333*/           OPC_RecordChild1, // #2 = $src1
    7313             : /*15334*/           OPC_CheckType, MVT::v8i16,
    7314             : /*15336*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7315             : /*15338*/           OPC_EmitInteger, MVT::i32, 14, 
    7316             : /*15341*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7317             : /*15344*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALuv8i16), 0,
    7318             :                         MVT::v8i16, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7319             :                     // Src: (add:v8i16 (NEONvmullu:v8i16 DPR:v8i8:$Vn, DPR:v8i8:$Vm), QPR:v8i16:$src1) - Complexity = 6
    7320             :                     // Dst: (VMLALuv8i16:v8i16 QPR:v8i16:$src1, DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    7321             : /*15355*/         /*Scope*/ 26, /*->15382*/
    7322             : /*15356*/           OPC_CheckChild0Type, MVT::v4i16,
    7323             : /*15358*/           OPC_RecordChild1, // #1 = $Vm
    7324             : /*15359*/           OPC_MoveParent,
    7325             : /*15360*/           OPC_RecordChild1, // #2 = $src1
    7326             : /*15361*/           OPC_CheckType, MVT::v4i32,
    7327             : /*15363*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7328             : /*15365*/           OPC_EmitInteger, MVT::i32, 14, 
    7329             : /*15368*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7330             : /*15371*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALuv4i32), 0,
    7331             :                         MVT::v4i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7332             :                     // Src: (add:v4i32 (NEONvmullu:v4i32 DPR:v4i16:$Vn, DPR:v4i16:$Vm), QPR:v4i32:$src1) - Complexity = 6
    7333             :                     // Dst: (VMLALuv4i32:v4i32 QPR:v4i32:$src1, DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    7334             : /*15382*/         /*Scope*/ 26, /*->15409*/
    7335             : /*15383*/           OPC_CheckChild0Type, MVT::v2i32,
    7336             : /*15385*/           OPC_RecordChild1, // #1 = $Vm
    7337             : /*15386*/           OPC_MoveParent,
    7338             : /*15387*/           OPC_RecordChild1, // #2 = $src1
    7339             : /*15388*/           OPC_CheckType, MVT::v2i64,
    7340             : /*15390*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7341             : /*15392*/           OPC_EmitInteger, MVT::i32, 14, 
    7342             : /*15395*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7343             : /*15398*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VMLALuv2i64), 0,
    7344             :                         MVT::v2i64, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    7345             :                     // Src: (add:v2i64 (NEONvmullu:v2i64 DPR:v2i32:$Vn, DPR:v2i32:$Vm), QPR:v2i64:$src1) - Complexity = 6
    7346             :                     // Dst: (VMLALuv2i64:v2i64 QPR:v2i64:$src1, DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    7347             : /*15409*/         0, /*End of Scope*/
    7348             : /*15410*/       0, // EndSwitchOpcode
    7349             : /*15411*/     /*Scope*/ 36|128,1/*164*/, /*->15577*/
    7350             : /*15413*/       OPC_RecordChild0, // #0 = $Vn
    7351             : /*15414*/       OPC_RecordChild1, // #1 = $Vm
    7352             : /*15415*/       OPC_SwitchType /*8 cases */, 18, MVT::v8i8,// ->15436
    7353             : /*15418*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7354             : /*15420*/         OPC_EmitInteger, MVT::i32, 14, 
    7355             : /*15423*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7356             : /*15426*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDv8i8), 0,
    7357             :                       MVT::v8i8, 4/*#Ops*/, 0, 1, 2, 3, 
    7358             :                   // Src: (add:v8i8 DPR:v8i8:$Vn, DPR:v8i8:$Vm) - Complexity = 3
    7359             :                   // Dst: (VADDv8i8:v8i8 DPR:v8i8:$Vn, DPR:v8i8:$Vm)
    7360             : /*15436*/       /*SwitchType*/ 18, MVT::v4i16,// ->15456
    7361             : /*15438*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7362             : /*15440*/         OPC_EmitInteger, MVT::i32, 14, 
    7363             : /*15443*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7364             : /*15446*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDv4i16), 0,
    7365             :                       MVT::v4i16, 4/*#Ops*/, 0, 1, 2, 3, 
    7366             :                   // Src: (add:v4i16 DPR:v4i16:$Vn, DPR:v4i16:$Vm) - Complexity = 3
    7367             :                   // Dst: (VADDv4i16:v4i16 DPR:v4i16:$Vn, DPR:v4i16:$Vm)
    7368             : /*15456*/       /*SwitchType*/ 18, MVT::v2i32,// ->15476
    7369             : /*15458*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7370             : /*15460*/         OPC_EmitInteger, MVT::i32, 14, 
    7371             : /*15463*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7372             : /*15466*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDv2i32), 0,
    7373             :                       MVT::v2i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7374             :                   // Src: (add:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm) - Complexity = 3
    7375             :                   // Dst: (VADDv2i32:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    7376             : /*15476*/       /*SwitchType*/ 18, MVT::v16i8,// ->15496
    7377             : /*15478*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7378             : /*15480*/         OPC_EmitInteger, MVT::i32, 14, 
    7379             : /*15483*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7380             : /*15486*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDv16i8), 0,
    7381             :                       MVT::v16i8, 4/*#Ops*/, 0, 1, 2, 3, 
    7382             :                   // Src: (add:v16i8 QPR:v16i8:$Vn, QPR:v16i8:$Vm) - Complexity = 3
    7383             :                   // Dst: (VADDv16i8:v16i8 QPR:v16i8:$Vn, QPR:v16i8:$Vm)
    7384             : /*15496*/       /*SwitchType*/ 18, MVT::v8i16,// ->15516
    7385             : /*15498*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7386             : /*15500*/         OPC_EmitInteger, MVT::i32, 14, 
    7387             : /*15503*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7388             : /*15506*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDv8i16), 0,
    7389             :                       MVT::v8i16, 4/*#Ops*/, 0, 1, 2, 3, 
    7390             :                   // Src: (add:v8i16 QPR:v8i16:$Vn, QPR:v8i16:$Vm) - Complexity = 3
    7391             :                   // Dst: (VADDv8i16:v8i16 QPR:v8i16:$Vn, QPR:v8i16:$Vm)
    7392             : /*15516*/       /*SwitchType*/ 18, MVT::v4i32,// ->15536
    7393             : /*15518*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7394             : /*15520*/         OPC_EmitInteger, MVT::i32, 14, 
    7395             : /*15523*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7396             : /*15526*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDv4i32), 0,
    7397             :                       MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7398             :                   // Src: (add:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm) - Complexity = 3
    7399             :                   // Dst: (VADDv4i32:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    7400             : /*15536*/       /*SwitchType*/ 18, MVT::v1i64,// ->15556
    7401             : /*15538*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7402             : /*15540*/         OPC_EmitInteger, MVT::i32, 14, 
    7403             : /*15543*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7404             : /*15546*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDv1i64), 0,
    7405             :                       MVT::v1i64, 4/*#Ops*/, 0, 1, 2, 3, 
    7406             :                   // Src: (add:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vm) - Complexity = 3
    7407             :                   // Dst: (VADDv1i64:v1i64 DPR:v1i64:$Vn, DPR:v1i64:$Vm)
    7408             : /*15556*/       /*SwitchType*/ 18, MVT::v2i64,// ->15576
    7409             : /*15558*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    7410             : /*15560*/         OPC_EmitInteger, MVT::i32, 14, 
    7411             : /*15563*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7412             : /*15566*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VADDv2i64), 0,
    7413             :                       MVT::v2i64, 4/*#Ops*/, 0, 1, 2, 3, 
    7414             :                   // Src: (add:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vm) - Complexity = 3
    7415             :                   // Dst: (VADDv2i64:v2i64 QPR:v2i64:$Vn, QPR:v2i64:$Vm)
    7416             : /*15576*/       0, // EndSwitchType
    7417             : /*15577*/     0, /*End of Scope*/
    7418             : /*15578*/   /*SwitchOpcode*/ 37|128,19/*2469*/, TARGET_VAL(ISD::AND),// ->18051
    7419             : /*15582*/     OPC_Scope, 63, /*->15647*/ // 35 children in Scope
    7420             : /*15584*/       OPC_CheckAndImm, 127|128,1|128,124|128,7/*16711935*/, 
    7421             : /*15589*/       OPC_MoveChild0,
    7422             : /*15590*/       OPC_CheckOpcode, TARGET_VAL(ISD::SRL),
    7423             : /*15593*/       OPC_RecordChild0, // #0 = $Src
    7424             : /*15594*/       OPC_CheckChild1Integer, 8, 
    7425             : /*15596*/       OPC_CheckChild1Type, MVT::i32,
    7426             : /*15598*/       OPC_MoveParent,
    7427             : /*15599*/       OPC_CheckType, MVT::i32,
    7428             : /*15601*/       OPC_Scope, 21, /*->15624*/ // 2 children in Scope
    7429             : /*15603*/         OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    7430             : /*15605*/         OPC_EmitInteger, MVT::i32, 1, 
    7431             : /*15608*/         OPC_EmitInteger, MVT::i32, 14, 
    7432             : /*15611*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7433             : /*15614*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTB16), 0,
    7434             :                       MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7435             :                   // Src: (and:i32 (srl:i32 GPR:i32:$Src, 8:i32), 16711935:i32) - Complexity = 32
    7436             :                   // Dst: (UXTB16:i32 GPR:i32:$Src, 1:i32)
    7437             : /*15624*/       /*Scope*/ 21, /*->15646*/
    7438             : /*15625*/         OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    7439             : /*15627*/         OPC_EmitInteger, MVT::i32, 1, 
    7440             : /*15630*/         OPC_EmitInteger, MVT::i32, 14, 
    7441             : /*15633*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7442             : /*15636*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTB16), 0,
    7443             :                       MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7444             :                   // Src: (and:i32 (srl:i32 rGPR:i32:$Src, 8:i32), 16711935:i32) - Complexity = 32
    7445             :                   // Dst: (t2UXTB16:i32 rGPR:i32:$Src, 1:i32)
    7446             : /*15646*/       0, /*End of Scope*/
    7447             : /*15647*/     /*Scope*/ 44, /*->15692*/
    7448             : /*15648*/       OPC_CheckAndImm, 127|128,1/*255*/, 
    7449             : /*15651*/       OPC_MoveChild0,
    7450             : /*15652*/       OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    7451             : /*15655*/       OPC_RecordChild0, // #0 = $Rm
    7452             : /*15656*/       OPC_RecordChild1, // #1 = $rot
    7453             : /*15657*/       OPC_MoveChild1,
    7454             : /*15658*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7455             : /*15661*/       OPC_CheckPredicate, 10, // Predicate_rot_imm
    7456             : /*15663*/       OPC_CheckType, MVT::i32,
    7457             : /*15665*/       OPC_MoveParent,
    7458             : /*15666*/       OPC_MoveParent,
    7459             : /*15667*/       OPC_CheckType, MVT::i32,
    7460             : /*15669*/       OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    7461             : /*15671*/       OPC_EmitConvertToTarget, 1,
    7462             : /*15673*/       OPC_EmitNodeXForm, 2, 2, // rot_imm_XFORM
    7463             : /*15676*/       OPC_EmitInteger, MVT::i32, 14, 
    7464             : /*15679*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7465             : /*15682*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTB), 0,
    7466             :                     MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
    7467             :                 // Src: (and:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32) - Complexity = 31
    7468             :                 // Dst: (UXTB:i32 GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    7469             : /*15692*/     /*Scope*/ 45, /*->15738*/
    7470             : /*15693*/       OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    7471             : /*15697*/       OPC_MoveChild0,
    7472             : /*15698*/       OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    7473             : /*15701*/       OPC_RecordChild0, // #0 = $Rm
    7474             : /*15702*/       OPC_RecordChild1, // #1 = $rot
    7475             : /*15703*/       OPC_MoveChild1,
    7476             : /*15704*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7477             : /*15707*/       OPC_CheckPredicate, 10, // Predicate_rot_imm
    7478             : /*15709*/       OPC_CheckType, MVT::i32,
    7479             : /*15711*/       OPC_MoveParent,
    7480             : /*15712*/       OPC_MoveParent,
    7481             : /*15713*/       OPC_CheckType, MVT::i32,
    7482             : /*15715*/       OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    7483             : /*15717*/       OPC_EmitConvertToTarget, 1,
    7484             : /*15719*/       OPC_EmitNodeXForm, 2, 2, // rot_imm_XFORM
    7485             : /*15722*/       OPC_EmitInteger, MVT::i32, 14, 
    7486             : /*15725*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7487             : /*15728*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTH), 0,
    7488             :                     MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
    7489             :                 // Src: (and:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 65535:i32) - Complexity = 31
    7490             :                 // Dst: (UXTH:i32 GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    7491             : /*15738*/     /*Scope*/ 46, /*->15785*/
    7492             : /*15739*/       OPC_CheckAndImm, 127|128,1|128,124|128,7/*16711935*/, 
    7493             : /*15744*/       OPC_MoveChild0,
    7494             : /*15745*/       OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    7495             : /*15748*/       OPC_RecordChild0, // #0 = $Rm
    7496             : /*15749*/       OPC_RecordChild1, // #1 = $rot
    7497             : /*15750*/       OPC_MoveChild1,
    7498             : /*15751*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7499             : /*15754*/       OPC_CheckPredicate, 10, // Predicate_rot_imm
    7500             : /*15756*/       OPC_CheckType, MVT::i32,
    7501             : /*15758*/       OPC_MoveParent,
    7502             : /*15759*/       OPC_MoveParent,
    7503             : /*15760*/       OPC_CheckType, MVT::i32,
    7504             : /*15762*/       OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    7505             : /*15764*/       OPC_EmitConvertToTarget, 1,
    7506             : /*15766*/       OPC_EmitNodeXForm, 2, 2, // rot_imm_XFORM
    7507             : /*15769*/       OPC_EmitInteger, MVT::i32, 14, 
    7508             : /*15772*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7509             : /*15775*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTB16), 0,
    7510             :                     MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
    7511             :                 // Src: (and:i32 (rotr:i32 GPRnopc:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 16711935:i32) - Complexity = 31
    7512             :                 // Dst: (UXTB16:i32 GPRnopc:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32):$rot))
    7513             : /*15785*/     /*Scope*/ 44, /*->15830*/
    7514             : /*15786*/       OPC_CheckAndImm, 127|128,1/*255*/, 
    7515             : /*15789*/       OPC_MoveChild0,
    7516             : /*15790*/       OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    7517             : /*15793*/       OPC_RecordChild0, // #0 = $Rm
    7518             : /*15794*/       OPC_RecordChild1, // #1 = $rot
    7519             : /*15795*/       OPC_MoveChild1,
    7520             : /*15796*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7521             : /*15799*/       OPC_CheckPredicate, 10, // Predicate_rot_imm
    7522             : /*15801*/       OPC_CheckType, MVT::i32,
    7523             : /*15803*/       OPC_MoveParent,
    7524             : /*15804*/       OPC_MoveParent,
    7525             : /*15805*/       OPC_CheckType, MVT::i32,
    7526             : /*15807*/       OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    7527             : /*15809*/       OPC_EmitConvertToTarget, 1,
    7528             : /*15811*/       OPC_EmitNodeXForm, 2, 2, // rot_imm_XFORM
    7529             : /*15814*/       OPC_EmitInteger, MVT::i32, 14, 
    7530             : /*15817*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7531             : /*15820*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTB), 0,
    7532             :                     MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
    7533             :                 // Src: (and:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 255:i32) - Complexity = 31
    7534             :                 // Dst: (t2UXTB:i32 rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    7535             : /*15830*/     /*Scope*/ 45, /*->15876*/
    7536             : /*15831*/       OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    7537             : /*15835*/       OPC_MoveChild0,
    7538             : /*15836*/       OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    7539             : /*15839*/       OPC_RecordChild0, // #0 = $Rm
    7540             : /*15840*/       OPC_RecordChild1, // #1 = $rot
    7541             : /*15841*/       OPC_MoveChild1,
    7542             : /*15842*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7543             : /*15845*/       OPC_CheckPredicate, 10, // Predicate_rot_imm
    7544             : /*15847*/       OPC_CheckType, MVT::i32,
    7545             : /*15849*/       OPC_MoveParent,
    7546             : /*15850*/       OPC_MoveParent,
    7547             : /*15851*/       OPC_CheckType, MVT::i32,
    7548             : /*15853*/       OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    7549             : /*15855*/       OPC_EmitConvertToTarget, 1,
    7550             : /*15857*/       OPC_EmitNodeXForm, 2, 2, // rot_imm_XFORM
    7551             : /*15860*/       OPC_EmitInteger, MVT::i32, 14, 
    7552             : /*15863*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7553             : /*15866*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTH), 0,
    7554             :                     MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
    7555             :                 // Src: (and:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 65535:i32) - Complexity = 31
    7556             :                 // Dst: (t2UXTH:i32 rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    7557             : /*15876*/     /*Scope*/ 46, /*->15923*/
    7558             : /*15877*/       OPC_CheckAndImm, 127|128,1|128,124|128,7/*16711935*/, 
    7559             : /*15882*/       OPC_MoveChild0,
    7560             : /*15883*/       OPC_CheckOpcode, TARGET_VAL(ISD::ROTR),
    7561             : /*15886*/       OPC_RecordChild0, // #0 = $Rm
    7562             : /*15887*/       OPC_RecordChild1, // #1 = $rot
    7563             : /*15888*/       OPC_MoveChild1,
    7564             : /*15889*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7565             : /*15892*/       OPC_CheckPredicate, 10, // Predicate_rot_imm
    7566             : /*15894*/       OPC_CheckType, MVT::i32,
    7567             : /*15896*/       OPC_MoveParent,
    7568             : /*15897*/       OPC_MoveParent,
    7569             : /*15898*/       OPC_CheckType, MVT::i32,
    7570             : /*15900*/       OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    7571             : /*15902*/       OPC_EmitConvertToTarget, 1,
    7572             : /*15904*/       OPC_EmitNodeXForm, 2, 2, // rot_imm_XFORM
    7573             : /*15907*/       OPC_EmitInteger, MVT::i32, 14, 
    7574             : /*15910*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7575             : /*15913*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTB16), 0,
    7576             :                     MVT::i32, 4/*#Ops*/, 0, 3, 4, 5, 
    7577             :                 // Src: (and:i32 (rotr:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_rot_imm>><<X:rot_imm_XFORM>>:$rot), 16711935:i32) - Complexity = 31
    7578             :                 // Dst: (t2UXTB16:i32 rGPR:i32:$Rm, (rot_imm_XFORM:i32 (imm:i32)<<P:Predicate_rot_imm>>:$rot))
    7579             : /*15923*/     /*Scope*/ 27, /*->15951*/
    7580             : /*15924*/       OPC_CheckAndImm, 127|128,1/*255*/, 
    7581             : /*15927*/       OPC_RecordChild0, // #0 = $Src
    7582             : /*15928*/       OPC_CheckType, MVT::i32,
    7583             : /*15930*/       OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    7584             : /*15932*/       OPC_EmitInteger, MVT::i32, 0, 
    7585             : /*15935*/       OPC_EmitInteger, MVT::i32, 14, 
    7586             : /*15938*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7587             : /*15941*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTB), 0,
    7588             :                     MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7589             :                 // Src: (and:i32 GPR:i32:$Src, 255:i32) - Complexity = 24
    7590             :                 // Dst: (UXTB:i32 GPR:i32:$Src, 0:i32)
    7591             : /*15951*/     /*Scope*/ 28, /*->15980*/
    7592             : /*15952*/       OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    7593             : /*15956*/       OPC_RecordChild0, // #0 = $Src
    7594             : /*15957*/       OPC_CheckType, MVT::i32,
    7595             : /*15959*/       OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    7596             : /*15961*/       OPC_EmitInteger, MVT::i32, 0, 
    7597             : /*15964*/       OPC_EmitInteger, MVT::i32, 14, 
    7598             : /*15967*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7599             : /*15970*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTH), 0,
    7600             :                     MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7601             :                 // Src: (and:i32 GPR:i32:$Src, 65535:i32) - Complexity = 24
    7602             :                 // Dst: (UXTH:i32 GPR:i32:$Src, 0:i32)
    7603             : /*15980*/     /*Scope*/ 29, /*->16010*/
    7604             : /*15981*/       OPC_CheckAndImm, 127|128,1|128,124|128,7/*16711935*/, 
    7605             : /*15986*/       OPC_RecordChild0, // #0 = $Src
    7606             : /*15987*/       OPC_CheckType, MVT::i32,
    7607             : /*15989*/       OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    7608             : /*15991*/       OPC_EmitInteger, MVT::i32, 0, 
    7609             : /*15994*/       OPC_EmitInteger, MVT::i32, 14, 
    7610             : /*15997*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7611             : /*16000*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::UXTB16), 0,
    7612             :                     MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7613             :                 // Src: (and:i32 GPR:i32:$Src, 16711935:i32) - Complexity = 24
    7614             :                 // Dst: (UXTB16:i32 GPR:i32:$Src, 0:i32)
    7615             : /*16010*/     /*Scope*/ 27, /*->16038*/
    7616             : /*16011*/       OPC_CheckAndImm, 127|128,1/*255*/, 
    7617             : /*16014*/       OPC_RecordChild0, // #0 = $Rm
    7618             : /*16015*/       OPC_CheckType, MVT::i32,
    7619             : /*16017*/       OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    7620             : /*16019*/       OPC_EmitInteger, MVT::i32, 0, 
    7621             : /*16022*/       OPC_EmitInteger, MVT::i32, 14, 
    7622             : /*16025*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7623             : /*16028*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTB), 0,
    7624             :                     MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7625             :                 // Src: (and:i32 rGPR:i32:$Rm, 255:i32) - Complexity = 24
    7626             :                 // Dst: (t2UXTB:i32 rGPR:i32:$Rm, 0:i32)
    7627             : /*16038*/     /*Scope*/ 28, /*->16067*/
    7628             : /*16039*/       OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    7629             : /*16043*/       OPC_RecordChild0, // #0 = $Rm
    7630             : /*16044*/       OPC_CheckType, MVT::i32,
    7631             : /*16046*/       OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    7632             : /*16048*/       OPC_EmitInteger, MVT::i32, 0, 
    7633             : /*16051*/       OPC_EmitInteger, MVT::i32, 14, 
    7634             : /*16054*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7635             : /*16057*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTH), 0,
    7636             :                     MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7637             :                 // Src: (and:i32 rGPR:i32:$Rm, 65535:i32) - Complexity = 24
    7638             :                 // Dst: (t2UXTH:i32 rGPR:i32:$Rm, 0:i32)
    7639             : /*16067*/     /*Scope*/ 29, /*->16097*/
    7640             : /*16068*/       OPC_CheckAndImm, 127|128,1|128,124|128,7/*16711935*/, 
    7641             : /*16073*/       OPC_RecordChild0, // #0 = $Rm
    7642             : /*16074*/       OPC_CheckType, MVT::i32,
    7643             : /*16076*/       OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
    7644             : /*16078*/       OPC_EmitInteger, MVT::i32, 0, 
    7645             : /*16081*/       OPC_EmitInteger, MVT::i32, 14, 
    7646             : /*16084*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7647             : /*16087*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2UXTB16), 0,
    7648             :                     MVT::i32, 4/*#Ops*/, 0, 1, 2, 3, 
    7649             :                 // Src: (and:i32 rGPR:i32:$Rm, 16711935:i32) - Complexity = 24
    7650             :                 // Dst: (t2UXTB16:i32 rGPR:i32:$Rm, 0:i32)
    7651             : /*16097*/     /*Scope*/ 47, /*->16145*/
    7652             : /*16098*/       OPC_RecordChild0, // #0 = $Rn
    7653             : /*16099*/       OPC_MoveChild1,
    7654             : /*16100*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7655             : /*16103*/       OPC_RecordChild0, // #1 = $shift
    7656             : /*16104*/       OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7657             : /*16115*/       OPC_MoveParent,
    7658             : /*16116*/       OPC_CheckType, MVT::i32,
    7659             : /*16118*/       OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7660             : /*16120*/       OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectRegShifterOperand:$shift #2 #3 #4
    7661             : /*16123*/       OPC_EmitInteger, MVT::i32, 14, 
    7662             : /*16126*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7663             : /*16129*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7664             : /*16132*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::BICrsr), 0,
    7665             :                     MVT::i32, 7/*#Ops*/, 0, 2, 3, 4, 5, 6, 7, 
    7666             :                 // Src: (and:i32 GPR:i32:$Rn, (xor:i32 so_reg_reg:i32:$shift, -1:i32)) - Complexity = 23
    7667             :                 // Dst: (BICrsr:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift)
    7668             : /*16145*/     /*Scope*/ 39, /*->16185*/
    7669             : /*16146*/       OPC_CheckAndImm, 127|128,1/*255*/, 
    7670             : /*16149*/       OPC_MoveChild0,
    7671             : /*16150*/       OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
    7672             : /*16153*/       OPC_RecordNode, // #0 = 'intrinsic_w_chain' chained node
    7673             : /*16154*/       OPC_CheckFoldableChainNode,
    7674             : /*16155*/       OPC_CheckChild1Integer, 73|128,4/*585*/, 
    7675             : /*16158*/       OPC_RecordChild2, // #1 = $addr
    7676             : /*16159*/       OPC_CheckChild2Type, MVT::i32,
    7677             : /*16161*/       OPC_CheckPredicate, 23, // Predicate_ldrex_1
    7678             : /*16163*/       OPC_MoveParent,
    7679             : /*16164*/       OPC_CheckPatternPredicate, 5, // (Subtarget->hasV8MBaselineOps()) && (Subtarget->isThumb())
    7680             : /*16166*/       OPC_CheckComplexPat, /*CP*/3, /*#*/1, // SelectAddrOffsetNone:$addr #2
    7681             : /*16169*/       OPC_EmitMergeInputChains1_0,
    7682             : /*16170*/       OPC_EmitInteger, MVT::i32, 14, 
    7683             : /*16173*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7684             : /*16176*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2LDREXB), 0|OPFL_Chain,
    7685             :                     MVT::i32, 3/*#Ops*/, 2, 3, 4, 
    7686             :                 // Src: (and:i32 (intrinsic_w_chain:i32 585:iPTR, addr_offset_none:i32:$addr)<<P:Predicate_ldrex_1>>, 255:i32) - Complexity = 23
    7687             :                 // Dst: (t2LDREXB:i32 addr_offset_none:i32:$addr)
    7688             : /*16185*/     /*Scope*/ 40, /*->16226*/
    7689             : /*16186*/       OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    7690             : /*16190*/       OPC_MoveChild0,
    7691             : /*16191*/       OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
    7692             : /*16194*/       OPC_RecordNode, // #0 = 'intrinsic_w_chain' chained node
    7693             : /*16195*/       OPC_CheckFoldableChainNode,
    7694             : /*16196*/       OPC_CheckChild1Integer, 73|128,4/*585*/, 
    7695             : /*16199*/       OPC_RecordChild2, // #1 = $addr
    7696             : /*16200*/       OPC_CheckChild2Type, MVT::i32,
    7697             : /*16202*/       OPC_CheckPredicate, 24, // Predicate_ldrex_2
    7698             : /*16204*/       OPC_MoveParent,
    7699             : /*16205*/       OPC_CheckPatternPredicate, 5, // (Subtarget->hasV8MBaselineOps()) && (Subtarget->isThumb())
    7700             : /*16207*/       OPC_CheckComplexPat, /*CP*/3, /*#*/1, // SelectAddrOffsetNone:$addr #2
    7701             : /*16210*/       OPC_EmitMergeInputChains1_0,
    7702             : /*16211*/       OPC_EmitInteger, MVT::i32, 14, 
    7703             : /*16214*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7704             : /*16217*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2LDREXH), 0|OPFL_Chain,
    7705             :                     MVT::i32, 3/*#Ops*/, 2, 3, 4, 
    7706             :                 // Src: (and:i32 (intrinsic_w_chain:i32 585:iPTR, addr_offset_none:i32:$addr)<<P:Predicate_ldrex_2>>, 65535:i32) - Complexity = 23
    7707             :                 // Dst: (t2LDREXH:i32 addr_offset_none:i32:$addr)
    7708             : /*16226*/     /*Scope*/ 39, /*->16266*/
    7709             : /*16227*/       OPC_CheckAndImm, 127|128,1/*255*/, 
    7710             : /*16230*/       OPC_MoveChild0,
    7711             : /*16231*/       OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
    7712             : /*16234*/       OPC_RecordNode, // #0 = 'intrinsic_w_chain' chained node
    7713             : /*16235*/       OPC_CheckFoldableChainNode,
    7714             : /*16236*/       OPC_CheckChild1Integer, 67|128,4/*579*/, 
    7715             : /*16239*/       OPC_RecordChild2, // #1 = $addr
    7716             : /*16240*/       OPC_CheckChild2Type, MVT::i32,
    7717             : /*16242*/       OPC_CheckPredicate, 23, // Predicate_ldaex_1
    7718             : /*16244*/       OPC_MoveParent,
    7719             : /*16245*/       OPC_CheckPatternPredicate, 13, // (Subtarget->hasAcquireRelease()) && (Subtarget->hasV7Clrex()) && (Subtarget->isThumb())
    7720             : /*16247*/       OPC_CheckComplexPat, /*CP*/3, /*#*/1, // SelectAddrOffsetNone:$addr #2
    7721             : /*16250*/       OPC_EmitMergeInputChains1_0,
    7722             : /*16251*/       OPC_EmitInteger, MVT::i32, 14, 
    7723             : /*16254*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7724             : /*16257*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2LDAEXB), 0|OPFL_Chain,
    7725             :                     MVT::i32, 3/*#Ops*/, 2, 3, 4, 
    7726             :                 // Src: (and:i32 (intrinsic_w_chain:i32 579:iPTR, addr_offset_none:i32:$addr)<<P:Predicate_ldaex_1>>, 255:i32) - Complexity = 23
    7727             :                 // Dst: (t2LDAEXB:i32 addr_offset_none:i32:$addr)
    7728             : /*16266*/     /*Scope*/ 40, /*->16307*/
    7729             : /*16267*/       OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    7730             : /*16271*/       OPC_MoveChild0,
    7731             : /*16272*/       OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),
    7732             : /*16275*/       OPC_RecordNode, // #0 = 'intrinsic_w_chain' chained node
    7733             : /*16276*/       OPC_CheckFoldableChainNode,
    7734             : /*16277*/       OPC_CheckChild1Integer, 67|128,4/*579*/, 
    7735             : /*16280*/       OPC_RecordChild2, // #1 = $addr
    7736             : /*16281*/       OPC_CheckChild2Type, MVT::i32,
    7737             : /*16283*/       OPC_CheckPredicate, 24, // Predicate_ldaex_2
    7738             : /*16285*/       OPC_MoveParent,
    7739             : /*16286*/       OPC_CheckPatternPredicate, 13, // (Subtarget->hasAcquireRelease()) && (Subtarget->hasV7Clrex()) && (Subtarget->isThumb())
    7740             : /*16288*/       OPC_CheckComplexPat, /*CP*/3, /*#*/1, // SelectAddrOffsetNone:$addr #2
    7741             : /*16291*/       OPC_EmitMergeInputChains1_0,
    7742             : /*16292*/       OPC_EmitInteger, MVT::i32, 14, 
    7743             : /*16295*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7744             : /*16298*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2LDAEXH), 0|OPFL_Chain,
    7745             :                     MVT::i32, 3/*#Ops*/, 2, 3, 4, 
    7746             :                 // Src: (and:i32 (intrinsic_w_chain:i32 579:iPTR, addr_offset_none:i32:$addr)<<P:Predicate_ldaex_2>>, 65535:i32) - Complexity = 23
    7747             :                 // Dst: (t2LDAEXH:i32 addr_offset_none:i32:$addr)
    7748             : /*16307*/     /*Scope*/ 47, /*->16355*/
    7749             : /*16308*/       OPC_MoveChild0,
    7750             : /*16309*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7751             : /*16312*/       OPC_RecordChild0, // #0 = $shift
    7752             : /*16313*/       OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7753             : /*16324*/       OPC_MoveParent,
    7754             : /*16325*/       OPC_RecordChild1, // #1 = $Rn
    7755             : /*16326*/       OPC_CheckType, MVT::i32,
    7756             : /*16328*/       OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7757             : /*16330*/       OPC_CheckComplexPat, /*CP*/1, /*#*/0, // SelectRegShifterOperand:$shift #2 #3 #4
    7758             : /*16333*/       OPC_EmitInteger, MVT::i32, 14, 
    7759             : /*16336*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7760             : /*16339*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7761             : /*16342*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::BICrsr), 0,
    7762             :                     MVT::i32, 7/*#Ops*/, 1, 2, 3, 4, 5, 6, 7, 
    7763             :                 // Src: (and:i32 (xor:i32 so_reg_reg:i32:$shift, -1:i32), GPR:i32:$Rn) - Complexity = 23
    7764             :                 // Dst: (BICrsr:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift)
    7765             : /*16355*/     /*Scope*/ 76, /*->16432*/
    7766             : /*16356*/       OPC_RecordChild0, // #0 = $Rn
    7767             : /*16357*/       OPC_MoveChild1,
    7768             : /*16358*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7769             : /*16361*/       OPC_RecordChild0, // #1 = $shift
    7770             : /*16362*/       OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7771             : /*16373*/       OPC_MoveParent,
    7772             : /*16374*/       OPC_CheckType, MVT::i32,
    7773             : /*16376*/       OPC_Scope, 26, /*->16404*/ // 2 children in Scope
    7774             : /*16378*/         OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7775             : /*16380*/         OPC_CheckComplexPat, /*CP*/2, /*#*/1, // SelectImmShifterOperand:$shift #2 #3
    7776             : /*16383*/         OPC_EmitInteger, MVT::i32, 14, 
    7777             : /*16386*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7778             : /*16389*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7779             : /*16392*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::BICrsi), 0,
    7780             :                       MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
    7781             :                   // Src: (and:i32 GPR:i32:$Rn, (xor:i32 so_reg_imm:i32:$shift, -1:i32)) - Complexity = 20
    7782             :                   // Dst: (BICrsi:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift)
    7783             : /*16404*/       /*Scope*/ 26, /*->16431*/
    7784             : /*16405*/         OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    7785             : /*16407*/         OPC_CheckComplexPat, /*CP*/0, /*#*/1, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
    7786             : /*16410*/         OPC_EmitInteger, MVT::i32, 14, 
    7787             : /*16413*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7788             : /*16416*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7789             : /*16419*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICrs), 0,
    7790             :                       MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
    7791             :                   // Src: (and:i32 rGPR:i32:$Rn, (xor:i32 t2_so_reg:i32:$ShiftedRm, -1:i32)) - Complexity = 20
    7792             :                   // Dst: (t2BICrs:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
    7793             : /*16431*/       0, /*End of Scope*/
    7794             : /*16432*/     /*Scope*/ 76, /*->16509*/
    7795             : /*16433*/       OPC_MoveChild0,
    7796             : /*16434*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7797             : /*16437*/       OPC_RecordChild0, // #0 = $shift
    7798             : /*16438*/       OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7799             : /*16449*/       OPC_MoveParent,
    7800             : /*16450*/       OPC_RecordChild1, // #1 = $Rn
    7801             : /*16451*/       OPC_CheckType, MVT::i32,
    7802             : /*16453*/       OPC_Scope, 26, /*->16481*/ // 2 children in Scope
    7803             : /*16455*/         OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7804             : /*16457*/         OPC_CheckComplexPat, /*CP*/2, /*#*/0, // SelectImmShifterOperand:$shift #2 #3
    7805             : /*16460*/         OPC_EmitInteger, MVT::i32, 14, 
    7806             : /*16463*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7807             : /*16466*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7808             : /*16469*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::BICrsi), 0,
    7809             :                       MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
    7810             :                   // Src: (and:i32 (xor:i32 so_reg_imm:i32:$shift, -1:i32), GPR:i32:$Rn) - Complexity = 20
    7811             :                   // Dst: (BICrsi:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift)
    7812             : /*16481*/       /*Scope*/ 26, /*->16508*/
    7813             : /*16482*/         OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    7814             : /*16484*/         OPC_CheckComplexPat, /*CP*/0, /*#*/0, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
    7815             : /*16487*/         OPC_EmitInteger, MVT::i32, 14, 
    7816             : /*16490*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7817             : /*16493*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7818             : /*16496*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICrs), 0,
    7819             :                       MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
    7820             :                   // Src: (and:i32 (xor:i32 t2_so_reg:i32:$ShiftedRm, -1:i32), rGPR:i32:$Rn) - Complexity = 20
    7821             :                   // Dst: (t2BICrs:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
    7822             : /*16508*/       0, /*End of Scope*/
    7823             : /*16509*/     /*Scope*/ 84|128,1/*212*/, /*->16723*/
    7824             : /*16511*/       OPC_RecordChild0, // #0 = $Rn
    7825             : /*16512*/       OPC_Scope, 30, /*->16544*/ // 4 children in Scope
    7826             : /*16514*/         OPC_RecordChild1, // #1 = $shift
    7827             : /*16515*/         OPC_CheckType, MVT::i32,
    7828             : /*16517*/         OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7829             : /*16519*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectRegShifterOperand:$shift #2 #3 #4
    7830             : /*16522*/         OPC_EmitInteger, MVT::i32, 14, 
    7831             : /*16525*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7832             : /*16528*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7833             : /*16531*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::ANDrsr), 0,
    7834             :                       MVT::i32, 7/*#Ops*/, 0, 2, 3, 4, 5, 6, 7, 
    7835             :                   // Src: (and:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift) - Complexity = 15
    7836             :                   // Dst: (ANDrsr:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift)
    7837             : /*16544*/       /*Scope*/ 95, /*->16640*/
    7838             : /*16545*/         OPC_MoveChild1,
    7839             : /*16546*/         OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7840             : /*16549*/         OPC_RecordChild0, // #1 = $imm
    7841             : /*16550*/         OPC_MoveChild0,
    7842             : /*16551*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7843             : /*16554*/         OPC_Scope, 41, /*->16597*/ // 2 children in Scope
    7844             : /*16556*/           OPC_CheckPredicate, 7, // Predicate_mod_imm
    7845             : /*16558*/           OPC_MoveParent,
    7846             : /*16559*/           OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7847             : /*16570*/           OPC_MoveParent,
    7848             : /*16571*/           OPC_CheckType, MVT::i32,
    7849             : /*16573*/           OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7850             : /*16575*/           OPC_EmitConvertToTarget, 1,
    7851             : /*16577*/           OPC_EmitInteger, MVT::i32, 14, 
    7852             : /*16580*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7853             : /*16583*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7854             : /*16586*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::BICri), 0,
    7855             :                         MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
    7856             :                     // Src: (and:i32 GPR:i32:$Rn, (xor:i32 (imm:i32)<<P:Predicate_mod_imm>>:$imm, -1:i32)) - Complexity = 15
    7857             :                     // Dst: (BICri:i32 GPR:i32:$Rn, (imm:i32):$imm)
    7858             : /*16597*/         /*Scope*/ 41, /*->16639*/
    7859             : /*16598*/           OPC_CheckPredicate, 6, // Predicate_t2_so_imm
    7860             : /*16600*/           OPC_MoveParent,
    7861             : /*16601*/           OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7862             : /*16612*/           OPC_MoveParent,
    7863             : /*16613*/           OPC_CheckType, MVT::i32,
    7864             : /*16615*/           OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    7865             : /*16617*/           OPC_EmitConvertToTarget, 1,
    7866             : /*16619*/           OPC_EmitInteger, MVT::i32, 14, 
    7867             : /*16622*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7868             : /*16625*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7869             : /*16628*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICri), 0,
    7870             :                         MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
    7871             :                     // Src: (and:i32 rGPR:i32:$Rn, (xor:i32 (imm:i32)<<P:Predicate_t2_so_imm>>:$imm, -1:i32)) - Complexity = 15
    7872             :                     // Dst: (t2BICri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
    7873             : /*16639*/         0, /*End of Scope*/
    7874             : /*16640*/       /*Scope*/ 30, /*->16671*/
    7875             : /*16641*/         OPC_RecordChild1, // #1 = $Rn
    7876             : /*16642*/         OPC_CheckType, MVT::i32,
    7877             : /*16644*/         OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7878             : /*16646*/         OPC_CheckComplexPat, /*CP*/1, /*#*/0, // SelectRegShifterOperand:$shift #2 #3 #4
    7879             : /*16649*/         OPC_EmitInteger, MVT::i32, 14, 
    7880             : /*16652*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7881             : /*16655*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7882             : /*16658*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::ANDrsr), 0,
    7883             :                       MVT::i32, 7/*#Ops*/, 1, 2, 3, 4, 5, 6, 7, 
    7884             :                   // Src: (and:i32 so_reg_reg:i32:$shift, GPR:i32:$Rn) - Complexity = 15
    7885             :                   // Dst: (ANDrsr:i32 GPR:i32:$Rn, so_reg_reg:i32:$shift)
    7886             : /*16671*/       /*Scope*/ 50, /*->16722*/
    7887             : /*16672*/         OPC_MoveChild1,
    7888             : /*16673*/         OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7889             : /*16676*/         OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7890             : /*16687*/         OPC_RecordChild1, // #1 = $imm
    7891             : /*16688*/         OPC_MoveChild1,
    7892             : /*16689*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7893             : /*16692*/         OPC_CheckPredicate, 7, // Predicate_mod_imm
    7894             : /*16694*/         OPC_MoveParent,
    7895             : /*16695*/         OPC_MoveParent,
    7896             : /*16696*/         OPC_CheckType, MVT::i32,
    7897             : /*16698*/         OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7898             : /*16700*/         OPC_EmitConvertToTarget, 1,
    7899             : /*16702*/         OPC_EmitInteger, MVT::i32, 14, 
    7900             : /*16705*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7901             : /*16708*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7902             : /*16711*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::BICri), 0,
    7903             :                       MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
    7904             :                   // Src: (and:i32 GPR:i32:$Rn, (xor:i32 -1:i32, (imm:i32)<<P:Predicate_mod_imm>>:$imm)) - Complexity = 15
    7905             :                   // Dst: (BICri:i32 GPR:i32:$Rn, (imm:i32):$imm)
    7906             : /*16722*/       0, /*End of Scope*/
    7907             : /*16723*/     /*Scope*/ 102, /*->16826*/
    7908             : /*16724*/       OPC_MoveChild0,
    7909             : /*16725*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7910             : /*16728*/       OPC_Scope, 47, /*->16777*/ // 2 children in Scope
    7911             : /*16730*/         OPC_RecordChild0, // #0 = $imm
    7912             : /*16731*/         OPC_MoveChild0,
    7913             : /*16732*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7914             : /*16735*/         OPC_CheckPredicate, 7, // Predicate_mod_imm
    7915             : /*16737*/         OPC_MoveParent,
    7916             : /*16738*/         OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7917             : /*16749*/         OPC_MoveParent,
    7918             : /*16750*/         OPC_RecordChild1, // #1 = $Rn
    7919             : /*16751*/         OPC_CheckType, MVT::i32,
    7920             : /*16753*/         OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7921             : /*16755*/         OPC_EmitConvertToTarget, 0,
    7922             : /*16757*/         OPC_EmitInteger, MVT::i32, 14, 
    7923             : /*16760*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7924             : /*16763*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7925             : /*16766*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::BICri), 0,
    7926             :                       MVT::i32, 5/*#Ops*/, 1, 2, 3, 4, 5, 
    7927             :                   // Src: (and:i32 (xor:i32 (imm:i32)<<P:Predicate_mod_imm>>:$imm, -1:i32), GPR:i32:$Rn) - Complexity = 15
    7928             :                   // Dst: (BICri:i32 GPR:i32:$Rn, (imm:i32):$imm)
    7929             : /*16777*/       /*Scope*/ 47, /*->16825*/
    7930             : /*16778*/         OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7931             : /*16789*/         OPC_RecordChild1, // #0 = $imm
    7932             : /*16790*/         OPC_MoveChild1,
    7933             : /*16791*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7934             : /*16794*/         OPC_CheckPredicate, 7, // Predicate_mod_imm
    7935             : /*16796*/         OPC_MoveParent,
    7936             : /*16797*/         OPC_MoveParent,
    7937             : /*16798*/         OPC_RecordChild1, // #1 = $Rn
    7938             : /*16799*/         OPC_CheckType, MVT::i32,
    7939             : /*16801*/         OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    7940             : /*16803*/         OPC_EmitConvertToTarget, 0,
    7941             : /*16805*/         OPC_EmitInteger, MVT::i32, 14, 
    7942             : /*16808*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7943             : /*16811*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7944             : /*16814*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::BICri), 0,
    7945             :                       MVT::i32, 5/*#Ops*/, 1, 2, 3, 4, 5, 
    7946             :                   // Src: (and:i32 (xor:i32 -1:i32, (imm:i32)<<P:Predicate_mod_imm>>:$imm), GPR:i32:$Rn) - Complexity = 15
    7947             :                   // Dst: (BICri:i32 GPR:i32:$Rn, (imm:i32):$imm)
    7948             : /*16825*/       0, /*End of Scope*/
    7949             : /*16826*/     /*Scope*/ 51, /*->16878*/
    7950             : /*16827*/       OPC_RecordChild0, // #0 = $Rn
    7951             : /*16828*/       OPC_MoveChild1,
    7952             : /*16829*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7953             : /*16832*/       OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7954             : /*16843*/       OPC_RecordChild1, // #1 = $imm
    7955             : /*16844*/       OPC_MoveChild1,
    7956             : /*16845*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7957             : /*16848*/       OPC_CheckPredicate, 6, // Predicate_t2_so_imm
    7958             : /*16850*/       OPC_MoveParent,
    7959             : /*16851*/       OPC_MoveParent,
    7960             : /*16852*/       OPC_CheckType, MVT::i32,
    7961             : /*16854*/       OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    7962             : /*16856*/       OPC_EmitConvertToTarget, 1,
    7963             : /*16858*/       OPC_EmitInteger, MVT::i32, 14, 
    7964             : /*16861*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7965             : /*16864*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7966             : /*16867*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICri), 0,
    7967             :                     MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
    7968             :                 // Src: (and:i32 rGPR:i32:$Rn, (xor:i32 -1:i32, (imm:i32)<<P:Predicate_t2_so_imm>>:$imm)) - Complexity = 15
    7969             :                 // Dst: (t2BICri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
    7970             : /*16878*/     /*Scope*/ 102, /*->16981*/
    7971             : /*16879*/       OPC_MoveChild0,
    7972             : /*16880*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    7973             : /*16883*/       OPC_Scope, 47, /*->16932*/ // 2 children in Scope
    7974             : /*16885*/         OPC_RecordChild0, // #0 = $imm
    7975             : /*16886*/         OPC_MoveChild0,
    7976             : /*16887*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7977             : /*16890*/         OPC_CheckPredicate, 6, // Predicate_t2_so_imm
    7978             : /*16892*/         OPC_MoveParent,
    7979             : /*16893*/         OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7980             : /*16904*/         OPC_MoveParent,
    7981             : /*16905*/         OPC_RecordChild1, // #1 = $Rn
    7982             : /*16906*/         OPC_CheckType, MVT::i32,
    7983             : /*16908*/         OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    7984             : /*16910*/         OPC_EmitConvertToTarget, 0,
    7985             : /*16912*/         OPC_EmitInteger, MVT::i32, 14, 
    7986             : /*16915*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7987             : /*16918*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    7988             : /*16921*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICri), 0,
    7989             :                       MVT::i32, 5/*#Ops*/, 1, 2, 3, 4, 5, 
    7990             :                   // Src: (and:i32 (xor:i32 (imm:i32)<<P:Predicate_t2_so_imm>>:$imm, -1:i32), rGPR:i32:$Rn) - Complexity = 15
    7991             :                   // Dst: (t2BICri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
    7992             : /*16932*/       /*Scope*/ 47, /*->16980*/
    7993             : /*16933*/         OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    7994             : /*16944*/         OPC_RecordChild1, // #0 = $imm
    7995             : /*16945*/         OPC_MoveChild1,
    7996             : /*16946*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7997             : /*16949*/         OPC_CheckPredicate, 6, // Predicate_t2_so_imm
    7998             : /*16951*/         OPC_MoveParent,
    7999             : /*16952*/         OPC_MoveParent,
    8000             : /*16953*/         OPC_RecordChild1, // #1 = $Rn
    8001             : /*16954*/         OPC_CheckType, MVT::i32,
    8002             : /*16956*/         OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8003             : /*16958*/         OPC_EmitConvertToTarget, 0,
    8004             : /*16960*/         OPC_EmitInteger, MVT::i32, 14, 
    8005             : /*16963*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8006             : /*16966*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8007             : /*16969*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICri), 0,
    8008             :                       MVT::i32, 5/*#Ops*/, 1, 2, 3, 4, 5, 
    8009             :                   // Src: (and:i32 (xor:i32 -1:i32, (imm:i32)<<P:Predicate_t2_so_imm>>:$imm), rGPR:i32:$Rn) - Complexity = 15
    8010             :                   // Dst: (t2BICri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
    8011             : /*16980*/       0, /*End of Scope*/
    8012             : /*16981*/     /*Scope*/ 80|128,1/*208*/, /*->17191*/
    8013             : /*16983*/       OPC_RecordChild0, // #0 = $Rn
    8014             : /*16984*/       OPC_Scope, 113, /*->17099*/ // 2 children in Scope
    8015             : /*16986*/         OPC_RecordChild1, // #1 = $shift
    8016             : /*16987*/         OPC_CheckType, MVT::i32,
    8017             : /*16989*/         OPC_Scope, 26, /*->17017*/ // 4 children in Scope
    8018             : /*16991*/           OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8019             : /*16993*/           OPC_CheckComplexPat, /*CP*/2, /*#*/1, // SelectImmShifterOperand:$shift #2 #3
    8020             : /*16996*/           OPC_EmitInteger, MVT::i32, 14, 
    8021             : /*16999*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8022             : /*17002*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8023             : /*17005*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::ANDrsi), 0,
    8024             :                         MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
    8025             :                     // Src: (and:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift) - Complexity = 12
    8026             :                     // Dst: (ANDrsi:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift)
    8027             : /*17017*/         /*Scope*/ 26, /*->17044*/
    8028             : /*17018*/           OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8029             : /*17020*/           OPC_CheckComplexPat, /*CP*/0, /*#*/1, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
    8030             : /*17023*/           OPC_EmitInteger, MVT::i32, 14, 
    8031             : /*17026*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8032             : /*17029*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8033             : /*17032*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ANDrs), 0,
    8034             :                         MVT::i32, 6/*#Ops*/, 0, 2, 3, 4, 5, 6, 
    8035             :                     // Src: (and:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm) - Complexity = 12
    8036             :                     // Dst: (t2ANDrs:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
    8037             : /*17044*/         /*Scope*/ 26, /*->17071*/
    8038             : /*17045*/           OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8039             : /*17047*/           OPC_CheckComplexPat, /*CP*/2, /*#*/0, // SelectImmShifterOperand:$shift #2 #3
    8040             : /*17050*/           OPC_EmitInteger, MVT::i32, 14, 
    8041             : /*17053*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8042             : /*17056*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8043             : /*17059*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::ANDrsi), 0,
    8044             :                         MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
    8045             :                     // Src: (and:i32 so_reg_imm:i32:$shift, GPR:i32:$Rn) - Complexity = 12
    8046             :                     // Dst: (ANDrsi:i32 GPR:i32:$Rn, so_reg_imm:i32:$shift)
    8047             : /*17071*/         /*Scope*/ 26, /*->17098*/
    8048             : /*17072*/           OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8049             : /*17074*/           OPC_CheckComplexPat, /*CP*/0, /*#*/0, // SelectShiftImmShifterOperand:$ShiftedRm #2 #3
    8050             : /*17077*/           OPC_EmitInteger, MVT::i32, 14, 
    8051             : /*17080*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8052             : /*17083*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8053             : /*17086*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ANDrs), 0,
    8054             :                         MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
    8055             :                     // Src: (and:i32 t2_so_reg:i32:$ShiftedRm, rGPR:i32:$Rn) - Complexity = 12
    8056             :                     // Dst: (t2ANDrs:i32 rGPR:i32:$Rn, t2_so_reg:i32:$ShiftedRm)
    8057             : /*17098*/         0, /*End of Scope*/
    8058             : /*17099*/       /*Scope*/ 90, /*->17190*/
    8059             : /*17100*/         OPC_MoveChild1,
    8060             : /*17101*/         OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    8061             : /*17104*/         OPC_RecordChild0, // #1 = $Rm
    8062             : /*17105*/         OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    8063             : /*17116*/         OPC_MoveParent,
    8064             : /*17117*/         OPC_CheckType, MVT::i32,
    8065             : /*17119*/         OPC_Scope, 22, /*->17143*/ // 3 children in Scope
    8066             : /*17121*/           OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8067             : /*17123*/           OPC_EmitInteger, MVT::i32, 14, 
    8068             : /*17126*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8069             : /*17129*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8070             : /*17132*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::BICrr), 0,
    8071             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    8072             :                     // Src: (and:i32 GPR:i32:$Rn, (xor:i32 GPR:i32:$Rm, -1:i32)) - Complexity = 11
    8073             :                     // Dst: (BICrr:i32 GPR:i32:$Rn, GPR:i32:$Rm)
    8074             : /*17143*/         /*Scope*/ 22, /*->17166*/
    8075             : /*17144*/           OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8076             : /*17146*/           OPC_EmitRegister, MVT::i32, ARM::CPSR,
    8077             : /*17149*/           OPC_EmitInteger, MVT::i32, 14, 
    8078             : /*17152*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8079             : /*17155*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::tBIC), 0,
    8080             :                         MVT::i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    8081             :                     // Src: (and:i32 tGPR:i32:$Rn, (xor:i32 tGPR:i32:$Rm, -1:i32)) - Complexity = 11
    8082             :                     // Dst: (tBIC:i32 tGPR:i32:$Rn, tGPR:i32:$Rm)
    8083             : /*17166*/         /*Scope*/ 22, /*->17189*/
    8084             : /*17167*/           OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8085             : /*17169*/           OPC_EmitInteger, MVT::i32, 14, 
    8086             : /*17172*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8087             : /*17175*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8088             : /*17178*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICrr), 0,
    8089             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    8090             :                     // Src: (and:i32 rGPR:i32:$Rn, (xor:i32 rGPR:i32:$Rm, -1:i32)) - Complexity = 11
    8091             :                     // Dst: (t2BICrr:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)
    8092             : /*17189*/         0, /*End of Scope*/
    8093             : /*17190*/       0, /*End of Scope*/
    8094             : /*17191*/     /*Scope*/ 91, /*->17283*/
    8095             : /*17192*/       OPC_MoveChild0,
    8096             : /*17193*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    8097             : /*17196*/       OPC_RecordChild0, // #0 = $Rm
    8098             : /*17197*/       OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    8099             : /*17208*/       OPC_MoveParent,
    8100             : /*17209*/       OPC_RecordChild1, // #1 = $Rn
    8101             : /*17210*/       OPC_CheckType, MVT::i32,
    8102             : /*17212*/       OPC_Scope, 22, /*->17236*/ // 3 children in Scope
    8103             : /*17214*/         OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8104             : /*17216*/         OPC_EmitInteger, MVT::i32, 14, 
    8105             : /*17219*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8106             : /*17222*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8107             : /*17225*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::BICrr), 0,
    8108             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    8109             :                   // Src: (and:i32 (xor:i32 GPR:i32:$Rm, -1:i32), GPR:i32:$Rn) - Complexity = 11
    8110             :                   // Dst: (BICrr:i32 GPR:i32:$Rn, GPR:i32:$Rm)
    8111             : /*17236*/       /*Scope*/ 22, /*->17259*/
    8112             : /*17237*/         OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8113             : /*17239*/         OPC_EmitRegister, MVT::i32, ARM::CPSR,
    8114             : /*17242*/         OPC_EmitInteger, MVT::i32, 14, 
    8115             : /*17245*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8116             : /*17248*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::tBIC), 0,
    8117             :                       MVT::i32, 5/*#Ops*/, 2, 1, 0, 3, 4, 
    8118             :                   // Src: (and:i32 (xor:i32 tGPR:i32:$Rm, -1:i32), tGPR:i32:$Rn) - Complexity = 11
    8119             :                   // Dst: (tBIC:i32 tGPR:i32:$Rn, tGPR:i32:$Rm)
    8120             : /*17259*/       /*Scope*/ 22, /*->17282*/
    8121             : /*17260*/         OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8122             : /*17262*/         OPC_EmitInteger, MVT::i32, 14, 
    8123             : /*17265*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8124             : /*17268*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8125             : /*17271*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICrr), 0,
    8126             :                       MVT::i32, 5/*#Ops*/, 1, 0, 2, 3, 4, 
    8127             :                   // Src: (and:i32 (xor:i32 rGPR:i32:$Rm, -1:i32), rGPR:i32:$Rn) - Complexity = 11
    8128             :                   // Dst: (t2BICrr:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)
    8129             : /*17282*/       0, /*End of Scope*/
    8130             : /*17283*/     /*Scope*/ 38, /*->17322*/
    8131             : /*17284*/       OPC_RecordChild0, // #0 = $src
    8132             : /*17285*/       OPC_RecordChild1, // #1 = $imm
    8133             : /*17286*/       OPC_MoveChild1,
    8134             : /*17287*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8135             : /*17290*/       OPC_CheckPredicate, 25, // Predicate_mod_imm_not
    8136             : /*17292*/       OPC_MoveParent,
    8137             : /*17293*/       OPC_CheckType, MVT::i32,
    8138             : /*17295*/       OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8139             : /*17297*/       OPC_EmitConvertToTarget, 1,
    8140             : /*17299*/       OPC_EmitNodeXForm, 9, 2, // imm_not_XFORM
    8141             : /*17302*/       OPC_EmitInteger, MVT::i32, 14, 
    8142             : /*17305*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8143             : /*17308*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8144             : /*17311*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::BICri), 0,
    8145             :                     MVT::i32, 5/*#Ops*/, 0, 3, 4, 5, 6, 
    8146             :                 // Src: (and:i32 GPR:i32:$src, (imm:i32)<<P:Predicate_mod_imm_not>><<X:imm_not_XFORM>>:$imm) - Complexity = 8
    8147             :                 // Dst: (BICri:i32 GPR:i32:$src, (imm_not_XFORM:i32 (imm:i32)<<P:Predicate_mod_imm_not>>:$imm))
    8148             : /*17322*/     /*Scope*/ 23, /*->17346*/
    8149             : /*17323*/       OPC_CheckAndImm, 127|128,1/*255*/, 
    8150             : /*17326*/       OPC_RecordChild0, // #0 = $Rm
    8151             : /*17327*/       OPC_CheckType, MVT::i32,
    8152             : /*17329*/       OPC_CheckPatternPredicate, 14, // (Subtarget->hasV6Ops()) && (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8153             : /*17331*/       OPC_EmitInteger, MVT::i32, 14, 
    8154             : /*17334*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8155             : /*17337*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::tUXTB), 0,
    8156             :                     MVT::i32, 3/*#Ops*/, 0, 1, 2, 
    8157             :                 // Src: (and:i32 tGPR:i32:$Rm, 255:i32) - Complexity = 8
    8158             :                 // Dst: (tUXTB:i32 tGPR:i32:$Rm)
    8159             : /*17346*/     /*Scope*/ 24, /*->17371*/
    8160             : /*17347*/       OPC_CheckAndImm, 127|128,127|128,3/*65535*/, 
    8161             : /*17351*/       OPC_RecordChild0, // #0 = $Rm
    8162             : /*17352*/       OPC_CheckType, MVT::i32,
    8163             : /*17354*/       OPC_CheckPatternPredicate, 14, // (Subtarget->hasV6Ops()) && (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8164             : /*17356*/       OPC_EmitInteger, MVT::i32, 14, 
    8165             : /*17359*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8166             : /*17362*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::tUXTH), 0,
    8167             :                     MVT::i32, 3/*#Ops*/, 0, 1, 2, 
    8168             :                 // Src: (and:i32 tGPR:i32:$Rm, 65535:i32) - Complexity = 8
    8169             :                 // Dst: (tUXTH:i32 tGPR:i32:$Rm)
    8170             : /*17371*/     /*Scope*/ 15|128,3/*399*/, /*->17772*/
    8171             : /*17373*/       OPC_RecordChild0, // #0 = $src
    8172             : /*17374*/       OPC_Scope, 37, /*->17413*/ // 4 children in Scope
    8173             : /*17376*/         OPC_RecordChild1, // #1 = $imm
    8174             : /*17377*/         OPC_MoveChild1,
    8175             : /*17378*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8176             : /*17381*/         OPC_CheckPredicate, 8, // Predicate_t2_so_imm_not
    8177             : /*17383*/         OPC_MoveParent,
    8178             : /*17384*/         OPC_CheckType, MVT::i32,
    8179             : /*17386*/         OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8180             : /*17388*/         OPC_EmitConvertToTarget, 1,
    8181             : /*17390*/         OPC_EmitNodeXForm, 1, 2, // t2_so_imm_not_XFORM
    8182             : /*17393*/         OPC_EmitInteger, MVT::i32, 14, 
    8183             : /*17396*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8184             : /*17399*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8185             : /*17402*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICri), 0,
    8186             :                       MVT::i32, 5/*#Ops*/, 0, 3, 4, 5, 6, 
    8187             :                   // Src: (and:i32 rGPR:i32:$src, (imm:i32)<<P:Predicate_t2_so_imm_not>><<X:t2_so_imm_not_XFORM>>:$imm) - Complexity = 8
    8188             :                   // Dst: (t2BICri:i32 rGPR:i32:$src, (t2_so_imm_not_XFORM:i32 (imm:i32)<<P:Predicate_t2_so_imm_not>>:$imm))
    8189             : /*17413*/       /*Scope*/ 41, /*->17455*/
    8190             : /*17414*/         OPC_MoveChild0,
    8191             : /*17415*/         OPC_CheckPredicate, 26, // Predicate_top16Zero
    8192             : /*17417*/         OPC_MoveParent,
    8193             : /*17418*/         OPC_RecordChild1, // #1 = $imm
    8194             : /*17419*/         OPC_MoveChild1,
    8195             : /*17420*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8196             : /*17423*/         OPC_CheckPredicate, 27, // Predicate_t2_so_imm_notSext
    8197             : /*17425*/         OPC_MoveParent,
    8198             : /*17426*/         OPC_CheckType, MVT::i32,
    8199             : /*17428*/         OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8200             : /*17430*/         OPC_EmitConvertToTarget, 1,
    8201             : /*17432*/         OPC_EmitNodeXForm, 10, 2, // t2_so_imm_notSext16_XFORM
    8202             : /*17435*/         OPC_EmitInteger, MVT::i32, 14, 
    8203             : /*17438*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8204             : /*17441*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8205             : /*17444*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BICri), 0,
    8206             :                       MVT::i32, 5/*#Ops*/, 0, 3, 4, 5, 6, 
    8207             :                   // Src: (and:i32 rGPR:i32<<P:Predicate_top16Zero>>:$src, (imm:i32)<<P:Predicate_t2_so_imm_notSext>><<X:t2_so_imm_notSext16_XFORM>>:$imm) - Complexity = 8
    8208             :                   // Dst: (t2BICri:i32 rGPR:i32:$src, (t2_so_imm_notSext16_XFORM:i32 (imm:i32)<<P:Predicate_t2_so_imm_notSext>>:$imm))
    8209             : /*17455*/       /*Scope*/ 68|128,1/*196*/, /*->17653*/
    8210             : /*17457*/         OPC_RecordChild1, // #1 = $imm
    8211             : /*17458*/         OPC_Scope, 118, /*->17578*/ // 2 children in Scope
    8212             : /*17460*/           OPC_MoveChild1,
    8213             : /*17461*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8214             : /*17464*/           OPC_Scope, 29, /*->17495*/ // 4 children in Scope
    8215             : /*17466*/             OPC_CheckPredicate, 7, // Predicate_mod_imm
    8216             : /*17468*/             OPC_MoveParent,
    8217             : /*17469*/             OPC_CheckType, MVT::i32,
    8218             : /*17471*/             OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8219             : /*17473*/             OPC_EmitConvertToTarget, 1,
    8220             : /*17475*/             OPC_EmitInteger, MVT::i32, 14, 
    8221             : /*17478*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8222             : /*17481*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8223             : /*17484*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::ANDri), 0,
    8224             :                           MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
    8225             :                       // Src: (and:i32 GPR:i32:$Rn, (imm:i32)<<P:Predicate_mod_imm>>:$imm) - Complexity = 7
    8226             :                       // Dst: (ANDri:i32 GPR:i32:$Rn, (imm:i32):$imm)
    8227             : /*17495*/           /*Scope*/ 25, /*->17521*/
    8228             : /*17496*/             OPC_CheckPredicate, 28, // Predicate_bf_inv_mask_imm
    8229             : /*17498*/             OPC_MoveParent,
    8230             : /*17499*/             OPC_CheckType, MVT::i32,
    8231             : /*17501*/             OPC_CheckPatternPredicate, 3, // (Subtarget->hasV6T2Ops()) && (!Subtarget->isThumb())
    8232             : /*17503*/             OPC_EmitConvertToTarget, 1,
    8233             : /*17505*/             OPC_EmitInteger, MVT::i32, 14, 
    8234             : /*17508*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8235             : /*17511*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::BFC), 0,
    8236             :                           MVT::i32, 4/*#Ops*/, 0, 2, 3, 4, 
    8237             :                       // Src: (and:i32 GPR:i32:$src, (imm:i32)<<P:Predicate_bf_inv_mask_imm>>:$imm) - Complexity = 7
    8238             :                       // Dst: (BFC:i32 GPR:i32:$src, (imm:i32):$imm)
    8239             : /*17521*/           /*Scope*/ 29, /*->17551*/
    8240             : /*17522*/             OPC_CheckPredicate, 6, // Predicate_t2_so_imm
    8241             : /*17524*/             OPC_MoveParent,
    8242             : /*17525*/             OPC_CheckType, MVT::i32,
    8243             : /*17527*/             OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8244             : /*17529*/             OPC_EmitConvertToTarget, 1,
    8245             : /*17531*/             OPC_EmitInteger, MVT::i32, 14, 
    8246             : /*17534*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8247             : /*17537*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8248             : /*17540*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ANDri), 0,
    8249             :                           MVT::i32, 5/*#Ops*/, 0, 2, 3, 4, 5, 
    8250             :                       // Src: (and:i32 rGPR:i32:$Rn, (imm:i32)<<P:Predicate_t2_so_imm>>:$imm) - Complexity = 7
    8251             :                       // Dst: (t2ANDri:i32 rGPR:i32:$Rn, (imm:i32):$imm)
    8252             : /*17551*/           /*Scope*/ 25, /*->17577*/
    8253             : /*17552*/             OPC_CheckPredicate, 28, // Predicate_bf_inv_mask_imm
    8254             : /*17554*/             OPC_MoveParent,
    8255             : /*17555*/             OPC_CheckType, MVT::i32,
    8256             : /*17557*/             OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8257             : /*17559*/             OPC_EmitConvertToTarget, 1,
    8258             : /*17561*/             OPC_EmitInteger, MVT::i32, 14, 
    8259             : /*17564*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8260             : /*17567*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2BFC), 0,
    8261             :                           MVT::i32, 4/*#Ops*/, 0, 2, 3, 4, 
    8262             :                       // Src: (and:i32 rGPR:i32:$src, (imm:i32)<<P:Predicate_bf_inv_mask_imm>>:$imm) - Complexity = 7
    8263             :                       // Dst: (t2BFC:i32 rGPR:i32:$src, (imm:i32):$imm)
    8264             : /*17577*/           0, /*End of Scope*/
    8265             : /*17578*/         /*Scope*/ 73, /*->17652*/
    8266             : /*17579*/           OPC_CheckType, MVT::i32,
    8267             : /*17581*/           OPC_Scope, 22, /*->17605*/ // 3 children in Scope
    8268             : /*17583*/             OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8269             : /*17585*/             OPC_EmitInteger, MVT::i32, 14, 
    8270             : /*17588*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8271             : /*17591*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8272             : /*17594*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::ANDrr), 0,
    8273             :                           MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    8274             :                       // Src: (and:i32 GPR:i32:$Rn, GPR:i32:$Rm) - Complexity = 3
    8275             :                       // Dst: (ANDrr:i32 GPR:i32:$Rn, GPR:i32:$Rm)
    8276             : /*17605*/           /*Scope*/ 22, /*->17628*/
    8277             : /*17606*/             OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8278             : /*17608*/             OPC_EmitRegister, MVT::i32, ARM::CPSR,
    8279             : /*17611*/             OPC_EmitInteger, MVT::i32, 14, 
    8280             : /*17614*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8281             : /*17617*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::tAND), 0,
    8282             :                           MVT::i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    8283             :                       // Src: (and:i32 tGPR:i32:$Rn, tGPR:i32:$Rm) - Complexity = 3
    8284             :                       // Dst: (tAND:i32 tGPR:i32:$Rn, tGPR:i32:$Rm)
    8285             : /*17628*/           /*Scope*/ 22, /*->17651*/
    8286             : /*17629*/             OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8287             : /*17631*/             OPC_EmitInteger, MVT::i32, 14, 
    8288             : /*17634*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8289             : /*17637*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8290             : /*17640*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::t2ANDrr), 0,
    8291             :                           MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    8292             :                       // Src: (and:i32 rGPR:i32:$Rn, rGPR:i32:$Rm) - Complexity = 3
    8293             :                       // Dst: (t2ANDrr:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)
    8294             : /*17651*/           0, /*End of Scope*/
    8295             : /*17652*/         0, /*End of Scope*/
    8296             : /*17653*/       /*Scope*/ 117, /*->17771*/
    8297             : /*17654*/         OPC_MoveChild1,
    8298             : /*17655*/         OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    8299             : /*17658*/         OPC_Scope, 68, /*->17728*/ // 2 children in Scope
    8300             : /*17660*/           OPC_RecordChild0, // #1 = $Vm
    8301             : /*17661*/           OPC_MoveChild1,
    8302             : /*17662*/           OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    8303             : /*17665*/           OPC_MoveChild0,
    8304             : /*17666*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    8305             : /*17669*/           OPC_MoveChild0,
    8306             : /*17670*/           OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    8307             : /*17673*/           OPC_MoveParent,
    8308             : /*17674*/           OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    8309             : /*17676*/           OPC_SwitchType /*2 cases */, 23, MVT::v8i8,// ->17702
    8310             : /*17679*/             OPC_MoveParent,
    8311             : /*17680*/             OPC_MoveParent,
    8312             : /*17681*/             OPC_MoveParent,
    8313             : /*17682*/             OPC_CheckType, MVT::v2i32,
    8314             : /*17684*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8315             : /*17686*/             OPC_EmitInteger, MVT::i32, 14, 
    8316             : /*17689*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8317             : /*17692*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VBICd), 0,
    8318             :                           MVT::v2i32, 4/*#Ops*/, 0, 1, 2, 3, 
    8319             :                       // Src: (and:v2i32 DPR:v2i32:$Vn, (xor:v2i32 DPR:v2i32:$Vm, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))) - Complexity = 16
    8320             :                       // Dst: (VBICd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    8321             : /*17702*/           /*SwitchType*/ 23, MVT::v16i8,// ->17727
    8322             : /*17704*/             OPC_MoveParent,
    8323             : /*17705*/             OPC_MoveParent,
    8324             : /*17706*/             OPC_MoveParent,
    8325             : /*17707*/             OPC_CheckType, MVT::v4i32,
    8326             : /*17709*/             OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8327             : /*17711*/             OPC_EmitInteger, MVT::i32, 14, 
    8328             : /*17714*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8329             : /*17717*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::VBICq), 0,
    8330             :                           MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    8331             :                       // Src: (and:v4i32 QPR:v4i32:$Vn, (xor:v4i32 QPR:v4i32:$Vm, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>))) - Complexity = 16
    8332             :                       // Dst: (VBICq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    8333             : /*17727*/           0, // EndSwitchType
    8334             : /*17728*/         /*Scope*/ 41, /*->17770*/
    8335             : /*17729*/           OPC_MoveChild0,
    8336             : /*17730*/           OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    8337             : /*17733*/           OPC_MoveChild0,
    8338             : /*17734*/           OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    8339             : /*17737*/           OPC_MoveChild0,
    8340             : /*17738*/           OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    8341             : /*17741*/           OPC_MoveParent,
    8342             : /*17742*/           OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    8343             : /*17744*/           OPC_CheckType, MVT::v8i8,
    8344             : /*17746*/           OPC_MoveParent,
    8345             : /*17747*/           OPC_MoveParent,
    8346             : /*17748*/           OPC_RecordChild1, // #1 = $Vm
    8347             : /*17749*/           OPC_MoveParent,
    8348             : /*17750*/           OPC_CheckType, MVT::v2i32,
    8349             : /*17752*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8350             : /*17754*/           OPC_EmitInteger, MVT::i32, 14, 
    8351             : /*17757*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8352             : /*17760*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VBICd), 0,
    8353             :                         MVT::v2i32, 4/*#Ops*/, 0, 1, 2, 3, 
    8354             :                     // Src: (and:v2i32 DPR:v2i32:$Vn, (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vm)) - Complexity = 16
    8355             :                     // Dst: (VBICd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    8356             : /*17770*/         0, /*End of Scope*/
    8357             : /*17771*/       0, /*End of Scope*/
    8358             : /*17772*/     /*Scope*/ 92, /*->17865*/
    8359             : /*17773*/       OPC_MoveChild0,
    8360             : /*17774*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    8361             : /*17777*/       OPC_Scope, 42, /*->17821*/ // 2 children in Scope
    8362             : /*17779*/         OPC_RecordChild0, // #0 = $Vm
    8363             : /*17780*/         OPC_MoveChild1,
    8364             : /*17781*/         OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    8365             : /*17784*/         OPC_MoveChild0,
    8366             : /*17785*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    8367             : /*17788*/         OPC_MoveChild0,
    8368             : /*17789*/         OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    8369             : /*17792*/         OPC_MoveParent,
    8370             : /*17793*/         OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    8371             : /*17795*/         OPC_CheckType, MVT::v8i8,
    8372             : /*17797*/         OPC_MoveParent,
    8373             : /*17798*/         OPC_MoveParent,
    8374             : /*17799*/         OPC_MoveParent,
    8375             : /*17800*/         OPC_RecordChild1, // #1 = $Vn
    8376             : /*17801*/         OPC_CheckType, MVT::v2i32,
    8377             : /*17803*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8378             : /*17805*/         OPC_EmitInteger, MVT::i32, 14, 
    8379             : /*17808*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8380             : /*17811*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VBICd), 0,
    8381             :                       MVT::v2i32, 4/*#Ops*/, 1, 0, 2, 3, 
    8382             :                   // Src: (and:v2i32 (xor:v2i32 DPR:v2i32:$Vm, (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), DPR:v2i32:$Vn) - Complexity = 16
    8383             :                   // Dst: (VBICd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    8384             : /*17821*/       /*Scope*/ 42, /*->17864*/
    8385             : /*17822*/         OPC_MoveChild0,
    8386             : /*17823*/         OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    8387             : /*17826*/         OPC_MoveChild0,
    8388             : /*17827*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    8389             : /*17830*/         OPC_MoveChild0,
    8390             : /*17831*/         OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    8391             : /*17834*/         OPC_MoveParent,
    8392             : /*17835*/         OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    8393             : /*17837*/         OPC_CheckType, MVT::v8i8,
    8394             : /*17839*/         OPC_MoveParent,
    8395             : /*17840*/         OPC_MoveParent,
    8396             : /*17841*/         OPC_RecordChild1, // #0 = $Vm
    8397             : /*17842*/         OPC_MoveParent,
    8398             : /*17843*/         OPC_RecordChild1, // #1 = $Vn
    8399             : /*17844*/         OPC_CheckType, MVT::v2i32,
    8400             : /*17846*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8401             : /*17848*/         OPC_EmitInteger, MVT::i32, 14, 
    8402             : /*17851*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8403             : /*17854*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VBICd), 0,
    8404             :                       MVT::v2i32, 4/*#Ops*/, 1, 0, 2, 3, 
    8405             :                   // Src: (and:v2i32 (xor:v2i32 (bitconvert:v2i32 (NEONvmovImm:v8i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), DPR:v2i32:$Vm), DPR:v2i32:$Vn) - Complexity = 16
    8406             :                   // Dst: (VBICd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    8407             : /*17864*/       0, /*End of Scope*/
    8408             : /*17865*/     /*Scope*/ 46, /*->17912*/
    8409             : /*17866*/       OPC_RecordChild0, // #0 = $Vn
    8410             : /*17867*/       OPC_MoveChild1,
    8411             : /*17868*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    8412             : /*17871*/       OPC_MoveChild0,
    8413             : /*17872*/       OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    8414             : /*17875*/       OPC_MoveChild0,
    8415             : /*17876*/       OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    8416             : /*17879*/       OPC_MoveChild0,
    8417             : /*17880*/       OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    8418             : /*17883*/       OPC_MoveParent,
    8419             : /*17884*/       OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    8420             : /*17886*/       OPC_CheckType, MVT::v16i8,
    8421             : /*17888*/       OPC_MoveParent,
    8422             : /*17889*/       OPC_MoveParent,
    8423             : /*17890*/       OPC_RecordChild1, // #1 = $Vm
    8424             : /*17891*/       OPC_MoveParent,
    8425             : /*17892*/       OPC_CheckType, MVT::v4i32,
    8426             : /*17894*/       OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8427             : /*17896*/       OPC_EmitInteger, MVT::i32, 14, 
    8428             : /*17899*/       OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8429             : /*17902*/       OPC_MorphNodeTo1, TARGET_VAL(ARM::VBICq), 0,
    8430             :                     MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    8431             :                 // Src: (and:v4i32 QPR:v4i32:$Vn, (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vm)) - Complexity = 16
    8432             :                 // Dst: (VBICq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    8433             : /*17912*/     /*Scope*/ 92, /*->18005*/
    8434             : /*17913*/       OPC_MoveChild0,
    8435             : /*17914*/       OPC_CheckOpcode, TARGET_VAL(ISD::XOR),
    8436             : /*17917*/       OPC_Scope, 42, /*->17961*/ // 2 children in Scope
    8437             : /*17919*/         OPC_RecordChild0, // #0 = $Vm
    8438             : /*17920*/         OPC_MoveChild1,
    8439             : /*17921*/         OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    8440             : /*17924*/         OPC_MoveChild0,
    8441             : /*17925*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    8442             : /*17928*/         OPC_MoveChild0,
    8443             : /*17929*/         OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    8444             : /*17932*/         OPC_MoveParent,
    8445             : /*17933*/         OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    8446             : /*17935*/         OPC_CheckType, MVT::v16i8,
    8447             : /*17937*/         OPC_MoveParent,
    8448             : /*17938*/         OPC_MoveParent,
    8449             : /*17939*/         OPC_MoveParent,
    8450             : /*17940*/         OPC_RecordChild1, // #1 = $Vn
    8451             : /*17941*/         OPC_CheckType, MVT::v4i32,
    8452             : /*17943*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8453             : /*17945*/         OPC_EmitInteger, MVT::i32, 14, 
    8454             : /*17948*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8455             : /*17951*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VBICq), 0,
    8456             :                       MVT::v4i32, 4/*#Ops*/, 1, 0, 2, 3, 
    8457             :                   // Src: (and:v4i32 (xor:v4i32 QPR:v4i32:$Vm, (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>)), QPR:v4i32:$Vn) - Complexity = 16
    8458             :                   // Dst: (VBICq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    8459             : /*17961*/       /*Scope*/ 42, /*->18004*/
    8460             : /*17962*/         OPC_MoveChild0,
    8461             : /*17963*/         OPC_CheckOpcode, TARGET_VAL(ISD::BITCAST),
    8462             : /*17966*/         OPC_MoveChild0,
    8463             : /*17967*/         OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVIMM),
    8464             : /*17970*/         OPC_MoveChild0,
    8465             : /*17971*/         OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
    8466             : /*17974*/         OPC_MoveParent,
    8467             : /*17975*/         OPC_CheckPredicate, 9, // Predicate_NEONimmAllOnesV
    8468             : /*17977*/         OPC_CheckType, MVT::v16i8,
    8469             : /*17979*/         OPC_MoveParent,
    8470             : /*17980*/         OPC_MoveParent,
    8471             : /*17981*/         OPC_RecordChild1, // #0 = $Vm
    8472             : /*17982*/         OPC_MoveParent,
    8473             : /*17983*/         OPC_RecordChild1, // #1 = $Vn
    8474             : /*17984*/         OPC_CheckType, MVT::v4i32,
    8475             : /*17986*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8476             : /*17988*/         OPC_EmitInteger, MVT::i32, 14, 
    8477             : /*17991*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8478             : /*17994*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VBICq), 0,
    8479             :                       MVT::v4i32, 4/*#Ops*/, 1, 0, 2, 3, 
    8480             :                   // Src: (and:v4i32 (xor:v4i32 (bitconvert:v4i32 (NEONvmovImm:v16i8 (timm:i32))<<P:Predicate_NEONimmAllOnesV>>), QPR:v4i32:$Vm), QPR:v4i32:$Vn) - Complexity = 16
    8481             :                   // Dst: (VBICq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    8482             : /*18004*/       0, /*End of Scope*/
    8483             : /*18005*/     /*Scope*/ 44, /*->18050*/
    8484             : /*18006*/       OPC_RecordChild0, // #0 = $Vn
    8485             : /*18007*/       OPC_RecordChild1, // #1 = $Vm
    8486             : /*18008*/       OPC_SwitchType /*2 cases */, 18, MVT::v2i32,// ->18029
    8487             : /*18011*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8488             : /*18013*/         OPC_EmitInteger, MVT::i32, 14, 
    8489             : /*18016*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8490             : /*18019*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VANDd), 0,
    8491             :                       MVT::v2i32, 4/*#Ops*/, 0, 1, 2, 3, 
    8492             :                   // Src: (and:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm) - Complexity = 3
    8493             :                   // Dst: (VANDd:v2i32 DPR:v2i32:$Vn, DPR:v2i32:$Vm)
    8494             : /*18029*/       /*SwitchType*/ 18, MVT::v4i32,// ->18049
    8495             : /*18031*/         OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8496             : /*18033*/         OPC_EmitInteger, MVT::i32, 14, 
    8497             : /*18036*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8498             : /*18039*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::VANDq), 0,
    8499             :                       MVT::v4i32, 4/*#Ops*/, 0, 1, 2, 3, 
    8500             :                   // Src: (and:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm) - Complexity = 3
    8501             :                   // Dst: (VANDq:v4i32 QPR:v4i32:$Vn, QPR:v4i32:$Vm)
    8502             : /*18049*/       0, // EndSwitchType
    8503             : /*18050*/     0, /*End of Scope*/
    8504             : /*18051*/   /*SwitchOpcode*/ 79|128,2/*335*/, TARGET_VAL(ISD::SRL),// ->18390
    8505             : /*18055*/     OPC_Scope, 18|128,1/*146*/, /*->18204*/ // 3 children in Scope
    8506             : /*18058*/       OPC_MoveChild0,
    8507             : /*18059*/       OPC_CheckOpcode, TARGET_VAL(ISD::BSWAP),
    8508             : /*18062*/       OPC_MoveChild0,
    8509             : /*18063*/       OPC_CheckOpcode, TARGET_VAL(ISD::LOAD),
    8510             : /*18066*/       OPC_RecordMemRef,
    8511             : /*18067*/       OPC_RecordNode, // #0 = 'ld' chained node
    8512             : /*18068*/       OPC_CheckFoldableChainNode,
    8513             : /*18069*/       OPC_RecordChild1, // #1 = $addr
    8514             : /*18070*/       OPC_CheckChild1Type, MVT::i32,
    8515             : /*18072*/       OPC_CheckPredicate, 29, // Predicate_unindexedload
    8516             : /*18074*/       OPC_CheckPredicate, 30, // Predicate_extload
    8517             : /*18076*/       OPC_CheckPredicate, 31, // Predicate_extloadi16
    8518             : /*18078*/       OPC_MoveParent,
    8519             : /*18079*/       OPC_MoveParent,
    8520             : /*18080*/       OPC_CheckChild1Integer, 16, 
    8521             : /*18082*/       OPC_CheckChild1Type, MVT::i32,
    8522             : /*18084*/       OPC_CheckType, MVT::i32,
    8523             : /*18086*/       OPC_Scope, 38, /*->18126*/ // 2 children in Scope
    8524             : /*18088*/         OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    8525             : /*18090*/         OPC_CheckComplexPat, /*CP*/4, /*#*/1, // SelectAddrMode3:$addr #2 #3 #4
    8526             : /*18093*/         OPC_EmitMergeInputChains1_0,
    8527             : /*18094*/         OPC_EmitInteger, MVT::i32, 14, 
    8528             : /*18097*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8529             : /*18100*/         OPC_EmitNode1, TARGET_VAL(ARM::LDRH), 0|OPFL_Chain|OPFL_MemRefs,
    8530             :                       MVT::i32, 5/*#Ops*/, 2, 3, 4, 5, 6,  // Results = #7
    8531             : /*18111*/         OPC_EmitInteger, MVT::i32, 14, 
    8532             : /*18114*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8533             : /*18117*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::REV16), 0,
    8534             :                       MVT::i32, 3/*#Ops*/, 7, 8, 9, 
    8535             :                   // Src: (srl:i32 (bswap:i32 (ld:i32 addrmode3:i32:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>), 16:i32) - Complexity = 27
    8536             :                   // Dst: (REV16:i32 (LDRH:i32 addrmode3:i32:$addr))
    8537             : /*18126*/       /*Scope*/ 76, /*->18203*/
    8538             : /*18127*/         OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8539             : /*18129*/         OPC_Scope, 35, /*->18166*/ // 2 children in Scope
    8540             : /*18131*/           OPC_CheckComplexPat, /*CP*/5, /*#*/1, // SelectThumbAddrModeImm5S2:$addr #2 #3
    8541             : /*18134*/           OPC_EmitMergeInputChains1_0,
    8542             : /*18135*/           OPC_EmitInteger, MVT::i32, 14, 
    8543             : /*18138*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8544             : /*18141*/           OPC_EmitNode1, TARGET_VAL(ARM::tLDRHi), 0|OPFL_Chain|OPFL_MemRefs,
    8545             :                         MVT::i32, 4/*#Ops*/, 2, 3, 4, 5,  // Results = #6
    8546             : /*18151*/           OPC_EmitInteger, MVT::i32, 14, 
    8547             : /*18154*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8548             : /*18157*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::tREV16), 0,
    8549             :                         MVT::i32, 3/*#Ops*/, 6, 7, 8, 
    8550             :                     // Src: (srl:i32 (bswap:i32 (ld:i32 t_addrmode_is2:i32:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>), 16:i32) - Complexity = 24
    8551             :                     // Dst: (tREV16:i32 (tLDRHi:i32 t_addrmode_is2:i32:$addr))
    8552             : /*18166*/         /*Scope*/ 35, /*->18202*/
    8553             : /*18167*/           OPC_CheckComplexPat, /*CP*/6, /*#*/1, // SelectThumbAddrModeRR:$addr #2 #3
    8554             : /*18170*/           OPC_EmitMergeInputChains1_0,
    8555             : /*18171*/           OPC_EmitInteger, MVT::i32, 14, 
    8556             : /*18174*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8557             : /*18177*/           OPC_EmitNode1, TARGET_VAL(ARM::tLDRHr), 0|OPFL_Chain|OPFL_MemRefs,
    8558             :                         MVT::i32, 4/*#Ops*/, 2, 3, 4, 5,  // Results = #6
    8559             : /*18187*/           OPC_EmitInteger, MVT::i32, 14, 
    8560             : /*18190*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8561             : /*18193*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::tREV16), 0,
    8562             :                         MVT::i32, 3/*#Ops*/, 6, 7, 8, 
    8563             :                     // Src: (srl:i32 (bswap:i32 (ld:i32 t_addrmode_rr:i32:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>), 16:i32) - Complexity = 24
    8564             :                     // Dst: (tREV16:i32 (tLDRHr:i32 t_addrmode_rr:i32:$addr))
    8565             : /*18202*/         0, /*End of Scope*/
    8566             : /*18203*/       0, /*End of Scope*/
    8567             : /*18204*/     /*Scope*/ 56, /*->18261*/
    8568             : /*18205*/       OPC_RecordNode, // #0 = $src
    8569             : /*18206*/       OPC_CheckType, MVT::i32,
    8570             : /*18208*/       OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8571             : /*18210*/       OPC_Scope, 24, /*->18236*/ // 2 children in Scope
    8572             : /*18212*/         OPC_CheckComplexPat, /*CP*/7, /*#*/0, // SelectShiftRegShifterOperand:$src #1 #2 #3
    8573             : /*18215*/         OPC_EmitInteger, MVT::i32, 14, 
    8574             : /*18218*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8575             : /*18221*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8576             : /*18224*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsr), 0,
    8577             :                       MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, 
    8578             :                   // Src: shift_so_reg_reg:i32:$src - Complexity = 12
    8579             :                   // Dst: (MOVsr:i32 shift_so_reg_reg:i32:$src)
    8580             : /*18236*/       /*Scope*/ 23, /*->18260*/
    8581             : /*18237*/         OPC_CheckComplexPat, /*CP*/8, /*#*/0, // SelectShiftImmShifterOperand:$src #1 #2
    8582             : /*18240*/         OPC_EmitInteger, MVT::i32, 14, 
    8583             : /*18243*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8584             : /*18246*/         OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8585             : /*18249*/         OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsi), 0,
    8586             :                       MVT::i32, 5/*#Ops*/, 1, 2, 3, 4, 5, 
    8587             :                   // Src: shift_so_reg_imm:i32:$src - Complexity = 9
    8588             :                   // Dst: (MOVsi:i32 shift_so_reg_imm:i32:$src)
    8589             : /*18260*/       0, /*End of Scope*/
    8590             : /*18261*/     /*Scope*/ 127, /*->18389*/
    8591             : /*18262*/       OPC_RecordChild0, // #0 = $Rm
    8592             : /*18263*/       OPC_RecordChild1, // #1 = $imm5
    8593             : /*18264*/       OPC_Scope, 69, /*->18335*/ // 2 children in Scope
    8594             : /*18266*/         OPC_MoveChild1,
    8595             : /*18267*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8596             : /*18270*/         OPC_CheckPredicate, 32, // Predicate_imm_sr
    8597             : /*18272*/         OPC_CheckType, MVT::i32,
    8598             : /*18274*/         OPC_MoveParent,
    8599             : /*18275*/         OPC_CheckType, MVT::i32,
    8600             : /*18277*/         OPC_Scope, 27, /*->18306*/ // 2 children in Scope
    8601             : /*18279*/           OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8602             : /*18281*/           OPC_EmitRegister, MVT::i32, ARM::CPSR,
    8603             : /*18284*/           OPC_EmitConvertToTarget, 1,
    8604             : /*18286*/           OPC_EmitNodeXForm, 11, 3, // imm_sr_XFORM
    8605             : /*18289*/           OPC_EmitInteger, MVT::i32, 14, 
    8606             : /*18292*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8607             : /*18295*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::tLSRri), 0,
    8608             :                         MVT::i32, 5/*#Ops*/, 2, 0, 4, 5, 6, 
    8609             :                     // Src: (srl:i32 tGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm_sr>><<X:imm_sr_XFORM>>:$imm5) - Complexity = 7
    8610             :                     // Dst: (tLSRri:i32 tGPR:i32:$Rm, (imm_sr_XFORM:i32 (imm:i32):$imm5))
    8611             : /*18306*/         /*Scope*/ 27, /*->18334*/
    8612             : /*18307*/           OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8613             : /*18309*/           OPC_EmitConvertToTarget, 1,
    8614             : /*18311*/           OPC_EmitNodeXForm, 11, 2, // imm_sr_XFORM
    8615             : /*18314*/           OPC_EmitInteger, MVT::i32, 14, 
    8616             : /*18317*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8617             : /*18320*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8618             : /*18323*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2LSRri), 0,
    8619             :                         MVT::i32, 5/*#Ops*/, 0, 3, 4, 5, 6, 
    8620             :                     // Src: (srl:i32 rGPR:i32:$Rm, (imm:i32)<<P:Predicate_imm_sr>><<X:imm_sr_XFORM>>:$imm) - Complexity = 7
    8621             :                     // Dst: (t2LSRri:i32 rGPR:i32:$Rm, (imm_sr_XFORM:i32 (imm:i32):$imm))
    8622             : /*18334*/         0, /*End of Scope*/
    8623             : /*18335*/       /*Scope*/ 52, /*->18388*/
    8624             : /*18336*/         OPC_CheckChild1Type, MVT::i32,
    8625             : /*18338*/         OPC_CheckType, MVT::i32,
    8626             : /*18340*/         OPC_Scope, 22, /*->18364*/ // 2 children in Scope
    8627             : /*18342*/           OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8628             : /*18344*/           OPC_EmitRegister, MVT::i32, ARM::CPSR,
    8629             : /*18347*/           OPC_EmitInteger, MVT::i32, 14, 
    8630             : /*18350*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8631             : /*18353*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::tLSRrr), 0,
    8632             :                         MVT::i32, 5/*#Ops*/, 2, 0, 1, 3, 4, 
    8633             :                     // Src: (srl:i32 tGPR:i32:$Rn, tGPR:i32:$Rm) - Complexity = 3
    8634             :                     // Dst: (tLSRrr:i32 tGPR:i32:$Rn, tGPR:i32:$Rm)
    8635             : /*18364*/         /*Scope*/ 22, /*->18387*/
    8636             : /*18365*/           OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
    8637             : /*18367*/           OPC_EmitInteger, MVT::i32, 14, 
    8638             : /*18370*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8639             : /*18373*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8640             : /*18376*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::t2LSRrr), 0,
    8641             :                         MVT::i32, 5/*#Ops*/, 0, 1, 2, 3, 4, 
    8642             :                     // Src: (srl:i32 rGPR:i32:$Rn, rGPR:i32:$Rm) - Complexity = 3
    8643             :                     // Dst: (t2LSRrr:i32 rGPR:i32:$Rn, rGPR:i32:$Rm)
    8644             : /*18387*/         0, /*End of Scope*/
    8645             : /*18388*/       0, /*End of Scope*/
    8646             : /*18389*/     0, /*End of Scope*/
    8647             : /*18390*/   /*SwitchOpcode*/ 96|128,18/*2400*/, TARGET_VAL(ISD::STORE),// ->20794
    8648             : /*18394*/     OPC_RecordMemRef,
    8649             : /*18395*/     OPC_RecordNode, // #0 = 'st' chained node
    8650             : /*18396*/     OPC_Scope, 88|128,3/*472*/, /*->18871*/ // 4 children in Scope
    8651             : /*18399*/       OPC_MoveChild1,
    8652             : /*18400*/       OPC_SwitchOpcode /*3 cases */, 12|128,1/*140*/, TARGET_VAL(ISD::SRL),// ->18545
    8653             : /*18405*/         OPC_MoveChild0,
    8654             : /*18406*/         OPC_CheckOpcode, TARGET_VAL(ISD::BSWAP),
    8655             : /*18409*/         OPC_RecordChild0, // #1 = $Rn
    8656             : /*18410*/         OPC_MoveParent,
    8657             : /*18411*/         OPC_CheckChild1Integer, 16, 
    8658             : /*18413*/         OPC_CheckChild1Type, MVT::i32,
    8659             : /*18415*/         OPC_CheckType, MVT::i32,
    8660             : /*18417*/         OPC_MoveParent,
    8661             : /*18418*/         OPC_RecordChild2, // #2 = $addr
    8662             : /*18419*/         OPC_CheckChild2Type, MVT::i32,
    8663             : /*18421*/         OPC_CheckPredicate, 33, // Predicate_unindexedstore
    8664             : /*18423*/         OPC_CheckPredicate, 34, // Predicate_truncstore
    8665             : /*18425*/         OPC_CheckPredicate, 35, // Predicate_truncstorei16
    8666             : /*18427*/         OPC_Scope, 38, /*->18467*/ // 2 children in Scope
    8667             : /*18429*/           OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb())
    8668             : /*18431*/           OPC_CheckComplexPat, /*CP*/4, /*#*/2, // SelectAddrMode3:$addr #3 #4 #5
    8669             : /*18434*/           OPC_EmitMergeInputChains1_0,
    8670             : /*18435*/           OPC_EmitInteger, MVT::i32, 14, 
    8671             : /*18438*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8672             : /*18441*/           OPC_EmitNode1, TARGET_VAL(ARM::REV16), 0,
    8673             :                         MVT::i32, 3/*#Ops*/, 1, 6, 7,  // Results = #8
    8674             : /*18450*/           OPC_EmitInteger, MVT::i32, 14, 
    8675             : /*18453*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8676             : /*18456*/           OPC_MorphNodeTo0, TARGET_VAL(ARM::STRH), 0|OPFL_Chain|OPFL_MemRefs,
    8677             :                         6/*#Ops*/, 8, 3, 4, 5, 9, 10, 
    8678             :                     // Src: (st (srl:i32 (bswap:i32 GPR:i32:$Rn), 16:i32), addrmode3:i32:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> - Complexity = 27
    8679             :                     // Dst: (STRH (REV16:i32 GPR:i32:$Rn), addrmode3:i32:$addr)
    8680             : /*18467*/         /*Scope*/ 76, /*->18544*/
    8681             : /*18468*/           OPC_CheckPatternPredicate, 6, // (Subtarget->isThumb()) && (Subtarget->isThumb1Only())
    8682             : /*18470*/           OPC_Scope, 35, /*->18507*/ // 2 children in Scope
    8683             : /*18472*/             OPC_CheckComplexPat, /*CP*/5, /*#*/2, // SelectThumbAddrModeImm5S2:$addr #3 #4
    8684             : /*18475*/             OPC_EmitMergeInputChains1_0,
    8685             : /*18476*/             OPC_EmitInteger, MVT::i32, 14, 
    8686             : /*18479*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8687             : /*18482*/             OPC_EmitNode1, TARGET_VAL(ARM::tREV16), 0,
    8688             :                           MVT::i32, 3/*#Ops*/, 1, 5, 6,  // Results = #7
    8689             : /*18491*/             OPC_EmitInteger, MVT::i32, 14, 
    8690             : /*18494*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8691             : /*18497*/             OPC_MorphNodeTo0, TARGET_VAL(ARM::tSTRHi), 0|OPFL_Chain|OPFL_MemRefs,
    8692             :                           5/*#Ops*/, 7, 3, 4, 8, 9, 
    8693             :                       // Src: (st (srl:i32 (bswap:i32 tGPR:i32:$Rn), 16:i32), t_addrmode_is2:i32:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> - Complexity = 24
    8694             :                       // Dst: (tSTRHi (tREV16:i32 tGPR:i32:$Rn), t_addrmode_is2:i32:$addr)
    8695             : /*18507*/           /*Scope*/ 35, /*->18543*/
    8696             : /*18508*/             OPC_CheckComplexPat, /*CP*/6, /*#*/2, // SelectThumbAddrModeRR:$addr #3 #4
    8697             : /*18511*/             OPC_EmitMergeInputChains1_0,
    8698             : /*18512*/             OPC_EmitInteger, MVT::i32, 14, 
    8699             : /*18515*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8700             : /*18518*/             OPC_EmitNode1, TARGET_VAL(ARM::tREV16), 0,
    8701             :                           MVT::i32, 3/*#Ops*/, 1, 5, 6,  // Results = #7
    8702             : /*18527*/             OPC_EmitInteger, MVT::i32, 14, 
    8703             : /*18530*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8704             : /*18533*/             OPC_MorphNodeTo0, TARGET_VAL(ARM::tSTRHr), 0|OPFL_Chain|OPFL_MemRefs,
    8705             :                           5/*#Ops*/, 7, 3, 4, 8, 9, 
    8706             :                       // Src: (st (srl:i32 (bswap:i32 tGPR:i32:$Rn), 16:i32), t_addrmode_rr:i32:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> - Complexity = 24
    8707             :                       // Dst: (tSTRHr (tREV16:i32 tGPR:i32:$Rn), t_addrmode_rr:i32:$addr)
    8708             : /*18543*/           0, /*End of Scope*/
    8709             : /*18544*/         0, /*End of Scope*/
    8710             : /*18545*/       /*SwitchOpcode*/ 83|128,1/*211*/, TARGET_VAL(ARMISD::VGETLANEu),// ->18760
    8711             : /*18549*/         OPC_RecordChild0, // #1 = $Vd
    8712             : /*18550*/         OPC_Scope, 51, /*->18603*/ // 4 children in Scope
    8713             : /*18552*/           OPC_CheckChild0Type, MVT::v8i8,
    8714             : /*18554*/           OPC_RecordChild1, // #2 = $lane
    8715             : /*18555*/           OPC_MoveChild1,
    8716             : /*18556*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8717             : /*18559*/           OPC_MoveParent,
    8718             : /*18560*/           OPC_MoveParent,
    8719             : /*18561*/           OPC_RecordChild2, // #3 = $Rn
    8720             : /*18562*/           OPC_RecordChild3, // #4 = $Rm
    8721             : /*18563*/           OPC_CheckChild3Type, MVT::i32,
    8722             : /*18565*/           OPC_CheckPredicate, 34, // Predicate_itruncstore
    8723             : /*18567*/           OPC_CheckPredicate, 36, // Predicate_post_truncst
    8724             : /*18569*/           OPC_CheckPredicate, 37, // Predicate_post_truncsti8
    8725             : /*18571*/           OPC_CheckType, MVT::i32,
    8726             : /*18573*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8727             : /*18575*/           OPC_CheckComplexPat, /*CP*/9, /*#*/3, // SelectAddrMode6:$Rn #5 #6
    8728             : /*18578*/           OPC_CheckComplexPat, /*CP*/10, /*#*/4, // SelectAddrMode6Offset:$Rm #7
    8729             : /*18581*/           OPC_EmitMergeInputChains1_0,
    8730             : /*18582*/           OPC_EmitConvertToTarget, 2,
    8731             : /*18584*/           OPC_EmitInteger, MVT::i32, 14, 
    8732             : /*18587*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8733             : /*18590*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VST1LNd8_UPD), 0|OPFL_Chain|OPFL_MemRefs,
    8734             :                         MVT::i32, 7/*#Ops*/, 5, 6, 7, 1, 8, 9, 10, 
    8735             :                     // Src: (ist:i32 (NEONvgetlaneu:i32 DPR:v8i8:$Vd, (imm:i32):$lane), addrmode6:i32:$Rn, am6offset:i32:$Rm)<<P:Predicate_itruncstore>><<P:Predicate_post_truncst>><<P:Predicate_post_truncsti8>> - Complexity = 25
    8736             :                     // Dst: (VST1LNd8_UPD:i32 addrmode6:i32:$Rn, am6offset:i32:$Rm, DPR:v8i8:$Vd, (imm:i32):$lane)
    8737             : /*18603*/         /*Scope*/ 51, /*->18655*/
    8738             : /*18604*/           OPC_CheckChild0Type, MVT::v4i16,
    8739             : /*18606*/           OPC_RecordChild1, // #2 = $lane
    8740             : /*18607*/           OPC_MoveChild1,
    8741             : /*18608*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8742             : /*18611*/           OPC_MoveParent,
    8743             : /*18612*/           OPC_MoveParent,
    8744             : /*18613*/           OPC_RecordChild2, // #3 = $Rn
    8745             : /*18614*/           OPC_RecordChild3, // #4 = $Rm
    8746             : /*18615*/           OPC_CheckChild3Type, MVT::i32,
    8747             : /*18617*/           OPC_CheckPredicate, 34, // Predicate_itruncstore
    8748             : /*18619*/           OPC_CheckPredicate, 36, // Predicate_post_truncst
    8749             : /*18621*/           OPC_CheckPredicate, 35, // Predicate_post_truncsti16
    8750             : /*18623*/           OPC_CheckType, MVT::i32,
    8751             : /*18625*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8752             : /*18627*/           OPC_CheckComplexPat, /*CP*/9, /*#*/3, // SelectAddrMode6:$Rn #5 #6
    8753             : /*18630*/           OPC_CheckComplexPat, /*CP*/10, /*#*/4, // SelectAddrMode6Offset:$Rm #7
    8754             : /*18633*/           OPC_EmitMergeInputChains1_0,
    8755             : /*18634*/           OPC_EmitConvertToTarget, 2,
    8756             : /*18636*/           OPC_EmitInteger, MVT::i32, 14, 
    8757             : /*18639*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8758             : /*18642*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VST1LNd16_UPD), 0|OPFL_Chain|OPFL_MemRefs,
    8759             :                         MVT::i32, 7/*#Ops*/, 5, 6, 7, 1, 8, 9, 10, 
    8760             :                     // Src: (ist:i32 (NEONvgetlaneu:i32 DPR:v4i16:$Vd, (imm:i32):$lane), addrmode6:i32:$Rn, am6offset:i32:$Rm)<<P:Predicate_itruncstore>><<P:Predicate_post_truncst>><<P:Predicate_post_truncsti16>> - Complexity = 25
    8761             :                     // Dst: (VST1LNd16_UPD:i32 addrmode6:i32:$Rn, am6offset:i32:$Rm, DPR:v4i16:$Vd, (imm:i32):$lane)
    8762             : /*18655*/         /*Scope*/ 51, /*->18707*/
    8763             : /*18656*/           OPC_CheckChild0Type, MVT::v16i8,
    8764             : /*18658*/           OPC_RecordChild1, // #2 = $lane
    8765             : /*18659*/           OPC_MoveChild1,
    8766             : /*18660*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8767             : /*18663*/           OPC_MoveParent,
    8768             : /*18664*/           OPC_MoveParent,
    8769             : /*18665*/           OPC_RecordChild2, // #3 = $addr
    8770             : /*18666*/           OPC_RecordChild3, // #4 = $offset
    8771             : /*18667*/           OPC_CheckChild3Type, MVT::i32,
    8772             : /*18669*/           OPC_CheckPredicate, 34, // Predicate_itruncstore
    8773             : /*18671*/           OPC_CheckPredicate, 36, // Predicate_post_truncst
    8774             : /*18673*/           OPC_CheckPredicate, 37, // Predicate_post_truncsti8
    8775             : /*18675*/           OPC_CheckType, MVT::i32,
    8776             : /*18677*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8777             : /*18679*/           OPC_CheckComplexPat, /*CP*/9, /*#*/3, // SelectAddrMode6:$addr #5 #6
    8778             : /*18682*/           OPC_CheckComplexPat, /*CP*/10, /*#*/4, // SelectAddrMode6Offset:$offset #7
    8779             : /*18685*/           OPC_EmitMergeInputChains1_0,
    8780             : /*18686*/           OPC_EmitConvertToTarget, 2,
    8781             : /*18688*/           OPC_EmitInteger, MVT::i32, 14, 
    8782             : /*18691*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8783             : /*18694*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VST1LNq8Pseudo_UPD), 0|OPFL_Chain|OPFL_MemRefs,
    8784             :                         MVT::i32, 7/*#Ops*/, 5, 6, 7, 1, 8, 9, 10, 
    8785             :                     // Src: (ist:i32 (NEONvgetlaneu:i32 QPR:v16i8:$src, (imm:i32):$lane), addrmode6:i32:$addr, am6offset:i32:$offset)<<P:Predicate_itruncstore>><<P:Predicate_post_truncst>><<P:Predicate_post_truncsti8>> - Complexity = 25
    8786             :                     // Dst: (VST1LNq8Pseudo_UPD:i32 addrmode6:i32:$addr, am6offset:i32:$offset, QPR:v16i8:$src, (imm:i32):$lane)
    8787             : /*18707*/         /*Scope*/ 51, /*->18759*/
    8788             : /*18708*/           OPC_CheckChild0Type, MVT::v8i16,
    8789             : /*18710*/           OPC_RecordChild1, // #2 = $lane
    8790             : /*18711*/           OPC_MoveChild1,
    8791             : /*18712*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8792             : /*18715*/           OPC_MoveParent,
    8793             : /*18716*/           OPC_MoveParent,
    8794             : /*18717*/           OPC_RecordChild2, // #3 = $addr
    8795             : /*18718*/           OPC_RecordChild3, // #4 = $offset
    8796             : /*18719*/           OPC_CheckChild3Type, MVT::i32,
    8797             : /*18721*/           OPC_CheckPredicate, 34, // Predicate_itruncstore
    8798             : /*18723*/           OPC_CheckPredicate, 36, // Predicate_post_truncst
    8799             : /*18725*/           OPC_CheckPredicate, 35, // Predicate_post_truncsti16
    8800             : /*18727*/           OPC_CheckType, MVT::i32,
    8801             : /*18729*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8802             : /*18731*/           OPC_CheckComplexPat, /*CP*/9, /*#*/3, // SelectAddrMode6:$addr #5 #6
    8803             : /*18734*/           OPC_CheckComplexPat, /*CP*/10, /*#*/4, // SelectAddrMode6Offset:$offset #7
    8804             : /*18737*/           OPC_EmitMergeInputChains1_0,
    8805             : /*18738*/           OPC_EmitConvertToTarget, 2,
    8806             : /*18740*/           OPC_EmitInteger, MVT::i32, 14, 
    8807             : /*18743*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8808             : /*18746*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VST1LNq16Pseudo_UPD), 0|OPFL_Chain|OPFL_MemRefs,
    8809             :                         MVT::i32, 7/*#Ops*/, 5, 6, 7, 1, 8, 9, 10, 
    8810             :                     // Src: (ist:i32 (NEONvgetlaneu:i32 QPR:v8i16:$src, (imm:i32):$lane), addrmode6:i32:$addr, am6offset:i32:$offset)<<P:Predicate_itruncstore>><<P:Predicate_post_truncst>><<P:Predicate_post_truncsti16>> - Complexity = 25
    8811             :                     // Dst: (VST1LNq16Pseudo_UPD:i32 addrmode6:i32:$addr, am6offset:i32:$offset, QPR:v8i16:$src, (imm:i32):$lane)
    8812             : /*18759*/         0, /*End of Scope*/
    8813             : /*18760*/       /*SwitchOpcode*/ 107, TARGET_VAL(ISD::EXTRACT_VECTOR_ELT),// ->18870
    8814             : /*18763*/         OPC_RecordChild0, // #1 = $Vd
    8815             : /*18764*/         OPC_Scope, 51, /*->18817*/ // 2 children in Scope
    8816             : /*18766*/           OPC_CheckChild0Type, MVT::v2i32,
    8817             : /*18768*/           OPC_RecordChild1, // #2 = $lane
    8818             : /*18769*/           OPC_MoveChild1,
    8819             : /*18770*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8820             : /*18773*/           OPC_MoveParent,
    8821             : /*18774*/           OPC_CheckType, MVT::i32,
    8822             : /*18776*/           OPC_MoveParent,
    8823             : /*18777*/           OPC_RecordChild2, // #3 = $Rn
    8824             : /*18778*/           OPC_RecordChild3, // #4 = $Rm
    8825             : /*18779*/           OPC_CheckChild3Type, MVT::i32,
    8826             : /*18781*/           OPC_CheckPredicate, 38, // Predicate_istore
    8827             : /*18783*/           OPC_CheckPredicate, 36, // Predicate_post_store
    8828             : /*18785*/           OPC_CheckType, MVT::i32,
    8829             : /*18787*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8830             : /*18789*/           OPC_CheckComplexPat, /*CP*/11, /*#*/3, // SelectAddrMode6:$Rn #5 #6
    8831             : /*18792*/           OPC_CheckComplexPat, /*CP*/10, /*#*/4, // SelectAddrMode6Offset:$Rm #7
    8832             : /*18795*/           OPC_EmitMergeInputChains1_0,
    8833             : /*18796*/           OPC_EmitConvertToTarget, 2,
    8834             : /*18798*/           OPC_EmitInteger, MVT::i32, 14, 
    8835             : /*18801*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8836             : /*18804*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VST1LNd32_UPD), 0|OPFL_Chain|OPFL_MemRefs,
    8837             :                         MVT::i32, 7/*#Ops*/, 5, 6, 7, 1, 8, 9, 10, 
    8838             :                     // Src: (ist:i32 (extractelt:i32 DPR:v2i32:$Vd, (imm:iPTR):$lane), addrmode6oneL32:i32:$Rn, am6offset:i32:$Rm)<<P:Predicate_istore>><<P:Predicate_post_store>> - Complexity = 25
    8839             :                     // Dst: (VST1LNd32_UPD:i32 addrmode6oneL32:i32:$Rn, am6offset:i32:$Rm, DPR:v2i32:$Vd, (imm:i32):$lane)
    8840             : /*18817*/         /*Scope*/ 51, /*->18869*/
    8841             : /*18818*/           OPC_CheckChild0Type, MVT::v4i32,
    8842             : /*18820*/           OPC_RecordChild1, // #2 = $lane
    8843             : /*18821*/           OPC_MoveChild1,
    8844             : /*18822*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8845             : /*18825*/           OPC_MoveParent,
    8846             : /*18826*/           OPC_CheckType, MVT::i32,
    8847             : /*18828*/           OPC_MoveParent,
    8848             : /*18829*/           OPC_RecordChild2, // #3 = $addr
    8849             : /*18830*/           OPC_RecordChild3, // #4 = $offset
    8850             : /*18831*/           OPC_CheckChild3Type, MVT::i32,
    8851             : /*18833*/           OPC_CheckPredicate, 38, // Predicate_istore
    8852             : /*18835*/           OPC_CheckPredicate, 36, // Predicate_post_store
    8853             : /*18837*/           OPC_CheckType, MVT::i32,
    8854             : /*18839*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8855             : /*18841*/           OPC_CheckComplexPat, /*CP*/9, /*#*/3, // SelectAddrMode6:$addr #5 #6
    8856             : /*18844*/           OPC_CheckComplexPat, /*CP*/10, /*#*/4, // SelectAddrMode6Offset:$offset #7
    8857             : /*18847*/           OPC_EmitMergeInputChains1_0,
    8858             : /*18848*/           OPC_EmitConvertToTarget, 2,
    8859             : /*18850*/           OPC_EmitInteger, MVT::i32, 14, 
    8860             : /*18853*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8861             : /*18856*/           OPC_MorphNodeTo1, TARGET_VAL(ARM::VST1LNq32Pseudo_UPD), 0|OPFL_Chain|OPFL_MemRefs,
    8862             :                         MVT::i32, 7/*#Ops*/, 5, 6, 7, 1, 8, 9, 10, 
    8863             :                     // Src: (ist:i32 (extractelt:i32 QPR:v4i32:$src, (imm:iPTR):$lane), addrmode6:i32:$addr, am6offset:i32:$offset)<<P:Predicate_istore>><<P:Predicate_post_store>> - Complexity = 25
    8864             :                     // Dst: (VST1LNq32Pseudo_UPD:i32 addrmode6:i32:$addr, am6offset:i32:$offset, QPR:v4i32:$src, (imm:i32):$lane)
    8865             : /*18869*/         0, /*End of Scope*/
    8866             : /*18870*/       0, // EndSwitchOpcode
    8867             : /*18871*/     /*Scope*/ 125|128,1/*253*/, /*->19126*/
    8868             : /*18873*/       OPC_RecordChild1, // #1 = $src
    8869             : /*18874*/       OPC_CheckChild1Type, MVT::i32,
    8870             : /*18876*/       OPC_RecordChild2, // #2 = $addr
    8871             : /*18877*/       OPC_Scope, 86, /*->18965*/ // 2 children in Scope
    8872             : /*18879*/         OPC_CheckChild2Type, MVT::i32,
    8873             : /*18881*/         OPC_CheckPredicate, 33, // Predicate_unindexedstore
    8874             : /*18883*/         OPC_Scope, 24, /*->18909*/ // 2 children in Scope
    8875             : /*18885*/           OPC_CheckPredicate, 38, // Predicate_store
    8876             : /*18887*/           OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8877             : /*18889*/           OPC_CheckComplexPat, /*CP*/12, /*#*/2, // SelectAddrModePC:$addr #3 #4
    8878             : /*18892*/           OPC_EmitMergeInputChains1_0,
    8879             : /*18893*/           OPC_EmitInteger, MVT::i32, 14, 
    8880             : /*18896*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8881             : /*18899*/           OPC_MorphNodeTo0, TARGET_VAL(ARM::PICSTR), 0|OPFL_Chain|OPFL_MemRefs,
    8882             :                         5/*#Ops*/, 1, 3, 4, 5, 6, 
    8883             :                     // Src: (st GPR:i32:$src, addrmodepc:i32:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 23
    8884             :                     // Dst: (PICSTR GPR:i32:$src, addrmodepc:i32:$addr)
    8885             : /*18909*/         /*Scope*/ 54, /*->18964*/
    8886             : /*18910*/           OPC_CheckPredicate, 34, // Predicate_truncstore
    8887             : /*18912*/           OPC_Scope, 24, /*->18938*/ // 2 children in Scope
    8888             : /*18914*/             OPC_CheckPredicate, 35, // Predicate_truncstorei16
    8889             : /*18916*/             OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8890             : /*18918*/             OPC_CheckComplexPat, /*CP*/12, /*#*/2, // SelectAddrModePC:$addr #3 #4
    8891             : /*18921*/             OPC_EmitMergeInputChains1_0,
    8892             : /*18922*/             OPC_EmitInteger, MVT::i32, 14, 
    8893             : /*18925*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8894             : /*18928*/             OPC_MorphNodeTo0, TARGET_VAL(ARM::PICSTRH), 0|OPFL_Chain|OPFL_MemRefs,
    8895             :                           5/*#Ops*/, 1, 3, 4, 5, 6, 
    8896             :                       // Src: (st GPR:i32:$src, addrmodepc:i32:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> - Complexity = 23
    8897             :                       // Dst: (PICSTRH GPR:i32:$src, addrmodepc:i32:$addr)
    8898             : /*18938*/           /*Scope*/ 24, /*->18963*/
    8899             : /*18939*/             OPC_CheckPredicate, 37, // Predicate_truncstorei8
    8900             : /*18941*/             OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8901             : /*18943*/             OPC_CheckComplexPat, /*CP*/12, /*#*/2, // SelectAddrModePC:$addr #3 #4
    8902             : /*18946*/             OPC_EmitMergeInputChains1_0,
    8903             : /*18947*/             OPC_EmitInteger, MVT::i32, 14, 
    8904             : /*18950*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8905             : /*18953*/             OPC_MorphNodeTo0, TARGET_VAL(ARM::PICSTRB), 0|OPFL_Chain|OPFL_MemRefs,
    8906             :                           5/*#Ops*/, 1, 3, 4, 5, 6, 
    8907             :                       // Src: (st GPR:i32:$src, addrmodepc:i32:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> - Complexity = 23
    8908             :                       // Dst: (PICSTRB GPR:i32:$src, addrmodepc:i32:$addr)
    8909             : /*18963*/           0, /*End of Scope*/
    8910             : /*18964*/         0, /*End of Scope*/
    8911             : /*18965*/       /*Scope*/ 30|128,1/*158*/, /*->19125*/
    8912             : /*18967*/         OPC_RecordChild3, // #3 = $offset
    8913             : /*18968*/         OPC_CheckChild3Type, MVT::i32,
    8914             : /*18970*/         OPC_CheckType, MVT::i32,
    8915             : /*18972*/         OPC_Scope, 57, /*->19031*/ // 2 children in Scope
    8916             : /*18974*/           OPC_CheckPredicate, 38, // Predicate_istore
    8917             : /*18976*/           OPC_CheckPredicate, 36, // Predicate_post_store
    8918             : /*18978*/           OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8919             : /*18980*/           OPC_CheckComplexPat, /*CP*/3, /*#*/2, // SelectAddrOffsetNone:$addr #4
    8920             : /*18983*/           OPC_Scope, 22, /*->19007*/ // 2 children in Scope
    8921             : /*18985*/             OPC_CheckComplexPat, /*CP*/13, /*#*/3, // SelectAddrMode2OffsetReg:$offset #5 #6
    8922             : /*18988*/             OPC_EmitMergeInputChains1_0,
    8923             : /*18989*/             OPC_EmitInteger, MVT::i32, 14, 
    8924             : /*18992*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8925             : /*18995*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::STR_POST_REG), 0|OPFL_Chain|OPFL_MemRefs,
    8926             :                           MVT::i32, 6/*#Ops*/, 1, 4, 5, 6, 7, 8, 
    8927             :                       // Src: (ist:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am2offset_reg:i32:$offset)<<P:Predicate_istore>><<P:Predicate_post_store>> - Complexity = 19
    8928             :                       // Dst: (STR_POST_REG:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am2offset_reg:i32:$offset)
    8929             : /*19007*/           /*Scope*/ 22, /*->19030*/
    8930             : /*19008*/             OPC_CheckComplexPat, /*CP*/14, /*#*/3, // SelectAddrMode2OffsetImm:$offset #5 #6
    8931             : /*19011*/             OPC_EmitMergeInputChains1_0,
    8932             : /*19012*/             OPC_EmitInteger, MVT::i32, 14, 
    8933             : /*19015*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8934             : /*19018*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::STR_POST_IMM), 0|OPFL_Chain|OPFL_MemRefs,
    8935             :                           MVT::i32, 6/*#Ops*/, 1, 4, 5, 6, 7, 8, 
    8936             :                       // Src: (ist:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am2offset_imm:i32:$offset)<<P:Predicate_istore>><<P:Predicate_post_store>> - Complexity = 19
    8937             :                       // Dst: (STR_POST_IMM:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am2offset_imm:i32:$offset)
    8938             : /*19030*/           0, /*End of Scope*/
    8939             : /*19031*/         /*Scope*/ 92, /*->19124*/
    8940             : /*19032*/           OPC_CheckPredicate, 34, // Predicate_itruncstore
    8941             : /*19034*/           OPC_CheckPredicate, 36, // Predicate_post_truncst
    8942             : /*19036*/           OPC_Scope, 55, /*->19093*/ // 2 children in Scope
    8943             : /*19038*/             OPC_CheckPredicate, 37, // Predicate_post_truncsti8
    8944             : /*19040*/             OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8945             : /*19042*/             OPC_CheckComplexPat, /*CP*/3, /*#*/2, // SelectAddrOffsetNone:$addr #4
    8946             : /*19045*/             OPC_Scope, 22, /*->19069*/ // 2 children in Scope
    8947             : /*19047*/               OPC_CheckComplexPat, /*CP*/13, /*#*/3, // SelectAddrMode2OffsetReg:$offset #5 #6
    8948             : /*19050*/               OPC_EmitMergeInputChains1_0,
    8949             : /*19051*/               OPC_EmitInteger, MVT::i32, 14, 
    8950             : /*19054*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8951             : /*19057*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::STRB_POST_REG), 0|OPFL_Chain|OPFL_MemRefs,
    8952             :                             MVT::i32, 6/*#Ops*/, 1, 4, 5, 6, 7, 8, 
    8953             :                         // Src: (ist:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am2offset_reg:i32:$offset)<<P:Predicate_itruncstore>><<P:Predicate_post_truncst>><<P:Predicate_post_truncsti8>> - Complexity = 19
    8954             :                         // Dst: (STRB_POST_REG:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am2offset_reg:i32:$offset)
    8955             : /*19069*/             /*Scope*/ 22, /*->19092*/
    8956             : /*19070*/               OPC_CheckComplexPat, /*CP*/14, /*#*/3, // SelectAddrMode2OffsetImm:$offset #5 #6
    8957             : /*19073*/               OPC_EmitMergeInputChains1_0,
    8958             : /*19074*/               OPC_EmitInteger, MVT::i32, 14, 
    8959             : /*19077*/               OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8960             : /*19080*/               OPC_MorphNodeTo1, TARGET_VAL(ARM::STRB_POST_IMM), 0|OPFL_Chain|OPFL_MemRefs,
    8961             :                             MVT::i32, 6/*#Ops*/, 1, 4, 5, 6, 7, 8, 
    8962             :                         // Src: (ist:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am2offset_imm:i32:$offset)<<P:Predicate_itruncstore>><<P:Predicate_post_truncst>><<P:Predicate_post_truncsti8>> - Complexity = 19
    8963             :                         // Dst: (STRB_POST_IMM:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am2offset_imm:i32:$offset)
    8964             : /*19092*/             0, /*End of Scope*/
    8965             : /*19093*/           /*Scope*/ 29, /*->19123*/
    8966             : /*19094*/             OPC_CheckPredicate, 35, // Predicate_post_truncsti16
    8967             : /*19096*/             OPC_CheckPatternPredicate, 4, // (!Subtarget->isThumb())
    8968             : /*19098*/             OPC_CheckComplexPat, /*CP*/3, /*#*/2, // SelectAddrOffsetNone:$addr #4
    8969             : /*19101*/             OPC_CheckComplexPat, /*CP*/15, /*#*/3, // SelectAddrMode3Offset:$offset #5 #6
    8970             : /*19104*/             OPC_EmitMergeInputChains1_0,
    8971             : /*19105*/             OPC_EmitInteger, MVT::i32, 14, 
    8972             : /*19108*/             OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    8973             : /*19111*/             OPC_MorphNodeTo1, TARGET_VAL(ARM::STRH_POST), 0|OPFL_Chain|OPFL_MemRefs,
    8974             :                           MVT::i32, 6/*#Ops*/, 1, 4, 5, 6, 7, 8, 
    8975             :                       // Src: (ist:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am3offset:i32:$offset)<<P:Predicate_itruncstore>><<P:Predicate_post_truncst>><<P:Predicate_post_truncsti16>> - Complexity = 19
    8976             :                       // Dst: (STRH_POST:i32 GPR:i32:$Rt, addr_offset_none:i32:$addr, am3offset:i32:$offset)
    8977             : /*19123*/           0, /*End of Scope*/
    8978             : /*19124*/         0, /*End of Scope*/
    8979             : /*19125*/       0, /*End of Scope*/
    8980             : /*19126*/     /*Scope*/ 109|128,2/*365*/, /*->19493*/
    8981             : /*19128*/       OPC_MoveChild1,
    8982             : /*19129*/       OPC_SwitchOpcode /*2 cases */, 51|128,1/*179*/, TARGET_VAL(ARMISD::VGETLANEu),// ->19313
    8983             : /*19134*/         OPC_RecordChild0, // #1 = $Vd
    8984             : /*19135*/         OPC_Scope, 43, /*->19180*/ // 4 children in Scope
    8985             : /*19137*/           OPC_CheckChild0Type, MVT::v8i8,
    8986             : /*19139*/           OPC_RecordChild1, // #2 = $lane
    8987             : /*19140*/           OPC_MoveChild1,
    8988             : /*19141*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8989             : /*19144*/           OPC_MoveParent,
    8990             : /*19145*/           OPC_MoveParent,
    8991             : /*19146*/           OPC_RecordChild2, // #3 = $Rn
    8992             : /*19147*/           OPC_CheckChild2Type, MVT::i32,
    8993             : /*19149*/           OPC_CheckPredicate, 33, // Predicate_unindexedstore
    8994             : /*19151*/           OPC_CheckPredicate, 34, // Predicate_truncstore
    8995             : /*19153*/           OPC_CheckPredicate, 37, // Predicate_truncstorei8
    8996             : /*19155*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    8997             : /*19157*/           OPC_CheckComplexPat, /*CP*/9, /*#*/3, // SelectAddrMode6:$Rn #4 #5
    8998             : /*19160*/           OPC_EmitMergeInputChains1_0,
    8999             : /*19161*/           OPC_EmitConvertToTarget, 2,
    9000             : /*19163*/           OPC_EmitInteger, MVT::i32, 14, 
    9001             : /*19166*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    9002             : /*19169*/           OPC_MorphNodeTo0, TARGET_VAL(ARM::VST1LNd8), 0|OPFL_Chain|OPFL_MemRefs,
    9003             :                         6/*#Ops*/, 4, 5, 1, 6, 7, 8, 
    9004             :                     // Src: (st (NEONvgetlaneu:i32 DPR:v8i8:$Vd, (imm:i32):$lane), addrmode6:i32:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> - Complexity = 19
    9005             :                     // Dst: (VST1LNd8 addrmode6:i32:$Rn, DPR:v8i8:$Vd, (imm:i32):$lane)
    9006             : /*19180*/         /*Scope*/ 43, /*->19224*/
    9007             : /*19181*/           OPC_CheckChild0Type, MVT::v4i16,
    9008             : /*19183*/           OPC_RecordChild1, // #2 = $lane
    9009             : /*19184*/           OPC_MoveChild1,
    9010             : /*19185*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    9011             : /*19188*/           OPC_MoveParent,
    9012             : /*19189*/           OPC_MoveParent,
    9013             : /*19190*/           OPC_RecordChild2, // #3 = $Rn
    9014             : /*19191*/           OPC_CheckChild2Type, MVT::i32,
    9015             : /*19193*/           OPC_CheckPredicate, 33, // Predicate_unindexedstore
    9016             : /*19195*/           OPC_CheckPredicate, 34, // Predicate_truncstore
    9017             : /*19197*/           OPC_CheckPredicate, 35, // Predicate_truncstorei16
    9018             : /*19199*/           OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON())
    9019             : /*19201*/           OPC_CheckComplexPat, /*CP*/9, /*#*/3, // SelectAddrMode6:$Rn #4 #5
    9020             : /*19204*/           OPC_EmitMergeInputChains1_0,
    9021             : /*19205*/           OPC_EmitConvertToTarget, 2,
    9022             : /*19207*/           OPC_EmitInteger, MVT::i32, 14, 
    9023             : /*19210*/           OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
    9024             : /*19213*/           OPC_MorphNodeTo0, TARGET_VAL(ARM::VST1LNd16), 0|OPFL_Chain|OPFL_MemRefs,
    9025             :                         6/*#Ops*/, 4, 5, 1, 6, 7, 8, 
    9026             :                     // Src: (st (NEONvgetlaneu:i32 DPR:v4i16:$Vd, (imm:i32):$lane), addrmode6:i32:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> - Complexity = 19
    9027             :                     // Dst: (VST1LNd16 addrmode6:i32:$Rn, DPR:v4i16:$Vd, (imm:i32):$lane)
    9028             : /*19224*/         /*Scope*/ 43, /*->19268*/
    9029             : /*19225*/           OPC_CheckChild0Type, MVT::v16i8,
    9030             : /*19227*/           OPC_RecordChild1, // #2 = $lane
    9031             : /*19228*/           OPC_MoveChild1,
    9032             : /*19229*/           OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    9033             : /*19232*/           OPC_MoveParent,
    9034             : /*19233*/           OPC_MoveParent,
    9035             : /*19234*/           OPC_RecordChild2, // #3 = $addr
    9036             : /*19235*/           OPC_CheckChild2Type, MVT::i32,
    9037             : /*19237*/           OPC_CheckPredicate, 33, // Predicate_unindexedstore
    9038             : /*19239*/           OPC_CheckPredicate, 34, // Predicate_truncstore
    9039             : /*