LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/Lanai - LanaiGenAsmMatcher.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 170 365 46.6 %
Date: 2017-09-14 15:23:50 Functions: 7 9 77.8 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Assembly Matcher Source Fragment                                           *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : 
      10             : #ifdef GET_ASSEMBLER_HEADER
      11             : #undef GET_ASSEMBLER_HEADER
      12             :   // This should be included into the middle of the declaration of
      13             :   // your subclasses implementation of MCTargetAsmParser.
      14             :   uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
      15             :   void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
      16             :                        const OperandVector &Operands);
      17             :   void convertToMapAndConstraints(unsigned Kind,
      18             :                            const OperandVector &Operands) override;
      19             :   unsigned MatchInstructionImpl(const OperandVector &Operands,
      20             :                                 MCInst &Inst,
      21             :                                 uint64_t &ErrorInfo, bool matchingInlineAsm,
      22             :                                 unsigned VariantID = 0);
      23             :   OperandMatchResultTy MatchOperandParserImpl(
      24             :     OperandVector &Operands,
      25             :     StringRef Mnemonic);
      26             :   OperandMatchResultTy tryCustomParseOperand(
      27             :     OperandVector &Operands,
      28             :     unsigned MCK);
      29             : 
      30             : #endif // GET_ASSEMBLER_HEADER_INFO
      31             : 
      32             : 
      33             : #ifdef GET_OPERAND_DIAGNOSTIC_TYPES
      34             : #undef GET_OPERAND_DIAGNOSTIC_TYPES
      35             : 
      36             : #endif // GET_OPERAND_DIAGNOSTIC_TYPES
      37             : 
      38             : 
      39             : #ifdef GET_REGISTER_MATCHER
      40             : #undef GET_REGISTER_MATCHER
      41             : 
      42             : // Flags for subtarget features that participate in instruction matching.
      43             : enum SubtargetFeatureFlag : uint8_t {
      44             :   Feature_None = 0
      45             : };
      46             : 
      47         996 : static unsigned MatchRegisterName(StringRef Name) {
      48         996 :   switch (Name.size()) {
      49             :   default: break;
      50          65 :   case 2:        // 15 strings to match.
      51         130 :     switch (Name[0]) {
      52             :     default: break;
      53           0 :     case 'f':    // 1 string to match.
      54           0 :       if (Name[1] != 'p')
      55             :         break;
      56             :       return 1;  // "fp"
      57           3 :     case 'p':    // 1 string to match.
      58           6 :       if (Name[1] != 'c')
      59             :         break;
      60             :       return 2;  // "pc"
      61          60 :     case 'r':    // 11 strings to match.
      62         120 :       switch (Name[1]) {
      63             :       default: break;
      64             :       case '0':  // 1 string to match.
      65             :         return 7;        // "r0"
      66             :       case '1':  // 1 string to match.
      67             :         return 8;        // "r1"
      68             :       case '2':  // 1 string to match.
      69             :         return 9;        // "r2"
      70             :       case '3':  // 1 string to match.
      71             :         return 10;       // "r3"
      72             :       case '4':  // 1 string to match.
      73             :         return 11;       // "r4"
      74             :       case '5':  // 1 string to match.
      75             :         return 12;       // "r5"
      76             :       case '6':  // 1 string to match.
      77             :         return 13;       // "r6"
      78             :       case '7':  // 1 string to match.
      79             :         return 14;       // "r7"
      80             :       case '8':  // 1 string to match.
      81             :         return 15;       // "r8"
      82             :       case '9':  // 1 string to match.
      83             :         return 16;       // "r9"
      84             :       case 'v':  // 1 string to match.
      85             :         return 4;        // "rv"
      86             :       }
      87             :       break;
      88           0 :     case 's':    // 2 strings to match.
      89           0 :       switch (Name[1]) {
      90             :       default: break;
      91             :       case 'p':  // 1 string to match.
      92             :         return 5;        // "sp"
      93           0 :       case 'w':  // 1 string to match.
      94           0 :         return 6;        // "sw"
      95             :       }
      96             :       break;
      97             :     }
      98             :     break;
      99         929 :   case 3:        // 25 strings to match.
     100        1858 :     if (Name[0] != 'r')
     101             :       break;
     102        1856 :     switch (Name[1]) {
     103             :     default: break;
     104         613 :     case '1':    // 10 strings to match.
     105        1226 :       switch (Name[2]) {
     106             :       default: break;
     107             :       case '0':  // 1 string to match.
     108             :         return 17;       // "r10"
     109             :       case '1':  // 1 string to match.
     110             :         return 18;       // "r11"
     111             :       case '2':  // 1 string to match.
     112             :         return 19;       // "r12"
     113             :       case '3':  // 1 string to match.
     114             :         return 20;       // "r13"
     115             :       case '4':  // 1 string to match.
     116             :         return 21;       // "r14"
     117             :       case '5':  // 1 string to match.
     118             :         return 22;       // "r15"
     119             :       case '6':  // 1 string to match.
     120             :         return 23;       // "r16"
     121             :       case '7':  // 1 string to match.
     122             :         return 24;       // "r17"
     123             :       case '8':  // 1 string to match.
     124             :         return 25;       // "r18"
     125             :       case '9':  // 1 string to match.
     126             :         return 26;       // "r19"
     127             :       }
     128             :       break;
     129         314 :     case '2':    // 10 strings to match.
     130         628 :       switch (Name[2]) {
     131             :       default: break;
     132             :       case '0':  // 1 string to match.
     133             :         return 27;       // "r20"
     134             :       case '1':  // 1 string to match.
     135             :         return 28;       // "r21"
     136             :       case '2':  // 1 string to match.
     137             :         return 29;       // "r22"
     138             :       case '3':  // 1 string to match.
     139             :         return 30;       // "r23"
     140             :       case '4':  // 1 string to match.
     141             :         return 31;       // "r24"
     142             :       case '5':  // 1 string to match.
     143             :         return 32;       // "r25"
     144             :       case '6':  // 1 string to match.
     145             :         return 33;       // "r26"
     146             :       case '7':  // 1 string to match.
     147             :         return 34;       // "r27"
     148             :       case '8':  // 1 string to match.
     149             :         return 35;       // "r28"
     150             :       case '9':  // 1 string to match.
     151             :         return 36;       // "r29"
     152             :       }
     153             :       break;
     154           1 :     case '3':    // 2 strings to match.
     155           2 :       switch (Name[2]) {
     156             :       default: break;
     157             :       case '0':  // 1 string to match.
     158             :         return 37;       // "r30"
     159           0 :       case '1':  // 1 string to match.
     160           0 :         return 38;       // "r31"
     161             :       }
     162             :       break;
     163           0 :     case 'c':    // 1 string to match.
     164           0 :       if (Name[2] != 'a')
     165             :         break;
     166             :       return 3;  // "rca"
     167           0 :     case 'r':    // 2 strings to match.
     168           0 :       switch (Name[2]) {
     169             :       default: break;
     170             :       case '1':  // 1 string to match.
     171             :         return 39;       // "rr1"
     172           0 :       case '2':  // 1 string to match.
     173           0 :         return 40;       // "rr2"
     174             :       }
     175             :       break;
     176             :     }
     177             :     break;
     178             :   }
     179             :   return 0;
     180             : }
     181             : 
     182             : #endif // GET_REGISTER_MATCHER
     183             : 
     184             : 
     185             : #ifdef GET_SUBTARGET_FEATURE_NAME
     186             : #undef GET_SUBTARGET_FEATURE_NAME
     187             : 
     188             : // User-level names for subtarget features that participate in
     189             : // instruction matching.
     190             : static const char *getSubtargetFeatureName(uint64_t Val) {
     191             :   return "(unknown)";
     192             : }
     193             : 
     194             : #endif // GET_SUBTARGET_FEATURE_NAME
     195             : 
     196             : 
     197             : #ifdef GET_MATCHER_IMPLEMENTATION
     198             : #undef GET_MATCHER_IMPLEMENTATION
     199             : 
     200             : namespace {
     201             : enum OperatorConversionKind {
     202             :   CVT_Done,
     203             :   CVT_Reg,
     204             :   CVT_Tied,
     205             :   CVT_95_addImmOperands,
     206             :   CVT_95_Reg,
     207             :   CVT_95_addHiImm16Operands,
     208             :   CVT_95_addLoImm16Operands,
     209             :   CVT_95_addCondCodeOperands,
     210             :   CVT_95_addHiImm16AndOperands,
     211             :   CVT_95_addLoImm16AndOperands,
     212             :   CVT_95_addBrTargetOperands,
     213             :   CVT_95_addMemImmOperands,
     214             :   CVT_95_addMemRegImmOperands,
     215             :   CVT_95_addMemRegRegOperands,
     216             :   CVT_95_addMemSplsOperands,
     217             :   CVT_regR0,
     218             :   CVT_imm_95_0,
     219             :   CVT_regR1,
     220             :   CVT_95_addLoImm21Operands,
     221             :   CVT_95_addImmShiftOperands,
     222             :   CVT_NUM_CONVERTERS
     223             : };
     224             : 
     225             : enum InstructionConversionKind {
     226             :   Convert__Imm1_0__Imm1_1,
     227             :   Convert__Reg1_0__Reg1_1,
     228             :   Convert__Reg1_2__Reg1_0__HiImm161_1,
     229             :   Convert__Reg1_2__Reg1_0__LoImm161_1,
     230             :   Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0,
     231             :   Convert__Reg1_2__Reg1_0__HiImm16And1_1,
     232             :   Convert__Reg1_2__Reg1_0__LoImm16And1_1,
     233             :   Convert__Reg1_1__Imm1_0,
     234             :   Convert__BrTarget1_1__Imm1_0,
     235             :   Convert__Imm1_2__Imm1_0,
     236             :   Convert__Reg1_1__Reg1_3__Imm1_0,
     237             :   Convert__Reg1_0,
     238             :   Convert__BrTarget1_0,
     239             :   Convert__Reg1_1__MemImm1_0,
     240             :   Convert__Reg1_1__MemRegImm3_0,
     241             :   Convert__Reg1_1__MemRegReg3_0,
     242             :   Convert_NoOperands,
     243             :   Convert__Reg1_1__MemSpls3_0,
     244             :   Convert__Reg1_1__Reg1_0,
     245             :   Convert__Reg1_1__Reg1_0__regR0__imm_95_0,
     246             :   Convert__Reg1_1__regR1__HiImm16And1_0,
     247             :   Convert__Reg1_1__regR0__HiImm161_0,
     248             :   Convert__Reg1_1__regR1__LoImm16And1_0,
     249             :   Convert__Reg1_1__regR0__LoImm161_0,
     250             :   Convert__Reg1_1__LoImm211_0,
     251             :   Convert__Reg1_3__Reg1_1__Reg1_2__Imm1_0,
     252             :   Convert__Reg1_2__Reg1_0__ImmShift1_1,
     253             :   Convert__Reg1_0__MemImm1_1,
     254             :   Convert__Reg1_0__MemRegImm3_1,
     255             :   Convert__Reg1_0__MemRegReg3_1,
     256             :   Convert__Reg1_0__MemSpls3_1,
     257             :   CVT_NUM_SIGNATURES
     258             : };
     259             : 
     260             : } // end anonymous namespace
     261             : 
     262             : static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][9] = {
     263             :   // Convert__Imm1_0__Imm1_1
     264             :   { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
     265             :   // Convert__Reg1_0__Reg1_1
     266             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
     267             :   // Convert__Reg1_2__Reg1_0__HiImm161_1
     268             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addHiImm16Operands, 2, CVT_Done },
     269             :   // Convert__Reg1_2__Reg1_0__LoImm161_1
     270             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addLoImm16Operands, 2, CVT_Done },
     271             :   // Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0
     272             :   { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done },
     273             :   // Convert__Reg1_2__Reg1_0__HiImm16And1_1
     274             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addHiImm16AndOperands, 2, CVT_Done },
     275             :   // Convert__Reg1_2__Reg1_0__LoImm16And1_1
     276             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addLoImm16AndOperands, 2, CVT_Done },
     277             :   // Convert__Reg1_1__Imm1_0
     278             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
     279             :   // Convert__BrTarget1_1__Imm1_0
     280             :   { CVT_95_addBrTargetOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
     281             :   // Convert__Imm1_2__Imm1_0
     282             :   { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
     283             :   // Convert__Reg1_1__Reg1_3__Imm1_0
     284             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
     285             :   // Convert__Reg1_0
     286             :   { CVT_95_Reg, 1, CVT_Done },
     287             :   // Convert__BrTarget1_0
     288             :   { CVT_95_addBrTargetOperands, 1, CVT_Done },
     289             :   // Convert__Reg1_1__MemImm1_0
     290             :   { CVT_95_Reg, 2, CVT_95_addMemImmOperands, 1, CVT_Done },
     291             :   // Convert__Reg1_1__MemRegImm3_0
     292             :   { CVT_95_Reg, 2, CVT_95_addMemRegImmOperands, 1, CVT_Done },
     293             :   // Convert__Reg1_1__MemRegReg3_0
     294             :   { CVT_95_Reg, 2, CVT_95_addMemRegRegOperands, 1, CVT_Done },
     295             :   // Convert_NoOperands
     296             :   { CVT_Done },
     297             :   // Convert__Reg1_1__MemSpls3_0
     298             :   { CVT_95_Reg, 2, CVT_95_addMemSplsOperands, 1, CVT_Done },
     299             :   // Convert__Reg1_1__Reg1_0
     300             :   { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
     301             :   // Convert__Reg1_1__Reg1_0__regR0__imm_95_0
     302             :   { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_regR0, 0, CVT_imm_95_0, 0, CVT_Done },
     303             :   // Convert__Reg1_1__regR1__HiImm16And1_0
     304             :   { CVT_95_Reg, 2, CVT_regR1, 0, CVT_95_addHiImm16AndOperands, 1, CVT_Done },
     305             :   // Convert__Reg1_1__regR0__HiImm161_0
     306             :   { CVT_95_Reg, 2, CVT_regR0, 0, CVT_95_addHiImm16Operands, 1, CVT_Done },
     307             :   // Convert__Reg1_1__regR1__LoImm16And1_0
     308             :   { CVT_95_Reg, 2, CVT_regR1, 0, CVT_95_addLoImm16AndOperands, 1, CVT_Done },
     309             :   // Convert__Reg1_1__regR0__LoImm161_0
     310             :   { CVT_95_Reg, 2, CVT_regR0, 0, CVT_95_addLoImm16Operands, 1, CVT_Done },
     311             :   // Convert__Reg1_1__LoImm211_0
     312             :   { CVT_95_Reg, 2, CVT_95_addLoImm21Operands, 1, CVT_Done },
     313             :   // Convert__Reg1_3__Reg1_1__Reg1_2__Imm1_0
     314             :   { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
     315             :   // Convert__Reg1_2__Reg1_0__ImmShift1_1
     316             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmShiftOperands, 2, CVT_Done },
     317             :   // Convert__Reg1_0__MemImm1_1
     318             :   { CVT_95_Reg, 1, CVT_95_addMemImmOperands, 2, CVT_Done },
     319             :   // Convert__Reg1_0__MemRegImm3_1
     320             :   { CVT_95_Reg, 1, CVT_95_addMemRegImmOperands, 2, CVT_Done },
     321             :   // Convert__Reg1_0__MemRegReg3_1
     322             :   { CVT_95_Reg, 1, CVT_95_addMemRegRegOperands, 2, CVT_Done },
     323             :   // Convert__Reg1_0__MemSpls3_1
     324             :   { CVT_95_Reg, 1, CVT_95_addMemSplsOperands, 2, CVT_Done },
     325             : };
     326             : 
     327         481 : void LanaiAsmParser::
     328             : convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
     329             :                 const OperandVector &Operands) {
     330             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
     331         481 :   const uint8_t *Converter = ConversionTable[Kind];
     332             :   unsigned OpIdx;
     333         962 :   Inst.setOpcode(Opcode);
     334        1577 :   for (const uint8_t *p = Converter; *p; p+= 2) {
     335        1096 :     OpIdx = *(p + 1);
     336        1096 :     switch (*p) {
     337           0 :     default: llvm_unreachable("invalid conversion entry!");
     338           0 :     case CVT_Reg:
     339           0 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
     340             :       break;
     341           0 :     case CVT_Tied:
     342           0 :       Inst.addOperand(Inst.getOperand(OpIdx));
     343             :       break;
     344          99 :     case CVT_95_addImmOperands:
     345         297 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
     346             :       break;
     347         573 :     case CVT_95_Reg:
     348        1719 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
     349             :       break;
     350          16 :     case CVT_95_addHiImm16Operands:
     351          48 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addHiImm16Operands(Inst, 1);
     352             :       break;
     353          26 :     case CVT_95_addLoImm16Operands:
     354          78 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addLoImm16Operands(Inst, 1);
     355             :       break;
     356          23 :     case CVT_95_addCondCodeOperands:
     357          69 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addCondCodeOperands(Inst, 1);
     358             :       break;
     359           3 :     case CVT_95_addHiImm16AndOperands:
     360           9 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addHiImm16AndOperands(Inst, 1);
     361             :       break;
     362           3 :     case CVT_95_addLoImm16AndOperands:
     363           9 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addLoImm16AndOperands(Inst, 1);
     364             :       break;
     365          27 :     case CVT_95_addBrTargetOperands:
     366          81 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addBrTargetOperands(Inst, 1);
     367             :       break;
     368           5 :     case CVT_95_addMemImmOperands:
     369          15 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addMemImmOperands(Inst, 1);
     370             :       break;
     371          65 :     case CVT_95_addMemRegImmOperands:
     372         195 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addMemRegImmOperands(Inst, 3);
     373             :       break;
     374         127 :     case CVT_95_addMemRegRegOperands:
     375         381 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addMemRegRegOperands(Inst, 3);
     376             :       break;
     377         102 :     case CVT_95_addMemSplsOperands:
     378         306 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addMemSplsOperands(Inst, 3);
     379             :       break;
     380           7 :     case CVT_regR0:
     381          14 :       Inst.addOperand(MCOperand::createReg(Lanai::R0));
     382             :       break;
     383           1 :     case CVT_imm_95_0:
     384           2 :       Inst.addOperand(MCOperand::createImm(0));
     385             :       break;
     386           2 :     case CVT_regR1:
     387           4 :       Inst.addOperand(MCOperand::createReg(Lanai::R1));
     388             :       break;
     389           1 :     case CVT_95_addLoImm21Operands:
     390           3 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addLoImm21Operands(Inst, 1);
     391             :       break;
     392          16 :     case CVT_95_addImmShiftOperands:
     393          48 :       static_cast<LanaiOperand&>(*Operands[OpIdx]).addImmShiftOperands(Inst, 1);
     394             :       break;
     395             :     }
     396             :   }
     397         481 : }
     398             : 
     399           0 : void LanaiAsmParser::
     400             : convertToMapAndConstraints(unsigned Kind,
     401             :                            const OperandVector &Operands) {
     402             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
     403           0 :   unsigned NumMCOperands = 0;
     404           0 :   const uint8_t *Converter = ConversionTable[Kind];
     405           0 :   for (const uint8_t *p = Converter; *p; p+= 2) {
     406           0 :     switch (*p) {
     407           0 :     default: llvm_unreachable("invalid conversion entry!");
     408           0 :     case CVT_Reg:
     409           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     410           0 :       Operands[*(p + 1)]->setConstraint("r");
     411           0 :       ++NumMCOperands;
     412           0 :       break;
     413           0 :     case CVT_Tied:
     414           0 :       ++NumMCOperands;
     415           0 :       break;
     416           0 :     case CVT_95_addImmOperands:
     417           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     418           0 :       Operands[*(p + 1)]->setConstraint("m");
     419           0 :       NumMCOperands += 1;
     420           0 :       break;
     421           0 :     case CVT_95_Reg:
     422           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     423           0 :       Operands[*(p + 1)]->setConstraint("r");
     424           0 :       NumMCOperands += 1;
     425           0 :       break;
     426           0 :     case CVT_95_addHiImm16Operands:
     427           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     428           0 :       Operands[*(p + 1)]->setConstraint("m");
     429           0 :       NumMCOperands += 1;
     430           0 :       break;
     431           0 :     case CVT_95_addLoImm16Operands:
     432           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     433           0 :       Operands[*(p + 1)]->setConstraint("m");
     434           0 :       NumMCOperands += 1;
     435           0 :       break;
     436           0 :     case CVT_95_addCondCodeOperands:
     437           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     438           0 :       Operands[*(p + 1)]->setConstraint("m");
     439           0 :       NumMCOperands += 1;
     440           0 :       break;
     441           0 :     case CVT_95_addHiImm16AndOperands:
     442           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     443           0 :       Operands[*(p + 1)]->setConstraint("m");
     444           0 :       NumMCOperands += 1;
     445           0 :       break;
     446           0 :     case CVT_95_addLoImm16AndOperands:
     447           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     448           0 :       Operands[*(p + 1)]->setConstraint("m");
     449           0 :       NumMCOperands += 1;
     450           0 :       break;
     451           0 :     case CVT_95_addBrTargetOperands:
     452           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     453           0 :       Operands[*(p + 1)]->setConstraint("m");
     454           0 :       NumMCOperands += 1;
     455           0 :       break;
     456           0 :     case CVT_95_addMemImmOperands:
     457           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     458           0 :       Operands[*(p + 1)]->setConstraint("m");
     459           0 :       NumMCOperands += 1;
     460           0 :       break;
     461           0 :     case CVT_95_addMemRegImmOperands:
     462           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     463           0 :       Operands[*(p + 1)]->setConstraint("m");
     464           0 :       NumMCOperands += 3;
     465           0 :       break;
     466           0 :     case CVT_95_addMemRegRegOperands:
     467           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     468           0 :       Operands[*(p + 1)]->setConstraint("m");
     469           0 :       NumMCOperands += 3;
     470           0 :       break;
     471           0 :     case CVT_95_addMemSplsOperands:
     472           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     473           0 :       Operands[*(p + 1)]->setConstraint("m");
     474           0 :       NumMCOperands += 3;
     475           0 :       break;
     476           0 :     case CVT_regR0:
     477           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     478           0 :       Operands[*(p + 1)]->setConstraint("m");
     479           0 :       ++NumMCOperands;
     480           0 :       break;
     481           0 :     case CVT_imm_95_0:
     482           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     483           0 :       Operands[*(p + 1)]->setConstraint("");
     484           0 :       ++NumMCOperands;
     485           0 :       break;
     486           0 :     case CVT_regR1:
     487           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     488           0 :       Operands[*(p + 1)]->setConstraint("m");
     489           0 :       ++NumMCOperands;
     490           0 :       break;
     491           0 :     case CVT_95_addLoImm21Operands:
     492           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     493           0 :       Operands[*(p + 1)]->setConstraint("m");
     494           0 :       NumMCOperands += 1;
     495           0 :       break;
     496           0 :     case CVT_95_addImmShiftOperands:
     497           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
     498           0 :       Operands[*(p + 1)]->setConstraint("m");
     499           0 :       NumMCOperands += 1;
     500           0 :       break;
     501             :     }
     502             :   }
     503           0 : }
     504             : 
     505             : namespace {
     506             : 
     507             : /// MatchClassKind - The kinds of classes which participate in
     508             : /// instruction matching.
     509             : enum MatchClassKind {
     510             :   InvalidMatchClass = 0,
     511             :   OptionalMatchClass = 1,
     512             :   MCK__EXCLAIM_, // '!'
     513             :   MCK__PCT_fp, // '%fp'
     514             :   MCK__PCT_pc, // '%pc'
     515             :   MCK__MINUS_4, // '-4'
     516             :   MCK__DOT_r, // '.r'
     517             :   MCK__91_, // '['
     518             :   MCK__93_, // ']'
     519             :   MCK_add, // 'add'
     520             :   MCK_return, // 'return'
     521             :   MCK_CCR, // register class 'CCR'
     522             :   MCK_Reg1, // derived register class
     523             :   MCK_GPR, // register class 'GPR'
     524             :   MCK_BrTarget, // user defined class 'BrTargetAsmOperand'
     525             :   MCK_CallTarget, // user defined class 'CallTargetAsmOperand'
     526             :   MCK_CondCode, // user defined class 'CondCodeOperand'
     527             :   MCK_HiImm16And, // user defined class 'HiImm16AndAsmOperand'
     528             :   MCK_HiImm16, // user defined class 'HiImm16AsmOperand'
     529             :   MCK_Imm10, // user defined class 'Imm10AsmOperand'
     530             :   MCK_Imm, // user defined class 'ImmAsmOperand'
     531             :   MCK_ImmShift, // user defined class 'ImmShiftAsmOperand'
     532             :   MCK_LoImm16And, // user defined class 'LoImm16AndAsmOperand'
     533             :   MCK_LoImm16, // user defined class 'LoImm16AsmOperand'
     534             :   MCK_LoImm21, // user defined class 'LoImm21AsmOperand'
     535             :   MCK_MemImm, // user defined class 'MemImmAsmOperand'
     536             :   MCK_MemRegImm, // user defined class 'MemRegImmAsmOperand'
     537             :   MCK_MemRegReg, // user defined class 'MemRegRegAsmOperand'
     538             :   MCK_MemSpls, // user defined class 'MemSplsAsmOperand'
     539             :   NumMatchClassKinds
     540             : };
     541             : 
     542             : }
     543             : 
     544          60 : static MatchClassKind matchTokenString(StringRef Name) {
     545          60 :   switch (Name.size()) {
     546             :   default: break;
     547           0 :   case 1:        // 3 strings to match.
     548           0 :     switch (Name[0]) {
     549             :     default: break;
     550             :     case '!':    // 1 string to match.
     551             :       return MCK__EXCLAIM_;      // "!"
     552           0 :     case '[':    // 1 string to match.
     553           0 :       return MCK__91_;   // "["
     554           0 :     case ']':    // 1 string to match.
     555           0 :       return MCK__93_;   // "]"
     556             :     }
     557             :     break;
     558          60 :   case 2:        // 2 strings to match.
     559         120 :     switch (Name[0]) {
     560             :     default: break;
     561           0 :     case '-':    // 1 string to match.
     562           0 :       if (Name[1] != '4')
     563             :         break;
     564             :       return MCK__MINUS_4;       // "-4"
     565          60 :     case '.':    // 1 string to match.
     566         120 :       if (Name[1] != 'r')
     567             :         break;
     568             :       return MCK__DOT_r;         // ".r"
     569             :     }
     570             :     break;
     571           0 :   case 3:        // 3 strings to match.
     572           0 :     switch (Name[0]) {
     573             :     default: break;
     574           0 :     case '%':    // 2 strings to match.
     575           0 :       switch (Name[1]) {
     576             :       default: break;
     577           0 :       case 'f':  // 1 string to match.
     578           0 :         if (Name[2] != 'p')
     579             :           break;
     580             :         return MCK__PCT_fp;      // "%fp"
     581           0 :       case 'p':  // 1 string to match.
     582           0 :         if (Name[2] != 'c')
     583             :           break;
     584             :         return MCK__PCT_pc;      // "%pc"
     585             :       }
     586             :       break;
     587           0 :     case 'a':    // 1 string to match.
     588           0 :       if (memcmp(Name.data()+1, "dd", 2) != 0)
     589             :         break;
     590             :       return MCK_add;    // "add"
     591             :     }
     592             :     break;
     593           0 :   case 6:        // 1 string to match.
     594           0 :     if (memcmp(Name.data()+0, "return", 6) != 0)
     595             :       break;
     596             :     return MCK_return;   // "return"
     597             :   }
     598             :   return InvalidMatchClass;
     599             : }
     600             : 
     601             : /// isSubclass - Compute whether \p A is a subclass of \p B.
     602             : static bool isSubclass(MatchClassKind A, MatchClassKind B) {
     603        1220 :   if (A == B)
     604             :     return true;
     605             : 
     606          43 :   switch (A) {
     607             :   default:
     608             :     return false;
     609             : 
     610           3 :   case MCK_Reg1:
     611           3 :     return B == MCK_GPR;
     612             :   }
     613             : }
     614             : 
     615        1754 : static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
     616        1754 :   LanaiOperand &Operand = (LanaiOperand&)GOp;
     617        1754 :   if (Kind == InvalidMatchClass)
     618             :     return MCTargetAsmParser::Match_InvalidOperand;
     619             : 
     620        3508 :   if (Operand.isToken())
     621         120 :     return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
     622             :              MCTargetAsmParser::Match_Success :
     623             :              MCTargetAsmParser::Match_InvalidOperand;
     624             : 
     625        1694 :   switch (Kind) {
     626             :   default: break;
     627             :   // 'BrTarget' class
     628          27 :   case MCK_BrTarget:
     629             :     if (Operand.isBrTarget())
     630             :       return MCTargetAsmParser::Match_Success;
     631             :     break;
     632             :   // 'CallTarget' class
     633           0 :   case MCK_CallTarget:
     634           0 :     if (Operand.isCallTarget())
     635             :       return MCTargetAsmParser::Match_Success;
     636             :     break;
     637             :   // 'CondCode' class
     638          23 :   case MCK_CondCode:
     639          46 :     if (Operand.isCondCode())
     640             :       return MCTargetAsmParser::Match_Success;
     641             :     break;
     642             :   // 'HiImm16And' class
     643          13 :   case MCK_HiImm16And:
     644          13 :     if (Operand.isHiImm16And())
     645             :       return MCTargetAsmParser::Match_Success;
     646             :     break;
     647             :   // 'HiImm16' class
     648          44 :   case MCK_HiImm16:
     649          44 :     if (Operand.isHiImm16())
     650             :       return MCTargetAsmParser::Match_Success;
     651             :     break;
     652             :   // 'Imm10' class
     653           0 :   case MCK_Imm10:
     654           0 :     if (Operand.isImm10())
     655             :       return MCTargetAsmParser::Match_Success;
     656             :     break;
     657             :   // 'Imm' class
     658         160 :   case MCK_Imm:
     659         160 :     if (Operand.isImm())
     660             :       return MCTargetAsmParser::Match_Success;
     661             :     break;
     662             :   // 'ImmShift' class
     663          16 :   case MCK_ImmShift:
     664          32 :     if (Operand.isImmShift())
     665             :       return MCTargetAsmParser::Match_Success;
     666             :     break;
     667             :   // 'LoImm16And' class
     668           6 :   case MCK_LoImm16And:
     669          12 :     if (Operand.isLoImm16And())
     670             :       return MCTargetAsmParser::Match_Success;
     671             :     break;
     672             :   // 'LoImm16' class
     673          27 :   case MCK_LoImm16:
     674          27 :     if (Operand.isLoImm16())
     675             :       return MCTargetAsmParser::Match_Success;
     676             :     break;
     677             :   // 'LoImm21' class
     678           1 :   case MCK_LoImm21:
     679           1 :     if (Operand.isLoImm21())
     680             :       return MCTargetAsmParser::Match_Success;
     681             :     break;
     682             :   // 'MemImm' class
     683         119 :   case MCK_MemImm:
     684         119 :     if (Operand.isMemImm())
     685             :       return MCTargetAsmParser::Match_Success;
     686             :     break;
     687             :   // 'MemRegImm' class
     688         132 :   case MCK_MemRegImm:
     689         132 :     if (Operand.isMemRegImm())
     690             :       return MCTargetAsmParser::Match_Success;
     691             :     break;
     692             :   // 'MemRegReg' class
     693         229 :   case MCK_MemRegReg:
     694         229 :     if (Operand.isMemRegReg())
     695             :       return MCTargetAsmParser::Match_Success;
     696             :     break;
     697             :   // 'MemSpls' class
     698         102 :   case MCK_MemSpls:
     699             :     if (Operand.isMemSpls())
     700             :       return MCTargetAsmParser::Match_Success;
     701             :     break;
     702             :   } // end switch (Kind)
     703             : 
     704        1120 :   if (Operand.isReg()) {
     705             :     MatchClassKind OpKind;
     706        1434 :     switch (Operand.getReg()) {
     707             :     default: OpKind = InvalidMatchClass; break;
     708             :     case Lanai::R0: OpKind = MCK_GPR; break;
     709             :     case Lanai::R1: OpKind = MCK_GPR; break;
     710             :     case Lanai::R2: OpKind = MCK_GPR; break;
     711             :     case Lanai::R3: OpKind = MCK_GPR; break;
     712             :     case Lanai::R4: OpKind = MCK_GPR; break;
     713             :     case Lanai::R5: OpKind = MCK_GPR; break;
     714             :     case Lanai::R6: OpKind = MCK_GPR; break;
     715             :     case Lanai::R7: OpKind = MCK_GPR; break;
     716             :     case Lanai::R8: OpKind = MCK_GPR; break;
     717             :     case Lanai::R9: OpKind = MCK_GPR; break;
     718             :     case Lanai::R10: OpKind = MCK_GPR; break;
     719             :     case Lanai::R11: OpKind = MCK_GPR; break;
     720             :     case Lanai::R12: OpKind = MCK_GPR; break;
     721             :     case Lanai::R13: OpKind = MCK_GPR; break;
     722             :     case Lanai::R14: OpKind = MCK_GPR; break;
     723             :     case Lanai::R15: OpKind = MCK_GPR; break;
     724             :     case Lanai::R16: OpKind = MCK_GPR; break;
     725             :     case Lanai::R17: OpKind = MCK_GPR; break;
     726             :     case Lanai::R18: OpKind = MCK_GPR; break;
     727             :     case Lanai::R19: OpKind = MCK_GPR; break;
     728             :     case Lanai::R20: OpKind = MCK_GPR; break;
     729             :     case Lanai::R21: OpKind = MCK_GPR; break;
     730             :     case Lanai::R22: OpKind = MCK_GPR; break;
     731             :     case Lanai::R23: OpKind = MCK_GPR; break;
     732             :     case Lanai::R24: OpKind = MCK_GPR; break;
     733             :     case Lanai::R25: OpKind = MCK_GPR; break;
     734             :     case Lanai::R26: OpKind = MCK_GPR; break;
     735             :     case Lanai::R27: OpKind = MCK_GPR; break;
     736             :     case Lanai::R28: OpKind = MCK_GPR; break;
     737             :     case Lanai::R29: OpKind = MCK_GPR; break;
     738             :     case Lanai::R30: OpKind = MCK_GPR; break;
     739             :     case Lanai::R31: OpKind = MCK_GPR; break;
     740             :     case Lanai::PC: OpKind = MCK_Reg1; break;
     741             :     case Lanai::SP: OpKind = MCK_Reg1; break;
     742             :     case Lanai::FP: OpKind = MCK_Reg1; break;
     743             :     case Lanai::RV: OpKind = MCK_Reg1; break;
     744             :     case Lanai::RR1: OpKind = MCK_Reg1; break;
     745             :     case Lanai::RR2: OpKind = MCK_Reg1; break;
     746             :     case Lanai::RCA: OpKind = MCK_Reg1; break;
     747             :     case Lanai::SR: OpKind = MCK_CCR; break;
     748             :     }
     749           3 :     return isSubclass(OpKind, Kind) ? MCTargetAsmParser::Match_Success :
     750             :                                       MCTargetAsmParser::Match_InvalidOperand;
     751             :   }
     752             : 
     753             :   return MCTargetAsmParser::Match_InvalidOperand;
     754             : }
     755             : 
     756             : uint64_t LanaiAsmParser::
     757             : ComputeAvailableFeatures(const FeatureBitset& FB) const {
     758           4 :   uint64_t Features = 0;
     759             :   return Features;
     760             : }
     761             : 
     762             : static const char *const MnemonicTable =
     763             :     "\021#ADJCALLSTACKDOWN\017#ADJCALLSTACKUP\014#ADJDYNALLOC\003add\005add."
     764             :     "f\004addc\006addc.f\003and\005and.f\001b\002bt\002ld\004ld.b\004ld.h\005"
     765             :     "leadz\005log_0\005log_1\005log_2\005log_3\005log_4\003mov\003nop\002or\004"
     766             :     "or.f\004popc\001s\004sel.\002sh\004sh.f\003sha\005sha.f\002st\004st.b\004"
     767             :     "st.h\003sub\005sub.f\004subb\006subb.f\006trailz\003uld\005uld.b\005uld"
     768             :     ".h\003xor\005xor.f";
     769             : 
     770             : namespace {
     771             :   struct MatchEntry {
     772             :     uint8_t Mnemonic;
     773             :     uint16_t Opcode;
     774             :     uint8_t ConvertFn;
     775             :     uint8_t RequiredFeatures;
     776             :     uint8_t Classes[7];
     777             :     StringRef getMnemonic() const {
     778        5448 :       return StringRef(MnemonicTable + Mnemonic + 1,
     779        5448 :                        MnemonicTable[Mnemonic]);
     780             :     }
     781             :   };
     782             : 
     783             :   // Predicate for searching for an opcode.
     784             :   struct LessOpcode {
     785             :     bool operator()(const MatchEntry &LHS, StringRef RHS) {
     786        6244 :       return LHS.getMnemonic() < RHS;
     787             :     }
     788             :     bool operator()(StringRef LHS, const MatchEntry &RHS) {
     789        4652 :       return LHS < RHS.getMnemonic();
     790             :     }
     791             :     bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
     792             :       return LHS.getMnemonic() < RHS.getMnemonic();
     793             :     }
     794             :   };
     795             : } // end anonymous namespace.
     796             : 
     797             : static const MatchEntry MatchTable0[] = {
     798             :   { 0 /* #ADJCALLSTACKDOWN */, Lanai::ADJCALLSTACKDOWN, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
     799             :   { 18 /* #ADJCALLSTACKUP */, Lanai::ADJCALLSTACKUP, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
     800             :   { 34 /* #ADJDYNALLOC */, Lanai::ADJDYNALLOC, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR, MCK_GPR }, },
     801             :   { 47 /* add */, Lanai::ADD_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     802             :   { 47 /* add */, Lanai::ADD_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     803             :   { 47 /* add */, Lanai::ADD_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     804             :   { 51 /* add.f */, Lanai::ADD_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     805             :   { 51 /* add.f */, Lanai::ADD_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     806             :   { 51 /* add.f */, Lanai::ADD_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     807             :   { 57 /* addc */, Lanai::ADDC_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     808             :   { 57 /* addc */, Lanai::ADDC_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     809             :   { 57 /* addc */, Lanai::ADDC_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     810             :   { 62 /* addc.f */, Lanai::ADDC_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     811             :   { 62 /* addc.f */, Lanai::ADDC_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     812             :   { 62 /* addc.f */, Lanai::ADDC_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     813             :   { 69 /* and */, Lanai::AND_I_HI, Convert__Reg1_2__Reg1_0__HiImm16And1_1, 0, { MCK_GPR, MCK_HiImm16And, MCK_GPR }, },
     814             :   { 69 /* and */, Lanai::AND_I_LO, Convert__Reg1_2__Reg1_0__LoImm16And1_1, 0, { MCK_GPR, MCK_LoImm16And, MCK_GPR }, },
     815             :   { 69 /* and */, Lanai::AND_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     816             :   { 73 /* and.f */, Lanai::AND_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm16And1_1, 0, { MCK_GPR, MCK_HiImm16And, MCK_GPR }, },
     817             :   { 73 /* and.f */, Lanai::AND_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm16And1_1, 0, { MCK_GPR, MCK_LoImm16And, MCK_GPR }, },
     818             :   { 73 /* and.f */, Lanai::AND_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     819             :   { 79 /* b */, Lanai::BRIND_CC, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GPR }, },
     820             :   { 79 /* b */, Lanai::BRCC, Convert__BrTarget1_1__Imm1_0, 0, { MCK_Imm, MCK_BrTarget }, },
     821             :   { 79 /* b */, Lanai::BRR, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__DOT_r, MCK_Imm }, },
     822             :   { 79 /* b */, Lanai::BRIND_CCA, Convert__Reg1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_GPR, MCK_add, MCK_GPR }, },
     823             :   { 81 /* bt */, Lanai::JR, Convert__Reg1_0, 0, { MCK_GPR }, },
     824             :   { 81 /* bt */, Lanai::BT, Convert__BrTarget1_0, 0, { MCK_BrTarget }, },
     825             :   { 84 /* ld */, Lanai::LDADDR, Convert__Reg1_1__MemImm1_0, 0, { MCK_MemImm, MCK_GPR }, },
     826             :   { 84 /* ld */, Lanai::LDW_RI, Convert__Reg1_1__MemRegImm3_0, 0, { MCK_MemRegImm, MCK_GPR }, },
     827             :   { 84 /* ld */, Lanai::LDW_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
     828             :   { 84 /* ld */, Lanai::RET, Convert_NoOperands, 0, { MCK__MINUS_4, MCK__91_, MCK__PCT_fp, MCK__93_, MCK__PCT_pc, MCK__EXCLAIM_, MCK_return }, },
     829             :   { 87 /* ld.b */, Lanai::LDBs_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
     830             :   { 87 /* ld.b */, Lanai::LDBs_RI, Convert__Reg1_1__MemSpls3_0, 0, { MCK_MemSpls, MCK_GPR }, },
     831             :   { 92 /* ld.h */, Lanai::LDHs_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
     832             :   { 92 /* ld.h */, Lanai::LDHs_RI, Convert__Reg1_1__MemSpls3_0, 0, { MCK_MemSpls, MCK_GPR }, },
     833             :   { 97 /* leadz */, Lanai::LEADZ, Convert__Reg1_1__Reg1_0, 0, { MCK_GPR, MCK_GPR }, },
     834             :   { 103 /* log_0 */, Lanai::LOG0, Convert_NoOperands, 0, {  }, },
     835             :   { 109 /* log_1 */, Lanai::LOG1, Convert_NoOperands, 0, {  }, },
     836             :   { 115 /* log_2 */, Lanai::LOG2, Convert_NoOperands, 0, {  }, },
     837             :   { 121 /* log_3 */, Lanai::LOG3, Convert_NoOperands, 0, {  }, },
     838             :   { 127 /* log_4 */, Lanai::LOG4, Convert_NoOperands, 0, {  }, },
     839             :   { 133 /* mov */, Lanai::ADD_R, Convert__Reg1_1__Reg1_0__regR0__imm_95_0, 0, { MCK_GPR, MCK_GPR }, },
     840             :   { 133 /* mov */, Lanai::AND_I_HI, Convert__Reg1_1__regR1__HiImm16And1_0, 0, { MCK_HiImm16And, MCK_GPR }, },
     841             :   { 133 /* mov */, Lanai::ADD_I_HI, Convert__Reg1_1__regR0__HiImm161_0, 0, { MCK_HiImm16, MCK_GPR }, },
     842             :   { 133 /* mov */, Lanai::AND_I_LO, Convert__Reg1_1__regR1__LoImm16And1_0, 0, { MCK_LoImm16And, MCK_GPR }, },
     843             :   { 133 /* mov */, Lanai::ADD_I_LO, Convert__Reg1_1__regR0__LoImm161_0, 0, { MCK_LoImm16, MCK_GPR }, },
     844             :   { 133 /* mov */, Lanai::SLI, Convert__Reg1_1__LoImm211_0, 0, { MCK_LoImm21, MCK_GPR }, },
     845             :   { 137 /* nop */, Lanai::NOP, Convert_NoOperands, 0, {  }, },
     846             :   { 141 /* or */, Lanai::OR_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     847             :   { 141 /* or */, Lanai::OR_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     848             :   { 141 /* or */, Lanai::OR_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     849             :   { 144 /* or.f */, Lanai::OR_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     850             :   { 144 /* or.f */, Lanai::OR_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     851             :   { 144 /* or.f */, Lanai::OR_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     852             :   { 149 /* popc */, Lanai::POPC, Convert__Reg1_1__Reg1_0, 0, { MCK_GPR, MCK_GPR }, },
     853             :   { 154 /* s */, Lanai::SCC, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GPR }, },
     854             :   { 156 /* sel. */, Lanai::SELECT, Convert__Reg1_3__Reg1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_GPR, MCK_GPR, MCK_GPR }, },
     855             :   { 161 /* sh */, Lanai::SL_I, Convert__Reg1_2__Reg1_0__ImmShift1_1, 0, { MCK_GPR, MCK_ImmShift, MCK_GPR }, },
     856             :   { 161 /* sh */, Lanai::SHL_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     857             :   { 164 /* sh.f */, Lanai::SL_F_I, Convert__Reg1_2__Reg1_0__ImmShift1_1, 0, { MCK_GPR, MCK_ImmShift, MCK_GPR }, },
     858             :   { 164 /* sh.f */, Lanai::SHL_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     859             :   { 169 /* sha */, Lanai::SA_I, Convert__Reg1_2__Reg1_0__ImmShift1_1, 0, { MCK_GPR, MCK_ImmShift, MCK_GPR }, },
     860             :   { 169 /* sha */, Lanai::SRA_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     861             :   { 173 /* sha.f */, Lanai::SA_F_I, Convert__Reg1_2__Reg1_0__ImmShift1_1, 0, { MCK_GPR, MCK_ImmShift, MCK_GPR }, },
     862             :   { 173 /* sha.f */, Lanai::SRA_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     863             :   { 179 /* st */, Lanai::STADDR, Convert__Reg1_0__MemImm1_1, 0, { MCK_GPR, MCK_MemImm }, },
     864             :   { 179 /* st */, Lanai::SW_RI, Convert__Reg1_0__MemRegImm3_1, 0, { MCK_GPR, MCK_MemRegImm }, },
     865             :   { 179 /* st */, Lanai::SW_RR, Convert__Reg1_0__MemRegReg3_1, 0, { MCK_GPR, MCK_MemRegReg }, },
     866             :   { 182 /* st.b */, Lanai::STB_RR, Convert__Reg1_0__MemRegReg3_1, 0, { MCK_GPR, MCK_MemRegReg }, },
     867             :   { 182 /* st.b */, Lanai::STB_RI, Convert__Reg1_0__MemSpls3_1, 0, { MCK_GPR, MCK_MemSpls }, },
     868             :   { 187 /* st.h */, Lanai::STH_RR, Convert__Reg1_0__MemRegReg3_1, 0, { MCK_GPR, MCK_MemRegReg }, },
     869             :   { 187 /* st.h */, Lanai::STH_RI, Convert__Reg1_0__MemSpls3_1, 0, { MCK_GPR, MCK_MemSpls }, },
     870             :   { 192 /* sub */, Lanai::SUB_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     871             :   { 192 /* sub */, Lanai::SUB_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     872             :   { 192 /* sub */, Lanai::SUB_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     873             :   { 196 /* sub.f */, Lanai::SUB_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     874             :   { 196 /* sub.f */, Lanai::SUB_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     875             :   { 196 /* sub.f */, Lanai::SUB_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     876             :   { 202 /* subb */, Lanai::SUBB_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     877             :   { 202 /* subb */, Lanai::SUBB_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     878             :   { 202 /* subb */, Lanai::SUBB_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     879             :   { 207 /* subb.f */, Lanai::SUBB_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     880             :   { 207 /* subb.f */, Lanai::SUBB_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     881             :   { 207 /* subb.f */, Lanai::SUBB_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     882             :   { 214 /* trailz */, Lanai::TRAILZ, Convert__Reg1_1__Reg1_0, 0, { MCK_GPR, MCK_GPR }, },
     883             :   { 221 /* uld */, Lanai::LDW_RI, Convert__Reg1_1__MemRegImm3_0, 0, { MCK_MemRegImm, MCK_GPR }, },
     884             :   { 221 /* uld */, Lanai::LDWz_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
     885             :   { 225 /* uld.b */, Lanai::LDBz_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
     886             :   { 225 /* uld.b */, Lanai::LDBz_RI, Convert__Reg1_1__MemSpls3_0, 0, { MCK_MemSpls, MCK_GPR }, },
     887             :   { 231 /* uld.h */, Lanai::LDHz_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
     888             :   { 231 /* uld.h */, Lanai::LDHz_RI, Convert__Reg1_1__MemSpls3_0, 0, { MCK_MemSpls, MCK_GPR }, },
     889             :   { 237 /* xor */, Lanai::XOR_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     890             :   { 237 /* xor */, Lanai::XOR_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     891             :   { 237 /* xor */, Lanai::XOR_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     892             :   { 241 /* xor.f */, Lanai::XOR_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
     893             :   { 241 /* xor.f */, Lanai::XOR_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
     894             :   { 241 /* xor.f */, Lanai::XOR_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
     895             : };
     896             : 
     897           0 : std::string LanaiMnemonicSpellCheck(StringRef S, uint64_t FBS) {
     898           0 :   const unsigned MaxEditDist = 2;
     899           0 :   std::vector<StringRef> Candidates;
     900           0 :   StringRef Prev = "";
     901           0 :   auto End = std::end(MatchTable0);
     902             : 
     903           0 :   for (auto I = std::begin(MatchTable0); I < End; I++) {
     904             :     // Ignore unsupported instructions.
     905           0 :     if ((FBS & I->RequiredFeatures) != I->RequiredFeatures)
     906           0 :       continue;
     907             : 
     908           0 :     StringRef T = I->getMnemonic();
     909             :     // Avoid recomputing the edit distance for the same string.
     910           0 :     if (T.equals(Prev))
     911           0 :       continue;
     912             : 
     913           0 :     Prev = T;
     914           0 :     unsigned Dist = S.edit_distance(T, false, MaxEditDist);
     915           0 :     if (Dist <= MaxEditDist)
     916           0 :       Candidates.push_back(T);
     917             :   }
     918             : 
     919           0 :   if (Candidates.empty())
     920           0 :     return "";
     921             : 
     922           0 :   std::string Res = ", did you mean: ";
     923           0 :   unsigned i = 0;
     924           0 :   for( ; i < Candidates.size() - 1; i++)
     925           0 :     Res += Candidates[i].str() + ", ";
     926           0 :   return Res + Candidates[i].str() + "?";
     927             : }
     928             : 
     929         481 : unsigned LanaiAsmParser::
     930             : MatchInstructionImpl(const OperandVector &Operands,
     931             :                      MCInst &Inst, uint64_t &ErrorInfo,
     932             :                      bool matchingInlineAsm, unsigned VariantID) {
     933             :   // Eliminate obvious mismatches.
     934         962 :   if (Operands.size() > 8) {
     935           0 :     ErrorInfo = 8;
     936           0 :     return Match_InvalidOperand;
     937             :   }
     938             : 
     939             :   // Get the current feature set.
     940         481 :   uint64_t AvailableFeatures = getAvailableFeatures();
     941             : 
     942             :   // Get the instruction mnemonic, which is the first token.
     943        1924 :   StringRef Mnemonic = ((LanaiOperand&)*Operands[0]).getToken();
     944             : 
     945             :   // Some state to try to produce better error messages.
     946         481 :   bool HadMatchOtherThanFeatures = false;
     947         481 :   bool HadMatchOtherThanPredicate = false;
     948         481 :   unsigned RetCode = Match_InvalidOperand;
     949         481 :   uint64_t MissingFeatures = ~0ULL;
     950             :   // Set ErrorInfo to the operand that mismatches if it is
     951             :   // wrong for all instances of the instruction.
     952         481 :   ErrorInfo = ~0ULL;
     953             :   // Find the appropriate table for this asm variant.
     954             :   const MatchEntry *Start, *End;
     955         481 :   switch (VariantID) {
     956           0 :   default: llvm_unreachable("invalid variant!");
     957         481 :   case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
     958             :   }
     959             :   // Search the table.
     960         962 :   auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
     961             : 
     962             :   // Return a more specific error code if no mnemonics match.
     963         481 :   if (MnemonicRange.first == MnemonicRange.second)
     964             :     return Match_MnemonicFail;
     965             : 
     966         443 :   for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
     967         924 :        it != ie; ++it) {
     968             :     // equal_range guarantees that instruction mnemonic matches.
     969             :     assert(Mnemonic == it->getMnemonic());
     970             :     bool OperandsValid = true;
     971        3546 :     for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 7; ++FormalIdx) {
     972        2235 :       auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
     973        4470 :       if (ActualIdx >= Operands.size()) {
     974         481 :         OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass);
     975           0 :         if (!OperandsValid) ErrorInfo = ActualIdx;
     976             :         break;
     977             :       }
     978        5262 :       MCParsedAsmOperand &Actual = *Operands[ActualIdx];
     979        1754 :       unsigned Diag = validateOperandClass(Actual, Formal);
     980        3065 :       if (Diag == Match_Success) {
     981        1311 :         ++ActualIdx;
     982        1311 :         continue;
     983             :       }
     984             :       // If the generic handler indicates an invalid operand
     985             :       // failure, check for a special case.
     986         443 :       if (Diag == Match_InvalidOperand) {
     987         443 :         Diag = validateTargetOperandClass(Actual, Formal);
     988         443 :         if (Diag == Match_Success) {
     989           0 :           ++ActualIdx;
     990           0 :           continue;
     991             :         }
     992             :       }
     993             :       // If current formal operand wasn't matched and it is optional
     994             :       // then try to match next formal operand
     995         443 :       if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
     996           0 :         continue;
     997             :       }
     998             :       // If this operand is broken for all of the instances of this
     999             :       // mnemonic, keep track of it so we can report loc info.
    1000             :       // If we already had a match that only failed due to a
    1001             :       // target predicate, that diagnostic is preferred.
    1002         886 :       if (!HadMatchOtherThanPredicate &&
    1003         119 :           (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
    1004         443 :         ErrorInfo = ActualIdx;
    1005             :         // InvalidOperand is the default. Prefer specificity.
    1006         443 :         if (Diag != Match_InvalidOperand)
    1007           0 :           RetCode = Diag;
    1008             :       }
    1009             :       // Otherwise, just reject this instance of the mnemonic.
    1010             :       OperandsValid = false;
    1011             :       break;
    1012             :     }
    1013             : 
    1014         924 :     if (!OperandsValid) continue;
    1015         481 :     if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) {
    1016           0 :       HadMatchOtherThanFeatures = true;
    1017           0 :       uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
    1018           0 :       if (countPopulation(NewMissingFeatures) <=
    1019           0 :           countPopulation(MissingFeatures))
    1020           0 :         MissingFeatures = NewMissingFeatures;
    1021           0 :       continue;
    1022             :     }
    1023             : 
    1024         481 :     Inst.clear();
    1025             : 
    1026         962 :     Inst.setOpcode(it->Opcode);
    1027             :     // We have a potential match but have not rendered the operands.
    1028             :     // Check the target predicate to handle any context sensitive
    1029             :     // constraints.
    1030             :     // For example, Ties that are referenced multiple times must be
    1031             :     // checked here to ensure the input is the same for each match
    1032             :     // constraints. If we leave it any later the ties will have been
    1033             :     // canonicalized
    1034             :     unsigned MatchResult;
    1035         481 :     if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
    1036           0 :       Inst.clear();
    1037           0 :       RetCode = MatchResult;
    1038           0 :       HadMatchOtherThanPredicate = true;
    1039           0 :       continue;
    1040             :     }
    1041             : 
    1042         481 :     if (matchingInlineAsm) {
    1043           0 :       convertToMapAndConstraints(it->ConvertFn, Operands);
    1044           0 :       return Match_Success;
    1045             :     }
    1046             : 
    1047             :     // We have selected a definite instruction, convert the parsed
    1048             :     // operands into the appropriate MCInst.
    1049         481 :     convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
    1050             : 
    1051             :     // We have a potential match. Check the target predicate to
    1052             :     // handle any context sensitive constraints.
    1053         481 :     if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
    1054           0 :       Inst.clear();
    1055           0 :       RetCode = MatchResult;
    1056           0 :       HadMatchOtherThanPredicate = true;
    1057           0 :       continue;
    1058             :     }
    1059             : 
    1060             :     return Match_Success;
    1061             :   }
    1062             : 
    1063             :   // Okay, we had no match.  Try to return a useful error code.
    1064           0 :   if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
    1065             :     return RetCode;
    1066             : 
    1067             :   // Missing feature matches return which features were missing
    1068           0 :   ErrorInfo = MissingFeatures;
    1069           0 :   return Match_MissingFeature;
    1070             : }
    1071             : 
    1072             : namespace {
    1073             :   struct OperandMatchEntry {
    1074             :     uint8_t RequiredFeatures;
    1075             :     uint8_t Mnemonic;
    1076             :     uint8_t Class;
    1077             :     uint8_t OperandMask;
    1078             : 
    1079             :     StringRef getMnemonic() const {
    1080        8194 :       return StringRef(MnemonicTable + Mnemonic + 1,
    1081        8194 :                        MnemonicTable[Mnemonic]);
    1082             :     }
    1083             :   };
    1084             : 
    1085             :   // Predicate for searching for an opcode.
    1086             :   struct LessOpcodeOperand {
    1087             :     bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
    1088        9280 :       return LHS.getMnemonic()  < RHS;
    1089             :     }
    1090             :     bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
    1091        7108 :       return LHS < RHS.getMnemonic();
    1092             :     }
    1093             :     bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
    1094             :       return LHS.getMnemonic() < RHS.getMnemonic();
    1095             :     }
    1096             :   };
    1097             : } // end anonymous namespace.
    1098             : 
    1099             : static const OperandMatchEntry OperandMatchTable[20] = {
    1100             :   /* Operand List Mask, Mnemonic, Operand Class, Features */
    1101             :   { 0, 84 /* ld */, MCK_MemImm, 1 /* 0 */ },
    1102             :   { 0, 84 /* ld */, MCK_MemRegImm, 1 /* 0 */ },
    1103             :   { 0, 84 /* ld */, MCK_MemRegReg, 1 /* 0 */ },
    1104             :   { 0, 87 /* ld.b */, MCK_MemRegReg, 1 /* 0 */ },
    1105             :   { 0, 87 /* ld.b */, MCK_MemSpls, 1 /* 0 */ },
    1106             :   { 0, 92 /* ld.h */, MCK_MemRegReg, 1 /* 0 */ },
    1107             :   { 0, 92 /* ld.h */, MCK_MemSpls, 1 /* 0 */ },
    1108             :   { 0, 179 /* st */, MCK_MemImm, 2 /* 1 */ },
    1109             :   { 0, 179 /* st */, MCK_MemRegImm, 2 /* 1 */ },
    1110             :   { 0, 179 /* st */, MCK_MemRegReg, 2 /* 1 */ },
    1111             :   { 0, 182 /* st.b */, MCK_MemRegReg, 2 /* 1 */ },
    1112             :   { 0, 182 /* st.b */, MCK_MemSpls, 2 /* 1 */ },
    1113             :   { 0, 187 /* st.h */, MCK_MemRegReg, 2 /* 1 */ },
    1114             :   { 0, 187 /* st.h */, MCK_MemSpls, 2 /* 1 */ },
    1115             :   { 0, 221 /* uld */, MCK_MemRegImm, 1 /* 0 */ },
    1116             :   { 0, 221 /* uld */, MCK_MemRegReg, 1 /* 0 */ },
    1117             :   { 0, 225 /* uld.b */, MCK_MemRegReg, 1 /* 0 */ },
    1118             :   { 0, 225 /* uld.b */, MCK_MemSpls, 1 /* 0 */ },
    1119             :   { 0, 231 /* uld.h */, MCK_MemRegReg, 1 /* 0 */ },
    1120             :   { 0, 231 /* uld.h */, MCK_MemSpls, 1 /* 0 */ },
    1121             : };
    1122             : 
    1123         299 : OperandMatchResultTy LanaiAsmParser::
    1124             : tryCustomParseOperand(OperandVector &Operands,
    1125             :                       unsigned MCK) {
    1126             : 
    1127         299 :   switch(MCK) {
    1128         119 :   case MCK_MemImm:
    1129         119 :     return parseMemoryOperand(Operands);
    1130          18 :   case MCK_MemRegImm:
    1131          18 :     return parseMemoryOperand(Operands);
    1132         162 :   case MCK_MemRegReg:
    1133         162 :     return parseMemoryOperand(Operands);
    1134           0 :   case MCK_MemSpls:
    1135           0 :     return parseMemoryOperand(Operands);
    1136             :   default:
    1137             :     return MatchOperand_NoMatch;
    1138             :   }
    1139             :   return MatchOperand_NoMatch;
    1140             : }
    1141             : 
    1142         984 : OperandMatchResultTy LanaiAsmParser::
    1143             : MatchOperandParserImpl(OperandVector &Operands,
    1144             :                        StringRef Mnemonic) {
    1145             :   // Get the current feature set.
    1146         984 :   uint64_t AvailableFeatures = getAvailableFeatures();
    1147             : 
    1148             :   // Get the next operand index.
    1149        1968 :   unsigned NextOpNum = Operands.size() - 1;
    1150             :   // Search the table.
    1151             :   auto MnemonicRange =
    1152             :     std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
    1153        1968 :                      Mnemonic, LessOpcodeOperand());
    1154             : 
    1155         984 :   if (MnemonicRange.first == MnemonicRange.second)
    1156             :     return MatchOperand_NoMatch;
    1157             : 
    1158         720 :   for (const OperandMatchEntry *it = MnemonicRange.first,
    1159        1319 :        *ie = MnemonicRange.second; it != ie; ++it) {
    1160             :     // equal_range guarantees that instruction mnemonic matches.
    1161             :     assert(Mnemonic == it->getMnemonic());
    1162             : 
    1163             :     // check if the available features match
    1164        1019 :     if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) {
    1165           0 :       continue;
    1166             :     }
    1167             : 
    1168             :     // check if the operand in question has a custom parser.
    1169        1019 :     if (!(it->OperandMask & (1 << NextOpNum)))
    1170         720 :       continue;
    1171             : 
    1172             :     // call custom parse method to handle the operand
    1173         299 :     OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class);
    1174         299 :     if (Result != MatchOperand_NoMatch)
    1175             :       return Result;
    1176             :   }
    1177             : 
    1178             :   // Okay, we had no match.
    1179             :   return MatchOperand_NoMatch;
    1180             : }
    1181             : 
    1182             : #endif // GET_MATCHER_IMPLEMENTATION
    1183             : 

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