LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/MSP430 - MSP430GenInstrInfo.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 6 6 100.0 %
Date: 2017-09-14 15:23:50 Functions: 1 3 33.3 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Target Instruction Enum Values and Descriptors                             *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : #ifdef GET_INSTRINFO_ENUM
      10             : #undef GET_INSTRINFO_ENUM
      11             : namespace llvm {
      12             : 
      13             : namespace MSP430 {
      14             :   enum {
      15             :     PHI = 0,
      16             :     INLINEASM   = 1,
      17             :     CFI_INSTRUCTION     = 2,
      18             :     EH_LABEL    = 3,
      19             :     GC_LABEL    = 4,
      20             :     ANNOTATION_LABEL    = 5,
      21             :     KILL        = 6,
      22             :     EXTRACT_SUBREG      = 7,
      23             :     INSERT_SUBREG       = 8,
      24             :     IMPLICIT_DEF        = 9,
      25             :     SUBREG_TO_REG       = 10,
      26             :     COPY_TO_REGCLASS    = 11,
      27             :     DBG_VALUE   = 12,
      28             :     REG_SEQUENCE        = 13,
      29             :     COPY        = 14,
      30             :     BUNDLE      = 15,
      31             :     LIFETIME_START      = 16,
      32             :     LIFETIME_END        = 17,
      33             :     STACKMAP    = 18,
      34             :     FENTRY_CALL = 19,
      35             :     PATCHPOINT  = 20,
      36             :     LOAD_STACK_GUARD    = 21,
      37             :     STATEPOINT  = 22,
      38             :     LOCAL_ESCAPE        = 23,
      39             :     FAULTING_OP = 24,
      40             :     PATCHABLE_OP        = 25,
      41             :     PATCHABLE_FUNCTION_ENTER    = 26,
      42             :     PATCHABLE_RET       = 27,
      43             :     PATCHABLE_FUNCTION_EXIT     = 28,
      44             :     PATCHABLE_TAIL_CALL = 29,
      45             :     PATCHABLE_EVENT_CALL        = 30,
      46             :     G_ADD       = 31,
      47             :     G_SUB       = 32,
      48             :     G_MUL       = 33,
      49             :     G_SDIV      = 34,
      50             :     G_UDIV      = 35,
      51             :     G_SREM      = 36,
      52             :     G_UREM      = 37,
      53             :     G_AND       = 38,
      54             :     G_OR        = 39,
      55             :     G_XOR       = 40,
      56             :     G_IMPLICIT_DEF      = 41,
      57             :     G_PHI       = 42,
      58             :     G_FRAME_INDEX       = 43,
      59             :     G_GLOBAL_VALUE      = 44,
      60             :     G_EXTRACT   = 45,
      61             :     G_UNMERGE_VALUES    = 46,
      62             :     G_INSERT    = 47,
      63             :     G_MERGE_VALUES      = 48,
      64             :     G_PTRTOINT  = 49,
      65             :     G_INTTOPTR  = 50,
      66             :     G_BITCAST   = 51,
      67             :     G_LOAD      = 52,
      68             :     G_STORE     = 53,
      69             :     G_BRCOND    = 54,
      70             :     G_BRINDIRECT        = 55,
      71             :     G_INTRINSIC = 56,
      72             :     G_INTRINSIC_W_SIDE_EFFECTS  = 57,
      73             :     G_ANYEXT    = 58,
      74             :     G_TRUNC     = 59,
      75             :     G_CONSTANT  = 60,
      76             :     G_FCONSTANT = 61,
      77             :     G_VASTART   = 62,
      78             :     G_VAARG     = 63,
      79             :     G_SEXT      = 64,
      80             :     G_ZEXT      = 65,
      81             :     G_SHL       = 66,
      82             :     G_LSHR      = 67,
      83             :     G_ASHR      = 68,
      84             :     G_ICMP      = 69,
      85             :     G_FCMP      = 70,
      86             :     G_SELECT    = 71,
      87             :     G_UADDE     = 72,
      88             :     G_USUBE     = 73,
      89             :     G_SADDO     = 74,
      90             :     G_SSUBO     = 75,
      91             :     G_UMULO     = 76,
      92             :     G_SMULO     = 77,
      93             :     G_UMULH     = 78,
      94             :     G_SMULH     = 79,
      95             :     G_FADD      = 80,
      96             :     G_FSUB      = 81,
      97             :     G_FMUL      = 82,
      98             :     G_FMA       = 83,
      99             :     G_FDIV      = 84,
     100             :     G_FREM      = 85,
     101             :     G_FPOW      = 86,
     102             :     G_FEXP      = 87,
     103             :     G_FEXP2     = 88,
     104             :     G_FLOG      = 89,
     105             :     G_FLOG2     = 90,
     106             :     G_FNEG      = 91,
     107             :     G_FPEXT     = 92,
     108             :     G_FPTRUNC   = 93,
     109             :     G_FPTOSI    = 94,
     110             :     G_FPTOUI    = 95,
     111             :     G_SITOFP    = 96,
     112             :     G_UITOFP    = 97,
     113             :     G_GEP       = 98,
     114             :     G_PTR_MASK  = 99,
     115             :     G_BR        = 100,
     116             :     G_INSERT_VECTOR_ELT = 101,
     117             :     G_EXTRACT_VECTOR_ELT        = 102,
     118             :     G_SHUFFLE_VECTOR    = 103,
     119             :     ADC16mi     = 104,
     120             :     ADC16mm     = 105,
     121             :     ADC16mr     = 106,
     122             :     ADC16ri     = 107,
     123             :     ADC16rm     = 108,
     124             :     ADC16rr     = 109,
     125             :     ADC8mi      = 110,
     126             :     ADC8mm      = 111,
     127             :     ADC8mr      = 112,
     128             :     ADC8ri      = 113,
     129             :     ADC8rm      = 114,
     130             :     ADC8rr      = 115,
     131             :     ADD16mi     = 116,
     132             :     ADD16mm     = 117,
     133             :     ADD16mr     = 118,
     134             :     ADD16ri     = 119,
     135             :     ADD16rm     = 120,
     136             :     ADD16rm_POST        = 121,
     137             :     ADD16rr     = 122,
     138             :     ADD8mi      = 123,
     139             :     ADD8mm      = 124,
     140             :     ADD8mr      = 125,
     141             :     ADD8ri      = 126,
     142             :     ADD8rm      = 127,
     143             :     ADD8rm_POST = 128,
     144             :     ADD8rr      = 129,
     145             :     ADDframe    = 130,
     146             :     ADJCALLSTACKDOWN    = 131,
     147             :     ADJCALLSTACKUP      = 132,
     148             :     AND16mi     = 133,
     149             :     AND16mm     = 134,
     150             :     AND16mr     = 135,
     151             :     AND16ri     = 136,
     152             :     AND16rm     = 137,
     153             :     AND16rm_POST        = 138,
     154             :     AND16rr     = 139,
     155             :     AND8mi      = 140,
     156             :     AND8mm      = 141,
     157             :     AND8mr      = 142,
     158             :     AND8ri      = 143,
     159             :     AND8rm      = 144,
     160             :     AND8rm_POST = 145,
     161             :     AND8rr      = 146,
     162             :     BIC16mm     = 147,
     163             :     BIC16mr     = 148,
     164             :     BIC16rm     = 149,
     165             :     BIC16rr     = 150,
     166             :     BIC8mm      = 151,
     167             :     BIC8mr      = 152,
     168             :     BIC8rm      = 153,
     169             :     BIC8rr      = 154,
     170             :     BIT16mi     = 155,
     171             :     BIT16mm     = 156,
     172             :     BIT16mr     = 157,
     173             :     BIT16ri     = 158,
     174             :     BIT16rm     = 159,
     175             :     BIT16rr     = 160,
     176             :     BIT8mi      = 161,
     177             :     BIT8mm      = 162,
     178             :     BIT8mr      = 163,
     179             :     BIT8ri      = 164,
     180             :     BIT8rm      = 165,
     181             :     BIT8rr      = 166,
     182             :     Bi  = 167,
     183             :     Bm  = 168,
     184             :     Br  = 169,
     185             :     CALLi       = 170,
     186             :     CALLm       = 171,
     187             :     CALLr       = 172,
     188             :     CMP16mi     = 173,
     189             :     CMP16mr     = 174,
     190             :     CMP16ri     = 175,
     191             :     CMP16rm     = 176,
     192             :     CMP16rr     = 177,
     193             :     CMP8mi      = 178,
     194             :     CMP8mr      = 179,
     195             :     CMP8ri      = 180,
     196             :     CMP8rm      = 181,
     197             :     CMP8rr      = 182,
     198             :     JCC = 183,
     199             :     JMP = 184,
     200             :     MOV16mi     = 185,
     201             :     MOV16mm     = 186,
     202             :     MOV16mr     = 187,
     203             :     MOV16ri     = 188,
     204             :     MOV16rm     = 189,
     205             :     MOV16rm_POST        = 190,
     206             :     MOV16rr     = 191,
     207             :     MOV8mi      = 192,
     208             :     MOV8mm      = 193,
     209             :     MOV8mr      = 194,
     210             :     MOV8ri      = 195,
     211             :     MOV8rm      = 196,
     212             :     MOV8rm_POST = 197,
     213             :     MOV8rr      = 198,
     214             :     MOVZX16rm8  = 199,
     215             :     MOVZX16rr8  = 200,
     216             :     NOP = 201,
     217             :     OR16mi      = 202,
     218             :     OR16mm      = 203,
     219             :     OR16mr      = 204,
     220             :     OR16ri      = 205,
     221             :     OR16rm      = 206,
     222             :     OR16rm_POST = 207,
     223             :     OR16rr      = 208,
     224             :     OR8mi       = 209,
     225             :     OR8mm       = 210,
     226             :     OR8mr       = 211,
     227             :     OR8ri       = 212,
     228             :     OR8rm       = 213,
     229             :     OR8rm_POST  = 214,
     230             :     OR8rr       = 215,
     231             :     POP16r      = 216,
     232             :     PUSH16r     = 217,
     233             :     RET = 218,
     234             :     RETI        = 219,
     235             :     SAR16r1     = 220,
     236             :     SAR16r1c    = 221,
     237             :     SAR8r1      = 222,
     238             :     SAR8r1c     = 223,
     239             :     SBC16mi     = 224,
     240             :     SBC16mm     = 225,
     241             :     SBC16mr     = 226,
     242             :     SBC16ri     = 227,
     243             :     SBC16rm     = 228,
     244             :     SBC16rr     = 229,
     245             :     SBC8mi      = 230,
     246             :     SBC8mm      = 231,
     247             :     SBC8mr      = 232,
     248             :     SBC8ri      = 233,
     249             :     SBC8rm      = 234,
     250             :     SBC8rr      = 235,
     251             :     SEXT16r     = 236,
     252             :     SHL16r1     = 237,
     253             :     SHL8r1      = 238,
     254             :     SUB16mi     = 239,
     255             :     SUB16mm     = 240,
     256             :     SUB16mr     = 241,
     257             :     SUB16ri     = 242,
     258             :     SUB16rm     = 243,
     259             :     SUB16rm_POST        = 244,
     260             :     SUB16rr     = 245,
     261             :     SUB8mi      = 246,
     262             :     SUB8mm      = 247,
     263             :     SUB8mr      = 248,
     264             :     SUB8ri      = 249,
     265             :     SUB8rm      = 250,
     266             :     SUB8rm_POST = 251,
     267             :     SUB8rr      = 252,
     268             :     SWPB16r     = 253,
     269             :     Select16    = 254,
     270             :     Select8     = 255,
     271             :     Shl16       = 256,
     272             :     Shl8        = 257,
     273             :     Sra16       = 258,
     274             :     Sra8        = 259,
     275             :     Srl16       = 260,
     276             :     Srl8        = 261,
     277             :     XOR16mi     = 262,
     278             :     XOR16mm     = 263,
     279             :     XOR16mr     = 264,
     280             :     XOR16ri     = 265,
     281             :     XOR16rm     = 266,
     282             :     XOR16rm_POST        = 267,
     283             :     XOR16rr     = 268,
     284             :     XOR8mi      = 269,
     285             :     XOR8mm      = 270,
     286             :     XOR8mr      = 271,
     287             :     XOR8ri      = 272,
     288             :     XOR8rm      = 273,
     289             :     XOR8rm_POST = 274,
     290             :     XOR8rr      = 275,
     291             :     ZEXT16r     = 276,
     292             :     INSTRUCTION_LIST_END = 277
     293             :   };
     294             : 
     295             : namespace Sched {
     296             :   enum {
     297             :     NoInstrModel        = 0,
     298             :     SCHED_LIST_END = 1
     299             :   };
     300             : } // end Sched namespace
     301             : } // end MSP430 namespace
     302             : } // end llvm namespace
     303             : #endif // GET_INSTRINFO_ENUM
     304             : 
     305             : #ifdef GET_INSTRINFO_MC_DESC
     306             : #undef GET_INSTRINFO_MC_DESC
     307             : namespace llvm {
     308             : 
     309             : static const MCPhysReg ImplicitList1[] = { MSP430::SR, 0 };
     310             : static const MCPhysReg ImplicitList2[] = { MSP430::SP, 0 };
     311             : static const MCPhysReg ImplicitList3[] = { MSP430::SP, MSP430::SR, 0 };
     312             : static const MCPhysReg ImplicitList4[] = { MSP430::R11, MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, MSP430::SR, 0 };
     313             : 
     314             : static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     315             : static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     316             : static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     317             : static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     318             : static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     319             : static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     320             : static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     321             : static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     322             : static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     323             : static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     324             : static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     325             : static const MCOperandInfo OperandInfo13[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     326             : static const MCOperandInfo OperandInfo14[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     327             : static const MCOperandInfo OperandInfo15[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     328             : static const MCOperandInfo OperandInfo16[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     329             : static const MCOperandInfo OperandInfo17[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     330             : static const MCOperandInfo OperandInfo18[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     331             : static const MCOperandInfo OperandInfo19[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     332             : static const MCOperandInfo OperandInfo20[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     333             : static const MCOperandInfo OperandInfo21[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     334             : static const MCOperandInfo OperandInfo22[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     335             : static const MCOperandInfo OperandInfo23[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     336             : static const MCOperandInfo OperandInfo24[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     337             : static const MCOperandInfo OperandInfo25[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     338             : static const MCOperandInfo OperandInfo26[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     339             : static const MCOperandInfo OperandInfo27[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     340             : static const MCOperandInfo OperandInfo28[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     341             : static const MCOperandInfo OperandInfo29[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     342             : static const MCOperandInfo OperandInfo30[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     343             : static const MCOperandInfo OperandInfo31[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     344             : static const MCOperandInfo OperandInfo32[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     345             : static const MCOperandInfo OperandInfo33[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     346             : static const MCOperandInfo OperandInfo34[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     347             : static const MCOperandInfo OperandInfo35[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     348             : static const MCOperandInfo OperandInfo36[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     349             : static const MCOperandInfo OperandInfo37[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     350             : static const MCOperandInfo OperandInfo38[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
     351             : static const MCOperandInfo OperandInfo39[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
     352             : static const MCOperandInfo OperandInfo40[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     353             : static const MCOperandInfo OperandInfo41[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     354             : static const MCOperandInfo OperandInfo42[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     355             : static const MCOperandInfo OperandInfo43[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     356             : static const MCOperandInfo OperandInfo44[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     357             : static const MCOperandInfo OperandInfo45[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     358             : static const MCOperandInfo OperandInfo46[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     359             : static const MCOperandInfo OperandInfo47[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     360             : static const MCOperandInfo OperandInfo48[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     361             : static const MCOperandInfo OperandInfo49[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
     362             : static const MCOperandInfo OperandInfo50[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
     363             : static const MCOperandInfo OperandInfo51[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     364             : static const MCOperandInfo OperandInfo52[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     365             : static const MCOperandInfo OperandInfo53[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     366             : static const MCOperandInfo OperandInfo54[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     367             : static const MCOperandInfo OperandInfo55[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     368             : static const MCOperandInfo OperandInfo56[] = { { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     369             : static const MCOperandInfo OperandInfo57[] = { { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { MSP430::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     370             : 
     371             : extern const MCInstrDesc MSP430Insts[] = {
     372             :   { 0,  1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #0 = PHI
     373             :   { 1,  0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1 = INLINEASM
     374             :   { 2,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #2 = CFI_INSTRUCTION
     375             :   { 3,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #3 = EH_LABEL
     376             :   { 4,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #4 = GC_LABEL
     377             :   { 5,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #5 = ANNOTATION_LABEL
     378             :   { 6,  0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #6 = KILL
     379             :   { 7,  3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #7 = EXTRACT_SUBREG
     380             :   { 8,  4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr },  // Inst #8 = INSERT_SUBREG
     381             :   { 9,  1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #9 = IMPLICIT_DEF
     382             :   { 10, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr },  // Inst #10 = SUBREG_TO_REG
     383             :   { 11, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #11 = COPY_TO_REGCLASS
     384             :   { 12, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #12 = DBG_VALUE
     385             :   { 13, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #13 = REG_SEQUENCE
     386             :   { 14, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #14 = COPY
     387             :   { 15, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #15 = BUNDLE
     388             :   { 16, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #16 = LIFETIME_START
     389             :   { 17, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #17 = LIFETIME_END
     390             :   { 18, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #18 = STACKMAP
     391             :   { 19, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #19 = FENTRY_CALL
     392             :   { 20, 6,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr },  // Inst #20 = PATCHPOINT
     393             :   { 21, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr },  // Inst #21 = LOAD_STACK_GUARD
     394             :   { 22, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #22 = STATEPOINT
     395             :   { 23, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #23 = LOCAL_ESCAPE
     396             :   { 24, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #24 = FAULTING_OP
     397             :   { 25, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #25 = PATCHABLE_OP
     398             :   { 26, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #26 = PATCHABLE_FUNCTION_ENTER
     399             :   { 27, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #27 = PATCHABLE_RET
     400             :   { 28, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #28 = PATCHABLE_FUNCTION_EXIT
     401             :   { 29, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #29 = PATCHABLE_TAIL_CALL
     402             :   { 30, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #30 = PATCHABLE_EVENT_CALL
     403             :   { 31, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #31 = G_ADD
     404             :   { 32, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #32 = G_SUB
     405             :   { 33, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #33 = G_MUL
     406             :   { 34, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #34 = G_SDIV
     407             :   { 35, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #35 = G_UDIV
     408             :   { 36, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #36 = G_SREM
     409             :   { 37, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #37 = G_UREM
     410             :   { 38, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #38 = G_AND
     411             :   { 39, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #39 = G_OR
     412             :   { 40, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #40 = G_XOR
     413             :   { 41, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #41 = G_IMPLICIT_DEF
     414             :   { 42, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #42 = G_PHI
     415             :   { 43, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #43 = G_FRAME_INDEX
     416             :   { 44, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #44 = G_GLOBAL_VALUE
     417             :   { 45, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #45 = G_EXTRACT
     418             :   { 46, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #46 = G_UNMERGE_VALUES
     419             :   { 47, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #47 = G_INSERT
     420             :   { 48, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #48 = G_MERGE_VALUES
     421             :   { 49, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #49 = G_PTRTOINT
     422             :   { 50, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #50 = G_INTTOPTR
     423             :   { 51, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #51 = G_BITCAST
     424             :   { 52, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #52 = G_LOAD
     425             :   { 53, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #53 = G_STORE
     426             :   { 54, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #54 = G_BRCOND
     427             :   { 55, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #55 = G_BRINDIRECT
     428             :   { 56, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #56 = G_INTRINSIC
     429             :   { 57, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #57 = G_INTRINSIC_W_SIDE_EFFECTS
     430             :   { 58, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #58 = G_ANYEXT
     431             :   { 59, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #59 = G_TRUNC
     432             :   { 60, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #60 = G_CONSTANT
     433             :   { 61, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #61 = G_FCONSTANT
     434             :   { 62, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #62 = G_VASTART
     435             :   { 63, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #63 = G_VAARG
     436             :   { 64, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #64 = G_SEXT
     437             :   { 65, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #65 = G_ZEXT
     438             :   { 66, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #66 = G_SHL
     439             :   { 67, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #67 = G_LSHR
     440             :   { 68, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #68 = G_ASHR
     441             :   { 69, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #69 = G_ICMP
     442             :   { 70, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #70 = G_FCMP
     443             :   { 71, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #71 = G_SELECT
     444             :   { 72, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #72 = G_UADDE
     445             :   { 73, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #73 = G_USUBE
     446             :   { 74, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #74 = G_SADDO
     447             :   { 75, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #75 = G_SSUBO
     448             :   { 76, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #76 = G_UMULO
     449             :   { 77, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #77 = G_SMULO
     450             :   { 78, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #78 = G_UMULH
     451             :   { 79, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #79 = G_SMULH
     452             :   { 80, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #80 = G_FADD
     453             :   { 81, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #81 = G_FSUB
     454             :   { 82, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #82 = G_FMUL
     455             :   { 83, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #83 = G_FMA
     456             :   { 84, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #84 = G_FDIV
     457             :   { 85, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #85 = G_FREM
     458             :   { 86, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #86 = G_FPOW
     459             :   { 87, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #87 = G_FEXP
     460             :   { 88, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #88 = G_FEXP2
     461             :   { 89, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #89 = G_FLOG
     462             :   { 90, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #90 = G_FLOG2
     463             :   { 91, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #91 = G_FNEG
     464             :   { 92, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #92 = G_FPEXT
     465             :   { 93, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #93 = G_FPTRUNC
     466             :   { 94, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #94 = G_FPTOSI
     467             :   { 95, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #95 = G_FPTOUI
     468             :   { 96, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #96 = G_SITOFP
     469             :   { 97, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #97 = G_UITOFP
     470             :   { 98, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #98 = G_GEP
     471             :   { 99, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #99 = G_PTR_MASK
     472             :   { 100,        1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #100 = G_BR
     473             :   { 101,        4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #101 = G_INSERT_VECTOR_ELT
     474             :   { 102,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr },  // Inst #102 = G_EXTRACT_VECTOR_ELT
     475             :   { 103,        4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #103 = G_SHUFFLE_VECTOR
     476             :   { 104,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, ImplicitList1, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #104 = ADC16mi
     477             :   { 105,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, ImplicitList1, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #105 = ADC16mm
     478             :   { 106,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, ImplicitList1, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #106 = ADC16mr
     479             :   { 107,        3,      1,      0,      0,      0, 0xeULL, ImplicitList1, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #107 = ADC16ri
     480             :   { 108,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, ImplicitList1, ImplicitList1, OperandInfo32, -1 ,nullptr },  // Inst #108 = ADC16rm
     481             :   { 109,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, ImplicitList1, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #109 = ADC16rr
     482             :   { 110,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, ImplicitList1, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #110 = ADC8mi
     483             :   { 111,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, ImplicitList1, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #111 = ADC8mm
     484             :   { 112,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, ImplicitList1, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #112 = ADC8mr
     485             :   { 113,        3,      1,      0,      0,      0, 0xeULL, ImplicitList1, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #113 = ADC8ri
     486             :   { 114,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, ImplicitList1, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #114 = ADC8rm
     487             :   { 115,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, ImplicitList1, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #115 = ADC8rr
     488             :   { 116,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #116 = ADD16mi
     489             :   { 117,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #117 = ADD16mm
     490             :   { 118,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #118 = ADD16mr
     491             :   { 119,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #119 = ADD16ri
     492             :   { 120,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr },  // Inst #120 = ADD16rm
     493             :   { 121,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #121 = ADD16rm_POST
     494             :   { 122,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #122 = ADD16rr
     495             :   { 123,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #123 = ADD8mi
     496             :   { 124,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #124 = ADD8mm
     497             :   { 125,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #125 = ADD8mr
     498             :   { 126,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #126 = ADD8ri
     499             :   { 127,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #127 = ADD8rm
     500             :   { 128,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #128 = ADD8rm_POST
     501             :   { 129,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #129 = ADD8rr
     502             :   { 130,        3,      1,      0,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, ImplicitList2, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #130 = ADDframe
     503             :   { 131,        2,      0,      0,      0,      0, 0x4ULL, ImplicitList2, ImplicitList3, OperandInfo8, -1 ,nullptr },  // Inst #131 = ADJCALLSTACKDOWN
     504             :   { 132,        2,      0,      0,      0,      0, 0x4ULL, ImplicitList2, ImplicitList3, OperandInfo8, -1 ,nullptr },  // Inst #132 = ADJCALLSTACKUP
     505             :   { 133,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #133 = AND16mi
     506             :   { 134,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #134 = AND16mm
     507             :   { 135,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #135 = AND16mr
     508             :   { 136,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #136 = AND16ri
     509             :   { 137,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr },  // Inst #137 = AND16rm
     510             :   { 138,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #138 = AND16rm_POST
     511             :   { 139,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #139 = AND16rr
     512             :   { 140,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #140 = AND8mi
     513             :   { 141,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #141 = AND8mm
     514             :   { 142,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #142 = AND8mr
     515             :   { 143,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #143 = AND8ri
     516             :   { 144,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #144 = AND8rm
     517             :   { 145,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #145 = AND8rm_POST
     518             :   { 146,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #146 = AND8rr
     519             :   { 147,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #147 = BIC16mm
     520             :   { 148,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #148 = BIC16mr
     521             :   { 149,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr },  // Inst #149 = BIC16rm
     522             :   { 150,        3,      1,      0,      0,      0, 0xaULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #150 = BIC16rr
     523             :   { 151,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #151 = BIC8mm
     524             :   { 152,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #152 = BIC8mr
     525             :   { 153,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #153 = BIC8rm
     526             :   { 154,        3,      1,      0,      0,      0, 0xaULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #154 = BIC8rr
     527             :   { 155,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #155 = BIT16mi
     528             :   { 156,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #156 = BIT16mm
     529             :   { 157,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #157 = BIT16mr
     530             :   { 158,        2,      0,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #158 = BIT16ri
     531             :   { 159,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #159 = BIT16rm
     532             :   { 160,        2,      0,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #160 = BIT16rr
     533             :   { 161,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #161 = BIT8mi
     534             :   { 162,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #162 = BIT8mm
     535             :   { 163,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #163 = BIT8mr
     536             :   { 164,        2,      0,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #164 = BIT8ri
     537             :   { 165,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #165 = BIT8rm
     538             :   { 166,        2,      0,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #166 = BIT8rr
     539             :   { 167,        1,      0,      0,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0xeULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #167 = Bi
     540             :   { 168,        2,      0,      0,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xeULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #168 = Bm
     541             :   { 169,        1,      0,      0,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0xaULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #169 = Br
     542             :   { 170,        1,      0,      0,      0,      0|(1ULL<<MCID::Call), 0xdULL, ImplicitList2, ImplicitList4, OperandInfo3, -1 ,nullptr },  // Inst #170 = CALLi
     543             :   { 171,        2,      0,      0,      0,      0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0xdULL, ImplicitList2, ImplicitList4, OperandInfo47, -1 ,nullptr },  // Inst #171 = CALLm
     544             :   { 172,        1,      0,      0,      0,      0|(1ULL<<MCID::Call), 0x9ULL, ImplicitList2, ImplicitList4, OperandInfo48, -1 ,nullptr },  // Inst #172 = CALLr
     545             :   { 173,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #173 = CMP16mi
     546             :   { 174,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #174 = CMP16mr
     547             :   { 175,        2,      0,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #175 = CMP16ri
     548             :   { 176,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #176 = CMP16rm
     549             :   { 177,        2,      0,      0,      0,      0, 0xaULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #177 = CMP16rr
     550             :   { 178,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #178 = CMP8mi
     551             :   { 179,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #179 = CMP8mr
     552             :   { 180,        2,      0,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #180 = CMP8ri
     553             :   { 181,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #181 = CMP8rm
     554             :   { 182,        2,      0,      0,      0,      0, 0xaULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #182 = CMP8rr
     555             :   { 183,        2,      0,      0,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0xbULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #183 = JCC
     556             :   { 184,        1,      0,      0,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0xbULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #184 = JMP
     557             :   { 185,        3,      0,      0,      0,      0|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #185 = MOV16mi
     558             :   { 186,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #186 = MOV16mm
     559             :   { 187,        3,      0,      0,      0,      0|(1ULL<<MCID::MayStore), 0xeULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #187 = MOV16mr
     560             :   { 188,        2,      1,      0,      0,      0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0xeULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #188 = MOV16ri
     561             :   { 189,        3,      1,      0,      0,      0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xeULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #189 = MOV16rm
     562             :   { 190,        3,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #190 = MOV16rm_POST
     563             :   { 191,        2,      1,      0,      0,      0, 0xaULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #191 = MOV16rr
     564             :   { 192,        3,      0,      0,      0,      0|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #192 = MOV8mi
     565             :   { 193,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #193 = MOV8mm
     566             :   { 194,        3,      0,      0,      0,      0|(1ULL<<MCID::MayStore), 0xeULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #194 = MOV8mr
     567             :   { 195,        2,      1,      0,      0,      0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0xeULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #195 = MOV8ri
     568             :   { 196,        3,      1,      0,      0,      0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xeULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #196 = MOV8rm
     569             :   { 197,        3,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #197 = MOV8rm_POST
     570             :   { 198,        2,      1,      0,      0,      0, 0xaULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #198 = MOV8rr
     571             :   { 199,        3,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #199 = MOVZX16rm8
     572             :   { 200,        2,      1,      0,      0,      0, 0xaULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #200 = MOVZX16rr8
     573             :   { 201,        0,      0,      0,      0,      0, 0x4ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #201 = NOP
     574             :   { 202,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #202 = OR16mi
     575             :   { 203,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #203 = OR16mm
     576             :   { 204,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #204 = OR16mr
     577             :   { 205,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #205 = OR16ri
     578             :   { 206,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr },  // Inst #206 = OR16rm
     579             :   { 207,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #207 = OR16rm_POST
     580             :   { 208,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #208 = OR16rr
     581             :   { 209,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #209 = OR8mi
     582             :   { 210,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #210 = OR8mm
     583             :   { 211,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #211 = OR8mr
     584             :   { 212,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #212 = OR8ri
     585             :   { 213,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #213 = OR8rm
     586             :   { 214,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #214 = OR8rm_POST
     587             :   { 215,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #215 = OR8rr
     588             :   { 216,        1,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xaULL, ImplicitList2, ImplicitList2, OperandInfo48, -1 ,nullptr },  // Inst #216 = POP16r
     589             :   { 217,        1,      0,      0,      0,      0|(1ULL<<MCID::MayStore), 0x9ULL, ImplicitList2, ImplicitList2, OperandInfo48, -1 ,nullptr },  // Inst #217 = PUSH16r
     590             :   { 218,        0,      0,      0,      0,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0xaULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #218 = RET
     591             :   { 219,        0,      0,      0,      0,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x9ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #219 = RETI
     592             :   { 220,        2,      1,      0,      0,      0, 0x9ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #220 = SAR16r1
     593             :   { 221,        2,      1,      0,      0,      0, 0x4ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #221 = SAR16r1c
     594             :   { 222,        2,      1,      0,      0,      0, 0x9ULL, nullptr, ImplicitList1, OperandInfo53, -1 ,nullptr },  // Inst #222 = SAR8r1
     595             :   { 223,        2,      1,      0,      0,      0, 0x4ULL, nullptr, ImplicitList1, OperandInfo53, -1 ,nullptr },  // Inst #223 = SAR8r1c
     596             :   { 224,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, ImplicitList1, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #224 = SBC16mi
     597             :   { 225,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, ImplicitList1, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #225 = SBC16mm
     598             :   { 226,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, ImplicitList1, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #226 = SBC16mr
     599             :   { 227,        3,      1,      0,      0,      0, 0xeULL, ImplicitList1, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #227 = SBC16ri
     600             :   { 228,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, ImplicitList1, ImplicitList1, OperandInfo32, -1 ,nullptr },  // Inst #228 = SBC16rm
     601             :   { 229,        3,      1,      0,      0,      0, 0xaULL, ImplicitList1, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #229 = SBC16rr
     602             :   { 230,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, ImplicitList1, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #230 = SBC8mi
     603             :   { 231,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, ImplicitList1, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #231 = SBC8mm
     604             :   { 232,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, ImplicitList1, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #232 = SBC8mr
     605             :   { 233,        3,      1,      0,      0,      0, 0xeULL, ImplicitList1, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #233 = SBC8ri
     606             :   { 234,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, ImplicitList1, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #234 = SBC8rm
     607             :   { 235,        3,      1,      0,      0,      0, 0xaULL, ImplicitList1, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #235 = SBC8rr
     608             :   { 236,        2,      1,      0,      0,      0, 0x9ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #236 = SEXT16r
     609             :   { 237,        2,      1,      0,      0,      0, 0xaULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #237 = SHL16r1
     610             :   { 238,        2,      1,      0,      0,      0, 0xaULL, nullptr, ImplicitList1, OperandInfo53, -1 ,nullptr },  // Inst #238 = SHL8r1
     611             :   { 239,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #239 = SUB16mi
     612             :   { 240,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #240 = SUB16mm
     613             :   { 241,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #241 = SUB16mr
     614             :   { 242,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #242 = SUB16ri
     615             :   { 243,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr },  // Inst #243 = SUB16rm
     616             :   { 244,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #244 = SUB16rm_POST
     617             :   { 245,        3,      1,      0,      0,      0, 0xaULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #245 = SUB16rr
     618             :   { 246,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #246 = SUB8mi
     619             :   { 247,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #247 = SUB8mm
     620             :   { 248,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #248 = SUB8mr
     621             :   { 249,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #249 = SUB8ri
     622             :   { 250,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #250 = SUB8rm
     623             :   { 251,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #251 = SUB8rm_POST
     624             :   { 252,        3,      1,      0,      0,      0, 0xaULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #252 = SUB8rr
     625             :   { 253,        2,      1,      0,      0,      0, 0x9ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #253 = SWPB16r
     626             :   { 254,        4,      1,      0,      0,      0|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #254 = Select16
     627             :   { 255,        4,      1,      0,      0,      0|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, ImplicitList1, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #255 = Select8
     628             :   { 256,        3,      1,      0,      0,      0|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #256 = Shl16
     629             :   { 257,        3,      1,      0,      0,      0|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo57, -1 ,nullptr },  // Inst #257 = Shl8
     630             :   { 258,        3,      1,      0,      0,      0|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #258 = Sra16
     631             :   { 259,        3,      1,      0,      0,      0|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo57, -1 ,nullptr },  // Inst #259 = Sra8
     632             :   { 260,        3,      1,      0,      0,      0|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #260 = Srl16
     633             :   { 261,        3,      1,      0,      0,      0|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo57, -1 ,nullptr },  // Inst #261 = Srl8
     634             :   { 262,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #262 = XOR16mi
     635             :   { 263,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #263 = XOR16mm
     636             :   { 264,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #264 = XOR16mr
     637             :   { 265,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #265 = XOR16ri
     638             :   { 266,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr },  // Inst #266 = XOR16rm
     639             :   { 267,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #267 = XOR16rm_POST
     640             :   { 268,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #268 = XOR16rr
     641             :   { 269,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #269 = XOR8mi
     642             :   { 270,        4,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x12ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #270 = XOR8mm
     643             :   { 271,        3,      0,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xeULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #271 = XOR8mr
     644             :   { 272,        3,      1,      0,      0,      0, 0xeULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #272 = XOR8ri
     645             :   { 273,        4,      1,      0,      0,      0|(1ULL<<MCID::MayLoad), 0xeULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #273 = XOR8rm
     646             :   { 274,        4,      2,      0,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraDefRegAllocReq), 0xaULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #274 = XOR8rm_POST
     647             :   { 275,        3,      1,      0,      0,      0|(1ULL<<MCID::Commutable), 0xaULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #275 = XOR8rr
     648             :   { 276,        2,      1,      0,      0,      0, 0xaULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #276 = ZEXT16r
     649             : };
     650             : 
     651             : extern const char MSP430InstrNameData[] = {
     652             :   /* 0 */ 'S', 'H', 'L', '1', '6', 'r', '1', 0,
     653             :   /* 8 */ 'S', 'A', 'R', '1', '6', 'r', '1', 0,
     654             :   /* 16 */ 'S', 'H', 'L', '8', 'r', '1', 0,
     655             :   /* 23 */ 'S', 'A', 'R', '8', 'r', '1', 0,
     656             :   /* 30 */ 'G', '_', 'F', 'L', 'O', 'G', '2', 0,
     657             :   /* 38 */ 'G', '_', 'F', 'E', 'X', 'P', '2', 0,
     658             :   /* 46 */ 'S', 'r', 'a', '1', '6', 0,
     659             :   /* 52 */ 'S', 'h', 'l', '1', '6', 0,
     660             :   /* 58 */ 'S', 'r', 'l', '1', '6', 0,
     661             :   /* 64 */ 'S', 'e', 'l', 'e', 'c', 't', '1', '6', 0,
     662             :   /* 73 */ 'S', 'r', 'a', '8', 0,
     663             :   /* 78 */ 'S', 'h', 'l', '8', 0,
     664             :   /* 83 */ 'S', 'r', 'l', '8', 0,
     665             :   /* 88 */ 'M', 'O', 'V', 'Z', 'X', '1', '6', 'r', 'm', '8', 0,
     666             :   /* 99 */ 'M', 'O', 'V', 'Z', 'X', '1', '6', 'r', 'r', '8', 0,
     667             :   /* 110 */ 'S', 'e', 'l', 'e', 'c', 't', '8', 0,
     668             :   /* 118 */ 'G', '_', 'F', 'M', 'A', 0,
     669             :   /* 124 */ 'G', '_', 'F', 'S', 'U', 'B', 0,
     670             :   /* 131 */ 'G', '_', 'S', 'U', 'B', 0,
     671             :   /* 137 */ 'J', 'C', 'C', 0,
     672             :   /* 141 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', 0,
     673             :   /* 153 */ 'G', '_', 'F', 'P', 'T', 'R', 'U', 'N', 'C', 0,
     674             :   /* 163 */ 'G', '_', 'T', 'R', 'U', 'N', 'C', 0,
     675             :   /* 171 */ 'G', '_', 'L', 'O', 'A', 'D', 0,
     676             :   /* 178 */ 'G', '_', 'F', 'A', 'D', 'D', 0,
     677             :   /* 185 */ 'G', '_', 'A', 'D', 'D', 0,
     678             :   /* 191 */ 'G', '_', 'A', 'N', 'D', 0,
     679             :   /* 197 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0,
     680             :   /* 210 */ 'G', '_', 'B', 'R', 'C', 'O', 'N', 'D', 0,
     681             :   /* 219 */ 'L', 'O', 'A', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'G', 'U', 'A', 'R', 'D', 0,
     682             :   /* 236 */ 'G', '_', 'U', 'S', 'U', 'B', 'E', 0,
     683             :   /* 244 */ 'R', 'E', 'G', '_', 'S', 'E', 'Q', 'U', 'E', 'N', 'C', 'E', 0,
     684             :   /* 257 */ 'G', '_', 'U', 'A', 'D', 'D', 'E', 0,
     685             :   /* 265 */ 'B', 'U', 'N', 'D', 'L', 'E', 0,
     686             :   /* 272 */ 'L', 'O', 'C', 'A', 'L', '_', 'E', 'S', 'C', 'A', 'P', 'E', 0,
     687             :   /* 285 */ 'G', '_', 'S', 'T', 'O', 'R', 'E', 0,
     688             :   /* 293 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0,
     689             :   /* 303 */ 'G', '_', 'G', 'L', 'O', 'B', 'A', 'L', '_', 'V', 'A', 'L', 'U', 'E', 0,
     690             :   /* 318 */ 'G', '_', 'I', 'M', 'P', 'L', 'I', 'C', 'I', 'T', '_', 'D', 'E', 'F', 0,
     691             :   /* 333 */ 'G', '_', 'F', 'N', 'E', 'G', 0,
     692             :   /* 340 */ 'E', 'X', 'T', 'R', 'A', 'C', 'T', '_', 'S', 'U', 'B', 'R', 'E', 'G', 0,
     693             :   /* 355 */ 'I', 'N', 'S', 'E', 'R', 'T', '_', 'S', 'U', 'B', 'R', 'E', 'G', 0,
     694             :   /* 369 */ 'S', 'U', 'B', 'R', 'E', 'G', '_', 'T', 'O', '_', 'R', 'E', 'G', 0,
     695             :   /* 383 */ 'G', '_', 'F', 'L', 'O', 'G', 0,
     696             :   /* 390 */ 'G', '_', 'V', 'A', 'A', 'R', 'G', 0,
     697             :   /* 398 */ 'G', '_', 'S', 'M', 'U', 'L', 'H', 0,
     698             :   /* 406 */ 'G', '_', 'U', 'M', 'U', 'L', 'H', 0,
     699             :   /* 414 */ 'G', '_', 'P', 'H', 'I', 0,
     700             :   /* 420 */ 'G', '_', 'F', 'P', 'T', 'O', 'S', 'I', 0,
     701             :   /* 429 */ 'R', 'E', 'T', 'I', 0,
     702             :   /* 434 */ 'G', '_', 'F', 'P', 'T', 'O', 'U', 'I', 0,
     703             :   /* 443 */ 'G', '_', 'P', 'T', 'R', '_', 'M', 'A', 'S', 'K', 0,
     704             :   /* 454 */ 'G', 'C', '_', 'L', 'A', 'B', 'E', 'L', 0,
     705             :   /* 463 */ 'E', 'H', '_', 'L', 'A', 'B', 'E', 'L', 0,
     706             :   /* 472 */ 'A', 'N', 'N', 'O', 'T', 'A', 'T', 'I', 'O', 'N', '_', 'L', 'A', 'B', 'E', 'L', 0,
     707             :   /* 489 */ 'G', '_', 'S', 'H', 'L', 0,
     708             :   /* 495 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'T', 'A', 'I', 'L', '_', 'C', 'A', 'L', 'L', 0,
     709             :   /* 515 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'E', 'V', 'E', 'N', 'T', '_', 'C', 'A', 'L', 'L', 0,
     710             :   /* 536 */ 'F', 'E', 'N', 'T', 'R', 'Y', '_', 'C', 'A', 'L', 'L', 0,
     711             :   /* 548 */ 'K', 'I', 'L', 'L', 0,
     712             :   /* 553 */ 'G', '_', 'F', 'M', 'U', 'L', 0,
     713             :   /* 560 */ 'G', '_', 'M', 'U', 'L', 0,
     714             :   /* 566 */ 'G', '_', 'F', 'R', 'E', 'M', 0,
     715             :   /* 573 */ 'G', '_', 'S', 'R', 'E', 'M', 0,
     716             :   /* 580 */ 'G', '_', 'U', 'R', 'E', 'M', 0,
     717             :   /* 587 */ 'I', 'N', 'L', 'I', 'N', 'E', 'A', 'S', 'M', 0,
     718             :   /* 597 */ 'C', 'F', 'I', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 0,
     719             :   /* 613 */ 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 0,
     720             :   /* 630 */ 'G', '_', 'S', 'S', 'U', 'B', 'O', 0,
     721             :   /* 638 */ 'G', '_', 'S', 'A', 'D', 'D', 'O', 0,
     722             :   /* 646 */ 'G', '_', 'S', 'M', 'U', 'L', 'O', 0,
     723             :   /* 654 */ 'G', '_', 'U', 'M', 'U', 'L', 'O', 0,
     724             :   /* 662 */ 'S', 'T', 'A', 'C', 'K', 'M', 'A', 'P', 0,
     725             :   /* 671 */ 'G', '_', 'G', 'E', 'P', 0,
     726             :   /* 677 */ 'G', '_', 'S', 'I', 'T', 'O', 'F', 'P', 0,
     727             :   /* 686 */ 'G', '_', 'U', 'I', 'T', 'O', 'F', 'P', 0,
     728             :   /* 695 */ 'G', '_', 'F', 'C', 'M', 'P', 0,
     729             :   /* 702 */ 'G', '_', 'I', 'C', 'M', 'P', 0,
     730             :   /* 709 */ 'J', 'M', 'P', 0,
     731             :   /* 713 */ 'N', 'O', 'P', 0,
     732             :   /* 717 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'O', 'P', 0,
     733             :   /* 730 */ 'F', 'A', 'U', 'L', 'T', 'I', 'N', 'G', '_', 'O', 'P', 0,
     734             :   /* 742 */ 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 0,
     735             :   /* 757 */ 'G', '_', 'F', 'E', 'X', 'P', 0,
     736             :   /* 764 */ 'G', '_', 'B', 'R', 0,
     737             :   /* 769 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '_', 'E', 'N', 'T', 'E', 'R', 0,
     738             :   /* 794 */ 'G', '_', 'A', 'S', 'H', 'R', 0,
     739             :   /* 801 */ 'G', '_', 'L', 'S', 'H', 'R', 0,
     740             :   /* 808 */ 'G', '_', 'S', 'H', 'U', 'F', 'F', 'L', 'E', '_', 'V', 'E', 'C', 'T', 'O', 'R', 0,
     741             :   /* 825 */ 'G', '_', 'X', 'O', 'R', 0,
     742             :   /* 831 */ 'G', '_', 'O', 'R', 0,
     743             :   /* 836 */ 'G', '_', 'I', 'N', 'T', 'T', 'O', 'P', 'T', 'R', 0,
     744             :   /* 847 */ 'G', '_', 'U', 'N', 'M', 'E', 'R', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', 'S', 0,
     745             :   /* 864 */ 'G', '_', 'M', 'E', 'R', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', 'S', 0,
     746             :   /* 879 */ 'C', 'O', 'P', 'Y', '_', 'T', 'O', '_', 'R', 'E', 'G', 'C', 'L', 'A', 'S', 'S', 0,
     747             :   /* 896 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', '_', 'W', '_', 'S', 'I', 'D', 'E', '_', 'E', 'F', 'F', 'E', 'C', 'T', 'S', 0,
     748             :   /* 923 */ 'G', '_', 'E', 'X', 'T', 'R', 'A', 'C', 'T', 0,
     749             :   /* 933 */ 'G', '_', 'S', 'E', 'L', 'E', 'C', 'T', 0,
     750             :   /* 942 */ 'G', '_', 'B', 'R', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', 0,
     751             :   /* 955 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'R', 'E', 'T', 0,
     752             :   /* 969 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '_', 'E', 'X', 'I', 'T', 0,
     753             :   /* 993 */ 'G', '_', 'E', 'X', 'T', 'R', 'A', 'C', 'T', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'L', 'T', 0,
     754             :   /* 1014 */ 'G', '_', 'I', 'N', 'S', 'E', 'R', 'T', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'L', 'T', 0,
     755             :   /* 1034 */ 'G', '_', 'F', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 0,
     756             :   /* 1046 */ 'G', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 0,
     757             :   /* 1057 */ 'S', 'T', 'A', 'T', 'E', 'P', 'O', 'I', 'N', 'T', 0,
     758             :   /* 1068 */ 'P', 'A', 'T', 'C', 'H', 'P', 'O', 'I', 'N', 'T', 0,
     759             :   /* 1079 */ 'G', '_', 'P', 'T', 'R', 'T', 'O', 'I', 'N', 'T', 0,
     760             :   /* 1090 */ 'G', '_', 'V', 'A', 'S', 'T', 'A', 'R', 'T', 0,
     761             :   /* 1100 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0,
     762             :   /* 1115 */ 'G', '_', 'I', 'N', 'S', 'E', 'R', 'T', 0,
     763             :   /* 1124 */ 'G', '_', 'B', 'I', 'T', 'C', 'A', 'S', 'T', 0,
     764             :   /* 1134 */ 'S', 'U', 'B', '1', '6', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     765             :   /* 1147 */ 'A', 'D', 'D', '1', '6', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     766             :   /* 1160 */ 'A', 'N', 'D', '1', '6', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     767             :   /* 1173 */ 'X', 'O', 'R', '1', '6', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     768             :   /* 1186 */ 'M', 'O', 'V', '1', '6', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     769             :   /* 1199 */ 'S', 'U', 'B', '8', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     770             :   /* 1211 */ 'A', 'D', 'D', '8', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     771             :   /* 1223 */ 'A', 'N', 'D', '8', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     772             :   /* 1235 */ 'X', 'O', 'R', '8', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     773             :   /* 1247 */ 'M', 'O', 'V', '8', 'r', 'm', '_', 'P', 'O', 'S', 'T', 0,
     774             :   /* 1259 */ 'G', '_', 'F', 'P', 'E', 'X', 'T', 0,
     775             :   /* 1267 */ 'G', '_', 'S', 'E', 'X', 'T', 0,
     776             :   /* 1274 */ 'G', '_', 'A', 'N', 'Y', 'E', 'X', 'T', 0,
     777             :   /* 1283 */ 'G', '_', 'Z', 'E', 'X', 'T', 0,
     778             :   /* 1290 */ 'G', '_', 'F', 'D', 'I', 'V', 0,
     779             :   /* 1297 */ 'G', '_', 'S', 'D', 'I', 'V', 0,
     780             :   /* 1304 */ 'G', '_', 'U', 'D', 'I', 'V', 0,
     781             :   /* 1311 */ 'G', '_', 'F', 'P', 'O', 'W', 0,
     782             :   /* 1318 */ 'G', '_', 'F', 'R', 'A', 'M', 'E', '_', 'I', 'N', 'D', 'E', 'X', 0,
     783             :   /* 1332 */ 'C', 'O', 'P', 'Y', 0,
     784             :   /* 1337 */ 'S', 'A', 'R', '1', '6', 'r', '1', 'c', 0,
     785             :   /* 1346 */ 'S', 'A', 'R', '8', 'r', '1', 'c', 0,
     786             :   /* 1354 */ 'A', 'D', 'D', 'f', 'r', 'a', 'm', 'e', 0,
     787             :   /* 1363 */ 'B', 'i', 0,
     788             :   /* 1366 */ 'C', 'A', 'L', 'L', 'i', 0,
     789             :   /* 1372 */ 'S', 'U', 'B', '1', '6', 'm', 'i', 0,
     790             :   /* 1380 */ 'S', 'B', 'C', '1', '6', 'm', 'i', 0,
     791             :   /* 1388 */ 'A', 'D', 'C', '1', '6', 'm', 'i', 0,
     792             :   /* 1396 */ 'A', 'D', 'D', '1', '6', 'm', 'i', 0,
     793             :   /* 1404 */ 'A', 'N', 'D', '1', '6', 'm', 'i', 0,
     794             :   /* 1412 */ 'C', 'M', 'P', '1', '6', 'm', 'i', 0,
     795             :   /* 1420 */ 'X', 'O', 'R', '1', '6', 'm', 'i', 0,
     796             :   /* 1428 */ 'B', 'I', 'T', '1', '6', 'm', 'i', 0,
     797             :   /* 1436 */ 'M', 'O', 'V', '1', '6', 'm', 'i', 0,
     798             :   /* 1444 */ 'S', 'U', 'B', '8', 'm', 'i', 0,
     799             :   /* 1451 */ 'S', 'B', 'C', '8', 'm', 'i', 0,
     800             :   /* 1458 */ 'A', 'D', 'C', '8', 'm', 'i', 0,
     801             :   /* 1465 */ 'A', 'D', 'D', '8', 'm', 'i', 0,
     802             :   /* 1472 */ 'A', 'N', 'D', '8', 'm', 'i', 0,
     803             :   /* 1479 */ 'C', 'M', 'P', '8', 'm', 'i', 0,
     804             :   /* 1486 */ 'X', 'O', 'R', '8', 'm', 'i', 0,
     805             :   /* 1493 */ 'B', 'I', 'T', '8', 'm', 'i', 0,
     806             :   /* 1500 */ 'M', 'O', 'V', '8', 'm', 'i', 0,
     807             :   /* 1507 */ 'S', 'U', 'B', '1', '6', 'r', 'i', 0,
     808             :   /* 1515 */ 'S', 'B', 'C', '1', '6', 'r', 'i', 0,
     809             :   /* 1523 */ 'A', 'D', 'C', '1', '6', 'r', 'i', 0,
     810             :   /* 1531 */ 'A', 'D', 'D', '1', '6', 'r', 'i', 0,
     811             :   /* 1539 */ 'A', 'N', 'D', '1', '6', 'r', 'i', 0,
     812             :   /* 1547 */ 'C', 'M', 'P', '1', '6', 'r', 'i', 0,
     813             :   /* 1555 */ 'X', 'O', 'R', '1', '6', 'r', 'i', 0,
     814             :   /* 1563 */ 'B', 'I', 'T', '1', '6', 'r', 'i', 0,
     815             :   /* 1571 */ 'M', 'O', 'V', '1', '6', 'r', 'i', 0,
     816             :   /* 1579 */ 'S', 'U', 'B', '8', 'r', 'i', 0,
     817             :   /* 1586 */ 'S', 'B', 'C', '8', 'r', 'i', 0,
     818             :   /* 1593 */ 'A', 'D', 'C', '8', 'r', 'i', 0,
     819             :   /* 1600 */ 'A', 'D', 'D', '8', 'r', 'i', 0,
     820             :   /* 1607 */ 'A', 'N', 'D', '8', 'r', 'i', 0,
     821             :   /* 1614 */ 'C', 'M', 'P', '8', 'r', 'i', 0,
     822             :   /* 1621 */ 'X', 'O', 'R', '8', 'r', 'i', 0,
     823             :   /* 1628 */ 'B', 'I', 'T', '8', 'r', 'i', 0,
     824             :   /* 1635 */ 'M', 'O', 'V', '8', 'r', 'i', 0,
     825             :   /* 1642 */ 'B', 'm', 0,
     826             :   /* 1645 */ 'C', 'A', 'L', 'L', 'm', 0,
     827             :   /* 1651 */ 'S', 'U', 'B', '1', '6', 'm', 'm', 0,
     828             :   /* 1659 */ 'S', 'B', 'C', '1', '6', 'm', 'm', 0,
     829             :   /* 1667 */ 'A', 'D', 'C', '1', '6', 'm', 'm', 0,
     830             :   /* 1675 */ 'B', 'I', 'C', '1', '6', 'm', 'm', 0,
     831             :   /* 1683 */ 'A', 'D', 'D', '1', '6', 'm', 'm', 0,
     832             :   /* 1691 */ 'A', 'N', 'D', '1', '6', 'm', 'm', 0,
     833             :   /* 1699 */ 'X', 'O', 'R', '1', '6', 'm', 'm', 0,
     834             :   /* 1707 */ 'B', 'I', 'T', '1', '6', 'm', 'm', 0,
     835             :   /* 1715 */ 'M', 'O', 'V', '1', '6', 'm', 'm', 0,
     836             :   /* 1723 */ 'S', 'U', 'B', '8', 'm', 'm', 0,
     837             :   /* 1730 */ 'S', 'B', 'C', '8', 'm', 'm', 0,
     838             :   /* 1737 */ 'A', 'D', 'C', '8', 'm', 'm', 0,
     839             :   /* 1744 */ 'B', 'I', 'C', '8', 'm', 'm', 0,
     840             :   /* 1751 */ 'A', 'D', 'D', '8', 'm', 'm', 0,
     841             :   /* 1758 */ 'A', 'N', 'D', '8', 'm', 'm', 0,
     842             :   /* 1765 */ 'X', 'O', 'R', '8', 'm', 'm', 0,
     843             :   /* 1772 */ 'B', 'I', 'T', '8', 'm', 'm', 0,
     844             :   /* 1779 */ 'M', 'O', 'V', '8', 'm', 'm', 0,
     845             :   /* 1786 */ 'S', 'U', 'B', '1', '6', 'r', 'm', 0,
     846             :   /* 1794 */ 'S', 'B', 'C', '1', '6', 'r', 'm', 0,
     847             :   /* 1802 */ 'A', 'D', 'C', '1', '6', 'r', 'm', 0,
     848             :   /* 1810 */ 'B', 'I', 'C', '1', '6', 'r', 'm', 0,
     849             :   /* 1818 */ 'A', 'D', 'D', '1', '6', 'r', 'm', 0,
     850             :   /* 1826 */ 'A', 'N', 'D', '1', '6', 'r', 'm', 0,
     851             :   /* 1834 */ 'C', 'M', 'P', '1', '6', 'r', 'm', 0,
     852             :   /* 1842 */ 'X', 'O', 'R', '1', '6', 'r', 'm', 0,
     853             :   /* 1850 */ 'B', 'I', 'T', '1', '6', 'r', 'm', 0,
     854             :   /* 1858 */ 'M', 'O', 'V', '1', '6', 'r', 'm', 0,
     855             :   /* 1866 */ 'S', 'U', 'B', '8', 'r', 'm', 0,
     856             :   /* 1873 */ 'S', 'B', 'C', '8', 'r', 'm', 0,
     857             :   /* 1880 */ 'A', 'D', 'C', '8', 'r', 'm', 0,
     858             :   /* 1887 */ 'B', 'I', 'C', '8', 'r', 'm', 0,
     859             :   /* 1894 */ 'A', 'D', 'D', '8', 'r', 'm', 0,
     860             :   /* 1901 */ 'A', 'N', 'D', '8', 'r', 'm', 0,
     861             :   /* 1908 */ 'C', 'M', 'P', '8', 'r', 'm', 0,
     862             :   /* 1915 */ 'X', 'O', 'R', '8', 'r', 'm', 0,
     863             :   /* 1922 */ 'B', 'I', 'T', '8', 'r', 'm', 0,
     864             :   /* 1929 */ 'M', 'O', 'V', '8', 'r', 'm', 0,
     865             :   /* 1936 */ 'S', 'W', 'P', 'B', '1', '6', 'r', 0,
     866             :   /* 1944 */ 'P', 'U', 'S', 'H', '1', '6', 'r', 0,
     867             :   /* 1952 */ 'P', 'O', 'P', '1', '6', 'r', 0,
     868             :   /* 1959 */ 'S', 'E', 'X', 'T', '1', '6', 'r', 0,
     869             :   /* 1967 */ 'Z', 'E', 'X', 'T', '1', '6', 'r', 0,
     870             :   /* 1975 */ 'B', 'r', 0,
     871             :   /* 1978 */ 'C', 'A', 'L', 'L', 'r', 0,
     872             :   /* 1984 */ 'S', 'U', 'B', '1', '6', 'm', 'r', 0,
     873             :   /* 1992 */ 'S', 'B', 'C', '1', '6', 'm', 'r', 0,
     874             :   /* 2000 */ 'A', 'D', 'C', '1', '6', 'm', 'r', 0,
     875             :   /* 2008 */ 'B', 'I', 'C', '1', '6', 'm', 'r', 0,
     876             :   /* 2016 */ 'A', 'D', 'D', '1', '6', 'm', 'r', 0,
     877             :   /* 2024 */ 'A', 'N', 'D', '1', '6', 'm', 'r', 0,
     878             :   /* 2032 */ 'C', 'M', 'P', '1', '6', 'm', 'r', 0,
     879             :   /* 2040 */ 'X', 'O', 'R', '1', '6', 'm', 'r', 0,
     880             :   /* 2048 */ 'B', 'I', 'T', '1', '6', 'm', 'r', 0,
     881             :   /* 2056 */ 'M', 'O', 'V', '1', '6', 'm', 'r', 0,
     882             :   /* 2064 */ 'S', 'U', 'B', '8', 'm', 'r', 0,
     883             :   /* 2071 */ 'S', 'B', 'C', '8', 'm', 'r', 0,
     884             :   /* 2078 */ 'A', 'D', 'C', '8', 'm', 'r', 0,
     885             :   /* 2085 */ 'B', 'I', 'C', '8', 'm', 'r', 0,
     886             :   /* 2092 */ 'A', 'D', 'D', '8', 'm', 'r', 0,
     887             :   /* 2099 */ 'A', 'N', 'D', '8', 'm', 'r', 0,
     888             :   /* 2106 */ 'C', 'M', 'P', '8', 'm', 'r', 0,
     889             :   /* 2113 */ 'X', 'O', 'R', '8', 'm', 'r', 0,
     890             :   /* 2120 */ 'B', 'I', 'T', '8', 'm', 'r', 0,
     891             :   /* 2127 */ 'M', 'O', 'V', '8', 'm', 'r', 0,
     892             :   /* 2134 */ 'S', 'U', 'B', '1', '6', 'r', 'r', 0,
     893             :   /* 2142 */ 'S', 'B', 'C', '1', '6', 'r', 'r', 0,
     894             :   /* 2150 */ 'A', 'D', 'C', '1', '6', 'r', 'r', 0,
     895             :   /* 2158 */ 'B', 'I', 'C', '1', '6', 'r', 'r', 0,
     896             :   /* 2166 */ 'A', 'D', 'D', '1', '6', 'r', 'r', 0,
     897             :   /* 2174 */ 'A', 'N', 'D', '1', '6', 'r', 'r', 0,
     898             :   /* 2182 */ 'C', 'M', 'P', '1', '6', 'r', 'r', 0,
     899             :   /* 2190 */ 'X', 'O', 'R', '1', '6', 'r', 'r', 0,
     900             :   /* 2198 */ 'B', 'I', 'T', '1', '6', 'r', 'r', 0,
     901             :   /* 2206 */ 'M', 'O', 'V', '1', '6', 'r', 'r', 0,
     902             :   /* 2214 */ 'S', 'U', 'B', '8', 'r', 'r', 0,
     903             :   /* 2221 */ 'S', 'B', 'C', '8', 'r', 'r', 0,
     904             :   /* 2228 */ 'A', 'D', 'C', '8', 'r', 'r', 0,
     905             :   /* 2235 */ 'B', 'I', 'C', '8', 'r', 'r', 0,
     906             :   /* 2242 */ 'A', 'D', 'D', '8', 'r', 'r', 0,
     907             :   /* 2249 */ 'A', 'N', 'D', '8', 'r', 'r', 0,
     908             :   /* 2256 */ 'C', 'M', 'P', '8', 'r', 'r', 0,
     909             :   /* 2263 */ 'X', 'O', 'R', '8', 'r', 'r', 0,
     910             :   /* 2270 */ 'B', 'I', 'T', '8', 'r', 'r', 0,
     911             :   /* 2277 */ 'M', 'O', 'V', '8', 'r', 'r', 0,
     912             : };
     913             : 
     914             : extern const unsigned MSP430InstrNameIndices[] = {
     915             :     416U, 587U, 597U, 463U, 454U, 472U, 548U, 340U, 
     916             :     355U, 320U, 369U, 879U, 293U, 244U, 1332U, 265U, 
     917             :     1100U, 197U, 662U, 536U, 1068U, 219U, 1057U, 272U, 
     918             :     730U, 717U, 769U, 955U, 969U, 495U, 515U, 185U, 
     919             :     131U, 560U, 1297U, 1304U, 573U, 580U, 191U, 831U, 
     920             :     825U, 318U, 414U, 1318U, 303U, 923U, 847U, 1115U, 
     921             :     864U, 1079U, 836U, 1124U, 171U, 285U, 210U, 942U, 
     922             :     141U, 896U, 1274U, 163U, 1046U, 1034U, 1090U, 390U, 
     923             :     1267U, 1283U, 489U, 801U, 794U, 702U, 695U, 933U, 
     924             :     257U, 236U, 638U, 630U, 654U, 646U, 406U, 398U, 
     925             :     178U, 124U, 553U, 118U, 1290U, 566U, 1311U, 757U, 
     926             :     38U, 383U, 30U, 333U, 1259U, 153U, 420U, 434U, 
     927             :     677U, 686U, 671U, 443U, 764U, 1014U, 993U, 808U, 
     928             :     1388U, 1667U, 2000U, 1523U, 1802U, 2150U, 1458U, 1737U, 
     929             :     2078U, 1593U, 1880U, 2228U, 1396U, 1683U, 2016U, 1531U, 
     930             :     1818U, 1147U, 2166U, 1465U, 1751U, 2092U, 1600U, 1894U, 
     931             :     1211U, 2242U, 1354U, 613U, 742U, 1404U, 1691U, 2024U, 
     932             :     1539U, 1826U, 1160U, 2174U, 1472U, 1758U, 2099U, 1607U, 
     933             :     1901U, 1223U, 2249U, 1675U, 2008U, 1810U, 2158U, 1744U, 
     934             :     2085U, 1887U, 2235U, 1428U, 1707U, 2048U, 1563U, 1850U, 
     935             :     2198U, 1493U, 1772U, 2120U, 1628U, 1922U, 2270U, 1363U, 
     936             :     1642U, 1975U, 1366U, 1645U, 1978U, 1412U, 2032U, 1547U, 
     937             :     1834U, 2182U, 1479U, 2106U, 1614U, 1908U, 2256U, 137U, 
     938             :     709U, 1436U, 1715U, 2056U, 1571U, 1858U, 1186U, 2206U, 
     939             :     1500U, 1779U, 2127U, 1635U, 1929U, 1247U, 2277U, 88U, 
     940             :     99U, 713U, 1421U, 1700U, 2041U, 1556U, 1843U, 1174U, 
     941             :     2191U, 1487U, 1766U, 2114U, 1622U, 1916U, 1236U, 2264U, 
     942             :     1952U, 1944U, 965U, 429U, 8U, 1337U, 23U, 1346U, 
     943             :     1380U, 1659U, 1992U, 1515U, 1794U, 2142U, 1451U, 1730U, 
     944             :     2071U, 1586U, 1873U, 2221U, 1959U, 0U, 16U, 1372U, 
     945             :     1651U, 1984U, 1507U, 1786U, 1134U, 2134U, 1444U, 1723U, 
     946             :     2064U, 1579U, 1866U, 1199U, 2214U, 1936U, 64U, 110U, 
     947             :     52U, 78U, 46U, 73U, 58U, 83U, 1420U, 1699U, 
     948             :     2040U, 1555U, 1842U, 1173U, 2190U, 1486U, 1765U, 2113U, 
     949             :     1621U, 1915U, 1235U, 2263U, 1967U, 
     950             : };
     951             : 
     952             : static inline void InitMSP430MCInstrInfo(MCInstrInfo *II) {
     953          64 :   II->InitMCInstrInfo(MSP430Insts, MSP430InstrNameIndices, MSP430InstrNameData, 277);
     954             : }
     955             : 
     956             : } // end llvm namespace
     957             : #endif // GET_INSTRINFO_MC_DESC
     958             : 
     959             : #ifdef GET_INSTRINFO_HEADER
     960             : #undef GET_INSTRINFO_HEADER
     961             : namespace llvm {
     962             : struct MSP430GenInstrInfo : public TargetInstrInfo {
     963             :   explicit MSP430GenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1, int ReturnOpcode = -1);
     964          64 :   ~MSP430GenInstrInfo() override = default;
     965             : };
     966             : } // end llvm namespace
     967             : #endif // GET_INSTRINFO_HEADER
     968             : 
     969             : #ifdef GET_INSTRINFO_CTOR_DTOR
     970             : #undef GET_INSTRINFO_CTOR_DTOR
     971             : namespace llvm {
     972             : extern const MCInstrDesc MSP430Insts[];
     973             : extern const unsigned MSP430InstrNameIndices[];
     974             : extern const char MSP430InstrNameData[];
     975          64 : MSP430GenInstrInfo::MSP430GenInstrInfo(int CFSetupOpcode, int CFDestroyOpcode, int CatchRetOpcode, int ReturnOpcode)
     976         128 :   : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) {
     977         128 :   InitMCInstrInfo(MSP430Insts, MSP430InstrNameIndices, MSP430InstrNameData, 277);
     978          64 : }
     979             : } // end llvm namespace
     980             : #endif // GET_INSTRINFO_CTOR_DTOR
     981             : 
     982             : #ifdef GET_INSTRINFO_OPERAND_ENUM
     983             : #undef GET_INSTRINFO_OPERAND_ENUM
     984             : namespace llvm {
     985             : namespace MSP430 {
     986             : namespace OpName {
     987             : enum {
     988             : OPERAND_LAST
     989             : };
     990             : } // end namespace OpName
     991             : } // end namespace MSP430
     992             : } // end namespace llvm
     993             : #endif //GET_INSTRINFO_OPERAND_ENUM
     994             : 
     995             : #ifdef GET_INSTRINFO_NAMED_OPS
     996             : #undef GET_INSTRINFO_NAMED_OPS
     997             : namespace llvm {
     998             : namespace MSP430 {
     999             : LLVM_READONLY
    1000             : int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {
    1001             :   return -1;
    1002             : }
    1003             : } // end namespace MSP430
    1004             : } // end namespace llvm
    1005             : #endif //GET_INSTRINFO_NAMED_OPS
    1006             : 
    1007             : #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM
    1008             : #undef GET_INSTRINFO_OPERAND_TYPES_ENUM
    1009             : namespace llvm {
    1010             : namespace MSP430 {
    1011             : namespace OpTypes {
    1012             : enum OperandType {
    1013             :   cc = 0,
    1014             :   f32imm = 1,
    1015             :   f64imm = 2,
    1016             :   i16imm = 3,
    1017             :   i1imm = 4,
    1018             :   i32imm = 5,
    1019             :   i64imm = 6,
    1020             :   i8imm = 7,
    1021             :   jmptarget = 8,
    1022             :   memdst = 9,
    1023             :   memsrc = 10,
    1024             :   type0 = 11,
    1025             :   type1 = 12,
    1026             :   type2 = 13,
    1027             :   type3 = 14,
    1028             :   type4 = 15,
    1029             :   type5 = 16,
    1030             :   OPERAND_TYPE_LIST_END
    1031             : };
    1032             : } // end namespace OpTypes
    1033             : } // end namespace MSP430
    1034             : } // end namespace llvm
    1035             : #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM
    1036             : 

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