LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/MSP430 - MSP430GenSubtargetInfo.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 15 17 88.2 %
Date: 2017-09-14 15:23:50 Functions: 3 6 50.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Subtarget Enumeration Source Fragment                                      *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : 
      10             : #ifdef GET_SUBTARGETINFO_ENUM
      11             : #undef GET_SUBTARGETINFO_ENUM
      12             : 
      13             : namespace llvm {
      14             : namespace MSP430 {
      15             : enum {
      16             :   FeatureHWMult16 = 0,
      17             :   FeatureHWMult32 = 1,
      18             :   FeatureHWMultF5 = 2,
      19             :   FeatureX = 3
      20             : };
      21             : } // end namespace MSP430
      22             : } // end namespace llvm
      23             : 
      24             : #endif // GET_SUBTARGETINFO_ENUM
      25             : 
      26             : 
      27             : #ifdef GET_SUBTARGETINFO_MC_DESC
      28             : #undef GET_SUBTARGETINFO_MC_DESC
      29             : 
      30             : namespace llvm {
      31             : // Sorted (by key) array of values for CPU features.
      32             : extern const llvm::SubtargetFeatureKV MSP430FeatureKV[] = {
      33             :   { "ext", "Enable MSP430-X extensions", { MSP430::FeatureX }, { } },
      34             :   { "hwmult16", "Enable 16-bit hardware multiplier", { MSP430::FeatureHWMult16 }, { } },
      35             :   { "hwmult32", "Enable 32-bit hardware multiplier", { MSP430::FeatureHWMult32 }, { } },
      36             :   { "hwmultf5", "Enable F5 series hardware multiplier", { MSP430::FeatureHWMultF5 }, { } }
      37       72306 : };
      38             : 
      39             : // Sorted (by key) array of values for CPU subtype.
      40             : extern const llvm::SubtargetFeatureKV MSP430SubTypeKV[] = {
      41             :   { "generic", "Select the generic processor", { }, { } },
      42             :   { "msp430", "Select the msp430 processor", { }, { } },
      43             :   { "msp430x", "Select the msp430x processor", { MSP430::FeatureX }, { } }
      44       72306 : };
      45             : 
      46             : #ifdef DBGFIELD
      47             : #error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro"
      48             : #endif
      49             : #ifndef NDEBUG
      50             : #define DBGFIELD(x) x,
      51             : #else
      52             : #define DBGFIELD(x)
      53             : #endif
      54             : 
      55             : // ===============================================================
      56             : // Data tables for the new per-operand machine model.
      57             : 
      58             : // {ProcResourceIdx, Cycles}
      59             : extern const llvm::MCWriteProcResEntry MSP430WriteProcResTable[] = {
      60             :   { 0,  0}, // Invalid
      61             : }; // MSP430WriteProcResTable
      62             : 
      63             : // {Cycles, WriteResourceID}
      64             : extern const llvm::MCWriteLatencyEntry MSP430WriteLatencyTable[] = {
      65             :   { 0,  0}, // Invalid
      66             : }; // MSP430WriteLatencyTable
      67             : 
      68             : // {UseIdx, WriteResourceID, Cycles}
      69             : extern const llvm::MCReadAdvanceEntry MSP430ReadAdvanceTable[] = {
      70             :   {0,  0,  0}, // Invalid
      71             : }; // MSP430ReadAdvanceTable
      72             : 
      73             : static const llvm::MCSchedModel NoSchedModel = {
      74             :   MCSchedModel::DefaultIssueWidth,
      75             :   MCSchedModel::DefaultMicroOpBufferSize,
      76             :   MCSchedModel::DefaultLoopMicroOpBufferSize,
      77             :   MCSchedModel::DefaultLoadLatency,
      78             :   MCSchedModel::DefaultHighLatency,
      79             :   MCSchedModel::DefaultMispredictPenalty,
      80             :   false, // PostRAScheduler
      81             :   false, // CompleteModel
      82             :   0, // Processor ID
      83             :   nullptr, nullptr, 0, 0, // No instruction-level machine model.
      84             :   nullptr}; // No Itinerary
      85             : 
      86             : // Sorted (by key) array of itineraries for CPU subtype.
      87             : extern const llvm::SubtargetInfoKV MSP430ProcSchedKV[] = {
      88             :   { "generic", (const void *)&NoSchedModel },
      89             :   { "msp430", (const void *)&NoSchedModel },
      90             :   { "msp430x", (const void *)&NoSchedModel }
      91             : };
      92             : #undef DBGFIELD
      93          64 : static inline MCSubtargetInfo *createMSP430MCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef FS) {
      94             :   return new MCSubtargetInfo(TT, CPU, FS, MSP430FeatureKV, MSP430SubTypeKV, 
      95             :                       MSP430ProcSchedKV, MSP430WriteProcResTable, MSP430WriteLatencyTable, MSP430ReadAdvanceTable, 
      96         192 :                       nullptr, nullptr, nullptr);
      97             : }
      98             : 
      99             : } // end namespace llvm
     100             : 
     101             : #endif // GET_SUBTARGETINFO_MC_DESC
     102             : 
     103             : 
     104             : #ifdef GET_SUBTARGETINFO_TARGET_DESC
     105             : #undef GET_SUBTARGETINFO_TARGET_DESC
     106             : 
     107             : #include "llvm/Support/Debug.h"
     108             : #include "llvm/Support/raw_ostream.h"
     109             : 
     110             : // ParseSubtargetFeatures - Parses features string setting specified
     111             : // subtarget options.
     112          64 : void llvm::MSP430Subtarget::ParseSubtargetFeatures(StringRef CPU, StringRef FS) {
     113             :   DEBUG(dbgs() << "\nFeatures:" << FS);
     114             :   DEBUG(dbgs() << "\nCPU:" << CPU << "\n\n");
     115          64 :   InitMCProcessorInfo(CPU, FS);
     116          64 :   const FeatureBitset& Bits = getFeatureBits();
     117         128 :   if (Bits[MSP430::FeatureHWMult16] && HWMultMode < HWMult16) HWMultMode = HWMult16;
     118         128 :   if (Bits[MSP430::FeatureHWMult32] && HWMultMode < HWMult32) HWMultMode = HWMult32;
     119         128 :   if (Bits[MSP430::FeatureHWMultF5] && HWMultMode < HWMultF5) HWMultMode = HWMultF5;
     120         128 :   if (Bits[MSP430::FeatureX]) ExtendedInsts = true;
     121          64 : }
     122             : #endif // GET_SUBTARGETINFO_TARGET_DESC
     123             : 
     124             : 
     125             : #ifdef GET_SUBTARGETINFO_HEADER
     126             : #undef GET_SUBTARGETINFO_HEADER
     127             : 
     128             : namespace llvm {
     129             : class DFAPacketizer;
     130          64 : struct MSP430GenSubtargetInfo : public TargetSubtargetInfo {
     131             :   explicit MSP430GenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS);
     132             : public:
     133             :   unsigned resolveSchedClass(unsigned SchedClass,  const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const override;
     134             :   DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
     135             : };
     136             : } // end namespace llvm
     137             : 
     138             : #endif // GET_SUBTARGETINFO_HEADER
     139             : 
     140             : 
     141             : #ifdef GET_SUBTARGETINFO_CTOR
     142             : #undef GET_SUBTARGETINFO_CTOR
     143             : 
     144             : #include "llvm/CodeGen/TargetSchedule.h"
     145             : 
     146             : namespace llvm {
     147             : extern const llvm::SubtargetFeatureKV MSP430FeatureKV[];
     148             : extern const llvm::SubtargetFeatureKV MSP430SubTypeKV[];
     149             : extern const llvm::SubtargetInfoKV MSP430ProcSchedKV[];
     150             : extern const llvm::MCWriteProcResEntry MSP430WriteProcResTable[];
     151             : extern const llvm::MCWriteLatencyEntry MSP430WriteLatencyTable[];
     152             : extern const llvm::MCReadAdvanceEntry MSP430ReadAdvanceTable[];
     153          64 : MSP430GenSubtargetInfo::MSP430GenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
     154             :   : TargetSubtargetInfo(TT, CPU, FS, makeArrayRef(MSP430FeatureKV, 4), makeArrayRef(MSP430SubTypeKV, 3), 
     155             :                         MSP430ProcSchedKV, MSP430WriteProcResTable, MSP430WriteLatencyTable, MSP430ReadAdvanceTable, 
     156         192 :                         nullptr, nullptr, nullptr) {}
     157             : 
     158           0 : unsigned MSP430GenSubtargetInfo
     159             : ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
     160           0 :   report_fatal_error("Expected a variant SchedClass");
     161             : } // MSP430GenSubtargetInfo::resolveSchedClass
     162             : } // end namespace llvm
     163             : 
     164             : #endif // GET_SUBTARGETINFO_CTOR
     165             : 

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