LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/Mips - MipsGenDAGISel.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 455 480 94.8 %
Date: 2017-09-14 15:23:50 Functions: 4 4 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* DAG Instruction Selector for the Mips target                               *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : // *** NOTE: This file is #included into the middle of the target
      10             : // *** instruction selector class.  These functions are really methods.
      11             : 
      12             : // The main instruction selector code.
      13             : void SelectCode(SDNode *N) {
      14             :   // Some target values are emitted as 2 bytes, TARGET_VAL handles
      15             :   // this.
      16             :   #define TARGET_VAL(X) X & 255, unsigned(X) >> 8
      17             :   static const unsigned char MatcherTable[] = {
      18             : /*0*/       OPC_SwitchOpcode /*175 cases */, 50|128,7/*946*/, TARGET_VAL(ISD::STORE),// ->951
      19             : /*5*/         OPC_RecordMemRef,
      20             : /*6*/         OPC_RecordNode, // #0 = 'st' chained node
      21             : /*7*/         OPC_Scope, 67|128,1/*195*/, /*->205*/ // 3 children in Scope
      22             : /*10*/          OPC_RecordChild1, // #1 = $v
      23             : /*11*/          OPC_Scope, 110, /*->123*/ // 2 children in Scope
      24             : /*13*/            OPC_CheckChild1Type, MVT::f64,
      25             : /*15*/            OPC_Scope, 67, /*->84*/ // 2 children in Scope
      26             : /*17*/              OPC_RecordChild2, // #2 = $a
      27             : /*18*/              OPC_CheckPredicate, 0, // Predicate_unindexedstore
      28             : /*20*/              OPC_CheckPredicate, 1, // Predicate_store
      29             : /*22*/              OPC_Scope, 14, /*->38*/ // 4 children in Scope
      30             : /*24*/                OPC_CheckPatternPredicate, 0, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit())
      31             : /*26*/                OPC_CheckComplexPat, /*CP*/0, /*#*/2, // selectAddrRegImm:$a #3 #4
      32             : /*29*/                OPC_EmitMergeInputChains1_0,
      33             : /*30*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC1_D64_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
      34             :                           3/*#Ops*/, 1, 3, 4, 
      35             :                       // Src: (st f64:f64:$v, addrRegImm:iPTR:$a)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 54
      36             :                       // Dst: (SDC1_D64_MMR6 f64:f64:$v, addrRegImm:i32:$a)
      37             : /*38*/              /*Scope*/ 14, /*->53*/
      38             : /*39*/                OPC_CheckPatternPredicate, 1, // (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode())
      39             : /*41*/                OPC_CheckComplexPat, /*CP*/0, /*#*/2, // selectAddrRegImm:$a #3 #4
      40             : /*44*/                OPC_EmitMergeInputChains1_0,
      41             : /*45*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC164), 0|OPFL_Chain|OPFL_MemRefs,
      42             :                           3/*#Ops*/, 1, 3, 4, 
      43             :                       // Src: (st f64:f64:$v, addrRegImm:iPTR:$a)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 53
      44             :                       // Dst: (SDC164 f64:f64:$v, addrRegImm:iPTR:$a)
      45             : /*53*/              /*Scope*/ 14, /*->68*/
      46             : /*54*/                OPC_CheckPatternPredicate, 2, // (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode())
      47             : /*56*/                OPC_CheckComplexPat, /*CP*/0, /*#*/2, // selectAddrRegImm:$a #3 #4
      48             : /*59*/                OPC_EmitMergeInputChains1_0,
      49             : /*60*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC1), 0|OPFL_Chain|OPFL_MemRefs,
      50             :                           3/*#Ops*/, 1, 3, 4, 
      51             :                       // Src: (st f64:f64:$v, addrRegImm:iPTR:$a)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 53
      52             :                       // Dst: (SDC1 f64:f64:$v, addrRegImm:iPTR:$a)
      53             : /*68*/              /*Scope*/ 14, /*->83*/
      54             : /*69*/                OPC_CheckPatternPredicate, 3, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->isFP64bit())
      55             : /*71*/                OPC_CheckComplexPat, /*CP*/0, /*#*/2, // selectAddrRegImm:$a #3 #4
      56             : /*74*/                OPC_EmitMergeInputChains1_0,
      57             : /*75*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
      58             :                           3/*#Ops*/, 1, 3, 4, 
      59             :                       // Src: (st f64:f64:$v, addrRegImm:iPTR:$a)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 53
      60             :                       // Dst: (SDC1_MM f64:f64:$v, addrRegImm:i32:$a)
      61             : /*83*/              0, /*End of Scope*/
      62             : /*84*/            /*Scope*/ 37, /*->122*/
      63             : /*85*/              OPC_MoveChild2,
      64             : /*86*/              OPC_CheckOpcode, TARGET_VAL(ISD::ADD),
      65             : /*89*/              OPC_RecordChild0, // #2 = $base
      66             : /*90*/              OPC_RecordChild1, // #3 = $index
      67             : /*91*/              OPC_MoveParent,
      68             : /*92*/              OPC_CheckPredicate, 0, // Predicate_unindexedstore
      69             : /*94*/              OPC_CheckPredicate, 1, // Predicate_store
      70             : /*96*/              OPC_Scope, 11, /*->109*/ // 2 children in Scope
      71             : /*98*/                OPC_CheckPatternPredicate, 4, // (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isTargetNaCl()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
      72             : /*100*/               OPC_EmitMergeInputChains1_0,
      73             : /*101*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SDXC1), 0|OPFL_Chain|OPFL_MemRefs,
      74             :                           3/*#Ops*/, 1, 2, 3, 
      75             :                       // Src: (st AFGR64Opnd:f64:$fs, (add:iPTR iPTR:iPTR:$base, iPTR:iPTR:$index))<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 27
      76             :                       // Dst: (SDXC1 AFGR64Opnd:f64:$fs, iPTR:iPTR:$base, iPTR:iPTR:$index)
      77             : /*109*/             /*Scope*/ 11, /*->121*/
      78             : /*110*/               OPC_CheckPatternPredicate, 5, // (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
      79             : /*112*/               OPC_EmitMergeInputChains1_0,
      80             : /*113*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SDXC164), 0|OPFL_Chain|OPFL_MemRefs,
      81             :                           3/*#Ops*/, 1, 2, 3, 
      82             :                       // Src: (st FGR64Opnd:f64:$fs, (add:iPTR iPTR:iPTR:$base, iPTR:iPTR:$index))<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 27
      83             :                       // Dst: (SDXC164 FGR64Opnd:f64:$fs, iPTR:iPTR:$base, iPTR:iPTR:$index)
      84             : /*121*/             0, /*End of Scope*/
      85             : /*122*/           0, /*End of Scope*/
      86             : /*123*/         /*Scope*/ 80, /*->204*/
      87             : /*124*/           OPC_CheckChild1Type, MVT::f32,
      88             : /*126*/           OPC_Scope, 37, /*->165*/ // 2 children in Scope
      89             : /*128*/             OPC_RecordChild2, // #2 = $a
      90             : /*129*/             OPC_CheckPredicate, 0, // Predicate_unindexedstore
      91             : /*131*/             OPC_CheckPredicate, 1, // Predicate_store
      92             : /*133*/             OPC_Scope, 14, /*->149*/ // 2 children in Scope
      93             : /*135*/               OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
      94             : /*137*/               OPC_CheckComplexPat, /*CP*/0, /*#*/2, // selectAddrRegImm:$a #3 #4
      95             : /*140*/               OPC_EmitMergeInputChains1_0,
      96             : /*141*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SWC1), 0|OPFL_Chain|OPFL_MemRefs,
      97             :                           3/*#Ops*/, 1, 3, 4, 
      98             :                       // Src: (st f32:f32:$v, addrRegImm:iPTR:$a)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 53
      99             :                       // Dst: (SWC1 f32:f32:$v, addrRegImm:iPTR:$a)
     100             : /*149*/             /*Scope*/ 14, /*->164*/
     101             : /*150*/               OPC_CheckPatternPredicate, 7, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode())
     102             : /*152*/               OPC_CheckComplexPat, /*CP*/0, /*#*/2, // selectAddrRegImm:$a #3 #4
     103             : /*155*/               OPC_EmitMergeInputChains1_0,
     104             : /*156*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SWC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
     105             :                           3/*#Ops*/, 1, 3, 4, 
     106             :                       // Src: (st f32:f32:$v, addrRegImm:iPTR:$a)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 53
     107             :                       // Dst: (SWC1_MM f32:f32:$v, addrRegImm:i32:$a)
     108             : /*164*/             0, /*End of Scope*/
     109             : /*165*/           /*Scope*/ 37, /*->203*/
     110             : /*166*/             OPC_MoveChild2,
     111             : /*167*/             OPC_CheckOpcode, TARGET_VAL(ISD::ADD),
     112             : /*170*/             OPC_RecordChild0, // #2 = $base
     113             : /*171*/             OPC_RecordChild1, // #3 = $index
     114             : /*172*/             OPC_MoveParent,
     115             : /*173*/             OPC_CheckPredicate, 0, // Predicate_unindexedstore
     116             : /*175*/             OPC_CheckPredicate, 1, // Predicate_store
     117             : /*177*/             OPC_Scope, 11, /*->190*/ // 2 children in Scope
     118             : /*179*/               OPC_CheckPatternPredicate, 8, // (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isTargetNaCl()) && (!Subtarget->useSoftFloat()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
     119             : /*181*/               OPC_EmitMergeInputChains1_0,
     120             : /*182*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SWXC1), 0|OPFL_Chain|OPFL_MemRefs,
     121             :                           3/*#Ops*/, 1, 2, 3, 
     122             :                       // Src: (st FGR32Opnd:f32:$fs, (add:iPTR iPTR:iPTR:$base, iPTR:iPTR:$index))<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 27
     123             :                       // Dst: (SWXC1 FGR32Opnd:f32:$fs, iPTR:iPTR:$base, iPTR:iPTR:$index)
     124             : /*190*/             /*Scope*/ 11, /*->202*/
     125             : /*191*/               OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
     126             : /*193*/               OPC_EmitMergeInputChains1_0,
     127             : /*194*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SWXC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
     128             :                           3/*#Ops*/, 1, 2, 3, 
     129             :                       // Src: (st FGR32Opnd:f32:$fs, (add:iPTR iPTR:iPTR:$base, iPTR:iPTR:$index))<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 27
     130             :                       // Dst: (SWXC1_MM FGR32Opnd:f32:$fs, iPTR:iPTR:$base, iPTR:iPTR:$index)
     131             : /*202*/             0, /*End of Scope*/
     132             : /*203*/           0, /*End of Scope*/
     133             : /*204*/         0, /*End of Scope*/
     134             : /*205*/       /*Scope*/ 26, /*->232*/
     135             : /*206*/         OPC_CheckChild1Integer, 0, 
     136             : /*208*/         OPC_CheckChild1Type, MVT::i32,
     137             : /*210*/         OPC_RecordChild2, // #1 = $dst
     138             : /*211*/         OPC_CheckPredicate, 0, // Predicate_unindexedstore
     139             : /*213*/         OPC_CheckPredicate, 1, // Predicate_store
     140             : /*215*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     141             : /*217*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$dst #2 #3
     142             : /*220*/         OPC_EmitMergeInputChains1_0,
     143             : /*221*/         OPC_EmitRegister, MVT::i32, Mips::ZERO,
     144             : /*224*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SW), 0|OPFL_Chain|OPFL_MemRefs,
     145             :                     3/*#Ops*/, 4, 2, 3, 
     146             :                 // Src: (st 0:i32, addr:iPTR:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 18
     147             :                 // Dst: (SW ZERO:i32, addr:iPTR:$dst)
     148             : /*232*/       /*Scope*/ 76|128,5/*716*/, /*->950*/
     149             : /*234*/         OPC_RecordChild1, // #1 = $rt
     150             : /*235*/         OPC_Scope, 3|128,2/*259*/, /*->497*/ // 14 children in Scope
     151             : /*238*/           OPC_CheckChild1Type, MVT::i32,
     152             : /*240*/           OPC_RecordChild2, // #2 = $addr
     153             : /*241*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     154             : /*243*/           OPC_Scope, 38, /*->283*/ // 4 children in Scope
     155             : /*245*/             OPC_CheckPredicate, 2, // Predicate_truncstore
     156             : /*247*/             OPC_Scope, 16, /*->265*/ // 2 children in Scope
     157             : /*249*/               OPC_CheckPredicate, 3, // Predicate_truncstorei8
     158             : /*251*/               OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     159             : /*253*/               OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     160             : /*256*/               OPC_EmitMergeInputChains1_0,
     161             : /*257*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SB), 0|OPFL_Chain|OPFL_MemRefs,
     162             :                           3/*#Ops*/, 1, 3, 4, 
     163             :                       // Src: (st GPR32Opnd:i32:$rt, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> - Complexity = 13
     164             :                       // Dst: (SB GPR32Opnd:i32:$rt, addr:iPTR:$addr)
     165             : /*265*/             /*Scope*/ 16, /*->282*/
     166             : /*266*/               OPC_CheckPredicate, 4, // Predicate_truncstorei16
     167             : /*268*/               OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     168             : /*270*/               OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     169             : /*273*/               OPC_EmitMergeInputChains1_0,
     170             : /*274*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SH), 0|OPFL_Chain|OPFL_MemRefs,
     171             :                           3/*#Ops*/, 1, 3, 4, 
     172             :                       // Src: (st GPR32Opnd:i32:$rt, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> - Complexity = 13
     173             :                       // Dst: (SH GPR32Opnd:i32:$rt, addr:iPTR:$addr)
     174             : /*282*/             0, /*End of Scope*/
     175             : /*283*/           /*Scope*/ 79, /*->363*/
     176             : /*284*/             OPC_CheckPredicate, 1, // Predicate_store
     177             : /*286*/             OPC_Scope, 14, /*->302*/ // 5 children in Scope
     178             : /*288*/               OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     179             : /*290*/               OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     180             : /*293*/               OPC_EmitMergeInputChains1_0,
     181             : /*294*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SW), 0|OPFL_Chain|OPFL_MemRefs,
     182             :                           3/*#Ops*/, 1, 3, 4, 
     183             :                       // Src: (st GPR32Opnd:i32:$rt, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     184             :                       // Dst: (SW GPR32Opnd:i32:$rt, addr:iPTR:$addr)
     185             : /*302*/             /*Scope*/ 14, /*->317*/
     186             : /*303*/               OPC_CheckPatternPredicate, 11, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
     187             : /*305*/               OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     188             : /*308*/               OPC_EmitMergeInputChains1_0,
     189             : /*309*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SWC2), 0|OPFL_Chain|OPFL_MemRefs,
     190             :                           3/*#Ops*/, 1, 3, 4, 
     191             :                       // Src: (st COP2Opnd:i32:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     192             :                       // Dst: (SWC2 COP2Opnd:i32:$rt, addrDefault:iPTR:$addr)
     193             : /*317*/             /*Scope*/ 14, /*->332*/
     194             : /*318*/               OPC_CheckPatternPredicate, 12, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
     195             : /*320*/               OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     196             : /*323*/               OPC_EmitMergeInputChains1_0,
     197             : /*324*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC2), 0|OPFL_Chain|OPFL_MemRefs,
     198             :                           3/*#Ops*/, 1, 3, 4, 
     199             :                       // Src: (st COP2Opnd:i32:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     200             :                       // Dst: (SDC2 COP2Opnd:i32:$rt, addrDefault:iPTR:$addr)
     201             : /*332*/             /*Scope*/ 14, /*->347*/
     202             : /*333*/               OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     203             : /*335*/               OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     204             : /*338*/               OPC_EmitMergeInputChains1_0,
     205             : /*339*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SWC3), 0|OPFL_Chain|OPFL_MemRefs,
     206             :                           3/*#Ops*/, 1, 3, 4, 
     207             :                       // Src: (st COP3Opnd:i32:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     208             :                       // Dst: (SWC3 COP3Opnd:i32:$rt, addrDefault:iPTR:$addr)
     209             : /*347*/             /*Scope*/ 14, /*->362*/
     210             : /*348*/               OPC_CheckPatternPredicate, 13, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     211             : /*350*/               OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     212             : /*353*/               OPC_EmitMergeInputChains1_0,
     213             : /*354*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC3), 0|OPFL_Chain|OPFL_MemRefs,
     214             :                           3/*#Ops*/, 1, 3, 4, 
     215             :                       // Src: (st COP3Opnd:i32:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     216             :                       // Dst: (SDC3 COP3Opnd:i32:$rt, addrDefault:iPTR:$addr)
     217             : /*362*/             0, /*End of Scope*/
     218             : /*363*/           /*Scope*/ 38, /*->402*/
     219             : /*364*/             OPC_CheckPredicate, 2, // Predicate_truncstore
     220             : /*366*/             OPC_Scope, 16, /*->384*/ // 2 children in Scope
     221             : /*368*/               OPC_CheckPredicate, 3, // Predicate_truncstorei8
     222             : /*370*/               OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     223             : /*372*/               OPC_CheckComplexPat, /*CP*/3, /*#*/2, // selectAddr16:$addr #3 #4
     224             : /*375*/               OPC_EmitMergeInputChains1_0,
     225             : /*376*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SbRxRyOffMemX16), 0|OPFL_Chain|OPFL_MemRefs,
     226             :                           3/*#Ops*/, 1, 3, 4, 
     227             :                       // Src: (st CPU16Regs:i32:$r, addr16:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> - Complexity = 13
     228             :                       // Dst: (SbRxRyOffMemX16 CPU16Regs:i32:$r, addr16:i32:$addr)
     229             : /*384*/             /*Scope*/ 16, /*->401*/
     230             : /*385*/               OPC_CheckPredicate, 4, // Predicate_truncstorei16
     231             : /*387*/               OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     232             : /*389*/               OPC_CheckComplexPat, /*CP*/3, /*#*/2, // selectAddr16:$addr #3 #4
     233             : /*392*/               OPC_EmitMergeInputChains1_0,
     234             : /*393*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::ShRxRyOffMemX16), 0|OPFL_Chain|OPFL_MemRefs,
     235             :                           3/*#Ops*/, 1, 3, 4, 
     236             :                       // Src: (st CPU16Regs:i32:$r, addr16:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> - Complexity = 13
     237             :                       // Dst: (ShRxRyOffMemX16 CPU16Regs:i32:$r, addr16:i32:$addr)
     238             : /*401*/             0, /*End of Scope*/
     239             : /*402*/           /*Scope*/ 93, /*->496*/
     240             : /*403*/             OPC_CheckPredicate, 1, // Predicate_store
     241             : /*405*/             OPC_Scope, 14, /*->421*/ // 3 children in Scope
     242             : /*407*/               OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     243             : /*409*/               OPC_CheckComplexPat, /*CP*/4, /*#*/2, // selectAddr16SP:$addr #3 #4
     244             : /*412*/               OPC_EmitMergeInputChains1_0,
     245             : /*413*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SwRxSpImmX16), 0|OPFL_Chain|OPFL_MemRefs,
     246             :                           3/*#Ops*/, 1, 3, 4, 
     247             :                       // Src: (st CPU16Regs:i32:$r, addr16sp:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     248             :                       // Dst: (SwRxSpImmX16 CPU16Regs:i32:$r, addr16sp:i32:$addr)
     249             : /*421*/             /*Scope*/ 30, /*->452*/
     250             : /*422*/               OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
     251             : /*424*/               OPC_Scope, 12, /*->438*/ // 2 children in Scope
     252             : /*426*/                 OPC_CheckComplexPat, /*CP*/5, /*#*/2, // selectIntAddrLSL2MM:$addr #3 #4
     253             : /*429*/                 OPC_EmitMergeInputChains1_0,
     254             : /*430*/                 OPC_MorphNodeTo0, TARGET_VAL(Mips::SW16_MM), 0|OPFL_Chain|OPFL_MemRefs,
     255             :                             3/*#Ops*/, 1, 3, 4, 
     256             :                         // Src: (st GPRMM16:i32:$src, addrimm4lsl2:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     257             :                         // Dst: (SW16_MM GPRMM16:i32:$src, addrimm4lsl2:i32:$addr)
     258             : /*438*/               /*Scope*/ 12, /*->451*/
     259             : /*439*/                 OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     260             : /*442*/                 OPC_EmitMergeInputChains1_0,
     261             : /*443*/                 OPC_MorphNodeTo0, TARGET_VAL(Mips::SW_MM), 0|OPFL_Chain|OPFL_MemRefs,
     262             :                             3/*#Ops*/, 1, 3, 4, 
     263             :                         // Src: (st GPR32:i32:$src, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     264             :                         // Dst: (SW_MM GPR32:i32:$src, addr:iPTR:$addr)
     265             : /*451*/               0, /*End of Scope*/
     266             : /*452*/             /*Scope*/ 42, /*->495*/
     267             : /*453*/               OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
     268             : /*455*/               OPC_Scope, 24, /*->481*/ // 2 children in Scope
     269             : /*457*/                 OPC_CheckComplexPat, /*CP*/6, /*#*/2, // selectIntAddr11MM:$addr #3 #4
     270             : /*460*/                 OPC_EmitMergeInputChains1_0,
     271             : /*461*/                 OPC_Scope, 8, /*->471*/ // 2 children in Scope
     272             : /*463*/                   OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC2_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
     273             :                               3/*#Ops*/, 1, 3, 4, 
     274             :                           // Src: (st COP2Opnd:i32:$rt, addrimm11:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     275             :                           // Dst: (SDC2_MMR6 COP2Opnd:i32:$rt, addrimm11:i32:$addr)
     276             : /*471*/                 /*Scope*/ 8, /*->480*/
     277             : /*472*/                   OPC_MorphNodeTo0, TARGET_VAL(Mips::SWC2_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
     278             :                               3/*#Ops*/, 1, 3, 4, 
     279             :                           // Src: (st COP2Opnd:i32:$rt, addrimm11:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     280             :                           // Dst: (SWC2_MMR6 COP2Opnd:i32:$rt, addrimm11:i32:$addr)
     281             : /*480*/                 0, /*End of Scope*/
     282             : /*481*/               /*Scope*/ 12, /*->494*/
     283             : /*482*/                 OPC_CheckComplexPat, /*CP*/5, /*#*/2, // selectIntAddrLSL2MM:$addr #3 #4
     284             : /*485*/                 OPC_EmitMergeInputChains1_0,
     285             : /*486*/                 OPC_MorphNodeTo0, TARGET_VAL(Mips::SW16_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
     286             :                             3/*#Ops*/, 1, 3, 4, 
     287             :                         // Src: (st GPRMM16:i32:$src, addrimm4lsl2:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     288             :                         // Dst: (SW16_MMR6 GPRMM16:i32:$src, addrimm4lsl2:i32:$addr)
     289             : /*494*/               0, /*End of Scope*/
     290             : /*495*/             0, /*End of Scope*/
     291             : /*496*/           0, /*End of Scope*/
     292             : /*497*/         /*Scope*/ 39, /*->537*/
     293             : /*498*/           OPC_CheckChild1Type, MVT::f32,
     294             : /*500*/           OPC_RecordChild2, // #2 = $addr
     295             : /*501*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     296             : /*503*/           OPC_CheckPredicate, 1, // Predicate_store
     297             : /*505*/           OPC_Scope, 14, /*->521*/ // 2 children in Scope
     298             : /*507*/             OPC_CheckPatternPredicate, 16, // (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode())
     299             : /*509*/             OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     300             : /*512*/             OPC_EmitMergeInputChains1_0,
     301             : /*513*/             OPC_MorphNodeTo0, TARGET_VAL(Mips::SWC1), 0|OPFL_Chain|OPFL_MemRefs,
     302             :                         3/*#Ops*/, 1, 3, 4, 
     303             :                     // Src: (st FGR32Opnd:f32:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     304             :                     // Dst: (SWC1 FGR32Opnd:f32:$rt, addrDefault:iPTR:$addr)
     305             : /*521*/           /*Scope*/ 14, /*->536*/
     306             : /*522*/             OPC_CheckPatternPredicate, 17, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat())
     307             : /*524*/             OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     308             : /*527*/             OPC_EmitMergeInputChains1_0,
     309             : /*528*/             OPC_MorphNodeTo0, TARGET_VAL(Mips::SWC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
     310             :                         3/*#Ops*/, 1, 3, 4, 
     311             :                     // Src: (st FGR32Opnd:f32:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     312             :                     // Dst: (SWC1_MM FGR32Opnd:f32:$rt, addrDefault:i32:$addr)
     313             : /*536*/           0, /*End of Scope*/
     314             : /*537*/         /*Scope*/ 69, /*->607*/
     315             : /*538*/           OPC_CheckChild1Type, MVT::f64,
     316             : /*540*/           OPC_RecordChild2, // #2 = $addr
     317             : /*541*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     318             : /*543*/           OPC_CheckPredicate, 1, // Predicate_store
     319             : /*545*/           OPC_Scope, 14, /*->561*/ // 4 children in Scope
     320             : /*547*/             OPC_CheckPatternPredicate, 18, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode())
     321             : /*549*/             OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     322             : /*552*/             OPC_EmitMergeInputChains1_0,
     323             : /*553*/             OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC164), 0|OPFL_Chain|OPFL_MemRefs,
     324             :                         3/*#Ops*/, 1, 3, 4, 
     325             :                     // Src: (st FGR64Opnd:f64:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     326             :                     // Dst: (SDC164 FGR64Opnd:f64:$rt, addrDefault:iPTR:$addr)
     327             : /*561*/           /*Scope*/ 14, /*->576*/
     328             : /*562*/             OPC_CheckPatternPredicate, 19, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode())
     329             : /*564*/             OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     330             : /*567*/             OPC_EmitMergeInputChains1_0,
     331             : /*568*/             OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC1), 0|OPFL_Chain|OPFL_MemRefs,
     332             :                         3/*#Ops*/, 1, 3, 4, 
     333             :                     // Src: (st AFGR64Opnd:f64:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     334             :                     // Dst: (SDC1 AFGR64Opnd:f64:$rt, addrDefault:iPTR:$addr)
     335             : /*576*/           /*Scope*/ 14, /*->591*/
     336             : /*577*/             OPC_CheckPatternPredicate, 20, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit())
     337             : /*579*/             OPC_CheckComplexPat, /*CP*/2, /*#*/2, // selectAddrDefault:$addr #3 #4
     338             : /*582*/             OPC_EmitMergeInputChains1_0,
     339             : /*583*/             OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
     340             :                         3/*#Ops*/, 1, 3, 4, 
     341             :                     // Src: (st AFGR64Opnd:f64:$rt, addrDefault:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     342             :                     // Dst: (SDC1_MM AFGR64Opnd:f64:$rt, addrDefault:i32:$addr)
     343             : /*591*/           /*Scope*/ 14, /*->606*/
     344             : /*592*/             OPC_CheckPatternPredicate, 21, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat())
     345             : /*594*/             OPC_CheckComplexPat, /*CP*/7, /*#*/2, // selectIntAddr16MM:$addr #3 #4
     346             : /*597*/             OPC_EmitMergeInputChains1_0,
     347             : /*598*/             OPC_MorphNodeTo0, TARGET_VAL(Mips::SDC1_D64_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
     348             :                         3/*#Ops*/, 1, 3, 4, 
     349             :                     // Src: (st FGR64Opnd:f64:$ft, addrimm16:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     350             :                     // Dst: (SDC1_D64_MMR6 FGR64Opnd:f64:$ft, addrimm16:i32:$addr)
     351             : /*606*/           0, /*End of Scope*/
     352             : /*607*/         /*Scope*/ 98, /*->706*/
     353             : /*608*/           OPC_CheckChild1Type, MVT::i64,
     354             : /*610*/           OPC_RecordChild2, // #2 = $addr
     355             : /*611*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     356             : /*613*/           OPC_Scope, 55, /*->670*/ // 2 children in Scope
     357             : /*615*/             OPC_CheckPredicate, 2, // Predicate_truncstore
     358             : /*617*/             OPC_Scope, 16, /*->635*/ // 3 children in Scope
     359             : /*619*/               OPC_CheckPredicate, 3, // Predicate_truncstorei8
     360             : /*621*/               OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     361             : /*623*/               OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     362             : /*626*/               OPC_EmitMergeInputChains1_0,
     363             : /*627*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SB64), 0|OPFL_Chain|OPFL_MemRefs,
     364             :                           3/*#Ops*/, 1, 3, 4, 
     365             :                       // Src: (st GPR64Opnd:i64:$rt, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> - Complexity = 13
     366             :                       // Dst: (SB64 GPR64Opnd:i64:$rt, addr:iPTR:$addr)
     367             : /*635*/             /*Scope*/ 16, /*->652*/
     368             : /*636*/               OPC_CheckPredicate, 4, // Predicate_truncstorei16
     369             : /*638*/               OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     370             : /*640*/               OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     371             : /*643*/               OPC_EmitMergeInputChains1_0,
     372             : /*644*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SH64), 0|OPFL_Chain|OPFL_MemRefs,
     373             :                           3/*#Ops*/, 1, 3, 4, 
     374             :                       // Src: (st GPR64Opnd:i64:$rt, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> - Complexity = 13
     375             :                       // Dst: (SH64 GPR64Opnd:i64:$rt, addr:iPTR:$addr)
     376             : /*652*/             /*Scope*/ 16, /*->669*/
     377             : /*653*/               OPC_CheckPredicate, 5, // Predicate_truncstorei32
     378             : /*655*/               OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     379             : /*657*/               OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     380             : /*660*/               OPC_EmitMergeInputChains1_0,
     381             : /*661*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SW64), 0|OPFL_Chain|OPFL_MemRefs,
     382             :                           3/*#Ops*/, 1, 3, 4, 
     383             :                       // Src: (st GPR64Opnd:i64:$rt, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei32>> - Complexity = 13
     384             :                       // Dst: (SW64 GPR64Opnd:i64:$rt, addr:iPTR:$addr)
     385             : /*669*/             0, /*End of Scope*/
     386             : /*670*/           /*Scope*/ 34, /*->705*/
     387             : /*671*/             OPC_CheckPredicate, 1, // Predicate_store
     388             : /*673*/             OPC_Scope, 14, /*->689*/ // 2 children in Scope
     389             : /*675*/               OPC_CheckPatternPredicate, 22, // (Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     390             : /*677*/               OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     391             : /*680*/               OPC_EmitMergeInputChains1_0,
     392             : /*681*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SD), 0|OPFL_Chain|OPFL_MemRefs,
     393             :                           3/*#Ops*/, 1, 3, 4, 
     394             :                       // Src: (st GPR64Opnd:i64:$rt, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     395             :                       // Dst: (SD GPR64Opnd:i64:$rt, addr:iPTR:$addr)
     396             : /*689*/             /*Scope*/ 14, /*->704*/
     397             : /*690*/               OPC_CheckPatternPredicate, 23, // (Subtarget->inMicroMips64r6Mode()) && (Subtarget->hasStandardEncoding())
     398             : /*692*/               OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
     399             : /*695*/               OPC_EmitMergeInputChains1_0,
     400             : /*696*/               OPC_MorphNodeTo0, TARGET_VAL(Mips::SD_MM64R6), 0|OPFL_Chain|OPFL_MemRefs,
     401             :                           3/*#Ops*/, 1, 3, 4, 
     402             :                       // Src: (st GPR64Opnd:i64:$rt, addr:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     403             :                       // Dst: (SD_MM64R6 GPR64Opnd:i64:$rt, addr:iPTR:$addr)
     404             : /*704*/             0, /*End of Scope*/
     405             : /*705*/           0, /*End of Scope*/
     406             : /*706*/         /*Scope*/ 21, /*->728*/
     407             : /*707*/           OPC_CheckChild1Type, MVT::v16i8,
     408             : /*709*/           OPC_RecordChild2, // #2 = $addr
     409             : /*710*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     410             : /*712*/           OPC_CheckPredicate, 1, // Predicate_store
     411             : /*714*/           OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
     412             : /*716*/           OPC_CheckComplexPat, /*CP*/8, /*#*/2, // selectIntAddrSImm10:$addr #3 #4
     413             : /*719*/           OPC_EmitMergeInputChains1_0,
     414             : /*720*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_B), 0|OPFL_Chain|OPFL_MemRefs,
     415             :                       3/*#Ops*/, 1, 3, 4, 
     416             :                   // Src: (st MSA128BOpnd:v16i8:$wd, addrimm10:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     417             :                   // Dst: (ST_B MSA128BOpnd:v16i8:$wd, addrimm10:iPTR:$addr)
     418             : /*728*/         /*Scope*/ 21, /*->750*/
     419             : /*729*/           OPC_CheckChild1Type, MVT::v8i16,
     420             : /*731*/           OPC_RecordChild2, // #2 = $addr
     421             : /*732*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     422             : /*734*/           OPC_CheckPredicate, 1, // Predicate_store
     423             : /*736*/           OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
     424             : /*738*/           OPC_CheckComplexPat, /*CP*/9, /*#*/2, // selectIntAddrSImm10Lsl1:$addr #3 #4
     425             : /*741*/           OPC_EmitMergeInputChains1_0,
     426             : /*742*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_H), 0|OPFL_Chain|OPFL_MemRefs,
     427             :                       3/*#Ops*/, 1, 3, 4, 
     428             :                   // Src: (st MSA128HOpnd:v8i16:$wd, addrimm10lsl1:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     429             :                   // Dst: (ST_H MSA128HOpnd:v8i16:$wd, addrimm10lsl1:iPTR:$addr)
     430             : /*750*/         /*Scope*/ 21, /*->772*/
     431             : /*751*/           OPC_CheckChild1Type, MVT::v4i32,
     432             : /*753*/           OPC_RecordChild2, // #2 = $addr
     433             : /*754*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     434             : /*756*/           OPC_CheckPredicate, 1, // Predicate_store
     435             : /*758*/           OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
     436             : /*760*/           OPC_CheckComplexPat, /*CP*/10, /*#*/2, // selectIntAddrSImm10Lsl2:$addr #3 #4
     437             : /*763*/           OPC_EmitMergeInputChains1_0,
     438             : /*764*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_W), 0|OPFL_Chain|OPFL_MemRefs,
     439             :                       3/*#Ops*/, 1, 3, 4, 
     440             :                   // Src: (st MSA128WOpnd:v4i32:$wd, addrimm10lsl2:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     441             :                   // Dst: (ST_W MSA128WOpnd:v4i32:$wd, addrimm10lsl2:iPTR:$addr)
     442             : /*772*/         /*Scope*/ 21, /*->794*/
     443             : /*773*/           OPC_CheckChild1Type, MVT::v2i64,
     444             : /*775*/           OPC_RecordChild2, // #2 = $addr
     445             : /*776*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     446             : /*778*/           OPC_CheckPredicate, 1, // Predicate_store
     447             : /*780*/           OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
     448             : /*782*/           OPC_CheckComplexPat, /*CP*/11, /*#*/2, // selectIntAddrSImm10Lsl3:$addr #3 #4
     449             : /*785*/           OPC_EmitMergeInputChains1_0,
     450             : /*786*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_D), 0|OPFL_Chain|OPFL_MemRefs,
     451             :                       3/*#Ops*/, 1, 3, 4, 
     452             :                   // Src: (st MSA128DOpnd:v2i64:$wd, addrimm10lsl3:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     453             :                   // Dst: (ST_D MSA128DOpnd:v2i64:$wd, addrimm10lsl3:iPTR:$addr)
     454             : /*794*/         /*Scope*/ 21, /*->816*/
     455             : /*795*/           OPC_CheckChild1Type, MVT::v8f16,
     456             : /*797*/           OPC_RecordChild2, // #2 = $addr
     457             : /*798*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     458             : /*800*/           OPC_CheckPredicate, 1, // Predicate_store
     459             : /*802*/           OPC_CheckPatternPredicate, 25, // (Subtarget->hasMSA())
     460             : /*804*/           OPC_CheckComplexPat, /*CP*/9, /*#*/2, // selectIntAddrSImm10Lsl1:$addr #3 #4
     461             : /*807*/           OPC_EmitMergeInputChains1_0,
     462             : /*808*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_H), 0|OPFL_Chain|OPFL_MemRefs,
     463             :                       3/*#Ops*/, 1, 3, 4, 
     464             :                   // Src: (st MSA128H:v8f16:$ws, addrimm10lsl1:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     465             :                   // Dst: (ST_H MSA128H:v8f16:$ws, addrimm10lsl1:iPTR:$addr)
     466             : /*816*/         /*Scope*/ 21, /*->838*/
     467             : /*817*/           OPC_CheckChild1Type, MVT::v4f32,
     468             : /*819*/           OPC_RecordChild2, // #2 = $addr
     469             : /*820*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     470             : /*822*/           OPC_CheckPredicate, 1, // Predicate_store
     471             : /*824*/           OPC_CheckPatternPredicate, 25, // (Subtarget->hasMSA())
     472             : /*826*/           OPC_CheckComplexPat, /*CP*/10, /*#*/2, // selectIntAddrSImm10Lsl2:$addr #3 #4
     473             : /*829*/           OPC_EmitMergeInputChains1_0,
     474             : /*830*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_W), 0|OPFL_Chain|OPFL_MemRefs,
     475             :                       3/*#Ops*/, 1, 3, 4, 
     476             :                   // Src: (st MSA128W:v4f32:$ws, addrimm10lsl2:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     477             :                   // Dst: (ST_W MSA128W:v4f32:$ws, addrimm10lsl2:iPTR:$addr)
     478             : /*838*/         /*Scope*/ 21, /*->860*/
     479             : /*839*/           OPC_CheckChild1Type, MVT::v2f64,
     480             : /*841*/           OPC_RecordChild2, // #2 = $addr
     481             : /*842*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     482             : /*844*/           OPC_CheckPredicate, 1, // Predicate_store
     483             : /*846*/           OPC_CheckPatternPredicate, 25, // (Subtarget->hasMSA())
     484             : /*848*/           OPC_CheckComplexPat, /*CP*/11, /*#*/2, // selectIntAddrSImm10Lsl3:$addr #3 #4
     485             : /*851*/           OPC_EmitMergeInputChains1_0,
     486             : /*852*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_D), 0|OPFL_Chain|OPFL_MemRefs,
     487             :                       3/*#Ops*/, 1, 3, 4, 
     488             :                   // Src: (st MSA128D:v2f64:$ws, addrimm10lsl3:iPTR:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     489             :                   // Dst: (ST_D MSA128D:v2f64:$ws, addrimm10lsl3:iPTR:$addr)
     490             : /*860*/         /*Scope*/ 32, /*->893*/
     491             : /*861*/           OPC_CheckChild1Type, MVT::v2i16,
     492             : /*863*/           OPC_RecordChild2, // #2 = $a
     493             : /*864*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     494             : /*866*/           OPC_CheckPredicate, 1, // Predicate_store
     495             : /*868*/           OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
     496             : /*870*/           OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$a #3 #4
     497             : /*873*/           OPC_EmitMergeInputChains1_0,
     498             : /*874*/           OPC_EmitInteger, MVT::i32, Mips::GPR32RegClassID,
     499             : /*877*/           OPC_EmitNode1, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS), 0,
     500             :                       MVT::i32, 2/*#Ops*/, 1, 5,  // Results = #6
     501             : /*885*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::SW), 0|OPFL_Chain|OPFL_MemRefs,
     502             :                       3/*#Ops*/, 6, 3, 4, 
     503             :                   // Src: (st DSPR:v2i16:$val, addr:iPTR:$a)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     504             :                   // Dst: (SW (COPY_TO_REGCLASS:i32 DSPR:v2i16:$val, GPR32:i32), addr:iPTR:$a)
     505             : /*893*/         /*Scope*/ 32, /*->926*/
     506             : /*894*/           OPC_CheckChild1Type, MVT::v4i8,
     507             : /*896*/           OPC_RecordChild2, // #2 = $a
     508             : /*897*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     509             : /*899*/           OPC_CheckPredicate, 1, // Predicate_store
     510             : /*901*/           OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
     511             : /*903*/           OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$a #3 #4
     512             : /*906*/           OPC_EmitMergeInputChains1_0,
     513             : /*907*/           OPC_EmitInteger, MVT::i32, Mips::GPR32RegClassID,
     514             : /*910*/           OPC_EmitNode1, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS), 0,
     515             :                       MVT::i32, 2/*#Ops*/, 1, 5,  // Results = #6
     516             : /*918*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::SW), 0|OPFL_Chain|OPFL_MemRefs,
     517             :                       3/*#Ops*/, 6, 3, 4, 
     518             :                   // Src: (st DSPR:v4i8:$val, addr:iPTR:$a)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     519             :                   // Dst: (SW (COPY_TO_REGCLASS:i32 DSPR:v4i8:$val, GPR32:i32), addr:iPTR:$a)
     520             : /*926*/         /*Scope*/ 22, /*->949*/
     521             : /*927*/           OPC_CheckChild1Type, MVT::f16,
     522             : /*929*/           OPC_RecordChild2, // #2 = $addr
     523             : /*930*/           OPC_RecordChild2, // #3 = $addrimm10
     524             : /*931*/           OPC_CheckPredicate, 0, // Predicate_unindexedstore
     525             : /*933*/           OPC_CheckPredicate, 1, // Predicate_store
     526             : /*935*/           OPC_CheckPatternPredicate, 25, // (Subtarget->hasMSA())
     527             : /*937*/           OPC_CheckComplexPat, /*CP*/8, /*#*/3, // selectIntAddrSImm10:$addr #4 #5
     528             : /*940*/           OPC_EmitMergeInputChains1_0,
     529             : /*941*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_F16), 0|OPFL_Chain|OPFL_MemRefs,
     530             :                       3/*#Ops*/, 1, 2, 3, 
     531             :                   // Src: (st MSA128F16:f16:$ws, (addrimm10:iPTR):$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 13
     532             :                   // Dst: (ST_F16 MSA128F16:f16:$ws, (addrimm10:iPTR):$addr)
     533             : /*949*/         0, /*End of Scope*/
     534             : /*950*/       0, /*End of Scope*/
     535             : /*951*/     /*SwitchOpcode*/ 1|128,11/*1409*/, TARGET_VAL(ISD::LOAD),// ->2364
     536             : /*955*/       OPC_RecordMemRef,
     537             : /*956*/       OPC_RecordNode, // #0 = 'ld' chained node
     538             : /*957*/       OPC_Scope, 81, /*->1040*/ // 5 children in Scope
     539             : /*959*/         OPC_RecordChild1, // #1 = $a
     540             : /*960*/         OPC_CheckPredicate, 6, // Predicate_unindexedload
     541             : /*962*/         OPC_CheckType, MVT::i32,
     542             : /*964*/         OPC_Scope, 18, /*->984*/ // 4 children in Scope
     543             : /*966*/           OPC_CheckPredicate, 7, // Predicate_zextload
     544             : /*968*/           OPC_CheckPredicate, 8, // Predicate_zextloadi8
     545             : /*970*/           OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     546             : /*972*/           OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
     547             : /*975*/           OPC_EmitMergeInputChains1_0,
     548             : /*976*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::LBu), 0|OPFL_Chain|OPFL_MemRefs,
     549             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     550             :                   // Src: (ld:i32 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> - Complexity = 53
     551             :                   // Dst: (LBu:i32 addrRegImm:iPTR:$a)
     552             : /*984*/         /*Scope*/ 18, /*->1003*/
     553             : /*985*/           OPC_CheckPredicate, 9, // Predicate_sextload
     554             : /*987*/           OPC_CheckPredicate, 10, // Predicate_sextloadi16
     555             : /*989*/           OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     556             : /*991*/           OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
     557             : /*994*/           OPC_EmitMergeInputChains1_0,
     558             : /*995*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::LH), 0|OPFL_Chain|OPFL_MemRefs,
     559             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     560             :                   // Src: (ld:i32 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> - Complexity = 53
     561             :                   // Dst: (LH:i32 addrRegImm:iPTR:$a)
     562             : /*1003*/        /*Scope*/ 16, /*->1020*/
     563             : /*1004*/          OPC_CheckPredicate, 11, // Predicate_load
     564             : /*1006*/          OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     565             : /*1008*/          OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
     566             : /*1011*/          OPC_EmitMergeInputChains1_0,
     567             : /*1012*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LW), 0|OPFL_Chain|OPFL_MemRefs,
     568             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     569             :                   // Src: (ld:i32 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 53
     570             :                   // Dst: (LW:i32 addrRegImm:iPTR:$a)
     571             : /*1020*/        /*Scope*/ 18, /*->1039*/
     572             : /*1021*/          OPC_CheckPredicate, 9, // Predicate_sextload
     573             : /*1023*/          OPC_CheckPredicate, 10, // Predicate_sextloadi16
     574             : /*1025*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     575             : /*1027*/          OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
     576             : /*1030*/          OPC_EmitMergeInputChains1_0,
     577             : /*1031*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LH_MM), 0|OPFL_Chain|OPFL_MemRefs,
     578             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     579             :                   // Src: (ld:i32 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> - Complexity = 53
     580             :                   // Dst: (LH_MM:i32 addrRegImm:iPTR:$a)
     581             : /*1039*/        0, /*End of Scope*/
     582             : /*1040*/      /*Scope*/ 61, /*->1102*/
     583             : /*1041*/        OPC_MoveChild1,
     584             : /*1042*/        OPC_CheckOpcode, TARGET_VAL(ISD::ADD),
     585             : /*1045*/        OPC_RecordChild0, // #1 = $base
     586             : /*1046*/        OPC_RecordChild1, // #2 = $index
     587             : /*1047*/        OPC_CheckType, MVT::i32,
     588             : /*1049*/        OPC_MoveParent,
     589             : /*1050*/        OPC_CheckPredicate, 6, // Predicate_unindexedload
     590             : /*1052*/        OPC_CheckType, MVT::i32,
     591             : /*1054*/        OPC_Scope, 15, /*->1071*/ // 3 children in Scope
     592             : /*1056*/          OPC_CheckPredicate, 7, // Predicate_zextload
     593             : /*1058*/          OPC_CheckPredicate, 8, // Predicate_zextloadi8
     594             : /*1060*/          OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
     595             : /*1062*/          OPC_EmitMergeInputChains1_0,
     596             : /*1063*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LBUX), 0|OPFL_Chain|OPFL_MemRefs,
     597             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
     598             :                   // Src: (ld:i32 (add:i32 i32:i32:$base, i32:i32:$index))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> - Complexity = 27
     599             :                   // Dst: (LBUX:i32 i32:i32:$base, i32:i32:$index)
     600             : /*1071*/        /*Scope*/ 15, /*->1087*/
     601             : /*1072*/          OPC_CheckPredicate, 9, // Predicate_sextload
     602             : /*1074*/          OPC_CheckPredicate, 10, // Predicate_sextloadi16
     603             : /*1076*/          OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
     604             : /*1078*/          OPC_EmitMergeInputChains1_0,
     605             : /*1079*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LHX), 0|OPFL_Chain|OPFL_MemRefs,
     606             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
     607             :                   // Src: (ld:i32 (add:i32 i32:i32:$base, i32:i32:$index))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> - Complexity = 27
     608             :                   // Dst: (LHX:i32 i32:i32:$base, i32:i32:$index)
     609             : /*1087*/        /*Scope*/ 13, /*->1101*/
     610             : /*1088*/          OPC_CheckPredicate, 11, // Predicate_load
     611             : /*1090*/          OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
     612             : /*1092*/          OPC_EmitMergeInputChains1_0,
     613             : /*1093*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LWX), 0|OPFL_Chain|OPFL_MemRefs,
     614             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
     615             :                   // Src: (ld:i32 (add:i32 i32:i32:$base, i32:i32:$index))<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 27
     616             :                   // Dst: (LWX:i32 i32:i32:$base, i32:i32:$index)
     617             : /*1101*/        0, /*End of Scope*/
     618             : /*1102*/      /*Scope*/ 4|128,7/*900*/, /*->2004*/
     619             : /*1104*/        OPC_RecordChild1, // #1 = $addr
     620             : /*1105*/        OPC_CheckPredicate, 6, // Predicate_unindexedload
     621             : /*1107*/        OPC_Scope, 20, /*->1129*/ // 27 children in Scope
     622             : /*1109*/          OPC_CheckPredicate, 9, // Predicate_sextload
     623             : /*1111*/          OPC_CheckPredicate, 8, // Predicate_sextloadi8
     624             : /*1113*/          OPC_CheckType, MVT::i32,
     625             : /*1115*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     626             : /*1117*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     627             : /*1120*/          OPC_EmitMergeInputChains1_0,
     628             : /*1121*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LB), 0|OPFL_Chain|OPFL_MemRefs,
     629             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     630             :                   // Src: (ld:i32 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> - Complexity = 13
     631             :                   // Dst: (LB:i32 addr:iPTR:$addr)
     632             : /*1129*/        /*Scope*/ 20, /*->1150*/
     633             : /*1130*/          OPC_CheckPredicate, 7, // Predicate_zextload
     634             : /*1132*/          OPC_CheckPredicate, 8, // Predicate_zextloadi8
     635             : /*1134*/          OPC_CheckType, MVT::i32,
     636             : /*1136*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     637             : /*1138*/          OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
     638             : /*1141*/          OPC_EmitMergeInputChains1_0,
     639             : /*1142*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LBu), 0|OPFL_Chain|OPFL_MemRefs,
     640             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     641             :                   // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> - Complexity = 13
     642             :                   // Dst: (LBu:i32 addrDefault:iPTR:$addr)
     643             : /*1150*/        /*Scope*/ 20, /*->1171*/
     644             : /*1151*/          OPC_CheckPredicate, 9, // Predicate_sextload
     645             : /*1153*/          OPC_CheckPredicate, 10, // Predicate_sextloadi16
     646             : /*1155*/          OPC_CheckType, MVT::i32,
     647             : /*1157*/          OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     648             : /*1159*/          OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
     649             : /*1162*/          OPC_EmitMergeInputChains1_0,
     650             : /*1163*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LH), 0|OPFL_Chain|OPFL_MemRefs,
     651             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     652             :                   // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> - Complexity = 13
     653             :                   // Dst: (LH:i32 addrDefault:iPTR:$addr)
     654             : /*1171*/        /*Scope*/ 20, /*->1192*/
     655             : /*1172*/          OPC_CheckPredicate, 7, // Predicate_zextload
     656             : /*1174*/          OPC_CheckPredicate, 10, // Predicate_zextloadi16
     657             : /*1176*/          OPC_CheckType, MVT::i32,
     658             : /*1178*/          OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     659             : /*1180*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     660             : /*1183*/          OPC_EmitMergeInputChains1_0,
     661             : /*1184*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LHu), 0|OPFL_Chain|OPFL_MemRefs,
     662             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     663             :                   // Src: (ld:i32 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> - Complexity = 13
     664             :                   // Dst: (LHu:i32 addr:iPTR:$addr)
     665             : /*1192*/        /*Scope*/ 81, /*->1274*/
     666             : /*1193*/          OPC_CheckPredicate, 11, // Predicate_load
     667             : /*1195*/          OPC_CheckType, MVT::i32,
     668             : /*1197*/          OPC_Scope, 14, /*->1213*/ // 5 children in Scope
     669             : /*1199*/            OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     670             : /*1201*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
     671             : /*1204*/            OPC_EmitMergeInputChains1_0,
     672             : /*1205*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LW), 0|OPFL_Chain|OPFL_MemRefs,
     673             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     674             :                     // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     675             :                     // Dst: (LW:i32 addrDefault:iPTR:$addr)
     676             : /*1213*/          /*Scope*/ 14, /*->1228*/
     677             : /*1214*/            OPC_CheckPatternPredicate, 11, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
     678             : /*1216*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
     679             : /*1219*/            OPC_EmitMergeInputChains1_0,
     680             : /*1220*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LWC2), 0|OPFL_Chain|OPFL_MemRefs,
     681             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     682             :                     // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     683             :                     // Dst: (LWC2:i32 addrDefault:iPTR:$addr)
     684             : /*1228*/          /*Scope*/ 14, /*->1243*/
     685             : /*1229*/            OPC_CheckPatternPredicate, 12, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
     686             : /*1231*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
     687             : /*1234*/            OPC_EmitMergeInputChains1_0,
     688             : /*1235*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC2), 0|OPFL_Chain|OPFL_MemRefs,
     689             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     690             :                     // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     691             :                     // Dst: (LDC2:i32 addrDefault:iPTR:$addr)
     692             : /*1243*/          /*Scope*/ 14, /*->1258*/
     693             : /*1244*/            OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     694             : /*1246*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
     695             : /*1249*/            OPC_EmitMergeInputChains1_0,
     696             : /*1250*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LWC3), 0|OPFL_Chain|OPFL_MemRefs,
     697             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     698             :                     // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     699             :                     // Dst: (LWC3:i32 addrDefault:iPTR:$addr)
     700             : /*1258*/          /*Scope*/ 14, /*->1273*/
     701             : /*1259*/            OPC_CheckPatternPredicate, 13, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     702             : /*1261*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
     703             : /*1264*/            OPC_EmitMergeInputChains1_0,
     704             : /*1265*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC3), 0|OPFL_Chain|OPFL_MemRefs,
     705             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     706             :                     // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     707             :                     // Dst: (LDC3:i32 addrDefault:iPTR:$addr)
     708             : /*1273*/          0, /*End of Scope*/
     709             : /*1274*/        /*Scope*/ 57, /*->1332*/
     710             : /*1275*/          OPC_CheckPredicate, 12, // Predicate_extload
     711             : /*1277*/          OPC_CheckType, MVT::i32,
     712             : /*1279*/          OPC_Scope, 16, /*->1297*/ // 3 children in Scope
     713             : /*1281*/            OPC_CheckPredicate, 13, // Predicate_extloadi1
     714             : /*1283*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     715             : /*1285*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$src #2 #3
     716             : /*1288*/            OPC_EmitMergeInputChains1_0,
     717             : /*1289*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LBu), 0|OPFL_Chain|OPFL_MemRefs,
     718             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     719             :                     // Src: (ld:i32 addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi1>> - Complexity = 13
     720             :                     // Dst: (LBu:i32 addr:iPTR:$src)
     721             : /*1297*/          /*Scope*/ 16, /*->1314*/
     722             : /*1298*/            OPC_CheckPredicate, 8, // Predicate_extloadi8
     723             : /*1300*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     724             : /*1302*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$src #2 #3
     725             : /*1305*/            OPC_EmitMergeInputChains1_0,
     726             : /*1306*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LBu), 0|OPFL_Chain|OPFL_MemRefs,
     727             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     728             :                     // Src: (ld:i32 addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> - Complexity = 13
     729             :                     // Dst: (LBu:i32 addr:iPTR:$src)
     730             : /*1314*/          /*Scope*/ 16, /*->1331*/
     731             : /*1315*/            OPC_CheckPredicate, 10, // Predicate_extloadi16
     732             : /*1317*/            OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     733             : /*1319*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$src #2 #3
     734             : /*1322*/            OPC_EmitMergeInputChains1_0,
     735             : /*1323*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LHu), 0|OPFL_Chain|OPFL_MemRefs,
     736             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     737             :                     // Src: (ld:i32 addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> - Complexity = 13
     738             :                     // Dst: (LHu:i32 addr:iPTR:$src)
     739             : /*1331*/          0, /*End of Scope*/
     740             : /*1332*/        /*Scope*/ 20, /*->1353*/
     741             : /*1333*/          OPC_CheckPredicate, 9, // Predicate_sextload
     742             : /*1335*/          OPC_CheckPredicate, 8, // Predicate_sextloadi8
     743             : /*1337*/          OPC_CheckType, MVT::i64,
     744             : /*1339*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     745             : /*1341*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     746             : /*1344*/          OPC_EmitMergeInputChains1_0,
     747             : /*1345*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LB64), 0|OPFL_Chain|OPFL_MemRefs,
     748             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
     749             :                   // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> - Complexity = 13
     750             :                   // Dst: (LB64:i64 addr:iPTR:$addr)
     751             : /*1353*/        /*Scope*/ 20, /*->1374*/
     752             : /*1354*/          OPC_CheckPredicate, 7, // Predicate_zextload
     753             : /*1356*/          OPC_CheckPredicate, 8, // Predicate_zextloadi8
     754             : /*1358*/          OPC_CheckType, MVT::i64,
     755             : /*1360*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     756             : /*1362*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     757             : /*1365*/          OPC_EmitMergeInputChains1_0,
     758             : /*1366*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LBu64), 0|OPFL_Chain|OPFL_MemRefs,
     759             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
     760             :                   // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> - Complexity = 13
     761             :                   // Dst: (LBu64:i64 addr:iPTR:$addr)
     762             : /*1374*/        /*Scope*/ 20, /*->1395*/
     763             : /*1375*/          OPC_CheckPredicate, 9, // Predicate_sextload
     764             : /*1377*/          OPC_CheckPredicate, 10, // Predicate_sextloadi16
     765             : /*1379*/          OPC_CheckType, MVT::i64,
     766             : /*1381*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     767             : /*1383*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     768             : /*1386*/          OPC_EmitMergeInputChains1_0,
     769             : /*1387*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LH64), 0|OPFL_Chain|OPFL_MemRefs,
     770             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
     771             :                   // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> - Complexity = 13
     772             :                   // Dst: (LH64:i64 addr:iPTR:$addr)
     773             : /*1395*/        /*Scope*/ 20, /*->1416*/
     774             : /*1396*/          OPC_CheckPredicate, 7, // Predicate_zextload
     775             : /*1398*/          OPC_CheckPredicate, 10, // Predicate_zextloadi16
     776             : /*1400*/          OPC_CheckType, MVT::i64,
     777             : /*1402*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     778             : /*1404*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     779             : /*1407*/          OPC_EmitMergeInputChains1_0,
     780             : /*1408*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LHu64), 0|OPFL_Chain|OPFL_MemRefs,
     781             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
     782             :                   // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> - Complexity = 13
     783             :                   // Dst: (LHu64:i64 addr:iPTR:$addr)
     784             : /*1416*/        /*Scope*/ 20, /*->1437*/
     785             : /*1417*/          OPC_CheckPredicate, 9, // Predicate_sextload
     786             : /*1419*/          OPC_CheckPredicate, 14, // Predicate_sextloadi32
     787             : /*1421*/          OPC_CheckType, MVT::i64,
     788             : /*1423*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     789             : /*1425*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     790             : /*1428*/          OPC_EmitMergeInputChains1_0,
     791             : /*1429*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LW64), 0|OPFL_Chain|OPFL_MemRefs,
     792             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
     793             :                   // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi32>> - Complexity = 13
     794             :                   // Dst: (LW64:i64 addr:iPTR:$addr)
     795             : /*1437*/        /*Scope*/ 20, /*->1458*/
     796             : /*1438*/          OPC_CheckPredicate, 7, // Predicate_zextload
     797             : /*1440*/          OPC_CheckPredicate, 14, // Predicate_zextloadi32
     798             : /*1442*/          OPC_CheckType, MVT::i64,
     799             : /*1444*/          OPC_CheckPatternPredicate, 22, // (Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     800             : /*1446*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     801             : /*1449*/          OPC_EmitMergeInputChains1_0,
     802             : /*1450*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LWu), 0|OPFL_Chain|OPFL_MemRefs,
     803             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
     804             :                   // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi32>> - Complexity = 13
     805             :                   // Dst: (LWu:i64 addr:iPTR:$addr)
     806             : /*1458*/        /*Scope*/ 18, /*->1477*/
     807             : /*1459*/          OPC_CheckPredicate, 11, // Predicate_load
     808             : /*1461*/          OPC_CheckType, MVT::i64,
     809             : /*1463*/          OPC_CheckPatternPredicate, 22, // (Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
     810             : /*1465*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     811             : /*1468*/          OPC_EmitMergeInputChains1_0,
     812             : /*1469*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD), 0|OPFL_Chain|OPFL_MemRefs,
     813             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
     814             :                   // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     815             :                   // Dst: (LD:i64 addr:iPTR:$addr)
     816             : /*1477*/        /*Scope*/ 74, /*->1552*/
     817             : /*1478*/          OPC_CheckPredicate, 12, // Predicate_extload
     818             : /*1480*/          OPC_CheckType, MVT::i64,
     819             : /*1482*/          OPC_Scope, 16, /*->1500*/ // 4 children in Scope
     820             : /*1484*/            OPC_CheckPredicate, 13, // Predicate_extloadi1
     821             : /*1486*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     822             : /*1488*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$src #2 #3
     823             : /*1491*/            OPC_EmitMergeInputChains1_0,
     824             : /*1492*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LB64), 0|OPFL_Chain|OPFL_MemRefs,
     825             :                         MVT::i64, 2/*#Ops*/, 2, 3, 
     826             :                     // Src: (ld:i64 addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi1>> - Complexity = 13
     827             :                     // Dst: (LB64:i64 addr:iPTR:$src)
     828             : /*1500*/          /*Scope*/ 16, /*->1517*/
     829             : /*1501*/            OPC_CheckPredicate, 8, // Predicate_extloadi8
     830             : /*1503*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     831             : /*1505*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$src #2 #3
     832             : /*1508*/            OPC_EmitMergeInputChains1_0,
     833             : /*1509*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LB64), 0|OPFL_Chain|OPFL_MemRefs,
     834             :                         MVT::i64, 2/*#Ops*/, 2, 3, 
     835             :                     // Src: (ld:i64 addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> - Complexity = 13
     836             :                     // Dst: (LB64:i64 addr:iPTR:$src)
     837             : /*1517*/          /*Scope*/ 16, /*->1534*/
     838             : /*1518*/            OPC_CheckPredicate, 10, // Predicate_extloadi16
     839             : /*1520*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     840             : /*1522*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$src #2 #3
     841             : /*1525*/            OPC_EmitMergeInputChains1_0,
     842             : /*1526*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LH64), 0|OPFL_Chain|OPFL_MemRefs,
     843             :                         MVT::i64, 2/*#Ops*/, 2, 3, 
     844             :                     // Src: (ld:i64 addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> - Complexity = 13
     845             :                     // Dst: (LH64:i64 addr:iPTR:$src)
     846             : /*1534*/          /*Scope*/ 16, /*->1551*/
     847             : /*1535*/            OPC_CheckPredicate, 14, // Predicate_extloadi32
     848             : /*1537*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     849             : /*1539*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$src #2 #3
     850             : /*1542*/            OPC_EmitMergeInputChains1_0,
     851             : /*1543*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LW64), 0|OPFL_Chain|OPFL_MemRefs,
     852             :                         MVT::i64, 2/*#Ops*/, 2, 3, 
     853             :                     // Src: (ld:i64 addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi32>> - Complexity = 13
     854             :                     // Dst: (LW64:i64 addr:iPTR:$src)
     855             : /*1551*/          0, /*End of Scope*/
     856             : /*1552*/        /*Scope*/ 20, /*->1573*/
     857             : /*1553*/          OPC_CheckPredicate, 9, // Predicate_sextload
     858             : /*1555*/          OPC_CheckPredicate, 8, // Predicate_sextloadi8
     859             : /*1557*/          OPC_CheckType, MVT::i32,
     860             : /*1559*/          OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     861             : /*1561*/          OPC_CheckComplexPat, /*CP*/3, /*#*/1, // selectAddr16:$addr #2 #3
     862             : /*1564*/          OPC_EmitMergeInputChains1_0,
     863             : /*1565*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LbRxRyOffMemX16), 0|OPFL_Chain|OPFL_MemRefs,
     864             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     865             :                   // Src: (ld:i32 addr16:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> - Complexity = 13
     866             :                   // Dst: (LbRxRyOffMemX16:i32 addr16:i32:$addr)
     867             : /*1573*/        /*Scope*/ 20, /*->1594*/
     868             : /*1574*/          OPC_CheckPredicate, 7, // Predicate_zextload
     869             : /*1576*/          OPC_CheckPredicate, 8, // Predicate_zextloadi8
     870             : /*1578*/          OPC_CheckType, MVT::i32,
     871             : /*1580*/          OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     872             : /*1582*/          OPC_CheckComplexPat, /*CP*/3, /*#*/1, // selectAddr16:$addr #2 #3
     873             : /*1585*/          OPC_EmitMergeInputChains1_0,
     874             : /*1586*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LbuRxRyOffMemX16), 0|OPFL_Chain|OPFL_MemRefs,
     875             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     876             :                   // Src: (ld:i32 addr16:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> - Complexity = 13
     877             :                   // Dst: (LbuRxRyOffMemX16:i32 addr16:i32:$addr)
     878             : /*1594*/        /*Scope*/ 20, /*->1615*/
     879             : /*1595*/          OPC_CheckPredicate, 9, // Predicate_sextload
     880             : /*1597*/          OPC_CheckPredicate, 10, // Predicate_sextloadi16
     881             : /*1599*/          OPC_CheckType, MVT::i32,
     882             : /*1601*/          OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     883             : /*1603*/          OPC_CheckComplexPat, /*CP*/3, /*#*/1, // selectAddr16:$addr #2 #3
     884             : /*1606*/          OPC_EmitMergeInputChains1_0,
     885             : /*1607*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LhRxRyOffMemX16), 0|OPFL_Chain|OPFL_MemRefs,
     886             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     887             :                   // Src: (ld:i32 addr16:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> - Complexity = 13
     888             :                   // Dst: (LhRxRyOffMemX16:i32 addr16:i32:$addr)
     889             : /*1615*/        /*Scope*/ 20, /*->1636*/
     890             : /*1616*/          OPC_CheckPredicate, 7, // Predicate_zextload
     891             : /*1618*/          OPC_CheckPredicate, 10, // Predicate_zextloadi16
     892             : /*1620*/          OPC_CheckType, MVT::i32,
     893             : /*1622*/          OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     894             : /*1624*/          OPC_CheckComplexPat, /*CP*/3, /*#*/1, // selectAddr16:$addr #2 #3
     895             : /*1627*/          OPC_EmitMergeInputChains1_0,
     896             : /*1628*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LhuRxRyOffMemX16), 0|OPFL_Chain|OPFL_MemRefs,
     897             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     898             :                   // Src: (ld:i32 addr16:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> - Complexity = 13
     899             :                   // Dst: (LhuRxRyOffMemX16:i32 addr16:i32:$addr)
     900             : /*1636*/        /*Scope*/ 18, /*->1655*/
     901             : /*1637*/          OPC_CheckPredicate, 11, // Predicate_load
     902             : /*1639*/          OPC_CheckType, MVT::i32,
     903             : /*1641*/          OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     904             : /*1643*/          OPC_CheckComplexPat, /*CP*/4, /*#*/1, // selectAddr16SP:$addr #2 #3
     905             : /*1646*/          OPC_EmitMergeInputChains1_0,
     906             : /*1647*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LwRxSpImmX16), 0|OPFL_Chain|OPFL_MemRefs,
     907             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     908             :                   // Src: (ld:i32 addr16sp:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     909             :                   // Dst: (LwRxSpImmX16:i32 addr16sp:i32:$addr)
     910             : /*1655*/        /*Scope*/ 40, /*->1696*/
     911             : /*1656*/          OPC_CheckPredicate, 12, // Predicate_extload
     912             : /*1658*/          OPC_CheckType, MVT::i32,
     913             : /*1660*/          OPC_Scope, 16, /*->1678*/ // 2 children in Scope
     914             : /*1662*/            OPC_CheckPredicate, 8, // Predicate_extloadi8
     915             : /*1664*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     916             : /*1666*/            OPC_CheckComplexPat, /*CP*/3, /*#*/1, // selectAddr16:$src #2 #3
     917             : /*1669*/            OPC_EmitMergeInputChains1_0,
     918             : /*1670*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LbuRxRyOffMemX16), 0|OPFL_Chain|OPFL_MemRefs,
     919             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     920             :                     // Src: (ld:i32 addr16:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> - Complexity = 13
     921             :                     // Dst: (LbuRxRyOffMemX16:i32 addr16:i32:$src)
     922             : /*1678*/          /*Scope*/ 16, /*->1695*/
     923             : /*1679*/            OPC_CheckPredicate, 10, // Predicate_extloadi16
     924             : /*1681*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
     925             : /*1683*/            OPC_CheckComplexPat, /*CP*/3, /*#*/1, // selectAddr16:$src #2 #3
     926             : /*1686*/            OPC_EmitMergeInputChains1_0,
     927             : /*1687*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LhuRxRyOffMemX16), 0|OPFL_Chain|OPFL_MemRefs,
     928             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     929             :                     // Src: (ld:i32 addr16:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> - Complexity = 13
     930             :                     // Dst: (LhuRxRyOffMemX16:i32 addr16:i32:$src)
     931             : /*1695*/          0, /*End of Scope*/
     932             : /*1696*/        /*Scope*/ 20, /*->1717*/
     933             : /*1697*/          OPC_CheckPredicate, 9, // Predicate_sextload
     934             : /*1699*/          OPC_CheckPredicate, 10, // Predicate_sextloadi16
     935             : /*1701*/          OPC_CheckType, MVT::i32,
     936             : /*1703*/          OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
     937             : /*1705*/          OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
     938             : /*1708*/          OPC_EmitMergeInputChains1_0,
     939             : /*1709*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LH_MM), 0|OPFL_Chain|OPFL_MemRefs,
     940             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     941             :                   // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> - Complexity = 13
     942             :                   // Dst: (LH_MM:i32 addrDefault:iPTR:$addr)
     943             : /*1717*/        /*Scope*/ 40, /*->1758*/
     944             : /*1718*/          OPC_CheckPredicate, 7, // Predicate_zextload
     945             : /*1720*/          OPC_CheckType, MVT::i32,
     946             : /*1722*/          OPC_Scope, 16, /*->1740*/ // 2 children in Scope
     947             : /*1724*/            OPC_CheckPredicate, 10, // Predicate_zextloadi16
     948             : /*1726*/            OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
     949             : /*1728*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     950             : /*1731*/            OPC_EmitMergeInputChains1_0,
     951             : /*1732*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LHu_MM), 0|OPFL_Chain|OPFL_MemRefs,
     952             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     953             :                     // Src: (ld:i32 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> - Complexity = 13
     954             :                     // Dst: (LHu_MM:i32 addr:iPTR:$addr)
     955             : /*1740*/          /*Scope*/ 16, /*->1757*/
     956             : /*1741*/            OPC_CheckPredicate, 14, // Predicate_zextloadi32
     957             : /*1743*/            OPC_CheckPatternPredicate, 27, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6())
     958             : /*1745*/            OPC_CheckComplexPat, /*CP*/12, /*#*/1, // selectIntAddr12MM:$addr #2 #3
     959             : /*1748*/            OPC_EmitMergeInputChains1_0,
     960             : /*1749*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LWU_MM), 0|OPFL_Chain|OPFL_MemRefs,
     961             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     962             :                     // Src: (ld:i32 addrimm12:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi32>> - Complexity = 13
     963             :                     // Dst: (LWU_MM:i32 addrimm12:iPTR:$addr)
     964             : /*1757*/          0, /*End of Scope*/
     965             : /*1758*/        /*Scope*/ 34, /*->1793*/
     966             : /*1759*/          OPC_CheckPredicate, 11, // Predicate_load
     967             : /*1761*/          OPC_CheckType, MVT::i32,
     968             : /*1763*/          OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
     969             : /*1765*/          OPC_Scope, 12, /*->1779*/ // 2 children in Scope
     970             : /*1767*/            OPC_CheckComplexPat, /*CP*/5, /*#*/1, // selectIntAddrLSL2MM:$addr #2 #3
     971             : /*1770*/            OPC_EmitMergeInputChains1_0,
     972             : /*1771*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LW16_MM), 0|OPFL_Chain|OPFL_MemRefs,
     973             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     974             :                     // Src: (ld:i32 addrimm4lsl2:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     975             :                     // Dst: (LW16_MM:i32 addrimm4lsl2:i32:$addr)
     976             : /*1779*/          /*Scope*/ 12, /*->1792*/
     977             : /*1780*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
     978             : /*1783*/            OPC_EmitMergeInputChains1_0,
     979             : /*1784*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LW_MM), 0|OPFL_Chain|OPFL_MemRefs,
     980             :                         MVT::i32, 2/*#Ops*/, 2, 3, 
     981             :                     // Src: (ld:i32 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
     982             :                     // Dst: (LW_MM:i32 addr:iPTR:$addr)
     983             : /*1792*/          0, /*End of Scope*/
     984             : /*1793*/        /*Scope*/ 20, /*->1814*/
     985             : /*1794*/          OPC_CheckPredicate, 12, // Predicate_extload
     986             : /*1796*/          OPC_CheckPredicate, 10, // Predicate_extloadi16
     987             : /*1798*/          OPC_CheckType, MVT::i32,
     988             : /*1800*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
     989             : /*1802*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$src #2 #3
     990             : /*1805*/          OPC_EmitMergeInputChains1_0,
     991             : /*1806*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LHu_MM), 0|OPFL_Chain|OPFL_MemRefs,
     992             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
     993             :                   // Src: (ld:i32 addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> - Complexity = 13
     994             :                   // Dst: (LHu_MM:i32 addr:iPTR:$src)
     995             : /*1814*/        /*Scope*/ 64, /*->1879*/
     996             : /*1815*/          OPC_CheckPredicate, 11, // Predicate_load
     997             : /*1817*/          OPC_SwitchType /*2 cases */, 42, MVT::i32,// ->1862
     998             : /*1820*/            OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
     999             : /*1822*/            OPC_Scope, 12, /*->1836*/ // 2 children in Scope
    1000             : /*1824*/              OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
    1001             : /*1827*/              OPC_EmitMergeInputChains1_0,
    1002             : /*1828*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::LW_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
    1003             :                           MVT::i32, 2/*#Ops*/, 2, 3, 
    1004             :                       // Src: (ld:i32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1005             :                       // Dst: (LW_MMR6:i32 addrDefault:iPTR:$addr)
    1006             : /*1836*/            /*Scope*/ 24, /*->1861*/
    1007             : /*1837*/              OPC_CheckComplexPat, /*CP*/6, /*#*/1, // selectIntAddr11MM:$addr #2 #3
    1008             : /*1840*/              OPC_EmitMergeInputChains1_0,
    1009             : /*1841*/              OPC_Scope, 8, /*->1851*/ // 2 children in Scope
    1010             : /*1843*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC2_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
    1011             :                             MVT::i32, 2/*#Ops*/, 2, 3, 
    1012             :                         // Src: (ld:i32 addrimm11:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1013             :                         // Dst: (LDC2_MMR6:i32 addrimm11:i32:$addr)
    1014             : /*1851*/              /*Scope*/ 8, /*->1860*/
    1015             : /*1852*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::LWC2_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
    1016             :                             MVT::i32, 2/*#Ops*/, 2, 3, 
    1017             :                         // Src: (ld:i32 addrimm11:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1018             :                         // Dst: (LWC2_MMR6:i32 addrimm11:i32:$addr)
    1019             : /*1860*/              0, /*End of Scope*/
    1020             : /*1861*/            0, /*End of Scope*/
    1021             : /*1862*/          /*SwitchType*/ 14, MVT::i64,// ->1878
    1022             : /*1864*/            OPC_CheckPatternPredicate, 23, // (Subtarget->inMicroMips64r6Mode()) && (Subtarget->hasStandardEncoding())
    1023             : /*1866*/            OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
    1024             : /*1869*/            OPC_EmitMergeInputChains1_0,
    1025             : /*1870*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_MM64R6), 0|OPFL_Chain|OPFL_MemRefs,
    1026             :                         MVT::i64, 2/*#Ops*/, 2, 3, 
    1027             :                     // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1028             :                     // Dst: (LD_MM64R6:i64 addr:iPTR:$addr)
    1029             : /*1878*/          0, // EndSwitchType
    1030             : /*1879*/        /*Scope*/ 20, /*->1900*/
    1031             : /*1880*/          OPC_CheckPredicate, 7, // Predicate_zextload
    1032             : /*1882*/          OPC_CheckPredicate, 14, // Predicate_zextloadi32
    1033             : /*1884*/          OPC_CheckType, MVT::i64,
    1034             : /*1886*/          OPC_CheckPatternPredicate, 23, // (Subtarget->inMicroMips64r6Mode()) && (Subtarget->hasStandardEncoding())
    1035             : /*1888*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #2 #3
    1036             : /*1891*/          OPC_EmitMergeInputChains1_0,
    1037             : /*1892*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LWU_MM64R6), 0|OPFL_Chain|OPFL_MemRefs,
    1038             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
    1039             :                   // Src: (ld:i64 addr:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi32>> - Complexity = 13
    1040             :                   // Dst: (LWU_MM64R6:i64 addr:iPTR:$addr)
    1041             : /*1900*/        /*Scope*/ 102, /*->2003*/
    1042             : /*1901*/          OPC_CheckPredicate, 11, // Predicate_load
    1043             : /*1903*/          OPC_SwitchType /*2 cases */, 62, MVT::f64,// ->1968
    1044             : /*1906*/            OPC_Scope, 14, /*->1922*/ // 4 children in Scope
    1045             : /*1908*/              OPC_CheckPatternPredicate, 0, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit())
    1046             : /*1910*/              OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
    1047             : /*1913*/              OPC_EmitMergeInputChains1_0,
    1048             : /*1914*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC1_D64_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
    1049             :                           MVT::f64, 2/*#Ops*/, 2, 3, 
    1050             :                       // Src: (ld:f64 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 54
    1051             :                       // Dst: (LDC1_D64_MMR6:f64 addrRegImm:i32:$a)
    1052             : /*1922*/            /*Scope*/ 14, /*->1937*/
    1053             : /*1923*/              OPC_CheckPatternPredicate, 1, // (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode())
    1054             : /*1925*/              OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
    1055             : /*1928*/              OPC_EmitMergeInputChains1_0,
    1056             : /*1929*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC164), 0|OPFL_Chain|OPFL_MemRefs,
    1057             :                           MVT::f64, 2/*#Ops*/, 2, 3, 
    1058             :                       // Src: (ld:f64 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 53
    1059             :                       // Dst: (LDC164:f64 addrRegImm:iPTR:$a)
    1060             : /*1937*/            /*Scope*/ 14, /*->1952*/
    1061             : /*1938*/              OPC_CheckPatternPredicate, 2, // (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode())
    1062             : /*1940*/              OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
    1063             : /*1943*/              OPC_EmitMergeInputChains1_0,
    1064             : /*1944*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC1), 0|OPFL_Chain|OPFL_MemRefs,
    1065             :                           MVT::f64, 2/*#Ops*/, 2, 3, 
    1066             :                       // Src: (ld:f64 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 53
    1067             :                       // Dst: (LDC1:f64 addrRegImm:iPTR:$a)
    1068             : /*1952*/            /*Scope*/ 14, /*->1967*/
    1069             : /*1953*/              OPC_CheckPatternPredicate, 3, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->isFP64bit())
    1070             : /*1955*/              OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
    1071             : /*1958*/              OPC_EmitMergeInputChains1_0,
    1072             : /*1959*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
    1073             :                           MVT::f64, 2/*#Ops*/, 2, 3, 
    1074             :                       // Src: (ld:f64 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 53
    1075             :                       // Dst: (LDC1_MM:f64 addrRegImm:i32:$a)
    1076             : /*1967*/            0, /*End of Scope*/
    1077             : /*1968*/          /*SwitchType*/ 32, MVT::f32,// ->2002
    1078             : /*1970*/            OPC_Scope, 14, /*->1986*/ // 2 children in Scope
    1079             : /*1972*/              OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    1080             : /*1974*/              OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
    1081             : /*1977*/              OPC_EmitMergeInputChains1_0,
    1082             : /*1978*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::LWC1), 0|OPFL_Chain|OPFL_MemRefs,
    1083             :                           MVT::f32, 2/*#Ops*/, 2, 3, 
    1084             :                       // Src: (ld:f32 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 53
    1085             :                       // Dst: (LWC1:f32 addrRegImm:iPTR:$a)
    1086             : /*1986*/            /*Scope*/ 14, /*->2001*/
    1087             : /*1987*/              OPC_CheckPatternPredicate, 7, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode())
    1088             : /*1989*/              OPC_CheckComplexPat, /*CP*/0, /*#*/1, // selectAddrRegImm:$a #2 #3
    1089             : /*1992*/              OPC_EmitMergeInputChains1_0,
    1090             : /*1993*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::LWC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
    1091             :                           MVT::f32, 2/*#Ops*/, 2, 3, 
    1092             :                       // Src: (ld:f32 addrRegImm:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 53
    1093             :                       // Dst: (LWC1_MM:f32 addrRegImm:i32:$a)
    1094             : /*2001*/            0, /*End of Scope*/
    1095             : /*2002*/          0, // EndSwitchType
    1096             : /*2003*/        0, /*End of Scope*/
    1097             : /*2004*/      /*Scope*/ 69, /*->2074*/
    1098             : /*2005*/        OPC_MoveChild1,
    1099             : /*2006*/        OPC_CheckOpcode, TARGET_VAL(ISD::ADD),
    1100             : /*2009*/        OPC_RecordChild0, // #1 = $base
    1101             : /*2010*/        OPC_RecordChild1, // #2 = $index
    1102             : /*2011*/        OPC_MoveParent,
    1103             : /*2012*/        OPC_CheckPredicate, 6, // Predicate_unindexedload
    1104             : /*2014*/        OPC_CheckPredicate, 11, // Predicate_load
    1105             : /*2016*/        OPC_SwitchType /*2 cases */, 26, MVT::f32,// ->2045
    1106             : /*2019*/          OPC_Scope, 11, /*->2032*/ // 2 children in Scope
    1107             : /*2021*/            OPC_CheckPatternPredicate, 8, // (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isTargetNaCl()) && (!Subtarget->useSoftFloat()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    1108             : /*2023*/            OPC_EmitMergeInputChains1_0,
    1109             : /*2024*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LWXC1), 0|OPFL_Chain|OPFL_MemRefs,
    1110             :                         MVT::f32, 2/*#Ops*/, 1, 2, 
    1111             :                     // Src: (ld:f32 (add:iPTR iPTR:iPTR:$base, iPTR:iPTR:$index))<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 27
    1112             :                     // Dst: (LWXC1:f32 iPTR:iPTR:$base, iPTR:iPTR:$index)
    1113             : /*2032*/          /*Scope*/ 11, /*->2044*/
    1114             : /*2033*/            OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    1115             : /*2035*/            OPC_EmitMergeInputChains1_0,
    1116             : /*2036*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LWXC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
    1117             :                         MVT::f32, 2/*#Ops*/, 1, 2, 
    1118             :                     // Src: (ld:f32 (add:iPTR iPTR:iPTR:$base, iPTR:iPTR:$index))<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 27
    1119             :                     // Dst: (LWXC1_MM:f32 iPTR:iPTR:$base, iPTR:iPTR:$index)
    1120             : /*2044*/          0, /*End of Scope*/
    1121             : /*2045*/        /*SwitchType*/ 26, MVT::f64,// ->2073
    1122             : /*2047*/          OPC_Scope, 11, /*->2060*/ // 2 children in Scope
    1123             : /*2049*/            OPC_CheckPatternPredicate, 4, // (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isTargetNaCl()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    1124             : /*2051*/            OPC_EmitMergeInputChains1_0,
    1125             : /*2052*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDXC1), 0|OPFL_Chain|OPFL_MemRefs,
    1126             :                         MVT::f64, 2/*#Ops*/, 1, 2, 
    1127             :                     // Src: (ld:f64 (add:iPTR iPTR:iPTR:$base, iPTR:iPTR:$index))<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 27
    1128             :                     // Dst: (LDXC1:f64 iPTR:iPTR:$base, iPTR:iPTR:$index)
    1129             : /*2060*/          /*Scope*/ 11, /*->2072*/
    1130             : /*2061*/            OPC_CheckPatternPredicate, 5, // (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    1131             : /*2063*/            OPC_EmitMergeInputChains1_0,
    1132             : /*2064*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDXC164), 0|OPFL_Chain|OPFL_MemRefs,
    1133             :                         MVT::f64, 2/*#Ops*/, 1, 2, 
    1134             :                     // Src: (ld:f64 (add:iPTR iPTR:iPTR:$base, iPTR:iPTR:$index))<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 27
    1135             :                     // Dst: (LDXC164:f64 iPTR:iPTR:$base, iPTR:iPTR:$index)
    1136             : /*2072*/          0, /*End of Scope*/
    1137             : /*2073*/        0, // EndSwitchType
    1138             : /*2074*/      /*Scope*/ 31|128,2/*287*/, /*->2363*/
    1139             : /*2076*/        OPC_RecordChild1, // #1 = $addr
    1140             : /*2077*/        OPC_CheckPredicate, 6, // Predicate_unindexedload
    1141             : /*2079*/        OPC_CheckPredicate, 11, // Predicate_load
    1142             : /*2081*/        OPC_SwitchType /*12 cases */, 32, MVT::f32,// ->2116
    1143             : /*2084*/          OPC_Scope, 14, /*->2100*/ // 2 children in Scope
    1144             : /*2086*/            OPC_CheckPatternPredicate, 16, // (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode())
    1145             : /*2088*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
    1146             : /*2091*/            OPC_EmitMergeInputChains1_0,
    1147             : /*2092*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LWC1), 0|OPFL_Chain|OPFL_MemRefs,
    1148             :                         MVT::f32, 2/*#Ops*/, 2, 3, 
    1149             :                     // Src: (ld:f32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1150             :                     // Dst: (LWC1:f32 addrDefault:iPTR:$addr)
    1151             : /*2100*/          /*Scope*/ 14, /*->2115*/
    1152             : /*2101*/            OPC_CheckPatternPredicate, 17, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat())
    1153             : /*2103*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
    1154             : /*2106*/            OPC_EmitMergeInputChains1_0,
    1155             : /*2107*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LWC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
    1156             :                         MVT::f32, 2/*#Ops*/, 2, 3, 
    1157             :                     // Src: (ld:f32 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1158             :                     // Dst: (LWC1_MM:f32 addrDefault:i32:$addr)
    1159             : /*2115*/          0, /*End of Scope*/
    1160             : /*2116*/        /*SwitchType*/ 62, MVT::f64,// ->2180
    1161             : /*2118*/          OPC_Scope, 14, /*->2134*/ // 4 children in Scope
    1162             : /*2120*/            OPC_CheckPatternPredicate, 18, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode())
    1163             : /*2122*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
    1164             : /*2125*/            OPC_EmitMergeInputChains1_0,
    1165             : /*2126*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC164), 0|OPFL_Chain|OPFL_MemRefs,
    1166             :                         MVT::f64, 2/*#Ops*/, 2, 3, 
    1167             :                     // Src: (ld:f64 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1168             :                     // Dst: (LDC164:f64 addrDefault:iPTR:$addr)
    1169             : /*2134*/          /*Scope*/ 14, /*->2149*/
    1170             : /*2135*/            OPC_CheckPatternPredicate, 19, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode())
    1171             : /*2137*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
    1172             : /*2140*/            OPC_EmitMergeInputChains1_0,
    1173             : /*2141*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC1), 0|OPFL_Chain|OPFL_MemRefs,
    1174             :                         MVT::f64, 2/*#Ops*/, 2, 3, 
    1175             :                     // Src: (ld:f64 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1176             :                     // Dst: (LDC1:f64 addrDefault:iPTR:$addr)
    1177             : /*2149*/          /*Scope*/ 14, /*->2164*/
    1178             : /*2150*/            OPC_CheckPatternPredicate, 20, // (Subtarget->hasStandardEncoding()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit())
    1179             : /*2152*/            OPC_CheckComplexPat, /*CP*/2, /*#*/1, // selectAddrDefault:$addr #2 #3
    1180             : /*2155*/            OPC_EmitMergeInputChains1_0,
    1181             : /*2156*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC1_MM), 0|OPFL_Chain|OPFL_MemRefs,
    1182             :                         MVT::f64, 2/*#Ops*/, 2, 3, 
    1183             :                     // Src: (ld:f64 addrDefault:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1184             :                     // Dst: (LDC1_MM:f64 addrDefault:i32:$addr)
    1185             : /*2164*/          /*Scope*/ 14, /*->2179*/
    1186             : /*2165*/            OPC_CheckPatternPredicate, 21, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat())
    1187             : /*2167*/            OPC_CheckComplexPat, /*CP*/7, /*#*/1, // selectIntAddr16MM:$addr #2 #3
    1188             : /*2170*/            OPC_EmitMergeInputChains1_0,
    1189             : /*2171*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC1_D64_MMR6), 0|OPFL_Chain|OPFL_MemRefs,
    1190             :                         MVT::f64, 2/*#Ops*/, 2, 3, 
    1191             :                     // Src: (ld:f64 addrimm16:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1192             :                     // Dst: (LDC1_D64_MMR6:f64 addrimm16:i32:$addr)
    1193             : /*2179*/          0, /*End of Scope*/
    1194             : /*2180*/        /*SwitchType*/ 14, MVT::f16,// ->2196
    1195             : /*2182*/          OPC_CheckPatternPredicate, 25, // (Subtarget->hasMSA())
    1196             : /*2184*/          OPC_CheckComplexPat, /*CP*/8, /*#*/1, // selectIntAddrSImm10:$addr #2 #3
    1197             : /*2187*/          OPC_EmitMergeInputChains1_0,
    1198             : /*2188*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_F16), 0|OPFL_Chain|OPFL_MemRefs,
    1199             :                       MVT::f16, 2/*#Ops*/, 2, 3, 
    1200             :                   // Src: (ld:f16 addrimm10:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1201             :                   // Dst: (LD_F16:f16 addrimm10:iPTR:$addr)
    1202             : /*2196*/        /*SwitchType*/ 14, MVT::v16i8,// ->2212
    1203             : /*2198*/          OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    1204             : /*2200*/          OPC_CheckComplexPat, /*CP*/8, /*#*/1, // selectIntAddrSImm10:$addr #2 #3
    1205             : /*2203*/          OPC_EmitMergeInputChains1_0,
    1206             : /*2204*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_B), 0|OPFL_Chain|OPFL_MemRefs,
    1207             :                       MVT::v16i8, 2/*#Ops*/, 2, 3, 
    1208             :                   // Src: (ld:v16i8 addrimm10:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1209             :                   // Dst: (LD_B:v16i8 addrimm10:iPTR:$addr)
    1210             : /*2212*/        /*SwitchType*/ 14, MVT::v8i16,// ->2228
    1211             : /*2214*/          OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    1212             : /*2216*/          OPC_CheckComplexPat, /*CP*/9, /*#*/1, // selectIntAddrSImm10Lsl1:$addr #2 #3
    1213             : /*2219*/          OPC_EmitMergeInputChains1_0,
    1214             : /*2220*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_H), 0|OPFL_Chain|OPFL_MemRefs,
    1215             :                       MVT::v8i16, 2/*#Ops*/, 2, 3, 
    1216             :                   // Src: (ld:v8i16 addrimm10lsl1:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1217             :                   // Dst: (LD_H:v8i16 addrimm10lsl1:iPTR:$addr)
    1218             : /*2228*/        /*SwitchType*/ 14, MVT::v4i32,// ->2244
    1219             : /*2230*/          OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    1220             : /*2232*/          OPC_CheckComplexPat, /*CP*/10, /*#*/1, // selectIntAddrSImm10Lsl2:$addr #2 #3
    1221             : /*2235*/          OPC_EmitMergeInputChains1_0,
    1222             : /*2236*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_W), 0|OPFL_Chain|OPFL_MemRefs,
    1223             :                       MVT::v4i32, 2/*#Ops*/, 2, 3, 
    1224             :                   // Src: (ld:v4i32 addrimm10lsl2:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1225             :                   // Dst: (LD_W:v4i32 addrimm10lsl2:iPTR:$addr)
    1226             : /*2244*/        /*SwitchType*/ 14, MVT::v2i64,// ->2260
    1227             : /*2246*/          OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    1228             : /*2248*/          OPC_CheckComplexPat, /*CP*/11, /*#*/1, // selectIntAddrSImm10Lsl3:$addr #2 #3
    1229             : /*2251*/          OPC_EmitMergeInputChains1_0,
    1230             : /*2252*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_D), 0|OPFL_Chain|OPFL_MemRefs,
    1231             :                       MVT::v2i64, 2/*#Ops*/, 2, 3, 
    1232             :                   // Src: (ld:v2i64 addrimm10lsl3:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1233             :                   // Dst: (LD_D:v2i64 addrimm10lsl3:iPTR:$addr)
    1234             : /*2260*/        /*SwitchType*/ 25, MVT::v2i16,// ->2287
    1235             : /*2262*/          OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    1236             : /*2264*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    1237             : /*2267*/          OPC_EmitMergeInputChains1_0,
    1238             : /*2268*/          OPC_EmitNode1, TARGET_VAL(Mips::LW), 0|OPFL_Chain|OPFL_MemRefs,
    1239             :                       MVT::i32, 2/*#Ops*/, 2, 3,  // Results = #4
    1240             : /*2276*/          OPC_EmitInteger, MVT::i32, Mips::DSPRRegClassID,
    1241             : /*2279*/          OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS), 0|OPFL_Chain,
    1242             :                       MVT::v2i16, 2/*#Ops*/, 4, 5, 
    1243             :                   // Src: (ld:v2i16 addr:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1244             :                   // Dst: (COPY_TO_REGCLASS:v2i16 (LW:i32 addr:iPTR:$a), DSPR:i32)
    1245             : /*2287*/        /*SwitchType*/ 25, MVT::v4i8,// ->2314
    1246             : /*2289*/          OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    1247             : /*2291*/          OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    1248             : /*2294*/          OPC_EmitMergeInputChains1_0,
    1249             : /*2295*/          OPC_EmitNode1, TARGET_VAL(Mips::LW), 0|OPFL_Chain|OPFL_MemRefs,
    1250             :                       MVT::i32, 2/*#Ops*/, 2, 3,  // Results = #4
    1251             : /*2303*/          OPC_EmitInteger, MVT::i32, Mips::DSPRRegClassID,
    1252             : /*2306*/          OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS), 0|OPFL_Chain,
    1253             :                       MVT::v4i8, 2/*#Ops*/, 4, 5, 
    1254             :                   // Src: (ld:v4i8 addr:iPTR:$a)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1255             :                   // Dst: (COPY_TO_REGCLASS:v4i8 (LW:i32 addr:iPTR:$a), DSPR:i32)
    1256             : /*2314*/        /*SwitchType*/ 14, MVT::v8f16,// ->2330
    1257             : /*2316*/          OPC_CheckPatternPredicate, 25, // (Subtarget->hasMSA())
    1258             : /*2318*/          OPC_CheckComplexPat, /*CP*/9, /*#*/1, // selectIntAddrSImm10Lsl1:$addr #2 #3
    1259             : /*2321*/          OPC_EmitMergeInputChains1_0,
    1260             : /*2322*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_H), 0|OPFL_Chain|OPFL_MemRefs,
    1261             :                       MVT::v8f16, 2/*#Ops*/, 2, 3, 
    1262             :                   // Src: (ld:v8f16 addrimm10lsl1:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1263             :                   // Dst: (LD_H:v8f16 addrimm10lsl1:iPTR:$addr)
    1264             : /*2330*/        /*SwitchType*/ 14, MVT::v4f32,// ->2346
    1265             : /*2332*/          OPC_CheckPatternPredicate, 25, // (Subtarget->hasMSA())
    1266             : /*2334*/          OPC_CheckComplexPat, /*CP*/10, /*#*/1, // selectIntAddrSImm10Lsl2:$addr #2 #3
    1267             : /*2337*/          OPC_EmitMergeInputChains1_0,
    1268             : /*2338*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_W), 0|OPFL_Chain|OPFL_MemRefs,
    1269             :                       MVT::v4f32, 2/*#Ops*/, 2, 3, 
    1270             :                   // Src: (ld:v4f32 addrimm10lsl2:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1271             :                   // Dst: (LD_W:v4f32 addrimm10lsl2:iPTR:$addr)
    1272             : /*2346*/        /*SwitchType*/ 14, MVT::v2f64,// ->2362
    1273             : /*2348*/          OPC_CheckPatternPredicate, 25, // (Subtarget->hasMSA())
    1274             : /*2350*/          OPC_CheckComplexPat, /*CP*/11, /*#*/1, // selectIntAddrSImm10Lsl3:$addr #2 #3
    1275             : /*2353*/          OPC_EmitMergeInputChains1_0,
    1276             : /*2354*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_D), 0|OPFL_Chain|OPFL_MemRefs,
    1277             :                       MVT::v2f64, 2/*#Ops*/, 2, 3, 
    1278             :                   // Src: (ld:v2f64 addrimm10lsl3:iPTR:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load>> - Complexity = 13
    1279             :                   // Dst: (LD_D:v2f64 addrimm10lsl3:iPTR:$addr)
    1280             : /*2362*/        0, // EndSwitchType
    1281             : /*2363*/      0, /*End of Scope*/
    1282             : /*2364*/    /*SwitchOpcode*/ 85|128,21/*2773*/, TARGET_VAL(ISD::BRCOND),// ->5141
    1283             : /*2368*/      OPC_RecordNode, // #0 = 'brcond' chained node
    1284             : /*2369*/      OPC_Scope, 0|128,21/*2688*/, /*->5060*/ // 2 children in Scope
    1285             : /*2372*/        OPC_MoveChild1,
    1286             : /*2373*/        OPC_CheckOpcode, TARGET_VAL(ISD::SETCC),
    1287             : /*2376*/        OPC_Scope, 85|128,4/*597*/, /*->2976*/ // 2 children in Scope
    1288             : /*2379*/          OPC_MoveChild0,
    1289             : /*2380*/          OPC_CheckOpcode, TARGET_VAL(ISD::AND),
    1290             : /*2383*/          OPC_Scope, 31|128,1/*159*/, /*->2545*/ // 3 children in Scope
    1291             : /*2386*/            OPC_RecordChild0, // #1 = $rs
    1292             : /*2387*/            OPC_MoveChild1,
    1293             : /*2388*/            OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
    1294             : /*2391*/            OPC_Scope, 73, /*->2466*/ // 2 children in Scope
    1295             : /*2393*/              OPC_CheckChild0Integer, 1, 
    1296             : /*2395*/              OPC_RecordChild1, // #2 = $p
    1297             : /*2396*/              OPC_MoveChild1,
    1298             : /*2397*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    1299             : /*2400*/              OPC_CheckPredicate, 15, // Predicate_immZExt5_64
    1300             : /*2402*/              OPC_CheckType, MVT::i64,
    1301             : /*2404*/              OPC_MoveParent,
    1302             : /*2405*/              OPC_MoveParent,
    1303             : /*2406*/              OPC_CheckType, MVT::i64,
    1304             : /*2408*/              OPC_MoveParent,
    1305             : /*2409*/              OPC_CheckChild1Integer, 0, 
    1306             : /*2411*/              OPC_MoveChild2,
    1307             : /*2412*/              OPC_Scope, 25, /*->2439*/ // 2 children in Scope
    1308             : /*2414*/                OPC_CheckCondCode, ISD::SETEQ,
    1309             : /*2416*/                OPC_MoveParent,
    1310             : /*2417*/                OPC_CheckType, MVT::i32,
    1311             : /*2419*/                OPC_MoveParent,
    1312             : /*2420*/                OPC_RecordChild2, // #3 = $offset
    1313             : /*2421*/                OPC_MoveChild2,
    1314             : /*2422*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1315             : /*2425*/                OPC_MoveParent,
    1316             : /*2426*/                OPC_CheckPatternPredicate, 28, // (Subtarget->hasCnMips())
    1317             : /*2428*/                OPC_EmitMergeInputChains1_0,
    1318             : /*2429*/                OPC_EmitConvertToTarget, 2,
    1319             : /*2431*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT0), 0|OPFL_Chain,
    1320             :                             3/*#Ops*/, 1, 4, 3, 
    1321             :                         // Src: (brcond (setcc:i32 (and:i64 GPR64Opnd:i64:$rs, (shl:i64 1:i64, (imm:i64)<<P:Predicate_immZExt5_64>>:$p)), 0:i64, SETEQ:Other), (bb:Other):$offset) - Complexity = 26
    1322             :                         // Dst: (BBIT0 GPR64Opnd:i64:$rs, (imm:i64):$p, (bb:Other):$offset)
    1323             : /*2439*/              /*Scope*/ 25, /*->2465*/
    1324             : /*2440*/                OPC_CheckCondCode, ISD::SETNE,
    1325             : /*2442*/                OPC_MoveParent,
    1326             : /*2443*/                OPC_CheckType, MVT::i32,
    1327             : /*2445*/                OPC_MoveParent,
    1328             : /*2446*/                OPC_RecordChild2, // #3 = $offset
    1329             : /*2447*/                OPC_MoveChild2,
    1330             : /*2448*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1331             : /*2451*/                OPC_MoveParent,
    1332             : /*2452*/                OPC_CheckPatternPredicate, 28, // (Subtarget->hasCnMips())
    1333             : /*2454*/                OPC_EmitMergeInputChains1_0,
    1334             : /*2455*/                OPC_EmitConvertToTarget, 2,
    1335             : /*2457*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT1), 0|OPFL_Chain,
    1336             :                             3/*#Ops*/, 1, 4, 3, 
    1337             :                         // Src: (brcond (setcc:i32 (and:i64 GPR64Opnd:i64:$rs, (shl:i64 1:i64, (imm:i64)<<P:Predicate_immZExt5_64>>:$p)), 0:i64, SETNE:Other), (bb:Other):$offset) - Complexity = 26
    1338             :                         // Dst: (BBIT1 GPR64Opnd:i64:$rs, (imm:i64):$p, (bb:Other):$offset)
    1339             : /*2465*/              0, /*End of Scope*/
    1340             : /*2466*/            /*Scope*/ 77, /*->2544*/
    1341             : /*2467*/              OPC_CheckChild0Integer, 0|128,0|128,0|128,0|128,16/*4294967296*/, 
    1342             : /*2473*/              OPC_RecordChild1, // #2 = $p
    1343             : /*2474*/              OPC_MoveChild1,
    1344             : /*2475*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    1345             : /*2478*/              OPC_CheckPredicate, 15, // Predicate_immZExt5_64
    1346             : /*2480*/              OPC_CheckType, MVT::i64,
    1347             : /*2482*/              OPC_MoveParent,
    1348             : /*2483*/              OPC_MoveParent,
    1349             : /*2484*/              OPC_CheckType, MVT::i64,
    1350             : /*2486*/              OPC_MoveParent,
    1351             : /*2487*/              OPC_CheckChild1Integer, 0, 
    1352             : /*2489*/              OPC_MoveChild2,
    1353             : /*2490*/              OPC_Scope, 25, /*->2517*/ // 2 children in Scope
    1354             : /*2492*/                OPC_CheckCondCode, ISD::SETEQ,
    1355             : /*2494*/                OPC_MoveParent,
    1356             : /*2495*/                OPC_CheckType, MVT::i32,
    1357             : /*2497*/                OPC_MoveParent,
    1358             : /*2498*/                OPC_RecordChild2, // #3 = $offset
    1359             : /*2499*/                OPC_MoveChild2,
    1360             : /*2500*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1361             : /*2503*/                OPC_MoveParent,
    1362             : /*2504*/                OPC_CheckPatternPredicate, 28, // (Subtarget->hasCnMips())
    1363             : /*2506*/                OPC_EmitMergeInputChains1_0,
    1364             : /*2507*/                OPC_EmitConvertToTarget, 2,
    1365             : /*2509*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT032), 0|OPFL_Chain,
    1366             :                             3/*#Ops*/, 1, 4, 3, 
    1367             :                         // Src: (brcond (setcc:i32 (and:i64 GPR64Opnd:i64:$rs, (shl:i64 4294967296:i64, (imm:i64)<<P:Predicate_immZExt5_64>>:$p)), 0:i64, SETEQ:Other), (bb:Other):$offset) - Complexity = 26
    1368             :                         // Dst: (BBIT032 GPR64Opnd:i64:$rs, (imm:i64):$p, (bb:Other):$offset)
    1369             : /*2517*/              /*Scope*/ 25, /*->2543*/
    1370             : /*2518*/                OPC_CheckCondCode, ISD::SETNE,
    1371             : /*2520*/                OPC_MoveParent,
    1372             : /*2521*/                OPC_CheckType, MVT::i32,
    1373             : /*2523*/                OPC_MoveParent,
    1374             : /*2524*/                OPC_RecordChild2, // #3 = $offset
    1375             : /*2525*/                OPC_MoveChild2,
    1376             : /*2526*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1377             : /*2529*/                OPC_MoveParent,
    1378             : /*2530*/                OPC_CheckPatternPredicate, 28, // (Subtarget->hasCnMips())
    1379             : /*2532*/                OPC_EmitMergeInputChains1_0,
    1380             : /*2533*/                OPC_EmitConvertToTarget, 2,
    1381             : /*2535*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT132), 0|OPFL_Chain,
    1382             :                             3/*#Ops*/, 1, 4, 3, 
    1383             :                         // Src: (brcond (setcc:i32 (and:i64 GPR64Opnd:i64:$rs, (shl:i64 4294967296:i64, (imm:i64)<<P:Predicate_immZExt5_64>>:$p)), 0:i64, SETNE:Other), (bb:Other):$offset) - Complexity = 26
    1384             :                         // Dst: (BBIT132 GPR64Opnd:i64:$rs, (imm:i64):$p, (bb:Other):$offset)
    1385             : /*2543*/              0, /*End of Scope*/
    1386             : /*2544*/            0, /*End of Scope*/
    1387             : /*2545*/          /*Scope*/ 32|128,1/*160*/, /*->2707*/
    1388             : /*2547*/            OPC_MoveChild0,
    1389             : /*2548*/            OPC_CheckOpcode, TARGET_VAL(ISD::SHL),
    1390             : /*2551*/            OPC_Scope, 74, /*->2627*/ // 2 children in Scope
    1391             : /*2553*/              OPC_CheckChild0Integer, 1, 
    1392             : /*2555*/              OPC_RecordChild1, // #1 = $p
    1393             : /*2556*/              OPC_MoveChild1,
    1394             : /*2557*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    1395             : /*2560*/              OPC_CheckPredicate, 15, // Predicate_immZExt5_64
    1396             : /*2562*/              OPC_CheckType, MVT::i64,
    1397             : /*2564*/              OPC_MoveParent,
    1398             : /*2565*/              OPC_MoveParent,
    1399             : /*2566*/              OPC_RecordChild1, // #2 = $rs
    1400             : /*2567*/              OPC_CheckType, MVT::i64,
    1401             : /*2569*/              OPC_MoveParent,
    1402             : /*2570*/              OPC_CheckChild1Integer, 0, 
    1403             : /*2572*/              OPC_MoveChild2,
    1404             : /*2573*/              OPC_Scope, 25, /*->2600*/ // 2 children in Scope
    1405             : /*2575*/                OPC_CheckCondCode, ISD::SETEQ,
    1406             : /*2577*/                OPC_MoveParent,
    1407             : /*2578*/                OPC_CheckType, MVT::i32,
    1408             : /*2580*/                OPC_MoveParent,
    1409             : /*2581*/                OPC_RecordChild2, // #3 = $offset
    1410             : /*2582*/                OPC_MoveChild2,
    1411             : /*2583*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1412             : /*2586*/                OPC_MoveParent,
    1413             : /*2587*/                OPC_CheckPatternPredicate, 28, // (Subtarget->hasCnMips())
    1414             : /*2589*/                OPC_EmitMergeInputChains1_0,
    1415             : /*2590*/                OPC_EmitConvertToTarget, 1,
    1416             : /*2592*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT0), 0|OPFL_Chain,
    1417             :                             3/*#Ops*/, 2, 4, 3, 
    1418             :                         // Src: (brcond (setcc:i32 (and:i64 (shl:i64 1:i64, (imm:i64)<<P:Predicate_immZExt5_64>>:$p), GPR64Opnd:i64:$rs), 0:i64, SETEQ:Other), (bb:Other):$offset) - Complexity = 26
    1419             :                         // Dst: (BBIT0 GPR64Opnd:i64:$rs, (imm:i64):$p, (bb:Other):$offset)
    1420             : /*2600*/              /*Scope*/ 25, /*->2626*/
    1421             : /*2601*/                OPC_CheckCondCode, ISD::SETNE,
    1422             : /*2603*/                OPC_MoveParent,
    1423             : /*2604*/                OPC_CheckType, MVT::i32,
    1424             : /*2606*/                OPC_MoveParent,
    1425             : /*2607*/                OPC_RecordChild2, // #3 = $offset
    1426             : /*2608*/                OPC_MoveChild2,
    1427             : /*2609*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1428             : /*2612*/                OPC_MoveParent,
    1429             : /*2613*/                OPC_CheckPatternPredicate, 28, // (Subtarget->hasCnMips())
    1430             : /*2615*/                OPC_EmitMergeInputChains1_0,
    1431             : /*2616*/                OPC_EmitConvertToTarget, 1,
    1432             : /*2618*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT1), 0|OPFL_Chain,
    1433             :                             3/*#Ops*/, 2, 4, 3, 
    1434             :                         // Src: (brcond (setcc:i32 (and:i64 (shl:i64 1:i64, (imm:i64)<<P:Predicate_immZExt5_64>>:$p), GPR64Opnd:i64:$rs), 0:i64, SETNE:Other), (bb:Other):$offset) - Complexity = 26
    1435             :                         // Dst: (BBIT1 GPR64Opnd:i64:$rs, (imm:i64):$p, (bb:Other):$offset)
    1436             : /*2626*/              0, /*End of Scope*/
    1437             : /*2627*/            /*Scope*/ 78, /*->2706*/
    1438             : /*2628*/              OPC_CheckChild0Integer, 0|128,0|128,0|128,0|128,16/*4294967296*/, 
    1439             : /*2634*/              OPC_RecordChild1, // #1 = $p
    1440             : /*2635*/              OPC_MoveChild1,
    1441             : /*2636*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    1442             : /*2639*/              OPC_CheckPredicate, 15, // Predicate_immZExt5_64
    1443             : /*2641*/              OPC_CheckType, MVT::i64,
    1444             : /*2643*/              OPC_MoveParent,
    1445             : /*2644*/              OPC_MoveParent,
    1446             : /*2645*/              OPC_RecordChild1, // #2 = $rs
    1447             : /*2646*/              OPC_CheckType, MVT::i64,
    1448             : /*2648*/              OPC_MoveParent,
    1449             : /*2649*/              OPC_CheckChild1Integer, 0, 
    1450             : /*2651*/              OPC_MoveChild2,
    1451             : /*2652*/              OPC_Scope, 25, /*->2679*/ // 2 children in Scope
    1452             : /*2654*/                OPC_CheckCondCode, ISD::SETEQ,
    1453             : /*2656*/                OPC_MoveParent,
    1454             : /*2657*/                OPC_CheckType, MVT::i32,
    1455             : /*2659*/                OPC_MoveParent,
    1456             : /*2660*/                OPC_RecordChild2, // #3 = $offset
    1457             : /*2661*/                OPC_MoveChild2,
    1458             : /*2662*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1459             : /*2665*/                OPC_MoveParent,
    1460             : /*2666*/                OPC_CheckPatternPredicate, 28, // (Subtarget->hasCnMips())
    1461             : /*2668*/                OPC_EmitMergeInputChains1_0,
    1462             : /*2669*/                OPC_EmitConvertToTarget, 1,
    1463             : /*2671*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT032), 0|OPFL_Chain,
    1464             :                             3/*#Ops*/, 2, 4, 3, 
    1465             :                         // Src: (brcond (setcc:i32 (and:i64 (shl:i64 4294967296:i64, (imm:i64)<<P:Predicate_immZExt5_64>>:$p), GPR64Opnd:i64:$rs), 0:i64, SETEQ:Other), (bb:Other):$offset) - Complexity = 26
    1466             :                         // Dst: (BBIT032 GPR64Opnd:i64:$rs, (imm:i64):$p, (bb:Other):$offset)
    1467             : /*2679*/              /*Scope*/ 25, /*->2705*/
    1468             : /*2680*/                OPC_CheckCondCode, ISD::SETNE,
    1469             : /*2682*/                OPC_MoveParent,
    1470             : /*2683*/                OPC_CheckType, MVT::i32,
    1471             : /*2685*/                OPC_MoveParent,
    1472             : /*2686*/                OPC_RecordChild2, // #3 = $offset
    1473             : /*2687*/                OPC_MoveChild2,
    1474             : /*2688*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1475             : /*2691*/                OPC_MoveParent,
    1476             : /*2692*/                OPC_CheckPatternPredicate, 28, // (Subtarget->hasCnMips())
    1477             : /*2694*/                OPC_EmitMergeInputChains1_0,
    1478             : /*2695*/                OPC_EmitConvertToTarget, 1,
    1479             : /*2697*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT132), 0|OPFL_Chain,
    1480             :                             3/*#Ops*/, 2, 4, 3, 
    1481             :                         // Src: (brcond (setcc:i32 (and:i64 (shl:i64 4294967296:i64, (imm:i64)<<P:Predicate_immZExt5_64>>:$p), GPR64Opnd:i64:$rs), 0:i64, SETNE:Other), (bb:Other):$offset) - Complexity = 26
    1482             :                         // Dst: (BBIT132 GPR64Opnd:i64:$rs, (imm:i64):$p, (bb:Other):$offset)
    1483             : /*2705*/              0, /*End of Scope*/
    1484             : /*2706*/            0, /*End of Scope*/
    1485             : /*2707*/          /*Scope*/ 10|128,2/*266*/, /*->2975*/
    1486             : /*2709*/            OPC_RecordChild0, // #1 = $lhs
    1487             : /*2710*/            OPC_RecordChild1, // #2 = $mask
    1488             : /*2711*/            OPC_MoveChild1,
    1489             : /*2712*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    1490             : /*2715*/            OPC_Scope, 37, /*->2754*/ // 5 children in Scope
    1491             : /*2717*/              OPC_CheckPredicate, 16, // Predicate_PowerOf2LO
    1492             : /*2719*/              OPC_MoveParent,
    1493             : /*2720*/              OPC_CheckType, MVT::i64,
    1494             : /*2722*/              OPC_MoveParent,
    1495             : /*2723*/              OPC_CheckChild1Integer, 0, 
    1496             : /*2725*/              OPC_MoveChild2,
    1497             : /*2726*/              OPC_CheckCondCode, ISD::SETEQ,
    1498             : /*2728*/              OPC_MoveParent,
    1499             : /*2729*/              OPC_CheckType, MVT::i32,
    1500             : /*2731*/              OPC_MoveParent,
    1501             : /*2732*/              OPC_RecordChild2, // #3 = $dst
    1502             : /*2733*/              OPC_MoveChild2,
    1503             : /*2734*/              OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1504             : /*2737*/              OPC_MoveParent,
    1505             : /*2738*/              OPC_CheckPatternPredicate, 29, // (Subtarget->hasCnMips()) && (Subtarget->hasMips64()) && (Subtarget->hasStandardEncoding())
    1506             : /*2740*/              OPC_EmitMergeInputChains1_0,
    1507             : /*2741*/              OPC_EmitConvertToTarget, 2,
    1508             : /*2743*/              OPC_EmitNodeXForm, 0, 4, // Log2LO
    1509             : /*2746*/              OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT0), 0|OPFL_Chain,
    1510             :                           3/*#Ops*/, 1, 5, 3, 
    1511             :                       // Src: (brcond (setcc:i32 (and:i64 i64:i64:$lhs, (imm:i64)<<P:Predicate_PowerOf2LO>>:$mask), 0:i64, SETEQ:Other), (bb:Other):$dst) - Complexity = 18
    1512             :                       // Dst: (BBIT0 i64:i64:$lhs, (Log2LO:i64 (imm:i64)<<P:Predicate_PowerOf2LO>>:$mask), (bb:Other):$dst)
    1513             : /*2754*/            /*Scope*/ 37, /*->2792*/
    1514             : /*2755*/              OPC_CheckPredicate, 17, // Predicate_PowerOf2HI
    1515             : /*2757*/              OPC_MoveParent,
    1516             : /*2758*/              OPC_CheckType, MVT::i64,
    1517             : /*2760*/              OPC_MoveParent,
    1518             : /*2761*/              OPC_CheckChild1Integer, 0, 
    1519             : /*2763*/              OPC_MoveChild2,
    1520             : /*2764*/              OPC_CheckCondCode, ISD::SETEQ,
    1521             : /*2766*/              OPC_MoveParent,
    1522             : /*2767*/              OPC_CheckType, MVT::i32,
    1523             : /*2769*/              OPC_MoveParent,
    1524             : /*2770*/              OPC_RecordChild2, // #3 = $dst
    1525             : /*2771*/              OPC_MoveChild2,
    1526             : /*2772*/              OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1527             : /*2775*/              OPC_MoveParent,
    1528             : /*2776*/              OPC_CheckPatternPredicate, 29, // (Subtarget->hasCnMips()) && (Subtarget->hasMips64()) && (Subtarget->hasStandardEncoding())
    1529             : /*2778*/              OPC_EmitMergeInputChains1_0,
    1530             : /*2779*/              OPC_EmitConvertToTarget, 2,
    1531             : /*2781*/              OPC_EmitNodeXForm, 1, 4, // Log2HI
    1532             : /*2784*/              OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT032), 0|OPFL_Chain,
    1533             :                           3/*#Ops*/, 1, 5, 3, 
    1534             :                       // Src: (brcond (setcc:i32 (and:i64 i64:i64:$lhs, (imm:i64)<<P:Predicate_PowerOf2HI>>:$mask), 0:i64, SETEQ:Other), (bb:Other):$dst) - Complexity = 18
    1535             :                       // Dst: (BBIT032 i64:i64:$lhs, (Log2HI:i64 (imm:i64)<<P:Predicate_PowerOf2HI>>:$mask), (bb:Other):$dst)
    1536             : /*2792*/            /*Scope*/ 37, /*->2830*/
    1537             : /*2793*/              OPC_CheckPredicate, 16, // Predicate_PowerOf2LO
    1538             : /*2795*/              OPC_MoveParent,
    1539             : /*2796*/              OPC_CheckType, MVT::i64,
    1540             : /*2798*/              OPC_MoveParent,
    1541             : /*2799*/              OPC_CheckChild1Integer, 0, 
    1542             : /*2801*/              OPC_MoveChild2,
    1543             : /*2802*/              OPC_CheckCondCode, ISD::SETNE,
    1544             : /*2804*/              OPC_MoveParent,
    1545             : /*2805*/              OPC_CheckType, MVT::i32,
    1546             : /*2807*/              OPC_MoveParent,
    1547             : /*2808*/              OPC_RecordChild2, // #3 = $dst
    1548             : /*2809*/              OPC_MoveChild2,
    1549             : /*2810*/              OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1550             : /*2813*/              OPC_MoveParent,
    1551             : /*2814*/              OPC_CheckPatternPredicate, 29, // (Subtarget->hasCnMips()) && (Subtarget->hasMips64()) && (Subtarget->hasStandardEncoding())
    1552             : /*2816*/              OPC_EmitMergeInputChains1_0,
    1553             : /*2817*/              OPC_EmitConvertToTarget, 2,
    1554             : /*2819*/              OPC_EmitNodeXForm, 0, 4, // Log2LO
    1555             : /*2822*/              OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT1), 0|OPFL_Chain,
    1556             :                           3/*#Ops*/, 1, 5, 3, 
    1557             :                       // Src: (brcond (setcc:i32 (and:i64 i64:i64:$lhs, (imm:i64)<<P:Predicate_PowerOf2LO>>:$mask), 0:i64, SETNE:Other), (bb:Other):$dst) - Complexity = 18
    1558             :                       // Dst: (BBIT1 i64:i64:$lhs, (Log2LO:i64 (imm:i64)<<P:Predicate_PowerOf2LO>>:$mask), (bb:Other):$dst)
    1559             : /*2830*/            /*Scope*/ 37, /*->2868*/
    1560             : /*2831*/              OPC_CheckPredicate, 17, // Predicate_PowerOf2HI
    1561             : /*2833*/              OPC_MoveParent,
    1562             : /*2834*/              OPC_CheckType, MVT::i64,
    1563             : /*2836*/              OPC_MoveParent,
    1564             : /*2837*/              OPC_CheckChild1Integer, 0, 
    1565             : /*2839*/              OPC_MoveChild2,
    1566             : /*2840*/              OPC_CheckCondCode, ISD::SETNE,
    1567             : /*2842*/              OPC_MoveParent,
    1568             : /*2843*/              OPC_CheckType, MVT::i32,
    1569             : /*2845*/              OPC_MoveParent,
    1570             : /*2846*/              OPC_RecordChild2, // #3 = $dst
    1571             : /*2847*/              OPC_MoveChild2,
    1572             : /*2848*/              OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1573             : /*2851*/              OPC_MoveParent,
    1574             : /*2852*/              OPC_CheckPatternPredicate, 29, // (Subtarget->hasCnMips()) && (Subtarget->hasMips64()) && (Subtarget->hasStandardEncoding())
    1575             : /*2854*/              OPC_EmitMergeInputChains1_0,
    1576             : /*2855*/              OPC_EmitConvertToTarget, 2,
    1577             : /*2857*/              OPC_EmitNodeXForm, 1, 4, // Log2HI
    1578             : /*2860*/              OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT132), 0|OPFL_Chain,
    1579             :                           3/*#Ops*/, 1, 5, 3, 
    1580             :                       // Src: (brcond (setcc:i32 (and:i64 i64:i64:$lhs, (imm:i64)<<P:Predicate_PowerOf2HI>>:$mask), 0:i64, SETNE:Other), (bb:Other):$dst) - Complexity = 18
    1581             :                       // Dst: (BBIT132 i64:i64:$lhs, (Log2HI:i64 (imm:i64)<<P:Predicate_PowerOf2HI>>:$mask), (bb:Other):$dst)
    1582             : /*2868*/            /*Scope*/ 105, /*->2974*/
    1583             : /*2869*/              OPC_CheckPredicate, 18, // Predicate_PowerOf2LO_i32
    1584             : /*2871*/              OPC_MoveParent,
    1585             : /*2872*/              OPC_CheckType, MVT::i32,
    1586             : /*2874*/              OPC_MoveParent,
    1587             : /*2875*/              OPC_CheckChild1Integer, 0, 
    1588             : /*2877*/              OPC_MoveChild2,
    1589             : /*2878*/              OPC_Scope, 46, /*->2926*/ // 2 children in Scope
    1590             : /*2880*/                OPC_CheckCondCode, ISD::SETEQ,
    1591             : /*2882*/                OPC_MoveParent,
    1592             : /*2883*/                OPC_CheckType, MVT::i32,
    1593             : /*2885*/                OPC_MoveParent,
    1594             : /*2886*/                OPC_RecordChild2, // #3 = $dst
    1595             : /*2887*/                OPC_MoveChild2,
    1596             : /*2888*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1597             : /*2891*/                OPC_MoveParent,
    1598             : /*2892*/                OPC_CheckPatternPredicate, 29, // (Subtarget->hasCnMips()) && (Subtarget->hasMips64()) && (Subtarget->hasStandardEncoding())
    1599             : /*2894*/                OPC_EmitMergeInputChains1_0,
    1600             : /*2895*/                OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0,
    1601             :                             MVT::i64, 0/*#Ops*/,  // Results = #4
    1602             : /*2901*/                OPC_EmitInteger, MVT::i32, Mips::sub_32,
    1603             : /*2904*/                OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0,
    1604             :                             MVT::i64, 3/*#Ops*/, 4, 1, 5,  // Results = #6
    1605             : /*2913*/                OPC_EmitConvertToTarget, 2,
    1606             : /*2915*/                OPC_EmitNodeXForm, 0, 7, // Log2LO
    1607             : /*2918*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT0), 0|OPFL_Chain,
    1608             :                             3/*#Ops*/, 6, 8, 3, 
    1609             :                         // Src: (brcond (setcc:i32 (and:i32 i32:i32:$lhs, (imm:i32)<<P:Predicate_PowerOf2LO_i32>>:$mask), 0:i32, SETEQ:Other), (bb:Other):$dst) - Complexity = 18
    1610             :                         // Dst: (BBIT0 (INSERT_SUBREG:i64 (IMPLICIT_DEF:i64), i32:i32:$lhs, sub_32:i32), (Log2LO:i64 (imm:i32)<<P:Predicate_PowerOf2LO_i32>>:$mask), (bb:Other):$dst)
    1611             : /*2926*/              /*Scope*/ 46, /*->2973*/
    1612             : /*2927*/                OPC_CheckCondCode, ISD::SETNE,
    1613             : /*2929*/                OPC_MoveParent,
    1614             : /*2930*/                OPC_CheckType, MVT::i32,
    1615             : /*2932*/                OPC_MoveParent,
    1616             : /*2933*/                OPC_RecordChild2, // #3 = $dst
    1617             : /*2934*/                OPC_MoveChild2,
    1618             : /*2935*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1619             : /*2938*/                OPC_MoveParent,
    1620             : /*2939*/                OPC_CheckPatternPredicate, 29, // (Subtarget->hasCnMips()) && (Subtarget->hasMips64()) && (Subtarget->hasStandardEncoding())
    1621             : /*2941*/                OPC_EmitMergeInputChains1_0,
    1622             : /*2942*/                OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0,
    1623             :                             MVT::i64, 0/*#Ops*/,  // Results = #4
    1624             : /*2948*/                OPC_EmitInteger, MVT::i32, Mips::sub_32,
    1625             : /*2951*/                OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0,
    1626             :                             MVT::i64, 3/*#Ops*/, 4, 1, 5,  // Results = #6
    1627             : /*2960*/                OPC_EmitConvertToTarget, 2,
    1628             : /*2962*/                OPC_EmitNodeXForm, 0, 7, // Log2LO
    1629             : /*2965*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BBIT1), 0|OPFL_Chain,
    1630             :                             3/*#Ops*/, 6, 8, 3, 
    1631             :                         // Src: (brcond (setcc:i32 (and:i32 i32:i32:$lhs, (imm:i32)<<P:Predicate_PowerOf2LO_i32>>:$mask), 0:i32, SETNE:Other), (bb:Other):$dst) - Complexity = 18
    1632             :                         // Dst: (BBIT1 (INSERT_SUBREG:i64 (IMPLICIT_DEF:i64), i32:i32:$lhs, sub_32:i32), (Log2LO:i64 (imm:i32)<<P:Predicate_PowerOf2LO_i32>>:$mask), (bb:Other):$dst)
    1633             : /*2973*/              0, /*End of Scope*/
    1634             : /*2974*/            0, /*End of Scope*/
    1635             : /*2975*/          0, /*End of Scope*/
    1636             : /*2976*/        /*Scope*/ 33|128,16/*2081*/, /*->5059*/
    1637             : /*2978*/          OPC_RecordChild0, // #1 = $rs
    1638             : /*2979*/          OPC_Scope, 72|128,11/*1480*/, /*->4462*/ // 2 children in Scope
    1639             : /*2982*/            OPC_CheckChild0Type, MVT::i32,
    1640             : /*2984*/            OPC_Scope, 6|128,3/*390*/, /*->3377*/ // 4 children in Scope
    1641             : /*2987*/              OPC_CheckChild1Integer, 0, 
    1642             : /*2989*/              OPC_MoveChild2,
    1643             : /*2990*/              OPC_Scope, 36, /*->3028*/ // 13 children in Scope
    1644             : /*2992*/                OPC_CheckCondCode, ISD::SETGE,
    1645             : /*2994*/                OPC_MoveParent,
    1646             : /*2995*/                OPC_CheckType, MVT::i32,
    1647             : /*2997*/                OPC_MoveParent,
    1648             : /*2998*/                OPC_RecordChild2, // #2 = $offset
    1649             : /*2999*/                OPC_MoveChild2,
    1650             : /*3000*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1651             : /*3003*/                OPC_MoveParent,
    1652             : /*3004*/                OPC_Scope, 10, /*->3016*/ // 2 children in Scope
    1653             : /*3006*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    1654             : /*3008*/                  OPC_EmitMergeInputChains1_0,
    1655             : /*3009*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BGEZ), 0|OPFL_Chain,
    1656             :                               2/*#Ops*/, 1, 2, 
    1657             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETGE:Other), (bb:Other):$offset) - Complexity = 11
    1658             :                           // Dst: (BGEZ GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1659             : /*3016*/                /*Scope*/ 10, /*->3027*/
    1660             : /*3017*/                  OPC_CheckPatternPredicate, 30, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    1661             : /*3019*/                  OPC_EmitMergeInputChains1_0,
    1662             : /*3020*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BGEZL), 0|OPFL_Chain,
    1663             :                               2/*#Ops*/, 1, 2, 
    1664             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETGE:Other), (bb:Other):$offset) - Complexity = 11
    1665             :                           // Dst: (BGEZL GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1666             : /*3027*/                0, /*End of Scope*/
    1667             : /*3028*/              /*Scope*/ 36, /*->3065*/
    1668             : /*3029*/                OPC_CheckCondCode, ISD::SETGT,
    1669             : /*3031*/                OPC_MoveParent,
    1670             : /*3032*/                OPC_CheckType, MVT::i32,
    1671             : /*3034*/                OPC_MoveParent,
    1672             : /*3035*/                OPC_RecordChild2, // #2 = $offset
    1673             : /*3036*/                OPC_MoveChild2,
    1674             : /*3037*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1675             : /*3040*/                OPC_MoveParent,
    1676             : /*3041*/                OPC_Scope, 10, /*->3053*/ // 2 children in Scope
    1677             : /*3043*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    1678             : /*3045*/                  OPC_EmitMergeInputChains1_0,
    1679             : /*3046*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BGTZ), 0|OPFL_Chain,
    1680             :                               2/*#Ops*/, 1, 2, 
    1681             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETGT:Other), (bb:Other):$offset) - Complexity = 11
    1682             :                           // Dst: (BGTZ GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1683             : /*3053*/                /*Scope*/ 10, /*->3064*/
    1684             : /*3054*/                  OPC_CheckPatternPredicate, 30, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    1685             : /*3056*/                  OPC_EmitMergeInputChains1_0,
    1686             : /*3057*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BGTZL), 0|OPFL_Chain,
    1687             :                               2/*#Ops*/, 1, 2, 
    1688             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETGT:Other), (bb:Other):$offset) - Complexity = 11
    1689             :                           // Dst: (BGTZL GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1690             : /*3064*/                0, /*End of Scope*/
    1691             : /*3065*/              /*Scope*/ 36, /*->3102*/
    1692             : /*3066*/                OPC_CheckCondCode, ISD::SETLE,
    1693             : /*3068*/                OPC_MoveParent,
    1694             : /*3069*/                OPC_CheckType, MVT::i32,
    1695             : /*3071*/                OPC_MoveParent,
    1696             : /*3072*/                OPC_RecordChild2, // #2 = $offset
    1697             : /*3073*/                OPC_MoveChild2,
    1698             : /*3074*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1699             : /*3077*/                OPC_MoveParent,
    1700             : /*3078*/                OPC_Scope, 10, /*->3090*/ // 2 children in Scope
    1701             : /*3080*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    1702             : /*3082*/                  OPC_EmitMergeInputChains1_0,
    1703             : /*3083*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BLEZ), 0|OPFL_Chain,
    1704             :                               2/*#Ops*/, 1, 2, 
    1705             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETLE:Other), (bb:Other):$offset) - Complexity = 11
    1706             :                           // Dst: (BLEZ GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1707             : /*3090*/                /*Scope*/ 10, /*->3101*/
    1708             : /*3091*/                  OPC_CheckPatternPredicate, 30, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    1709             : /*3093*/                  OPC_EmitMergeInputChains1_0,
    1710             : /*3094*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BLEZL), 0|OPFL_Chain,
    1711             :                               2/*#Ops*/, 1, 2, 
    1712             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETLE:Other), (bb:Other):$offset) - Complexity = 11
    1713             :                           // Dst: (BLEZL GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1714             : /*3101*/                0, /*End of Scope*/
    1715             : /*3102*/              /*Scope*/ 36, /*->3139*/
    1716             : /*3103*/                OPC_CheckCondCode, ISD::SETLT,
    1717             : /*3105*/                OPC_MoveParent,
    1718             : /*3106*/                OPC_CheckType, MVT::i32,
    1719             : /*3108*/                OPC_MoveParent,
    1720             : /*3109*/                OPC_RecordChild2, // #2 = $offset
    1721             : /*3110*/                OPC_MoveChild2,
    1722             : /*3111*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1723             : /*3114*/                OPC_MoveParent,
    1724             : /*3115*/                OPC_Scope, 10, /*->3127*/ // 2 children in Scope
    1725             : /*3117*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    1726             : /*3119*/                  OPC_EmitMergeInputChains1_0,
    1727             : /*3120*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BLTZ), 0|OPFL_Chain,
    1728             :                               2/*#Ops*/, 1, 2, 
    1729             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETLT:Other), (bb:Other):$offset) - Complexity = 11
    1730             :                           // Dst: (BLTZ GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1731             : /*3127*/                /*Scope*/ 10, /*->3138*/
    1732             : /*3128*/                  OPC_CheckPatternPredicate, 30, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    1733             : /*3130*/                  OPC_EmitMergeInputChains1_0,
    1734             : /*3131*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BLTZL), 0|OPFL_Chain,
    1735             :                               2/*#Ops*/, 1, 2, 
    1736             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETLT:Other), (bb:Other):$offset) - Complexity = 11
    1737             :                           // Dst: (BLTZL GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1738             : /*3138*/                0, /*End of Scope*/
    1739             : /*3139*/              /*Scope*/ 26, /*->3166*/
    1740             : /*3140*/                OPC_CheckCondCode, ISD::SETNE,
    1741             : /*3142*/                OPC_MoveParent,
    1742             : /*3143*/                OPC_CheckType, MVT::i32,
    1743             : /*3145*/                OPC_MoveParent,
    1744             : /*3146*/                OPC_RecordChild2, // #2 = $dst
    1745             : /*3147*/                OPC_MoveChild2,
    1746             : /*3148*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1747             : /*3151*/                OPC_MoveParent,
    1748             : /*3152*/                OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    1749             : /*3154*/                OPC_EmitMergeInputChains1_0,
    1750             : /*3155*/                OPC_EmitRegister, MVT::i32, Mips::ZERO,
    1751             : /*3158*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE), 0|OPFL_Chain,
    1752             :                             3/*#Ops*/, 1, 3, 2, 
    1753             :                         // Src: (brcond (setcc:i32 GPR32:i32:$lhs, 0:i32, SETNE:Other), (bb:Other):$dst) - Complexity = 11
    1754             :                         // Dst: (BNE GPR32:i32:$lhs, ZERO:i32, (bb:Other):$dst)
    1755             : /*3166*/              /*Scope*/ 40, /*->3207*/
    1756             : /*3167*/                OPC_CheckCondCode, ISD::SETEQ,
    1757             : /*3169*/                OPC_MoveParent,
    1758             : /*3170*/                OPC_CheckType, MVT::i32,
    1759             : /*3172*/                OPC_MoveParent,
    1760             : /*3173*/                OPC_RecordChild2, // #2 = $dst
    1761             : /*3174*/                OPC_MoveChild2,
    1762             : /*3175*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1763             : /*3178*/                OPC_MoveParent,
    1764             : /*3179*/                OPC_Scope, 14, /*->3195*/ // 2 children in Scope
    1765             : /*3181*/                  OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    1766             : /*3183*/                  OPC_EmitMergeInputChains1_0,
    1767             : /*3184*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    1768             : /*3187*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    1769             :                               3/*#Ops*/, 1, 3, 2, 
    1770             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, 0:i32, SETEQ:Other), (bb:Other):$dst) - Complexity = 11
    1771             :                           // Dst: (BEQ GPR32:i32:$lhs, ZERO:i32, (bb:Other):$dst)
    1772             : /*3195*/                /*Scope*/ 10, /*->3206*/
    1773             : /*3196*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    1774             : /*3198*/                  OPC_EmitMergeInputChains1_0,
    1775             : /*3199*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BeqzRxImm16), 0|OPFL_Chain,
    1776             :                               2/*#Ops*/, 1, 2, 
    1777             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, 0:i32, SETEQ:Other), (bb:Other):$targ16) - Complexity = 11
    1778             :                           // Dst: (BeqzRxImm16 CPU16Regs:i32:$rx, (bb:Other):$targ16)
    1779             : /*3206*/                0, /*End of Scope*/
    1780             : /*3207*/              /*Scope*/ 22, /*->3230*/
    1781             : /*3208*/                OPC_CheckCondCode, ISD::SETNE,
    1782             : /*3210*/                OPC_MoveParent,
    1783             : /*3211*/                OPC_CheckType, MVT::i32,
    1784             : /*3213*/                OPC_MoveParent,
    1785             : /*3214*/                OPC_RecordChild2, // #2 = $targ16
    1786             : /*3215*/                OPC_MoveChild2,
    1787             : /*3216*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1788             : /*3219*/                OPC_MoveParent,
    1789             : /*3220*/                OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    1790             : /*3222*/                OPC_EmitMergeInputChains1_0,
    1791             : /*3223*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BnezRxImm16), 0|OPFL_Chain,
    1792             :                             2/*#Ops*/, 1, 2, 
    1793             :                         // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, 0:i32, SETNE:Other), (bb:Other):$targ16) - Complexity = 11
    1794             :                         // Dst: (BnezRxImm16 CPU16Regs:i32:$rx, (bb:Other):$targ16)
    1795             : /*3230*/              /*Scope*/ 22, /*->3253*/
    1796             : /*3231*/                OPC_CheckCondCode, ISD::SETGE,
    1797             : /*3233*/                OPC_MoveParent,
    1798             : /*3234*/                OPC_CheckType, MVT::i32,
    1799             : /*3236*/                OPC_MoveParent,
    1800             : /*3237*/                OPC_RecordChild2, // #2 = $offset
    1801             : /*3238*/                OPC_MoveChild2,
    1802             : /*3239*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1803             : /*3242*/                OPC_MoveParent,
    1804             : /*3243*/                OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    1805             : /*3245*/                OPC_EmitMergeInputChains1_0,
    1806             : /*3246*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BGEZ_MM), 0|OPFL_Chain,
    1807             :                             2/*#Ops*/, 1, 2, 
    1808             :                         // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETGE:Other), (bb:Other):$offset) - Complexity = 11
    1809             :                         // Dst: (BGEZ_MM GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1810             : /*3253*/              /*Scope*/ 22, /*->3276*/
    1811             : /*3254*/                OPC_CheckCondCode, ISD::SETGT,
    1812             : /*3256*/                OPC_MoveParent,
    1813             : /*3257*/                OPC_CheckType, MVT::i32,
    1814             : /*3259*/                OPC_MoveParent,
    1815             : /*3260*/                OPC_RecordChild2, // #2 = $offset
    1816             : /*3261*/                OPC_MoveChild2,
    1817             : /*3262*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1818             : /*3265*/                OPC_MoveParent,
    1819             : /*3266*/                OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    1820             : /*3268*/                OPC_EmitMergeInputChains1_0,
    1821             : /*3269*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BGTZ_MM), 0|OPFL_Chain,
    1822             :                             2/*#Ops*/, 1, 2, 
    1823             :                         // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETGT:Other), (bb:Other):$offset) - Complexity = 11
    1824             :                         // Dst: (BGTZ_MM GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1825             : /*3276*/              /*Scope*/ 22, /*->3299*/
    1826             : /*3277*/                OPC_CheckCondCode, ISD::SETLE,
    1827             : /*3279*/                OPC_MoveParent,
    1828             : /*3280*/                OPC_CheckType, MVT::i32,
    1829             : /*3282*/                OPC_MoveParent,
    1830             : /*3283*/                OPC_RecordChild2, // #2 = $offset
    1831             : /*3284*/                OPC_MoveChild2,
    1832             : /*3285*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1833             : /*3288*/                OPC_MoveParent,
    1834             : /*3289*/                OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    1835             : /*3291*/                OPC_EmitMergeInputChains1_0,
    1836             : /*3292*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BLEZ_MM), 0|OPFL_Chain,
    1837             :                             2/*#Ops*/, 1, 2, 
    1838             :                         // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETLE:Other), (bb:Other):$offset) - Complexity = 11
    1839             :                         // Dst: (BLEZ_MM GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1840             : /*3299*/              /*Scope*/ 22, /*->3322*/
    1841             : /*3300*/                OPC_CheckCondCode, ISD::SETLT,
    1842             : /*3302*/                OPC_MoveParent,
    1843             : /*3303*/                OPC_CheckType, MVT::i32,
    1844             : /*3305*/                OPC_MoveParent,
    1845             : /*3306*/                OPC_RecordChild2, // #2 = $offset
    1846             : /*3307*/                OPC_MoveChild2,
    1847             : /*3308*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1848             : /*3311*/                OPC_MoveParent,
    1849             : /*3312*/                OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    1850             : /*3314*/                OPC_EmitMergeInputChains1_0,
    1851             : /*3315*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BLTZ_MM), 0|OPFL_Chain,
    1852             :                             2/*#Ops*/, 1, 2, 
    1853             :                         // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, 0:i32, SETLT:Other), (bb:Other):$offset) - Complexity = 11
    1854             :                         // Dst: (BLTZ_MM GPR32Opnd:i32:$rs, (bb:Other):$offset)
    1855             : /*3322*/              /*Scope*/ 26, /*->3349*/
    1856             : /*3323*/                OPC_CheckCondCode, ISD::SETNE,
    1857             : /*3325*/                OPC_MoveParent,
    1858             : /*3326*/                OPC_CheckType, MVT::i32,
    1859             : /*3328*/                OPC_MoveParent,
    1860             : /*3329*/                OPC_RecordChild2, // #2 = $dst
    1861             : /*3330*/                OPC_MoveChild2,
    1862             : /*3331*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1863             : /*3334*/                OPC_MoveParent,
    1864             : /*3335*/                OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    1865             : /*3337*/                OPC_EmitMergeInputChains1_0,
    1866             : /*3338*/                OPC_EmitRegister, MVT::i32, Mips::ZERO,
    1867             : /*3341*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE_MM), 0|OPFL_Chain,
    1868             :                             3/*#Ops*/, 1, 3, 2, 
    1869             :                         // Src: (brcond (setcc:i32 GPR32:i32:$lhs, 0:i32, SETNE:Other), (bb:Other):$dst) - Complexity = 11
    1870             :                         // Dst: (BNE_MM GPR32:i32:$lhs, ZERO:i32, (bb:Other):$dst)
    1871             : /*3349*/              /*Scope*/ 26, /*->3376*/
    1872             : /*3350*/                OPC_CheckCondCode, ISD::SETEQ,
    1873             : /*3352*/                OPC_MoveParent,
    1874             : /*3353*/                OPC_CheckType, MVT::i32,
    1875             : /*3355*/                OPC_MoveParent,
    1876             : /*3356*/                OPC_RecordChild2, // #2 = $dst
    1877             : /*3357*/                OPC_MoveChild2,
    1878             : /*3358*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1879             : /*3361*/                OPC_MoveParent,
    1880             : /*3362*/                OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    1881             : /*3364*/                OPC_EmitMergeInputChains1_0,
    1882             : /*3365*/                OPC_EmitRegister, MVT::i32, Mips::ZERO,
    1883             : /*3368*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    1884             :                             3/*#Ops*/, 1, 3, 2, 
    1885             :                         // Src: (brcond (setcc:i32 GPR32:i32:$lhs, 0:i32, SETEQ:Other), (bb:Other):$dst) - Complexity = 11
    1886             :                         // Dst: (BEQ_MM GPR32:i32:$lhs, ZERO:i32, (bb:Other):$dst)
    1887             : /*3376*/              0, /*End of Scope*/
    1888             : /*3377*/            /*Scope*/ 25, /*->3403*/
    1889             : /*3378*/              OPC_CheckChild1Integer, 1, 
    1890             : /*3380*/              OPC_MoveChild2,
    1891             : /*3381*/              OPC_CheckCondCode, ISD::SETLT,
    1892             : /*3383*/              OPC_MoveParent,
    1893             : /*3384*/              OPC_CheckType, MVT::i32,
    1894             : /*3386*/              OPC_MoveParent,
    1895             : /*3387*/              OPC_RecordChild2, // #2 = $dst
    1896             : /*3388*/              OPC_MoveChild2,
    1897             : /*3389*/              OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1898             : /*3392*/              OPC_MoveParent,
    1899             : /*3393*/              OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    1900             : /*3395*/              OPC_EmitMergeInputChains1_0,
    1901             : /*3396*/              OPC_MorphNodeTo0, TARGET_VAL(Mips::BLEZ), 0|OPFL_Chain,
    1902             :                           2/*#Ops*/, 1, 2, 
    1903             :                       // Src: (brcond (setcc:i32 i32:i32:$lhs, 1:i32, SETLT:Other), (bb:Other):$dst) - Complexity = 11
    1904             :                       // Dst: (BLEZ i32:i32:$lhs, (bb:Other):$dst)
    1905             : /*3403*/            /*Scope*/ 34, /*->3438*/
    1906             : /*3404*/              OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    1907             : /*3415*/              OPC_MoveChild2,
    1908             : /*3416*/              OPC_CheckCondCode, ISD::SETGT,
    1909             : /*3418*/              OPC_MoveParent,
    1910             : /*3419*/              OPC_CheckType, MVT::i32,
    1911             : /*3421*/              OPC_MoveParent,
    1912             : /*3422*/              OPC_RecordChild2, // #2 = $dst
    1913             : /*3423*/              OPC_MoveChild2,
    1914             : /*3424*/              OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1915             : /*3427*/              OPC_MoveParent,
    1916             : /*3428*/              OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    1917             : /*3430*/              OPC_EmitMergeInputChains1_0,
    1918             : /*3431*/              OPC_MorphNodeTo0, TARGET_VAL(Mips::BGEZ), 0|OPFL_Chain,
    1919             :                           2/*#Ops*/, 1, 2, 
    1920             :                       // Src: (brcond (setcc:i32 i32:i32:$lhs, -1:i32, SETGT:Other), (bb:Other):$dst) - Complexity = 11
    1921             :                       // Dst: (BGEZ i32:i32:$lhs, (bb:Other):$dst)
    1922             : /*3438*/            /*Scope*/ 125|128,7/*1021*/, /*->4461*/
    1923             : /*3440*/              OPC_RecordChild1, // #2 = $rhs
    1924             : /*3441*/              OPC_Scope, 77|128,3/*461*/, /*->3905*/ // 2 children in Scope
    1925             : /*3444*/                OPC_MoveChild1,
    1926             : /*3445*/                OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    1927             : /*3448*/                OPC_Scope, 80, /*->3530*/ // 7 children in Scope
    1928             : /*3450*/                  OPC_CheckPredicate, 19, // Predicate_immSExt16
    1929             : /*3452*/                  OPC_MoveParent,
    1930             : /*3453*/                  OPC_MoveChild2,
    1931             : /*3454*/                  OPC_Scope, 36, /*->3492*/ // 2 children in Scope
    1932             : /*3456*/                    OPC_CheckCondCode, ISD::SETGE,
    1933             : /*3458*/                    OPC_MoveParent,
    1934             : /*3459*/                    OPC_CheckType, MVT::i32,
    1935             : /*3461*/                    OPC_MoveParent,
    1936             : /*3462*/                    OPC_RecordChild2, // #3 = $dst
    1937             : /*3463*/                    OPC_MoveChild2,
    1938             : /*3464*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1939             : /*3467*/                    OPC_MoveParent,
    1940             : /*3468*/                    OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    1941             : /*3470*/                    OPC_EmitMergeInputChains1_0,
    1942             : /*3471*/                    OPC_EmitConvertToTarget, 2,
    1943             : /*3473*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    1944             :                                 MVT::i32, 2/*#Ops*/, 1, 4,  // Results = #5
    1945             : /*3481*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    1946             : /*3484*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    1947             :                                 3/*#Ops*/, 5, 6, 3, 
    1948             :                             // Src: (brcond (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), (bb:Other):$dst) - Complexity = 10
    1949             :                             // Dst: (BEQ (SLTi:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), ZERO:i32, (bb:Other):$dst)
    1950             : /*3492*/                  /*Scope*/ 36, /*->3529*/
    1951             : /*3493*/                    OPC_CheckCondCode, ISD::SETUGE,
    1952             : /*3495*/                    OPC_MoveParent,
    1953             : /*3496*/                    OPC_CheckType, MVT::i32,
    1954             : /*3498*/                    OPC_MoveParent,
    1955             : /*3499*/                    OPC_RecordChild2, // #3 = $dst
    1956             : /*3500*/                    OPC_MoveChild2,
    1957             : /*3501*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1958             : /*3504*/                    OPC_MoveParent,
    1959             : /*3505*/                    OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    1960             : /*3507*/                    OPC_EmitMergeInputChains1_0,
    1961             : /*3508*/                    OPC_EmitConvertToTarget, 2,
    1962             : /*3510*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    1963             :                                 MVT::i32, 2/*#Ops*/, 1, 4,  // Results = #5
    1964             : /*3518*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    1965             : /*3521*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    1966             :                                 3/*#Ops*/, 5, 6, 3, 
    1967             :                             // Src: (brcond (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETUGE:Other), (bb:Other):$dst) - Complexity = 10
    1968             :                             // Dst: (BEQ (SLTiu:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), ZERO:i32, (bb:Other):$dst)
    1969             : /*3529*/                  0, /*End of Scope*/
    1970             : /*3530*/                /*Scope*/ 86, /*->3617*/
    1971             : /*3531*/                  OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    1972             : /*3533*/                  OPC_MoveParent,
    1973             : /*3534*/                  OPC_MoveChild2,
    1974             : /*3535*/                  OPC_Scope, 39, /*->3576*/ // 2 children in Scope
    1975             : /*3537*/                    OPC_CheckCondCode, ISD::SETGT,
    1976             : /*3539*/                    OPC_MoveParent,
    1977             : /*3540*/                    OPC_CheckType, MVT::i32,
    1978             : /*3542*/                    OPC_MoveParent,
    1979             : /*3543*/                    OPC_RecordChild2, // #3 = $dst
    1980             : /*3544*/                    OPC_MoveChild2,
    1981             : /*3545*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    1982             : /*3548*/                    OPC_MoveParent,
    1983             : /*3549*/                    OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    1984             : /*3551*/                    OPC_EmitMergeInputChains1_0,
    1985             : /*3552*/                    OPC_EmitConvertToTarget, 2,
    1986             : /*3554*/                    OPC_EmitNodeXForm, 2, 4, // Plus1
    1987             : /*3557*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    1988             :                                 MVT::i32, 2/*#Ops*/, 1, 5,  // Results = #6
    1989             : /*3565*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    1990             : /*3568*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    1991             :                                 3/*#Ops*/, 6, 7, 3, 
    1992             :                             // Src: (brcond (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), (bb:Other):$dst) - Complexity = 10
    1993             :                             // Dst: (BEQ (SLTi:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), ZERO:i32, (bb:Other):$dst)
    1994             : /*3576*/                  /*Scope*/ 39, /*->3616*/
    1995             : /*3577*/                    OPC_CheckCondCode, ISD::SETUGT,
    1996             : /*3579*/                    OPC_MoveParent,
    1997             : /*3580*/                    OPC_CheckType, MVT::i32,
    1998             : /*3582*/                    OPC_MoveParent,
    1999             : /*3583*/                    OPC_RecordChild2, // #3 = $dst
    2000             : /*3584*/                    OPC_MoveChild2,
    2001             : /*3585*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2002             : /*3588*/                    OPC_MoveParent,
    2003             : /*3589*/                    OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2004             : /*3591*/                    OPC_EmitMergeInputChains1_0,
    2005             : /*3592*/                    OPC_EmitConvertToTarget, 2,
    2006             : /*3594*/                    OPC_EmitNodeXForm, 2, 4, // Plus1
    2007             : /*3597*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    2008             :                                 MVT::i32, 2/*#Ops*/, 1, 5,  // Results = #6
    2009             : /*3605*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2010             : /*3608*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2011             :                                 3/*#Ops*/, 6, 7, 3, 
    2012             :                             // Src: (brcond (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), (bb:Other):$dst) - Complexity = 10
    2013             :                             // Dst: (BEQ (SLTiu:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), ZERO:i32, (bb:Other):$dst)
    2014             : /*3616*/                  0, /*End of Scope*/
    2015             : /*3617*/                /*Scope*/ 80, /*->3698*/
    2016             : /*3618*/                  OPC_CheckPredicate, 19, // Predicate_immSExt16
    2017             : /*3620*/                  OPC_MoveParent,
    2018             : /*3621*/                  OPC_MoveChild2,
    2019             : /*3622*/                  OPC_Scope, 36, /*->3660*/ // 2 children in Scope
    2020             : /*3624*/                    OPC_CheckCondCode, ISD::SETGE,
    2021             : /*3626*/                    OPC_MoveParent,
    2022             : /*3627*/                    OPC_CheckType, MVT::i32,
    2023             : /*3629*/                    OPC_MoveParent,
    2024             : /*3630*/                    OPC_RecordChild2, // #3 = $dst
    2025             : /*3631*/                    OPC_MoveChild2,
    2026             : /*3632*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2027             : /*3635*/                    OPC_MoveParent,
    2028             : /*3636*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2029             : /*3638*/                    OPC_EmitMergeInputChains1_0,
    2030             : /*3639*/                    OPC_EmitConvertToTarget, 2,
    2031             : /*3641*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTi_MM), 0,
    2032             :                                 MVT::i32, 2/*#Ops*/, 1, 4,  // Results = #5
    2033             : /*3649*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2034             : /*3652*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2035             :                                 3/*#Ops*/, 5, 6, 3, 
    2036             :                             // Src: (brcond (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), (bb:Other):$dst) - Complexity = 10
    2037             :                             // Dst: (BEQ_MM (SLTi_MM:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), ZERO:i32, (bb:Other):$dst)
    2038             : /*3660*/                  /*Scope*/ 36, /*->3697*/
    2039             : /*3661*/                    OPC_CheckCondCode, ISD::SETUGE,
    2040             : /*3663*/                    OPC_MoveParent,
    2041             : /*3664*/                    OPC_CheckType, MVT::i32,
    2042             : /*3666*/                    OPC_MoveParent,
    2043             : /*3667*/                    OPC_RecordChild2, // #3 = $dst
    2044             : /*3668*/                    OPC_MoveChild2,
    2045             : /*3669*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2046             : /*3672*/                    OPC_MoveParent,
    2047             : /*3673*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2048             : /*3675*/                    OPC_EmitMergeInputChains1_0,
    2049             : /*3676*/                    OPC_EmitConvertToTarget, 2,
    2050             : /*3678*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTiu_MM), 0,
    2051             :                                 MVT::i32, 2/*#Ops*/, 1, 4,  // Results = #5
    2052             : /*3686*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2053             : /*3689*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2054             :                                 3/*#Ops*/, 5, 6, 3, 
    2055             :                             // Src: (brcond (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETUGE:Other), (bb:Other):$dst) - Complexity = 10
    2056             :                             // Dst: (BEQ_MM (SLTiu_MM:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), ZERO:i32, (bb:Other):$dst)
    2057             : /*3697*/                  0, /*End of Scope*/
    2058             : /*3698*/                /*Scope*/ 86, /*->3785*/
    2059             : /*3699*/                  OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    2060             : /*3701*/                  OPC_MoveParent,
    2061             : /*3702*/                  OPC_MoveChild2,
    2062             : /*3703*/                  OPC_Scope, 39, /*->3744*/ // 2 children in Scope
    2063             : /*3705*/                    OPC_CheckCondCode, ISD::SETGT,
    2064             : /*3707*/                    OPC_MoveParent,
    2065             : /*3708*/                    OPC_CheckType, MVT::i32,
    2066             : /*3710*/                    OPC_MoveParent,
    2067             : /*3711*/                    OPC_RecordChild2, // #3 = $dst
    2068             : /*3712*/                    OPC_MoveChild2,
    2069             : /*3713*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2070             : /*3716*/                    OPC_MoveParent,
    2071             : /*3717*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2072             : /*3719*/                    OPC_EmitMergeInputChains1_0,
    2073             : /*3720*/                    OPC_EmitConvertToTarget, 2,
    2074             : /*3722*/                    OPC_EmitNodeXForm, 2, 4, // Plus1
    2075             : /*3725*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTi_MM), 0,
    2076             :                                 MVT::i32, 2/*#Ops*/, 1, 5,  // Results = #6
    2077             : /*3733*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2078             : /*3736*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2079             :                                 3/*#Ops*/, 6, 7, 3, 
    2080             :                             // Src: (brcond (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), (bb:Other):$dst) - Complexity = 10
    2081             :                             // Dst: (BEQ_MM (SLTi_MM:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), ZERO:i32, (bb:Other):$dst)
    2082             : /*3744*/                  /*Scope*/ 39, /*->3784*/
    2083             : /*3745*/                    OPC_CheckCondCode, ISD::SETUGT,
    2084             : /*3747*/                    OPC_MoveParent,
    2085             : /*3748*/                    OPC_CheckType, MVT::i32,
    2086             : /*3750*/                    OPC_MoveParent,
    2087             : /*3751*/                    OPC_RecordChild2, // #3 = $dst
    2088             : /*3752*/                    OPC_MoveChild2,
    2089             : /*3753*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2090             : /*3756*/                    OPC_MoveParent,
    2091             : /*3757*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2092             : /*3759*/                    OPC_EmitMergeInputChains1_0,
    2093             : /*3760*/                    OPC_EmitConvertToTarget, 2,
    2094             : /*3762*/                    OPC_EmitNodeXForm, 2, 4, // Plus1
    2095             : /*3765*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTiu_MM), 0,
    2096             :                                 MVT::i32, 2/*#Ops*/, 1, 5,  // Results = #6
    2097             : /*3773*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2098             : /*3776*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2099             :                                 3/*#Ops*/, 6, 7, 3, 
    2100             :                             // Src: (brcond (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), (bb:Other):$dst) - Complexity = 10
    2101             :                             // Dst: (BEQ_MM (SLTiu_MM:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), ZERO:i32, (bb:Other):$dst)
    2102             : /*3784*/                  0, /*End of Scope*/
    2103             : /*3785*/                /*Scope*/ 29, /*->3815*/
    2104             : /*3786*/                  OPC_CheckPredicate, 21, // Predicate_immZExt16
    2105             : /*3788*/                  OPC_MoveParent,
    2106             : /*3789*/                  OPC_MoveChild2,
    2107             : /*3790*/                  OPC_CheckCondCode, ISD::SETEQ,
    2108             : /*3792*/                  OPC_MoveParent,
    2109             : /*3793*/                  OPC_CheckType, MVT::i32,
    2110             : /*3795*/                  OPC_MoveParent,
    2111             : /*3796*/                  OPC_RecordChild2, // #3 = $targ16
    2112             : /*3797*/                  OPC_MoveChild2,
    2113             : /*3798*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2114             : /*3801*/                  OPC_MoveParent,
    2115             : /*3802*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2116             : /*3804*/                  OPC_EmitMergeInputChains1_0,
    2117             : /*3805*/                  OPC_EmitConvertToTarget, 2,
    2118             : /*3807*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BteqzT8CmpiX16), 0|OPFL_Chain,
    2119             :                               3/*#Ops*/, 1, 4, 3, 
    2120             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETEQ:Other), (bb:Other):$targ16) - Complexity = 10
    2121             :                           // Dst: (BteqzT8CmpiX16 CPU16Regs:i32:$rx, (imm:i32)<<P:Predicate_immSExt16>>:$imm, (bb:Other):$targ16)
    2122             : /*3815*/                /*Scope*/ 58, /*->3874*/
    2123             : /*3816*/                  OPC_CheckPredicate, 19, // Predicate_immSExt16
    2124             : /*3818*/                  OPC_MoveParent,
    2125             : /*3819*/                  OPC_MoveChild2,
    2126             : /*3820*/                  OPC_Scope, 25, /*->3847*/ // 2 children in Scope
    2127             : /*3822*/                    OPC_CheckCondCode, ISD::SETGE,
    2128             : /*3824*/                    OPC_MoveParent,
    2129             : /*3825*/                    OPC_CheckType, MVT::i32,
    2130             : /*3827*/                    OPC_MoveParent,
    2131             : /*3828*/                    OPC_RecordChild2, // #3 = $imm16
    2132             : /*3829*/                    OPC_MoveChild2,
    2133             : /*3830*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2134             : /*3833*/                    OPC_MoveParent,
    2135             : /*3834*/                    OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2136             : /*3836*/                    OPC_EmitMergeInputChains1_0,
    2137             : /*3837*/                    OPC_EmitConvertToTarget, 2,
    2138             : /*3839*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BteqzT8SltiX16), 0|OPFL_Chain,
    2139             :                                 3/*#Ops*/, 1, 4, 3, 
    2140             :                             // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, (imm:i32)<<P:Predicate_immSExt16>>:$imm, SETGE:Other), (bb:Other):$imm16) - Complexity = 10
    2141             :                             // Dst: (BteqzT8SltiX16 CPU16Regs:i32:$rx, (imm:i32)<<P:Predicate_immSExt16>>:$imm, (bb:Other):$imm16)
    2142             : /*3847*/                  /*Scope*/ 25, /*->3873*/
    2143             : /*3848*/                    OPC_CheckCondCode, ISD::SETLT,
    2144             : /*3850*/                    OPC_MoveParent,
    2145             : /*3851*/                    OPC_CheckType, MVT::i32,
    2146             : /*3853*/                    OPC_MoveParent,
    2147             : /*3854*/                    OPC_RecordChild2, // #3 = $imm16
    2148             : /*3855*/                    OPC_MoveChild2,
    2149             : /*3856*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2150             : /*3859*/                    OPC_MoveParent,
    2151             : /*3860*/                    OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2152             : /*3862*/                    OPC_EmitMergeInputChains1_0,
    2153             : /*3863*/                    OPC_EmitConvertToTarget, 2,
    2154             : /*3865*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BtnezT8SltiX16), 0|OPFL_Chain,
    2155             :                                 3/*#Ops*/, 1, 4, 3, 
    2156             :                             // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, (imm:i32)<<P:Predicate_immSExt16>>:$imm, SETLT:Other), (bb:Other):$imm16) - Complexity = 10
    2157             :                             // Dst: (BtnezT8SltiX16 CPU16Regs:i32:$rx, (imm:i32)<<P:Predicate_immSExt16>>:$imm, (bb:Other):$imm16)
    2158             : /*3873*/                  0, /*End of Scope*/
    2159             : /*3874*/                /*Scope*/ 29, /*->3904*/
    2160             : /*3875*/                  OPC_CheckPredicate, 21, // Predicate_immZExt16
    2161             : /*3877*/                  OPC_MoveParent,
    2162             : /*3878*/                  OPC_MoveChild2,
    2163             : /*3879*/                  OPC_CheckCondCode, ISD::SETNE,
    2164             : /*3881*/                  OPC_MoveParent,
    2165             : /*3882*/                  OPC_CheckType, MVT::i32,
    2166             : /*3884*/                  OPC_MoveParent,
    2167             : /*3885*/                  OPC_RecordChild2, // #3 = $targ16
    2168             : /*3886*/                  OPC_MoveChild2,
    2169             : /*3887*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2170             : /*3890*/                  OPC_MoveParent,
    2171             : /*3891*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2172             : /*3893*/                  OPC_EmitMergeInputChains1_0,
    2173             : /*3894*/                  OPC_EmitConvertToTarget, 2,
    2174             : /*3896*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BtnezT8CmpiX16), 0|OPFL_Chain,
    2175             :                               3/*#Ops*/, 1, 4, 3, 
    2176             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETNE:Other), (bb:Other):$targ16) - Complexity = 10
    2177             :                           // Dst: (BtnezT8CmpiX16 CPU16Regs:i32:$rx, (imm:i32)<<P:Predicate_immSExt16>>:$imm, (bb:Other):$targ16)
    2178             : /*3904*/                0, /*End of Scope*/
    2179             : /*3905*/              /*Scope*/ 41|128,4/*553*/, /*->4460*/
    2180             : /*3907*/                OPC_MoveChild2,
    2181             : /*3908*/                OPC_Scope, 38, /*->3948*/ // 18 children in Scope
    2182             : /*3910*/                  OPC_CheckCondCode, ISD::SETEQ,
    2183             : /*3912*/                  OPC_MoveParent,
    2184             : /*3913*/                  OPC_CheckType, MVT::i32,
    2185             : /*3915*/                  OPC_MoveParent,
    2186             : /*3916*/                  OPC_RecordChild2, // #3 = $offset
    2187             : /*3917*/                  OPC_MoveChild2,
    2188             : /*3918*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2189             : /*3921*/                  OPC_MoveParent,
    2190             : /*3922*/                  OPC_Scope, 11, /*->3935*/ // 2 children in Scope
    2191             : /*3924*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2192             : /*3926*/                    OPC_EmitMergeInputChains1_0,
    2193             : /*3927*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2194             :                                 3/*#Ops*/, 1, 2, 3, 
    2195             :                             // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, SETEQ:Other), (bb:Other):$offset) - Complexity = 6
    2196             :                             // Dst: (BEQ GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, (bb:Other):$offset)
    2197             : /*3935*/                  /*Scope*/ 11, /*->3947*/
    2198             : /*3936*/                    OPC_CheckPatternPredicate, 30, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    2199             : /*3938*/                    OPC_EmitMergeInputChains1_0,
    2200             : /*3939*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQL), 0|OPFL_Chain,
    2201             :                                 3/*#Ops*/, 1, 2, 3, 
    2202             :                             // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, SETEQ:Other), (bb:Other):$offset) - Complexity = 6
    2203             :                             // Dst: (BEQL GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, (bb:Other):$offset)
    2204             : /*3947*/                  0, /*End of Scope*/
    2205             : /*3948*/                /*Scope*/ 38, /*->3987*/
    2206             : /*3949*/                  OPC_CheckCondCode, ISD::SETNE,
    2207             : /*3951*/                  OPC_MoveParent,
    2208             : /*3952*/                  OPC_CheckType, MVT::i32,
    2209             : /*3954*/                  OPC_MoveParent,
    2210             : /*3955*/                  OPC_RecordChild2, // #3 = $offset
    2211             : /*3956*/                  OPC_MoveChild2,
    2212             : /*3957*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2213             : /*3960*/                  OPC_MoveParent,
    2214             : /*3961*/                  OPC_Scope, 11, /*->3974*/ // 2 children in Scope
    2215             : /*3963*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2216             : /*3965*/                    OPC_EmitMergeInputChains1_0,
    2217             : /*3966*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE), 0|OPFL_Chain,
    2218             :                                 3/*#Ops*/, 1, 2, 3, 
    2219             :                             // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, SETNE:Other), (bb:Other):$offset) - Complexity = 6
    2220             :                             // Dst: (BNE GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, (bb:Other):$offset)
    2221             : /*3974*/                  /*Scope*/ 11, /*->3986*/
    2222             : /*3975*/                    OPC_CheckPatternPredicate, 30, // (Subtarget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    2223             : /*3977*/                    OPC_EmitMergeInputChains1_0,
    2224             : /*3978*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BNEL), 0|OPFL_Chain,
    2225             :                                 3/*#Ops*/, 1, 2, 3, 
    2226             :                             // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, SETNE:Other), (bb:Other):$offset) - Complexity = 6
    2227             :                             // Dst: (BNEL GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, (bb:Other):$offset)
    2228             : /*3986*/                  0, /*End of Scope*/
    2229             : /*3987*/                /*Scope*/ 23, /*->4011*/
    2230             : /*3988*/                  OPC_CheckCondCode, ISD::SETEQ,
    2231             : /*3990*/                  OPC_MoveParent,
    2232             : /*3991*/                  OPC_CheckType, MVT::i32,
    2233             : /*3993*/                  OPC_MoveParent,
    2234             : /*3994*/                  OPC_RecordChild2, // #3 = $offset
    2235             : /*3995*/                  OPC_MoveChild2,
    2236             : /*3996*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2237             : /*3999*/                  OPC_MoveParent,
    2238             : /*4000*/                  OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    2239             : /*4002*/                  OPC_EmitMergeInputChains1_0,
    2240             : /*4003*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2241             :                               3/*#Ops*/, 1, 2, 3, 
    2242             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, SETEQ:Other), (bb:Other):$offset) - Complexity = 6
    2243             :                           // Dst: (BEQ_MM GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, (bb:Other):$offset)
    2244             : /*4011*/                /*Scope*/ 23, /*->4035*/
    2245             : /*4012*/                  OPC_CheckCondCode, ISD::SETNE,
    2246             : /*4014*/                  OPC_MoveParent,
    2247             : /*4015*/                  OPC_CheckType, MVT::i32,
    2248             : /*4017*/                  OPC_MoveParent,
    2249             : /*4018*/                  OPC_RecordChild2, // #3 = $offset
    2250             : /*4019*/                  OPC_MoveChild2,
    2251             : /*4020*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2252             : /*4023*/                  OPC_MoveParent,
    2253             : /*4024*/                  OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    2254             : /*4026*/                  OPC_EmitMergeInputChains1_0,
    2255             : /*4027*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE_MM), 0|OPFL_Chain,
    2256             :                               3/*#Ops*/, 1, 2, 3, 
    2257             :                           // Src: (brcond (setcc:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, SETNE:Other), (bb:Other):$offset) - Complexity = 6
    2258             :                           // Dst: (BNE_MM GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt, (bb:Other):$offset)
    2259             : /*4035*/                /*Scope*/ 34, /*->4070*/
    2260             : /*4036*/                  OPC_CheckCondCode, ISD::SETGE,
    2261             : /*4038*/                  OPC_MoveParent,
    2262             : /*4039*/                  OPC_CheckType, MVT::i32,
    2263             : /*4041*/                  OPC_MoveParent,
    2264             : /*4042*/                  OPC_RecordChild2, // #3 = $dst
    2265             : /*4043*/                  OPC_MoveChild2,
    2266             : /*4044*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2267             : /*4047*/                  OPC_MoveParent,
    2268             : /*4048*/                  OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2269             : /*4050*/                  OPC_EmitMergeInputChains1_0,
    2270             : /*4051*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    2271             :                               MVT::i32, 2/*#Ops*/, 1, 2,  // Results = #4
    2272             : /*4059*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2273             : /*4062*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2274             :                               3/*#Ops*/, 4, 5, 3, 
    2275             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETGE:Other), (bb:Other):$dst) - Complexity = 6
    2276             :                           // Dst: (BEQ (SLT:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), ZERO:i32, (bb:Other):$dst)
    2277             : /*4070*/                /*Scope*/ 34, /*->4105*/
    2278             : /*4071*/                  OPC_CheckCondCode, ISD::SETUGE,
    2279             : /*4073*/                  OPC_MoveParent,
    2280             : /*4074*/                  OPC_CheckType, MVT::i32,
    2281             : /*4076*/                  OPC_MoveParent,
    2282             : /*4077*/                  OPC_RecordChild2, // #3 = $dst
    2283             : /*4078*/                  OPC_MoveChild2,
    2284             : /*4079*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2285             : /*4082*/                  OPC_MoveParent,
    2286             : /*4083*/                  OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2287             : /*4085*/                  OPC_EmitMergeInputChains1_0,
    2288             : /*4086*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    2289             :                               MVT::i32, 2/*#Ops*/, 1, 2,  // Results = #4
    2290             : /*4094*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2291             : /*4097*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2292             :                               3/*#Ops*/, 4, 5, 3, 
    2293             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETUGE:Other), (bb:Other):$dst) - Complexity = 6
    2294             :                           // Dst: (BEQ (SLTu:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), ZERO:i32, (bb:Other):$dst)
    2295             : /*4105*/                /*Scope*/ 34, /*->4140*/
    2296             : /*4106*/                  OPC_CheckCondCode, ISD::SETLE,
    2297             : /*4108*/                  OPC_MoveParent,
    2298             : /*4109*/                  OPC_CheckType, MVT::i32,
    2299             : /*4111*/                  OPC_MoveParent,
    2300             : /*4112*/                  OPC_RecordChild2, // #3 = $dst
    2301             : /*4113*/                  OPC_MoveChild2,
    2302             : /*4114*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2303             : /*4117*/                  OPC_MoveParent,
    2304             : /*4118*/                  OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2305             : /*4120*/                  OPC_EmitMergeInputChains1_0,
    2306             : /*4121*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    2307             :                               MVT::i32, 2/*#Ops*/, 2, 1,  // Results = #4
    2308             : /*4129*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2309             : /*4132*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2310             :                               3/*#Ops*/, 4, 5, 3, 
    2311             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETLE:Other), (bb:Other):$dst) - Complexity = 6
    2312             :                           // Dst: (BEQ (SLT:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), ZERO:i32, (bb:Other):$dst)
    2313             : /*4140*/                /*Scope*/ 34, /*->4175*/
    2314             : /*4141*/                  OPC_CheckCondCode, ISD::SETULE,
    2315             : /*4143*/                  OPC_MoveParent,
    2316             : /*4144*/                  OPC_CheckType, MVT::i32,
    2317             : /*4146*/                  OPC_MoveParent,
    2318             : /*4147*/                  OPC_RecordChild2, // #3 = $dst
    2319             : /*4148*/                  OPC_MoveChild2,
    2320             : /*4149*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2321             : /*4152*/                  OPC_MoveParent,
    2322             : /*4153*/                  OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2323             : /*4155*/                  OPC_EmitMergeInputChains1_0,
    2324             : /*4156*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    2325             :                               MVT::i32, 2/*#Ops*/, 2, 1,  // Results = #4
    2326             : /*4164*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2327             : /*4167*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2328             :                               3/*#Ops*/, 4, 5, 3, 
    2329             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETULE:Other), (bb:Other):$dst) - Complexity = 6
    2330             :                           // Dst: (BEQ (SLTu:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), ZERO:i32, (bb:Other):$dst)
    2331             : /*4175*/                /*Scope*/ 34, /*->4210*/
    2332             : /*4176*/                  OPC_CheckCondCode, ISD::SETGE,
    2333             : /*4178*/                  OPC_MoveParent,
    2334             : /*4179*/                  OPC_CheckType, MVT::i32,
    2335             : /*4181*/                  OPC_MoveParent,
    2336             : /*4182*/                  OPC_RecordChild2, // #3 = $dst
    2337             : /*4183*/                  OPC_MoveChild2,
    2338             : /*4184*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2339             : /*4187*/                  OPC_MoveParent,
    2340             : /*4188*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2341             : /*4190*/                  OPC_EmitMergeInputChains1_0,
    2342             : /*4191*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
    2343             :                               MVT::i32, 2/*#Ops*/, 1, 2,  // Results = #4
    2344             : /*4199*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2345             : /*4202*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2346             :                               3/*#Ops*/, 4, 5, 3, 
    2347             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETGE:Other), (bb:Other):$dst) - Complexity = 6
    2348             :                           // Dst: (BEQ_MM (SLT_MM:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), ZERO:i32, (bb:Other):$dst)
    2349             : /*4210*/                /*Scope*/ 34, /*->4245*/
    2350             : /*4211*/                  OPC_CheckCondCode, ISD::SETUGE,
    2351             : /*4213*/                  OPC_MoveParent,
    2352             : /*4214*/                  OPC_CheckType, MVT::i32,
    2353             : /*4216*/                  OPC_MoveParent,
    2354             : /*4217*/                  OPC_RecordChild2, // #3 = $dst
    2355             : /*4218*/                  OPC_MoveChild2,
    2356             : /*4219*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2357             : /*4222*/                  OPC_MoveParent,
    2358             : /*4223*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2359             : /*4225*/                  OPC_EmitMergeInputChains1_0,
    2360             : /*4226*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTu_MM), 0,
    2361             :                               MVT::i32, 2/*#Ops*/, 1, 2,  // Results = #4
    2362             : /*4234*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2363             : /*4237*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2364             :                               3/*#Ops*/, 4, 5, 3, 
    2365             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETUGE:Other), (bb:Other):$dst) - Complexity = 6
    2366             :                           // Dst: (BEQ_MM (SLTu_MM:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), ZERO:i32, (bb:Other):$dst)
    2367             : /*4245*/                /*Scope*/ 34, /*->4280*/
    2368             : /*4246*/                  OPC_CheckCondCode, ISD::SETLE,
    2369             : /*4248*/                  OPC_MoveParent,
    2370             : /*4249*/                  OPC_CheckType, MVT::i32,
    2371             : /*4251*/                  OPC_MoveParent,
    2372             : /*4252*/                  OPC_RecordChild2, // #3 = $dst
    2373             : /*4253*/                  OPC_MoveChild2,
    2374             : /*4254*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2375             : /*4257*/                  OPC_MoveParent,
    2376             : /*4258*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2377             : /*4260*/                  OPC_EmitMergeInputChains1_0,
    2378             : /*4261*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
    2379             :                               MVT::i32, 2/*#Ops*/, 2, 1,  // Results = #4
    2380             : /*4269*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2381             : /*4272*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2382             :                               3/*#Ops*/, 4, 5, 3, 
    2383             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETLE:Other), (bb:Other):$dst) - Complexity = 6
    2384             :                           // Dst: (BEQ_MM (SLT_MM:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), ZERO:i32, (bb:Other):$dst)
    2385             : /*4280*/                /*Scope*/ 34, /*->4315*/
    2386             : /*4281*/                  OPC_CheckCondCode, ISD::SETULE,
    2387             : /*4283*/                  OPC_MoveParent,
    2388             : /*4284*/                  OPC_CheckType, MVT::i32,
    2389             : /*4286*/                  OPC_MoveParent,
    2390             : /*4287*/                  OPC_RecordChild2, // #3 = $dst
    2391             : /*4288*/                  OPC_MoveChild2,
    2392             : /*4289*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2393             : /*4292*/                  OPC_MoveParent,
    2394             : /*4293*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2395             : /*4295*/                  OPC_EmitMergeInputChains1_0,
    2396             : /*4296*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTu_MM), 0,
    2397             :                               MVT::i32, 2/*#Ops*/, 2, 1,  // Results = #4
    2398             : /*4304*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2399             : /*4307*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ_MM), 0|OPFL_Chain,
    2400             :                               3/*#Ops*/, 4, 5, 3, 
    2401             :                           // Src: (brcond (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETULE:Other), (bb:Other):$dst) - Complexity = 6
    2402             :                           // Dst: (BEQ_MM (SLTu_MM:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), ZERO:i32, (bb:Other):$dst)
    2403             : /*4315*/                /*Scope*/ 23, /*->4339*/
    2404             : /*4316*/                  OPC_CheckCondCode, ISD::SETEQ,
    2405             : /*4318*/                  OPC_MoveParent,
    2406             : /*4319*/                  OPC_CheckType, MVT::i32,
    2407             : /*4321*/                  OPC_MoveParent,
    2408             : /*4322*/                  OPC_RecordChild2, // #3 = $imm16
    2409             : /*4323*/                  OPC_MoveChild2,
    2410             : /*4324*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2411             : /*4327*/                  OPC_MoveParent,
    2412             : /*4328*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2413             : /*4330*/                  OPC_EmitMergeInputChains1_0,
    2414             : /*4331*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BteqzT8CmpX16), 0|OPFL_Chain,
    2415             :                               3/*#Ops*/, 1, 2, 3, 
    2416             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, SETEQ:Other), (bb:Other):$imm16) - Complexity = 6
    2417             :                           // Dst: (BteqzT8CmpX16 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, (bb:Other):$imm16)
    2418             : /*4339*/                /*Scope*/ 23, /*->4363*/
    2419             : /*4340*/                  OPC_CheckCondCode, ISD::SETGT,
    2420             : /*4342*/                  OPC_MoveParent,
    2421             : /*4343*/                  OPC_CheckType, MVT::i32,
    2422             : /*4345*/                  OPC_MoveParent,
    2423             : /*4346*/                  OPC_RecordChild2, // #3 = $imm16
    2424             : /*4347*/                  OPC_MoveChild2,
    2425             : /*4348*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2426             : /*4351*/                  OPC_MoveParent,
    2427             : /*4352*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2428             : /*4354*/                  OPC_EmitMergeInputChains1_0,
    2429             : /*4355*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BtnezT8SltX16), 0|OPFL_Chain,
    2430             :                               3/*#Ops*/, 2, 1, 3, 
    2431             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, SETGT:Other), (bb:Other):$imm16) - Complexity = 6
    2432             :                           // Dst: (BtnezT8SltX16 CPU16Regs:i32:$ry, CPU16Regs:i32:$rx, (bb:Other):$imm16)
    2433             : /*4363*/                /*Scope*/ 23, /*->4387*/
    2434             : /*4364*/                  OPC_CheckCondCode, ISD::SETGE,
    2435             : /*4366*/                  OPC_MoveParent,
    2436             : /*4367*/                  OPC_CheckType, MVT::i32,
    2437             : /*4369*/                  OPC_MoveParent,
    2438             : /*4370*/                  OPC_RecordChild2, // #3 = $imm16
    2439             : /*4371*/                  OPC_MoveChild2,
    2440             : /*4372*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2441             : /*4375*/                  OPC_MoveParent,
    2442             : /*4376*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2443             : /*4378*/                  OPC_EmitMergeInputChains1_0,
    2444             : /*4379*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BteqzT8SltX16), 0|OPFL_Chain,
    2445             :                               3/*#Ops*/, 1, 2, 3, 
    2446             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, SETGE:Other), (bb:Other):$imm16) - Complexity = 6
    2447             :                           // Dst: (BteqzT8SltX16 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, (bb:Other):$imm16)
    2448             : /*4387*/                /*Scope*/ 23, /*->4411*/
    2449             : /*4388*/                  OPC_CheckCondCode, ISD::SETLT,
    2450             : /*4390*/                  OPC_MoveParent,
    2451             : /*4391*/                  OPC_CheckType, MVT::i32,
    2452             : /*4393*/                  OPC_MoveParent,
    2453             : /*4394*/                  OPC_RecordChild2, // #3 = $imm16
    2454             : /*4395*/                  OPC_MoveChild2,
    2455             : /*4396*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2456             : /*4399*/                  OPC_MoveParent,
    2457             : /*4400*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2458             : /*4402*/                  OPC_EmitMergeInputChains1_0,
    2459             : /*4403*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BtnezT8SltX16), 0|OPFL_Chain,
    2460             :                               3/*#Ops*/, 1, 2, 3, 
    2461             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, SETLT:Other), (bb:Other):$imm16) - Complexity = 6
    2462             :                           // Dst: (BtnezT8SltX16 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, (bb:Other):$imm16)
    2463             : /*4411*/                /*Scope*/ 23, /*->4435*/
    2464             : /*4412*/                  OPC_CheckCondCode, ISD::SETLE,
    2465             : /*4414*/                  OPC_MoveParent,
    2466             : /*4415*/                  OPC_CheckType, MVT::i32,
    2467             : /*4417*/                  OPC_MoveParent,
    2468             : /*4418*/                  OPC_RecordChild2, // #3 = $imm16
    2469             : /*4419*/                  OPC_MoveChild2,
    2470             : /*4420*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2471             : /*4423*/                  OPC_MoveParent,
    2472             : /*4424*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2473             : /*4426*/                  OPC_EmitMergeInputChains1_0,
    2474             : /*4427*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BteqzT8SltX16), 0|OPFL_Chain,
    2475             :                               3/*#Ops*/, 2, 1, 3, 
    2476             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, SETLE:Other), (bb:Other):$imm16) - Complexity = 6
    2477             :                           // Dst: (BteqzT8SltX16 CPU16Regs:i32:$ry, CPU16Regs:i32:$rx, (bb:Other):$imm16)
    2478             : /*4435*/                /*Scope*/ 23, /*->4459*/
    2479             : /*4436*/                  OPC_CheckCondCode, ISD::SETNE,
    2480             : /*4438*/                  OPC_MoveParent,
    2481             : /*4439*/                  OPC_CheckType, MVT::i32,
    2482             : /*4441*/                  OPC_MoveParent,
    2483             : /*4442*/                  OPC_RecordChild2, // #3 = $imm16
    2484             : /*4443*/                  OPC_MoveChild2,
    2485             : /*4444*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2486             : /*4447*/                  OPC_MoveParent,
    2487             : /*4448*/                  OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2488             : /*4450*/                  OPC_EmitMergeInputChains1_0,
    2489             : /*4451*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BtnezT8CmpX16), 0|OPFL_Chain,
    2490             :                               3/*#Ops*/, 1, 2, 3, 
    2491             :                           // Src: (brcond (setcc:i32 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, SETNE:Other), (bb:Other):$imm16) - Complexity = 6
    2492             :                           // Dst: (BtnezT8CmpX16 CPU16Regs:i32:$rx, CPU16Regs:i32:$ry, (bb:Other):$imm16)
    2493             : /*4459*/                0, /*End of Scope*/
    2494             : /*4460*/              0, /*End of Scope*/
    2495             : /*4461*/            0, /*End of Scope*/
    2496             : /*4462*/          /*Scope*/ 82|128,4/*594*/, /*->5058*/
    2497             : /*4464*/            OPC_CheckChild0Type, MVT::i64,
    2498             : /*4466*/            OPC_Scope, 25|128,1/*153*/, /*->4622*/ // 4 children in Scope
    2499             : /*4469*/              OPC_CheckChild1Integer, 0, 
    2500             : /*4471*/              OPC_MoveChild2,
    2501             : /*4472*/              OPC_Scope, 22, /*->4496*/ // 6 children in Scope
    2502             : /*4474*/                OPC_CheckCondCode, ISD::SETGE,
    2503             : /*4476*/                OPC_MoveParent,
    2504             : /*4477*/                OPC_CheckType, MVT::i32,
    2505             : /*4479*/                OPC_MoveParent,
    2506             : /*4480*/                OPC_RecordChild2, // #2 = $offset
    2507             : /*4481*/                OPC_MoveChild2,
    2508             : /*4482*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2509             : /*4485*/                OPC_MoveParent,
    2510             : /*4486*/                OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2511             : /*4488*/                OPC_EmitMergeInputChains1_0,
    2512             : /*4489*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BGEZ64), 0|OPFL_Chain,
    2513             :                             2/*#Ops*/, 1, 2, 
    2514             :                         // Src: (brcond (setcc:i32 GPR64Opnd:i64:$rs, 0:i64, SETGE:Other), (bb:Other):$offset) - Complexity = 11
    2515             :                         // Dst: (BGEZ64 GPR64Opnd:i64:$rs, (bb:Other):$offset)
    2516             : /*4496*/              /*Scope*/ 22, /*->4519*/
    2517             : /*4497*/                OPC_CheckCondCode, ISD::SETGT,
    2518             : /*4499*/                OPC_MoveParent,
    2519             : /*4500*/                OPC_CheckType, MVT::i32,
    2520             : /*4502*/                OPC_MoveParent,
    2521             : /*4503*/                OPC_RecordChild2, // #2 = $offset
    2522             : /*4504*/                OPC_MoveChild2,
    2523             : /*4505*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2524             : /*4508*/                OPC_MoveParent,
    2525             : /*4509*/                OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2526             : /*4511*/                OPC_EmitMergeInputChains1_0,
    2527             : /*4512*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BGTZ64), 0|OPFL_Chain,
    2528             :                             2/*#Ops*/, 1, 2, 
    2529             :                         // Src: (brcond (setcc:i32 GPR64Opnd:i64:$rs, 0:i64, SETGT:Other), (bb:Other):$offset) - Complexity = 11
    2530             :                         // Dst: (BGTZ64 GPR64Opnd:i64:$rs, (bb:Other):$offset)
    2531             : /*4519*/              /*Scope*/ 22, /*->4542*/
    2532             : /*4520*/                OPC_CheckCondCode, ISD::SETLE,
    2533             : /*4522*/                OPC_MoveParent,
    2534             : /*4523*/                OPC_CheckType, MVT::i32,
    2535             : /*4525*/                OPC_MoveParent,
    2536             : /*4526*/                OPC_RecordChild2, // #2 = $offset
    2537             : /*4527*/                OPC_MoveChild2,
    2538             : /*4528*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2539             : /*4531*/                OPC_MoveParent,
    2540             : /*4532*/                OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2541             : /*4534*/                OPC_EmitMergeInputChains1_0,
    2542             : /*4535*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BLEZ64), 0|OPFL_Chain,
    2543             :                             2/*#Ops*/, 1, 2, 
    2544             :                         // Src: (brcond (setcc:i32 GPR64Opnd:i64:$rs, 0:i64, SETLE:Other), (bb:Other):$offset) - Complexity = 11
    2545             :                         // Dst: (BLEZ64 GPR64Opnd:i64:$rs, (bb:Other):$offset)
    2546             : /*4542*/              /*Scope*/ 22, /*->4565*/
    2547             : /*4543*/                OPC_CheckCondCode, ISD::SETLT,
    2548             : /*4545*/                OPC_MoveParent,
    2549             : /*4546*/                OPC_CheckType, MVT::i32,
    2550             : /*4548*/                OPC_MoveParent,
    2551             : /*4549*/                OPC_RecordChild2, // #2 = $offset
    2552             : /*4550*/                OPC_MoveChild2,
    2553             : /*4551*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2554             : /*4554*/                OPC_MoveParent,
    2555             : /*4555*/                OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2556             : /*4557*/                OPC_EmitMergeInputChains1_0,
    2557             : /*4558*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BLTZ64), 0|OPFL_Chain,
    2558             :                             2/*#Ops*/, 1, 2, 
    2559             :                         // Src: (brcond (setcc:i32 GPR64Opnd:i64:$rs, 0:i64, SETLT:Other), (bb:Other):$offset) - Complexity = 11
    2560             :                         // Dst: (BLTZ64 GPR64Opnd:i64:$rs, (bb:Other):$offset)
    2561             : /*4565*/              /*Scope*/ 27, /*->4593*/
    2562             : /*4566*/                OPC_CheckCondCode, ISD::SETNE,
    2563             : /*4568*/                OPC_MoveParent,
    2564             : /*4569*/                OPC_CheckType, MVT::i32,
    2565             : /*4571*/                OPC_MoveParent,
    2566             : /*4572*/                OPC_RecordChild2, // #2 = $dst
    2567             : /*4573*/                OPC_MoveChild2,
    2568             : /*4574*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2569             : /*4577*/                OPC_MoveParent,
    2570             : /*4578*/                OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2571             : /*4580*/                OPC_EmitMergeInputChains1_0,
    2572             : /*4581*/                OPC_EmitRegister2, MVT::i64, TARGET_VAL(Mips::ZERO_64),
    2573             : /*4585*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE64), 0|OPFL_Chain,
    2574             :                             3/*#Ops*/, 1, 3, 2, 
    2575             :                         // Src: (brcond (setcc:i32 GPR64:i64:$lhs, 0:i64, SETNE:Other), (bb:Other):$dst) - Complexity = 11
    2576             :                         // Dst: (BNE64 GPR64:i64:$lhs, ZERO_64:i64, (bb:Other):$dst)
    2577             : /*4593*/              /*Scope*/ 27, /*->4621*/
    2578             : /*4594*/                OPC_CheckCondCode, ISD::SETEQ,
    2579             : /*4596*/                OPC_MoveParent,
    2580             : /*4597*/                OPC_CheckType, MVT::i32,
    2581             : /*4599*/                OPC_MoveParent,
    2582             : /*4600*/                OPC_RecordChild2, // #2 = $dst
    2583             : /*4601*/                OPC_MoveChild2,
    2584             : /*4602*/                OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2585             : /*4605*/                OPC_MoveParent,
    2586             : /*4606*/                OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2587             : /*4608*/                OPC_EmitMergeInputChains1_0,
    2588             : /*4609*/                OPC_EmitRegister2, MVT::i64, TARGET_VAL(Mips::ZERO_64),
    2589             : /*4613*/                OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ64), 0|OPFL_Chain,
    2590             :                             3/*#Ops*/, 1, 3, 2, 
    2591             :                         // Src: (brcond (setcc:i32 GPR64:i64:$lhs, 0:i64, SETEQ:Other), (bb:Other):$dst) - Complexity = 11
    2592             :                         // Dst: (BEQ64 GPR64:i64:$lhs, ZERO_64:i64, (bb:Other):$dst)
    2593             : /*4621*/              0, /*End of Scope*/
    2594             : /*4622*/            /*Scope*/ 25, /*->4648*/
    2595             : /*4623*/              OPC_CheckChild1Integer, 1, 
    2596             : /*4625*/              OPC_MoveChild2,
    2597             : /*4626*/              OPC_CheckCondCode, ISD::SETLT,
    2598             : /*4628*/              OPC_MoveParent,
    2599             : /*4629*/              OPC_CheckType, MVT::i32,
    2600             : /*4631*/              OPC_MoveParent,
    2601             : /*4632*/              OPC_RecordChild2, // #2 = $dst
    2602             : /*4633*/              OPC_MoveChild2,
    2603             : /*4634*/              OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2604             : /*4637*/              OPC_MoveParent,
    2605             : /*4638*/              OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2606             : /*4640*/              OPC_EmitMergeInputChains1_0,
    2607             : /*4641*/              OPC_MorphNodeTo0, TARGET_VAL(Mips::BLEZ64), 0|OPFL_Chain,
    2608             :                           2/*#Ops*/, 1, 2, 
    2609             :                       // Src: (brcond (setcc:i32 i64:i64:$lhs, 1:i64, SETLT:Other), (bb:Other):$dst) - Complexity = 11
    2610             :                       // Dst: (BLEZ64 i64:i64:$lhs, (bb:Other):$dst)
    2611             : /*4648*/            /*Scope*/ 34, /*->4683*/
    2612             : /*4649*/              OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, 
    2613             : /*4660*/              OPC_MoveChild2,
    2614             : /*4661*/              OPC_CheckCondCode, ISD::SETGT,
    2615             : /*4663*/              OPC_MoveParent,
    2616             : /*4664*/              OPC_CheckType, MVT::i32,
    2617             : /*4666*/              OPC_MoveParent,
    2618             : /*4667*/              OPC_RecordChild2, // #2 = $dst
    2619             : /*4668*/              OPC_MoveChild2,
    2620             : /*4669*/              OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2621             : /*4672*/              OPC_MoveParent,
    2622             : /*4673*/              OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2623             : /*4675*/              OPC_EmitMergeInputChains1_0,
    2624             : /*4676*/              OPC_MorphNodeTo0, TARGET_VAL(Mips::BGEZ64), 0|OPFL_Chain,
    2625             :                           2/*#Ops*/, 1, 2, 
    2626             :                       // Src: (brcond (setcc:i32 i64:i64:$lhs, -1:i64, SETGT:Other), (bb:Other):$dst) - Complexity = 11
    2627             :                       // Dst: (BGEZ64 i64:i64:$lhs, (bb:Other):$dst)
    2628             : /*4683*/            /*Scope*/ 116|128,2/*372*/, /*->5057*/
    2629             : /*4685*/              OPC_RecordChild1, // #2 = $rhs
    2630             : /*4686*/              OPC_Scope, 46|128,1/*174*/, /*->4863*/ // 2 children in Scope
    2631             : /*4689*/                OPC_MoveChild1,
    2632             : /*4690*/                OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2633             : /*4693*/                OPC_Scope, 80, /*->4775*/ // 2 children in Scope
    2634             : /*4695*/                  OPC_CheckPredicate, 19, // Predicate_immSExt16
    2635             : /*4697*/                  OPC_MoveParent,
    2636             : /*4698*/                  OPC_MoveChild2,
    2637             : /*4699*/                  OPC_Scope, 36, /*->4737*/ // 2 children in Scope
    2638             : /*4701*/                    OPC_CheckCondCode, ISD::SETGE,
    2639             : /*4703*/                    OPC_MoveParent,
    2640             : /*4704*/                    OPC_CheckType, MVT::i32,
    2641             : /*4706*/                    OPC_MoveParent,
    2642             : /*4707*/                    OPC_RecordChild2, // #3 = $dst
    2643             : /*4708*/                    OPC_MoveChild2,
    2644             : /*4709*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2645             : /*4712*/                    OPC_MoveParent,
    2646             : /*4713*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2647             : /*4715*/                    OPC_EmitMergeInputChains1_0,
    2648             : /*4716*/                    OPC_EmitConvertToTarget, 2,
    2649             : /*4718*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    2650             :                                 MVT::i32, 2/*#Ops*/, 1, 4,  // Results = #5
    2651             : /*4726*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2652             : /*4729*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2653             :                                 3/*#Ops*/, 5, 6, 3, 
    2654             :                             // Src: (brcond (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), (bb:Other):$dst) - Complexity = 10
    2655             :                             // Dst: (BEQ (SLTi64:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs), ZERO:i32, (bb:Other):$dst)
    2656             : /*4737*/                  /*Scope*/ 36, /*->4774*/
    2657             : /*4738*/                    OPC_CheckCondCode, ISD::SETUGE,
    2658             : /*4740*/                    OPC_MoveParent,
    2659             : /*4741*/                    OPC_CheckType, MVT::i32,
    2660             : /*4743*/                    OPC_MoveParent,
    2661             : /*4744*/                    OPC_RecordChild2, // #3 = $dst
    2662             : /*4745*/                    OPC_MoveChild2,
    2663             : /*4746*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2664             : /*4749*/                    OPC_MoveParent,
    2665             : /*4750*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2666             : /*4752*/                    OPC_EmitMergeInputChains1_0,
    2667             : /*4753*/                    OPC_EmitConvertToTarget, 2,
    2668             : /*4755*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    2669             :                                 MVT::i32, 2/*#Ops*/, 1, 4,  // Results = #5
    2670             : /*4763*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2671             : /*4766*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2672             :                                 3/*#Ops*/, 5, 6, 3, 
    2673             :                             // Src: (brcond (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs, SETUGE:Other), (bb:Other):$dst) - Complexity = 10
    2674             :                             // Dst: (BEQ (SLTiu64:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs), ZERO:i32, (bb:Other):$dst)
    2675             : /*4774*/                  0, /*End of Scope*/
    2676             : /*4775*/                /*Scope*/ 86, /*->4862*/
    2677             : /*4776*/                  OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    2678             : /*4778*/                  OPC_MoveParent,
    2679             : /*4779*/                  OPC_MoveChild2,
    2680             : /*4780*/                  OPC_Scope, 39, /*->4821*/ // 2 children in Scope
    2681             : /*4782*/                    OPC_CheckCondCode, ISD::SETGT,
    2682             : /*4784*/                    OPC_MoveParent,
    2683             : /*4785*/                    OPC_CheckType, MVT::i32,
    2684             : /*4787*/                    OPC_MoveParent,
    2685             : /*4788*/                    OPC_RecordChild2, // #3 = $dst
    2686             : /*4789*/                    OPC_MoveChild2,
    2687             : /*4790*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2688             : /*4793*/                    OPC_MoveParent,
    2689             : /*4794*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2690             : /*4796*/                    OPC_EmitMergeInputChains1_0,
    2691             : /*4797*/                    OPC_EmitConvertToTarget, 2,
    2692             : /*4799*/                    OPC_EmitNodeXForm, 2, 4, // Plus1
    2693             : /*4802*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    2694             :                                 MVT::i32, 2/*#Ops*/, 1, 5,  // Results = #6
    2695             : /*4810*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2696             : /*4813*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2697             :                                 3/*#Ops*/, 6, 7, 3, 
    2698             :                             // Src: (brcond (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), (bb:Other):$dst) - Complexity = 10
    2699             :                             // Dst: (BEQ (SLTi64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), ZERO:i32, (bb:Other):$dst)
    2700             : /*4821*/                  /*Scope*/ 39, /*->4861*/
    2701             : /*4822*/                    OPC_CheckCondCode, ISD::SETUGT,
    2702             : /*4824*/                    OPC_MoveParent,
    2703             : /*4825*/                    OPC_CheckType, MVT::i32,
    2704             : /*4827*/                    OPC_MoveParent,
    2705             : /*4828*/                    OPC_RecordChild2, // #3 = $dst
    2706             : /*4829*/                    OPC_MoveChild2,
    2707             : /*4830*/                    OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2708             : /*4833*/                    OPC_MoveParent,
    2709             : /*4834*/                    OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2710             : /*4836*/                    OPC_EmitMergeInputChains1_0,
    2711             : /*4837*/                    OPC_EmitConvertToTarget, 2,
    2712             : /*4839*/                    OPC_EmitNodeXForm, 2, 4, // Plus1
    2713             : /*4842*/                    OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    2714             :                                 MVT::i32, 2/*#Ops*/, 1, 5,  // Results = #6
    2715             : /*4850*/                    OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2716             : /*4853*/                    OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2717             :                                 3/*#Ops*/, 6, 7, 3, 
    2718             :                             // Src: (brcond (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), (bb:Other):$dst) - Complexity = 10
    2719             :                             // Dst: (BEQ (SLTiu64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), ZERO:i32, (bb:Other):$dst)
    2720             : /*4861*/                  0, /*End of Scope*/
    2721             : /*4862*/                0, /*End of Scope*/
    2722             : /*4863*/              /*Scope*/ 63|128,1/*191*/, /*->5056*/
    2723             : /*4865*/                OPC_MoveChild2,
    2724             : /*4866*/                OPC_Scope, 23, /*->4891*/ // 6 children in Scope
    2725             : /*4868*/                  OPC_CheckCondCode, ISD::SETEQ,
    2726             : /*4870*/                  OPC_MoveParent,
    2727             : /*4871*/                  OPC_CheckType, MVT::i32,
    2728             : /*4873*/                  OPC_MoveParent,
    2729             : /*4874*/                  OPC_RecordChild2, // #3 = $offset
    2730             : /*4875*/                  OPC_MoveChild2,
    2731             : /*4876*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2732             : /*4879*/                  OPC_MoveParent,
    2733             : /*4880*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2734             : /*4882*/                  OPC_EmitMergeInputChains1_0,
    2735             : /*4883*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ64), 0|OPFL_Chain,
    2736             :                               3/*#Ops*/, 1, 2, 3, 
    2737             :                           // Src: (brcond (setcc:i32 GPR64Opnd:i64:$rs, GPR64Opnd:i64:$rt, SETEQ:Other), (bb:Other):$offset) - Complexity = 6
    2738             :                           // Dst: (BEQ64 GPR64Opnd:i64:$rs, GPR64Opnd:i64:$rt, (bb:Other):$offset)
    2739             : /*4891*/                /*Scope*/ 23, /*->4915*/
    2740             : /*4892*/                  OPC_CheckCondCode, ISD::SETNE,
    2741             : /*4894*/                  OPC_MoveParent,
    2742             : /*4895*/                  OPC_CheckType, MVT::i32,
    2743             : /*4897*/                  OPC_MoveParent,
    2744             : /*4898*/                  OPC_RecordChild2, // #3 = $offset
    2745             : /*4899*/                  OPC_MoveChild2,
    2746             : /*4900*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2747             : /*4903*/                  OPC_MoveParent,
    2748             : /*4904*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2749             : /*4906*/                  OPC_EmitMergeInputChains1_0,
    2750             : /*4907*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE64), 0|OPFL_Chain,
    2751             :                               3/*#Ops*/, 1, 2, 3, 
    2752             :                           // Src: (brcond (setcc:i32 GPR64Opnd:i64:$rs, GPR64Opnd:i64:$rt, SETNE:Other), (bb:Other):$offset) - Complexity = 6
    2753             :                           // Dst: (BNE64 GPR64Opnd:i64:$rs, GPR64Opnd:i64:$rt, (bb:Other):$offset)
    2754             : /*4915*/                /*Scope*/ 34, /*->4950*/
    2755             : /*4916*/                  OPC_CheckCondCode, ISD::SETGE,
    2756             : /*4918*/                  OPC_MoveParent,
    2757             : /*4919*/                  OPC_CheckType, MVT::i32,
    2758             : /*4921*/                  OPC_MoveParent,
    2759             : /*4922*/                  OPC_RecordChild2, // #3 = $dst
    2760             : /*4923*/                  OPC_MoveChild2,
    2761             : /*4924*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2762             : /*4927*/                  OPC_MoveParent,
    2763             : /*4928*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2764             : /*4930*/                  OPC_EmitMergeInputChains1_0,
    2765             : /*4931*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    2766             :                               MVT::i32, 2/*#Ops*/, 1, 2,  // Results = #4
    2767             : /*4939*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2768             : /*4942*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2769             :                               3/*#Ops*/, 4, 5, 3, 
    2770             :                           // Src: (brcond (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETGE:Other), (bb:Other):$dst) - Complexity = 6
    2771             :                           // Dst: (BEQ (SLT64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), ZERO:i32, (bb:Other):$dst)
    2772             : /*4950*/                /*Scope*/ 34, /*->4985*/
    2773             : /*4951*/                  OPC_CheckCondCode, ISD::SETUGE,
    2774             : /*4953*/                  OPC_MoveParent,
    2775             : /*4954*/                  OPC_CheckType, MVT::i32,
    2776             : /*4956*/                  OPC_MoveParent,
    2777             : /*4957*/                  OPC_RecordChild2, // #3 = $dst
    2778             : /*4958*/                  OPC_MoveChild2,
    2779             : /*4959*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2780             : /*4962*/                  OPC_MoveParent,
    2781             : /*4963*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2782             : /*4965*/                  OPC_EmitMergeInputChains1_0,
    2783             : /*4966*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    2784             :                               MVT::i32, 2/*#Ops*/, 1, 2,  // Results = #4
    2785             : /*4974*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2786             : /*4977*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2787             :                               3/*#Ops*/, 4, 5, 3, 
    2788             :                           // Src: (brcond (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETUGE:Other), (bb:Other):$dst) - Complexity = 6
    2789             :                           // Dst: (BEQ (SLTu64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), ZERO:i32, (bb:Other):$dst)
    2790             : /*4985*/                /*Scope*/ 34, /*->5020*/
    2791             : /*4986*/                  OPC_CheckCondCode, ISD::SETLE,
    2792             : /*4988*/                  OPC_MoveParent,
    2793             : /*4989*/                  OPC_CheckType, MVT::i32,
    2794             : /*4991*/                  OPC_MoveParent,
    2795             : /*4992*/                  OPC_RecordChild2, // #3 = $dst
    2796             : /*4993*/                  OPC_MoveChild2,
    2797             : /*4994*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2798             : /*4997*/                  OPC_MoveParent,
    2799             : /*4998*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2800             : /*5000*/                  OPC_EmitMergeInputChains1_0,
    2801             : /*5001*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    2802             :                               MVT::i32, 2/*#Ops*/, 2, 1,  // Results = #4
    2803             : /*5009*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2804             : /*5012*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2805             :                               3/*#Ops*/, 4, 5, 3, 
    2806             :                           // Src: (brcond (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETLE:Other), (bb:Other):$dst) - Complexity = 6
    2807             :                           // Dst: (BEQ (SLT64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), ZERO:i32, (bb:Other):$dst)
    2808             : /*5020*/                /*Scope*/ 34, /*->5055*/
    2809             : /*5021*/                  OPC_CheckCondCode, ISD::SETULE,
    2810             : /*5023*/                  OPC_MoveParent,
    2811             : /*5024*/                  OPC_CheckType, MVT::i32,
    2812             : /*5026*/                  OPC_MoveParent,
    2813             : /*5027*/                  OPC_RecordChild2, // #3 = $dst
    2814             : /*5028*/                  OPC_MoveChild2,
    2815             : /*5029*/                  OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2816             : /*5032*/                  OPC_MoveParent,
    2817             : /*5033*/                  OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2818             : /*5035*/                  OPC_EmitMergeInputChains1_0,
    2819             : /*5036*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    2820             :                               MVT::i32, 2/*#Ops*/, 2, 1,  // Results = #4
    2821             : /*5044*/                  OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2822             : /*5047*/                  OPC_MorphNodeTo0, TARGET_VAL(Mips::BEQ), 0|OPFL_Chain,
    2823             :                               3/*#Ops*/, 4, 5, 3, 
    2824             :                           // Src: (brcond (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETULE:Other), (bb:Other):$dst) - Complexity = 6
    2825             :                           // Dst: (BEQ (SLTu64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), ZERO:i32, (bb:Other):$dst)
    2826             : /*5055*/                0, /*End of Scope*/
    2827             : /*5056*/              0, /*End of Scope*/
    2828             : /*5057*/            0, /*End of Scope*/
    2829             : /*5058*/          0, /*End of Scope*/
    2830             : /*5059*/        0, /*End of Scope*/
    2831             : /*5060*/      /*Scope*/ 79, /*->5140*/
    2832             : /*5061*/        OPC_RecordChild1, // #1 = $cond
    2833             : /*5062*/        OPC_Scope, 51, /*->5115*/ // 2 children in Scope
    2834             : /*5064*/          OPC_CheckChild1Type, MVT::i32,
    2835             : /*5066*/          OPC_RecordChild2, // #2 = $dst
    2836             : /*5067*/          OPC_MoveChild2,
    2837             : /*5068*/          OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2838             : /*5071*/          OPC_MoveParent,
    2839             : /*5072*/          OPC_Scope, 14, /*->5088*/ // 3 children in Scope
    2840             : /*5074*/            OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2841             : /*5076*/            OPC_EmitMergeInputChains1_0,
    2842             : /*5077*/            OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2843             : /*5080*/            OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE), 0|OPFL_Chain,
    2844             :                         3/*#Ops*/, 1, 3, 2, 
    2845             :                     // Src: (brcond GPR32:i32:$cond, (bb:Other):$dst) - Complexity = 3
    2846             :                     // Dst: (BNE GPR32:i32:$cond, ZERO:i32, (bb:Other):$dst)
    2847             : /*5088*/          /*Scope*/ 10, /*->5099*/
    2848             : /*5089*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    2849             : /*5091*/            OPC_EmitMergeInputChains1_0,
    2850             : /*5092*/            OPC_MorphNodeTo0, TARGET_VAL(Mips::BnezRxImm16), 0|OPFL_Chain,
    2851             :                         2/*#Ops*/, 1, 2, 
    2852             :                     // Src: (brcond CPU16Regs:i32:$rx, (bb:Other):$targ16) - Complexity = 3
    2853             :                     // Dst: (BnezRxImm16 CPU16Regs:i32:$rx, (bb:Other):$targ16)
    2854             : /*5099*/          /*Scope*/ 14, /*->5114*/
    2855             : /*5100*/            OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2856             : /*5102*/            OPC_EmitMergeInputChains1_0,
    2857             : /*5103*/            OPC_EmitRegister, MVT::i32, Mips::ZERO,
    2858             : /*5106*/            OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE_MM), 0|OPFL_Chain,
    2859             :                         3/*#Ops*/, 1, 3, 2, 
    2860             :                     // Src: (brcond GPR32:i32:$cond, (bb:Other):$dst) - Complexity = 3
    2861             :                     // Dst: (BNE_MM GPR32:i32:$cond, ZERO:i32, (bb:Other):$dst)
    2862             : /*5114*/          0, /*End of Scope*/
    2863             : /*5115*/        /*Scope*/ 23, /*->5139*/
    2864             : /*5116*/          OPC_CheckChild1Type, MVT::i64,
    2865             : /*5118*/          OPC_RecordChild2, // #2 = $dst
    2866             : /*5119*/          OPC_MoveChild2,
    2867             : /*5120*/          OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
    2868             : /*5123*/          OPC_MoveParent,
    2869             : /*5124*/          OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    2870             : /*5126*/          OPC_EmitMergeInputChains1_0,
    2871             : /*5127*/          OPC_EmitRegister2, MVT::i64, TARGET_VAL(Mips::ZERO_64),
    2872             : /*5131*/          OPC_MorphNodeTo0, TARGET_VAL(Mips::BNE64), 0|OPFL_Chain,
    2873             :                       3/*#Ops*/, 1, 3, 2, 
    2874             :                   // Src: (brcond GPR64:i64:$cond, (bb:Other):$dst) - Complexity = 3
    2875             :                   // Dst: (BNE64 GPR64:i64:$cond, ZERO_64:i64, (bb:Other):$dst)
    2876             : /*5139*/        0, /*End of Scope*/
    2877             : /*5140*/      0, /*End of Scope*/
    2878             : /*5141*/    /*SwitchOpcode*/ 3|128,49/*6275*/, TARGET_VAL(ISD::SELECT),// ->11420
    2879             : /*5145*/      OPC_Scope, 82|128,22/*2898*/, /*->8046*/ // 6 children in Scope
    2880             : /*5148*/        OPC_MoveChild0,
    2881             : /*5149*/        OPC_CheckOpcode, TARGET_VAL(ISD::SETCC),
    2882             : /*5152*/        OPC_RecordChild0, // #0 = $cond
    2883             : /*5153*/        OPC_Scope, 117|128,14/*1909*/, /*->7065*/ // 2 children in Scope
    2884             : /*5156*/          OPC_CheckChild0Type, MVT::i32,
    2885             : /*5158*/          OPC_Scope, 103|128,2/*359*/, /*->5520*/ // 7 children in Scope
    2886             : /*5161*/            OPC_MoveChild1,
    2887             : /*5162*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2888             : /*5165*/            OPC_CheckPredicate, 22, // Predicate_immz
    2889             : /*5167*/            OPC_MoveParent,
    2890             : /*5168*/            OPC_MoveChild2,
    2891             : /*5169*/            OPC_Scope, 26, /*->5197*/ // 11 children in Scope
    2892             : /*5171*/              OPC_CheckCondCode, ISD::SETEQ,
    2893             : /*5173*/              OPC_MoveParent,
    2894             : /*5174*/              OPC_CheckType, MVT::i32,
    2895             : /*5176*/              OPC_MoveParent,
    2896             : /*5177*/              OPC_RecordChild1, // #1 = $t
    2897             : /*5178*/              OPC_MoveChild2,
    2898             : /*5179*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2899             : /*5182*/              OPC_CheckPredicate, 22, // Predicate_immz
    2900             : /*5184*/              OPC_MoveParent,
    2901             : /*5185*/              OPC_CheckType, MVT::i32,
    2902             : /*5187*/              OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2903             : /*5189*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ), 0,
    2904             :                           MVT::i32, 2/*#Ops*/, 1, 0, 
    2905             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), i32:i32:$t, (imm:i32)<<P:Predicate_immz>>) - Complexity = 14
    2906             :                       // Dst: (SELEQZ:i32 i32:i32:$t, i32:i32:$cond)
    2907             : /*5197*/            /*Scope*/ 26, /*->5224*/
    2908             : /*5198*/              OPC_CheckCondCode, ISD::SETNE,
    2909             : /*5200*/              OPC_MoveParent,
    2910             : /*5201*/              OPC_CheckType, MVT::i32,
    2911             : /*5203*/              OPC_MoveParent,
    2912             : /*5204*/              OPC_RecordChild1, // #1 = $t
    2913             : /*5205*/              OPC_MoveChild2,
    2914             : /*5206*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2915             : /*5209*/              OPC_CheckPredicate, 22, // Predicate_immz
    2916             : /*5211*/              OPC_MoveParent,
    2917             : /*5212*/              OPC_CheckType, MVT::i32,
    2918             : /*5214*/              OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2919             : /*5216*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ), 0,
    2920             :                           MVT::i32, 2/*#Ops*/, 1, 0, 
    2921             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), i32:i32:$t, (imm:i32)<<P:Predicate_immz>>) - Complexity = 14
    2922             :                       // Dst: (SELNEZ:i32 i32:i32:$t, i32:i32:$cond)
    2923             : /*5224*/            /*Scope*/ 26, /*->5251*/
    2924             : /*5225*/              OPC_CheckCondCode, ISD::SETEQ,
    2925             : /*5227*/              OPC_MoveParent,
    2926             : /*5228*/              OPC_CheckType, MVT::i32,
    2927             : /*5230*/              OPC_MoveParent,
    2928             : /*5231*/              OPC_MoveChild1,
    2929             : /*5232*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2930             : /*5235*/              OPC_CheckPredicate, 22, // Predicate_immz
    2931             : /*5237*/              OPC_MoveParent,
    2932             : /*5238*/              OPC_RecordChild2, // #1 = $f
    2933             : /*5239*/              OPC_CheckType, MVT::i32,
    2934             : /*5241*/              OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2935             : /*5243*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ), 0,
    2936             :                           MVT::i32, 2/*#Ops*/, 1, 0, 
    2937             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), (imm:i32)<<P:Predicate_immz>>, i32:i32:$f) - Complexity = 14
    2938             :                       // Dst: (SELNEZ:i32 i32:i32:$f, i32:i32:$cond)
    2939             : /*5251*/            /*Scope*/ 26, /*->5278*/
    2940             : /*5252*/              OPC_CheckCondCode, ISD::SETNE,
    2941             : /*5254*/              OPC_MoveParent,
    2942             : /*5255*/              OPC_CheckType, MVT::i32,
    2943             : /*5257*/              OPC_MoveParent,
    2944             : /*5258*/              OPC_MoveChild1,
    2945             : /*5259*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2946             : /*5262*/              OPC_CheckPredicate, 22, // Predicate_immz
    2947             : /*5264*/              OPC_MoveParent,
    2948             : /*5265*/              OPC_RecordChild2, // #1 = $f
    2949             : /*5266*/              OPC_CheckType, MVT::i32,
    2950             : /*5268*/              OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    2951             : /*5270*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ), 0,
    2952             :                           MVT::i32, 2/*#Ops*/, 1, 0, 
    2953             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), (imm:i32)<<P:Predicate_immz>>, i32:i32:$f) - Complexity = 14
    2954             :                       // Dst: (SELEQZ:i32 i32:i32:$f, i32:i32:$cond)
    2955             : /*5278*/            /*Scope*/ 26, /*->5305*/
    2956             : /*5279*/              OPC_CheckCondCode, ISD::SETEQ,
    2957             : /*5281*/              OPC_MoveParent,
    2958             : /*5282*/              OPC_CheckType, MVT::i32,
    2959             : /*5284*/              OPC_MoveParent,
    2960             : /*5285*/              OPC_RecordChild1, // #1 = $t
    2961             : /*5286*/              OPC_MoveChild2,
    2962             : /*5287*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2963             : /*5290*/              OPC_CheckPredicate, 22, // Predicate_immz
    2964             : /*5292*/              OPC_MoveParent,
    2965             : /*5293*/              OPC_CheckType, MVT::i32,
    2966             : /*5295*/              OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    2967             : /*5297*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    2968             :                           MVT::i32, 2/*#Ops*/, 1, 0, 
    2969             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), i32:i32:$t, (imm:i32)<<P:Predicate_immz>>) - Complexity = 14
    2970             :                       // Dst: (SELEQZ_MMR6:i32 i32:i32:$t, i32:i32:$cond)
    2971             : /*5305*/            /*Scope*/ 26, /*->5332*/
    2972             : /*5306*/              OPC_CheckCondCode, ISD::SETNE,
    2973             : /*5308*/              OPC_MoveParent,
    2974             : /*5309*/              OPC_CheckType, MVT::i32,
    2975             : /*5311*/              OPC_MoveParent,
    2976             : /*5312*/              OPC_RecordChild1, // #1 = $t
    2977             : /*5313*/              OPC_MoveChild2,
    2978             : /*5314*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2979             : /*5317*/              OPC_CheckPredicate, 22, // Predicate_immz
    2980             : /*5319*/              OPC_MoveParent,
    2981             : /*5320*/              OPC_CheckType, MVT::i32,
    2982             : /*5322*/              OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    2983             : /*5324*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    2984             :                           MVT::i32, 2/*#Ops*/, 1, 0, 
    2985             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), i32:i32:$t, (imm:i32)<<P:Predicate_immz>>) - Complexity = 14
    2986             :                       // Dst: (SELNEZ_MMR6:i32 i32:i32:$t, i32:i32:$cond)
    2987             : /*5332*/            /*Scope*/ 26, /*->5359*/
    2988             : /*5333*/              OPC_CheckCondCode, ISD::SETEQ,
    2989             : /*5335*/              OPC_MoveParent,
    2990             : /*5336*/              OPC_CheckType, MVT::i32,
    2991             : /*5338*/              OPC_MoveParent,
    2992             : /*5339*/              OPC_MoveChild1,
    2993             : /*5340*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    2994             : /*5343*/              OPC_CheckPredicate, 22, // Predicate_immz
    2995             : /*5345*/              OPC_MoveParent,
    2996             : /*5346*/              OPC_RecordChild2, // #1 = $f
    2997             : /*5347*/              OPC_CheckType, MVT::i32,
    2998             : /*5349*/              OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    2999             : /*5351*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    3000             :                           MVT::i32, 2/*#Ops*/, 1, 0, 
    3001             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), (imm:i32)<<P:Predicate_immz>>, i32:i32:$f) - Complexity = 14
    3002             :                       // Dst: (SELNEZ_MMR6:i32 i32:i32:$f, i32:i32:$cond)
    3003             : /*5359*/            /*Scope*/ 57, /*->5417*/
    3004             : /*5360*/              OPC_CheckCondCode, ISD::SETNE,
    3005             : /*5362*/              OPC_MoveParent,
    3006             : /*5363*/              OPC_CheckType, MVT::i32,
    3007             : /*5365*/              OPC_MoveParent,
    3008             : /*5366*/              OPC_Scope, 20, /*->5388*/ // 2 children in Scope
    3009             : /*5368*/                OPC_MoveChild1,
    3010             : /*5369*/                OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3011             : /*5372*/                OPC_CheckPredicate, 22, // Predicate_immz
    3012             : /*5374*/                OPC_MoveParent,
    3013             : /*5375*/                OPC_RecordChild2, // #1 = $f
    3014             : /*5376*/                OPC_CheckType, MVT::i32,
    3015             : /*5378*/                OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    3016             : /*5380*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    3017             :                             MVT::i32, 2/*#Ops*/, 1, 0, 
    3018             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), (imm:i32)<<P:Predicate_immz>>, i32:i32:$f) - Complexity = 14
    3019             :                         // Dst: (SELEQZ_MMR6:i32 i32:i32:$f, i32:i32:$cond)
    3020             : /*5388*/              /*Scope*/ 27, /*->5416*/
    3021             : /*5389*/                OPC_RecordChild1, // #1 = $t
    3022             : /*5390*/                OPC_MoveChild2,
    3023             : /*5391*/                OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3024             : /*5394*/                OPC_CheckPredicate, 22, // Predicate_immz
    3025             : /*5396*/                OPC_MoveParent,
    3026             : /*5397*/                OPC_CheckType, MVT::i64,
    3027             : /*5399*/                OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3028             : /*5401*/                OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3029             :                             MVT::i64, 1/*#Ops*/, 0,  // Results = #2
    3030             : /*5408*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ64), 0,
    3031             :                             MVT::i64, 2/*#Ops*/, 1, 2, 
    3032             :                         // Src: (select:i64 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), i64:i64:$t, (imm:i64)<<P:Predicate_immz>>) - Complexity = 14
    3033             :                         // Dst: (SELNEZ64:i64 i64:i64:$t, (SLL64_32:i64 i32:i32:$cond))
    3034             : /*5416*/              0, /*End of Scope*/
    3035             : /*5417*/            /*Scope*/ 33, /*->5451*/
    3036             : /*5418*/              OPC_CheckCondCode, ISD::SETEQ,
    3037             : /*5420*/              OPC_MoveParent,
    3038             : /*5421*/              OPC_CheckType, MVT::i32,
    3039             : /*5423*/              OPC_MoveParent,
    3040             : /*5424*/              OPC_RecordChild1, // #1 = $t
    3041             : /*5425*/              OPC_MoveChild2,
    3042             : /*5426*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3043             : /*5429*/              OPC_CheckPredicate, 22, // Predicate_immz
    3044             : /*5431*/              OPC_MoveParent,
    3045             : /*5432*/              OPC_CheckType, MVT::i64,
    3046             : /*5434*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3047             : /*5436*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3048             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #2
    3049             : /*5443*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ64), 0,
    3050             :                           MVT::i64, 2/*#Ops*/, 1, 2, 
    3051             :                       // Src: (select:i64 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), i64:i64:$t, (imm:i64)<<P:Predicate_immz>>) - Complexity = 14
    3052             :                       // Dst: (SELEQZ64:i64 i64:i64:$t, (SLL64_32:i64 i32:i32:$cond))
    3053             : /*5451*/            /*Scope*/ 33, /*->5485*/
    3054             : /*5452*/              OPC_CheckCondCode, ISD::SETNE,
    3055             : /*5454*/              OPC_MoveParent,
    3056             : /*5455*/              OPC_CheckType, MVT::i32,
    3057             : /*5457*/              OPC_MoveParent,
    3058             : /*5458*/              OPC_MoveChild1,
    3059             : /*5459*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3060             : /*5462*/              OPC_CheckPredicate, 22, // Predicate_immz
    3061             : /*5464*/              OPC_MoveParent,
    3062             : /*5465*/              OPC_RecordChild2, // #1 = $f
    3063             : /*5466*/              OPC_CheckType, MVT::i64,
    3064             : /*5468*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3065             : /*5470*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3066             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #2
    3067             : /*5477*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ64), 0,
    3068             :                           MVT::i64, 2/*#Ops*/, 1, 2, 
    3069             :                       // Src: (select:i64 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), (imm:i64)<<P:Predicate_immz>>, i64:i64:$f) - Complexity = 14
    3070             :                       // Dst: (SELEQZ64:i64 i64:i64:$f, (SLL64_32:i64 i32:i32:$cond))
    3071             : /*5485*/            /*Scope*/ 33, /*->5519*/
    3072             : /*5486*/              OPC_CheckCondCode, ISD::SETEQ,
    3073             : /*5488*/              OPC_MoveParent,
    3074             : /*5489*/              OPC_CheckType, MVT::i32,
    3075             : /*5491*/              OPC_MoveParent,
    3076             : /*5492*/              OPC_MoveChild1,
    3077             : /*5493*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3078             : /*5496*/              OPC_CheckPredicate, 22, // Predicate_immz
    3079             : /*5498*/              OPC_MoveParent,
    3080             : /*5499*/              OPC_RecordChild2, // #1 = $f
    3081             : /*5500*/              OPC_CheckType, MVT::i64,
    3082             : /*5502*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3083             : /*5504*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3084             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #2
    3085             : /*5511*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ64), 0,
    3086             :                           MVT::i64, 2/*#Ops*/, 1, 2, 
    3087             :                       // Src: (select:i64 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), (imm:i64)<<P:Predicate_immz>>, i64:i64:$f) - Complexity = 14
    3088             :                       // Dst: (SELNEZ64:i64 i64:i64:$f, (SLL64_32:i64 i32:i32:$cond))
    3089             : /*5519*/            0, /*End of Scope*/
    3090             : /*5520*/          /*Scope*/ 123, /*->5644*/
    3091             : /*5521*/            OPC_CheckChild1Integer, 0, 
    3092             : /*5523*/            OPC_MoveChild2,
    3093             : /*5524*/            OPC_Scope, 36, /*->5562*/ // 4 children in Scope
    3094             : /*5526*/              OPC_CheckCondCode, ISD::SETEQ,
    3095             : /*5528*/              OPC_MoveParent,
    3096             : /*5529*/              OPC_CheckType, MVT::i32,
    3097             : /*5531*/              OPC_MoveParent,
    3098             : /*5532*/              OPC_RecordChild1, // #1 = $T
    3099             : /*5533*/              OPC_RecordChild2, // #2 = $F
    3100             : /*5534*/              OPC_SwitchType /*2 cases */, 11, MVT::i32,// ->5548
    3101             : /*5537*/                OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3102             : /*5539*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3103             :                             MVT::i32, 3/*#Ops*/, 1, 0, 2, 
    3104             :                         // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETEQ:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 11
    3105             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, GPR32:i32:$lhs, GPR32:i32:$F)
    3106             : /*5548*/              /*SwitchType*/ 11, MVT::i64,// ->5561
    3107             : /*5550*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3108             : /*5552*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    3109             :                             MVT::i64, 3/*#Ops*/, 1, 0, 2, 
    3110             :                         // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETEQ:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 11
    3111             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, GPR32:i32:$lhs, GPR64:i64:$F)
    3112             : /*5561*/              0, // EndSwitchType
    3113             : /*5562*/            /*Scope*/ 36, /*->5599*/
    3114             : /*5563*/              OPC_CheckCondCode, ISD::SETNE,
    3115             : /*5565*/              OPC_MoveParent,
    3116             : /*5566*/              OPC_CheckType, MVT::i32,
    3117             : /*5568*/              OPC_MoveParent,
    3118             : /*5569*/              OPC_RecordChild1, // #1 = $T
    3119             : /*5570*/              OPC_RecordChild2, // #2 = $F
    3120             : /*5571*/              OPC_SwitchType /*2 cases */, 11, MVT::i32,// ->5585
    3121             : /*5574*/                OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3122             : /*5576*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_I), 0,
    3123             :                             MVT::i32, 3/*#Ops*/, 1, 0, 2, 
    3124             :                         // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETNE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 11
    3125             :                         // Dst: (MOVN_I_I:i32 GPR32:i32:$T, GPR32:i32:$lhs, GPR32:i32:$F)
    3126             : /*5585*/              /*SwitchType*/ 11, MVT::i64,// ->5598
    3127             : /*5587*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3128             : /*5589*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_I64), 0,
    3129             :                             MVT::i64, 3/*#Ops*/, 1, 0, 2, 
    3130             :                         // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETNE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 11
    3131             :                         // Dst: (MOVN_I_I64:i64 GPR64:i64:$T, GPR32:i32:$lhs, GPR64:i64:$F)
    3132             : /*5598*/              0, // EndSwitchType
    3133             : /*5599*/            /*Scope*/ 21, /*->5621*/
    3134             : /*5600*/              OPC_CheckCondCode, ISD::SETEQ,
    3135             : /*5602*/              OPC_MoveParent,
    3136             : /*5603*/              OPC_CheckType, MVT::i32,
    3137             : /*5605*/              OPC_MoveParent,
    3138             : /*5606*/              OPC_RecordChild1, // #1 = $x
    3139             : /*5607*/              OPC_RecordChild2, // #2 = $y
    3140             : /*5608*/              OPC_CheckType, MVT::i32,
    3141             : /*5610*/              OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    3142             : /*5612*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SelBeqZ), 0,
    3143             :                           MVT::i32, 3/*#Ops*/, 1, 2, 0, 
    3144             :                       // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, 0:i32, SETEQ:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 11
    3145             :                       // Dst: (SelBeqZ:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$a)
    3146             : /*5621*/            /*Scope*/ 21, /*->5643*/
    3147             : /*5622*/              OPC_CheckCondCode, ISD::SETNE,
    3148             : /*5624*/              OPC_MoveParent,
    3149             : /*5625*/              OPC_CheckType, MVT::i32,
    3150             : /*5627*/              OPC_MoveParent,
    3151             : /*5628*/              OPC_RecordChild1, // #1 = $x
    3152             : /*5629*/              OPC_RecordChild2, // #2 = $y
    3153             : /*5630*/              OPC_CheckType, MVT::i32,
    3154             : /*5632*/              OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    3155             : /*5634*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SelBneZ), 0,
    3156             :                           MVT::i32, 3/*#Ops*/, 1, 2, 0, 
    3157             :                       // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, 0:i32, SETNE:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 11
    3158             :                       // Dst: (SelBneZ:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$a)
    3159             : /*5643*/            0, /*End of Scope*/
    3160             : /*5644*/          /*Scope*/ 119|128,2/*375*/, /*->6021*/
    3161             : /*5646*/            OPC_RecordChild1, // #1 = $rhs
    3162             : /*5647*/            OPC_MoveChild1,
    3163             : /*5648*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3164             : /*5651*/            OPC_Scope, 70, /*->5723*/ // 6 children in Scope
    3165             : /*5653*/              OPC_CheckPredicate, 19, // Predicate_immSExt16
    3166             : /*5655*/              OPC_MoveParent,
    3167             : /*5656*/              OPC_MoveChild2,
    3168             : /*5657*/              OPC_Scope, 31, /*->5690*/ // 2 children in Scope
    3169             : /*5659*/                OPC_CheckCondCode, ISD::SETGE,
    3170             : /*5661*/                OPC_MoveParent,
    3171             : /*5662*/                OPC_CheckType, MVT::i32,
    3172             : /*5664*/                OPC_MoveParent,
    3173             : /*5665*/                OPC_RecordChild1, // #2 = $T
    3174             : /*5666*/                OPC_RecordChild2, // #3 = $F
    3175             : /*5667*/                OPC_CheckType, MVT::i32,
    3176             : /*5669*/                OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3177             : /*5671*/                OPC_EmitConvertToTarget, 1,
    3178             : /*5673*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    3179             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3180             : /*5681*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3181             :                             MVT::i32, 3/*#Ops*/, 2, 5, 3, 
    3182             :                         // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    3183             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTi:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), GPR32:i32:$F)
    3184             : /*5690*/              /*Scope*/ 31, /*->5722*/
    3185             : /*5691*/                OPC_CheckCondCode, ISD::SETUGE,
    3186             : /*5693*/                OPC_MoveParent,
    3187             : /*5694*/                OPC_CheckType, MVT::i32,
    3188             : /*5696*/                OPC_MoveParent,
    3189             : /*5697*/                OPC_RecordChild1, // #2 = $T
    3190             : /*5698*/                OPC_RecordChild2, // #3 = $F
    3191             : /*5699*/                OPC_CheckType, MVT::i32,
    3192             : /*5701*/                OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3193             : /*5703*/                OPC_EmitConvertToTarget, 1,
    3194             : /*5705*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    3195             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3196             : /*5713*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3197             :                             MVT::i32, 3/*#Ops*/, 2, 5, 3, 
    3198             :                         // Src: (select:i32 (setcc:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    3199             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTiu:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh), GPR32:i32:$F)
    3200             : /*5722*/              0, /*End of Scope*/
    3201             : /*5723*/            /*Scope*/ 76, /*->5800*/
    3202             : /*5724*/              OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    3203             : /*5726*/              OPC_MoveParent,
    3204             : /*5727*/              OPC_MoveChild2,
    3205             : /*5728*/              OPC_Scope, 34, /*->5764*/ // 2 children in Scope
    3206             : /*5730*/                OPC_CheckCondCode, ISD::SETGT,
    3207             : /*5732*/                OPC_MoveParent,
    3208             : /*5733*/                OPC_CheckType, MVT::i32,
    3209             : /*5735*/                OPC_MoveParent,
    3210             : /*5736*/                OPC_RecordChild1, // #2 = $T
    3211             : /*5737*/                OPC_RecordChild2, // #3 = $F
    3212             : /*5738*/                OPC_CheckType, MVT::i32,
    3213             : /*5740*/                OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3214             : /*5742*/                OPC_EmitConvertToTarget, 1,
    3215             : /*5744*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3216             : /*5747*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    3217             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3218             : /*5755*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3219             :                             MVT::i32, 3/*#Ops*/, 2, 6, 3, 
    3220             :                         // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    3221             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTi:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), GPR32:i32:$F)
    3222             : /*5764*/              /*Scope*/ 34, /*->5799*/
    3223             : /*5765*/                OPC_CheckCondCode, ISD::SETUGT,
    3224             : /*5767*/                OPC_MoveParent,
    3225             : /*5768*/                OPC_CheckType, MVT::i32,
    3226             : /*5770*/                OPC_MoveParent,
    3227             : /*5771*/                OPC_RecordChild1, // #2 = $T
    3228             : /*5772*/                OPC_RecordChild2, // #3 = $F
    3229             : /*5773*/                OPC_CheckType, MVT::i32,
    3230             : /*5775*/                OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3231             : /*5777*/                OPC_EmitConvertToTarget, 1,
    3232             : /*5779*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3233             : /*5782*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    3234             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3235             : /*5790*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3236             :                             MVT::i32, 3/*#Ops*/, 2, 6, 3, 
    3237             :                         // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    3238             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTiu:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), GPR32:i32:$F)
    3239             : /*5799*/              0, /*End of Scope*/
    3240             : /*5800*/            /*Scope*/ 35, /*->5836*/
    3241             : /*5801*/              OPC_CheckPredicate, 21, // Predicate_immZExt16
    3242             : /*5803*/              OPC_MoveParent,
    3243             : /*5804*/              OPC_MoveChild2,
    3244             : /*5805*/              OPC_CheckCondCode, ISD::SETEQ,
    3245             : /*5807*/              OPC_MoveParent,
    3246             : /*5808*/              OPC_CheckType, MVT::i32,
    3247             : /*5810*/              OPC_MoveParent,
    3248             : /*5811*/              OPC_RecordChild1, // #2 = $T
    3249             : /*5812*/              OPC_RecordChild2, // #3 = $F
    3250             : /*5813*/              OPC_CheckType, MVT::i32,
    3251             : /*5815*/              OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3252             : /*5817*/              OPC_EmitConvertToTarget, 1,
    3253             : /*5819*/              OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3254             :                           MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3255             : /*5827*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3256             :                           MVT::i32, 3/*#Ops*/, 2, 5, 3, 
    3257             :                       // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    3258             :                       // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (XORi:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16), GPR32:i32:$F)
    3259             : /*5836*/            /*Scope*/ 70, /*->5907*/
    3260             : /*5837*/              OPC_CheckPredicate, 19, // Predicate_immSExt16
    3261             : /*5839*/              OPC_MoveParent,
    3262             : /*5840*/              OPC_MoveChild2,
    3263             : /*5841*/              OPC_Scope, 31, /*->5874*/ // 2 children in Scope
    3264             : /*5843*/                OPC_CheckCondCode, ISD::SETGE,
    3265             : /*5845*/                OPC_MoveParent,
    3266             : /*5846*/                OPC_CheckType, MVT::i32,
    3267             : /*5848*/                OPC_MoveParent,
    3268             : /*5849*/                OPC_RecordChild1, // #2 = $T
    3269             : /*5850*/                OPC_RecordChild2, // #3 = $F
    3270             : /*5851*/                OPC_CheckType, MVT::i64,
    3271             : /*5853*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3272             : /*5855*/                OPC_EmitConvertToTarget, 1,
    3273             : /*5857*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    3274             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3275             : /*5865*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    3276             :                             MVT::i64, 3/*#Ops*/, 2, 5, 3, 
    3277             :                         // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    3278             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTi:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), GPR64:i64:$F)
    3279             : /*5874*/              /*Scope*/ 31, /*->5906*/
    3280             : /*5875*/                OPC_CheckCondCode, ISD::SETUGE,
    3281             : /*5877*/                OPC_MoveParent,
    3282             : /*5878*/                OPC_CheckType, MVT::i32,
    3283             : /*5880*/                OPC_MoveParent,
    3284             : /*5881*/                OPC_RecordChild1, // #2 = $T
    3285             : /*5882*/                OPC_RecordChild2, // #3 = $F
    3286             : /*5883*/                OPC_CheckType, MVT::i64,
    3287             : /*5885*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3288             : /*5887*/                OPC_EmitConvertToTarget, 1,
    3289             : /*5889*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    3290             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3291             : /*5897*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    3292             :                             MVT::i64, 3/*#Ops*/, 2, 5, 3, 
    3293             :                         // Src: (select:i64 (setcc:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    3294             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTiu:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh), GPR64:i64:$F)
    3295             : /*5906*/              0, /*End of Scope*/
    3296             : /*5907*/            /*Scope*/ 76, /*->5984*/
    3297             : /*5908*/              OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    3298             : /*5910*/              OPC_MoveParent,
    3299             : /*5911*/              OPC_MoveChild2,
    3300             : /*5912*/              OPC_Scope, 34, /*->5948*/ // 2 children in Scope
    3301             : /*5914*/                OPC_CheckCondCode, ISD::SETGT,
    3302             : /*5916*/                OPC_MoveParent,
    3303             : /*5917*/                OPC_CheckType, MVT::i32,
    3304             : /*5919*/                OPC_MoveParent,
    3305             : /*5920*/                OPC_RecordChild1, // #2 = $T
    3306             : /*5921*/                OPC_RecordChild2, // #3 = $F
    3307             : /*5922*/                OPC_CheckType, MVT::i64,
    3308             : /*5924*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3309             : /*5926*/                OPC_EmitConvertToTarget, 1,
    3310             : /*5928*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3311             : /*5931*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    3312             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3313             : /*5939*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    3314             :                             MVT::i64, 3/*#Ops*/, 2, 6, 3, 
    3315             :                         // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    3316             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTi:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), GPR64:i64:$F)
    3317             : /*5948*/              /*Scope*/ 34, /*->5983*/
    3318             : /*5949*/                OPC_CheckCondCode, ISD::SETUGT,
    3319             : /*5951*/                OPC_MoveParent,
    3320             : /*5952*/                OPC_CheckType, MVT::i32,
    3321             : /*5954*/                OPC_MoveParent,
    3322             : /*5955*/                OPC_RecordChild1, // #2 = $T
    3323             : /*5956*/                OPC_RecordChild2, // #3 = $F
    3324             : /*5957*/                OPC_CheckType, MVT::i64,
    3325             : /*5959*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3326             : /*5961*/                OPC_EmitConvertToTarget, 1,
    3327             : /*5963*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3328             : /*5966*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    3329             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3330             : /*5974*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    3331             :                             MVT::i64, 3/*#Ops*/, 2, 6, 3, 
    3332             :                         // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    3333             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTiu:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), GPR64:i64:$F)
    3334             : /*5983*/              0, /*End of Scope*/
    3335             : /*5984*/            /*Scope*/ 35, /*->6020*/
    3336             : /*5985*/              OPC_CheckPredicate, 21, // Predicate_immZExt16
    3337             : /*5987*/              OPC_MoveParent,
    3338             : /*5988*/              OPC_MoveChild2,
    3339             : /*5989*/              OPC_CheckCondCode, ISD::SETEQ,
    3340             : /*5991*/              OPC_MoveParent,
    3341             : /*5992*/              OPC_CheckType, MVT::i32,
    3342             : /*5994*/              OPC_MoveParent,
    3343             : /*5995*/              OPC_RecordChild1, // #2 = $T
    3344             : /*5996*/              OPC_RecordChild2, // #3 = $F
    3345             : /*5997*/              OPC_CheckType, MVT::i64,
    3346             : /*5999*/              OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3347             : /*6001*/              OPC_EmitConvertToTarget, 1,
    3348             : /*6003*/              OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3349             :                           MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3350             : /*6011*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    3351             :                           MVT::i64, 3/*#Ops*/, 2, 5, 3, 
    3352             :                       // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    3353             :                       // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (XORi:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16), GPR64:i64:$F)
    3354             : /*6020*/            0, /*End of Scope*/
    3355             : /*6021*/          /*Scope*/ 30|128,1/*158*/, /*->6181*/
    3356             : /*6023*/            OPC_MoveChild1,
    3357             : /*6024*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3358             : /*6027*/            OPC_CheckPredicate, 22, // Predicate_immz
    3359             : /*6029*/            OPC_MoveParent,
    3360             : /*6030*/            OPC_MoveChild2,
    3361             : /*6031*/            OPC_Scope, 36, /*->6069*/ // 4 children in Scope
    3362             : /*6033*/              OPC_CheckCondCode, ISD::SETEQ,
    3363             : /*6035*/              OPC_MoveParent,
    3364             : /*6036*/              OPC_CheckType, MVT::i32,
    3365             : /*6038*/              OPC_MoveParent,
    3366             : /*6039*/              OPC_RecordChild1, // #1 = $t
    3367             : /*6040*/              OPC_RecordChild2, // #2 = $f
    3368             : /*6041*/              OPC_CheckType, MVT::i32,
    3369             : /*6043*/              OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    3370             : /*6045*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ), 0,
    3371             :                           MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #3
    3372             : /*6053*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ), 0,
    3373             :                           MVT::i32, 2/*#Ops*/, 2, 0,  // Results = #4
    3374             : /*6061*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR), 0,
    3375             :                           MVT::i32, 2/*#Ops*/, 3, 4, 
    3376             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3377             :                       // Dst: (OR:i32 (SELEQZ:i32 i32:i32:$t, i32:i32:$cond), (SELNEZ:i32 i32:i32:$f, i32:i32:$cond))
    3378             : /*6069*/            /*Scope*/ 36, /*->6106*/
    3379             : /*6070*/              OPC_CheckCondCode, ISD::SETNE,
    3380             : /*6072*/              OPC_MoveParent,
    3381             : /*6073*/              OPC_CheckType, MVT::i32,
    3382             : /*6075*/              OPC_MoveParent,
    3383             : /*6076*/              OPC_RecordChild1, // #1 = $t
    3384             : /*6077*/              OPC_RecordChild2, // #2 = $f
    3385             : /*6078*/              OPC_CheckType, MVT::i32,
    3386             : /*6080*/              OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    3387             : /*6082*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ), 0,
    3388             :                           MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #3
    3389             : /*6090*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ), 0,
    3390             :                           MVT::i32, 2/*#Ops*/, 2, 0,  // Results = #4
    3391             : /*6098*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR), 0,
    3392             :                           MVT::i32, 2/*#Ops*/, 3, 4, 
    3393             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3394             :                       // Dst: (OR:i32 (SELNEZ:i32 i32:i32:$t, i32:i32:$cond), (SELEQZ:i32 i32:i32:$f, i32:i32:$cond))
    3395             : /*6106*/            /*Scope*/ 36, /*->6143*/
    3396             : /*6107*/              OPC_CheckCondCode, ISD::SETEQ,
    3397             : /*6109*/              OPC_MoveParent,
    3398             : /*6110*/              OPC_CheckType, MVT::i32,
    3399             : /*6112*/              OPC_MoveParent,
    3400             : /*6113*/              OPC_RecordChild1, // #1 = $t
    3401             : /*6114*/              OPC_RecordChild2, // #2 = $f
    3402             : /*6115*/              OPC_CheckType, MVT::i32,
    3403             : /*6117*/              OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    3404             : /*6119*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    3405             :                           MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #3
    3406             : /*6127*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    3407             :                           MVT::i32, 2/*#Ops*/, 2, 0,  // Results = #4
    3408             : /*6135*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR_MM), 0,
    3409             :                           MVT::i32, 2/*#Ops*/, 3, 4, 
    3410             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3411             :                       // Dst: (OR_MM:i32 (SELEQZ_MMR6:i32 i32:i32:$t, i32:i32:$cond), (SELNEZ_MMR6:i32 i32:i32:$f, i32:i32:$cond))
    3412             : /*6143*/            /*Scope*/ 36, /*->6180*/
    3413             : /*6144*/              OPC_CheckCondCode, ISD::SETNE,
    3414             : /*6146*/              OPC_MoveParent,
    3415             : /*6147*/              OPC_CheckType, MVT::i32,
    3416             : /*6149*/              OPC_MoveParent,
    3417             : /*6150*/              OPC_RecordChild1, // #1 = $t
    3418             : /*6151*/              OPC_RecordChild2, // #2 = $f
    3419             : /*6152*/              OPC_CheckType, MVT::i32,
    3420             : /*6154*/              OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    3421             : /*6156*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    3422             :                           MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #3
    3423             : /*6164*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    3424             :                           MVT::i32, 2/*#Ops*/, 2, 0,  // Results = #4
    3425             : /*6172*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR_MM), 0,
    3426             :                           MVT::i32, 2/*#Ops*/, 3, 4, 
    3427             :                       // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3428             :                       // Dst: (OR_MM:i32 (SELNEZ_MMR6:i32 i32:i32:$t, i32:i32:$cond), (SELEQZ_MMR6:i32 i32:i32:$f, i32:i32:$cond))
    3429             : /*6180*/            0, /*End of Scope*/
    3430             : /*6181*/          /*Scope*/ 6|128,2/*262*/, /*->6445*/
    3431             : /*6183*/            OPC_RecordChild1, // #1 = $imm
    3432             : /*6184*/            OPC_MoveChild1,
    3433             : /*6185*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3434             : /*6188*/            OPC_Scope, 120, /*->6310*/ // 2 children in Scope
    3435             : /*6190*/              OPC_CheckPredicate, 21, // Predicate_immZExt16
    3436             : /*6192*/              OPC_MoveParent,
    3437             : /*6193*/              OPC_MoveChild2,
    3438             : /*6194*/              OPC_Scope, 56, /*->6252*/ // 2 children in Scope
    3439             : /*6196*/                OPC_CheckCondCode, ISD::SETEQ,
    3440             : /*6198*/                OPC_MoveParent,
    3441             : /*6199*/                OPC_CheckType, MVT::i32,
    3442             : /*6201*/                OPC_MoveParent,
    3443             : /*6202*/                OPC_RecordChild1, // #2 = $t
    3444             : /*6203*/                OPC_RecordChild2, // #3 = $f
    3445             : /*6204*/                OPC_CheckType, MVT::i32,
    3446             : /*6206*/                OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    3447             : /*6208*/                OPC_EmitConvertToTarget, 1,
    3448             : /*6210*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3449             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3450             : /*6218*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ), 0,
    3451             :                             MVT::i32, 2/*#Ops*/, 2, 5,  // Results = #6
    3452             : /*6226*/                OPC_EmitConvertToTarget, 1,
    3453             : /*6228*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3454             :                             MVT::i32, 2/*#Ops*/, 0, 7,  // Results = #8
    3455             : /*6236*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ), 0,
    3456             :                             MVT::i32, 2/*#Ops*/, 3, 8,  // Results = #9
    3457             : /*6244*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR), 0,
    3458             :                             MVT::i32, 2/*#Ops*/, 6, 9, 
    3459             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETEQ:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3460             :                         // Dst: (OR:i32 (SELEQZ:i32 i32:i32:$t, (XORi:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm)), (SELNEZ:i32 i32:i32:$f, (XORi:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm)))
    3461             : /*6252*/              /*Scope*/ 56, /*->6309*/
    3462             : /*6253*/                OPC_CheckCondCode, ISD::SETNE,
    3463             : /*6255*/                OPC_MoveParent,
    3464             : /*6256*/                OPC_CheckType, MVT::i32,
    3465             : /*6258*/                OPC_MoveParent,
    3466             : /*6259*/                OPC_RecordChild1, // #2 = $t
    3467             : /*6260*/                OPC_RecordChild2, // #3 = $f
    3468             : /*6261*/                OPC_CheckType, MVT::i32,
    3469             : /*6263*/                OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    3470             : /*6265*/                OPC_EmitConvertToTarget, 1,
    3471             : /*6267*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3472             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3473             : /*6275*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ), 0,
    3474             :                             MVT::i32, 2/*#Ops*/, 2, 5,  // Results = #6
    3475             : /*6283*/                OPC_EmitConvertToTarget, 1,
    3476             : /*6285*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3477             :                             MVT::i32, 2/*#Ops*/, 0, 7,  // Results = #8
    3478             : /*6293*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ), 0,
    3479             :                             MVT::i32, 2/*#Ops*/, 3, 8,  // Results = #9
    3480             : /*6301*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR), 0,
    3481             :                             MVT::i32, 2/*#Ops*/, 6, 9, 
    3482             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETNE:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3483             :                         // Dst: (OR:i32 (SELNEZ:i32 i32:i32:$t, (XORi:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm)), (SELEQZ:i32 i32:i32:$f, (XORi:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm)))
    3484             : /*6309*/              0, /*End of Scope*/
    3485             : /*6310*/            /*Scope*/ 4|128,1/*132*/, /*->6444*/
    3486             : /*6312*/              OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    3487             : /*6314*/              OPC_MoveParent,
    3488             : /*6315*/              OPC_MoveChild2,
    3489             : /*6316*/              OPC_Scope, 62, /*->6380*/ // 2 children in Scope
    3490             : /*6318*/                OPC_CheckCondCode, ISD::SETGT,
    3491             : /*6320*/                OPC_MoveParent,
    3492             : /*6321*/                OPC_CheckType, MVT::i32,
    3493             : /*6323*/                OPC_MoveParent,
    3494             : /*6324*/                OPC_RecordChild1, // #2 = $t
    3495             : /*6325*/                OPC_RecordChild2, // #3 = $f
    3496             : /*6326*/                OPC_CheckType, MVT::i32,
    3497             : /*6328*/                OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    3498             : /*6330*/                OPC_EmitConvertToTarget, 1,
    3499             : /*6332*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3500             : /*6335*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    3501             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3502             : /*6343*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ), 0,
    3503             :                             MVT::i32, 2/*#Ops*/, 2, 6,  // Results = #7
    3504             : /*6351*/                OPC_EmitConvertToTarget, 1,
    3505             : /*6353*/                OPC_EmitNodeXForm, 2, 8, // Plus1
    3506             : /*6356*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    3507             :                             MVT::i32, 2/*#Ops*/, 0, 9,  // Results = #10
    3508             : /*6364*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ), 0,
    3509             :                             MVT::i32, 2/*#Ops*/, 3, 10,  // Results = #11
    3510             : /*6372*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR), 0,
    3511             :                             MVT::i32, 2/*#Ops*/, 7, 11, 
    3512             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$imm, SETGT:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3513             :                         // Dst: (OR:i32 (SELEQZ:i32 i32:i32:$t, (SLTi:i32 i32:i32:$cond, (Plus1:i32 (imm:i32):$imm))), (SELNEZ:i32 i32:i32:$f, (SLTi:i32 i32:i32:$cond, (Plus1:i32 (imm:i32):$imm))))
    3514             : /*6380*/              /*Scope*/ 62, /*->6443*/
    3515             : /*6381*/                OPC_CheckCondCode, ISD::SETUGT,
    3516             : /*6383*/                OPC_MoveParent,
    3517             : /*6384*/                OPC_CheckType, MVT::i32,
    3518             : /*6386*/                OPC_MoveParent,
    3519             : /*6387*/                OPC_RecordChild1, // #2 = $t
    3520             : /*6388*/                OPC_RecordChild2, // #3 = $f
    3521             : /*6389*/                OPC_CheckType, MVT::i32,
    3522             : /*6391*/                OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    3523             : /*6393*/                OPC_EmitConvertToTarget, 1,
    3524             : /*6395*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3525             : /*6398*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    3526             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3527             : /*6406*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ), 0,
    3528             :                             MVT::i32, 2/*#Ops*/, 2, 6,  // Results = #7
    3529             : /*6414*/                OPC_EmitConvertToTarget, 1,
    3530             : /*6416*/                OPC_EmitNodeXForm, 2, 8, // Plus1
    3531             : /*6419*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    3532             :                             MVT::i32, 2/*#Ops*/, 0, 9,  // Results = #10
    3533             : /*6427*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ), 0,
    3534             :                             MVT::i32, 2/*#Ops*/, 3, 10,  // Results = #11
    3535             : /*6435*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR), 0,
    3536             :                             MVT::i32, 2/*#Ops*/, 7, 11, 
    3537             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$imm, SETUGT:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3538             :                         // Dst: (OR:i32 (SELEQZ:i32 i32:i32:$t, (SLTiu:i32 i32:i32:$cond, (Plus1:i32 (imm:i32):$imm))), (SELNEZ:i32 i32:i32:$f, (SLTiu:i32 i32:i32:$cond, (Plus1:i32 (imm:i32):$imm))))
    3539             : /*6443*/              0, /*End of Scope*/
    3540             : /*6444*/            0, /*End of Scope*/
    3541             : /*6445*/          /*Scope*/ 112, /*->6558*/
    3542             : /*6446*/            OPC_MoveChild1,
    3543             : /*6447*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3544             : /*6450*/            OPC_CheckPredicate, 22, // Predicate_immz
    3545             : /*6452*/            OPC_MoveParent,
    3546             : /*6453*/            OPC_MoveChild2,
    3547             : /*6454*/            OPC_Scope, 50, /*->6506*/ // 2 children in Scope
    3548             : /*6456*/              OPC_CheckCondCode, ISD::SETEQ,
    3549             : /*6458*/              OPC_MoveParent,
    3550             : /*6459*/              OPC_CheckType, MVT::i32,
    3551             : /*6461*/              OPC_MoveParent,
    3552             : /*6462*/              OPC_RecordChild1, // #1 = $t
    3553             : /*6463*/              OPC_RecordChild2, // #2 = $f
    3554             : /*6464*/              OPC_CheckType, MVT::i64,
    3555             : /*6466*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3556             : /*6468*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3557             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #3
    3558             : /*6475*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    3559             :                           MVT::i64, 2/*#Ops*/, 1, 3,  // Results = #4
    3560             : /*6483*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3561             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #5
    3562             : /*6490*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    3563             :                           MVT::i64, 2/*#Ops*/, 2, 5,  // Results = #6
    3564             : /*6498*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    3565             :                           MVT::i64, 2/*#Ops*/, 4, 6, 
    3566             :                       // Src: (select:i64 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETEQ:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    3567             :                       // Dst: (OR64:i64 (SELEQZ64:i64 i64:i64:$t, (SLL64_32:i64 i32:i32:$cond)), (SELNEZ64:i64 i64:i64:$f, (SLL64_32:i64 i32:i32:$cond)))
    3568             : /*6506*/            /*Scope*/ 50, /*->6557*/
    3569             : /*6507*/              OPC_CheckCondCode, ISD::SETNE,
    3570             : /*6509*/              OPC_MoveParent,
    3571             : /*6510*/              OPC_CheckType, MVT::i32,
    3572             : /*6512*/              OPC_MoveParent,
    3573             : /*6513*/              OPC_RecordChild1, // #1 = $t
    3574             : /*6514*/              OPC_RecordChild2, // #2 = $f
    3575             : /*6515*/              OPC_CheckType, MVT::i64,
    3576             : /*6517*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3577             : /*6519*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3578             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #3
    3579             : /*6526*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    3580             :                           MVT::i64, 2/*#Ops*/, 1, 3,  // Results = #4
    3581             : /*6534*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3582             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #5
    3583             : /*6541*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    3584             :                           MVT::i64, 2/*#Ops*/, 2, 5,  // Results = #6
    3585             : /*6549*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    3586             :                           MVT::i64, 2/*#Ops*/, 4, 6, 
    3587             :                       // Src: (select:i64 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, SETNE:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    3588             :                       // Dst: (OR64:i64 (SELNEZ64:i64 i64:i64:$t, (SLL64_32:i64 i32:i32:$cond)), (SELEQZ64:i64 i64:i64:$f, (SLL64_32:i64 i32:i32:$cond)))
    3589             : /*6557*/            0, /*End of Scope*/
    3590             : /*6558*/          /*Scope*/ 120|128,3/*504*/, /*->7064*/
    3591             : /*6560*/            OPC_RecordChild1, // #1 = $imm
    3592             : /*6561*/            OPC_MoveChild1,
    3593             : /*6562*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3594             : /*6565*/            OPC_Scope, 120, /*->6687*/ // 5 children in Scope
    3595             : /*6567*/              OPC_CheckPredicate, 21, // Predicate_immZExt16
    3596             : /*6569*/              OPC_MoveParent,
    3597             : /*6570*/              OPC_MoveChild2,
    3598             : /*6571*/              OPC_Scope, 56, /*->6629*/ // 2 children in Scope
    3599             : /*6573*/                OPC_CheckCondCode, ISD::SETEQ,
    3600             : /*6575*/                OPC_MoveParent,
    3601             : /*6576*/                OPC_CheckType, MVT::i32,
    3602             : /*6578*/                OPC_MoveParent,
    3603             : /*6579*/                OPC_RecordChild1, // #2 = $t
    3604             : /*6580*/                OPC_RecordChild2, // #3 = $f
    3605             : /*6581*/                OPC_CheckType, MVT::i32,
    3606             : /*6583*/                OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    3607             : /*6585*/                OPC_EmitConvertToTarget, 1,
    3608             : /*6587*/                OPC_EmitNode1, TARGET_VAL(Mips::XORI_MMR6), 0,
    3609             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3610             : /*6595*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    3611             :                             MVT::i32, 2/*#Ops*/, 2, 5,  // Results = #6
    3612             : /*6603*/                OPC_EmitConvertToTarget, 1,
    3613             : /*6605*/                OPC_EmitNode1, TARGET_VAL(Mips::XORI_MMR6), 0,
    3614             :                             MVT::i32, 2/*#Ops*/, 0, 7,  // Results = #8
    3615             : /*6613*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    3616             :                             MVT::i32, 2/*#Ops*/, 3, 8,  // Results = #9
    3617             : /*6621*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR_MM), 0,
    3618             :                             MVT::i32, 2/*#Ops*/, 6, 9, 
    3619             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETEQ:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3620             :                         // Dst: (OR_MM:i32 (SELEQZ_MMR6:i32 i32:i32:$t, (XORI_MMR6:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm)), (SELNEZ_MMR6:i32 i32:i32:$f, (XORI_MMR6:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm)))
    3621             : /*6629*/              /*Scope*/ 56, /*->6686*/
    3622             : /*6630*/                OPC_CheckCondCode, ISD::SETNE,
    3623             : /*6632*/                OPC_MoveParent,
    3624             : /*6633*/                OPC_CheckType, MVT::i32,
    3625             : /*6635*/                OPC_MoveParent,
    3626             : /*6636*/                OPC_RecordChild1, // #2 = $t
    3627             : /*6637*/                OPC_RecordChild2, // #3 = $f
    3628             : /*6638*/                OPC_CheckType, MVT::i32,
    3629             : /*6640*/                OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    3630             : /*6642*/                OPC_EmitConvertToTarget, 1,
    3631             : /*6644*/                OPC_EmitNode1, TARGET_VAL(Mips::XORI_MMR6), 0,
    3632             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3633             : /*6652*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    3634             :                             MVT::i32, 2/*#Ops*/, 2, 5,  // Results = #6
    3635             : /*6660*/                OPC_EmitConvertToTarget, 1,
    3636             : /*6662*/                OPC_EmitNode1, TARGET_VAL(Mips::XORI_MMR6), 0,
    3637             :                             MVT::i32, 2/*#Ops*/, 0, 7,  // Results = #8
    3638             : /*6670*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    3639             :                             MVT::i32, 2/*#Ops*/, 3, 8,  // Results = #9
    3640             : /*6678*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR_MM), 0,
    3641             :                             MVT::i32, 2/*#Ops*/, 6, 9, 
    3642             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETNE:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3643             :                         // Dst: (OR_MM:i32 (SELNEZ_MMR6:i32 i32:i32:$t, (XORI_MMR6:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm)), (SELEQZ_MMR6:i32 i32:i32:$f, (XORI_MMR6:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm)))
    3644             : /*6686*/              0, /*End of Scope*/
    3645             : /*6687*/            /*Scope*/ 4|128,1/*132*/, /*->6821*/
    3646             : /*6689*/              OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    3647             : /*6691*/              OPC_MoveParent,
    3648             : /*6692*/              OPC_MoveChild2,
    3649             : /*6693*/              OPC_Scope, 62, /*->6757*/ // 2 children in Scope
    3650             : /*6695*/                OPC_CheckCondCode, ISD::SETGT,
    3651             : /*6697*/                OPC_MoveParent,
    3652             : /*6698*/                OPC_CheckType, MVT::i32,
    3653             : /*6700*/                OPC_MoveParent,
    3654             : /*6701*/                OPC_RecordChild1, // #2 = $t
    3655             : /*6702*/                OPC_RecordChild2, // #3 = $f
    3656             : /*6703*/                OPC_CheckType, MVT::i32,
    3657             : /*6705*/                OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    3658             : /*6707*/                OPC_EmitConvertToTarget, 1,
    3659             : /*6709*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3660             : /*6712*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi_MM), 0,
    3661             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3662             : /*6720*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    3663             :                             MVT::i32, 2/*#Ops*/, 2, 6,  // Results = #7
    3664             : /*6728*/                OPC_EmitConvertToTarget, 1,
    3665             : /*6730*/                OPC_EmitNodeXForm, 2, 8, // Plus1
    3666             : /*6733*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi_MM), 0,
    3667             :                             MVT::i32, 2/*#Ops*/, 0, 9,  // Results = #10
    3668             : /*6741*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    3669             :                             MVT::i32, 2/*#Ops*/, 3, 10,  // Results = #11
    3670             : /*6749*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR_MM), 0,
    3671             :                             MVT::i32, 2/*#Ops*/, 7, 11, 
    3672             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$imm, SETGT:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3673             :                         // Dst: (OR_MM:i32 (SELEQZ_MMR6:i32 i32:i32:$t, (SLTi_MM:i32 i32:i32:$cond, (Plus1:i32 (imm:i32):$imm))), (SELNEZ_MMR6:i32 i32:i32:$f, (SLTi_MM:i32 i32:i32:$cond, (Plus1:i32 (imm:i32):$imm))))
    3674             : /*6757*/              /*Scope*/ 62, /*->6820*/
    3675             : /*6758*/                OPC_CheckCondCode, ISD::SETUGT,
    3676             : /*6760*/                OPC_MoveParent,
    3677             : /*6761*/                OPC_CheckType, MVT::i32,
    3678             : /*6763*/                OPC_MoveParent,
    3679             : /*6764*/                OPC_RecordChild1, // #2 = $t
    3680             : /*6765*/                OPC_RecordChild2, // #3 = $f
    3681             : /*6766*/                OPC_CheckType, MVT::i32,
    3682             : /*6768*/                OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    3683             : /*6770*/                OPC_EmitConvertToTarget, 1,
    3684             : /*6772*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3685             : /*6775*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu_MM), 0,
    3686             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3687             : /*6783*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    3688             :                             MVT::i32, 2/*#Ops*/, 2, 6,  // Results = #7
    3689             : /*6791*/                OPC_EmitConvertToTarget, 1,
    3690             : /*6793*/                OPC_EmitNodeXForm, 2, 8, // Plus1
    3691             : /*6796*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu_MM), 0,
    3692             :                             MVT::i32, 2/*#Ops*/, 0, 9,  // Results = #10
    3693             : /*6804*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    3694             :                             MVT::i32, 2/*#Ops*/, 3, 10,  // Results = #11
    3695             : /*6812*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR_MM), 0,
    3696             :                             MVT::i32, 2/*#Ops*/, 7, 11, 
    3697             :                         // Src: (select:i32 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$imm, SETUGT:Other), i32:i32:$t, i32:i32:$f) - Complexity = 10
    3698             :                         // Dst: (OR_MM:i32 (SELEQZ_MMR6:i32 i32:i32:$t, (SLTiu_MM:i32 i32:i32:$cond, (Plus1:i32 (imm:i32):$imm))), (SELNEZ_MMR6:i32 i32:i32:$f, (SLTiu_MM:i32 i32:i32:$cond, (Plus1:i32 (imm:i32):$imm))))
    3699             : /*6820*/              0, /*End of Scope*/
    3700             : /*6821*/            /*Scope*/ 20|128,1/*148*/, /*->6971*/
    3701             : /*6823*/              OPC_CheckPredicate, 21, // Predicate_immZExt16
    3702             : /*6825*/              OPC_MoveParent,
    3703             : /*6826*/              OPC_MoveChild2,
    3704             : /*6827*/              OPC_Scope, 70, /*->6899*/ // 2 children in Scope
    3705             : /*6829*/                OPC_CheckCondCode, ISD::SETEQ,
    3706             : /*6831*/                OPC_MoveParent,
    3707             : /*6832*/                OPC_CheckType, MVT::i32,
    3708             : /*6834*/                OPC_MoveParent,
    3709             : /*6835*/                OPC_RecordChild1, // #2 = $t
    3710             : /*6836*/                OPC_RecordChild2, // #3 = $f
    3711             : /*6837*/                OPC_CheckType, MVT::i64,
    3712             : /*6839*/                OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3713             : /*6841*/                OPC_EmitConvertToTarget, 1,
    3714             : /*6843*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3715             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3716             : /*6851*/                OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3717             :                             MVT::i64, 1/*#Ops*/, 5,  // Results = #6
    3718             : /*6858*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    3719             :                             MVT::i64, 2/*#Ops*/, 2, 6,  // Results = #7
    3720             : /*6866*/                OPC_EmitConvertToTarget, 1,
    3721             : /*6868*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3722             :                             MVT::i32, 2/*#Ops*/, 0, 8,  // Results = #9
    3723             : /*6876*/                OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3724             :                             MVT::i64, 1/*#Ops*/, 9,  // Results = #10
    3725             : /*6883*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    3726             :                             MVT::i64, 2/*#Ops*/, 3, 10,  // Results = #11
    3727             : /*6891*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    3728             :                             MVT::i64, 2/*#Ops*/, 7, 11, 
    3729             :                         // Src: (select:i64 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETEQ:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    3730             :                         // Dst: (OR64:i64 (SELEQZ64:i64 i64:i64:$t, (SLL64_32:i64 (XORi:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm))), (SELNEZ64:i64 i64:i64:$f, (SLL64_32:i64 (XORi:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm))))
    3731             : /*6899*/              /*Scope*/ 70, /*->6970*/
    3732             : /*6900*/                OPC_CheckCondCode, ISD::SETNE,
    3733             : /*6902*/                OPC_MoveParent,
    3734             : /*6903*/                OPC_CheckType, MVT::i32,
    3735             : /*6905*/                OPC_MoveParent,
    3736             : /*6906*/                OPC_RecordChild1, // #2 = $t
    3737             : /*6907*/                OPC_RecordChild2, // #3 = $f
    3738             : /*6908*/                OPC_CheckType, MVT::i64,
    3739             : /*6910*/                OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3740             : /*6912*/                OPC_EmitConvertToTarget, 1,
    3741             : /*6914*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3742             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3743             : /*6922*/                OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3744             :                             MVT::i64, 1/*#Ops*/, 5,  // Results = #6
    3745             : /*6929*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    3746             :                             MVT::i64, 2/*#Ops*/, 2, 6,  // Results = #7
    3747             : /*6937*/                OPC_EmitConvertToTarget, 1,
    3748             : /*6939*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi), 0,
    3749             :                             MVT::i32, 2/*#Ops*/, 0, 8,  // Results = #9
    3750             : /*6947*/                OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    3751             :                             MVT::i64, 1/*#Ops*/, 9,  // Results = #10
    3752             : /*6954*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    3753             :                             MVT::i64, 2/*#Ops*/, 3, 10,  // Results = #11
    3754             : /*6962*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    3755             :                             MVT::i64, 2/*#Ops*/, 7, 11, 
    3756             :                         // Src: (select:i64 (setcc:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETNE:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    3757             :                         // Dst: (OR64:i64 (SELNEZ64:i64 i64:i64:$t, (SLL64_32:i64 (XORi:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm))), (SELEQZ64:i64 i64:i64:$f, (SLL64_32:i64 (XORi:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$imm))))
    3758             : /*6970*/              0, /*End of Scope*/
    3759             : /*6971*/            /*Scope*/ 28, /*->7000*/
    3760             : /*6972*/              OPC_CheckPredicate, 19, // Predicate_immSExt16
    3761             : /*6974*/              OPC_MoveParent,
    3762             : /*6975*/              OPC_MoveChild2,
    3763             : /*6976*/              OPC_CheckCondCode, ISD::SETLT,
    3764             : /*6978*/              OPC_MoveParent,
    3765             : /*6979*/              OPC_CheckType, MVT::i32,
    3766             : /*6981*/              OPC_MoveParent,
    3767             : /*6982*/              OPC_RecordChild1, // #2 = $x
    3768             : /*6983*/              OPC_RecordChild2, // #3 = $y
    3769             : /*6984*/              OPC_CheckType, MVT::i32,
    3770             : /*6986*/              OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    3771             : /*6988*/              OPC_EmitConvertToTarget, 1,
    3772             : /*6990*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBtneZSlti), 0,
    3773             :                           MVT::i32, 4/*#Ops*/, 2, 3, 0, 4, 
    3774             :                       // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, (imm:i32)<<P:Predicate_immSExt16>>:$b, SETLT:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 10
    3775             :                       // Dst: (SelTBtneZSlti:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$a, (imm:i32)<<P:Predicate_immSExt16>>:$b)
    3776             : /*7000*/            /*Scope*/ 62, /*->7063*/
    3777             : /*7001*/              OPC_CheckPredicate, 21, // Predicate_immZExt16
    3778             : /*7003*/              OPC_MoveParent,
    3779             : /*7004*/              OPC_MoveChild2,
    3780             : /*7005*/              OPC_Scope, 27, /*->7034*/ // 2 children in Scope
    3781             : /*7007*/                OPC_CheckCondCode, ISD::SETEQ,
    3782             : /*7009*/                OPC_MoveParent,
    3783             : /*7010*/                OPC_CheckType, MVT::i32,
    3784             : /*7012*/                OPC_MoveParent,
    3785             : /*7013*/                OPC_RecordChild1, // #2 = $x
    3786             : /*7014*/                OPC_RecordChild2, // #3 = $y
    3787             : /*7015*/                OPC_CheckType, MVT::i32,
    3788             : /*7017*/                OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    3789             : /*7019*/                OPC_EmitConvertToTarget, 1,
    3790             : /*7021*/                OPC_EmitNodeXForm, 3, 4, // LO16
    3791             : /*7024*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBteqZCmpi), 0,
    3792             :                             MVT::i32, 4/*#Ops*/, 2, 3, 0, 5, 
    3793             :                         // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$k, SETEQ:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 10
    3794             :                         // Dst: (SelTBteqZCmpi:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$a, (LO16:i32 (imm:i32)<<P:Predicate_immZExt16>>:$k))
    3795             : /*7034*/              /*Scope*/ 27, /*->7062*/
    3796             : /*7035*/                OPC_CheckCondCode, ISD::SETNE,
    3797             : /*7037*/                OPC_MoveParent,
    3798             : /*7038*/                OPC_CheckType, MVT::i32,
    3799             : /*7040*/                OPC_MoveParent,
    3800             : /*7041*/                OPC_RecordChild1, // #2 = $x
    3801             : /*7042*/                OPC_RecordChild2, // #3 = $y
    3802             : /*7043*/                OPC_CheckType, MVT::i32,
    3803             : /*7045*/                OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    3804             : /*7047*/                OPC_EmitConvertToTarget, 1,
    3805             : /*7049*/                OPC_EmitNodeXForm, 3, 4, // LO16
    3806             : /*7052*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBtneZCmpi), 0,
    3807             :                             MVT::i32, 4/*#Ops*/, 2, 3, 0, 5, 
    3808             :                         // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, (imm:i32)<<P:Predicate_immZExt16>><<X:LO16>>:$k, SETNE:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 10
    3809             :                         // Dst: (SelTBtneZCmpi:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$a, (LO16:i32 (imm:i32)<<P:Predicate_immZExt16>>:$k))
    3810             : /*7062*/              0, /*End of Scope*/
    3811             : /*7063*/            0, /*End of Scope*/
    3812             : /*7064*/          0, /*End of Scope*/
    3813             : /*7065*/        /*Scope*/ 82|128,7/*978*/, /*->8045*/
    3814             : /*7067*/          OPC_CheckChild0Type, MVT::i64,
    3815             : /*7069*/          OPC_Scope, 118, /*->7189*/ // 5 children in Scope
    3816             : /*7071*/            OPC_MoveChild1,
    3817             : /*7072*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3818             : /*7075*/            OPC_CheckPredicate, 22, // Predicate_immz
    3819             : /*7077*/            OPC_MoveParent,
    3820             : /*7078*/            OPC_MoveChild2,
    3821             : /*7079*/            OPC_Scope, 26, /*->7107*/ // 4 children in Scope
    3822             : /*7081*/              OPC_CheckCondCode, ISD::SETNE,
    3823             : /*7083*/              OPC_MoveParent,
    3824             : /*7084*/              OPC_CheckType, MVT::i32,
    3825             : /*7086*/              OPC_MoveParent,
    3826             : /*7087*/              OPC_RecordChild1, // #1 = $t
    3827             : /*7088*/              OPC_MoveChild2,
    3828             : /*7089*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3829             : /*7092*/              OPC_CheckPredicate, 22, // Predicate_immz
    3830             : /*7094*/              OPC_MoveParent,
    3831             : /*7095*/              OPC_CheckType, MVT::i64,
    3832             : /*7097*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3833             : /*7099*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ64), 0,
    3834             :                           MVT::i64, 2/*#Ops*/, 1, 0, 
    3835             :                       // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immz>>, SETNE:Other), i64:i64:$t, (imm:i64)<<P:Predicate_immz>>) - Complexity = 14
    3836             :                       // Dst: (SELNEZ64:i64 i64:i64:$t, i64:i64:$cond)
    3837             : /*7107*/            /*Scope*/ 26, /*->7134*/
    3838             : /*7108*/              OPC_CheckCondCode, ISD::SETEQ,
    3839             : /*7110*/              OPC_MoveParent,
    3840             : /*7111*/              OPC_CheckType, MVT::i32,
    3841             : /*7113*/              OPC_MoveParent,
    3842             : /*7114*/              OPC_RecordChild1, // #1 = $t
    3843             : /*7115*/              OPC_MoveChild2,
    3844             : /*7116*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3845             : /*7119*/              OPC_CheckPredicate, 22, // Predicate_immz
    3846             : /*7121*/              OPC_MoveParent,
    3847             : /*7122*/              OPC_CheckType, MVT::i64,
    3848             : /*7124*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3849             : /*7126*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ64), 0,
    3850             :                           MVT::i64, 2/*#Ops*/, 1, 0, 
    3851             :                       // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immz>>, SETEQ:Other), i64:i64:$t, (imm:i64)<<P:Predicate_immz>>) - Complexity = 14
    3852             :                       // Dst: (SELEQZ64:i64 i64:i64:$t, i64:i64:$cond)
    3853             : /*7134*/            /*Scope*/ 26, /*->7161*/
    3854             : /*7135*/              OPC_CheckCondCode, ISD::SETNE,
    3855             : /*7137*/              OPC_MoveParent,
    3856             : /*7138*/              OPC_CheckType, MVT::i32,
    3857             : /*7140*/              OPC_MoveParent,
    3858             : /*7141*/              OPC_MoveChild1,
    3859             : /*7142*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3860             : /*7145*/              OPC_CheckPredicate, 22, // Predicate_immz
    3861             : /*7147*/              OPC_MoveParent,
    3862             : /*7148*/              OPC_RecordChild2, // #1 = $f
    3863             : /*7149*/              OPC_CheckType, MVT::i64,
    3864             : /*7151*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3865             : /*7153*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ64), 0,
    3866             :                           MVT::i64, 2/*#Ops*/, 1, 0, 
    3867             :                       // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immz>>, SETNE:Other), (imm:i64)<<P:Predicate_immz>>, i64:i64:$f) - Complexity = 14
    3868             :                       // Dst: (SELEQZ64:i64 i64:i64:$f, i64:i64:$cond)
    3869             : /*7161*/            /*Scope*/ 26, /*->7188*/
    3870             : /*7162*/              OPC_CheckCondCode, ISD::SETEQ,
    3871             : /*7164*/              OPC_MoveParent,
    3872             : /*7165*/              OPC_CheckType, MVT::i32,
    3873             : /*7167*/              OPC_MoveParent,
    3874             : /*7168*/              OPC_MoveChild1,
    3875             : /*7169*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3876             : /*7172*/              OPC_CheckPredicate, 22, // Predicate_immz
    3877             : /*7174*/              OPC_MoveParent,
    3878             : /*7175*/              OPC_RecordChild2, // #1 = $f
    3879             : /*7176*/              OPC_CheckType, MVT::i64,
    3880             : /*7178*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    3881             : /*7180*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ64), 0,
    3882             :                           MVT::i64, 2/*#Ops*/, 1, 0, 
    3883             :                       // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immz>>, SETEQ:Other), (imm:i64)<<P:Predicate_immz>>, i64:i64:$f) - Complexity = 14
    3884             :                       // Dst: (SELNEZ64:i64 i64:i64:$f, i64:i64:$cond)
    3885             : /*7188*/            0, /*End of Scope*/
    3886             : /*7189*/          /*Scope*/ 79, /*->7269*/
    3887             : /*7190*/            OPC_CheckChild1Integer, 0, 
    3888             : /*7192*/            OPC_MoveChild2,
    3889             : /*7193*/            OPC_Scope, 36, /*->7231*/ // 2 children in Scope
    3890             : /*7195*/              OPC_CheckCondCode, ISD::SETEQ,
    3891             : /*7197*/              OPC_MoveParent,
    3892             : /*7198*/              OPC_CheckType, MVT::i32,
    3893             : /*7200*/              OPC_MoveParent,
    3894             : /*7201*/              OPC_RecordChild1, // #1 = $T
    3895             : /*7202*/              OPC_RecordChild2, // #2 = $F
    3896             : /*7203*/              OPC_SwitchType /*2 cases */, 11, MVT::i32,// ->7217
    3897             : /*7206*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3898             : /*7208*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_I), 0,
    3899             :                             MVT::i32, 3/*#Ops*/, 1, 0, 2, 
    3900             :                         // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, 0:i64, SETEQ:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 11
    3901             :                         // Dst: (MOVZ_I64_I:i32 GPR32:i32:$T, GPR64:i64:$lhs, GPR32:i32:$F)
    3902             : /*7217*/              /*SwitchType*/ 11, MVT::i64,// ->7230
    3903             : /*7219*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3904             : /*7221*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_I64), 0,
    3905             :                             MVT::i64, 3/*#Ops*/, 1, 0, 2, 
    3906             :                         // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, 0:i64, SETEQ:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 11
    3907             :                         // Dst: (MOVZ_I64_I64:i64 GPR64:i64:$T, GPR64:i64:$lhs, GPR64:i64:$F)
    3908             : /*7230*/              0, // EndSwitchType
    3909             : /*7231*/            /*Scope*/ 36, /*->7268*/
    3910             : /*7232*/              OPC_CheckCondCode, ISD::SETNE,
    3911             : /*7234*/              OPC_MoveParent,
    3912             : /*7235*/              OPC_CheckType, MVT::i32,
    3913             : /*7237*/              OPC_MoveParent,
    3914             : /*7238*/              OPC_RecordChild1, // #1 = $T
    3915             : /*7239*/              OPC_RecordChild2, // #2 = $F
    3916             : /*7240*/              OPC_SwitchType /*2 cases */, 11, MVT::i32,// ->7254
    3917             : /*7243*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3918             : /*7245*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_I), 0,
    3919             :                             MVT::i32, 3/*#Ops*/, 1, 0, 2, 
    3920             :                         // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, 0:i64, SETNE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 11
    3921             :                         // Dst: (MOVN_I64_I:i32 GPR32:i32:$T, GPR64:i64:$lhs, GPR32:i32:$F)
    3922             : /*7254*/              /*SwitchType*/ 11, MVT::i64,// ->7267
    3923             : /*7256*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3924             : /*7258*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_I64), 0,
    3925             :                             MVT::i64, 3/*#Ops*/, 1, 0, 2, 
    3926             :                         // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, 0:i64, SETNE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 11
    3927             :                         // Dst: (MOVN_I64_I64:i64 GPR64:i64:$T, GPR64:i64:$lhs, GPR64:i64:$F)
    3928             : /*7267*/              0, // EndSwitchType
    3929             : /*7268*/            0, /*End of Scope*/
    3930             : /*7269*/          /*Scope*/ 108|128,2/*364*/, /*->7635*/
    3931             : /*7271*/            OPC_RecordChild1, // #1 = $rhs
    3932             : /*7272*/            OPC_MoveChild1,
    3933             : /*7273*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    3934             : /*7276*/            OPC_Scope, 70, /*->7348*/ // 5 children in Scope
    3935             : /*7278*/              OPC_CheckPredicate, 19, // Predicate_immSExt16
    3936             : /*7280*/              OPC_MoveParent,
    3937             : /*7281*/              OPC_MoveChild2,
    3938             : /*7282*/              OPC_Scope, 31, /*->7315*/ // 2 children in Scope
    3939             : /*7284*/                OPC_CheckCondCode, ISD::SETGE,
    3940             : /*7286*/                OPC_MoveParent,
    3941             : /*7287*/                OPC_CheckType, MVT::i32,
    3942             : /*7289*/                OPC_MoveParent,
    3943             : /*7290*/                OPC_RecordChild1, // #2 = $T
    3944             : /*7291*/                OPC_RecordChild2, // #3 = $F
    3945             : /*7292*/                OPC_CheckType, MVT::i32,
    3946             : /*7294*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3947             : /*7296*/                OPC_EmitConvertToTarget, 1,
    3948             : /*7298*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    3949             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3950             : /*7306*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3951             :                             MVT::i32, 3/*#Ops*/, 2, 5, 3, 
    3952             :                         // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    3953             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTi64:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs), GPR32:i32:$F)
    3954             : /*7315*/              /*Scope*/ 31, /*->7347*/
    3955             : /*7316*/                OPC_CheckCondCode, ISD::SETUGE,
    3956             : /*7318*/                OPC_MoveParent,
    3957             : /*7319*/                OPC_CheckType, MVT::i32,
    3958             : /*7321*/                OPC_MoveParent,
    3959             : /*7322*/                OPC_RecordChild1, // #2 = $T
    3960             : /*7323*/                OPC_RecordChild2, // #3 = $F
    3961             : /*7324*/                OPC_CheckType, MVT::i32,
    3962             : /*7326*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3963             : /*7328*/                OPC_EmitConvertToTarget, 1,
    3964             : /*7330*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    3965             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    3966             : /*7338*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3967             :                             MVT::i32, 3/*#Ops*/, 2, 5, 3, 
    3968             :                         // Src: (select:i32 (setcc:i32 GPR64:i64:$lh, (imm:i64)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    3969             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTiu64:i32 GPR64:i64:$lh, (imm:i64)<<P:Predicate_immSExt16>>:$rh), GPR32:i32:$F)
    3970             : /*7347*/              0, /*End of Scope*/
    3971             : /*7348*/            /*Scope*/ 76, /*->7425*/
    3972             : /*7349*/              OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    3973             : /*7351*/              OPC_MoveParent,
    3974             : /*7352*/              OPC_MoveChild2,
    3975             : /*7353*/              OPC_Scope, 34, /*->7389*/ // 2 children in Scope
    3976             : /*7355*/                OPC_CheckCondCode, ISD::SETGT,
    3977             : /*7357*/                OPC_MoveParent,
    3978             : /*7358*/                OPC_CheckType, MVT::i32,
    3979             : /*7360*/                OPC_MoveParent,
    3980             : /*7361*/                OPC_RecordChild1, // #2 = $T
    3981             : /*7362*/                OPC_RecordChild2, // #3 = $F
    3982             : /*7363*/                OPC_CheckType, MVT::i32,
    3983             : /*7365*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    3984             : /*7367*/                OPC_EmitConvertToTarget, 1,
    3985             : /*7369*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    3986             : /*7372*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    3987             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    3988             : /*7380*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    3989             :                             MVT::i32, 3/*#Ops*/, 2, 6, 3, 
    3990             :                         // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    3991             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTi64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), GPR32:i32:$F)
    3992             : /*7389*/              /*Scope*/ 34, /*->7424*/
    3993             : /*7390*/                OPC_CheckCondCode, ISD::SETUGT,
    3994             : /*7392*/                OPC_MoveParent,
    3995             : /*7393*/                OPC_CheckType, MVT::i32,
    3996             : /*7395*/                OPC_MoveParent,
    3997             : /*7396*/                OPC_RecordChild1, // #2 = $T
    3998             : /*7397*/                OPC_RecordChild2, // #3 = $F
    3999             : /*7398*/                OPC_CheckType, MVT::i32,
    4000             : /*7400*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4001             : /*7402*/                OPC_EmitConvertToTarget, 1,
    4002             : /*7404*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    4003             : /*7407*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    4004             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    4005             : /*7415*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4006             :                             MVT::i32, 3/*#Ops*/, 2, 6, 3, 
    4007             :                         // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    4008             :                         // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTiu64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), GPR32:i32:$F)
    4009             : /*7424*/              0, /*End of Scope*/
    4010             : /*7425*/            /*Scope*/ 70, /*->7496*/
    4011             : /*7426*/              OPC_CheckPredicate, 19, // Predicate_immSExt16
    4012             : /*7428*/              OPC_MoveParent,
    4013             : /*7429*/              OPC_MoveChild2,
    4014             : /*7430*/              OPC_Scope, 31, /*->7463*/ // 2 children in Scope
    4015             : /*7432*/                OPC_CheckCondCode, ISD::SETGE,
    4016             : /*7434*/                OPC_MoveParent,
    4017             : /*7435*/                OPC_CheckType, MVT::i32,
    4018             : /*7437*/                OPC_MoveParent,
    4019             : /*7438*/                OPC_RecordChild1, // #2 = $T
    4020             : /*7439*/                OPC_RecordChild2, // #3 = $F
    4021             : /*7440*/                OPC_CheckType, MVT::i64,
    4022             : /*7442*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4023             : /*7444*/                OPC_EmitConvertToTarget, 1,
    4024             : /*7446*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    4025             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    4026             : /*7454*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4027             :                             MVT::i64, 3/*#Ops*/, 2, 5, 3, 
    4028             :                         // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    4029             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTi64:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs), GPR64:i64:$F)
    4030             : /*7463*/              /*Scope*/ 31, /*->7495*/
    4031             : /*7464*/                OPC_CheckCondCode, ISD::SETUGE,
    4032             : /*7466*/                OPC_MoveParent,
    4033             : /*7467*/                OPC_CheckType, MVT::i32,
    4034             : /*7469*/                OPC_MoveParent,
    4035             : /*7470*/                OPC_RecordChild1, // #2 = $T
    4036             : /*7471*/                OPC_RecordChild2, // #3 = $F
    4037             : /*7472*/                OPC_CheckType, MVT::i64,
    4038             : /*7474*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4039             : /*7476*/                OPC_EmitConvertToTarget, 1,
    4040             : /*7478*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    4041             :                             MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    4042             : /*7486*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4043             :                             MVT::i64, 3/*#Ops*/, 2, 5, 3, 
    4044             :                         // Src: (select:i64 (setcc:i32 GPR64:i64:$lh, (imm:i64)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    4045             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTiu64:i32 GPR64:i64:$lh, (imm:i64)<<P:Predicate_immSExt16>>:$rh), GPR64:i64:$F)
    4046             : /*7495*/              0, /*End of Scope*/
    4047             : /*7496*/            /*Scope*/ 76, /*->7573*/
    4048             : /*7497*/              OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    4049             : /*7499*/              OPC_MoveParent,
    4050             : /*7500*/              OPC_MoveChild2,
    4051             : /*7501*/              OPC_Scope, 34, /*->7537*/ // 2 children in Scope
    4052             : /*7503*/                OPC_CheckCondCode, ISD::SETGT,
    4053             : /*7505*/                OPC_MoveParent,
    4054             : /*7506*/                OPC_CheckType, MVT::i32,
    4055             : /*7508*/                OPC_MoveParent,
    4056             : /*7509*/                OPC_RecordChild1, // #2 = $T
    4057             : /*7510*/                OPC_RecordChild2, // #3 = $F
    4058             : /*7511*/                OPC_CheckType, MVT::i64,
    4059             : /*7513*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4060             : /*7515*/                OPC_EmitConvertToTarget, 1,
    4061             : /*7517*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    4062             : /*7520*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    4063             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    4064             : /*7528*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4065             :                             MVT::i64, 3/*#Ops*/, 2, 6, 3, 
    4066             :                         // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    4067             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTi64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), GPR64:i64:$F)
    4068             : /*7537*/              /*Scope*/ 34, /*->7572*/
    4069             : /*7538*/                OPC_CheckCondCode, ISD::SETUGT,
    4070             : /*7540*/                OPC_MoveParent,
    4071             : /*7541*/                OPC_CheckType, MVT::i32,
    4072             : /*7543*/                OPC_MoveParent,
    4073             : /*7544*/                OPC_RecordChild1, // #2 = $T
    4074             : /*7545*/                OPC_RecordChild2, // #3 = $F
    4075             : /*7546*/                OPC_CheckType, MVT::i64,
    4076             : /*7548*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4077             : /*7550*/                OPC_EmitConvertToTarget, 1,
    4078             : /*7552*/                OPC_EmitNodeXForm, 2, 4, // Plus1
    4079             : /*7555*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    4080             :                             MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    4081             : /*7563*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4082             :                             MVT::i64, 3/*#Ops*/, 2, 6, 3, 
    4083             :                         // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    4084             :                         // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTiu64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), GPR64:i64:$F)
    4085             : /*7572*/              0, /*End of Scope*/
    4086             : /*7573*/            /*Scope*/ 60, /*->7634*/
    4087             : /*7574*/              OPC_CheckPredicate, 21, // Predicate_immZExt16
    4088             : /*7576*/              OPC_MoveParent,
    4089             : /*7577*/              OPC_MoveChild2,
    4090             : /*7578*/              OPC_CheckCondCode, ISD::SETEQ,
    4091             : /*7580*/              OPC_MoveParent,
    4092             : /*7581*/              OPC_CheckType, MVT::i32,
    4093             : /*7583*/              OPC_MoveParent,
    4094             : /*7584*/              OPC_RecordChild1, // #2 = $T
    4095             : /*7585*/              OPC_RecordChild2, // #3 = $F
    4096             : /*7586*/              OPC_SwitchType /*2 cases */, 21, MVT::i32,// ->7610
    4097             : /*7589*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4098             : /*7591*/                OPC_EmitConvertToTarget, 1,
    4099             : /*7593*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi64), 0,
    4100             :                             MVT::i64, 2/*#Ops*/, 0, 4,  // Results = #5
    4101             : /*7601*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_I), 0,
    4102             :                             MVT::i32, 3/*#Ops*/, 2, 5, 3, 
    4103             :                         // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 10
    4104             :                         // Dst: (MOVZ_I64_I:i32 GPR32:i32:$T, (XORi64:i64 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16), GPR32:i32:$F)
    4105             : /*7610*/              /*SwitchType*/ 21, MVT::i64,// ->7633
    4106             : /*7612*/                OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4107             : /*7614*/                OPC_EmitConvertToTarget, 1,
    4108             : /*7616*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi64), 0,
    4109             :                             MVT::i64, 2/*#Ops*/, 0, 4,  // Results = #5
    4110             : /*7624*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_I64), 0,
    4111             :                             MVT::i64, 3/*#Ops*/, 2, 5, 3, 
    4112             :                         // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 10
    4113             :                         // Dst: (MOVZ_I64_I64:i64 GPR64:i64:$T, (XORi64:i64 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16), GPR64:i64:$F)
    4114             : /*7633*/              0, // EndSwitchType
    4115             : /*7634*/            0, /*End of Scope*/
    4116             : /*7635*/          /*Scope*/ 84, /*->7720*/
    4117             : /*7636*/            OPC_MoveChild1,
    4118             : /*7637*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4119             : /*7640*/            OPC_CheckPredicate, 22, // Predicate_immz
    4120             : /*7642*/            OPC_MoveParent,
    4121             : /*7643*/            OPC_MoveChild2,
    4122             : /*7644*/            OPC_Scope, 36, /*->7682*/ // 2 children in Scope
    4123             : /*7646*/              OPC_CheckCondCode, ISD::SETEQ,
    4124             : /*7648*/              OPC_MoveParent,
    4125             : /*7649*/              OPC_CheckType, MVT::i32,
    4126             : /*7651*/              OPC_MoveParent,
    4127             : /*7652*/              OPC_RecordChild1, // #1 = $t
    4128             : /*7653*/              OPC_RecordChild2, // #2 = $f
    4129             : /*7654*/              OPC_CheckType, MVT::i64,
    4130             : /*7656*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4131             : /*7658*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    4132             :                           MVT::i64, 2/*#Ops*/, 1, 0,  // Results = #3
    4133             : /*7666*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    4134             :                           MVT::i64, 2/*#Ops*/, 2, 0,  // Results = #4
    4135             : /*7674*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    4136             :                           MVT::i64, 2/*#Ops*/, 3, 4, 
    4137             :                       // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immz>>, SETEQ:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    4138             :                       // Dst: (OR64:i64 (SELEQZ64:i64 i64:i64:$t, i64:i64:$cond), (SELNEZ64:i64 i64:i64:$f, i64:i64:$cond))
    4139             : /*7682*/            /*Scope*/ 36, /*->7719*/
    4140             : /*7683*/              OPC_CheckCondCode, ISD::SETNE,
    4141             : /*7685*/              OPC_MoveParent,
    4142             : /*7686*/              OPC_CheckType, MVT::i32,
    4143             : /*7688*/              OPC_MoveParent,
    4144             : /*7689*/              OPC_RecordChild1, // #1 = $t
    4145             : /*7690*/              OPC_RecordChild2, // #2 = $f
    4146             : /*7691*/              OPC_CheckType, MVT::i64,
    4147             : /*7693*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4148             : /*7695*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    4149             :                           MVT::i64, 2/*#Ops*/, 1, 0,  // Results = #3
    4150             : /*7703*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    4151             :                           MVT::i64, 2/*#Ops*/, 2, 0,  // Results = #4
    4152             : /*7711*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    4153             :                           MVT::i64, 2/*#Ops*/, 3, 4, 
    4154             :                       // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immz>>, SETNE:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    4155             :                       // Dst: (OR64:i64 (SELNEZ64:i64 i64:i64:$t, i64:i64:$cond), (SELEQZ64:i64 i64:i64:$f, i64:i64:$cond))
    4156             : /*7719*/            0, /*End of Scope*/
    4157             : /*7720*/          /*Scope*/ 66|128,2/*322*/, /*->8044*/
    4158             : /*7722*/            OPC_RecordChild1, // #1 = $imm
    4159             : /*7723*/            OPC_MoveChild1,
    4160             : /*7724*/            OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4161             : /*7727*/            OPC_Scope, 120, /*->7849*/ // 2 children in Scope
    4162             : /*7729*/              OPC_CheckPredicate, 23, // Predicate_immZExt16_64
    4163             : /*7731*/              OPC_MoveParent,
    4164             : /*7732*/              OPC_MoveChild2,
    4165             : /*7733*/              OPC_Scope, 56, /*->7791*/ // 2 children in Scope
    4166             : /*7735*/                OPC_CheckCondCode, ISD::SETEQ,
    4167             : /*7737*/                OPC_MoveParent,
    4168             : /*7738*/                OPC_CheckType, MVT::i32,
    4169             : /*7740*/                OPC_MoveParent,
    4170             : /*7741*/                OPC_RecordChild1, // #2 = $t
    4171             : /*7742*/                OPC_RecordChild2, // #3 = $f
    4172             : /*7743*/                OPC_CheckType, MVT::i64,
    4173             : /*7745*/                OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4174             : /*7747*/                OPC_EmitConvertToTarget, 1,
    4175             : /*7749*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi64), 0,
    4176             :                             MVT::i64, 2/*#Ops*/, 0, 4,  // Results = #5
    4177             : /*7757*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    4178             :                             MVT::i64, 2/*#Ops*/, 2, 5,  // Results = #6
    4179             : /*7765*/                OPC_EmitConvertToTarget, 1,
    4180             : /*7767*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi64), 0,
    4181             :                             MVT::i64, 2/*#Ops*/, 0, 7,  // Results = #8
    4182             : /*7775*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    4183             :                             MVT::i64, 2/*#Ops*/, 3, 8,  // Results = #9
    4184             : /*7783*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    4185             :                             MVT::i64, 2/*#Ops*/, 6, 9, 
    4186             :                         // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immZExt16_64>>:$imm, SETEQ:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    4187             :                         // Dst: (OR64:i64 (SELEQZ64:i64 i64:i64:$t, (XORi64:i64 i64:i64:$cond, (imm:i64)<<P:Predicate_immZExt16_64>>:$imm)), (SELNEZ64:i64 i64:i64:$f, (XORi64:i64 i64:i64:$cond, (imm:i64)<<P:Predicate_immZExt16_64>>:$imm)))
    4188             : /*7791*/              /*Scope*/ 56, /*->7848*/
    4189             : /*7792*/                OPC_CheckCondCode, ISD::SETNE,
    4190             : /*7794*/                OPC_MoveParent,
    4191             : /*7795*/                OPC_CheckType, MVT::i32,
    4192             : /*7797*/                OPC_MoveParent,
    4193             : /*7798*/                OPC_RecordChild1, // #2 = $t
    4194             : /*7799*/                OPC_RecordChild2, // #3 = $f
    4195             : /*7800*/                OPC_CheckType, MVT::i64,
    4196             : /*7802*/                OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4197             : /*7804*/                OPC_EmitConvertToTarget, 1,
    4198             : /*7806*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi64), 0,
    4199             :                             MVT::i64, 2/*#Ops*/, 0, 4,  // Results = #5
    4200             : /*7814*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    4201             :                             MVT::i64, 2/*#Ops*/, 2, 5,  // Results = #6
    4202             : /*7822*/                OPC_EmitConvertToTarget, 1,
    4203             : /*7824*/                OPC_EmitNode1, TARGET_VAL(Mips::XORi64), 0,
    4204             :                             MVT::i64, 2/*#Ops*/, 0, 7,  // Results = #8
    4205             : /*7832*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    4206             :                             MVT::i64, 2/*#Ops*/, 3, 8,  // Results = #9
    4207             : /*7840*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    4208             :                             MVT::i64, 2/*#Ops*/, 6, 9, 
    4209             :                         // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immZExt16_64>>:$imm, SETNE:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    4210             :                         // Dst: (OR64:i64 (SELNEZ64:i64 i64:i64:$t, (XORi64:i64 i64:i64:$cond, (imm:i64)<<P:Predicate_immZExt16_64>>:$imm)), (SELEQZ64:i64 i64:i64:$f, (XORi64:i64 i64:i64:$cond, (imm:i64)<<P:Predicate_immZExt16_64>>:$imm)))
    4211             : /*7848*/              0, /*End of Scope*/
    4212             : /*7849*/            /*Scope*/ 64|128,1/*192*/, /*->8043*/
    4213             : /*7851*/              OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    4214             : /*7853*/              OPC_MoveParent,
    4215             : /*7854*/              OPC_MoveChild2,
    4216             : /*7855*/              OPC_Scope, 92, /*->7949*/ // 2 children in Scope
    4217             : /*7857*/                OPC_CheckCondCode, ISD::SETGT,
    4218             : /*7859*/                OPC_MoveParent,
    4219             : /*7860*/                OPC_CheckType, MVT::i32,
    4220             : /*7862*/                OPC_MoveParent,
    4221             : /*7863*/                OPC_RecordChild1, // #2 = $t
    4222             : /*7864*/                OPC_RecordChild2, // #3 = $f
    4223             : /*7865*/                OPC_CheckType, MVT::i64,
    4224             : /*7867*/                OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4225             : /*7869*/                OPC_EmitInteger, MVT::i64, 0, 
    4226             : /*7872*/                OPC_EmitConvertToTarget, 1,
    4227             : /*7874*/                OPC_EmitNodeXForm, 2, 5, // Plus1
    4228             : /*7877*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    4229             :                             MVT::i32, 2/*#Ops*/, 0, 6,  // Results = #7
    4230             : /*7885*/                OPC_EmitInteger, MVT::i32, Mips::sub_32,
    4231             : /*7888*/                OPC_EmitNode1, TARGET_VAL(TargetOpcode::SUBREG_TO_REG), 0,
    4232             :                             MVT::i64, 3/*#Ops*/, 4, 7, 8,  // Results = #9
    4233             : /*7897*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    4234             :                             MVT::i64, 2/*#Ops*/, 2, 9,  // Results = #10
    4235             : /*7905*/                OPC_EmitInteger, MVT::i64, 0, 
    4236             : /*7908*/                OPC_EmitConvertToTarget, 1,
    4237             : /*7910*/                OPC_EmitNodeXForm, 2, 12, // Plus1
    4238             : /*7913*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    4239             :                             MVT::i32, 2/*#Ops*/, 0, 13,  // Results = #14
    4240             : /*7921*/                OPC_EmitInteger, MVT::i32, Mips::sub_32,
    4241             : /*7924*/                OPC_EmitNode1, TARGET_VAL(TargetOpcode::SUBREG_TO_REG), 0,
    4242             :                             MVT::i64, 3/*#Ops*/, 11, 14, 15,  // Results = #16
    4243             : /*7933*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    4244             :                             MVT::i64, 2/*#Ops*/, 3, 16,  // Results = #17
    4245             : /*7941*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    4246             :                             MVT::i64, 2/*#Ops*/, 10, 17, 
    4247             :                         // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$imm, SETGT:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    4248             :                         // Dst: (OR64:i64 (SELEQZ64:i64 i64:i64:$t, (SUBREG_TO_REG:i64 0:i64, (SLTi64:i32 i64:i64:$cond, (Plus1:i64 (imm:i64):$imm)), sub_32:i32)), (SELNEZ64:i64 i64:i64:$f, (SUBREG_TO_REG:i64 0:i64, (SLTi64:i32 i64:i64:$cond, (Plus1:i64 (imm:i64):$imm)), sub_32:i32)))
    4249             : /*7949*/              /*Scope*/ 92, /*->8042*/
    4250             : /*7950*/                OPC_CheckCondCode, ISD::SETUGT,
    4251             : /*7952*/                OPC_MoveParent,
    4252             : /*7953*/                OPC_CheckType, MVT::i32,
    4253             : /*7955*/                OPC_MoveParent,
    4254             : /*7956*/                OPC_RecordChild1, // #2 = $t
    4255             : /*7957*/                OPC_RecordChild2, // #3 = $f
    4256             : /*7958*/                OPC_CheckType, MVT::i64,
    4257             : /*7960*/                OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4258             : /*7962*/                OPC_EmitInteger, MVT::i64, 0, 
    4259             : /*7965*/                OPC_EmitConvertToTarget, 1,
    4260             : /*7967*/                OPC_EmitNodeXForm, 2, 5, // Plus1
    4261             : /*7970*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    4262             :                             MVT::i32, 2/*#Ops*/, 0, 6,  // Results = #7
    4263             : /*7978*/                OPC_EmitInteger, MVT::i32, Mips::sub_32,
    4264             : /*7981*/                OPC_EmitNode1, TARGET_VAL(TargetOpcode::SUBREG_TO_REG), 0,
    4265             :                             MVT::i64, 3/*#Ops*/, 4, 7, 8,  // Results = #9
    4266             : /*7990*/                OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    4267             :                             MVT::i64, 2/*#Ops*/, 2, 9,  // Results = #10
    4268             : /*7998*/                OPC_EmitInteger, MVT::i64, 0, 
    4269             : /*8001*/                OPC_EmitConvertToTarget, 1,
    4270             : /*8003*/                OPC_EmitNodeXForm, 2, 12, // Plus1
    4271             : /*8006*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    4272             :                             MVT::i32, 2/*#Ops*/, 0, 13,  // Results = #14
    4273             : /*8014*/                OPC_EmitInteger, MVT::i32, Mips::sub_32,
    4274             : /*8017*/                OPC_EmitNode1, TARGET_VAL(TargetOpcode::SUBREG_TO_REG), 0,
    4275             :                             MVT::i64, 3/*#Ops*/, 11, 14, 15,  // Results = #16
    4276             : /*8026*/                OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    4277             :                             MVT::i64, 2/*#Ops*/, 3, 16,  // Results = #17
    4278             : /*8034*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    4279             :                             MVT::i64, 2/*#Ops*/, 10, 17, 
    4280             :                         // Src: (select:i64 (setcc:i32 i64:i64:$cond, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$imm, SETUGT:Other), i64:i64:$t, i64:i64:$f) - Complexity = 10
    4281             :                         // Dst: (OR64:i64 (SELEQZ64:i64 i64:i64:$t, (SUBREG_TO_REG:i64 0:i64, (SLTiu64:i32 i64:i64:$cond, (Plus1:i64 (imm:i64):$imm)), sub_32:i32)), (SELNEZ64:i64 i64:i64:$f, (SUBREG_TO_REG:i64 0:i64, (SLTiu64:i32 i64:i64:$cond, (Plus1:i64 (imm:i64):$imm)), sub_32:i32)))
    4282             : /*8042*/              0, /*End of Scope*/
    4283             : /*8043*/            0, /*End of Scope*/
    4284             : /*8044*/          0, /*End of Scope*/
    4285             : /*8045*/        0, /*End of Scope*/
    4286             : /*8046*/      /*Scope*/ 17|128,1/*145*/, /*->8193*/
    4287             : /*8048*/        OPC_RecordChild0, // #0 = $cond
    4288             : /*8049*/        OPC_CheckChild0Type, MVT::i32,
    4289             : /*8051*/        OPC_Scope, 20, /*->8073*/ // 6 children in Scope
    4290             : /*8053*/          OPC_RecordChild1, // #1 = $t
    4291             : /*8054*/          OPC_MoveChild2,
    4292             : /*8055*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4293             : /*8058*/          OPC_CheckPredicate, 22, // Predicate_immz
    4294             : /*8060*/          OPC_MoveParent,
    4295             : /*8061*/          OPC_CheckType, MVT::i32,
    4296             : /*8063*/          OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    4297             : /*8065*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ), 0,
    4298             :                       MVT::i32, 2/*#Ops*/, 1, 0, 
    4299             :                   // Src: (select:i32 i32:i32:$cond, i32:i32:$t, (imm:i32)<<P:Predicate_immz>>) - Complexity = 7
    4300             :                   // Dst: (SELNEZ:i32 i32:i32:$t, i32:i32:$cond)
    4301             : /*8073*/        /*Scope*/ 20, /*->8094*/
    4302             : /*8074*/          OPC_MoveChild1,
    4303             : /*8075*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4304             : /*8078*/          OPC_CheckPredicate, 22, // Predicate_immz
    4305             : /*8080*/          OPC_MoveParent,
    4306             : /*8081*/          OPC_RecordChild2, // #1 = $f
    4307             : /*8082*/          OPC_CheckType, MVT::i32,
    4308             : /*8084*/          OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    4309             : /*8086*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ), 0,
    4310             :                       MVT::i32, 2/*#Ops*/, 1, 0, 
    4311             :                   // Src: (select:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, i32:i32:$f) - Complexity = 7
    4312             :                   // Dst: (SELEQZ:i32 i32:i32:$f, i32:i32:$cond)
    4313             : /*8094*/        /*Scope*/ 20, /*->8115*/
    4314             : /*8095*/          OPC_RecordChild1, // #1 = $t
    4315             : /*8096*/          OPC_MoveChild2,
    4316             : /*8097*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4317             : /*8100*/          OPC_CheckPredicate, 22, // Predicate_immz
    4318             : /*8102*/          OPC_MoveParent,
    4319             : /*8103*/          OPC_CheckType, MVT::i32,
    4320             : /*8105*/          OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    4321             : /*8107*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    4322             :                       MVT::i32, 2/*#Ops*/, 1, 0, 
    4323             :                   // Src: (select:i32 i32:i32:$cond, i32:i32:$t, (imm:i32)<<P:Predicate_immz>>) - Complexity = 7
    4324             :                   // Dst: (SELNEZ_MMR6:i32 i32:i32:$t, i32:i32:$cond)
    4325             : /*8115*/        /*Scope*/ 20, /*->8136*/
    4326             : /*8116*/          OPC_MoveChild1,
    4327             : /*8117*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4328             : /*8120*/          OPC_CheckPredicate, 22, // Predicate_immz
    4329             : /*8122*/          OPC_MoveParent,
    4330             : /*8123*/          OPC_RecordChild2, // #1 = $f
    4331             : /*8124*/          OPC_CheckType, MVT::i32,
    4332             : /*8126*/          OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    4333             : /*8128*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    4334             :                       MVT::i32, 2/*#Ops*/, 1, 0, 
    4335             :                   // Src: (select:i32 i32:i32:$cond, (imm:i32)<<P:Predicate_immz>>, i32:i32:$f) - Complexity = 7
    4336             :                   // Dst: (SELEQZ_MMR6:i32 i32:i32:$f, i32:i32:$cond)
    4337             : /*8136*/        /*Scope*/ 27, /*->8164*/
    4338             : /*8137*/          OPC_RecordChild1, // #1 = $t
    4339             : /*8138*/          OPC_MoveChild2,
    4340             : /*8139*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4341             : /*8142*/          OPC_CheckPredicate, 22, // Predicate_immz
    4342             : /*8144*/          OPC_MoveParent,
    4343             : /*8145*/          OPC_CheckType, MVT::i64,
    4344             : /*8147*/          OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4345             : /*8149*/          OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    4346             :                       MVT::i64, 1/*#Ops*/, 0,  // Results = #2
    4347             : /*8156*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::SELNEZ64), 0,
    4348             :                       MVT::i64, 2/*#Ops*/, 1, 2, 
    4349             :                   // Src: (select:i64 i32:i32:$cond, i64:i64:$t, (imm:i64)<<P:Predicate_immz>>) - Complexity = 7
    4350             :                   // Dst: (SELNEZ64:i64 i64:i64:$t, (SLL64_32:i64 i32:i32:$cond))
    4351             : /*8164*/        /*Scope*/ 27, /*->8192*/
    4352             : /*8165*/          OPC_MoveChild1,
    4353             : /*8166*/          OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    4354             : /*8169*/          OPC_CheckPredicate, 22, // Predicate_immz
    4355             : /*8171*/          OPC_MoveParent,
    4356             : /*8172*/          OPC_RecordChild2, // #1 = $f
    4357             : /*8173*/          OPC_CheckType, MVT::i64,
    4358             : /*8175*/          OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4359             : /*8177*/          OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    4360             :                       MVT::i64, 1/*#Ops*/, 0,  // Results = #2
    4361             : /*8184*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::SELEQZ64), 0,
    4362             :                       MVT::i64, 2/*#Ops*/, 1, 2, 
    4363             :                   // Src: (select:i64 i32:i32:$cond, (imm:i64)<<P:Predicate_immz>>, i64:i64:$f) - Complexity = 7
    4364             :                   // Dst: (SELEQZ64:i64 i64:i64:$f, (SLL64_32:i64 i32:i32:$cond))
    4365             : /*8192*/        0, /*End of Scope*/
    4366             : /*8193*/      /*Scope*/ 10|128,7/*906*/, /*->9101*/
    4367             : /*8195*/        OPC_MoveChild0,
    4368             : /*8196*/        OPC_CheckOpcode, TARGET_VAL(ISD::SETCC),
    4369             : /*8199*/        OPC_RecordChild0, // #0 = $lhs
    4370             : /*8200*/        OPC_Scope, 31|128,4/*543*/, /*->8746*/ // 2 children in Scope
    4371             : /*8203*/          OPC_CheckChild0Type, MVT::i32,
    4372             : /*8205*/          OPC_RecordChild1, // #1 = $rhs
    4373             : /*8206*/          OPC_MoveChild2,
    4374             : /*8207*/          OPC_Scope, 29, /*->8238*/ // 19 children in Scope
    4375             : /*8209*/            OPC_CheckCondCode, ISD::SETGE,
    4376             : /*8211*/            OPC_MoveParent,
    4377             : /*8212*/            OPC_CheckType, MVT::i32,
    4378             : /*8214*/            OPC_MoveParent,
    4379             : /*8215*/            OPC_RecordChild1, // #2 = $T
    4380             : /*8216*/            OPC_RecordChild2, // #3 = $F
    4381             : /*8217*/            OPC_CheckType, MVT::i32,
    4382             : /*8219*/            OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4383             : /*8221*/            OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    4384             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4385             : /*8229*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4386             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4387             :                     // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETGE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4388             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLT:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), GPR32:i32:$F)
    4389             : /*8238*/          /*Scope*/ 29, /*->8268*/
    4390             : /*8239*/            OPC_CheckCondCode, ISD::SETUGE,
    4391             : /*8241*/            OPC_MoveParent,
    4392             : /*8242*/            OPC_CheckType, MVT::i32,
    4393             : /*8244*/            OPC_MoveParent,
    4394             : /*8245*/            OPC_RecordChild1, // #2 = $T
    4395             : /*8246*/            OPC_RecordChild2, // #3 = $F
    4396             : /*8247*/            OPC_CheckType, MVT::i32,
    4397             : /*8249*/            OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4398             : /*8251*/            OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    4399             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4400             : /*8259*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4401             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4402             :                     // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETUGE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4403             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTu:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), GPR32:i32:$F)
    4404             : /*8268*/          /*Scope*/ 29, /*->8298*/
    4405             : /*8269*/            OPC_CheckCondCode, ISD::SETLE,
    4406             : /*8271*/            OPC_MoveParent,
    4407             : /*8272*/            OPC_CheckType, MVT::i32,
    4408             : /*8274*/            OPC_MoveParent,
    4409             : /*8275*/            OPC_RecordChild1, // #2 = $T
    4410             : /*8276*/            OPC_RecordChild2, // #3 = $F
    4411             : /*8277*/            OPC_CheckType, MVT::i32,
    4412             : /*8279*/            OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4413             : /*8281*/            OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    4414             :                         MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    4415             : /*8289*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4416             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4417             :                     // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETLE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4418             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLT:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), GPR32:i32:$F)
    4419             : /*8298*/          /*Scope*/ 29, /*->8328*/
    4420             : /*8299*/            OPC_CheckCondCode, ISD::SETULE,
    4421             : /*8301*/            OPC_MoveParent,
    4422             : /*8302*/            OPC_CheckType, MVT::i32,
    4423             : /*8304*/            OPC_MoveParent,
    4424             : /*8305*/            OPC_RecordChild1, // #2 = $T
    4425             : /*8306*/            OPC_RecordChild2, // #3 = $F
    4426             : /*8307*/            OPC_CheckType, MVT::i32,
    4427             : /*8309*/            OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4428             : /*8311*/            OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    4429             :                         MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    4430             : /*8319*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4431             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4432             :                     // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETULE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4433             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTu:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), GPR32:i32:$F)
    4434             : /*8328*/          /*Scope*/ 29, /*->8358*/
    4435             : /*8329*/            OPC_CheckCondCode, ISD::SETEQ,
    4436             : /*8331*/            OPC_MoveParent,
    4437             : /*8332*/            OPC_CheckType, MVT::i32,
    4438             : /*8334*/            OPC_MoveParent,
    4439             : /*8335*/            OPC_RecordChild1, // #2 = $T
    4440             : /*8336*/            OPC_RecordChild2, // #3 = $F
    4441             : /*8337*/            OPC_CheckType, MVT::i32,
    4442             : /*8339*/            OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4443             : /*8341*/            OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    4444             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4445             : /*8349*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4446             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4447             :                     // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETEQ:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4448             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), GPR32:i32:$F)
    4449             : /*8358*/          /*Scope*/ 29, /*->8388*/
    4450             : /*8359*/            OPC_CheckCondCode, ISD::SETGE,
    4451             : /*8361*/            OPC_MoveParent,
    4452             : /*8362*/            OPC_CheckType, MVT::i32,
    4453             : /*8364*/            OPC_MoveParent,
    4454             : /*8365*/            OPC_RecordChild1, // #2 = $T
    4455             : /*8366*/            OPC_RecordChild2, // #3 = $F
    4456             : /*8367*/            OPC_CheckType, MVT::i64,
    4457             : /*8369*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4458             : /*8371*/            OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    4459             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4460             : /*8379*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4461             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4462             :                     // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETGE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4463             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLT:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), GPR64:i64:$F)
    4464             : /*8388*/          /*Scope*/ 29, /*->8418*/
    4465             : /*8389*/            OPC_CheckCondCode, ISD::SETUGE,
    4466             : /*8391*/            OPC_MoveParent,
    4467             : /*8392*/            OPC_CheckType, MVT::i32,
    4468             : /*8394*/            OPC_MoveParent,
    4469             : /*8395*/            OPC_RecordChild1, // #2 = $T
    4470             : /*8396*/            OPC_RecordChild2, // #3 = $F
    4471             : /*8397*/            OPC_CheckType, MVT::i64,
    4472             : /*8399*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4473             : /*8401*/            OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    4474             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4475             : /*8409*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4476             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4477             :                     // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETUGE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4478             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTu:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), GPR64:i64:$F)
    4479             : /*8418*/          /*Scope*/ 29, /*->8448*/
    4480             : /*8419*/            OPC_CheckCondCode, ISD::SETLE,
    4481             : /*8421*/            OPC_MoveParent,
    4482             : /*8422*/            OPC_CheckType, MVT::i32,
    4483             : /*8424*/            OPC_MoveParent,
    4484             : /*8425*/            OPC_RecordChild1, // #2 = $T
    4485             : /*8426*/            OPC_RecordChild2, // #3 = $F
    4486             : /*8427*/            OPC_CheckType, MVT::i64,
    4487             : /*8429*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4488             : /*8431*/            OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    4489             :                         MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    4490             : /*8439*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4491             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4492             :                     // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETLE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4493             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLT:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), GPR64:i64:$F)
    4494             : /*8448*/          /*Scope*/ 29, /*->8478*/
    4495             : /*8449*/            OPC_CheckCondCode, ISD::SETULE,
    4496             : /*8451*/            OPC_MoveParent,
    4497             : /*8452*/            OPC_CheckType, MVT::i32,
    4498             : /*8454*/            OPC_MoveParent,
    4499             : /*8455*/            OPC_RecordChild1, // #2 = $T
    4500             : /*8456*/            OPC_RecordChild2, // #3 = $F
    4501             : /*8457*/            OPC_CheckType, MVT::i64,
    4502             : /*8459*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4503             : /*8461*/            OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    4504             :                         MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    4505             : /*8469*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4506             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4507             :                     // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETULE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4508             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTu:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), GPR64:i64:$F)
    4509             : /*8478*/          /*Scope*/ 29, /*->8508*/
    4510             : /*8479*/            OPC_CheckCondCode, ISD::SETEQ,
    4511             : /*8481*/            OPC_MoveParent,
    4512             : /*8482*/            OPC_CheckType, MVT::i32,
    4513             : /*8484*/            OPC_MoveParent,
    4514             : /*8485*/            OPC_RecordChild1, // #2 = $T
    4515             : /*8486*/            OPC_RecordChild2, // #3 = $F
    4516             : /*8487*/            OPC_CheckType, MVT::i64,
    4517             : /*8489*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4518             : /*8491*/            OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    4519             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4520             : /*8499*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4521             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4522             :                     // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETEQ:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4523             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), GPR64:i64:$F)
    4524             : /*8508*/          /*Scope*/ 52, /*->8561*/
    4525             : /*8509*/            OPC_CheckCondCode, ISD::SETNE,
    4526             : /*8511*/            OPC_MoveParent,
    4527             : /*8512*/            OPC_CheckType, MVT::i32,
    4528             : /*8514*/            OPC_MoveParent,
    4529             : /*8515*/            OPC_RecordChild1, // #2 = $T
    4530             : /*8516*/            OPC_RecordChild2, // #3 = $F
    4531             : /*8517*/            OPC_SwitchType /*2 cases */, 19, MVT::i32,// ->8539
    4532             : /*8520*/              OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4533             : /*8522*/              OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    4534             :                           MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4535             : /*8530*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_I), 0,
    4536             :                           MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4537             :                       // Src: (select:i32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETNE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4538             :                       // Dst: (MOVN_I_I:i32 GPR32:i32:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), GPR32:i32:$F)
    4539             : /*8539*/            /*SwitchType*/ 19, MVT::i64,// ->8560
    4540             : /*8541*/              OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4541             : /*8543*/              OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    4542             :                           MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4543             : /*8551*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_I64), 0,
    4544             :                           MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4545             :                       // Src: (select:i64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETNE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4546             :                       // Dst: (MOVN_I_I64:i64 GPR64:i64:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), GPR64:i64:$F)
    4547             : /*8560*/            0, // EndSwitchType
    4548             : /*8561*/          /*Scope*/ 22, /*->8584*/
    4549             : /*8562*/            OPC_CheckCondCode, ISD::SETGE,
    4550             : /*8564*/            OPC_MoveParent,
    4551             : /*8565*/            OPC_CheckType, MVT::i32,
    4552             : /*8567*/            OPC_MoveParent,
    4553             : /*8568*/            OPC_RecordChild1, // #2 = $x
    4554             : /*8569*/            OPC_RecordChild2, // #3 = $y
    4555             : /*8570*/            OPC_CheckType, MVT::i32,
    4556             : /*8572*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4557             : /*8574*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBteqZSlt), 0,
    4558             :                         MVT::i32, 4/*#Ops*/, 2, 3, 0, 1, 
    4559             :                     // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$b, SETGE:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 6
    4560             :                     // Dst: (SelTBteqZSlt:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$a, CPU16Regs:i32:$b)
    4561             : /*8584*/          /*Scope*/ 22, /*->8607*/
    4562             : /*8585*/            OPC_CheckCondCode, ISD::SETGT,
    4563             : /*8587*/            OPC_MoveParent,
    4564             : /*8588*/            OPC_CheckType, MVT::i32,
    4565             : /*8590*/            OPC_MoveParent,
    4566             : /*8591*/            OPC_RecordChild1, // #2 = $x
    4567             : /*8592*/            OPC_RecordChild2, // #3 = $y
    4568             : /*8593*/            OPC_CheckType, MVT::i32,
    4569             : /*8595*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4570             : /*8597*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBtneZSlt), 0,
    4571             :                         MVT::i32, 4/*#Ops*/, 2, 3, 1, 0, 
    4572             :                     // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$b, SETGT:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 6
    4573             :                     // Dst: (SelTBtneZSlt:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$b, CPU16Regs:i32:$a)
    4574             : /*8607*/          /*Scope*/ 22, /*->8630*/
    4575             : /*8608*/            OPC_CheckCondCode, ISD::SETUGE,
    4576             : /*8610*/            OPC_MoveParent,
    4577             : /*8611*/            OPC_CheckType, MVT::i32,
    4578             : /*8613*/            OPC_MoveParent,
    4579             : /*8614*/            OPC_RecordChild1, // #2 = $x
    4580             : /*8615*/            OPC_RecordChild2, // #3 = $y
    4581             : /*8616*/            OPC_CheckType, MVT::i32,
    4582             : /*8618*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4583             : /*8620*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBteqZSltu), 0,
    4584             :                         MVT::i32, 4/*#Ops*/, 2, 3, 0, 1, 
    4585             :                     // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$b, SETUGE:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 6
    4586             :                     // Dst: (SelTBteqZSltu:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$a, CPU16Regs:i32:$b)
    4587             : /*8630*/          /*Scope*/ 22, /*->8653*/
    4588             : /*8631*/            OPC_CheckCondCode, ISD::SETUGT,
    4589             : /*8633*/            OPC_MoveParent,
    4590             : /*8634*/            OPC_CheckType, MVT::i32,
    4591             : /*8636*/            OPC_MoveParent,
    4592             : /*8637*/            OPC_RecordChild1, // #2 = $x
    4593             : /*8638*/            OPC_RecordChild2, // #3 = $y
    4594             : /*8639*/            OPC_CheckType, MVT::i32,
    4595             : /*8641*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4596             : /*8643*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBtneZSltu), 0,
    4597             :                         MVT::i32, 4/*#Ops*/, 2, 3, 1, 0, 
    4598             :                     // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$b, SETUGT:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 6
    4599             :                     // Dst: (SelTBtneZSltu:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$b, CPU16Regs:i32:$a)
    4600             : /*8653*/          /*Scope*/ 22, /*->8676*/
    4601             : /*8654*/            OPC_CheckCondCode, ISD::SETLE,
    4602             : /*8656*/            OPC_MoveParent,
    4603             : /*8657*/            OPC_CheckType, MVT::i32,
    4604             : /*8659*/            OPC_MoveParent,
    4605             : /*8660*/            OPC_RecordChild1, // #2 = $x
    4606             : /*8661*/            OPC_RecordChild2, // #3 = $y
    4607             : /*8662*/            OPC_CheckType, MVT::i32,
    4608             : /*8664*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4609             : /*8666*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBteqZSlt), 0,
    4610             :                         MVT::i32, 4/*#Ops*/, 2, 3, 1, 0, 
    4611             :                     // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$b, SETLE:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 6
    4612             :                     // Dst: (SelTBteqZSlt:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$b, CPU16Regs:i32:$a)
    4613             : /*8676*/          /*Scope*/ 22, /*->8699*/
    4614             : /*8677*/            OPC_CheckCondCode, ISD::SETULE,
    4615             : /*8679*/            OPC_MoveParent,
    4616             : /*8680*/            OPC_CheckType, MVT::i32,
    4617             : /*8682*/            OPC_MoveParent,
    4618             : /*8683*/            OPC_RecordChild1, // #2 = $x
    4619             : /*8684*/            OPC_RecordChild2, // #3 = $y
    4620             : /*8685*/            OPC_CheckType, MVT::i32,
    4621             : /*8687*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4622             : /*8689*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBteqZSltu), 0,
    4623             :                         MVT::i32, 4/*#Ops*/, 2, 3, 1, 0, 
    4624             :                     // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$b, SETULE:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 6
    4625             :                     // Dst: (SelTBteqZSltu:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$b, CPU16Regs:i32:$a)
    4626             : /*8699*/          /*Scope*/ 22, /*->8722*/
    4627             : /*8700*/            OPC_CheckCondCode, ISD::SETEQ,
    4628             : /*8702*/            OPC_MoveParent,
    4629             : /*8703*/            OPC_CheckType, MVT::i32,
    4630             : /*8705*/            OPC_MoveParent,
    4631             : /*8706*/            OPC_RecordChild1, // #2 = $x
    4632             : /*8707*/            OPC_RecordChild2, // #3 = $y
    4633             : /*8708*/            OPC_CheckType, MVT::i32,
    4634             : /*8710*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4635             : /*8712*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBteqZCmp), 0,
    4636             :                         MVT::i32, 4/*#Ops*/, 2, 3, 1, 0, 
    4637             :                     // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$b, SETEQ:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 6
    4638             :                     // Dst: (SelTBteqZCmp:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$b, CPU16Regs:i32:$a)
    4639             : /*8722*/          /*Scope*/ 22, /*->8745*/
    4640             : /*8723*/            OPC_CheckCondCode, ISD::SETNE,
    4641             : /*8725*/            OPC_MoveParent,
    4642             : /*8726*/            OPC_CheckType, MVT::i32,
    4643             : /*8728*/            OPC_MoveParent,
    4644             : /*8729*/            OPC_RecordChild1, // #2 = $x
    4645             : /*8730*/            OPC_RecordChild2, // #3 = $y
    4646             : /*8731*/            OPC_CheckType, MVT::i32,
    4647             : /*8733*/            OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4648             : /*8735*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::SelTBtneZCmp), 0,
    4649             :                         MVT::i32, 4/*#Ops*/, 2, 3, 1, 0, 
    4650             :                     // Src: (select:i32 (setcc:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$b, SETNE:Other), CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 6
    4651             :                     // Dst: (SelTBtneZCmp:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$b, CPU16Regs:i32:$a)
    4652             : /*8745*/          0, /*End of Scope*/
    4653             : /*8746*/        /*Scope*/ 96|128,2/*352*/, /*->9100*/
    4654             : /*8748*/          OPC_CheckChild0Type, MVT::i64,
    4655             : /*8750*/          OPC_RecordChild1, // #1 = $rhs
    4656             : /*8751*/          OPC_MoveChild2,
    4657             : /*8752*/          OPC_Scope, 29, /*->8783*/ // 10 children in Scope
    4658             : /*8754*/            OPC_CheckCondCode, ISD::SETGE,
    4659             : /*8756*/            OPC_MoveParent,
    4660             : /*8757*/            OPC_CheckType, MVT::i32,
    4661             : /*8759*/            OPC_MoveParent,
    4662             : /*8760*/            OPC_RecordChild1, // #2 = $T
    4663             : /*8761*/            OPC_RecordChild2, // #3 = $F
    4664             : /*8762*/            OPC_CheckType, MVT::i32,
    4665             : /*8764*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4666             : /*8766*/            OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    4667             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4668             : /*8774*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4669             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4670             :                     // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETGE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4671             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLT64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), GPR32:i32:$F)
    4672             : /*8783*/          /*Scope*/ 29, /*->8813*/
    4673             : /*8784*/            OPC_CheckCondCode, ISD::SETUGE,
    4674             : /*8786*/            OPC_MoveParent,
    4675             : /*8787*/            OPC_CheckType, MVT::i32,
    4676             : /*8789*/            OPC_MoveParent,
    4677             : /*8790*/            OPC_RecordChild1, // #2 = $T
    4678             : /*8791*/            OPC_RecordChild2, // #3 = $F
    4679             : /*8792*/            OPC_CheckType, MVT::i32,
    4680             : /*8794*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4681             : /*8796*/            OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    4682             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4683             : /*8804*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4684             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4685             :                     // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETUGE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4686             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTu64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), GPR32:i32:$F)
    4687             : /*8813*/          /*Scope*/ 29, /*->8843*/
    4688             : /*8814*/            OPC_CheckCondCode, ISD::SETLE,
    4689             : /*8816*/            OPC_MoveParent,
    4690             : /*8817*/            OPC_CheckType, MVT::i32,
    4691             : /*8819*/            OPC_MoveParent,
    4692             : /*8820*/            OPC_RecordChild1, // #2 = $T
    4693             : /*8821*/            OPC_RecordChild2, // #3 = $F
    4694             : /*8822*/            OPC_CheckType, MVT::i32,
    4695             : /*8824*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4696             : /*8826*/            OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    4697             :                         MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    4698             : /*8834*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4699             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4700             :                     // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETLE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4701             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLT64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), GPR32:i32:$F)
    4702             : /*8843*/          /*Scope*/ 29, /*->8873*/
    4703             : /*8844*/            OPC_CheckCondCode, ISD::SETULE,
    4704             : /*8846*/            OPC_MoveParent,
    4705             : /*8847*/            OPC_CheckType, MVT::i32,
    4706             : /*8849*/            OPC_MoveParent,
    4707             : /*8850*/            OPC_RecordChild1, // #2 = $T
    4708             : /*8851*/            OPC_RecordChild2, // #3 = $F
    4709             : /*8852*/            OPC_CheckType, MVT::i32,
    4710             : /*8854*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4711             : /*8856*/            OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    4712             :                         MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    4713             : /*8864*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I), 0,
    4714             :                         MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4715             :                     // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETULE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4716             :                     // Dst: (MOVZ_I_I:i32 GPR32:i32:$T, (SLTu64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), GPR32:i32:$F)
    4717             : /*8873*/          /*Scope*/ 29, /*->8903*/
    4718             : /*8874*/            OPC_CheckCondCode, ISD::SETGE,
    4719             : /*8876*/            OPC_MoveParent,
    4720             : /*8877*/            OPC_CheckType, MVT::i32,
    4721             : /*8879*/            OPC_MoveParent,
    4722             : /*8880*/            OPC_RecordChild1, // #2 = $T
    4723             : /*8881*/            OPC_RecordChild2, // #3 = $F
    4724             : /*8882*/            OPC_CheckType, MVT::i64,
    4725             : /*8884*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4726             : /*8886*/            OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    4727             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4728             : /*8894*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4729             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4730             :                     // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETGE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4731             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLT64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), GPR64:i64:$F)
    4732             : /*8903*/          /*Scope*/ 29, /*->8933*/
    4733             : /*8904*/            OPC_CheckCondCode, ISD::SETUGE,
    4734             : /*8906*/            OPC_MoveParent,
    4735             : /*8907*/            OPC_CheckType, MVT::i32,
    4736             : /*8909*/            OPC_MoveParent,
    4737             : /*8910*/            OPC_RecordChild1, // #2 = $T
    4738             : /*8911*/            OPC_RecordChild2, // #3 = $F
    4739             : /*8912*/            OPC_CheckType, MVT::i64,
    4740             : /*8914*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4741             : /*8916*/            OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    4742             :                         MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    4743             : /*8924*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4744             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4745             :                     // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETUGE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4746             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTu64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), GPR64:i64:$F)
    4747             : /*8933*/          /*Scope*/ 29, /*->8963*/
    4748             : /*8934*/            OPC_CheckCondCode, ISD::SETLE,
    4749             : /*8936*/            OPC_MoveParent,
    4750             : /*8937*/            OPC_CheckType, MVT::i32,
    4751             : /*8939*/            OPC_MoveParent,
    4752             : /*8940*/            OPC_RecordChild1, // #2 = $T
    4753             : /*8941*/            OPC_RecordChild2, // #3 = $F
    4754             : /*8942*/            OPC_CheckType, MVT::i64,
    4755             : /*8944*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4756             : /*8946*/            OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    4757             :                         MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    4758             : /*8954*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4759             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4760             :                     // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETLE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4761             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLT64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), GPR64:i64:$F)
    4762             : /*8963*/          /*Scope*/ 29, /*->8993*/
    4763             : /*8964*/            OPC_CheckCondCode, ISD::SETULE,
    4764             : /*8966*/            OPC_MoveParent,
    4765             : /*8967*/            OPC_CheckType, MVT::i32,
    4766             : /*8969*/            OPC_MoveParent,
    4767             : /*8970*/            OPC_RecordChild1, // #2 = $T
    4768             : /*8971*/            OPC_RecordChild2, // #3 = $F
    4769             : /*8972*/            OPC_CheckType, MVT::i64,
    4770             : /*8974*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4771             : /*8976*/            OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    4772             :                         MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    4773             : /*8984*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_I64), 0,
    4774             :                         MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4775             :                     // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETULE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4776             :                     // Dst: (MOVZ_I_I64:i64 GPR64:i64:$T, (SLTu64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), GPR64:i64:$F)
    4777             : /*8993*/          /*Scope*/ 52, /*->9046*/
    4778             : /*8994*/            OPC_CheckCondCode, ISD::SETEQ,
    4779             : /*8996*/            OPC_MoveParent,
    4780             : /*8997*/            OPC_CheckType, MVT::i32,
    4781             : /*8999*/            OPC_MoveParent,
    4782             : /*9000*/            OPC_RecordChild1, // #2 = $T
    4783             : /*9001*/            OPC_RecordChild2, // #3 = $F
    4784             : /*9002*/            OPC_SwitchType /*2 cases */, 19, MVT::i32,// ->9024
    4785             : /*9005*/              OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4786             : /*9007*/              OPC_EmitNode1, TARGET_VAL(Mips::XOR64), 0,
    4787             :                           MVT::i64, 2/*#Ops*/, 0, 1,  // Results = #4
    4788             : /*9015*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_I), 0,
    4789             :                           MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4790             :                       // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETEQ:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4791             :                       // Dst: (MOVZ_I64_I:i32 GPR32:i32:$T, (XOR64:i64 GPR64:i64:$lhs, GPR64:i64:$rhs), GPR32:i32:$F)
    4792             : /*9024*/            /*SwitchType*/ 19, MVT::i64,// ->9045
    4793             : /*9026*/              OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4794             : /*9028*/              OPC_EmitNode1, TARGET_VAL(Mips::XOR64), 0,
    4795             :                           MVT::i64, 2/*#Ops*/, 0, 1,  // Results = #4
    4796             : /*9036*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_I64), 0,
    4797             :                           MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4798             :                       // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETEQ:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4799             :                       // Dst: (MOVZ_I64_I64:i64 GPR64:i64:$T, (XOR64:i64 GPR64:i64:$lhs, GPR64:i64:$rhs), GPR64:i64:$F)
    4800             : /*9045*/            0, // EndSwitchType
    4801             : /*9046*/          /*Scope*/ 52, /*->9099*/
    4802             : /*9047*/            OPC_CheckCondCode, ISD::SETNE,
    4803             : /*9049*/            OPC_MoveParent,
    4804             : /*9050*/            OPC_CheckType, MVT::i32,
    4805             : /*9052*/            OPC_MoveParent,
    4806             : /*9053*/            OPC_RecordChild1, // #2 = $T
    4807             : /*9054*/            OPC_RecordChild2, // #3 = $F
    4808             : /*9055*/            OPC_SwitchType /*2 cases */, 19, MVT::i32,// ->9077
    4809             : /*9058*/              OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4810             : /*9060*/              OPC_EmitNode1, TARGET_VAL(Mips::XOR64), 0,
    4811             :                           MVT::i64, 2/*#Ops*/, 0, 1,  // Results = #4
    4812             : /*9068*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_I), 0,
    4813             :                           MVT::i32, 3/*#Ops*/, 2, 4, 3, 
    4814             :                       // Src: (select:i32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETNE:Other), GPR32:i32:$T, GPR32:i32:$F) - Complexity = 6
    4815             :                       // Dst: (MOVN_I64_I:i32 GPR32:i32:$T, (XOR64:i64 GPR64:i64:$lhs, GPR64:i64:$rhs), GPR32:i32:$F)
    4816             : /*9077*/            /*SwitchType*/ 19, MVT::i64,// ->9098
    4817             : /*9079*/              OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4818             : /*9081*/              OPC_EmitNode1, TARGET_VAL(Mips::XOR64), 0,
    4819             :                           MVT::i64, 2/*#Ops*/, 0, 1,  // Results = #4
    4820             : /*9089*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_I64), 0,
    4821             :                           MVT::i64, 3/*#Ops*/, 2, 4, 3, 
    4822             :                       // Src: (select:i64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETNE:Other), GPR64:i64:$T, GPR64:i64:$F) - Complexity = 6
    4823             :                       // Dst: (MOVN_I64_I64:i64 GPR64:i64:$T, (XOR64:i64 GPR64:i64:$lhs, GPR64:i64:$rhs), GPR64:i64:$F)
    4824             : /*9098*/            0, // EndSwitchType
    4825             : /*9099*/          0, /*End of Scope*/
    4826             : /*9100*/        0, /*End of Scope*/
    4827             : /*9101*/      /*Scope*/ 109|128,1/*237*/, /*->9340*/
    4828             : /*9103*/        OPC_RecordChild0, // #0 = $cond
    4829             : /*9104*/        OPC_Scope, 41|128,1/*169*/, /*->9276*/ // 2 children in Scope
    4830             : /*9107*/          OPC_CheckChild0Type, MVT::i32,
    4831             : /*9109*/          OPC_RecordChild1, // #1 = $T
    4832             : /*9110*/          OPC_RecordChild2, // #2 = $F
    4833             : /*9111*/          OPC_SwitchType /*2 cases */, 92, MVT::i32,// ->9206
    4834             : /*9114*/            OPC_Scope, 11, /*->9127*/ // 5 children in Scope
    4835             : /*9116*/              OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4836             : /*9118*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_I), 0,
    4837             :                           MVT::i32, 3/*#Ops*/, 1, 0, 2, 
    4838             :                       // Src: (select:i32 GPR32:i32:$cond, GPR32:i32:$T, GPR32:i32:$F) - Complexity = 3
    4839             :                       // Dst: (MOVN_I_I:i32 GPR32:i32:$T, GPR32:i32:$cond, GPR32:i32:$F)
    4840             : /*9127*/            /*Scope*/ 26, /*->9154*/
    4841             : /*9128*/              OPC_CheckPatternPredicate, 31, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    4842             : /*9130*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ), 0,
    4843             :                           MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #3
    4844             : /*9138*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ), 0,
    4845             :                           MVT::i32, 2/*#Ops*/, 2, 0,  // Results = #4
    4846             : /*9146*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR), 0,
    4847             :                           MVT::i32, 2/*#Ops*/, 3, 4, 
    4848             :                       // Src: (select:i32 i32:i32:$cond, i32:i32:$t, i32:i32:$f) - Complexity = 3
    4849             :                       // Dst: (OR:i32 (SELNEZ:i32 i32:i32:$t, i32:i32:$cond), (SELEQZ:i32 i32:i32:$f, i32:i32:$cond))
    4850             : /*9154*/            /*Scope*/ 26, /*->9181*/
    4851             : /*9155*/              OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    4852             : /*9157*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ_MMR6), 0,
    4853             :                           MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #3
    4854             : /*9165*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ_MMR6), 0,
    4855             :                           MVT::i32, 2/*#Ops*/, 2, 0,  // Results = #4
    4856             : /*9173*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR_MM), 0,
    4857             :                           MVT::i32, 2/*#Ops*/, 3, 4, 
    4858             :                       // Src: (select:i32 i32:i32:$cond, i32:i32:$t, i32:i32:$f) - Complexity = 3
    4859             :                       // Dst: (OR_MM:i32 (SELNEZ_MMR6:i32 i32:i32:$t, i32:i32:$cond), (SELEQZ_MMR6:i32 i32:i32:$f, i32:i32:$cond))
    4860             : /*9181*/            /*Scope*/ 11, /*->9193*/
    4861             : /*9182*/              OPC_CheckPatternPredicate, 35, // (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips4_32())
    4862             : /*9184*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::PseudoSELECT_I), 0,
    4863             :                           MVT::i32, 3/*#Ops*/, 0, 1, 2, 
    4864             :                       // Src: (select:i32 GPR32Opnd:i32:$cond, GPR32Opnd:i32:$T, GPR32Opnd:i32:$F) - Complexity = 3
    4865             :                       // Dst: (PseudoSELECT_I:i32 GPR32Opnd:i32:$cond, GPR32Opnd:i32:$T, GPR32Opnd:i32:$F)
    4866             : /*9193*/            /*Scope*/ 11, /*->9205*/
    4867             : /*9194*/              OPC_CheckPatternPredicate, 14, // (Subtarget->inMips16Mode())
    4868             : /*9196*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::SelBneZ), 0,
    4869             :                           MVT::i32, 3/*#Ops*/, 1, 2, 0, 
    4870             :                       // Src: (select:i32 CPU16Regs:i32:$a, CPU16Regs:i32:$x, CPU16Regs:i32:$y) - Complexity = 3
    4871             :                       // Dst: (SelBneZ:i32 CPU16Regs:i32:$x, CPU16Regs:i32:$y, CPU16Regs:i32:$a)
    4872             : /*9205*/            0, /*End of Scope*/
    4873             : /*9206*/          /*SwitchType*/ 67, MVT::i64,// ->9275
    4874             : /*9208*/            OPC_Scope, 11, /*->9221*/ // 3 children in Scope
    4875             : /*9210*/              OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4876             : /*9212*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_I64), 0,
    4877             :                           MVT::i64, 3/*#Ops*/, 1, 0, 2, 
    4878             :                       // Src: (select:i64 GPR32:i32:$cond, GPR64:i64:$T, GPR64:i64:$F) - Complexity = 3
    4879             :                       // Dst: (MOVN_I_I64:i64 GPR64:i64:$T, GPR32:i32:$cond, GPR64:i64:$F)
    4880             : /*9221*/            /*Scope*/ 40, /*->9262*/
    4881             : /*9222*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4882             : /*9224*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    4883             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #3
    4884             : /*9231*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    4885             :                           MVT::i64, 2/*#Ops*/, 1, 3,  // Results = #4
    4886             : /*9239*/              OPC_EmitNode1, TARGET_VAL(Mips::SLL64_32), 0,
    4887             :                           MVT::i64, 1/*#Ops*/, 0,  // Results = #5
    4888             : /*9246*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    4889             :                           MVT::i64, 2/*#Ops*/, 2, 5,  // Results = #6
    4890             : /*9254*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    4891             :                           MVT::i64, 2/*#Ops*/, 4, 6, 
    4892             :                       // Src: (select:i64 i32:i32:$cond, i64:i64:$t, i64:i64:$f) - Complexity = 3
    4893             :                       // Dst: (OR64:i64 (SELNEZ64:i64 i64:i64:$t, (SLL64_32:i64 i32:i32:$cond)), (SELEQZ64:i64 i64:i64:$f, (SLL64_32:i64 i32:i32:$cond)))
    4894             : /*9262*/            /*Scope*/ 11, /*->9274*/
    4895             : /*9263*/              OPC_CheckPatternPredicate, 35, // (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips4_32())
    4896             : /*9265*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::PseudoSELECT_I64), 0,
    4897             :                           MVT::i64, 3/*#Ops*/, 0, 1, 2, 
    4898             :                       // Src: (select:i64 GPR32Opnd:i32:$cond, GPR64Opnd:i64:$T, GPR64Opnd:i64:$F) - Complexity = 3
    4899             :                       // Dst: (PseudoSELECT_I64:i64 GPR32Opnd:i32:$cond, GPR64Opnd:i64:$T, GPR64Opnd:i64:$F)
    4900             : /*9274*/            0, /*End of Scope*/
    4901             : /*9275*/          0, // EndSwitchType
    4902             : /*9276*/        /*Scope*/ 62, /*->9339*/
    4903             : /*9277*/          OPC_CheckChild0Type, MVT::i64,
    4904             : /*9279*/          OPC_RecordChild1, // #1 = $T
    4905             : /*9280*/          OPC_RecordChild2, // #2 = $F
    4906             : /*9281*/          OPC_SwitchType /*2 cases */, 11, MVT::i32,// ->9295
    4907             : /*9284*/            OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4908             : /*9286*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_I), 0,
    4909             :                         MVT::i32, 3/*#Ops*/, 1, 0, 2, 
    4910             :                     // Src: (select:i32 GPR64:i64:$cond, GPR32:i32:$T, GPR32:i32:$F) - Complexity = 3
    4911             :                     // Dst: (MOVN_I64_I:i32 GPR32:i32:$T, GPR64:i64:$cond, GPR32:i32:$F)
    4912             : /*9295*/          /*SwitchType*/ 41, MVT::i64,// ->9338
    4913             : /*9297*/            OPC_Scope, 11, /*->9310*/ // 2 children in Scope
    4914             : /*9299*/              OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4915             : /*9301*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_I64), 0,
    4916             :                           MVT::i64, 3/*#Ops*/, 1, 0, 2, 
    4917             :                       // Src: (select:i64 GPR64:i64:$cond, GPR64:i64:$T, GPR64:i64:$F) - Complexity = 3
    4918             :                       // Dst: (MOVN_I64_I64:i64 GPR64:i64:$T, GPR64:i64:$cond, GPR64:i64:$F)
    4919             : /*9310*/            /*Scope*/ 26, /*->9337*/
    4920             : /*9311*/              OPC_CheckPatternPredicate, 32, // (Subtarget->hasMips64r6()) && (Subtarget->hasStandardEncoding())
    4921             : /*9313*/              OPC_EmitNode1, TARGET_VAL(Mips::SELNEZ64), 0,
    4922             :                           MVT::i64, 2/*#Ops*/, 1, 0,  // Results = #3
    4923             : /*9321*/              OPC_EmitNode1, TARGET_VAL(Mips::SELEQZ64), 0,
    4924             :                           MVT::i64, 2/*#Ops*/, 2, 0,  // Results = #4
    4925             : /*9329*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::OR64), 0,
    4926             :                           MVT::i64, 2/*#Ops*/, 3, 4, 
    4927             :                       // Src: (select:i64 i64:i64:$cond, i64:i64:$t, i64:i64:$f) - Complexity = 3
    4928             :                       // Dst: (OR64:i64 (SELNEZ64:i64 i64:i64:$t, i64:i64:$cond), (SELEQZ64:i64 i64:i64:$f, i64:i64:$cond))
    4929             : /*9337*/            0, /*End of Scope*/
    4930             : /*9338*/          0, // EndSwitchType
    4931             : /*9339*/        0, /*End of Scope*/
    4932             : /*9340*/      /*Scope*/ 8|128,15/*1928*/, /*->11270*/
    4933             : /*9342*/        OPC_MoveChild0,
    4934             : /*9343*/        OPC_CheckOpcode, TARGET_VAL(ISD::SETCC),
    4935             : /*9346*/        OPC_RecordChild0, // #0 = $lhs
    4936             : /*9347*/        OPC_Scope, 121|128,8/*1145*/, /*->10495*/ // 2 children in Scope
    4937             : /*9350*/          OPC_CheckChild0Type, MVT::i32,
    4938             : /*9352*/          OPC_Scope, 9|128,1/*137*/, /*->9492*/ // 2 children in Scope
    4939             : /*9355*/            OPC_CheckChild1Integer, 0, 
    4940             : /*9357*/            OPC_MoveChild2,
    4941             : /*9358*/            OPC_Scope, 21, /*->9381*/ // 6 children in Scope
    4942             : /*9360*/              OPC_CheckCondCode, ISD::SETEQ,
    4943             : /*9362*/              OPC_MoveParent,
    4944             : /*9363*/              OPC_CheckType, MVT::i32,
    4945             : /*9365*/              OPC_MoveParent,
    4946             : /*9366*/              OPC_RecordChild1, // #1 = $T
    4947             : /*9367*/              OPC_RecordChild2, // #2 = $F
    4948             : /*9368*/              OPC_CheckType, MVT::f32,
    4949             : /*9370*/              OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4950             : /*9372*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    4951             :                           MVT::f32, 3/*#Ops*/, 1, 0, 2, 
    4952             :                       // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETEQ:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 11
    4953             :                       // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, GPR32:i32:$lhs, FGR32:f32:$F)
    4954             : /*9381*/            /*Scope*/ 21, /*->9403*/
    4955             : /*9382*/              OPC_CheckCondCode, ISD::SETNE,
    4956             : /*9384*/              OPC_MoveParent,
    4957             : /*9385*/              OPC_CheckType, MVT::i32,
    4958             : /*9387*/              OPC_MoveParent,
    4959             : /*9388*/              OPC_RecordChild1, // #1 = $T
    4960             : /*9389*/              OPC_RecordChild2, // #2 = $F
    4961             : /*9390*/              OPC_CheckType, MVT::f32,
    4962             : /*9392*/              OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4963             : /*9394*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_S), 0,
    4964             :                           MVT::f32, 3/*#Ops*/, 1, 0, 2, 
    4965             :                       // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETNE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 11
    4966             :                       // Dst: (MOVN_I_S:f32 FGR32:f32:$T, GPR32:i32:$lhs, FGR32:f32:$F)
    4967             : /*9403*/            /*Scope*/ 21, /*->9425*/
    4968             : /*9404*/              OPC_CheckCondCode, ISD::SETEQ,
    4969             : /*9406*/              OPC_MoveParent,
    4970             : /*9407*/              OPC_CheckType, MVT::i32,
    4971             : /*9409*/              OPC_MoveParent,
    4972             : /*9410*/              OPC_RecordChild1, // #1 = $T
    4973             : /*9411*/              OPC_RecordChild2, // #2 = $F
    4974             : /*9412*/              OPC_CheckType, MVT::f64,
    4975             : /*9414*/              OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4976             : /*9416*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    4977             :                           MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    4978             :                       // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETEQ:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 11
    4979             :                       // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, GPR32:i32:$lhs, AFGR64:f64:$F)
    4980             : /*9425*/            /*Scope*/ 21, /*->9447*/
    4981             : /*9426*/              OPC_CheckCondCode, ISD::SETNE,
    4982             : /*9428*/              OPC_MoveParent,
    4983             : /*9429*/              OPC_CheckType, MVT::i32,
    4984             : /*9431*/              OPC_MoveParent,
    4985             : /*9432*/              OPC_RecordChild1, // #1 = $T
    4986             : /*9433*/              OPC_RecordChild2, // #2 = $F
    4987             : /*9434*/              OPC_CheckType, MVT::f64,
    4988             : /*9436*/              OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    4989             : /*9438*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_D32), 0,
    4990             :                           MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    4991             :                       // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETNE:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 11
    4992             :                       // Dst: (MOVN_I_D32:f64 AFGR64:f64:$T, GPR32:i32:$lhs, AFGR64:f64:$F)
    4993             : /*9447*/            /*Scope*/ 21, /*->9469*/
    4994             : /*9448*/              OPC_CheckCondCode, ISD::SETEQ,
    4995             : /*9450*/              OPC_MoveParent,
    4996             : /*9451*/              OPC_CheckType, MVT::i32,
    4997             : /*9453*/              OPC_MoveParent,
    4998             : /*9454*/              OPC_RecordChild1, // #1 = $T
    4999             : /*9455*/              OPC_RecordChild2, // #2 = $F
    5000             : /*9456*/              OPC_CheckType, MVT::f64,
    5001             : /*9458*/              OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5002             : /*9460*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5003             :                           MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    5004             :                       // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETEQ:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 11
    5005             :                       // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, GPR32:i32:$lhs, FGR64:f64:$F)
    5006             : /*9469*/            /*Scope*/ 21, /*->9491*/
    5007             : /*9470*/              OPC_CheckCondCode, ISD::SETNE,
    5008             : /*9472*/              OPC_MoveParent,
    5009             : /*9473*/              OPC_CheckType, MVT::i32,
    5010             : /*9475*/              OPC_MoveParent,
    5011             : /*9476*/              OPC_RecordChild1, // #1 = $T
    5012             : /*9477*/              OPC_RecordChild2, // #2 = $F
    5013             : /*9478*/              OPC_CheckType, MVT::f64,
    5014             : /*9480*/              OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5015             : /*9482*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_D64), 0,
    5016             :                           MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    5017             :                       // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, 0:i32, SETNE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 11
    5018             :                       // Dst: (MOVN_I_D64:f64 FGR64:f64:$T, GPR32:i32:$lhs, FGR64:f64:$F)
    5019             : /*9491*/            0, /*End of Scope*/
    5020             : /*9492*/          /*Scope*/ 104|128,7/*1000*/, /*->10494*/
    5021             : /*9494*/            OPC_RecordChild1, // #1 = $rhs
    5022             : /*9495*/            OPC_Scope, 66|128,3/*450*/, /*->9948*/ // 2 children in Scope
    5023             : /*9498*/              OPC_MoveChild1,
    5024             : /*9499*/              OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5025             : /*9502*/              OPC_Scope, 70, /*->9574*/ // 6 children in Scope
    5026             : /*9504*/                OPC_CheckPredicate, 19, // Predicate_immSExt16
    5027             : /*9506*/                OPC_MoveParent,
    5028             : /*9507*/                OPC_MoveChild2,
    5029             : /*9508*/                OPC_Scope, 31, /*->9541*/ // 2 children in Scope
    5030             : /*9510*/                  OPC_CheckCondCode, ISD::SETGE,
    5031             : /*9512*/                  OPC_MoveParent,
    5032             : /*9513*/                  OPC_CheckType, MVT::i32,
    5033             : /*9515*/                  OPC_MoveParent,
    5034             : /*9516*/                  OPC_RecordChild1, // #2 = $T
    5035             : /*9517*/                  OPC_RecordChild2, // #3 = $F
    5036             : /*9518*/                  OPC_CheckType, MVT::f32,
    5037             : /*9520*/                  OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5038             : /*9522*/                  OPC_EmitConvertToTarget, 1,
    5039             : /*9524*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    5040             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5041             : /*9532*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5042             :                               MVT::f32, 3/*#Ops*/, 2, 5, 3, 
    5043             :                           // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 10
    5044             :                           // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTi:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), FGR32:f32:$F)
    5045             : /*9541*/                /*Scope*/ 31, /*->9573*/
    5046             : /*9542*/                  OPC_CheckCondCode, ISD::SETUGE,
    5047             : /*9544*/                  OPC_MoveParent,
    5048             : /*9545*/                  OPC_CheckType, MVT::i32,
    5049             : /*9547*/                  OPC_MoveParent,
    5050             : /*9548*/                  OPC_RecordChild1, // #2 = $T
    5051             : /*9549*/                  OPC_RecordChild2, // #3 = $F
    5052             : /*9550*/                  OPC_CheckType, MVT::f32,
    5053             : /*9552*/                  OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5054             : /*9554*/                  OPC_EmitConvertToTarget, 1,
    5055             : /*9556*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    5056             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5057             : /*9564*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5058             :                               MVT::f32, 3/*#Ops*/, 2, 5, 3, 
    5059             :                           // Src: (select:f32 (setcc:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 10
    5060             :                           // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTiu:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh), FGR32:f32:$F)
    5061             : /*9573*/                0, /*End of Scope*/
    5062             : /*9574*/              /*Scope*/ 76, /*->9651*/
    5063             : /*9575*/                OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    5064             : /*9577*/                OPC_MoveParent,
    5065             : /*9578*/                OPC_MoveChild2,
    5066             : /*9579*/                OPC_Scope, 34, /*->9615*/ // 2 children in Scope
    5067             : /*9581*/                  OPC_CheckCondCode, ISD::SETGT,
    5068             : /*9583*/                  OPC_MoveParent,
    5069             : /*9584*/                  OPC_CheckType, MVT::i32,
    5070             : /*9586*/                  OPC_MoveParent,
    5071             : /*9587*/                  OPC_RecordChild1, // #2 = $T
    5072             : /*9588*/                  OPC_RecordChild2, // #3 = $F
    5073             : /*9589*/                  OPC_CheckType, MVT::f32,
    5074             : /*9591*/                  OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5075             : /*9593*/                  OPC_EmitConvertToTarget, 1,
    5076             : /*9595*/                  OPC_EmitNodeXForm, 2, 4, // Plus1
    5077             : /*9598*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    5078             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5079             : /*9606*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5080             :                               MVT::f32, 3/*#Ops*/, 2, 6, 3, 
    5081             :                           // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 10
    5082             :                           // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTi:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), FGR32:f32:$F)
    5083             : /*9615*/                /*Scope*/ 34, /*->9650*/
    5084             : /*9616*/                  OPC_CheckCondCode, ISD::SETUGT,
    5085             : /*9618*/                  OPC_MoveParent,
    5086             : /*9619*/                  OPC_CheckType, MVT::i32,
    5087             : /*9621*/                  OPC_MoveParent,
    5088             : /*9622*/                  OPC_RecordChild1, // #2 = $T
    5089             : /*9623*/                  OPC_RecordChild2, // #3 = $F
    5090             : /*9624*/                  OPC_CheckType, MVT::f32,
    5091             : /*9626*/                  OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5092             : /*9628*/                  OPC_EmitConvertToTarget, 1,
    5093             : /*9630*/                  OPC_EmitNodeXForm, 2, 4, // Plus1
    5094             : /*9633*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    5095             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5096             : /*9641*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5097             :                               MVT::f32, 3/*#Ops*/, 2, 6, 3, 
    5098             :                           // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 10
    5099             :                           // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTiu:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), FGR32:f32:$F)
    5100             : /*9650*/                0, /*End of Scope*/
    5101             : /*9651*/              /*Scope*/ 70, /*->9722*/
    5102             : /*9652*/                OPC_CheckPredicate, 19, // Predicate_immSExt16
    5103             : /*9654*/                OPC_MoveParent,
    5104             : /*9655*/                OPC_MoveChild2,
    5105             : /*9656*/                OPC_Scope, 31, /*->9689*/ // 2 children in Scope
    5106             : /*9658*/                  OPC_CheckCondCode, ISD::SETGE,
    5107             : /*9660*/                  OPC_MoveParent,
    5108             : /*9661*/                  OPC_CheckType, MVT::i32,
    5109             : /*9663*/                  OPC_MoveParent,
    5110             : /*9664*/                  OPC_RecordChild1, // #2 = $T
    5111             : /*9665*/                  OPC_RecordChild2, // #3 = $F
    5112             : /*9666*/                  OPC_CheckType, MVT::f64,
    5113             : /*9668*/                  OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5114             : /*9670*/                  OPC_EmitConvertToTarget, 1,
    5115             : /*9672*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    5116             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5117             : /*9680*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5118             :                               MVT::f64, 3/*#Ops*/, 2, 5, 3, 
    5119             :                           // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 10
    5120             :                           // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (SLTi:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), AFGR64:f64:$F)
    5121             : /*9689*/                /*Scope*/ 31, /*->9721*/
    5122             : /*9690*/                  OPC_CheckCondCode, ISD::SETUGE,
    5123             : /*9692*/                  OPC_MoveParent,
    5124             : /*9693*/                  OPC_CheckType, MVT::i32,
    5125             : /*9695*/                  OPC_MoveParent,
    5126             : /*9696*/                  OPC_RecordChild1, // #2 = $T
    5127             : /*9697*/                  OPC_RecordChild2, // #3 = $F
    5128             : /*9698*/                  OPC_CheckType, MVT::f64,
    5129             : /*9700*/                  OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5130             : /*9702*/                  OPC_EmitConvertToTarget, 1,
    5131             : /*9704*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    5132             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5133             : /*9712*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5134             :                               MVT::f64, 3/*#Ops*/, 2, 5, 3, 
    5135             :                           // Src: (select:f64 (setcc:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 10
    5136             :                           // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (SLTiu:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh), AFGR64:f64:$F)
    5137             : /*9721*/                0, /*End of Scope*/
    5138             : /*9722*/              /*Scope*/ 76, /*->9799*/
    5139             : /*9723*/                OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    5140             : /*9725*/                OPC_MoveParent,
    5141             : /*9726*/                OPC_MoveChild2,
    5142             : /*9727*/                OPC_Scope, 34, /*->9763*/ // 2 children in Scope
    5143             : /*9729*/                  OPC_CheckCondCode, ISD::SETGT,
    5144             : /*9731*/                  OPC_MoveParent,
    5145             : /*9732*/                  OPC_CheckType, MVT::i32,
    5146             : /*9734*/                  OPC_MoveParent,
    5147             : /*9735*/                  OPC_RecordChild1, // #2 = $T
    5148             : /*9736*/                  OPC_RecordChild2, // #3 = $F
    5149             : /*9737*/                  OPC_CheckType, MVT::f64,
    5150             : /*9739*/                  OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5151             : /*9741*/                  OPC_EmitConvertToTarget, 1,
    5152             : /*9743*/                  OPC_EmitNodeXForm, 2, 4, // Plus1
    5153             : /*9746*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    5154             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5155             : /*9754*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5156             :                               MVT::f64, 3/*#Ops*/, 2, 6, 3, 
    5157             :                           // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 10
    5158             :                           // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (SLTi:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), AFGR64:f64:$F)
    5159             : /*9763*/                /*Scope*/ 34, /*->9798*/
    5160             : /*9764*/                  OPC_CheckCondCode, ISD::SETUGT,
    5161             : /*9766*/                  OPC_MoveParent,
    5162             : /*9767*/                  OPC_CheckType, MVT::i32,
    5163             : /*9769*/                  OPC_MoveParent,
    5164             : /*9770*/                  OPC_RecordChild1, // #2 = $T
    5165             : /*9771*/                  OPC_RecordChild2, // #3 = $F
    5166             : /*9772*/                  OPC_CheckType, MVT::f64,
    5167             : /*9774*/                  OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5168             : /*9776*/                  OPC_EmitConvertToTarget, 1,
    5169             : /*9778*/                  OPC_EmitNodeXForm, 2, 4, // Plus1
    5170             : /*9781*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    5171             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5172             : /*9789*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5173             :                               MVT::f64, 3/*#Ops*/, 2, 6, 3, 
    5174             :                           // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 10
    5175             :                           // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (SLTiu:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), AFGR64:f64:$F)
    5176             : /*9798*/                0, /*End of Scope*/
    5177             : /*9799*/              /*Scope*/ 70, /*->9870*/
    5178             : /*9800*/                OPC_CheckPredicate, 19, // Predicate_immSExt16
    5179             : /*9802*/                OPC_MoveParent,
    5180             : /*9803*/                OPC_MoveChild2,
    5181             : /*9804*/                OPC_Scope, 31, /*->9837*/ // 2 children in Scope
    5182             : /*9806*/                  OPC_CheckCondCode, ISD::SETGE,
    5183             : /*9808*/                  OPC_MoveParent,
    5184             : /*9809*/                  OPC_CheckType, MVT::i32,
    5185             : /*9811*/                  OPC_MoveParent,
    5186             : /*9812*/                  OPC_RecordChild1, // #2 = $T
    5187             : /*9813*/                  OPC_RecordChild2, // #3 = $F
    5188             : /*9814*/                  OPC_CheckType, MVT::f64,
    5189             : /*9816*/                  OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5190             : /*9818*/                  OPC_EmitConvertToTarget, 1,
    5191             : /*9820*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    5192             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5193             : /*9828*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5194             :                               MVT::f64, 3/*#Ops*/, 2, 5, 3, 
    5195             :                           // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 10
    5196             :                           // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTi:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16>>:$rhs), FGR64:f64:$F)
    5197             : /*9837*/                /*Scope*/ 31, /*->9869*/
    5198             : /*9838*/                  OPC_CheckCondCode, ISD::SETUGE,
    5199             : /*9840*/                  OPC_MoveParent,
    5200             : /*9841*/                  OPC_CheckType, MVT::i32,
    5201             : /*9843*/                  OPC_MoveParent,
    5202             : /*9844*/                  OPC_RecordChild1, // #2 = $T
    5203             : /*9845*/                  OPC_RecordChild2, // #3 = $F
    5204             : /*9846*/                  OPC_CheckType, MVT::f64,
    5205             : /*9848*/                  OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5206             : /*9850*/                  OPC_EmitConvertToTarget, 1,
    5207             : /*9852*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    5208             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5209             : /*9860*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5210             :                               MVT::f64, 3/*#Ops*/, 2, 5, 3, 
    5211             :                           // Src: (select:f64 (setcc:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 10
    5212             :                           // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTiu:i32 GPR32:i32:$lh, (imm:i32)<<P:Predicate_immSExt16>>:$rh), FGR64:f64:$F)
    5213             : /*9869*/                0, /*End of Scope*/
    5214             : /*9870*/              /*Scope*/ 76, /*->9947*/
    5215             : /*9871*/                OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    5216             : /*9873*/                OPC_MoveParent,
    5217             : /*9874*/                OPC_MoveChild2,
    5218             : /*9875*/                OPC_Scope, 34, /*->9911*/ // 2 children in Scope
    5219             : /*9877*/                  OPC_CheckCondCode, ISD::SETGT,
    5220             : /*9879*/                  OPC_MoveParent,
    5221             : /*9880*/                  OPC_CheckType, MVT::i32,
    5222             : /*9882*/                  OPC_MoveParent,
    5223             : /*9883*/                  OPC_RecordChild1, // #2 = $T
    5224             : /*9884*/                  OPC_RecordChild2, // #3 = $F
    5225             : /*9885*/                  OPC_CheckType, MVT::f64,
    5226             : /*9887*/                  OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5227             : /*9889*/                  OPC_EmitConvertToTarget, 1,
    5228             : /*9891*/                  OPC_EmitNodeXForm, 2, 4, // Plus1
    5229             : /*9894*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTi), 0,
    5230             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5231             : /*9902*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5232             :                               MVT::f64, 3/*#Ops*/, 2, 6, 3, 
    5233             :                           // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 10
    5234             :                           // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTi:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), FGR64:f64:$F)
    5235             : /*9911*/                /*Scope*/ 34, /*->9946*/
    5236             : /*9912*/                  OPC_CheckCondCode, ISD::SETUGT,
    5237             : /*9914*/                  OPC_MoveParent,
    5238             : /*9915*/                  OPC_CheckType, MVT::i32,
    5239             : /*9917*/                  OPC_MoveParent,
    5240             : /*9918*/                  OPC_RecordChild1, // #2 = $T
    5241             : /*9919*/                  OPC_RecordChild2, // #3 = $F
    5242             : /*9920*/                  OPC_CheckType, MVT::f64,
    5243             : /*9922*/                  OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5244             : /*9924*/                  OPC_EmitConvertToTarget, 1,
    5245             : /*9926*/                  OPC_EmitNodeXForm, 2, 4, // Plus1
    5246             : /*9929*/                  OPC_EmitNode1, TARGET_VAL(Mips::SLTiu), 0,
    5247             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5248             : /*9937*/                  OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5249             :                               MVT::f64, 3/*#Ops*/, 2, 6, 3, 
    5250             :                           // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, (imm:i32)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 10
    5251             :                           // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTiu:i32 GPR32:i32:$lhs, (Plus1:i32 (imm:i32):$rhs)), FGR64:f64:$F)
    5252             : /*9946*/                0, /*End of Scope*/
    5253             : /*9947*/              0, /*End of Scope*/
    5254             : /*9948*/            /*Scope*/ 31|128,4/*543*/, /*->10493*/
    5255             : /*9950*/              OPC_MoveChild2,
    5256             : /*9951*/              OPC_Scope, 29, /*->9982*/ // 18 children in Scope
    5257             : /*9953*/                OPC_CheckCondCode, ISD::SETGE,
    5258             : /*9955*/                OPC_MoveParent,
    5259             : /*9956*/                OPC_CheckType, MVT::i32,
    5260             : /*9958*/                OPC_MoveParent,
    5261             : /*9959*/                OPC_RecordChild1, // #2 = $T
    5262             : /*9960*/                OPC_RecordChild2, // #3 = $F
    5263             : /*9961*/                OPC_CheckType, MVT::f32,
    5264             : /*9963*/                OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5265             : /*9965*/                OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    5266             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5267             : /*9973*/                OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5268             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5269             :                         // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETGE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5270             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLT:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), FGR32:f32:$F)
    5271             : /*9982*/              /*Scope*/ 29, /*->10012*/
    5272             : /*9983*/                OPC_CheckCondCode, ISD::SETUGE,
    5273             : /*9985*/                OPC_MoveParent,
    5274             : /*9986*/                OPC_CheckType, MVT::i32,
    5275             : /*9988*/                OPC_MoveParent,
    5276             : /*9989*/                OPC_RecordChild1, // #2 = $T
    5277             : /*9990*/                OPC_RecordChild2, // #3 = $F
    5278             : /*9991*/                OPC_CheckType, MVT::f32,
    5279             : /*9993*/                OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5280             : /*9995*/                OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    5281             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5282             : /*10003*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5283             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5284             :                         // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETUGE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5285             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTu:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), FGR32:f32:$F)
    5286             : /*10012*/             /*Scope*/ 29, /*->10042*/
    5287             : /*10013*/               OPC_CheckCondCode, ISD::SETLE,
    5288             : /*10015*/               OPC_MoveParent,
    5289             : /*10016*/               OPC_CheckType, MVT::i32,
    5290             : /*10018*/               OPC_MoveParent,
    5291             : /*10019*/               OPC_RecordChild1, // #2 = $T
    5292             : /*10020*/               OPC_RecordChild2, // #3 = $F
    5293             : /*10021*/               OPC_CheckType, MVT::f32,
    5294             : /*10023*/               OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5295             : /*10025*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    5296             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5297             : /*10033*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5298             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5299             :                         // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETLE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5300             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLT:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), FGR32:f32:$F)
    5301             : /*10042*/             /*Scope*/ 29, /*->10072*/
    5302             : /*10043*/               OPC_CheckCondCode, ISD::SETULE,
    5303             : /*10045*/               OPC_MoveParent,
    5304             : /*10046*/               OPC_CheckType, MVT::i32,
    5305             : /*10048*/               OPC_MoveParent,
    5306             : /*10049*/               OPC_RecordChild1, // #2 = $T
    5307             : /*10050*/               OPC_RecordChild2, // #3 = $F
    5308             : /*10051*/               OPC_CheckType, MVT::f32,
    5309             : /*10053*/               OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5310             : /*10055*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    5311             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5312             : /*10063*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5313             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5314             :                         // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETULE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5315             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTu:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), FGR32:f32:$F)
    5316             : /*10072*/             /*Scope*/ 29, /*->10102*/
    5317             : /*10073*/               OPC_CheckCondCode, ISD::SETEQ,
    5318             : /*10075*/               OPC_MoveParent,
    5319             : /*10076*/               OPC_CheckType, MVT::i32,
    5320             : /*10078*/               OPC_MoveParent,
    5321             : /*10079*/               OPC_RecordChild1, // #2 = $T
    5322             : /*10080*/               OPC_RecordChild2, // #3 = $F
    5323             : /*10081*/               OPC_CheckType, MVT::f32,
    5324             : /*10083*/               OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5325             : /*10085*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    5326             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5327             : /*10093*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5328             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5329             :                         // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETEQ:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5330             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), FGR32:f32:$F)
    5331             : /*10102*/             /*Scope*/ 29, /*->10132*/
    5332             : /*10103*/               OPC_CheckCondCode, ISD::SETNE,
    5333             : /*10105*/               OPC_MoveParent,
    5334             : /*10106*/               OPC_CheckType, MVT::i32,
    5335             : /*10108*/               OPC_MoveParent,
    5336             : /*10109*/               OPC_RecordChild1, // #2 = $T
    5337             : /*10110*/               OPC_RecordChild2, // #3 = $F
    5338             : /*10111*/               OPC_CheckType, MVT::f32,
    5339             : /*10113*/               OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5340             : /*10115*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    5341             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5342             : /*10123*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_S), 0,
    5343             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5344             :                         // Src: (select:f32 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETNE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5345             :                         // Dst: (MOVN_I_S:f32 FGR32:f32:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), FGR32:f32:$F)
    5346             : /*10132*/             /*Scope*/ 29, /*->10162*/
    5347             : /*10133*/               OPC_CheckCondCode, ISD::SETGE,
    5348             : /*10135*/               OPC_MoveParent,
    5349             : /*10136*/               OPC_CheckType, MVT::i32,
    5350             : /*10138*/               OPC_MoveParent,
    5351             : /*10139*/               OPC_RecordChild1, // #2 = $T
    5352             : /*10140*/               OPC_RecordChild2, // #3 = $F
    5353             : /*10141*/               OPC_CheckType, MVT::f64,
    5354             : /*10143*/               OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5355             : /*10145*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    5356             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5357             : /*10153*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5358             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5359             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETGE:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 6
    5360             :                         // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (SLT:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), AFGR64:f64:$F)
    5361             : /*10162*/             /*Scope*/ 29, /*->10192*/
    5362             : /*10163*/               OPC_CheckCondCode, ISD::SETUGE,
    5363             : /*10165*/               OPC_MoveParent,
    5364             : /*10166*/               OPC_CheckType, MVT::i32,
    5365             : /*10168*/               OPC_MoveParent,
    5366             : /*10169*/               OPC_RecordChild1, // #2 = $T
    5367             : /*10170*/               OPC_RecordChild2, // #3 = $F
    5368             : /*10171*/               OPC_CheckType, MVT::f64,
    5369             : /*10173*/               OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5370             : /*10175*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    5371             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5372             : /*10183*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5373             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5374             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETUGE:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 6
    5375             :                         // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (SLTu:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), AFGR64:f64:$F)
    5376             : /*10192*/             /*Scope*/ 29, /*->10222*/
    5377             : /*10193*/               OPC_CheckCondCode, ISD::SETLE,
    5378             : /*10195*/               OPC_MoveParent,
    5379             : /*10196*/               OPC_CheckType, MVT::i32,
    5380             : /*10198*/               OPC_MoveParent,
    5381             : /*10199*/               OPC_RecordChild1, // #2 = $T
    5382             : /*10200*/               OPC_RecordChild2, // #3 = $F
    5383             : /*10201*/               OPC_CheckType, MVT::f64,
    5384             : /*10203*/               OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5385             : /*10205*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    5386             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5387             : /*10213*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5388             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5389             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETLE:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 6
    5390             :                         // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (SLT:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), AFGR64:f64:$F)
    5391             : /*10222*/             /*Scope*/ 29, /*->10252*/
    5392             : /*10223*/               OPC_CheckCondCode, ISD::SETULE,
    5393             : /*10225*/               OPC_MoveParent,
    5394             : /*10226*/               OPC_CheckType, MVT::i32,
    5395             : /*10228*/               OPC_MoveParent,
    5396             : /*10229*/               OPC_RecordChild1, // #2 = $T
    5397             : /*10230*/               OPC_RecordChild2, // #3 = $F
    5398             : /*10231*/               OPC_CheckType, MVT::f64,
    5399             : /*10233*/               OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5400             : /*10235*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    5401             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5402             : /*10243*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5403             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5404             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETULE:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 6
    5405             :                         // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (SLTu:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), AFGR64:f64:$F)
    5406             : /*10252*/             /*Scope*/ 29, /*->10282*/
    5407             : /*10253*/               OPC_CheckCondCode, ISD::SETEQ,
    5408             : /*10255*/               OPC_MoveParent,
    5409             : /*10256*/               OPC_CheckType, MVT::i32,
    5410             : /*10258*/               OPC_MoveParent,
    5411             : /*10259*/               OPC_RecordChild1, // #2 = $T
    5412             : /*10260*/               OPC_RecordChild2, // #3 = $F
    5413             : /*10261*/               OPC_CheckType, MVT::f64,
    5414             : /*10263*/               OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5415             : /*10265*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    5416             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5417             : /*10273*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D32), 0,
    5418             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5419             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETEQ:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 6
    5420             :                         // Dst: (MOVZ_I_D32:f64 AFGR64:f64:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), AFGR64:f64:$F)
    5421             : /*10282*/             /*Scope*/ 29, /*->10312*/
    5422             : /*10283*/               OPC_CheckCondCode, ISD::SETNE,
    5423             : /*10285*/               OPC_MoveParent,
    5424             : /*10286*/               OPC_CheckType, MVT::i32,
    5425             : /*10288*/               OPC_MoveParent,
    5426             : /*10289*/               OPC_RecordChild1, // #2 = $T
    5427             : /*10290*/               OPC_RecordChild2, // #3 = $F
    5428             : /*10291*/               OPC_CheckType, MVT::f64,
    5429             : /*10293*/               OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5430             : /*10295*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    5431             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5432             : /*10303*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_D32), 0,
    5433             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5434             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETNE:Other), AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 6
    5435             :                         // Dst: (MOVN_I_D32:f64 AFGR64:f64:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), AFGR64:f64:$F)
    5436             : /*10312*/             /*Scope*/ 29, /*->10342*/
    5437             : /*10313*/               OPC_CheckCondCode, ISD::SETGE,
    5438             : /*10315*/               OPC_MoveParent,
    5439             : /*10316*/               OPC_CheckType, MVT::i32,
    5440             : /*10318*/               OPC_MoveParent,
    5441             : /*10319*/               OPC_RecordChild1, // #2 = $T
    5442             : /*10320*/               OPC_RecordChild2, // #3 = $F
    5443             : /*10321*/               OPC_CheckType, MVT::f64,
    5444             : /*10323*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5445             : /*10325*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    5446             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5447             : /*10333*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5448             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5449             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETGE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5450             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLT:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), FGR64:f64:$F)
    5451             : /*10342*/             /*Scope*/ 29, /*->10372*/
    5452             : /*10343*/               OPC_CheckCondCode, ISD::SETUGE,
    5453             : /*10345*/               OPC_MoveParent,
    5454             : /*10346*/               OPC_CheckType, MVT::i32,
    5455             : /*10348*/               OPC_MoveParent,
    5456             : /*10349*/               OPC_RecordChild1, // #2 = $T
    5457             : /*10350*/               OPC_RecordChild2, // #3 = $F
    5458             : /*10351*/               OPC_CheckType, MVT::f64,
    5459             : /*10353*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5460             : /*10355*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    5461             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5462             : /*10363*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5463             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5464             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETUGE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5465             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTu:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), FGR64:f64:$F)
    5466             : /*10372*/             /*Scope*/ 29, /*->10402*/
    5467             : /*10373*/               OPC_CheckCondCode, ISD::SETLE,
    5468             : /*10375*/               OPC_MoveParent,
    5469             : /*10376*/               OPC_CheckType, MVT::i32,
    5470             : /*10378*/               OPC_MoveParent,
    5471             : /*10379*/               OPC_RecordChild1, // #2 = $T
    5472             : /*10380*/               OPC_RecordChild2, // #3 = $F
    5473             : /*10381*/               OPC_CheckType, MVT::f64,
    5474             : /*10383*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5475             : /*10385*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT), 0,
    5476             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5477             : /*10393*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5478             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5479             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETLE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5480             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLT:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), FGR64:f64:$F)
    5481             : /*10402*/             /*Scope*/ 29, /*->10432*/
    5482             : /*10403*/               OPC_CheckCondCode, ISD::SETULE,
    5483             : /*10405*/               OPC_MoveParent,
    5484             : /*10406*/               OPC_CheckType, MVT::i32,
    5485             : /*10408*/               OPC_MoveParent,
    5486             : /*10409*/               OPC_RecordChild1, // #2 = $T
    5487             : /*10410*/               OPC_RecordChild2, // #3 = $F
    5488             : /*10411*/               OPC_CheckType, MVT::f64,
    5489             : /*10413*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5490             : /*10415*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu), 0,
    5491             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5492             : /*10423*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5493             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5494             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETULE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5495             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTu:i32 GPR32:i32:$rhs, GPR32:i32:$lhs), FGR64:f64:$F)
    5496             : /*10432*/             /*Scope*/ 29, /*->10462*/
    5497             : /*10433*/               OPC_CheckCondCode, ISD::SETEQ,
    5498             : /*10435*/               OPC_MoveParent,
    5499             : /*10436*/               OPC_CheckType, MVT::i32,
    5500             : /*10438*/               OPC_MoveParent,
    5501             : /*10439*/               OPC_RecordChild1, // #2 = $T
    5502             : /*10440*/               OPC_RecordChild2, // #3 = $F
    5503             : /*10441*/               OPC_CheckType, MVT::f64,
    5504             : /*10443*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5505             : /*10445*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    5506             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5507             : /*10453*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5508             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5509             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETEQ:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5510             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), FGR64:f64:$F)
    5511             : /*10462*/             /*Scope*/ 29, /*->10492*/
    5512             : /*10463*/               OPC_CheckCondCode, ISD::SETNE,
    5513             : /*10465*/               OPC_MoveParent,
    5514             : /*10466*/               OPC_CheckType, MVT::i32,
    5515             : /*10468*/               OPC_MoveParent,
    5516             : /*10469*/               OPC_RecordChild1, // #2 = $T
    5517             : /*10470*/               OPC_RecordChild2, // #3 = $F
    5518             : /*10471*/               OPC_CheckType, MVT::f64,
    5519             : /*10473*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5520             : /*10475*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR), 0,
    5521             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5522             : /*10483*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_D64), 0,
    5523             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5524             :                         // Src: (select:f64 (setcc:i32 GPR32:i32:$lhs, GPR32:i32:$rhs, SETNE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5525             :                         // Dst: (MOVN_I_D64:f64 FGR64:f64:$T, (XOR:i32 GPR32:i32:$lhs, GPR32:i32:$rhs), FGR64:f64:$F)
    5526             : /*10492*/             0, /*End of Scope*/
    5527             : /*10493*/           0, /*End of Scope*/
    5528             : /*10494*/         0, /*End of Scope*/
    5529             : /*10495*/       /*Scope*/ 4|128,6/*772*/, /*->11269*/
    5530             : /*10497*/         OPC_CheckChild0Type, MVT::i64,
    5531             : /*10499*/         OPC_Scope, 93, /*->10594*/ // 2 children in Scope
    5532             : /*10501*/           OPC_CheckChild1Integer, 0, 
    5533             : /*10503*/           OPC_MoveChild2,
    5534             : /*10504*/           OPC_Scope, 21, /*->10527*/ // 4 children in Scope
    5535             : /*10506*/             OPC_CheckCondCode, ISD::SETEQ,
    5536             : /*10508*/             OPC_MoveParent,
    5537             : /*10509*/             OPC_CheckType, MVT::i32,
    5538             : /*10511*/             OPC_MoveParent,
    5539             : /*10512*/             OPC_RecordChild1, // #1 = $T
    5540             : /*10513*/             OPC_RecordChild2, // #2 = $F
    5541             : /*10514*/             OPC_CheckType, MVT::f32,
    5542             : /*10516*/             OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5543             : /*10518*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_S), 0,
    5544             :                           MVT::f32, 3/*#Ops*/, 1, 0, 2, 
    5545             :                       // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, 0:i64, SETEQ:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 11
    5546             :                       // Dst: (MOVZ_I64_S:f32 FGR32:f32:$T, GPR64:i64:$lhs, FGR32:f32:$F)
    5547             : /*10527*/           /*Scope*/ 21, /*->10549*/
    5548             : /*10528*/             OPC_CheckCondCode, ISD::SETNE,
    5549             : /*10530*/             OPC_MoveParent,
    5550             : /*10531*/             OPC_CheckType, MVT::i32,
    5551             : /*10533*/             OPC_MoveParent,
    5552             : /*10534*/             OPC_RecordChild1, // #1 = $T
    5553             : /*10535*/             OPC_RecordChild2, // #2 = $F
    5554             : /*10536*/             OPC_CheckType, MVT::f32,
    5555             : /*10538*/             OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5556             : /*10540*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_S), 0,
    5557             :                           MVT::f32, 3/*#Ops*/, 1, 0, 2, 
    5558             :                       // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, 0:i64, SETNE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 11
    5559             :                       // Dst: (MOVN_I64_S:f32 FGR32:f32:$T, GPR64:i64:$lhs, FGR32:f32:$F)
    5560             : /*10549*/           /*Scope*/ 21, /*->10571*/
    5561             : /*10550*/             OPC_CheckCondCode, ISD::SETEQ,
    5562             : /*10552*/             OPC_MoveParent,
    5563             : /*10553*/             OPC_CheckType, MVT::i32,
    5564             : /*10555*/             OPC_MoveParent,
    5565             : /*10556*/             OPC_RecordChild1, // #1 = $T
    5566             : /*10557*/             OPC_RecordChild2, // #2 = $F
    5567             : /*10558*/             OPC_CheckType, MVT::f64,
    5568             : /*10560*/             OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5569             : /*10562*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_D64), 0,
    5570             :                           MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    5571             :                       // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, 0:i64, SETEQ:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 11
    5572             :                       // Dst: (MOVZ_I64_D64:f64 FGR64:f64:$T, GPR64:i64:$lhs, FGR64:f64:$F)
    5573             : /*10571*/           /*Scope*/ 21, /*->10593*/
    5574             : /*10572*/             OPC_CheckCondCode, ISD::SETNE,
    5575             : /*10574*/             OPC_MoveParent,
    5576             : /*10575*/             OPC_CheckType, MVT::i32,
    5577             : /*10577*/             OPC_MoveParent,
    5578             : /*10578*/             OPC_RecordChild1, // #1 = $T
    5579             : /*10579*/             OPC_RecordChild2, // #2 = $F
    5580             : /*10580*/             OPC_CheckType, MVT::f64,
    5581             : /*10582*/             OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5582             : /*10584*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_D64), 0,
    5583             :                           MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    5584             :                       // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, 0:i64, SETNE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 11
    5585             :                       // Dst: (MOVN_I64_D64:f64 FGR64:f64:$T, GPR64:i64:$lhs, FGR64:f64:$F)
    5586             : /*10593*/           0, /*End of Scope*/
    5587             : /*10594*/         /*Scope*/ 32|128,5/*672*/, /*->11268*/
    5588             : /*10596*/           OPC_RecordChild1, // #1 = $rhs
    5589             : /*10597*/           OPC_Scope, 46|128,2/*302*/, /*->10902*/ // 2 children in Scope
    5590             : /*10600*/             OPC_MoveChild1,
    5591             : /*10601*/             OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    5592             : /*10604*/             OPC_Scope, 70, /*->10676*/ // 4 children in Scope
    5593             : /*10606*/               OPC_CheckPredicate, 19, // Predicate_immSExt16
    5594             : /*10608*/               OPC_MoveParent,
    5595             : /*10609*/               OPC_MoveChild2,
    5596             : /*10610*/               OPC_Scope, 31, /*->10643*/ // 2 children in Scope
    5597             : /*10612*/                 OPC_CheckCondCode, ISD::SETGE,
    5598             : /*10614*/                 OPC_MoveParent,
    5599             : /*10615*/                 OPC_CheckType, MVT::i32,
    5600             : /*10617*/                 OPC_MoveParent,
    5601             : /*10618*/                 OPC_RecordChild1, // #2 = $T
    5602             : /*10619*/                 OPC_RecordChild2, // #3 = $F
    5603             : /*10620*/                 OPC_CheckType, MVT::f32,
    5604             : /*10622*/                 OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5605             : /*10624*/                 OPC_EmitConvertToTarget, 1,
    5606             : /*10626*/                 OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    5607             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5608             : /*10634*/                 OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5609             :                               MVT::f32, 3/*#Ops*/, 2, 5, 3, 
    5610             :                           // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 10
    5611             :                           // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTi64:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs), FGR32:f32:$F)
    5612             : /*10643*/               /*Scope*/ 31, /*->10675*/
    5613             : /*10644*/                 OPC_CheckCondCode, ISD::SETUGE,
    5614             : /*10646*/                 OPC_MoveParent,
    5615             : /*10647*/                 OPC_CheckType, MVT::i32,
    5616             : /*10649*/                 OPC_MoveParent,
    5617             : /*10650*/                 OPC_RecordChild1, // #2 = $T
    5618             : /*10651*/                 OPC_RecordChild2, // #3 = $F
    5619             : /*10652*/                 OPC_CheckType, MVT::f32,
    5620             : /*10654*/                 OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5621             : /*10656*/                 OPC_EmitConvertToTarget, 1,
    5622             : /*10658*/                 OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    5623             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5624             : /*10666*/                 OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5625             :                               MVT::f32, 3/*#Ops*/, 2, 5, 3, 
    5626             :                           // Src: (select:f32 (setcc:i32 GPR64:i64:$lh, (imm:i64)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 10
    5627             :                           // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTiu64:i32 GPR64:i64:$lh, (imm:i64)<<P:Predicate_immSExt16>>:$rh), FGR32:f32:$F)
    5628             : /*10675*/               0, /*End of Scope*/
    5629             : /*10676*/             /*Scope*/ 76, /*->10753*/
    5630             : /*10677*/               OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    5631             : /*10679*/               OPC_MoveParent,
    5632             : /*10680*/               OPC_MoveChild2,
    5633             : /*10681*/               OPC_Scope, 34, /*->10717*/ // 2 children in Scope
    5634             : /*10683*/                 OPC_CheckCondCode, ISD::SETGT,
    5635             : /*10685*/                 OPC_MoveParent,
    5636             : /*10686*/                 OPC_CheckType, MVT::i32,
    5637             : /*10688*/                 OPC_MoveParent,
    5638             : /*10689*/                 OPC_RecordChild1, // #2 = $T
    5639             : /*10690*/                 OPC_RecordChild2, // #3 = $F
    5640             : /*10691*/                 OPC_CheckType, MVT::f32,
    5641             : /*10693*/                 OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5642             : /*10695*/                 OPC_EmitConvertToTarget, 1,
    5643             : /*10697*/                 OPC_EmitNodeXForm, 2, 4, // Plus1
    5644             : /*10700*/                 OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    5645             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5646             : /*10708*/                 OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5647             :                               MVT::f32, 3/*#Ops*/, 2, 6, 3, 
    5648             :                           // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 10
    5649             :                           // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTi64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), FGR32:f32:$F)
    5650             : /*10717*/               /*Scope*/ 34, /*->10752*/
    5651             : /*10718*/                 OPC_CheckCondCode, ISD::SETUGT,
    5652             : /*10720*/                 OPC_MoveParent,
    5653             : /*10721*/                 OPC_CheckType, MVT::i32,
    5654             : /*10723*/                 OPC_MoveParent,
    5655             : /*10724*/                 OPC_RecordChild1, // #2 = $T
    5656             : /*10725*/                 OPC_RecordChild2, // #3 = $F
    5657             : /*10726*/                 OPC_CheckType, MVT::f32,
    5658             : /*10728*/                 OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5659             : /*10730*/                 OPC_EmitConvertToTarget, 1,
    5660             : /*10732*/                 OPC_EmitNodeXForm, 2, 4, // Plus1
    5661             : /*10735*/                 OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    5662             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5663             : /*10743*/                 OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5664             :                               MVT::f32, 3/*#Ops*/, 2, 6, 3, 
    5665             :                           // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 10
    5666             :                           // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTiu64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), FGR32:f32:$F)
    5667             : /*10752*/               0, /*End of Scope*/
    5668             : /*10753*/             /*Scope*/ 70, /*->10824*/
    5669             : /*10754*/               OPC_CheckPredicate, 19, // Predicate_immSExt16
    5670             : /*10756*/               OPC_MoveParent,
    5671             : /*10757*/               OPC_MoveChild2,
    5672             : /*10758*/               OPC_Scope, 31, /*->10791*/ // 2 children in Scope
    5673             : /*10760*/                 OPC_CheckCondCode, ISD::SETGE,
    5674             : /*10762*/                 OPC_MoveParent,
    5675             : /*10763*/                 OPC_CheckType, MVT::i32,
    5676             : /*10765*/                 OPC_MoveParent,
    5677             : /*10766*/                 OPC_RecordChild1, // #2 = $T
    5678             : /*10767*/                 OPC_RecordChild2, // #3 = $F
    5679             : /*10768*/                 OPC_CheckType, MVT::f64,
    5680             : /*10770*/                 OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5681             : /*10772*/                 OPC_EmitConvertToTarget, 1,
    5682             : /*10774*/                 OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    5683             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5684             : /*10782*/                 OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5685             :                               MVT::f64, 3/*#Ops*/, 2, 5, 3, 
    5686             :                           // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs, SETGE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 10
    5687             :                           // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTi64:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16>>:$rhs), FGR64:f64:$F)
    5688             : /*10791*/               /*Scope*/ 31, /*->10823*/
    5689             : /*10792*/                 OPC_CheckCondCode, ISD::SETUGE,
    5690             : /*10794*/                 OPC_MoveParent,
    5691             : /*10795*/                 OPC_CheckType, MVT::i32,
    5692             : /*10797*/                 OPC_MoveParent,
    5693             : /*10798*/                 OPC_RecordChild1, // #2 = $T
    5694             : /*10799*/                 OPC_RecordChild2, // #3 = $F
    5695             : /*10800*/                 OPC_CheckType, MVT::f64,
    5696             : /*10802*/                 OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5697             : /*10804*/                 OPC_EmitConvertToTarget, 1,
    5698             : /*10806*/                 OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    5699             :                               MVT::i32, 2/*#Ops*/, 0, 4,  // Results = #5
    5700             : /*10814*/                 OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5701             :                               MVT::f64, 3/*#Ops*/, 2, 5, 3, 
    5702             :                           // Src: (select:f64 (setcc:i32 GPR64:i64:$lh, (imm:i64)<<P:Predicate_immSExt16>>:$rh, SETUGE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 10
    5703             :                           // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTiu64:i32 GPR64:i64:$lh, (imm:i64)<<P:Predicate_immSExt16>>:$rh), FGR64:f64:$F)
    5704             : /*10823*/               0, /*End of Scope*/
    5705             : /*10824*/             /*Scope*/ 76, /*->10901*/
    5706             : /*10825*/               OPC_CheckPredicate, 20, // Predicate_immSExt16Plus1
    5707             : /*10827*/               OPC_MoveParent,
    5708             : /*10828*/               OPC_MoveChild2,
    5709             : /*10829*/               OPC_Scope, 34, /*->10865*/ // 2 children in Scope
    5710             : /*10831*/                 OPC_CheckCondCode, ISD::SETGT,
    5711             : /*10833*/                 OPC_MoveParent,
    5712             : /*10834*/                 OPC_CheckType, MVT::i32,
    5713             : /*10836*/                 OPC_MoveParent,
    5714             : /*10837*/                 OPC_RecordChild1, // #2 = $T
    5715             : /*10838*/                 OPC_RecordChild2, // #3 = $F
    5716             : /*10839*/                 OPC_CheckType, MVT::f64,
    5717             : /*10841*/                 OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5718             : /*10843*/                 OPC_EmitConvertToTarget, 1,
    5719             : /*10845*/                 OPC_EmitNodeXForm, 2, 4, // Plus1
    5720             : /*10848*/                 OPC_EmitNode1, TARGET_VAL(Mips::SLTi64), 0,
    5721             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5722             : /*10856*/                 OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5723             :                               MVT::f64, 3/*#Ops*/, 2, 6, 3, 
    5724             :                           // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETGT:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 10
    5725             :                           // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTi64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), FGR64:f64:$F)
    5726             : /*10865*/               /*Scope*/ 34, /*->10900*/
    5727             : /*10866*/                 OPC_CheckCondCode, ISD::SETUGT,
    5728             : /*10868*/                 OPC_MoveParent,
    5729             : /*10869*/                 OPC_CheckType, MVT::i32,
    5730             : /*10871*/                 OPC_MoveParent,
    5731             : /*10872*/                 OPC_RecordChild1, // #2 = $T
    5732             : /*10873*/                 OPC_RecordChild2, // #3 = $F
    5733             : /*10874*/                 OPC_CheckType, MVT::f64,
    5734             : /*10876*/                 OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5735             : /*10878*/                 OPC_EmitConvertToTarget, 1,
    5736             : /*10880*/                 OPC_EmitNodeXForm, 2, 4, // Plus1
    5737             : /*10883*/                 OPC_EmitNode1, TARGET_VAL(Mips::SLTiu64), 0,
    5738             :                               MVT::i32, 2/*#Ops*/, 0, 5,  // Results = #6
    5739             : /*10891*/                 OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5740             :                               MVT::f64, 3/*#Ops*/, 2, 6, 3, 
    5741             :                           // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, (imm:i64)<<P:Predicate_immSExt16Plus1>>:$rhs, SETUGT:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 10
    5742             :                           // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTiu64:i32 GPR64:i64:$lhs, (Plus1:i64 (imm:i64):$rhs)), FGR64:f64:$F)
    5743             : /*10900*/               0, /*End of Scope*/
    5744             : /*10901*/             0, /*End of Scope*/
    5745             : /*10902*/           /*Scope*/ 107|128,2/*363*/, /*->11267*/
    5746             : /*10904*/             OPC_MoveChild2,
    5747             : /*10905*/             OPC_Scope, 29, /*->10936*/ // 12 children in Scope
    5748             : /*10907*/               OPC_CheckCondCode, ISD::SETGE,
    5749             : /*10909*/               OPC_MoveParent,
    5750             : /*10910*/               OPC_CheckType, MVT::i32,
    5751             : /*10912*/               OPC_MoveParent,
    5752             : /*10913*/               OPC_RecordChild1, // #2 = $T
    5753             : /*10914*/               OPC_RecordChild2, // #3 = $F
    5754             : /*10915*/               OPC_CheckType, MVT::f32,
    5755             : /*10917*/               OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5756             : /*10919*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    5757             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5758             : /*10927*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5759             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5760             :                         // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETGE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5761             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLT64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), FGR32:f32:$F)
    5762             : /*10936*/             /*Scope*/ 29, /*->10966*/
    5763             : /*10937*/               OPC_CheckCondCode, ISD::SETUGE,
    5764             : /*10939*/               OPC_MoveParent,
    5765             : /*10940*/               OPC_CheckType, MVT::i32,
    5766             : /*10942*/               OPC_MoveParent,
    5767             : /*10943*/               OPC_RecordChild1, // #2 = $T
    5768             : /*10944*/               OPC_RecordChild2, // #3 = $F
    5769             : /*10945*/               OPC_CheckType, MVT::f32,
    5770             : /*10947*/               OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5771             : /*10949*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    5772             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5773             : /*10957*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5774             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5775             :                         // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETUGE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5776             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTu64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), FGR32:f32:$F)
    5777             : /*10966*/             /*Scope*/ 29, /*->10996*/
    5778             : /*10967*/               OPC_CheckCondCode, ISD::SETLE,
    5779             : /*10969*/               OPC_MoveParent,
    5780             : /*10970*/               OPC_CheckType, MVT::i32,
    5781             : /*10972*/               OPC_MoveParent,
    5782             : /*10973*/               OPC_RecordChild1, // #2 = $T
    5783             : /*10974*/               OPC_RecordChild2, // #3 = $F
    5784             : /*10975*/               OPC_CheckType, MVT::f32,
    5785             : /*10977*/               OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5786             : /*10979*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    5787             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5788             : /*10987*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5789             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5790             :                         // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETLE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5791             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLT64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), FGR32:f32:$F)
    5792             : /*10996*/             /*Scope*/ 29, /*->11026*/
    5793             : /*10997*/               OPC_CheckCondCode, ISD::SETULE,
    5794             : /*10999*/               OPC_MoveParent,
    5795             : /*11000*/               OPC_CheckType, MVT::i32,
    5796             : /*11002*/               OPC_MoveParent,
    5797             : /*11003*/               OPC_RecordChild1, // #2 = $T
    5798             : /*11004*/               OPC_RecordChild2, // #3 = $F
    5799             : /*11005*/               OPC_CheckType, MVT::f32,
    5800             : /*11007*/               OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5801             : /*11009*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    5802             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5803             : /*11017*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_S), 0,
    5804             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5805             :                         // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETULE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5806             :                         // Dst: (MOVZ_I_S:f32 FGR32:f32:$T, (SLTu64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), FGR32:f32:$F)
    5807             : /*11026*/             /*Scope*/ 29, /*->11056*/
    5808             : /*11027*/               OPC_CheckCondCode, ISD::SETEQ,
    5809             : /*11029*/               OPC_MoveParent,
    5810             : /*11030*/               OPC_CheckType, MVT::i32,
    5811             : /*11032*/               OPC_MoveParent,
    5812             : /*11033*/               OPC_RecordChild1, // #2 = $T
    5813             : /*11034*/               OPC_RecordChild2, // #3 = $F
    5814             : /*11035*/               OPC_CheckType, MVT::f32,
    5815             : /*11037*/               OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5816             : /*11039*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR64), 0,
    5817             :                             MVT::i64, 2/*#Ops*/, 0, 1,  // Results = #4
    5818             : /*11047*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_S), 0,
    5819             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5820             :                         // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETEQ:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5821             :                         // Dst: (MOVZ_I64_S:f32 FGR32:f32:$T, (XOR64:i64 GPR64:i64:$lhs, GPR64:i64:$rhs), FGR32:f32:$F)
    5822             : /*11056*/             /*Scope*/ 29, /*->11086*/
    5823             : /*11057*/               OPC_CheckCondCode, ISD::SETNE,
    5824             : /*11059*/               OPC_MoveParent,
    5825             : /*11060*/               OPC_CheckType, MVT::i32,
    5826             : /*11062*/               OPC_MoveParent,
    5827             : /*11063*/               OPC_RecordChild1, // #2 = $T
    5828             : /*11064*/               OPC_RecordChild2, // #3 = $F
    5829             : /*11065*/               OPC_CheckType, MVT::f32,
    5830             : /*11067*/               OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5831             : /*11069*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR64), 0,
    5832             :                             MVT::i64, 2/*#Ops*/, 0, 1,  // Results = #4
    5833             : /*11077*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_S), 0,
    5834             :                             MVT::f32, 3/*#Ops*/, 2, 4, 3, 
    5835             :                         // Src: (select:f32 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETNE:Other), FGR32:f32:$T, FGR32:f32:$F) - Complexity = 6
    5836             :                         // Dst: (MOVN_I64_S:f32 FGR32:f32:$T, (XOR64:i64 GPR64:i64:$lhs, GPR64:i64:$rhs), FGR32:f32:$F)
    5837             : /*11086*/             /*Scope*/ 29, /*->11116*/
    5838             : /*11087*/               OPC_CheckCondCode, ISD::SETGE,
    5839             : /*11089*/               OPC_MoveParent,
    5840             : /*11090*/               OPC_CheckType, MVT::i32,
    5841             : /*11092*/               OPC_MoveParent,
    5842             : /*11093*/               OPC_RecordChild1, // #2 = $T
    5843             : /*11094*/               OPC_RecordChild2, // #3 = $F
    5844             : /*11095*/               OPC_CheckType, MVT::f64,
    5845             : /*11097*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5846             : /*11099*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    5847             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5848             : /*11107*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5849             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5850             :                         // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETGE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5851             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLT64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), FGR64:f64:$F)
    5852             : /*11116*/             /*Scope*/ 29, /*->11146*/
    5853             : /*11117*/               OPC_CheckCondCode, ISD::SETUGE,
    5854             : /*11119*/               OPC_MoveParent,
    5855             : /*11120*/               OPC_CheckType, MVT::i32,
    5856             : /*11122*/               OPC_MoveParent,
    5857             : /*11123*/               OPC_RecordChild1, // #2 = $T
    5858             : /*11124*/               OPC_RecordChild2, // #3 = $F
    5859             : /*11125*/               OPC_CheckType, MVT::f64,
    5860             : /*11127*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5861             : /*11129*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    5862             :                             MVT::i32, 2/*#Ops*/, 0, 1,  // Results = #4
    5863             : /*11137*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5864             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5865             :                         // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETUGE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5866             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTu64:i32 GPR64:i64:$lhs, GPR64:i64:$rhs), FGR64:f64:$F)
    5867             : /*11146*/             /*Scope*/ 29, /*->11176*/
    5868             : /*11147*/               OPC_CheckCondCode, ISD::SETLE,
    5869             : /*11149*/               OPC_MoveParent,
    5870             : /*11150*/               OPC_CheckType, MVT::i32,
    5871             : /*11152*/               OPC_MoveParent,
    5872             : /*11153*/               OPC_RecordChild1, // #2 = $T
    5873             : /*11154*/               OPC_RecordChild2, // #3 = $F
    5874             : /*11155*/               OPC_CheckType, MVT::f64,
    5875             : /*11157*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5876             : /*11159*/               OPC_EmitNode1, TARGET_VAL(Mips::SLT64), 0,
    5877             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5878             : /*11167*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5879             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5880             :                         // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETLE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5881             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLT64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), FGR64:f64:$F)
    5882             : /*11176*/             /*Scope*/ 29, /*->11206*/
    5883             : /*11177*/               OPC_CheckCondCode, ISD::SETULE,
    5884             : /*11179*/               OPC_MoveParent,
    5885             : /*11180*/               OPC_CheckType, MVT::i32,
    5886             : /*11182*/               OPC_MoveParent,
    5887             : /*11183*/               OPC_RecordChild1, // #2 = $T
    5888             : /*11184*/               OPC_RecordChild2, // #3 = $F
    5889             : /*11185*/               OPC_CheckType, MVT::f64,
    5890             : /*11187*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5891             : /*11189*/               OPC_EmitNode1, TARGET_VAL(Mips::SLTu64), 0,
    5892             :                             MVT::i32, 2/*#Ops*/, 1, 0,  // Results = #4
    5893             : /*11197*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I_D64), 0,
    5894             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5895             :                         // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETULE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5896             :                         // Dst: (MOVZ_I_D64:f64 FGR64:f64:$T, (SLTu64:i32 GPR64:i64:$rhs, GPR64:i64:$lhs), FGR64:f64:$F)
    5897             : /*11206*/             /*Scope*/ 29, /*->11236*/
    5898             : /*11207*/               OPC_CheckCondCode, ISD::SETEQ,
    5899             : /*11209*/               OPC_MoveParent,
    5900             : /*11210*/               OPC_CheckType, MVT::i32,
    5901             : /*11212*/               OPC_MoveParent,
    5902             : /*11213*/               OPC_RecordChild1, // #2 = $T
    5903             : /*11214*/               OPC_RecordChild2, // #3 = $F
    5904             : /*11215*/               OPC_CheckType, MVT::f64,
    5905             : /*11217*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5906             : /*11219*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR64), 0,
    5907             :                             MVT::i64, 2/*#Ops*/, 0, 1,  // Results = #4
    5908             : /*11227*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVZ_I64_D64), 0,
    5909             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5910             :                         // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETEQ:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5911             :                         // Dst: (MOVZ_I64_D64:f64 FGR64:f64:$T, (XOR64:i64 GPR64:i64:$lhs, GPR64:i64:$rhs), FGR64:f64:$F)
    5912             : /*11236*/             /*Scope*/ 29, /*->11266*/
    5913             : /*11237*/               OPC_CheckCondCode, ISD::SETNE,
    5914             : /*11239*/               OPC_MoveParent,
    5915             : /*11240*/               OPC_CheckType, MVT::i32,
    5916             : /*11242*/               OPC_MoveParent,
    5917             : /*11243*/               OPC_RecordChild1, // #2 = $T
    5918             : /*11244*/               OPC_RecordChild2, // #3 = $F
    5919             : /*11245*/               OPC_CheckType, MVT::f64,
    5920             : /*11247*/               OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5921             : /*11249*/               OPC_EmitNode1, TARGET_VAL(Mips::XOR64), 0,
    5922             :                             MVT::i64, 2/*#Ops*/, 0, 1,  // Results = #4
    5923             : /*11257*/               OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_D64), 0,
    5924             :                             MVT::f64, 3/*#Ops*/, 2, 4, 3, 
    5925             :                         // Src: (select:f64 (setcc:i32 GPR64:i64:$lhs, GPR64:i64:$rhs, SETNE:Other), FGR64:f64:$T, FGR64:f64:$F) - Complexity = 6
    5926             :                         // Dst: (MOVN_I64_D64:f64 FGR64:f64:$T, (XOR64:i64 GPR64:i64:$lhs, GPR64:i64:$rhs), FGR64:f64:$F)
    5927             : /*11266*/             0, /*End of Scope*/
    5928             : /*11267*/           0, /*End of Scope*/
    5929             : /*11268*/         0, /*End of Scope*/
    5930             : /*11269*/       0, /*End of Scope*/
    5931             : /*11270*/     /*Scope*/ 19|128,1/*147*/, /*->11419*/
    5932             : /*11272*/       OPC_RecordChild0, // #0 = $cond
    5933             : /*11273*/       OPC_Scope, 110, /*->11385*/ // 2 children in Scope
    5934             : /*11275*/         OPC_CheckChild0Type, MVT::i32,
    5935             : /*11277*/         OPC_RecordChild1, // #1 = $T
    5936             : /*11278*/         OPC_RecordChild2, // #2 = $F
    5937             : /*11279*/         OPC_SwitchType /*2 cases */, 50, MVT::f32,// ->11332
    5938             : /*11282*/           OPC_Scope, 11, /*->11295*/ // 4 children in Scope
    5939             : /*11284*/             OPC_CheckPatternPredicate, 33, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5940             : /*11286*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_S), 0,
    5941             :                           MVT::f32, 3/*#Ops*/, 1, 0, 2, 
    5942             :                       // Src: (select:f32 GPR32:i32:$cond, FGR32:f32:$T, FGR32:f32:$F) - Complexity = 3
    5943             :                       // Dst: (MOVN_I_S:f32 FGR32:f32:$T, GPR32:i32:$cond, FGR32:f32:$F)
    5944             : /*11295*/           /*Scope*/ 11, /*->11307*/
    5945             : /*11296*/             OPC_CheckPatternPredicate, 38, // (Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode())
    5946             : /*11298*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::SEL_S), 0,
    5947             :                           MVT::f32, 3/*#Ops*/, 0, 2, 1, 
    5948             :                       // Src: (select:f32 FGRCCOpnd:i32:$fd_in, FGR32Opnd:f32:$ft, FGR32Opnd:f32:$fs) - Complexity = 3
    5949             :                       // Dst: (SEL_S:f32 FGRCCOpnd:i32:$fd_in, FGR32Opnd:f32:$fs, FGR32Opnd:f32:$ft)
    5950             : /*11307*/           /*Scope*/ 11, /*->11319*/
    5951             : /*11308*/             OPC_CheckPatternPredicate, 15, // (Subtarget->inMicroMips32r6Mode()) && (Subtarget->hasStandardEncoding())
    5952             : /*11310*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::SEL_S_MMR6), 0,
    5953             :                           MVT::f32, 3/*#Ops*/, 0, 2, 1, 
    5954             :                       // Src: (select:f32 FGRCCOpnd:i32:$fd_in, FGR32Opnd:f32:$ft, FGR32Opnd:f32:$fs) - Complexity = 3
    5955             :                       // Dst: (SEL_S_MMR6:f32 FGRCCOpnd:i32:$fd_in, FGR32Opnd:f32:$fs, FGR32Opnd:f32:$ft)
    5956             : /*11319*/           /*Scope*/ 11, /*->11331*/
    5957             : /*11320*/             OPC_CheckPatternPredicate, 35, // (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips4_32())
    5958             : /*11322*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::PseudoSELECT_S), 0,
    5959             :                           MVT::f32, 3/*#Ops*/, 0, 1, 2, 
    5960             :                       // Src: (select:f32 GPR32Opnd:i32:$cond, FGR32Opnd:f32:$T, FGR32Opnd:f32:$F) - Complexity = 3
    5961             :                       // Dst: (PseudoSELECT_S:f32 GPR32Opnd:i32:$cond, FGR32Opnd:f32:$T, FGR32Opnd:f32:$F)
    5962             : /*11331*/           0, /*End of Scope*/
    5963             : /*11332*/         /*SwitchType*/ 50, MVT::f64,// ->11384
    5964             : /*11334*/           OPC_Scope, 11, /*->11347*/ // 4 children in Scope
    5965             : /*11336*/             OPC_CheckPatternPredicate, 36, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5966             : /*11338*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_D32), 0,
    5967             :                           MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    5968             :                       // Src: (select:f64 GPR32:i32:$cond, AFGR64:f64:$T, AFGR64:f64:$F) - Complexity = 3
    5969             :                       // Dst: (MOVN_I_D32:f64 AFGR64:f64:$T, GPR32:i32:$cond, AFGR64:f64:$F)
    5970             : /*11347*/           /*Scope*/ 11, /*->11359*/
    5971             : /*11348*/             OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5972             : /*11350*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I_D64), 0,
    5973             :                           MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    5974             :                       // Src: (select:f64 GPR32:i32:$cond, FGR64:f64:$T, FGR64:f64:$F) - Complexity = 3
    5975             :                       // Dst: (MOVN_I_D64:f64 FGR64:f64:$T, GPR32:i32:$cond, FGR64:f64:$F)
    5976             : /*11359*/           /*Scope*/ 11, /*->11371*/
    5977             : /*11360*/             OPC_CheckPatternPredicate, 39, // (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips4_32())
    5978             : /*11362*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::PseudoSELECT_D32), 0,
    5979             :                           MVT::f64, 3/*#Ops*/, 0, 1, 2, 
    5980             :                       // Src: (select:f64 GPR32Opnd:i32:$cond, AFGR64Opnd:f64:$T, AFGR64Opnd:f64:$F) - Complexity = 3
    5981             :                       // Dst: (PseudoSELECT_D32:f64 GPR32Opnd:i32:$cond, AFGR64Opnd:f64:$T, AFGR64Opnd:f64:$F)
    5982             : /*11371*/           /*Scope*/ 11, /*->11383*/
    5983             : /*11372*/             OPC_CheckPatternPredicate, 40, // (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips4_32())
    5984             : /*11374*/             OPC_MorphNodeTo1, TARGET_VAL(Mips::PseudoSELECT_D64), 0,
    5985             :                           MVT::f64, 3/*#Ops*/, 0, 1, 2, 
    5986             :                       // Src: (select:f64 GPR32Opnd:i32:$cond, FGR64Opnd:f64:$T, FGR64Opnd:f64:$F) - Complexity = 3
    5987             :                       // Dst: (PseudoSELECT_D64:f64 GPR32Opnd:i32:$cond, FGR64Opnd:f64:$T, FGR64Opnd:f64:$F)
    5988             : /*11383*/           0, /*End of Scope*/
    5989             : /*11384*/         0, // EndSwitchType
    5990             : /*11385*/       /*Scope*/ 32, /*->11418*/
    5991             : /*11386*/         OPC_CheckChild0Type, MVT::i64,
    5992             : /*11388*/         OPC_RecordChild1, // #1 = $T
    5993             : /*11389*/         OPC_RecordChild2, // #2 = $F
    5994             : /*11390*/         OPC_SwitchType /*2 cases */, 11, MVT::f32,// ->11404
    5995             : /*11393*/           OPC_CheckPatternPredicate, 34, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isGP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    5996             : /*11395*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_S), 0,
    5997             :                         MVT::f32, 3/*#Ops*/, 1, 0, 2, 
    5998             :                     // Src: (select:f32 GPR64:i64:$cond, FGR32:f32:$T, FGR32:f32:$F) - Complexity = 3
    5999             :                     // Dst: (MOVN_I64_S:f32 FGR32:f32:$T, GPR64:i64:$cond, FGR32:f32:$F)
    6000             : /*11404*/         /*SwitchType*/ 11, MVT::f64,// ->11417
    6001             : /*11406*/           OPC_CheckPatternPredicate, 37, // (Subtarget->hasMips4_32()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6002             : /*11408*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::MOVN_I64_D64), 0,
    6003             :                         MVT::f64, 3/*#Ops*/, 1, 0, 2, 
    6004             :                     // Src: (select:f64 GPR64:i64:$cond, FGR64:f64:$T, FGR64:f64:$F) - Complexity = 3
    6005             :                     // Dst: (MOVN_I64_D64:f64 FGR64:f64:$T, GPR64:i64:$cond, FGR64:f64:$F)
    6006             : /*11417*/         0, // EndSwitchType
    6007             : /*11418*/       0, /*End of Scope*/
    6008             : /*11419*/     0, /*End of Scope*/
    6009             : /*11420*/   /*SwitchOpcode*/ 39|128,1/*167*/, TARGET_VAL(ISD::ATOMIC_LOAD),// ->11591
    6010             : /*11424*/     OPC_RecordMemRef,
    6011             : /*11425*/     OPC_RecordNode, // #0 = 'atomic_load' chained node
    6012             : /*11426*/     OPC_RecordChild1, // #1 = $a
    6013             : /*11427*/     OPC_SwitchType /*2 cases */, 70, MVT::i32,// ->11500
    6014             : /*11430*/       OPC_Scope, 16, /*->11448*/ // 4 children in Scope
    6015             : /*11432*/         OPC_CheckPredicate, 24, // Predicate_atomic_load_8
    6016             : /*11434*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6017             : /*11436*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6018             : /*11439*/         OPC_EmitMergeInputChains1_0,
    6019             : /*11440*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LB), 0|OPFL_Chain|OPFL_MemRefs,
    6020             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
    6021             :                   // Src: (atomic_load:i32 addr:iPTR:$a)<<P:Predicate_atomic_load_8>> - Complexity = 13
    6022             :                   // Dst: (LB:i32 addr:iPTR:$a)
    6023             : /*11448*/       /*Scope*/ 16, /*->11465*/
    6024             : /*11449*/         OPC_CheckPredicate, 25, // Predicate_atomic_load_16
    6025             : /*11451*/         OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMode())
    6026             : /*11453*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6027             : /*11456*/         OPC_EmitMergeInputChains1_0,
    6028             : /*11457*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LH), 0|OPFL_Chain|OPFL_MemRefs,
    6029             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
    6030             :                   // Src: (atomic_load:i32 addr:iPTR:$a)<<P:Predicate_atomic_load_16>> - Complexity = 13
    6031             :                   // Dst: (LH:i32 addr:iPTR:$a)
    6032             : /*11465*/       /*Scope*/ 16, /*->11482*/
    6033             : /*11466*/         OPC_CheckPredicate, 26, // Predicate_atomic_load_32
    6034             : /*11468*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6035             : /*11470*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6036             : /*11473*/         OPC_EmitMergeInputChains1_0,
    6037             : /*11474*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LW), 0|OPFL_Chain|OPFL_MemRefs,
    6038             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
    6039             :                   // Src: (atomic_load:i32 addr:iPTR:$a)<<P:Predicate_atomic_load_32>> - Complexity = 13
    6040             :                   // Dst: (LW:i32 addr:iPTR:$a)
    6041             : /*11482*/       /*Scope*/ 16, /*->11499*/
    6042             : /*11483*/         OPC_CheckPredicate, 25, // Predicate_atomic_load_16
    6043             : /*11485*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6044             : /*11487*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6045             : /*11490*/         OPC_EmitMergeInputChains1_0,
    6046             : /*11491*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LH_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6047             :                       MVT::i32, 2/*#Ops*/, 2, 3, 
    6048             :                   // Src: (atomic_load:i32 addr:iPTR:$a)<<P:Predicate_atomic_load_16>> - Complexity = 13
    6049             :                   // Dst: (LH_MM:i32 addr:iPTR:$a)
    6050             : /*11499*/       0, /*End of Scope*/
    6051             : /*11500*/     /*SwitchType*/ 88, MVT::i64,// ->11590
    6052             : /*11502*/       OPC_Scope, 16, /*->11520*/ // 4 children in Scope
    6053             : /*11504*/         OPC_CheckPredicate, 24, // Predicate_atomic_load_8
    6054             : /*11506*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6055             : /*11508*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6056             : /*11511*/         OPC_EmitMergeInputChains1_0,
    6057             : /*11512*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LB64), 0|OPFL_Chain|OPFL_MemRefs,
    6058             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
    6059             :                   // Src: (atomic_load:i64 addr:iPTR:$a)<<P:Predicate_atomic_load_8>> - Complexity = 13
    6060             :                   // Dst: (LB64:i64 addr:iPTR:$a)
    6061             : /*11520*/       /*Scope*/ 16, /*->11537*/
    6062             : /*11521*/         OPC_CheckPredicate, 25, // Predicate_atomic_load_16
    6063             : /*11523*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6064             : /*11525*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6065             : /*11528*/         OPC_EmitMergeInputChains1_0,
    6066             : /*11529*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LH64), 0|OPFL_Chain|OPFL_MemRefs,
    6067             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
    6068             :                   // Src: (atomic_load:i64 addr:iPTR:$a)<<P:Predicate_atomic_load_16>> - Complexity = 13
    6069             :                   // Dst: (LH64:i64 addr:iPTR:$a)
    6070             : /*11537*/       /*Scope*/ 16, /*->11554*/
    6071             : /*11538*/         OPC_CheckPredicate, 26, // Predicate_atomic_load_32
    6072             : /*11540*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6073             : /*11542*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6074             : /*11545*/         OPC_EmitMergeInputChains1_0,
    6075             : /*11546*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LW64), 0|OPFL_Chain|OPFL_MemRefs,
    6076             :                       MVT::i64, 2/*#Ops*/, 2, 3, 
    6077             :                   // Src: (atomic_load:i64 addr:iPTR:$a)<<P:Predicate_atomic_load_32>> - Complexity = 13
    6078             :                   // Dst: (LW64:i64 addr:iPTR:$a)
    6079             : /*11554*/       /*Scope*/ 34, /*->11589*/
    6080             : /*11555*/         OPC_CheckPredicate, 27, // Predicate_atomic_load_64
    6081             : /*11557*/         OPC_Scope, 14, /*->11573*/ // 2 children in Scope
    6082             : /*11559*/           OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6083             : /*11561*/           OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6084             : /*11564*/           OPC_EmitMergeInputChains1_0,
    6085             : /*11565*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::LD), 0|OPFL_Chain|OPFL_MemRefs,
    6086             :                         MVT::i64, 2/*#Ops*/, 2, 3, 
    6087             :                     // Src: (atomic_load:i64 addr:iPTR:$a)<<P:Predicate_atomic_load_64>> - Complexity = 13
    6088             :                     // Dst: (LD:i64 addr:iPTR:$a)
    6089             : /*11573*/         /*Scope*/ 14, /*->11588*/
    6090             : /*11574*/           OPC_CheckPatternPredicate, 23, // (Subtarget->inMicroMips64r6Mode()) && (Subtarget->hasStandardEncoding())
    6091             : /*11576*/           OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #2 #3
    6092             : /*11579*/           OPC_EmitMergeInputChains1_0,
    6093             : /*11580*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_MM64R6), 0|OPFL_Chain|OPFL_MemRefs,
    6094             :                         MVT::i64, 2/*#Ops*/, 2, 3, 
    6095             :                     // Src: (atomic_load:i64 addr:iPTR:$a)<<P:Predicate_atomic_load_64>> - Complexity = 13
    6096             :                     // Dst: (LD_MM64R6:i64 addr:iPTR:$a)
    6097             : /*11588*/         0, /*End of Scope*/
    6098             : /*11589*/       0, /*End of Scope*/
    6099             : /*11590*/     0, // EndSwitchType
    6100             : /*11591*/   /*SwitchOpcode*/ 7|128,1/*135*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->11730
    6101             : /*11595*/     OPC_RecordMemRef,
    6102             : /*11596*/     OPC_RecordNode, // #0 = 'atomic_store' chained node
    6103             : /*11597*/     OPC_RecordChild1, // #1 = $a
    6104             : /*11598*/     OPC_RecordChild2, // #2 = $v
    6105             : /*11599*/     OPC_Scope, 55, /*->11656*/ // 2 children in Scope
    6106             : /*11601*/       OPC_CheckChild2Type, MVT::i32,
    6107             : /*11603*/       OPC_Scope, 16, /*->11621*/ // 3 children in Scope
    6108             : /*11605*/         OPC_CheckPredicate, 28, // Predicate_atomic_store_8
    6109             : /*11607*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6110             : /*11609*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #3 #4
    6111             : /*11612*/         OPC_EmitMergeInputChains1_0,
    6112             : /*11613*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SB), 0|OPFL_Chain|OPFL_MemRefs,
    6113             :                       3/*#Ops*/, 2, 3, 4, 
    6114             :                   // Src: (atomic_store addr:iPTR:$a, GPR32:i32:$v)<<P:Predicate_atomic_store_8>> - Complexity = 13
    6115             :                   // Dst: (SB GPR32:i32:$v, addr:iPTR:$a)
    6116             : /*11621*/       /*Scope*/ 16, /*->11638*/
    6117             : /*11622*/         OPC_CheckPredicate, 29, // Predicate_atomic_store_16
    6118             : /*11624*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6119             : /*11626*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #3 #4
    6120             : /*11629*/         OPC_EmitMergeInputChains1_0,
    6121             : /*11630*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SH), 0|OPFL_Chain|OPFL_MemRefs,
    6122             :                       3/*#Ops*/, 2, 3, 4, 
    6123             :                   // Src: (atomic_store addr:iPTR:$a, GPR32:i32:$v)<<P:Predicate_atomic_store_16>> - Complexity = 13
    6124             :                   // Dst: (SH GPR32:i32:$v, addr:iPTR:$a)
    6125             : /*11638*/       /*Scope*/ 16, /*->11655*/
    6126             : /*11639*/         OPC_CheckPredicate, 30, // Predicate_atomic_store_32
    6127             : /*11641*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6128             : /*11643*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #3 #4
    6129             : /*11646*/         OPC_EmitMergeInputChains1_0,
    6130             : /*11647*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SW), 0|OPFL_Chain|OPFL_MemRefs,
    6131             :                       3/*#Ops*/, 2, 3, 4, 
    6132             :                   // Src: (atomic_store addr:iPTR:$a, GPR32:i32:$v)<<P:Predicate_atomic_store_32>> - Complexity = 13
    6133             :                   // Dst: (SW GPR32:i32:$v, addr:iPTR:$a)
    6134             : /*11655*/       0, /*End of Scope*/
    6135             : /*11656*/     /*Scope*/ 72, /*->11729*/
    6136             : /*11657*/       OPC_CheckChild2Type, MVT::i64,
    6137             : /*11659*/       OPC_Scope, 16, /*->11677*/ // 4 children in Scope
    6138             : /*11661*/         OPC_CheckPredicate, 28, // Predicate_atomic_store_8
    6139             : /*11663*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6140             : /*11665*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #3 #4
    6141             : /*11668*/         OPC_EmitMergeInputChains1_0,
    6142             : /*11669*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SB64), 0|OPFL_Chain|OPFL_MemRefs,
    6143             :                       3/*#Ops*/, 2, 3, 4, 
    6144             :                   // Src: (atomic_store addr:iPTR:$a, GPR64:i64:$v)<<P:Predicate_atomic_store_8>> - Complexity = 13
    6145             :                   // Dst: (SB64 GPR64:i64:$v, addr:iPTR:$a)
    6146             : /*11677*/       /*Scope*/ 16, /*->11694*/
    6147             : /*11678*/         OPC_CheckPredicate, 29, // Predicate_atomic_store_16
    6148             : /*11680*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6149             : /*11682*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #3 #4
    6150             : /*11685*/         OPC_EmitMergeInputChains1_0,
    6151             : /*11686*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SH64), 0|OPFL_Chain|OPFL_MemRefs,
    6152             :                       3/*#Ops*/, 2, 3, 4, 
    6153             :                   // Src: (atomic_store addr:iPTR:$a, GPR64:i64:$v)<<P:Predicate_atomic_store_16>> - Complexity = 13
    6154             :                   // Dst: (SH64 GPR64:i64:$v, addr:iPTR:$a)
    6155             : /*11694*/       /*Scope*/ 16, /*->11711*/
    6156             : /*11695*/         OPC_CheckPredicate, 30, // Predicate_atomic_store_32
    6157             : /*11697*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6158             : /*11699*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #3 #4
    6159             : /*11702*/         OPC_EmitMergeInputChains1_0,
    6160             : /*11703*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SW64), 0|OPFL_Chain|OPFL_MemRefs,
    6161             :                       3/*#Ops*/, 2, 3, 4, 
    6162             :                   // Src: (atomic_store addr:iPTR:$a, GPR64:i64:$v)<<P:Predicate_atomic_store_32>> - Complexity = 13
    6163             :                   // Dst: (SW64 GPR64:i64:$v, addr:iPTR:$a)
    6164             : /*11711*/       /*Scope*/ 16, /*->11728*/
    6165             : /*11712*/         OPC_CheckPredicate, 31, // Predicate_atomic_store_64
    6166             : /*11714*/         OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6167             : /*11716*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$a #3 #4
    6168             : /*11719*/         OPC_EmitMergeInputChains1_0,
    6169             : /*11720*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SD), 0|OPFL_Chain|OPFL_MemRefs,
    6170             :                       3/*#Ops*/, 2, 3, 4, 
    6171             :                   // Src: (atomic_store addr:iPTR:$a, GPR64:i64:$v)<<P:Predicate_atomic_store_64>> - Complexity = 13
    6172             :                   // Dst: (SD GPR64:i64:$v, addr:iPTR:$a)
    6173             : /*11728*/       0, /*End of Scope*/
    6174             : /*11729*/     0, /*End of Scope*/
    6175             : /*11730*/   /*SwitchOpcode*/ 72, TARGET_VAL(MipsISD::LWL),// ->11805
    6176             : /*11733*/     OPC_RecordMemRef,
    6177             : /*11734*/     OPC_RecordNode, // #0 = 'MipsLWL' chained node
    6178             : /*11735*/     OPC_RecordChild1, // #1 = $addr
    6179             : /*11736*/     OPC_RecordChild2, // #2 = $src
    6180             : /*11737*/     OPC_SwitchType /*2 cases */, 47, MVT::i32,// ->11787
    6181             : /*11740*/       OPC_Scope, 15, /*->11757*/ // 2 children in Scope
    6182             : /*11742*/         OPC_CheckPatternPredicate, 41, // (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6183             : /*11744*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #3 #4
    6184             : /*11747*/         OPC_EmitMergeInputChains1_0,
    6185             : /*11748*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LWL), 0|OPFL_Chain|OPFL_MemRefs,
    6186             :                       MVT::i32, 3/*#Ops*/, 3, 4, 2, 
    6187             :                   // Src: (MipsLWL:i32 addr:iPTR:$addr, GPR32Opnd:i32:$src) - Complexity = 12
    6188             :                   // Dst: (LWL:i32 addr:iPTR:$addr, GPR32Opnd:i32:$src)
    6189             : /*11757*/       /*Scope*/ 28, /*->11786*/
    6190             : /*11758*/         OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    6191             : /*11760*/         OPC_CheckComplexPat, /*CP*/12, /*#*/1, // selectIntAddr12MM:$addr #3 #4
    6192             : /*11763*/         OPC_EmitMergeInputChains1_0,
    6193             : /*11764*/         OPC_Scope, 9, /*->11775*/ // 2 children in Scope
    6194             : /*11766*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::LWL_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6195             :                         MVT::i32, 3/*#Ops*/, 3, 4, 2, 
    6196             :                     // Src: (MipsLWL:i32 addrimm12:iPTR:$addr, GPR32Opnd:i32:$src) - Complexity = 12
    6197             :                     // Dst: (LWL_MM:i32 addrimm12:i32:$addr, GPR32Opnd:i32:$src)
    6198             : /*11775*/         /*Scope*/ 9, /*->11785*/
    6199             : /*11776*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::LWLE_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6200             :                         MVT::i32, 3/*#Ops*/, 3, 4, 2, 
    6201             :                     // Src: (MipsLWL:i32 addrimm12:iPTR:$addr, GPR32Opnd:i32:$src) - Complexity = 12
    6202             :                     // Dst: (LWLE_MM:i32 addrimm12:i32:$addr, GPR32Opnd:i32:$src)
    6203             : /*11785*/         0, /*End of Scope*/
    6204             : /*11786*/       0, /*End of Scope*/
    6205             : /*11787*/     /*SwitchType*/ 15, MVT::i64,// ->11804
    6206             : /*11789*/       OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6207             : /*11791*/       OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #3 #4
    6208             : /*11794*/       OPC_EmitMergeInputChains1_0,
    6209             : /*11795*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::LWL64), 0|OPFL_Chain|OPFL_MemRefs,
    6210             :                     MVT::i64, 3/*#Ops*/, 3, 4, 2, 
    6211             :                 // Src: (MipsLWL:i64 addr:iPTR:$addr, GPR64Opnd:i64:$src) - Complexity = 12
    6212             :                 // Dst: (LWL64:i64 addr:iPTR:$addr, GPR64Opnd:i64:$src)
    6213             : /*11804*/     0, // EndSwitchType
    6214             : /*11805*/   /*SwitchOpcode*/ 72, TARGET_VAL(MipsISD::LWR),// ->11880
    6215             : /*11808*/     OPC_RecordMemRef,
    6216             : /*11809*/     OPC_RecordNode, // #0 = 'MipsLWR' chained node
    6217             : /*11810*/     OPC_RecordChild1, // #1 = $addr
    6218             : /*11811*/     OPC_RecordChild2, // #2 = $src
    6219             : /*11812*/     OPC_SwitchType /*2 cases */, 47, MVT::i32,// ->11862
    6220             : /*11815*/       OPC_Scope, 15, /*->11832*/ // 2 children in Scope
    6221             : /*11817*/         OPC_CheckPatternPredicate, 41, // (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6222             : /*11819*/         OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #3 #4
    6223             : /*11822*/         OPC_EmitMergeInputChains1_0,
    6224             : /*11823*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LWR), 0|OPFL_Chain|OPFL_MemRefs,
    6225             :                       MVT::i32, 3/*#Ops*/, 3, 4, 2, 
    6226             :                   // Src: (MipsLWR:i32 addr:iPTR:$addr, GPR32Opnd:i32:$src) - Complexity = 12
    6227             :                   // Dst: (LWR:i32 addr:iPTR:$addr, GPR32Opnd:i32:$src)
    6228             : /*11832*/       /*Scope*/ 28, /*->11861*/
    6229             : /*11833*/         OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    6230             : /*11835*/         OPC_CheckComplexPat, /*CP*/12, /*#*/1, // selectIntAddr12MM:$addr #3 #4
    6231             : /*11838*/         OPC_EmitMergeInputChains1_0,
    6232             : /*11839*/         OPC_Scope, 9, /*->11850*/ // 2 children in Scope
    6233             : /*11841*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::LWR_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6234             :                         MVT::i32, 3/*#Ops*/, 3, 4, 2, 
    6235             :                     // Src: (MipsLWR:i32 addrimm12:iPTR:$addr, GPR32Opnd:i32:$src) - Complexity = 12
    6236             :                     // Dst: (LWR_MM:i32 addrimm12:i32:$addr, GPR32Opnd:i32:$src)
    6237             : /*11850*/         /*Scope*/ 9, /*->11860*/
    6238             : /*11851*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::LWRE_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6239             :                         MVT::i32, 3/*#Ops*/, 3, 4, 2, 
    6240             :                     // Src: (MipsLWR:i32 addrimm12:iPTR:$addr, GPR32Opnd:i32:$src) - Complexity = 12
    6241             :                     // Dst: (LWRE_MM:i32 addrimm12:i32:$addr, GPR32Opnd:i32:$src)
    6242             : /*11860*/         0, /*End of Scope*/
    6243             : /*11861*/       0, /*End of Scope*/
    6244             : /*11862*/     /*SwitchType*/ 15, MVT::i64,// ->11879
    6245             : /*11864*/       OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6246             : /*11866*/       OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #3 #4
    6247             : /*11869*/       OPC_EmitMergeInputChains1_0,
    6248             : /*11870*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::LWR64), 0|OPFL_Chain|OPFL_MemRefs,
    6249             :                     MVT::i64, 3/*#Ops*/, 3, 4, 2, 
    6250             :                 // Src: (MipsLWR:i64 addr:iPTR:$addr, GPR64Opnd:i64:$src) - Complexity = 12
    6251             :                 // Dst: (LWR64:i64 addr:iPTR:$addr, GPR64Opnd:i64:$src)
    6252             : /*11879*/     0, // EndSwitchType
    6253             : /*11880*/   /*SwitchOpcode*/ 71, TARGET_VAL(MipsISD::SWL),// ->11954
    6254             : /*11883*/     OPC_RecordMemRef,
    6255             : /*11884*/     OPC_RecordNode, // #0 = 'MipsSWL' chained node
    6256             : /*11885*/     OPC_RecordChild1, // #1 = $rt
    6257             : /*11886*/     OPC_Scope, 47, /*->11935*/ // 2 children in Scope
    6258             : /*11888*/       OPC_CheckChild1Type, MVT::i32,
    6259             : /*11890*/       OPC_RecordChild2, // #2 = $addr
    6260             : /*11891*/       OPC_Scope, 14, /*->11907*/ // 2 children in Scope
    6261             : /*11893*/         OPC_CheckPatternPredicate, 41, // (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6262             : /*11895*/         OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
    6263             : /*11898*/         OPC_EmitMergeInputChains1_0,
    6264             : /*11899*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SWL), 0|OPFL_Chain|OPFL_MemRefs,
    6265             :                       3/*#Ops*/, 1, 3, 4, 
    6266             :                   // Src: (MipsSWL GPR32Opnd:i32:$rt, addr:iPTR:$addr) - Complexity = 12
    6267             :                   // Dst: (SWL GPR32Opnd:i32:$rt, addr:iPTR:$addr)
    6268             : /*11907*/       /*Scope*/ 26, /*->11934*/
    6269             : /*11908*/         OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    6270             : /*11910*/         OPC_CheckComplexPat, /*CP*/12, /*#*/2, // selectIntAddr12MM:$addr #3 #4
    6271             : /*11913*/         OPC_EmitMergeInputChains1_0,
    6272             : /*11914*/         OPC_Scope, 8, /*->11924*/ // 2 children in Scope
    6273             : /*11916*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::SWL_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6274             :                         3/*#Ops*/, 1, 3, 4, 
    6275             :                     // Src: (MipsSWL GPR32Opnd:i32:$rt, addrimm12:iPTR:$addr) - Complexity = 12
    6276             :                     // Dst: (SWL_MM GPR32Opnd:i32:$rt, addrimm12:i32:$addr)
    6277             : /*11924*/         /*Scope*/ 8, /*->11933*/
    6278             : /*11925*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::SWLE_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6279             :                         3/*#Ops*/, 1, 3, 4, 
    6280             :                     // Src: (MipsSWL GPR32Opnd:i32:$rt, addrimm12:iPTR:$addr) - Complexity = 12
    6281             :                     // Dst: (SWLE_MM GPR32Opnd:i32:$rt, addrimm12:i32:$addr)
    6282             : /*11933*/         0, /*End of Scope*/
    6283             : /*11934*/       0, /*End of Scope*/
    6284             : /*11935*/     /*Scope*/ 17, /*->11953*/
    6285             : /*11936*/       OPC_CheckChild1Type, MVT::i64,
    6286             : /*11938*/       OPC_RecordChild2, // #2 = $addr
    6287             : /*11939*/       OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6288             : /*11941*/       OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
    6289             : /*11944*/       OPC_EmitMergeInputChains1_0,
    6290             : /*11945*/       OPC_MorphNodeTo0, TARGET_VAL(Mips::SWL64), 0|OPFL_Chain|OPFL_MemRefs,
    6291             :                     3/*#Ops*/, 1, 3, 4, 
    6292             :                 // Src: (MipsSWL GPR64Opnd:i64:$rt, addr:iPTR:$addr) - Complexity = 12
    6293             :                 // Dst: (SWL64 GPR64Opnd:i64:$rt, addr:iPTR:$addr)
    6294             : /*11953*/     0, /*End of Scope*/
    6295             : /*11954*/   /*SwitchOpcode*/ 71, TARGET_VAL(MipsISD::SWR),// ->12028
    6296             : /*11957*/     OPC_RecordMemRef,
    6297             : /*11958*/     OPC_RecordNode, // #0 = 'MipsSWR' chained node
    6298             : /*11959*/     OPC_RecordChild1, // #1 = $rt
    6299             : /*11960*/     OPC_Scope, 47, /*->12009*/ // 2 children in Scope
    6300             : /*11962*/       OPC_CheckChild1Type, MVT::i32,
    6301             : /*11964*/       OPC_RecordChild2, // #2 = $addr
    6302             : /*11965*/       OPC_Scope, 14, /*->11981*/ // 2 children in Scope
    6303             : /*11967*/         OPC_CheckPatternPredicate, 41, // (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6304             : /*11969*/         OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
    6305             : /*11972*/         OPC_EmitMergeInputChains1_0,
    6306             : /*11973*/         OPC_MorphNodeTo0, TARGET_VAL(Mips::SWR), 0|OPFL_Chain|OPFL_MemRefs,
    6307             :                       3/*#Ops*/, 1, 3, 4, 
    6308             :                   // Src: (MipsSWR GPR32Opnd:i32:$rt, addr:iPTR:$addr) - Complexity = 12
    6309             :                   // Dst: (SWR GPR32Opnd:i32:$rt, addr:iPTR:$addr)
    6310             : /*11981*/       /*Scope*/ 26, /*->12008*/
    6311             : /*11982*/         OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode())
    6312             : /*11984*/         OPC_CheckComplexPat, /*CP*/12, /*#*/2, // selectIntAddr12MM:$addr #3 #4
    6313             : /*11987*/         OPC_EmitMergeInputChains1_0,
    6314             : /*11988*/         OPC_Scope, 8, /*->11998*/ // 2 children in Scope
    6315             : /*11990*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::SWR_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6316             :                         3/*#Ops*/, 1, 3, 4, 
    6317             :                     // Src: (MipsSWR GPR32Opnd:i32:$rt, addrimm12:iPTR:$addr) - Complexity = 12
    6318             :                     // Dst: (SWR_MM GPR32Opnd:i32:$rt, addrimm12:i32:$addr)
    6319             : /*11998*/         /*Scope*/ 8, /*->12007*/
    6320             : /*11999*/           OPC_MorphNodeTo0, TARGET_VAL(Mips::SWRE_MM), 0|OPFL_Chain|OPFL_MemRefs,
    6321             :                         3/*#Ops*/, 1, 3, 4, 
    6322             :                     // Src: (MipsSWR GPR32Opnd:i32:$rt, addrimm12:iPTR:$addr) - Complexity = 12
    6323             :                     // Dst: (SWRE_MM GPR32Opnd:i32:$rt, addrimm12:i32:$addr)
    6324             : /*12007*/         0, /*End of Scope*/
    6325             : /*12008*/       0, /*End of Scope*/
    6326             : /*12009*/     /*Scope*/ 17, /*->12027*/
    6327             : /*12010*/       OPC_CheckChild1Type, MVT::i64,
    6328             : /*12012*/       OPC_RecordChild2, // #2 = $addr
    6329             : /*12013*/       OPC_CheckPatternPredicate, 10, // (Subtarget->hasStandardEncoding())
    6330             : /*12015*/       OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
    6331             : /*12018*/       OPC_EmitMergeInputChains1_0,
    6332             : /*12019*/       OPC_MorphNodeTo0, TARGET_VAL(Mips::SWR64), 0|OPFL_Chain|OPFL_MemRefs,
    6333             :                     3/*#Ops*/, 1, 3, 4, 
    6334             :                 // Src: (MipsSWR GPR64Opnd:i64:$rt, addr:iPTR:$addr) - Complexity = 12
    6335             :                 // Dst: (SWR64 GPR64Opnd:i64:$rt, addr:iPTR:$addr)
    6336             : /*12027*/     0, /*End of Scope*/
    6337             : /*12028*/   /*SwitchOpcode*/ 21, TARGET_VAL(MipsISD::LDL),// ->12052
    6338             : /*12031*/     OPC_RecordMemRef,
    6339             : /*12032*/     OPC_RecordNode, // #0 = 'MipsLDL' chained node
    6340             : /*12033*/     OPC_RecordChild1, // #1 = $addr
    6341             : /*12034*/     OPC_RecordChild2, // #2 = $src
    6342             : /*12035*/     OPC_CheckType, MVT::i64,
    6343             : /*12037*/     OPC_CheckPatternPredicate, 42, // (Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6344             : /*12039*/     OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #3 #4
    6345             : /*12042*/     OPC_EmitMergeInputChains1_0,
    6346             : /*12043*/     OPC_MorphNodeTo1, TARGET_VAL(Mips::LDL), 0|OPFL_Chain|OPFL_MemRefs,
    6347             :                   MVT::i64, 3/*#Ops*/, 3, 4, 2, 
    6348             :               // Src: (MipsLDL:i64 addr:iPTR:$addr, GPR64Opnd:i64:$src) - Complexity = 12
    6349             :               // Dst: (LDL:i64 addr:iPTR:$addr, GPR64Opnd:i64:$src)
    6350             : /*12052*/   /*SwitchOpcode*/ 21, TARGET_VAL(MipsISD::LDR),// ->12076
    6351             : /*12055*/     OPC_RecordMemRef,
    6352             : /*12056*/     OPC_RecordNode, // #0 = 'MipsLDR' chained node
    6353             : /*12057*/     OPC_RecordChild1, // #1 = $addr
    6354             : /*12058*/     OPC_RecordChild2, // #2 = $src
    6355             : /*12059*/     OPC_CheckType, MVT::i64,
    6356             : /*12061*/     OPC_CheckPatternPredicate, 42, // (Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6357             : /*12063*/     OPC_CheckComplexPat, /*CP*/1, /*#*/1, // selectIntAddr:$addr #3 #4
    6358             : /*12066*/     OPC_EmitMergeInputChains1_0,
    6359             : /*12067*/     OPC_MorphNodeTo1, TARGET_VAL(Mips::LDR), 0|OPFL_Chain|OPFL_MemRefs,
    6360             :                   MVT::i64, 3/*#Ops*/, 3, 4, 2, 
    6361             :               // Src: (MipsLDR:i64 addr:iPTR:$addr, GPR64Opnd:i64:$src) - Complexity = 12
    6362             :               // Dst: (LDR:i64 addr:iPTR:$addr, GPR64Opnd:i64:$src)
    6363             : /*12076*/   /*SwitchOpcode*/ 20, TARGET_VAL(MipsISD::SDL),// ->12099
    6364             : /*12079*/     OPC_RecordMemRef,
    6365             : /*12080*/     OPC_RecordNode, // #0 = 'MipsSDL' chained node
    6366             : /*12081*/     OPC_RecordChild1, // #1 = $rt
    6367             : /*12082*/     OPC_CheckChild1Type, MVT::i64,
    6368             : /*12084*/     OPC_RecordChild2, // #2 = $addr
    6369             : /*12085*/     OPC_CheckPatternPredicate, 42, // (Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6370             : /*12087*/     OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
    6371             : /*12090*/     OPC_EmitMergeInputChains1_0,
    6372             : /*12091*/     OPC_MorphNodeTo0, TARGET_VAL(Mips::SDL), 0|OPFL_Chain|OPFL_MemRefs,
    6373             :                   3/*#Ops*/, 1, 3, 4, 
    6374             :               // Src: (MipsSDL GPR64Opnd:i64:$rt, addr:iPTR:$addr) - Complexity = 12
    6375             :               // Dst: (SDL GPR64Opnd:i64:$rt, addr:iPTR:$addr)
    6376             : /*12099*/   /*SwitchOpcode*/ 20, TARGET_VAL(MipsISD::SDR),// ->12122
    6377             : /*12102*/     OPC_RecordMemRef,
    6378             : /*12103*/     OPC_RecordNode, // #0 = 'MipsSDR' chained node
    6379             : /*12104*/     OPC_RecordChild1, // #1 = $rt
    6380             : /*12105*/     OPC_CheckChild1Type, MVT::i64,
    6381             : /*12107*/     OPC_RecordChild2, // #2 = $addr
    6382             : /*12108*/     OPC_CheckPatternPredicate, 42, // (Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6())
    6383             : /*12110*/     OPC_CheckComplexPat, /*CP*/1, /*#*/2, // selectIntAddr:$addr #3 #4
    6384             : /*12113*/     OPC_EmitMergeInputChains1_0,
    6385             : /*12114*/     OPC_MorphNodeTo0, TARGET_VAL(Mips::SDR), 0|OPFL_Chain|OPFL_MemRefs,
    6386             :                   3/*#Ops*/, 1, 3, 4, 
    6387             :               // Src: (MipsSDR GPR64Opnd:i64:$rt, addr:iPTR:$addr) - Complexity = 12
    6388             :               // Dst: (SDR GPR64Opnd:i64:$rt, addr:iPTR:$addr)
    6389             : /*12122*/   /*SwitchOpcode*/ 121|128,10/*1401*/, TARGET_VAL(ISD::INTRINSIC_W_CHAIN),// ->13527
    6390             : /*12126*/     OPC_RecordNode, // #0 = 'intrinsic_w_chain' chained node
    6391             : /*12127*/     OPC_Scope, 69, /*->12198*/ // 42 children in Scope
    6392             : /*12129*/       OPC_CheckChild1Integer, 12|128,23/*2956*/, 
    6393             : /*12132*/       OPC_RecordChild2, // #1 = $rt
    6394             : /*12133*/       OPC_RecordChild3, // #2 = $rs_sa
    6395             : /*12134*/       OPC_Scope, 37, /*->12173*/ // 3 children in Scope
    6396             : /*12136*/         OPC_MoveChild3,
    6397             : /*12137*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6398             : /*12140*/         OPC_CheckPredicate, 32, // Predicate_immZExt5
    6399             : /*12142*/         OPC_MoveParent,
    6400             : /*12143*/         OPC_Scope, 13, /*->12158*/ // 2 children in Scope
    6401             : /*12145*/           OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6402             : /*12147*/           OPC_EmitMergeInputChains1_0,
    6403             : /*12148*/           OPC_EmitConvertToTarget, 2,
    6404             : /*12150*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLL_S_W), 0|OPFL_Chain,
    6405             :                         MVT::i32, 2/*#Ops*/, 1, 3, 
    6406             :                     // Src: (intrinsic_w_chain:i32 2956:iPTR, GPR32Opnd:i32:$rt, (imm:i32)<<P:Predicate_immZExt5>>:$rs_sa) - Complexity = 12
    6407             :                     // Dst: (SHLL_S_W:i32 GPR32Opnd:i32:$rt, (imm:i32):$rs_sa)
    6408             : /*12158*/         /*Scope*/ 13, /*->12172*/
    6409             : /*12159*/           OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6410             : /*12161*/           OPC_EmitMergeInputChains1_0,
    6411             : /*12162*/           OPC_EmitConvertToTarget, 2,
    6412             : /*12164*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLL_S_W_MM), 0|OPFL_Chain,
    6413             :                         MVT::i32, 2/*#Ops*/, 1, 3, 
    6414             :                     // Src: (intrinsic_w_chain:i32 2956:iPTR, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    6415             :                     // Dst: (SHLL_S_W_MM:i32 GPR32Opnd:i32:$rs, (imm:i32):$sa)
    6416             : /*12172*/         0, /*End of Scope*/
    6417             : /*12173*/       /*Scope*/ 11, /*->12185*/
    6418             : /*12174*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6419             : /*12176*/         OPC_EmitMergeInputChains1_0,
    6420             : /*12177*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLLV_S_W), 0|OPFL_Chain,
    6421             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6422             :                   // Src: (intrinsic_w_chain:i32 2956:iPTR, GPR32Opnd:i32:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    6423             :                   // Dst: (SHLLV_S_W:i32 GPR32Opnd:i32:$rt, GPR32Opnd:i32:$rs_sa)
    6424             : /*12185*/       /*Scope*/ 11, /*->12197*/
    6425             : /*12186*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6426             : /*12188*/         OPC_EmitMergeInputChains1_0,
    6427             : /*12189*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLLV_S_W_MM), 0|OPFL_Chain,
    6428             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6429             :                   // Src: (intrinsic_w_chain:i32 2956:iPTR, GPR32Opnd:i32:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    6430             :                   // Dst: (SHLLV_S_W_MM:i32 GPR32Opnd:i32:$rt, GPR32Opnd:i32:$rs)
    6431             : /*12197*/       0, /*End of Scope*/
    6432             : /*12198*/     /*Scope*/ 42, /*->12241*/
    6433             : /*12199*/       OPC_CheckChild1Integer, 122|128,22/*2938*/, 
    6434             : /*12202*/       OPC_RecordChild2, // #1 = $mask
    6435             : /*12203*/       OPC_MoveChild2,
    6436             : /*12204*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6437             : /*12207*/       OPC_Scope, 15, /*->12224*/ // 2 children in Scope
    6438             : /*12209*/         OPC_CheckPredicate, 33, // Predicate_immZExt10
    6439             : /*12211*/         OPC_MoveParent,
    6440             : /*12212*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6441             : /*12214*/         OPC_EmitMergeInputChains1_0,
    6442             : /*12215*/         OPC_EmitConvertToTarget, 1,
    6443             : /*12217*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::RDDSP), 0|OPFL_Chain,
    6444             :                       MVT::i32, 1/*#Ops*/, 2, 
    6445             :                   // Src: (intrinsic_w_chain:i32 2938:iPTR, (imm:i32)<<P:Predicate_immZExt10>>:$mask) - Complexity = 12
    6446             :                   // Dst: (RDDSP:i32 (imm:i32):$mask)
    6447             : /*12224*/       /*Scope*/ 15, /*->12240*/
    6448             : /*12225*/         OPC_CheckPredicate, 34, // Predicate_immZExt7
    6449             : /*12227*/         OPC_MoveParent,
    6450             : /*12228*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6451             : /*12230*/         OPC_EmitMergeInputChains1_0,
    6452             : /*12231*/         OPC_EmitConvertToTarget, 1,
    6453             : /*12233*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::RDDSP_MM), 0|OPFL_Chain,
    6454             :                       MVT::i32, 1/*#Ops*/, 2, 
    6455             :                   // Src: (intrinsic_w_chain:i32 2938:iPTR, (imm:i32)<<P:Predicate_immZExt7>>:$mask) - Complexity = 12
    6456             :                   // Dst: (RDDSP_MM:i32 (imm:i32):$mask)
    6457             : /*12240*/       0, /*End of Scope*/
    6458             : /*12241*/     /*Scope*/ 31, /*->12273*/
    6459             : /*12242*/       OPC_CheckChild1Integer, 106|128,18/*2410*/, 
    6460             : /*12245*/       OPC_RecordChild2, // #1 = $rs
    6461             : /*12246*/       OPC_RecordChild3, // #2 = $rt
    6462             : /*12247*/       OPC_Scope, 11, /*->12260*/ // 2 children in Scope
    6463             : /*12249*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6464             : /*12251*/         OPC_EmitMergeInputChains1_0,
    6465             : /*12252*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQ_S_W), 0|OPFL_Chain,
    6466             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6467             :                   // Src: (intrinsic_w_chain:i32 2410:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6468             :                   // Dst: (ADDQ_S_W:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6469             : /*12260*/       /*Scope*/ 11, /*->12272*/
    6470             : /*12261*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6471             : /*12263*/         OPC_EmitMergeInputChains1_0,
    6472             : /*12264*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQ_S_W_MM), 0|OPFL_Chain,
    6473             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6474             :                   // Src: (intrinsic_w_chain:i32 2410:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6475             :                   // Dst: (ADDQ_S_W_MM:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6476             : /*12272*/       0, /*End of Scope*/
    6477             : /*12273*/     /*Scope*/ 31, /*->12305*/
    6478             : /*12274*/       OPC_CheckChild1Integer, 82|128,23/*3026*/, 
    6479             : /*12277*/       OPC_RecordChild2, // #1 = $rs
    6480             : /*12278*/       OPC_RecordChild3, // #2 = $rt
    6481             : /*12279*/       OPC_Scope, 11, /*->12292*/ // 2 children in Scope
    6482             : /*12281*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6483             : /*12283*/         OPC_EmitMergeInputChains1_0,
    6484             : /*12284*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQ_S_W), 0|OPFL_Chain,
    6485             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6486             :                   // Src: (intrinsic_w_chain:i32 3026:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6487             :                   // Dst: (SUBQ_S_W:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6488             : /*12292*/       /*Scope*/ 11, /*->12304*/
    6489             : /*12293*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6490             : /*12295*/         OPC_EmitMergeInputChains1_0,
    6491             : /*12296*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQ_S_W_MM), 0|OPFL_Chain,
    6492             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6493             :                   // Src: (intrinsic_w_chain:i32 3026:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6494             :                   // Dst: (SUBQ_S_W_MM:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6495             : /*12304*/       0, /*End of Scope*/
    6496             : /*12305*/     /*Scope*/ 28, /*->12334*/
    6497             : /*12306*/       OPC_CheckChild1Integer, 99|128,18/*2403*/, 
    6498             : /*12309*/       OPC_RecordChild2, // #1 = $rt
    6499             : /*12310*/       OPC_Scope, 10, /*->12322*/ // 2 children in Scope
    6500             : /*12312*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6501             : /*12314*/         OPC_EmitMergeInputChains1_0,
    6502             : /*12315*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ABSQ_S_W), 0|OPFL_Chain,
    6503             :                       MVT::i32, 1/*#Ops*/, 1, 
    6504             :                   // Src: (intrinsic_w_chain:i32 2403:iPTR, GPR32Opnd:i32:$rt) - Complexity = 8
    6505             :                   // Dst: (ABSQ_S_W:i32 GPR32Opnd:i32:$rt)
    6506             : /*12322*/       /*Scope*/ 10, /*->12333*/
    6507             : /*12323*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6508             : /*12325*/         OPC_EmitMergeInputChains1_0,
    6509             : /*12326*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ABSQ_S_W_MM), 0|OPFL_Chain,
    6510             :                       MVT::i32, 1/*#Ops*/, 1, 
    6511             :                   // Src: (intrinsic_w_chain:i32 2403:iPTR, GPR32Opnd:i32:$rs) - Complexity = 8
    6512             :                   // Dst: (ABSQ_S_W_MM:i32 GPR32Opnd:i32:$rs)
    6513             : /*12333*/       0, /*End of Scope*/
    6514             : /*12334*/     /*Scope*/ 31, /*->12366*/
    6515             : /*12335*/       OPC_CheckChild1Integer, 58|128,22/*2874*/, 
    6516             : /*12338*/       OPC_RecordChild2, // #1 = $rs
    6517             : /*12339*/       OPC_RecordChild3, // #2 = $rt
    6518             : /*12340*/       OPC_Scope, 11, /*->12353*/ // 2 children in Scope
    6519             : /*12342*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6520             : /*12344*/         OPC_EmitMergeInputChains1_0,
    6521             : /*12345*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULEQ_S_W_PHL), 0|OPFL_Chain,
    6522             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6523             :                   // Src: (intrinsic_w_chain:i32 2874:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6524             :                   // Dst: (MULEQ_S_W_PHL:i32 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    6525             : /*12353*/       /*Scope*/ 11, /*->12365*/
    6526             : /*12354*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6527             : /*12356*/         OPC_EmitMergeInputChains1_0,
    6528             : /*12357*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULEQ_S_W_PHL_MM), 0|OPFL_Chain,
    6529             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6530             :                   // Src: (intrinsic_w_chain:i32 2874:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6531             :                   // Dst: (MULEQ_S_W_PHL_MM:i32 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    6532             : /*12365*/       0, /*End of Scope*/
    6533             : /*12366*/     /*Scope*/ 31, /*->12398*/
    6534             : /*12367*/       OPC_CheckChild1Integer, 59|128,22/*2875*/, 
    6535             : /*12370*/       OPC_RecordChild2, // #1 = $rs
    6536             : /*12371*/       OPC_RecordChild3, // #2 = $rt
    6537             : /*12372*/       OPC_Scope, 11, /*->12385*/ // 2 children in Scope
    6538             : /*12374*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6539             : /*12376*/         OPC_EmitMergeInputChains1_0,
    6540             : /*12377*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULEQ_S_W_PHR), 0|OPFL_Chain,
    6541             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6542             :                   // Src: (intrinsic_w_chain:i32 2875:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6543             :                   // Dst: (MULEQ_S_W_PHR:i32 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    6544             : /*12385*/       /*Scope*/ 11, /*->12397*/
    6545             : /*12386*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6546             : /*12388*/         OPC_EmitMergeInputChains1_0,
    6547             : /*12389*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULEQ_S_W_PHR_MM), 0|OPFL_Chain,
    6548             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6549             :                   // Src: (intrinsic_w_chain:i32 2875:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6550             :                   // Dst: (MULEQ_S_W_PHR_MM:i32 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    6551             : /*12397*/       0, /*End of Scope*/
    6552             : /*12398*/     /*Scope*/ 31, /*->12430*/
    6553             : /*12399*/       OPC_CheckChild1Integer, 16|128,20/*2576*/, 
    6554             : /*12402*/       OPC_RecordChild2, // #1 = $rs
    6555             : /*12403*/       OPC_RecordChild3, // #2 = $rt
    6556             : /*12404*/       OPC_Scope, 11, /*->12417*/ // 2 children in Scope
    6557             : /*12406*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6558             : /*12408*/         OPC_EmitMergeInputChains1_0,
    6559             : /*12409*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGU_EQ_QB), 0|OPFL_Chain,
    6560             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6561             :                   // Src: (intrinsic_w_chain:i32 2576:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6562             :                   // Dst: (CMPGU_EQ_QB:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6563             : /*12417*/       /*Scope*/ 11, /*->12429*/
    6564             : /*12418*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6565             : /*12420*/         OPC_EmitMergeInputChains1_0,
    6566             : /*12421*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGU_EQ_QB_MM), 0|OPFL_Chain,
    6567             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6568             :                   // Src: (intrinsic_w_chain:i32 2576:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6569             :                   // Dst: (CMPGU_EQ_QB_MM:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6570             : /*12429*/       0, /*End of Scope*/
    6571             : /*12430*/     /*Scope*/ 31, /*->12462*/
    6572             : /*12431*/       OPC_CheckChild1Integer, 18|128,20/*2578*/, 
    6573             : /*12434*/       OPC_RecordChild2, // #1 = $rs
    6574             : /*12435*/       OPC_RecordChild3, // #2 = $rt
    6575             : /*12436*/       OPC_Scope, 11, /*->12449*/ // 2 children in Scope
    6576             : /*12438*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6577             : /*12440*/         OPC_EmitMergeInputChains1_0,
    6578             : /*12441*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGU_LT_QB), 0|OPFL_Chain,
    6579             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6580             :                   // Src: (intrinsic_w_chain:i32 2578:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6581             :                   // Dst: (CMPGU_LT_QB:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6582             : /*12449*/       /*Scope*/ 11, /*->12461*/
    6583             : /*12450*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6584             : /*12452*/         OPC_EmitMergeInputChains1_0,
    6585             : /*12453*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGU_LT_QB_MM), 0|OPFL_Chain,
    6586             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6587             :                   // Src: (intrinsic_w_chain:i32 2578:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6588             :                   // Dst: (CMPGU_LT_QB_MM:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6589             : /*12461*/       0, /*End of Scope*/
    6590             : /*12462*/     /*Scope*/ 31, /*->12494*/
    6591             : /*12463*/       OPC_CheckChild1Integer, 17|128,20/*2577*/, 
    6592             : /*12466*/       OPC_RecordChild2, // #1 = $rs
    6593             : /*12467*/       OPC_RecordChild3, // #2 = $rt
    6594             : /*12468*/       OPC_Scope, 11, /*->12481*/ // 2 children in Scope
    6595             : /*12470*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6596             : /*12472*/         OPC_EmitMergeInputChains1_0,
    6597             : /*12473*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGU_LE_QB), 0|OPFL_Chain,
    6598             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6599             :                   // Src: (intrinsic_w_chain:i32 2577:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6600             :                   // Dst: (CMPGU_LE_QB:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6601             : /*12481*/       /*Scope*/ 11, /*->12493*/
    6602             : /*12482*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6603             : /*12484*/         OPC_EmitMergeInputChains1_0,
    6604             : /*12485*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGU_LE_QB_MM), 0|OPFL_Chain,
    6605             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6606             :                   // Src: (intrinsic_w_chain:i32 2577:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6607             :                   // Dst: (CMPGU_LE_QB_MM:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6608             : /*12493*/       0, /*End of Scope*/
    6609             : /*12494*/     /*Scope*/ 31, /*->12526*/
    6610             : /*12495*/       OPC_CheckChild1Integer, 106|128,21/*2794*/, 
    6611             : /*12498*/       OPC_RecordChild2, // #1 = $base
    6612             : /*12499*/       OPC_RecordChild3, // #2 = $index
    6613             : /*12500*/       OPC_Scope, 11, /*->12513*/ // 2 children in Scope
    6614             : /*12502*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6615             : /*12504*/         OPC_EmitMergeInputChains1_0,
    6616             : /*12505*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LWX), 0|OPFL_Chain,
    6617             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6618             :                   // Src: (intrinsic_w_chain:i32 2794:iPTR, iPTR:iPTR:$base, iPTR:i32:$index) - Complexity = 8
    6619             :                   // Dst: (LWX:i32 iPTR:iPTR:$base, iPTR:i32:$index)
    6620             : /*12513*/       /*Scope*/ 11, /*->12525*/
    6621             : /*12514*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6622             : /*12516*/         OPC_EmitMergeInputChains1_0,
    6623             : /*12517*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LWX_MM), 0|OPFL_Chain,
    6624             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6625             :                   // Src: (intrinsic_w_chain:i32 2794:iPTR, iPTR:iPTR:$base, iPTR:i32:$index) - Complexity = 8
    6626             :                   // Dst: (LWX_MM:i32 iPTR:iPTR:$base, iPTR:i32:$index)
    6627             : /*12525*/       0, /*End of Scope*/
    6628             : /*12526*/     /*Scope*/ 31, /*->12558*/
    6629             : /*12527*/       OPC_CheckChild1Integer, 104|128,21/*2792*/, 
    6630             : /*12530*/       OPC_RecordChild2, // #1 = $base
    6631             : /*12531*/       OPC_RecordChild3, // #2 = $index
    6632             : /*12532*/       OPC_Scope, 11, /*->12545*/ // 2 children in Scope
    6633             : /*12534*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6634             : /*12536*/         OPC_EmitMergeInputChains1_0,
    6635             : /*12537*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LHX), 0|OPFL_Chain,
    6636             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6637             :                   // Src: (intrinsic_w_chain:i32 2792:iPTR, iPTR:iPTR:$base, iPTR:i32:$index) - Complexity = 8
    6638             :                   // Dst: (LHX:i32 iPTR:iPTR:$base, iPTR:i32:$index)
    6639             : /*12545*/       /*Scope*/ 11, /*->12557*/
    6640             : /*12546*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6641             : /*12548*/         OPC_EmitMergeInputChains1_0,
    6642             : /*12549*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LHX_MM), 0|OPFL_Chain,
    6643             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6644             :                   // Src: (intrinsic_w_chain:i32 2792:iPTR, iPTR:iPTR:$base, iPTR:i32:$index) - Complexity = 8
    6645             :                   // Dst: (LHX_MM:i32 iPTR:iPTR:$base, iPTR:i32:$index)
    6646             : /*12557*/       0, /*End of Scope*/
    6647             : /*12558*/     /*Scope*/ 31, /*->12590*/
    6648             : /*12559*/       OPC_CheckChild1Integer, 95|128,21/*2783*/, 
    6649             : /*12562*/       OPC_RecordChild2, // #1 = $base
    6650             : /*12563*/       OPC_RecordChild3, // #2 = $index
    6651             : /*12564*/       OPC_Scope, 11, /*->12577*/ // 2 children in Scope
    6652             : /*12566*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6653             : /*12568*/         OPC_EmitMergeInputChains1_0,
    6654             : /*12569*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LBUX), 0|OPFL_Chain,
    6655             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6656             :                   // Src: (intrinsic_w_chain:i32 2783:iPTR, iPTR:iPTR:$base, iPTR:i32:$index) - Complexity = 8
    6657             :                   // Dst: (LBUX:i32 iPTR:iPTR:$base, iPTR:i32:$index)
    6658             : /*12577*/       /*Scope*/ 11, /*->12589*/
    6659             : /*12578*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6660             : /*12580*/         OPC_EmitMergeInputChains1_0,
    6661             : /*12581*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::LBUX_MM), 0|OPFL_Chain,
    6662             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6663             :                   // Src: (intrinsic_w_chain:i32 2783:iPTR, iPTR:iPTR:$base, iPTR:i32:$index) - Complexity = 8
    6664             :                   // Dst: (LBUX_MM:i32 iPTR:iPTR:$base, iPTR:i32:$index)
    6665             : /*12589*/       0, /*End of Scope*/
    6666             : /*12590*/     /*Scope*/ 31, /*->12622*/
    6667             : /*12591*/       OPC_CheckChild1Integer, 90|128,21/*2778*/, 
    6668             : /*12594*/       OPC_RecordChild2, // #1 = $src
    6669             : /*12595*/       OPC_RecordChild3, // #2 = $rs
    6670             : /*12596*/       OPC_Scope, 11, /*->12609*/ // 2 children in Scope
    6671             : /*12598*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6672             : /*12600*/         OPC_EmitMergeInputChains1_0,
    6673             : /*12601*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::INSV), 0|OPFL_Chain,
    6674             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6675             :                   // Src: (intrinsic_w_chain:i32 2778:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs) - Complexity = 8
    6676             :                   // Dst: (INSV:i32 GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs)
    6677             : /*12609*/       /*Scope*/ 11, /*->12621*/
    6678             : /*12610*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6679             : /*12612*/         OPC_EmitMergeInputChains1_0,
    6680             : /*12613*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::INSV_MM), 0|OPFL_Chain,
    6681             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6682             :                   // Src: (intrinsic_w_chain:i32 2778:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs) - Complexity = 8
    6683             :                   // Dst: (INSV_MM:i32 GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs)
    6684             : /*12621*/       0, /*End of Scope*/
    6685             : /*12622*/     /*Scope*/ 31, /*->12654*/
    6686             : /*12623*/       OPC_CheckChild1Integer, 13|128,20/*2573*/, 
    6687             : /*12626*/       OPC_RecordChild2, // #1 = $rs
    6688             : /*12627*/       OPC_RecordChild3, // #2 = $rt
    6689             : /*12628*/       OPC_Scope, 11, /*->12641*/ // 2 children in Scope
    6690             : /*12630*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    6691             : /*12632*/         OPC_EmitMergeInputChains1_0,
    6692             : /*12633*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGDU_EQ_QB), 0|OPFL_Chain,
    6693             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6694             :                   // Src: (intrinsic_w_chain:i32 2573:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6695             :                   // Dst: (CMPGDU_EQ_QB:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6696             : /*12641*/       /*Scope*/ 11, /*->12653*/
    6697             : /*12642*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    6698             : /*12644*/         OPC_EmitMergeInputChains1_0,
    6699             : /*12645*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGDU_EQ_QB_MMR2), 0|OPFL_Chain,
    6700             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6701             :                   // Src: (intrinsic_w_chain:i32 2573:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6702             :                   // Dst: (CMPGDU_EQ_QB_MMR2:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6703             : /*12653*/       0, /*End of Scope*/
    6704             : /*12654*/     /*Scope*/ 31, /*->12686*/
    6705             : /*12655*/       OPC_CheckChild1Integer, 15|128,20/*2575*/, 
    6706             : /*12658*/       OPC_RecordChild2, // #1 = $rs
    6707             : /*12659*/       OPC_RecordChild3, // #2 = $rt
    6708             : /*12660*/       OPC_Scope, 11, /*->12673*/ // 2 children in Scope
    6709             : /*12662*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    6710             : /*12664*/         OPC_EmitMergeInputChains1_0,
    6711             : /*12665*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGDU_LT_QB), 0|OPFL_Chain,
    6712             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6713             :                   // Src: (intrinsic_w_chain:i32 2575:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6714             :                   // Dst: (CMPGDU_LT_QB:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6715             : /*12673*/       /*Scope*/ 11, /*->12685*/
    6716             : /*12674*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    6717             : /*12676*/         OPC_EmitMergeInputChains1_0,
    6718             : /*12677*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGDU_LT_QB_MMR2), 0|OPFL_Chain,
    6719             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6720             :                   // Src: (intrinsic_w_chain:i32 2575:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6721             :                   // Dst: (CMPGDU_LT_QB_MMR2:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6722             : /*12685*/       0, /*End of Scope*/
    6723             : /*12686*/     /*Scope*/ 31, /*->12718*/
    6724             : /*12687*/       OPC_CheckChild1Integer, 14|128,20/*2574*/, 
    6725             : /*12690*/       OPC_RecordChild2, // #1 = $rs
    6726             : /*12691*/       OPC_RecordChild3, // #2 = $rt
    6727             : /*12692*/       OPC_Scope, 11, /*->12705*/ // 2 children in Scope
    6728             : /*12694*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    6729             : /*12696*/         OPC_EmitMergeInputChains1_0,
    6730             : /*12697*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGDU_LE_QB), 0|OPFL_Chain,
    6731             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6732             :                   // Src: (intrinsic_w_chain:i32 2574:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6733             :                   // Dst: (CMPGDU_LE_QB:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6734             : /*12705*/       /*Scope*/ 11, /*->12717*/
    6735             : /*12706*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    6736             : /*12708*/         OPC_EmitMergeInputChains1_0,
    6737             : /*12709*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::CMPGDU_LE_QB_MMR2), 0|OPFL_Chain,
    6738             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6739             :                   // Src: (intrinsic_w_chain:i32 2574:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    6740             :                   // Dst: (CMPGDU_LE_QB_MMR2:i32 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    6741             : /*12717*/       0, /*End of Scope*/
    6742             : /*12718*/     /*Scope*/ 31, /*->12750*/
    6743             : /*12719*/       OPC_CheckChild1Integer, 65|128,22/*2881*/, 
    6744             : /*12722*/       OPC_RecordChild2, // #1 = $rs
    6745             : /*12723*/       OPC_RecordChild3, // #2 = $rt
    6746             : /*12724*/       OPC_Scope, 11, /*->12737*/ // 2 children in Scope
    6747             : /*12726*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    6748             : /*12728*/         OPC_EmitMergeInputChains1_0,
    6749             : /*12729*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULQ_S_W), 0|OPFL_Chain,
    6750             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6751             :                   // Src: (intrinsic_w_chain:i32 2881:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6752             :                   // Dst: (MULQ_S_W:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6753             : /*12737*/       /*Scope*/ 11, /*->12749*/
    6754             : /*12738*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    6755             : /*12740*/         OPC_EmitMergeInputChains1_0,
    6756             : /*12741*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULQ_S_W_MMR2), 0|OPFL_Chain,
    6757             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6758             :                   // Src: (intrinsic_w_chain:i32 2881:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6759             :                   // Dst: (MULQ_S_W_MMR2:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6760             : /*12749*/       0, /*End of Scope*/
    6761             : /*12750*/     /*Scope*/ 31, /*->12782*/
    6762             : /*12751*/       OPC_CheckChild1Integer, 63|128,22/*2879*/, 
    6763             : /*12754*/       OPC_RecordChild2, // #1 = $rs
    6764             : /*12755*/       OPC_RecordChild3, // #2 = $rt
    6765             : /*12756*/       OPC_Scope, 11, /*->12769*/ // 2 children in Scope
    6766             : /*12758*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    6767             : /*12760*/         OPC_EmitMergeInputChains1_0,
    6768             : /*12761*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULQ_RS_W), 0|OPFL_Chain,
    6769             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6770             :                   // Src: (intrinsic_w_chain:i32 2879:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6771             :                   // Dst: (MULQ_RS_W:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6772             : /*12769*/       /*Scope*/ 11, /*->12781*/
    6773             : /*12770*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    6774             : /*12772*/         OPC_EmitMergeInputChains1_0,
    6775             : /*12773*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULQ_RS_W_MMR2), 0|OPFL_Chain,
    6776             :                       MVT::i32, 2/*#Ops*/, 1, 2, 
    6777             :                   // Src: (intrinsic_w_chain:i32 2879:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6778             :                   // Dst: (MULQ_RS_W_MMR2:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6779             : /*12781*/       0, /*End of Scope*/
    6780             : /*12782*/     /*Scope*/ 16, /*->12799*/
    6781             : /*12783*/       OPC_CheckChild1Integer, 123|128,18/*2427*/, 
    6782             : /*12786*/       OPC_RecordChild2, // #1 = $a
    6783             : /*12787*/       OPC_RecordChild3, // #2 = $b
    6784             : /*12788*/       OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6785             : /*12790*/       OPC_EmitMergeInputChains1_0,
    6786             : /*12791*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDSC), 0|OPFL_Chain,
    6787             :                     MVT::i32, 2/*#Ops*/, 1, 2, 
    6788             :                 // Src: (intrinsic_w_chain:i32 2427:iPTR, i32:i32:$a, i32:i32:$b) - Complexity = 8
    6789             :                 // Dst: (ADDSC:i32 i32:i32:$a, i32:i32:$b)
    6790             : /*12799*/     /*Scope*/ 16, /*->12816*/
    6791             : /*12800*/       OPC_CheckChild1Integer, 10|128,19/*2442*/, 
    6792             : /*12803*/       OPC_RecordChild2, // #1 = $a
    6793             : /*12804*/       OPC_RecordChild3, // #2 = $b
    6794             : /*12805*/       OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6795             : /*12807*/       OPC_EmitMergeInputChains1_0,
    6796             : /*12808*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDWC), 0|OPFL_Chain,
    6797             :                     MVT::i32, 2/*#Ops*/, 1, 2, 
    6798             :                 // Src: (intrinsic_w_chain:i32 2442:iPTR, i32:i32:$a, i32:i32:$b) - Complexity = 8
    6799             :                 // Dst: (ADDWC:i32 i32:i32:$a, i32:i32:$b)
    6800             : /*12816*/     /*Scope*/ 10, /*->12827*/
    6801             : /*12817*/       OPC_CheckChild1Integer, 81|128,19/*2513*/, 
    6802             : /*12820*/       OPC_EmitMergeInputChains1_0,
    6803             : /*12821*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::BPOSGE32_PSEUDO), 0|OPFL_Chain,
    6804             :                     MVT::i32, 0/*#Ops*/, 
    6805             :                 // Src: (intrinsic_w_chain:i32 2513:iPTR) - Complexity = 8
    6806             :                 // Dst: (BPOSGE32_PSEUDO:i32)
    6807             : /*12827*/     /*Scope*/ 69, /*->12897*/
    6808             : /*12828*/       OPC_CheckChild1Integer, 11|128,23/*2955*/, 
    6809             : /*12831*/       OPC_RecordChild2, // #1 = $rt
    6810             : /*12832*/       OPC_RecordChild3, // #2 = $rs_sa
    6811             : /*12833*/       OPC_Scope, 37, /*->12872*/ // 3 children in Scope
    6812             : /*12835*/         OPC_MoveChild3,
    6813             : /*12836*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6814             : /*12839*/         OPC_CheckPredicate, 35, // Predicate_immZExt4
    6815             : /*12841*/         OPC_MoveParent,
    6816             : /*12842*/         OPC_Scope, 13, /*->12857*/ // 2 children in Scope
    6817             : /*12844*/           OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6818             : /*12846*/           OPC_EmitMergeInputChains1_0,
    6819             : /*12847*/           OPC_EmitConvertToTarget, 2,
    6820             : /*12849*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLL_S_PH), 0|OPFL_Chain,
    6821             :                         MVT::v2i16, 2/*#Ops*/, 1, 3, 
    6822             :                     // Src: (intrinsic_w_chain:v2i16 2955:iPTR, DSPROpnd:v2i16:$rt, (imm:i32)<<P:Predicate_immZExt4>>:$rs_sa) - Complexity = 12
    6823             :                     // Dst: (SHLL_S_PH:v2i16 DSPROpnd:v2i16:$rt, (imm:i32):$rs_sa)
    6824             : /*12857*/         /*Scope*/ 13, /*->12871*/
    6825             : /*12858*/           OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6826             : /*12860*/           OPC_EmitMergeInputChains1_0,
    6827             : /*12861*/           OPC_EmitConvertToTarget, 2,
    6828             : /*12863*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLL_S_PH_MM), 0|OPFL_Chain,
    6829             :                         MVT::v2i16, 2/*#Ops*/, 1, 3, 
    6830             :                     // Src: (intrinsic_w_chain:v2i16 2955:iPTR, DSPROpnd:v2i16:$rs, (imm:i32)<<P:Predicate_immZExt4>>:$sa) - Complexity = 12
    6831             :                     // Dst: (SHLL_S_PH_MM:v2i16 DSPROpnd:v2i16:$rs, (imm:i32):$sa)
    6832             : /*12871*/         0, /*End of Scope*/
    6833             : /*12872*/       /*Scope*/ 11, /*->12884*/
    6834             : /*12873*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6835             : /*12875*/         OPC_EmitMergeInputChains1_0,
    6836             : /*12876*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLLV_S_PH), 0|OPFL_Chain,
    6837             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6838             :                   // Src: (intrinsic_w_chain:v2i16 2955:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    6839             :                   // Dst: (SHLLV_S_PH:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa)
    6840             : /*12884*/       /*Scope*/ 11, /*->12896*/
    6841             : /*12885*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6842             : /*12887*/         OPC_EmitMergeInputChains1_0,
    6843             : /*12888*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLLV_S_PH_MM), 0|OPFL_Chain,
    6844             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6845             :                   // Src: (intrinsic_w_chain:v2i16 2955:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    6846             :                   // Dst: (SHLLV_S_PH_MM:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs)
    6847             : /*12896*/       0, /*End of Scope*/
    6848             : /*12897*/     /*Scope*/ 52, /*->12950*/
    6849             : /*12898*/       OPC_CheckChild1Integer, 9|128,23/*2953*/, 
    6850             : /*12901*/       OPC_RecordChild2, // #1 = $a
    6851             : /*12902*/       OPC_RecordChild3, // #2 = $shamt
    6852             : /*12903*/       OPC_Scope, 20, /*->12925*/ // 3 children in Scope
    6853             : /*12905*/         OPC_MoveChild3,
    6854             : /*12906*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6855             : /*12909*/         OPC_CheckPredicate, 35, // Predicate_immZExt4
    6856             : /*12911*/         OPC_MoveParent,
    6857             : /*12912*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6858             : /*12914*/         OPC_EmitMergeInputChains1_0,
    6859             : /*12915*/         OPC_EmitConvertToTarget, 2,
    6860             : /*12917*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLL_PH), 0|OPFL_Chain,
    6861             :                       MVT::v2i16, 2/*#Ops*/, 1, 3, 
    6862             :                   // Src: (intrinsic_w_chain:v2i16 2953:iPTR, v2i16:v2i16:$a, (imm:i32)<<P:Predicate_immZExt4>>:$shamt) - Complexity = 12
    6863             :                   // Dst: (SHLL_PH:v2i16 v2i16:v2i16:$a, (imm:i32)<<P:Predicate_immZExt4>>:$shamt)
    6864             : /*12925*/       /*Scope*/ 11, /*->12937*/
    6865             : /*12926*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6866             : /*12928*/         OPC_EmitMergeInputChains1_0,
    6867             : /*12929*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLLV_PH), 0|OPFL_Chain,
    6868             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6869             :                   // Src: (intrinsic_w_chain:v2i16 2953:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    6870             :                   // Dst: (SHLLV_PH:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa)
    6871             : /*12937*/       /*Scope*/ 11, /*->12949*/
    6872             : /*12938*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6873             : /*12940*/         OPC_EmitMergeInputChains1_0,
    6874             : /*12941*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLLV_PH_MM), 0|OPFL_Chain,
    6875             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6876             :                   // Src: (intrinsic_w_chain:v2i16 2953:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    6877             :                   // Dst: (SHLLV_PH_MM:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs)
    6878             : /*12949*/       0, /*End of Scope*/
    6879             : /*12950*/     /*Scope*/ 52, /*->13003*/
    6880             : /*12951*/       OPC_CheckChild1Integer, 10|128,23/*2954*/, 
    6881             : /*12954*/       OPC_RecordChild2, // #1 = $a
    6882             : /*12955*/       OPC_RecordChild3, // #2 = $shamt
    6883             : /*12956*/       OPC_Scope, 20, /*->12978*/ // 3 children in Scope
    6884             : /*12958*/         OPC_MoveChild3,
    6885             : /*12959*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    6886             : /*12962*/         OPC_CheckPredicate, 36, // Predicate_immZExt3
    6887             : /*12964*/         OPC_MoveParent,
    6888             : /*12965*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6889             : /*12967*/         OPC_EmitMergeInputChains1_0,
    6890             : /*12968*/         OPC_EmitConvertToTarget, 2,
    6891             : /*12970*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLL_QB), 0|OPFL_Chain,
    6892             :                       MVT::v4i8, 2/*#Ops*/, 1, 3, 
    6893             :                   // Src: (intrinsic_w_chain:v4i8 2954:iPTR, v4i8:v4i8:$a, (imm:i32)<<P:Predicate_immZExt3>>:$shamt) - Complexity = 12
    6894             :                   // Dst: (SHLL_QB:v4i8 v4i8:v4i8:$a, (imm:i32)<<P:Predicate_immZExt3>>:$shamt)
    6895             : /*12978*/       /*Scope*/ 11, /*->12990*/
    6896             : /*12979*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6897             : /*12981*/         OPC_EmitMergeInputChains1_0,
    6898             : /*12982*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLLV_QB), 0|OPFL_Chain,
    6899             :                       MVT::v4i8, 2/*#Ops*/, 1, 2, 
    6900             :                   // Src: (intrinsic_w_chain:v4i8 2954:iPTR, DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    6901             :                   // Dst: (SHLLV_QB:v4i8 DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs_sa)
    6902             : /*12990*/       /*Scope*/ 11, /*->13002*/
    6903             : /*12991*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6904             : /*12993*/         OPC_EmitMergeInputChains1_0,
    6905             : /*12994*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHLLV_QB_MM), 0|OPFL_Chain,
    6906             :                       MVT::v4i8, 2/*#Ops*/, 1, 2, 
    6907             :                   // Src: (intrinsic_w_chain:v4i8 2954:iPTR, DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    6908             :                   // Dst: (SHLLV_QB_MM:v4i8 DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs)
    6909             : /*13002*/       0, /*End of Scope*/
    6910             : /*13003*/     /*Scope*/ 28, /*->13032*/
    6911             : /*13004*/       OPC_CheckChild1Integer, 97|128,18/*2401*/, 
    6912             : /*13007*/       OPC_RecordChild2, // #1 = $rt
    6913             : /*13008*/       OPC_Scope, 10, /*->13020*/ // 2 children in Scope
    6914             : /*13010*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6915             : /*13012*/         OPC_EmitMergeInputChains1_0,
    6916             : /*13013*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ABSQ_S_PH), 0|OPFL_Chain,
    6917             :                       MVT::v2i16, 1/*#Ops*/, 1, 
    6918             :                   // Src: (intrinsic_w_chain:v2i16 2401:iPTR, DSPROpnd:v2i16:$rt) - Complexity = 8
    6919             :                   // Dst: (ABSQ_S_PH:v2i16 DSPROpnd:v2i16:$rt)
    6920             : /*13020*/       /*Scope*/ 10, /*->13031*/
    6921             : /*13021*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6922             : /*13023*/         OPC_EmitMergeInputChains1_0,
    6923             : /*13024*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ABSQ_S_PH_MM), 0|OPFL_Chain,
    6924             :                       MVT::v2i16, 1/*#Ops*/, 1, 
    6925             :                   // Src: (intrinsic_w_chain:v2i16 2401:iPTR, DSPROpnd:v2i16:$rs) - Complexity = 8
    6926             :                   // Dst: (ABSQ_S_PH_MM:v2i16 DSPROpnd:v2i16:$rs)
    6927             : /*13031*/       0, /*End of Scope*/
    6928             : /*13032*/     /*Scope*/ 31, /*->13064*/
    6929             : /*13033*/       OPC_CheckChild1Integer, 118|128,22/*2934*/, 
    6930             : /*13036*/       OPC_RecordChild2, // #1 = $rs
    6931             : /*13037*/       OPC_RecordChild3, // #2 = $rt
    6932             : /*13038*/       OPC_Scope, 11, /*->13051*/ // 2 children in Scope
    6933             : /*13040*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6934             : /*13042*/         OPC_EmitMergeInputChains1_0,
    6935             : /*13043*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECRQ_RS_PH_W), 0|OPFL_Chain,
    6936             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6937             :                   // Src: (intrinsic_w_chain:v2i16 2934:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6938             :                   // Dst: (PRECRQ_RS_PH_W:v2i16 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6939             : /*13051*/       /*Scope*/ 11, /*->13063*/
    6940             : /*13052*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6941             : /*13054*/         OPC_EmitMergeInputChains1_0,
    6942             : /*13055*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECRQ_RS_PH_W_MM), 0|OPFL_Chain,
    6943             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6944             :                   // Src: (intrinsic_w_chain:v2i16 2934:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    6945             :                   // Dst: (PRECRQ_RS_PH_W_MM:v2i16 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    6946             : /*13063*/       0, /*End of Scope*/
    6947             : /*13064*/     /*Scope*/ 31, /*->13096*/
    6948             : /*13065*/       OPC_CheckChild1Integer, 119|128,22/*2935*/, 
    6949             : /*13068*/       OPC_RecordChild2, // #1 = $rs
    6950             : /*13069*/       OPC_RecordChild3, // #2 = $rt
    6951             : /*13070*/       OPC_Scope, 11, /*->13083*/ // 2 children in Scope
    6952             : /*13072*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6953             : /*13074*/         OPC_EmitMergeInputChains1_0,
    6954             : /*13075*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECRQU_S_QB_PH), 0|OPFL_Chain,
    6955             :                       MVT::v4i8, 2/*#Ops*/, 1, 2, 
    6956             :                   // Src: (intrinsic_w_chain:v4i8 2935:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6957             :                   // Dst: (PRECRQU_S_QB_PH:v4i8 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    6958             : /*13083*/       /*Scope*/ 11, /*->13095*/
    6959             : /*13084*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6960             : /*13086*/         OPC_EmitMergeInputChains1_0,
    6961             : /*13087*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECRQU_S_QB_PH_MM), 0|OPFL_Chain,
    6962             :                       MVT::v4i8, 2/*#Ops*/, 1, 2, 
    6963             :                   // Src: (intrinsic_w_chain:v4i8 2935:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6964             :                   // Dst: (PRECRQU_S_QB_PH_MM:v4i8 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    6965             : /*13095*/       0, /*End of Scope*/
    6966             : /*13096*/     /*Scope*/ 31, /*->13128*/
    6967             : /*13097*/       OPC_CheckChild1Integer, 60|128,22/*2876*/, 
    6968             : /*13100*/       OPC_RecordChild2, // #1 = $rs
    6969             : /*13101*/       OPC_RecordChild3, // #2 = $rt
    6970             : /*13102*/       OPC_Scope, 11, /*->13115*/ // 2 children in Scope
    6971             : /*13104*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6972             : /*13106*/         OPC_EmitMergeInputChains1_0,
    6973             : /*13107*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULEU_S_PH_QBL), 0|OPFL_Chain,
    6974             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6975             :                   // Src: (intrinsic_w_chain:v2i16 2876:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6976             :                   // Dst: (MULEU_S_PH_QBL:v2i16 DSPROpnd:v4i8:$rs, DSPROpnd:v2i16:$rt)
    6977             : /*13115*/       /*Scope*/ 11, /*->13127*/
    6978             : /*13116*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6979             : /*13118*/         OPC_EmitMergeInputChains1_0,
    6980             : /*13119*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULEU_S_PH_QBL_MM), 0|OPFL_Chain,
    6981             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6982             :                   // Src: (intrinsic_w_chain:v2i16 2876:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6983             :                   // Dst: (MULEU_S_PH_QBL_MM:v2i16 DSPROpnd:v4i8:$rs, DSPROpnd:v2i16:$rt)
    6984             : /*13127*/       0, /*End of Scope*/
    6985             : /*13128*/     /*Scope*/ 31, /*->13160*/
    6986             : /*13129*/       OPC_CheckChild1Integer, 61|128,22/*2877*/, 
    6987             : /*13132*/       OPC_RecordChild2, // #1 = $rs
    6988             : /*13133*/       OPC_RecordChild3, // #2 = $rt
    6989             : /*13134*/       OPC_Scope, 11, /*->13147*/ // 2 children in Scope
    6990             : /*13136*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    6991             : /*13138*/         OPC_EmitMergeInputChains1_0,
    6992             : /*13139*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULEU_S_PH_QBR), 0|OPFL_Chain,
    6993             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    6994             :                   // Src: (intrinsic_w_chain:v2i16 2877:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    6995             :                   // Dst: (MULEU_S_PH_QBR:v2i16 DSPROpnd:v4i8:$rs, DSPROpnd:v2i16:$rt)
    6996             : /*13147*/       /*Scope*/ 11, /*->13159*/
    6997             : /*13148*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    6998             : /*13150*/         OPC_EmitMergeInputChains1_0,
    6999             : /*13151*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULEU_S_PH_QBR_MM), 0|OPFL_Chain,
    7000             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7001             :                   // Src: (intrinsic_w_chain:v2i16 2877:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7002             :                   // Dst: (MULEU_S_PH_QBR_MM:v2i16 DSPROpnd:v4i8:$rs, DSPROpnd:v2i16:$rt)
    7003             : /*13159*/       0, /*End of Scope*/
    7004             : /*13160*/     /*Scope*/ 31, /*->13192*/
    7005             : /*13161*/       OPC_CheckChild1Integer, 62|128,22/*2878*/, 
    7006             : /*13164*/       OPC_RecordChild2, // #1 = $rs
    7007             : /*13165*/       OPC_RecordChild3, // #2 = $rt
    7008             : /*13166*/       OPC_Scope, 11, /*->13179*/ // 2 children in Scope
    7009             : /*13168*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7010             : /*13170*/         OPC_EmitMergeInputChains1_0,
    7011             : /*13171*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULQ_RS_PH), 0|OPFL_Chain,
    7012             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7013             :                   // Src: (intrinsic_w_chain:v2i16 2878:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7014             :                   // Dst: (MULQ_RS_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7015             : /*13179*/       /*Scope*/ 11, /*->13191*/
    7016             : /*13180*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7017             : /*13182*/         OPC_EmitMergeInputChains1_0,
    7018             : /*13183*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULQ_RS_PH_MM), 0|OPFL_Chain,
    7019             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7020             :                   // Src: (intrinsic_w_chain:v2i16 2878:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7021             :                   // Dst: (MULQ_RS_PH_MM:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7022             : /*13191*/       0, /*End of Scope*/
    7023             : /*13192*/     /*Scope*/ 31, /*->13224*/
    7024             : /*13193*/       OPC_CheckChild1Integer, 102|128,22/*2918*/, 
    7025             : /*13196*/       OPC_RecordChild2, // #1 = $rs
    7026             : /*13197*/       OPC_RecordChild3, // #2 = $rt
    7027             : /*13198*/       OPC_Scope, 11, /*->13211*/ // 2 children in Scope
    7028             : /*13200*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7029             : /*13202*/         OPC_EmitMergeInputChains1_0,
    7030             : /*13203*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PICK_QB), 0|OPFL_Chain,
    7031             :                       MVT::v4i8, 2/*#Ops*/, 1, 2, 
    7032             :                   // Src: (intrinsic_w_chain:v4i8 2918:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    7033             :                   // Dst: (PICK_QB:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    7034             : /*13211*/       /*Scope*/ 11, /*->13223*/
    7035             : /*13212*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7036             : /*13214*/         OPC_EmitMergeInputChains1_0,
    7037             : /*13215*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PICK_QB_MM), 0|OPFL_Chain,
    7038             :                       MVT::v4i8, 2/*#Ops*/, 1, 2, 
    7039             :                   // Src: (intrinsic_w_chain:v4i8 2918:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    7040             :                   // Dst: (PICK_QB_MM:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    7041             : /*13223*/       0, /*End of Scope*/
    7042             : /*13224*/     /*Scope*/ 31, /*->13256*/
    7043             : /*13225*/       OPC_CheckChild1Integer, 101|128,22/*2917*/, 
    7044             : /*13228*/       OPC_RecordChild2, // #1 = $rs
    7045             : /*13229*/       OPC_RecordChild3, // #2 = $rt
    7046             : /*13230*/       OPC_Scope, 11, /*->13243*/ // 2 children in Scope
    7047             : /*13232*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7048             : /*13234*/         OPC_EmitMergeInputChains1_0,
    7049             : /*13235*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PICK_PH), 0|OPFL_Chain,
    7050             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7051             :                   // Src: (intrinsic_w_chain:v2i16 2917:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7052             :                   // Dst: (PICK_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7053             : /*13243*/       /*Scope*/ 11, /*->13255*/
    7054             : /*13244*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7055             : /*13246*/         OPC_EmitMergeInputChains1_0,
    7056             : /*13247*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PICK_PH_MM), 0|OPFL_Chain,
    7057             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7058             :                   // Src: (intrinsic_w_chain:v2i16 2917:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7059             :                   // Dst: (PICK_PH_MM:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7060             : /*13255*/       0, /*End of Scope*/
    7061             : /*13256*/     /*Scope*/ 31, /*->13288*/
    7062             : /*13257*/       OPC_CheckChild1Integer, 124|128,18/*2428*/, 
    7063             : /*13260*/       OPC_RecordChild2, // #1 = $rs
    7064             : /*13261*/       OPC_RecordChild3, // #2 = $rt
    7065             : /*13262*/       OPC_Scope, 11, /*->13275*/ // 2 children in Scope
    7066             : /*13264*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7067             : /*13266*/         OPC_EmitMergeInputChains1_0,
    7068             : /*13267*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDU_PH), 0|OPFL_Chain,
    7069             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7070             :                   // Src: (intrinsic_w_chain:v2i16 2428:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7071             :                   // Dst: (ADDU_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7072             : /*13275*/       /*Scope*/ 11, /*->13287*/
    7073             : /*13276*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7074             : /*13278*/         OPC_EmitMergeInputChains1_0,
    7075             : /*13279*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDU_PH_MMR2), 0|OPFL_Chain,
    7076             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7077             :                   // Src: (intrinsic_w_chain:v2i16 2428:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7078             :                   // Dst: (ADDU_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7079             : /*13287*/       0, /*End of Scope*/
    7080             : /*13288*/     /*Scope*/ 31, /*->13320*/
    7081             : /*13289*/       OPC_CheckChild1Integer, 126|128,18/*2430*/, 
    7082             : /*13292*/       OPC_RecordChild2, // #1 = $rs
    7083             : /*13293*/       OPC_RecordChild3, // #2 = $rt
    7084             : /*13294*/       OPC_Scope, 11, /*->13307*/ // 2 children in Scope
    7085             : /*13296*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7086             : /*13298*/         OPC_EmitMergeInputChains1_0,
    7087             : /*13299*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDU_S_PH), 0|OPFL_Chain,
    7088             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7089             :                   // Src: (intrinsic_w_chain:v2i16 2430:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7090             :                   // Dst: (ADDU_S_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7091             : /*13307*/       /*Scope*/ 11, /*->13319*/
    7092             : /*13308*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7093             : /*13310*/         OPC_EmitMergeInputChains1_0,
    7094             : /*13311*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDU_S_PH_MMR2), 0|OPFL_Chain,
    7095             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7096             :                   // Src: (intrinsic_w_chain:v2i16 2430:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7097             :                   // Dst: (ADDU_S_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7098             : /*13319*/       0, /*End of Scope*/
    7099             : /*13320*/     /*Scope*/ 31, /*->13352*/
    7100             : /*13321*/       OPC_CheckChild1Integer, 103|128,23/*3047*/, 
    7101             : /*13324*/       OPC_RecordChild2, // #1 = $rs
    7102             : /*13325*/       OPC_RecordChild3, // #2 = $rt
    7103             : /*13326*/       OPC_Scope, 11, /*->13339*/ // 2 children in Scope
    7104             : /*13328*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7105             : /*13330*/         OPC_EmitMergeInputChains1_0,
    7106             : /*13331*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBU_PH), 0|OPFL_Chain,
    7107             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7108             :                   // Src: (intrinsic_w_chain:v2i16 3047:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7109             :                   // Dst: (SUBU_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7110             : /*13339*/       /*Scope*/ 11, /*->13351*/
    7111             : /*13340*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7112             : /*13342*/         OPC_EmitMergeInputChains1_0,
    7113             : /*13343*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBU_PH_MMR2), 0|OPFL_Chain,
    7114             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7115             :                   // Src: (intrinsic_w_chain:v2i16 3047:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7116             :                   // Dst: (SUBU_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7117             : /*13351*/       0, /*End of Scope*/
    7118             : /*13352*/     /*Scope*/ 31, /*->13384*/
    7119             : /*13353*/       OPC_CheckChild1Integer, 105|128,23/*3049*/, 
    7120             : /*13356*/       OPC_RecordChild2, // #1 = $rs
    7121             : /*13357*/       OPC_RecordChild3, // #2 = $rt
    7122             : /*13358*/       OPC_Scope, 11, /*->13371*/ // 2 children in Scope
    7123             : /*13360*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7124             : /*13362*/         OPC_EmitMergeInputChains1_0,
    7125             : /*13363*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBU_S_PH), 0|OPFL_Chain,
    7126             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7127             :                   // Src: (intrinsic_w_chain:v2i16 3049:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7128             :                   // Dst: (SUBU_S_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7129             : /*13371*/       /*Scope*/ 11, /*->13383*/
    7130             : /*13372*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7131             : /*13374*/         OPC_EmitMergeInputChains1_0,
    7132             : /*13375*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBU_S_PH_MMR2), 0|OPFL_Chain,
    7133             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7134             :                   // Src: (intrinsic_w_chain:v2i16 3049:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7135             :                   // Dst: (SUBU_S_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7136             : /*13383*/       0, /*End of Scope*/
    7137             : /*13384*/     /*Scope*/ 28, /*->13413*/
    7138             : /*13385*/       OPC_CheckChild1Integer, 98|128,18/*2402*/, 
    7139             : /*13388*/       OPC_RecordChild2, // #1 = $rt
    7140             : /*13389*/       OPC_Scope, 10, /*->13401*/ // 2 children in Scope
    7141             : /*13391*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7142             : /*13393*/         OPC_EmitMergeInputChains1_0,
    7143             : /*13394*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ABSQ_S_QB), 0|OPFL_Chain,
    7144             :                       MVT::v4i8, 1/*#Ops*/, 1, 
    7145             :                   // Src: (intrinsic_w_chain:v4i8 2402:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    7146             :                   // Dst: (ABSQ_S_QB:v4i8 DSPROpnd:v4i8:$rt)
    7147             : /*13401*/       /*Scope*/ 10, /*->13412*/
    7148             : /*13402*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7149             : /*13404*/         OPC_EmitMergeInputChains1_0,
    7150             : /*13405*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ABSQ_S_QB_MMR2), 0|OPFL_Chain,
    7151             :                       MVT::v4i8, 1/*#Ops*/, 1, 
    7152             :                   // Src: (intrinsic_w_chain:v4i8 2402:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    7153             :                   // Dst: (ABSQ_S_QB_MMR2:v4i8 DSPROpnd:v4i8:$rs)
    7154             : /*13412*/       0, /*End of Scope*/
    7155             : /*13413*/     /*Scope*/ 31, /*->13445*/
    7156             : /*13414*/       OPC_CheckChild1Integer, 57|128,22/*2873*/, 
    7157             : /*13417*/       OPC_RecordChild2, // #1 = $rs
    7158             : /*13418*/       OPC_RecordChild3, // #2 = $rt
    7159             : /*13419*/       OPC_Scope, 11, /*->13432*/ // 2 children in Scope
    7160             : /*13421*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7161             : /*13423*/         OPC_EmitMergeInputChains1_0,
    7162             : /*13424*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MUL_S_PH), 0|OPFL_Chain,
    7163             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7164             :                   // Src: (intrinsic_w_chain:v2i16 2873:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7165             :                   // Dst: (MUL_S_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7166             : /*13432*/       /*Scope*/ 11, /*->13444*/
    7167             : /*13433*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7168             : /*13435*/         OPC_EmitMergeInputChains1_0,
    7169             : /*13436*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MUL_S_PH_MMR2), 0|OPFL_Chain,
    7170             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7171             :                   // Src: (intrinsic_w_chain:v2i16 2873:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7172             :                   // Dst: (MUL_S_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7173             : /*13444*/       0, /*End of Scope*/
    7174             : /*13445*/     /*Scope*/ 31, /*->13477*/
    7175             : /*13446*/       OPC_CheckChild1Integer, 64|128,22/*2880*/, 
    7176             : /*13449*/       OPC_RecordChild2, // #1 = $rs
    7177             : /*13450*/       OPC_RecordChild3, // #2 = $rt
    7178             : /*13451*/       OPC_Scope, 11, /*->13464*/ // 2 children in Scope
    7179             : /*13453*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7180             : /*13455*/         OPC_EmitMergeInputChains1_0,
    7181             : /*13456*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULQ_S_PH), 0|OPFL_Chain,
    7182             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7183             :                   // Src: (intrinsic_w_chain:v2i16 2880:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7184             :                   // Dst: (MULQ_S_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7185             : /*13464*/       /*Scope*/ 11, /*->13476*/
    7186             : /*13465*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7187             : /*13467*/         OPC_EmitMergeInputChains1_0,
    7188             : /*13468*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MULQ_S_PH_MMR2), 0|OPFL_Chain,
    7189             :                       MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7190             :                   // Src: (intrinsic_w_chain:v2i16 2880:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7191             :                   // Dst: (MULQ_S_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7192             : /*13476*/       0, /*End of Scope*/
    7193             : /*13477*/     /*Scope*/ 31, /*->13509*/
    7194             : /*13478*/       OPC_CheckChild1Integer, 113|128,22/*2929*/, 
    7195             : /*13481*/       OPC_RecordChild2, // #1 = $rs
    7196             : /*13482*/       OPC_RecordChild3, // #2 = $rt
    7197             : /*13483*/       OPC_Scope, 11, /*->13496*/ // 2 children in Scope
    7198             : /*13485*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7199             : /*13487*/         OPC_EmitMergeInputChains1_0,
    7200             : /*13488*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECR_QB_PH), 0|OPFL_Chain,
    7201             :                       MVT::v4i8, 2/*#Ops*/, 1, 2, 
    7202             :                   // Src: (intrinsic_w_chain:v4i8 2929:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7203             :                   // Dst: (PRECR_QB_PH:v4i8 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7204             : /*13496*/       /*Scope*/ 11, /*->13508*/
    7205             : /*13497*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7206             : /*13499*/         OPC_EmitMergeInputChains1_0,
    7207             : /*13500*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECR_QB_PH_MMR2), 0|OPFL_Chain,
    7208             :                       MVT::v4i8, 2/*#Ops*/, 1, 2, 
    7209             :                   // Src: (intrinsic_w_chain:v4i8 2929:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    7210             :                   // Dst: (PRECR_QB_PH_MMR2:v4i8 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    7211             : /*13508*/       0, /*End of Scope*/
    7212             : /*13509*/     /*Scope*/ 16, /*->13526*/
    7213             : /*13510*/       OPC_CheckChild1Integer, 54|128,22/*2870*/, 
    7214             : /*13513*/       OPC_RecordChild2, // #1 = $a
    7215             : /*13514*/       OPC_RecordChild3, // #2 = $b
    7216             : /*13515*/       OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7217             : /*13517*/       OPC_EmitMergeInputChains1_0,
    7218             : /*13518*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::MUL_PH), 0|OPFL_Chain,
    7219             :                     MVT::v2i16, 2/*#Ops*/, 1, 2, 
    7220             :                 // Src: (intrinsic_w_chain:v2i16 2870:iPTR, v2i16:v2i16:$a, v2i16:v2i16:$b) - Complexity = 8
    7221             :                 // Dst: (MUL_PH:v2i16 v2i16:v2i16:$a, v2i16:v2i16:$b)
    7222             : /*13526*/     0, /*End of Scope*/
    7223             : /*13527*/   /*SwitchOpcode*/ 82|128,40/*5202*/, TARGET_VAL(ISD::INTRINSIC_WO_CHAIN),// ->18733
    7224             : /*13531*/     OPC_Scope, 65, /*->13598*/ // 254 children in Scope
    7225             : /*13533*/       OPC_CheckChild0Integer, 17|128,23/*2961*/, 
    7226             : /*13536*/       OPC_RecordChild1, // #0 = $rt
    7227             : /*13537*/       OPC_RecordChild2, // #1 = $rs_sa
    7228             : /*13538*/       OPC_Scope, 35, /*->13575*/ // 3 children in Scope
    7229             : /*13540*/         OPC_MoveChild2,
    7230             : /*13541*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7231             : /*13544*/         OPC_CheckPredicate, 32, // Predicate_immZExt5
    7232             : /*13546*/         OPC_MoveParent,
    7233             : /*13547*/         OPC_Scope, 12, /*->13561*/ // 2 children in Scope
    7234             : /*13549*/           OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7235             : /*13551*/           OPC_EmitConvertToTarget, 1,
    7236             : /*13553*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRA_R_W), 0,
    7237             :                         MVT::i32, 2/*#Ops*/, 0, 2, 
    7238             :                     // Src: (intrinsic_wo_chain:i32 2961:iPTR, GPR32Opnd:i32:$rt, (imm:i32)<<P:Predicate_immZExt5>>:$rs_sa) - Complexity = 12
    7239             :                     // Dst: (SHRA_R_W:i32 GPR32Opnd:i32:$rt, (imm:i32):$rs_sa)
    7240             : /*13561*/         /*Scope*/ 12, /*->13574*/
    7241             : /*13562*/           OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7242             : /*13564*/           OPC_EmitConvertToTarget, 1,
    7243             : /*13566*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRA_R_W_MM), 0,
    7244             :                         MVT::i32, 2/*#Ops*/, 0, 2, 
    7245             :                     // Src: (intrinsic_wo_chain:i32 2961:iPTR, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7246             :                     // Dst: (SHRA_R_W_MM:i32 GPR32Opnd:i32:$rs, (imm:i32):$sa)
    7247             : /*13574*/         0, /*End of Scope*/
    7248             : /*13575*/       /*Scope*/ 10, /*->13586*/
    7249             : /*13576*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7250             : /*13578*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_R_W), 0,
    7251             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7252             :                   // Src: (intrinsic_wo_chain:i32 2961:iPTR, GPR32Opnd:i32:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    7253             :                   // Dst: (SHRAV_R_W:i32 GPR32Opnd:i32:$rt, GPR32Opnd:i32:$rs_sa)
    7254             : /*13586*/       /*Scope*/ 10, /*->13597*/
    7255             : /*13587*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7256             : /*13589*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_R_W_MM), 0,
    7257             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7258             :                   // Src: (intrinsic_wo_chain:i32 2961:iPTR, GPR32Opnd:i32:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    7259             :                   // Dst: (SHRAV_R_W_MM:i32 GPR32Opnd:i32:$rt, GPR32Opnd:i32:$rs)
    7260             : /*13597*/       0, /*End of Scope*/
    7261             : /*13598*/     /*Scope*/ 43, /*->13642*/
    7262             : /*13599*/       OPC_CheckChild0Integer, 13|128,19/*2445*/, 
    7263             : /*13602*/       OPC_RecordChild1, // #0 = $src
    7264             : /*13603*/       OPC_RecordChild2, // #1 = $rs
    7265             : /*13604*/       OPC_RecordChild3, // #2 = $sa
    7266             : /*13605*/       OPC_MoveChild3,
    7267             : /*13606*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7268             : /*13609*/       OPC_CheckPredicate, 32, // Predicate_immZExt5
    7269             : /*13611*/       OPC_MoveParent,
    7270             : /*13612*/       OPC_Scope, 13, /*->13627*/ // 2 children in Scope
    7271             : /*13614*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7272             : /*13616*/         OPC_EmitConvertToTarget, 2,
    7273             : /*13618*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::APPEND), 0,
    7274             :                       MVT::i32, 3/*#Ops*/, 1, 3, 0, 
    7275             :                   // Src: (intrinsic_wo_chain:i32 2445:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7276             :                   // Dst: (APPEND:i32 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7277             : /*13627*/       /*Scope*/ 13, /*->13641*/
    7278             : /*13628*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7279             : /*13630*/         OPC_EmitConvertToTarget, 2,
    7280             : /*13632*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::APPEND_MMR2), 0,
    7281             :                       MVT::i32, 3/*#Ops*/, 1, 3, 0, 
    7282             :                   // Src: (intrinsic_wo_chain:i32 2445:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7283             :                   // Dst: (APPEND_MMR2:i32 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7284             : /*13641*/       0, /*End of Scope*/
    7285             : /*13642*/     /*Scope*/ 43, /*->13686*/
    7286             : /*13643*/       OPC_CheckChild0Integer, 38|128,19/*2470*/, 
    7287             : /*13646*/       OPC_RecordChild1, // #0 = $src
    7288             : /*13647*/       OPC_RecordChild2, // #1 = $rs
    7289             : /*13648*/       OPC_RecordChild3, // #2 = $sa
    7290             : /*13649*/       OPC_MoveChild3,
    7291             : /*13650*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7292             : /*13653*/       OPC_CheckPredicate, 37, // Predicate_immZExt2
    7293             : /*13655*/       OPC_MoveParent,
    7294             : /*13656*/       OPC_Scope, 13, /*->13671*/ // 2 children in Scope
    7295             : /*13658*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7296             : /*13660*/         OPC_EmitConvertToTarget, 2,
    7297             : /*13662*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::BALIGN), 0,
    7298             :                       MVT::i32, 3/*#Ops*/, 1, 3, 0, 
    7299             :                   // Src: (intrinsic_wo_chain:i32 2470:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt2>>:$sa) - Complexity = 12
    7300             :                   // Dst: (BALIGN:i32 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7301             : /*13671*/       /*Scope*/ 13, /*->13685*/
    7302             : /*13672*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7303             : /*13674*/         OPC_EmitConvertToTarget, 2,
    7304             : /*13676*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::BALIGN_MMR2), 0,
    7305             :                       MVT::i32, 3/*#Ops*/, 1, 3, 0, 
    7306             :                   // Src: (intrinsic_wo_chain:i32 2470:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt2>>:$bp) - Complexity = 12
    7307             :                   // Dst: (BALIGN_MMR2:i32 GPR32Opnd:i32:$rs, (imm:i32):$bp, GPR32Opnd:i32:$src)
    7308             : /*13685*/       0, /*End of Scope*/
    7309             : /*13686*/     /*Scope*/ 43, /*->13730*/
    7310             : /*13687*/       OPC_CheckChild0Integer, 120|128,22/*2936*/, 
    7311             : /*13690*/       OPC_RecordChild1, // #0 = $src
    7312             : /*13691*/       OPC_RecordChild2, // #1 = $rs
    7313             : /*13692*/       OPC_RecordChild3, // #2 = $sa
    7314             : /*13693*/       OPC_MoveChild3,
    7315             : /*13694*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7316             : /*13697*/       OPC_CheckPredicate, 32, // Predicate_immZExt5
    7317             : /*13699*/       OPC_MoveParent,
    7318             : /*13700*/       OPC_Scope, 13, /*->13715*/ // 2 children in Scope
    7319             : /*13702*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7320             : /*13704*/         OPC_EmitConvertToTarget, 2,
    7321             : /*13706*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PREPEND), 0,
    7322             :                       MVT::i32, 3/*#Ops*/, 1, 3, 0, 
    7323             :                   // Src: (intrinsic_wo_chain:i32 2936:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7324             :                   // Dst: (PREPEND:i32 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7325             : /*13715*/       /*Scope*/ 13, /*->13729*/
    7326             : /*13716*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7327             : /*13718*/         OPC_EmitConvertToTarget, 2,
    7328             : /*13720*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PREPEND_MMR2), 0,
    7329             :                       MVT::i32, 3/*#Ops*/, 1, 3, 0, 
    7330             :                   // Src: (intrinsic_wo_chain:i32 2936:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7331             :                   // Dst: (PREPEND_MMR2:i32 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7332             : /*13729*/       0, /*End of Scope*/
    7333             : /*13730*/     /*Scope*/ 29, /*->13760*/
    7334             : /*13731*/       OPC_CheckChild0Integer, 41|128,22/*2857*/, 
    7335             : /*13734*/       OPC_RecordChild1, // #0 = $rs
    7336             : /*13735*/       OPC_RecordChild2, // #1 = $rt
    7337             : /*13736*/       OPC_Scope, 10, /*->13748*/ // 2 children in Scope
    7338             : /*13738*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7339             : /*13740*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MODSUB), 0,
    7340             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7341             :                   // Src: (intrinsic_wo_chain:i32 2857:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7342             :                   // Dst: (MODSUB:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7343             : /*13748*/       /*Scope*/ 10, /*->13759*/
    7344             : /*13749*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7345             : /*13751*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::MODSUB_MM), 0,
    7346             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7347             :                   // Src: (intrinsic_wo_chain:i32 2857:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7348             :                   // Dst: (MODSUB_MM:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7349             : /*13759*/       0, /*End of Scope*/
    7350             : /*13760*/     /*Scope*/ 26, /*->13787*/
    7351             : /*13761*/       OPC_CheckChild0Integer, 121|128,22/*2937*/, 
    7352             : /*13764*/       OPC_RecordChild1, // #0 = $rs
    7353             : /*13765*/       OPC_Scope, 9, /*->13776*/ // 2 children in Scope
    7354             : /*13767*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7355             : /*13769*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::RADDU_W_QB), 0,
    7356             :                       MVT::i32, 1/*#Ops*/, 0, 
    7357             :                   // Src: (intrinsic_wo_chain:i32 2937:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    7358             :                   // Dst: (RADDU_W_QB:i32 DSPROpnd:v4i8:$rs)
    7359             : /*13776*/       /*Scope*/ 9, /*->13786*/
    7360             : /*13777*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7361             : /*13779*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::RADDU_W_QB_MM), 0,
    7362             :                       MVT::i32, 1/*#Ops*/, 0, 
    7363             :                   // Src: (intrinsic_wo_chain:i32 2937:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    7364             :                   // Dst: (RADDU_W_QB_MM:i32 DSPROpnd:v4i8:$rs)
    7365             : /*13786*/       0, /*End of Scope*/
    7366             : /*13787*/     /*Scope*/ 26, /*->13814*/
    7367             : /*13788*/       OPC_CheckChild0Integer, 103|128,22/*2919*/, 
    7368             : /*13791*/       OPC_RecordChild1, // #0 = $rt
    7369             : /*13792*/       OPC_Scope, 9, /*->13803*/ // 2 children in Scope
    7370             : /*13794*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7371             : /*13796*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQ_W_PHL), 0,
    7372             :                       MVT::i32, 1/*#Ops*/, 0, 
    7373             :                   // Src: (intrinsic_wo_chain:i32 2919:iPTR, DSPROpnd:v2i16:$rt) - Complexity = 8
    7374             :                   // Dst: (PRECEQ_W_PHL:i32 DSPROpnd:v2i16:$rt)
    7375             : /*13803*/       /*Scope*/ 9, /*->13813*/
    7376             : /*13804*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7377             : /*13806*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQ_W_PHL_MM), 0,
    7378             :                       MVT::i32, 1/*#Ops*/, 0, 
    7379             :                   // Src: (intrinsic_wo_chain:i32 2919:iPTR, DSPROpnd:v2i16:$rs) - Complexity = 8
    7380             :                   // Dst: (PRECEQ_W_PHL_MM:i32 DSPROpnd:v2i16:$rs)
    7381             : /*13813*/       0, /*End of Scope*/
    7382             : /*13814*/     /*Scope*/ 26, /*->13841*/
    7383             : /*13815*/       OPC_CheckChild0Integer, 104|128,22/*2920*/, 
    7384             : /*13818*/       OPC_RecordChild1, // #0 = $rt
    7385             : /*13819*/       OPC_Scope, 9, /*->13830*/ // 2 children in Scope
    7386             : /*13821*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7387             : /*13823*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQ_W_PHR), 0,
    7388             :                       MVT::i32, 1/*#Ops*/, 0, 
    7389             :                   // Src: (intrinsic_wo_chain:i32 2920:iPTR, DSPROpnd:v2i16:$rt) - Complexity = 8
    7390             :                   // Dst: (PRECEQ_W_PHR:i32 DSPROpnd:v2i16:$rt)
    7391             : /*13830*/       /*Scope*/ 9, /*->13840*/
    7392             : /*13831*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7393             : /*13833*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQ_W_PHR_MM), 0,
    7394             :                       MVT::i32, 1/*#Ops*/, 0, 
    7395             :                   // Src: (intrinsic_wo_chain:i32 2920:iPTR, DSPROpnd:v2i16:$rs) - Complexity = 8
    7396             :                   // Dst: (PRECEQ_W_PHR_MM:i32 DSPROpnd:v2i16:$rs)
    7397             : /*13840*/       0, /*End of Scope*/
    7398             : /*13841*/     /*Scope*/ 26, /*->13868*/
    7399             : /*13842*/       OPC_CheckChild0Integer, 63|128,19/*2495*/, 
    7400             : /*13845*/       OPC_RecordChild1, // #0 = $rt
    7401             : /*13846*/       OPC_Scope, 9, /*->13857*/ // 2 children in Scope
    7402             : /*13848*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7403             : /*13850*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::BITREV), 0,
    7404             :                       MVT::i32, 1/*#Ops*/, 0, 
    7405             :                   // Src: (intrinsic_wo_chain:i32 2495:iPTR, GPR32Opnd:i32:$rt) - Complexity = 8
    7406             :                   // Dst: (BITREV:i32 GPR32Opnd:i32:$rt)
    7407             : /*13857*/       /*Scope*/ 9, /*->13867*/
    7408             : /*13858*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7409             : /*13860*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::BITREV_MM), 0,
    7410             :                       MVT::i32, 1/*#Ops*/, 0, 
    7411             :                   // Src: (intrinsic_wo_chain:i32 2495:iPTR, GPR32Opnd:i32:$rs) - Complexity = 8
    7412             :                   // Dst: (BITREV_MM:i32 GPR32Opnd:i32:$rs)
    7413             : /*13867*/       0, /*End of Scope*/
    7414             : /*13868*/     /*Scope*/ 29, /*->13898*/
    7415             : /*13869*/       OPC_CheckChild0Integer, 110|128,18/*2414*/, 
    7416             : /*13872*/       OPC_RecordChild1, // #0 = $rs
    7417             : /*13873*/       OPC_RecordChild2, // #1 = $rt
    7418             : /*13874*/       OPC_Scope, 10, /*->13886*/ // 2 children in Scope
    7419             : /*13876*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7420             : /*13878*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQH_W), 0,
    7421             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7422             :                   // Src: (intrinsic_wo_chain:i32 2414:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7423             :                   // Dst: (ADDQH_W:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7424             : /*13886*/       /*Scope*/ 10, /*->13897*/
    7425             : /*13887*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7426             : /*13889*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQH_W_MMR2), 0,
    7427             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7428             :                   // Src: (intrinsic_wo_chain:i32 2414:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7429             :                   // Dst: (ADDQH_W_MMR2:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7430             : /*13897*/       0, /*End of Scope*/
    7431             : /*13898*/     /*Scope*/ 29, /*->13928*/
    7432             : /*13899*/       OPC_CheckChild0Integer, 109|128,18/*2413*/, 
    7433             : /*13902*/       OPC_RecordChild1, // #0 = $rs
    7434             : /*13903*/       OPC_RecordChild2, // #1 = $rt
    7435             : /*13904*/       OPC_Scope, 10, /*->13916*/ // 2 children in Scope
    7436             : /*13906*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7437             : /*13908*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQH_R_W), 0,
    7438             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7439             :                   // Src: (intrinsic_wo_chain:i32 2413:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7440             :                   // Dst: (ADDQH_R_W:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7441             : /*13916*/       /*Scope*/ 10, /*->13927*/
    7442             : /*13917*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7443             : /*13919*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQH_R_W_MMR2), 0,
    7444             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7445             :                   // Src: (intrinsic_wo_chain:i32 2413:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7446             :                   // Dst: (ADDQH_R_W_MMR2:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7447             : /*13927*/       0, /*End of Scope*/
    7448             : /*13928*/     /*Scope*/ 29, /*->13958*/
    7449             : /*13929*/       OPC_CheckChild0Integer, 86|128,23/*3030*/, 
    7450             : /*13932*/       OPC_RecordChild1, // #0 = $rs
    7451             : /*13933*/       OPC_RecordChild2, // #1 = $rt
    7452             : /*13934*/       OPC_Scope, 10, /*->13946*/ // 2 children in Scope
    7453             : /*13936*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7454             : /*13938*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQH_W), 0,
    7455             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7456             :                   // Src: (intrinsic_wo_chain:i32 3030:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7457             :                   // Dst: (SUBQH_W:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7458             : /*13946*/       /*Scope*/ 10, /*->13957*/
    7459             : /*13947*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7460             : /*13949*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQH_W_MMR2), 0,
    7461             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7462             :                   // Src: (intrinsic_wo_chain:i32 3030:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7463             :                   // Dst: (SUBQH_W_MMR2:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7464             : /*13957*/       0, /*End of Scope*/
    7465             : /*13958*/     /*Scope*/ 29, /*->13988*/
    7466             : /*13959*/       OPC_CheckChild0Integer, 85|128,23/*3029*/, 
    7467             : /*13962*/       OPC_RecordChild1, // #0 = $rs
    7468             : /*13963*/       OPC_RecordChild2, // #1 = $rt
    7469             : /*13964*/       OPC_Scope, 10, /*->13976*/ // 2 children in Scope
    7470             : /*13966*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7471             : /*13968*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQH_R_W), 0,
    7472             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7473             :                   // Src: (intrinsic_wo_chain:i32 3029:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7474             :                   // Dst: (SUBQH_R_W:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7475             : /*13976*/       /*Scope*/ 10, /*->13987*/
    7476             : /*13977*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7477             : /*13979*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQH_R_W_MMR2), 0,
    7478             :                       MVT::i32, 2/*#Ops*/, 0, 1, 
    7479             :                   // Src: (intrinsic_wo_chain:i32 3029:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    7480             :                   // Dst: (SUBQH_R_W_MMR2:i32 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    7481             : /*13987*/       0, /*End of Scope*/
    7482             : /*13988*/     /*Scope*/ 65, /*->14054*/
    7483             : /*13989*/       OPC_CheckChild0Integer, 15|128,23/*2959*/, 
    7484             : /*13992*/       OPC_RecordChild1, // #0 = $rt
    7485             : /*13993*/       OPC_RecordChild2, // #1 = $rs_sa
    7486             : /*13994*/       OPC_Scope, 35, /*->14031*/ // 3 children in Scope
    7487             : /*13996*/         OPC_MoveChild2,
    7488             : /*13997*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7489             : /*14000*/         OPC_CheckPredicate, 35, // Predicate_immZExt4
    7490             : /*14002*/         OPC_MoveParent,
    7491             : /*14003*/         OPC_Scope, 12, /*->14017*/ // 2 children in Scope
    7492             : /*14005*/           OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7493             : /*14007*/           OPC_EmitConvertToTarget, 1,
    7494             : /*14009*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRA_R_PH), 0,
    7495             :                         MVT::v2i16, 2/*#Ops*/, 0, 2, 
    7496             :                     // Src: (intrinsic_wo_chain:v2i16 2959:iPTR, DSPROpnd:v2i16:$rt, (imm:i32)<<P:Predicate_immZExt4>>:$rs_sa) - Complexity = 12
    7497             :                     // Dst: (SHRA_R_PH:v2i16 DSPROpnd:v2i16:$rt, (imm:i32):$rs_sa)
    7498             : /*14017*/         /*Scope*/ 12, /*->14030*/
    7499             : /*14018*/           OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7500             : /*14020*/           OPC_EmitConvertToTarget, 1,
    7501             : /*14022*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRA_R_PH_MM), 0,
    7502             :                         MVT::v2i16, 2/*#Ops*/, 0, 2, 
    7503             :                     // Src: (intrinsic_wo_chain:v2i16 2959:iPTR, DSPROpnd:v2i16:$rs, (imm:i32)<<P:Predicate_immZExt4>>:$sa) - Complexity = 12
    7504             :                     // Dst: (SHRA_R_PH_MM:v2i16 DSPROpnd:v2i16:$rs, (imm:i32):$sa)
    7505             : /*14030*/         0, /*End of Scope*/
    7506             : /*14031*/       /*Scope*/ 10, /*->14042*/
    7507             : /*14032*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7508             : /*14034*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_R_PH), 0,
    7509             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    7510             :                   // Src: (intrinsic_wo_chain:v2i16 2959:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    7511             :                   // Dst: (SHRAV_R_PH:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa)
    7512             : /*14042*/       /*Scope*/ 10, /*->14053*/
    7513             : /*14043*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7514             : /*14045*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_R_PH_MM), 0,
    7515             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    7516             :                   // Src: (intrinsic_wo_chain:v2i16 2959:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    7517             :                   // Dst: (SHRAV_R_PH_MM:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs)
    7518             : /*14053*/       0, /*End of Scope*/
    7519             : /*14054*/     /*Scope*/ 60, /*->14115*/
    7520             : /*14055*/       OPC_CheckChild0Integer, 124|128,22/*2940*/, 
    7521             : /*14058*/       OPC_RecordChild1, // #0 = $imm
    7522             : /*14059*/       OPC_Scope, 33, /*->14094*/ // 3 children in Scope
    7523             : /*14061*/         OPC_MoveChild1,
    7524             : /*14062*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7525             : /*14065*/         OPC_CheckPredicate, 38, // Predicate_immZExt8
    7526             : /*14067*/         OPC_MoveParent,
    7527             : /*14068*/         OPC_Scope, 11, /*->14081*/ // 2 children in Scope
    7528             : /*14070*/           OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7529             : /*14072*/           OPC_EmitConvertToTarget, 0,
    7530             : /*14074*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::REPL_QB), 0,
    7531             :                         MVT::v4i8, 1/*#Ops*/, 1, 
    7532             :                     // Src: (intrinsic_wo_chain:v4i8 2940:iPTR, (imm:i32)<<P:Predicate_immZExt8>>:$imm) - Complexity = 12
    7533             :                     // Dst: (REPL_QB:v4i8 (imm:i32):$imm)
    7534             : /*14081*/         /*Scope*/ 11, /*->14093*/
    7535             : /*14082*/           OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7536             : /*14084*/           OPC_EmitConvertToTarget, 0,
    7537             : /*14086*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::REPL_QB_MM), 0,
    7538             :                         MVT::v4i8, 1/*#Ops*/, 1, 
    7539             :                     // Src: (intrinsic_wo_chain:v4i8 2940:iPTR, (imm:i32)<<P:Predicate_immZExt8>>:$imm) - Complexity = 12
    7540             :                     // Dst: (REPL_QB_MM:v4i8 (imm:i32):$imm)
    7541             : /*14093*/         0, /*End of Scope*/
    7542             : /*14094*/       /*Scope*/ 9, /*->14104*/
    7543             : /*14095*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7544             : /*14097*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::REPLV_QB), 0,
    7545             :                       MVT::v4i8, 1/*#Ops*/, 0, 
    7546             :                   // Src: (intrinsic_wo_chain:v4i8 2940:iPTR, GPR32Opnd:i32:$rt) - Complexity = 8
    7547             :                   // Dst: (REPLV_QB:v4i8 GPR32Opnd:i32:$rt)
    7548             : /*14104*/       /*Scope*/ 9, /*->14114*/
    7549             : /*14105*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7550             : /*14107*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::REPLV_QB_MM), 0,
    7551             :                       MVT::v4i8, 1/*#Ops*/, 0, 
    7552             :                   // Src: (intrinsic_wo_chain:v4i8 2940:iPTR, GPR32Opnd:i32:$rs) - Complexity = 8
    7553             :                   // Dst: (REPLV_QB_MM:v4i8 GPR32Opnd:i32:$rs)
    7554             : /*14114*/       0, /*End of Scope*/
    7555             : /*14115*/     /*Scope*/ 60, /*->14176*/
    7556             : /*14116*/       OPC_CheckChild0Integer, 123|128,22/*2939*/, 
    7557             : /*14119*/       OPC_RecordChild1, // #0 = $imm
    7558             : /*14120*/       OPC_Scope, 33, /*->14155*/ // 3 children in Scope
    7559             : /*14122*/         OPC_MoveChild1,
    7560             : /*14123*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7561             : /*14126*/         OPC_CheckPredicate, 39, // Predicate_immSExt10
    7562             : /*14128*/         OPC_MoveParent,
    7563             : /*14129*/         OPC_Scope, 11, /*->14142*/ // 2 children in Scope
    7564             : /*14131*/           OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7565             : /*14133*/           OPC_EmitConvertToTarget, 0,
    7566             : /*14135*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::REPL_PH), 0,
    7567             :                         MVT::v2i16, 1/*#Ops*/, 1, 
    7568             :                     // Src: (intrinsic_wo_chain:v2i16 2939:iPTR, (imm:i32)<<P:Predicate_immSExt10>>:$imm) - Complexity = 12
    7569             :                     // Dst: (REPL_PH:v2i16 (imm:i32):$imm)
    7570             : /*14142*/         /*Scope*/ 11, /*->14154*/
    7571             : /*14143*/           OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7572             : /*14145*/           OPC_EmitConvertToTarget, 0,
    7573             : /*14147*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::REPL_PH_MM), 0,
    7574             :                         MVT::v2i16, 1/*#Ops*/, 1, 
    7575             :                     // Src: (intrinsic_wo_chain:v2i16 2939:iPTR, (imm:i32)<<P:Predicate_immSExt10>>:$imm) - Complexity = 12
    7576             :                     // Dst: (REPL_PH_MM:v2i16 (imm:i32):$imm)
    7577             : /*14154*/         0, /*End of Scope*/
    7578             : /*14155*/       /*Scope*/ 9, /*->14165*/
    7579             : /*14156*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7580             : /*14158*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::REPLV_PH), 0,
    7581             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    7582             :                   // Src: (intrinsic_wo_chain:v2i16 2939:iPTR, GPR32Opnd:i32:$rt) - Complexity = 8
    7583             :                   // Dst: (REPLV_PH:v2i16 GPR32Opnd:i32:$rt)
    7584             : /*14165*/       /*Scope*/ 9, /*->14175*/
    7585             : /*14166*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7586             : /*14168*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::REPLV_PH_MM), 0,
    7587             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    7588             :                   // Src: (intrinsic_wo_chain:v2i16 2939:iPTR, GPR32Opnd:i32:$rs) - Complexity = 8
    7589             :                   // Dst: (REPLV_PH_MM:v2i16 GPR32Opnd:i32:$rs)
    7590             : /*14175*/       0, /*End of Scope*/
    7591             : /*14176*/     /*Scope*/ 43, /*->14220*/
    7592             : /*14177*/       OPC_CheckChild0Integer, 114|128,22/*2930*/, 
    7593             : /*14180*/       OPC_RecordChild1, // #0 = $src
    7594             : /*14181*/       OPC_RecordChild2, // #1 = $rs
    7595             : /*14182*/       OPC_RecordChild3, // #2 = $sa
    7596             : /*14183*/       OPC_MoveChild3,
    7597             : /*14184*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7598             : /*14187*/       OPC_CheckPredicate, 32, // Predicate_immZExt5
    7599             : /*14189*/       OPC_MoveParent,
    7600             : /*14190*/       OPC_Scope, 13, /*->14205*/ // 2 children in Scope
    7601             : /*14192*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7602             : /*14194*/         OPC_EmitConvertToTarget, 2,
    7603             : /*14196*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECR_SRA_PH_W), 0,
    7604             :                       MVT::v2i16, 3/*#Ops*/, 1, 3, 0, 
    7605             :                   // Src: (intrinsic_wo_chain:v2i16 2930:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7606             :                   // Dst: (PRECR_SRA_PH_W:v2i16 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7607             : /*14205*/       /*Scope*/ 13, /*->14219*/
    7608             : /*14206*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7609             : /*14208*/         OPC_EmitConvertToTarget, 2,
    7610             : /*14210*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECR_SRA_PH_W_MMR2), 0,
    7611             :                       MVT::v2i16, 3/*#Ops*/, 1, 3, 0, 
    7612             :                   // Src: (intrinsic_wo_chain:v2i16 2930:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7613             :                   // Dst: (PRECR_SRA_PH_W_MMR2:v2i16 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7614             : /*14219*/       0, /*End of Scope*/
    7615             : /*14220*/     /*Scope*/ 43, /*->14264*/
    7616             : /*14221*/       OPC_CheckChild0Integer, 115|128,22/*2931*/, 
    7617             : /*14224*/       OPC_RecordChild1, // #0 = $src
    7618             : /*14225*/       OPC_RecordChild2, // #1 = $rs
    7619             : /*14226*/       OPC_RecordChild3, // #2 = $sa
    7620             : /*14227*/       OPC_MoveChild3,
    7621             : /*14228*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7622             : /*14231*/       OPC_CheckPredicate, 32, // Predicate_immZExt5
    7623             : /*14233*/       OPC_MoveParent,
    7624             : /*14234*/       OPC_Scope, 13, /*->14249*/ // 2 children in Scope
    7625             : /*14236*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7626             : /*14238*/         OPC_EmitConvertToTarget, 2,
    7627             : /*14240*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECR_SRA_R_PH_W), 0,
    7628             :                       MVT::v2i16, 3/*#Ops*/, 1, 3, 0, 
    7629             :                   // Src: (intrinsic_wo_chain:v2i16 2931:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7630             :                   // Dst: (PRECR_SRA_R_PH_W:v2i16 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7631             : /*14249*/       /*Scope*/ 13, /*->14263*/
    7632             : /*14250*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7633             : /*14252*/         OPC_EmitConvertToTarget, 2,
    7634             : /*14254*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECR_SRA_R_PH_W_MMR2), 0,
    7635             :                       MVT::v2i16, 3/*#Ops*/, 1, 3, 0, 
    7636             :                   // Src: (intrinsic_wo_chain:v2i16 2931:iPTR, GPR32Opnd:i32:$src, GPR32Opnd:i32:$rs, (imm:i32)<<P:Predicate_immZExt5>>:$sa) - Complexity = 12
    7637             :                   // Dst: (PRECR_SRA_R_PH_W_MMR2:v2i16 GPR32Opnd:i32:$rs, (imm:i32):$sa, GPR32Opnd:i32:$src)
    7638             : /*14263*/       0, /*End of Scope*/
    7639             : /*14264*/     /*Scope*/ 65, /*->14330*/
    7640             : /*14265*/       OPC_CheckChild0Integer, 16|128,23/*2960*/, 
    7641             : /*14268*/       OPC_RecordChild1, // #0 = $rt
    7642             : /*14269*/       OPC_RecordChild2, // #1 = $rs_sa
    7643             : /*14270*/       OPC_Scope, 35, /*->14307*/ // 3 children in Scope
    7644             : /*14272*/         OPC_MoveChild2,
    7645             : /*14273*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7646             : /*14276*/         OPC_CheckPredicate, 36, // Predicate_immZExt3
    7647             : /*14278*/         OPC_MoveParent,
    7648             : /*14279*/         OPC_Scope, 12, /*->14293*/ // 2 children in Scope
    7649             : /*14281*/           OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7650             : /*14283*/           OPC_EmitConvertToTarget, 1,
    7651             : /*14285*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRA_R_QB), 0,
    7652             :                         MVT::v4i8, 2/*#Ops*/, 0, 2, 
    7653             :                     // Src: (intrinsic_wo_chain:v4i8 2960:iPTR, DSPROpnd:v4i8:$rt, (imm:i32)<<P:Predicate_immZExt3>>:$rs_sa) - Complexity = 12
    7654             :                     // Dst: (SHRA_R_QB:v4i8 DSPROpnd:v4i8:$rt, (imm:i32):$rs_sa)
    7655             : /*14293*/         /*Scope*/ 12, /*->14306*/
    7656             : /*14294*/           OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7657             : /*14296*/           OPC_EmitConvertToTarget, 1,
    7658             : /*14298*/           OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRA_R_QB_MMR2), 0,
    7659             :                         MVT::v4i8, 2/*#Ops*/, 0, 2, 
    7660             :                     // Src: (intrinsic_wo_chain:v4i8 2960:iPTR, DSPROpnd:v4i8:$rs, (imm:i32)<<P:Predicate_immZExt3>>:$sa) - Complexity = 12
    7661             :                     // Dst: (SHRA_R_QB_MMR2:v4i8 DSPROpnd:v4i8:$rs, (imm:i32):$sa)
    7662             : /*14306*/         0, /*End of Scope*/
    7663             : /*14307*/       /*Scope*/ 10, /*->14318*/
    7664             : /*14308*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7665             : /*14310*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_R_QB), 0,
    7666             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    7667             :                   // Src: (intrinsic_wo_chain:v4i8 2960:iPTR, DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    7668             :                   // Dst: (SHRAV_R_QB:v4i8 DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs_sa)
    7669             : /*14318*/       /*Scope*/ 10, /*->14329*/
    7670             : /*14319*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7671             : /*14321*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_R_QB_MMR2), 0,
    7672             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    7673             :                   // Src: (intrinsic_wo_chain:v4i8 2960:iPTR, DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    7674             :                   // Dst: (SHRAV_R_QB_MMR2:v4i8 DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs)
    7675             : /*14329*/       0, /*End of Scope*/
    7676             : /*14330*/     /*Scope*/ 49, /*->14380*/
    7677             : /*14331*/       OPC_CheckChild0Integer, 13|128,23/*2957*/, 
    7678             : /*14334*/       OPC_RecordChild1, // #0 = $a
    7679             : /*14335*/       OPC_RecordChild2, // #1 = $shamt
    7680             : /*14336*/       OPC_Scope, 19, /*->14357*/ // 3 children in Scope
    7681             : /*14338*/         OPC_MoveChild2,
    7682             : /*14339*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7683             : /*14342*/         OPC_CheckPredicate, 35, // Predicate_immZExt4
    7684             : /*14344*/         OPC_MoveParent,
    7685             : /*14345*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7686             : /*14347*/         OPC_EmitConvertToTarget, 1,
    7687             : /*14349*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRA_PH), 0,
    7688             :                       MVT::v2i16, 2/*#Ops*/, 0, 2, 
    7689             :                   // Src: (intrinsic_wo_chain:v2i16 2957:iPTR, v2i16:v2i16:$a, (imm:i32)<<P:Predicate_immZExt4>>:$shamt) - Complexity = 12
    7690             :                   // Dst: (SHRA_PH:v2i16 v2i16:v2i16:$a, (imm:i32)<<P:Predicate_immZExt4>>:$shamt)
    7691             : /*14357*/       /*Scope*/ 10, /*->14368*/
    7692             : /*14358*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7693             : /*14360*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_PH), 0,
    7694             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    7695             :                   // Src: (intrinsic_wo_chain:v2i16 2957:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    7696             :                   // Dst: (SHRAV_PH:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa)
    7697             : /*14368*/       /*Scope*/ 10, /*->14379*/
    7698             : /*14369*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7699             : /*14371*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_PH_MM), 0,
    7700             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    7701             :                   // Src: (intrinsic_wo_chain:v2i16 2957:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    7702             :                   // Dst: (SHRAV_PH_MM:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs)
    7703             : /*14379*/       0, /*End of Scope*/
    7704             : /*14380*/     /*Scope*/ 49, /*->14430*/
    7705             : /*14381*/       OPC_CheckChild0Integer, 18|128,23/*2962*/, 
    7706             : /*14384*/       OPC_RecordChild1, // #0 = $a
    7707             : /*14385*/       OPC_RecordChild2, // #1 = $shamt
    7708             : /*14386*/       OPC_Scope, 19, /*->14407*/ // 3 children in Scope
    7709             : /*14388*/         OPC_MoveChild2,
    7710             : /*14389*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7711             : /*14392*/         OPC_CheckPredicate, 35, // Predicate_immZExt4
    7712             : /*14394*/         OPC_MoveParent,
    7713             : /*14395*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7714             : /*14397*/         OPC_EmitConvertToTarget, 1,
    7715             : /*14399*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRL_PH), 0,
    7716             :                       MVT::v2i16, 2/*#Ops*/, 0, 2, 
    7717             :                   // Src: (intrinsic_wo_chain:v2i16 2962:iPTR, v2i16:v2i16:$a, (imm:i32)<<P:Predicate_immZExt4>>:$shamt) - Complexity = 12
    7718             :                   // Dst: (SHRL_PH:v2i16 v2i16:v2i16:$a, (imm:i32)<<P:Predicate_immZExt4>>:$shamt)
    7719             : /*14407*/       /*Scope*/ 10, /*->14418*/
    7720             : /*14408*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7721             : /*14410*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRLV_PH), 0,
    7722             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    7723             :                   // Src: (intrinsic_wo_chain:v2i16 2962:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    7724             :                   // Dst: (SHRLV_PH:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs_sa)
    7725             : /*14418*/       /*Scope*/ 10, /*->14429*/
    7726             : /*14419*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7727             : /*14421*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRLV_PH_MMR2), 0,
    7728             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    7729             :                   // Src: (intrinsic_wo_chain:v2i16 2962:iPTR, DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    7730             :                   // Dst: (SHRLV_PH_MMR2:v2i16 DSPROpnd:v2i16:$rt, GPR32Opnd:i32:$rs)
    7731             : /*14429*/       0, /*End of Scope*/
    7732             : /*14430*/     /*Scope*/ 49, /*->14480*/
    7733             : /*14431*/       OPC_CheckChild0Integer, 14|128,23/*2958*/, 
    7734             : /*14434*/       OPC_RecordChild1, // #0 = $a
    7735             : /*14435*/       OPC_RecordChild2, // #1 = $shamt
    7736             : /*14436*/       OPC_Scope, 19, /*->14457*/ // 3 children in Scope
    7737             : /*14438*/         OPC_MoveChild2,
    7738             : /*14439*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7739             : /*14442*/         OPC_CheckPredicate, 36, // Predicate_immZExt3
    7740             : /*14444*/         OPC_MoveParent,
    7741             : /*14445*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7742             : /*14447*/         OPC_EmitConvertToTarget, 1,
    7743             : /*14449*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRA_QB), 0,
    7744             :                       MVT::v4i8, 2/*#Ops*/, 0, 2, 
    7745             :                   // Src: (intrinsic_wo_chain:v4i8 2958:iPTR, v4i8:v4i8:$a, (imm:i32)<<P:Predicate_immZExt3>>:$shamt) - Complexity = 12
    7746             :                   // Dst: (SHRA_QB:v4i8 v4i8:v4i8:$a, (imm:i32)<<P:Predicate_immZExt3>>:$shamt)
    7747             : /*14457*/       /*Scope*/ 10, /*->14468*/
    7748             : /*14458*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    7749             : /*14460*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_QB), 0,
    7750             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    7751             :                   // Src: (intrinsic_wo_chain:v4i8 2958:iPTR, DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    7752             :                   // Dst: (SHRAV_QB:v4i8 DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs_sa)
    7753             : /*14468*/       /*Scope*/ 10, /*->14479*/
    7754             : /*14469*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    7755             : /*14471*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRAV_QB_MMR2), 0,
    7756             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    7757             :                   // Src: (intrinsic_wo_chain:v4i8 2958:iPTR, DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    7758             :                   // Dst: (SHRAV_QB_MMR2:v4i8 DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs)
    7759             : /*14479*/       0, /*End of Scope*/
    7760             : /*14480*/     /*Scope*/ 49, /*->14530*/
    7761             : /*14481*/       OPC_CheckChild0Integer, 19|128,23/*2963*/, 
    7762             : /*14484*/       OPC_RecordChild1, // #0 = $a
    7763             : /*14485*/       OPC_RecordChild2, // #1 = $shamt
    7764             : /*14486*/       OPC_Scope, 19, /*->14507*/ // 3 children in Scope
    7765             : /*14488*/         OPC_MoveChild2,
    7766             : /*14489*/         OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7767             : /*14492*/         OPC_CheckPredicate, 36, // Predicate_immZExt3
    7768             : /*14494*/         OPC_MoveParent,
    7769             : /*14495*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7770             : /*14497*/         OPC_EmitConvertToTarget, 1,
    7771             : /*14499*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRL_QB), 0,
    7772             :                       MVT::v4i8, 2/*#Ops*/, 0, 2, 
    7773             :                   // Src: (intrinsic_wo_chain:v4i8 2963:iPTR, v4i8:v4i8:$a, (imm:i32)<<P:Predicate_immZExt3>>:$shamt) - Complexity = 12
    7774             :                   // Dst: (SHRL_QB:v4i8 v4i8:v4i8:$a, (imm:i32)<<P:Predicate_immZExt3>>:$shamt)
    7775             : /*14507*/       /*Scope*/ 10, /*->14518*/
    7776             : /*14508*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    7777             : /*14510*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRLV_QB), 0,
    7778             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    7779             :                   // Src: (intrinsic_wo_chain:v4i8 2963:iPTR, DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs_sa) - Complexity = 8
    7780             :                   // Dst: (SHRLV_QB:v4i8 DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs_sa)
    7781             : /*14518*/       /*Scope*/ 10, /*->14529*/
    7782             : /*14519*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    7783             : /*14521*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SHRLV_QB_MM), 0,
    7784             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    7785             :                   // Src: (intrinsic_wo_chain:v4i8 2963:iPTR, DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs) - Complexity = 8
    7786             :                   // Dst: (SHRLV_QB_MM:v4i8 DSPROpnd:v4i8:$rt, GPR32Opnd:i32:$rs)
    7787             : /*14529*/       0, /*End of Scope*/
    7788             : /*14530*/     /*Scope*/ 24, /*->14555*/
    7789             : /*14531*/       OPC_CheckChild0Integer, 125|128,22/*2941*/, 
    7790             : /*14534*/       OPC_RecordChild1, // #0 = $ws
    7791             : /*14535*/       OPC_RecordChild2, // #1 = $m
    7792             : /*14536*/       OPC_MoveChild2,
    7793             : /*14537*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7794             : /*14540*/       OPC_CheckPredicate, 36, // Predicate_immZExt3
    7795             : /*14542*/       OPC_MoveParent,
    7796             : /*14543*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7797             : /*14545*/       OPC_EmitConvertToTarget, 1,
    7798             : /*14547*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SAT_S_B), 0,
    7799             :                     MVT::v16i8, 2/*#Ops*/, 0, 2, 
    7800             :                 // Src: (intrinsic_wo_chain:v16i8 2941:iPTR, MSA128BOpnd:v16i8:$ws, (imm:i32)<<P:Predicate_immZExt3>>:$m) - Complexity = 12
    7801             :                 // Dst: (SAT_S_B:v16i8 MSA128BOpnd:v16i8:$ws, (imm:i32):$m)
    7802             : /*14555*/     /*Scope*/ 24, /*->14580*/
    7803             : /*14556*/       OPC_CheckChild0Integer, 127|128,22/*2943*/, 
    7804             : /*14559*/       OPC_RecordChild1, // #0 = $ws
    7805             : /*14560*/       OPC_RecordChild2, // #1 = $m
    7806             : /*14561*/       OPC_MoveChild2,
    7807             : /*14562*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7808             : /*14565*/       OPC_CheckPredicate, 35, // Predicate_immZExt4
    7809             : /*14567*/       OPC_MoveParent,
    7810             : /*14568*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7811             : /*14570*/       OPC_EmitConvertToTarget, 1,
    7812             : /*14572*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SAT_S_H), 0,
    7813             :                     MVT::v8i16, 2/*#Ops*/, 0, 2, 
    7814             :                 // Src: (intrinsic_wo_chain:v8i16 2943:iPTR, MSA128HOpnd:v8i16:$ws, (imm:i32)<<P:Predicate_immZExt4>>:$m) - Complexity = 12
    7815             :                 // Dst: (SAT_S_H:v8i16 MSA128HOpnd:v8i16:$ws, (imm:i32):$m)
    7816             : /*14580*/     /*Scope*/ 24, /*->14605*/
    7817             : /*14581*/       OPC_CheckChild0Integer, 0|128,23/*2944*/, 
    7818             : /*14584*/       OPC_RecordChild1, // #0 = $ws
    7819             : /*14585*/       OPC_RecordChild2, // #1 = $m
    7820             : /*14586*/       OPC_MoveChild2,
    7821             : /*14587*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7822             : /*14590*/       OPC_CheckPredicate, 32, // Predicate_immZExt5
    7823             : /*14592*/       OPC_MoveParent,
    7824             : /*14593*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7825             : /*14595*/       OPC_EmitConvertToTarget, 1,
    7826             : /*14597*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SAT_S_W), 0,
    7827             :                     MVT::v4i32, 2/*#Ops*/, 0, 2, 
    7828             :                 // Src: (intrinsic_wo_chain:v4i32 2944:iPTR, MSA128WOpnd:v4i32:$ws, (imm:i32)<<P:Predicate_immZExt5>>:$m) - Complexity = 12
    7829             :                 // Dst: (SAT_S_W:v4i32 MSA128WOpnd:v4i32:$ws, (imm:i32):$m)
    7830             : /*14605*/     /*Scope*/ 24, /*->14630*/
    7831             : /*14606*/       OPC_CheckChild0Integer, 126|128,22/*2942*/, 
    7832             : /*14609*/       OPC_RecordChild1, // #0 = $ws
    7833             : /*14610*/       OPC_RecordChild2, // #1 = $m
    7834             : /*14611*/       OPC_MoveChild2,
    7835             : /*14612*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7836             : /*14615*/       OPC_CheckPredicate, 40, // Predicate_immZExt6
    7837             : /*14617*/       OPC_MoveParent,
    7838             : /*14618*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7839             : /*14620*/       OPC_EmitConvertToTarget, 1,
    7840             : /*14622*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SAT_S_D), 0,
    7841             :                     MVT::v2i64, 2/*#Ops*/, 0, 2, 
    7842             :                 // Src: (intrinsic_wo_chain:v2i64 2942:iPTR, MSA128DOpnd:v2i64:$ws, (imm:i32)<<P:Predicate_immZExt6>>:$m) - Complexity = 12
    7843             :                 // Dst: (SAT_S_D:v2i64 MSA128DOpnd:v2i64:$ws, (imm:i32):$m)
    7844             : /*14630*/     /*Scope*/ 24, /*->14655*/
    7845             : /*14631*/       OPC_CheckChild0Integer, 1|128,23/*2945*/, 
    7846             : /*14634*/       OPC_RecordChild1, // #0 = $ws
    7847             : /*14635*/       OPC_RecordChild2, // #1 = $m
    7848             : /*14636*/       OPC_MoveChild2,
    7849             : /*14637*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7850             : /*14640*/       OPC_CheckPredicate, 36, // Predicate_immZExt3
    7851             : /*14642*/       OPC_MoveParent,
    7852             : /*14643*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7853             : /*14645*/       OPC_EmitConvertToTarget, 1,
    7854             : /*14647*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SAT_U_B), 0,
    7855             :                     MVT::v16i8, 2/*#Ops*/, 0, 2, 
    7856             :                 // Src: (intrinsic_wo_chain:v16i8 2945:iPTR, MSA128BOpnd:v16i8:$ws, (imm:i32)<<P:Predicate_immZExt3>>:$m) - Complexity = 12
    7857             :                 // Dst: (SAT_U_B:v16i8 MSA128BOpnd:v16i8:$ws, (imm:i32):$m)
    7858             : /*14655*/     /*Scope*/ 24, /*->14680*/
    7859             : /*14656*/       OPC_CheckChild0Integer, 3|128,23/*2947*/, 
    7860             : /*14659*/       OPC_RecordChild1, // #0 = $ws
    7861             : /*14660*/       OPC_RecordChild2, // #1 = $m
    7862             : /*14661*/       OPC_MoveChild2,
    7863             : /*14662*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7864             : /*14665*/       OPC_CheckPredicate, 35, // Predicate_immZExt4
    7865             : /*14667*/       OPC_MoveParent,
    7866             : /*14668*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7867             : /*14670*/       OPC_EmitConvertToTarget, 1,
    7868             : /*14672*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SAT_U_H), 0,
    7869             :                     MVT::v8i16, 2/*#Ops*/, 0, 2, 
    7870             :                 // Src: (intrinsic_wo_chain:v8i16 2947:iPTR, MSA128HOpnd:v8i16:$ws, (imm:i32)<<P:Predicate_immZExt4>>:$m) - Complexity = 12
    7871             :                 // Dst: (SAT_U_H:v8i16 MSA128HOpnd:v8i16:$ws, (imm:i32):$m)
    7872             : /*14680*/     /*Scope*/ 24, /*->14705*/
    7873             : /*14681*/       OPC_CheckChild0Integer, 4|128,23/*2948*/, 
    7874             : /*14684*/       OPC_RecordChild1, // #0 = $ws
    7875             : /*14685*/       OPC_RecordChild2, // #1 = $m
    7876             : /*14686*/       OPC_MoveChild2,
    7877             : /*14687*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7878             : /*14690*/       OPC_CheckPredicate, 32, // Predicate_immZExt5
    7879             : /*14692*/       OPC_MoveParent,
    7880             : /*14693*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7881             : /*14695*/       OPC_EmitConvertToTarget, 1,
    7882             : /*14697*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SAT_U_W), 0,
    7883             :                     MVT::v4i32, 2/*#Ops*/, 0, 2, 
    7884             :                 // Src: (intrinsic_wo_chain:v4i32 2948:iPTR, MSA128WOpnd:v4i32:$ws, (imm:i32)<<P:Predicate_immZExt5>>:$m) - Complexity = 12
    7885             :                 // Dst: (SAT_U_W:v4i32 MSA128WOpnd:v4i32:$ws, (imm:i32):$m)
    7886             : /*14705*/     /*Scope*/ 24, /*->14730*/
    7887             : /*14706*/       OPC_CheckChild0Integer, 2|128,23/*2946*/, 
    7888             : /*14709*/       OPC_RecordChild1, // #0 = $ws
    7889             : /*14710*/       OPC_RecordChild2, // #1 = $m
    7890             : /*14711*/       OPC_MoveChild2,
    7891             : /*14712*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7892             : /*14715*/       OPC_CheckPredicate, 40, // Predicate_immZExt6
    7893             : /*14717*/       OPC_MoveParent,
    7894             : /*14718*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7895             : /*14720*/       OPC_EmitConvertToTarget, 1,
    7896             : /*14722*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SAT_U_D), 0,
    7897             :                     MVT::v2i64, 2/*#Ops*/, 0, 2, 
    7898             :                 // Src: (intrinsic_wo_chain:v2i64 2946:iPTR, MSA128DOpnd:v2i64:$ws, (imm:i32)<<P:Predicate_immZExt6>>:$m) - Complexity = 12
    7899             :                 // Dst: (SAT_U_D:v2i64 MSA128DOpnd:v2i64:$ws, (imm:i32):$m)
    7900             : /*14730*/     /*Scope*/ 26, /*->14757*/
    7901             : /*14731*/       OPC_CheckChild0Integer, 24|128,23/*2968*/, 
    7902             : /*14734*/       OPC_RecordChild1, // #0 = $wd_in
    7903             : /*14735*/       OPC_RecordChild2, // #1 = $ws
    7904             : /*14736*/       OPC_RecordChild3, // #2 = $n
    7905             : /*14737*/       OPC_MoveChild3,
    7906             : /*14738*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7907             : /*14741*/       OPC_CheckPredicate, 35, // Predicate_immZExt4
    7908             : /*14743*/       OPC_MoveParent,
    7909             : /*14744*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7910             : /*14746*/       OPC_EmitConvertToTarget, 2,
    7911             : /*14748*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SLDI_B), 0,
    7912             :                     MVT::v16i8, 3/*#Ops*/, 0, 1, 3, 
    7913             :                 // Src: (intrinsic_wo_chain:v16i8 2968:iPTR, MSA128BOpnd:v16i8:$wd_in, MSA128BOpnd:v16i8:$ws, (imm:i32)<<P:Predicate_immZExt4>>:$n) - Complexity = 12
    7914             :                 // Dst: (SLDI_B:v16i8 MSA128BOpnd:v16i8:$wd_in, MSA128BOpnd:v16i8:$ws, (imm:i32):$n)
    7915             : /*14757*/     /*Scope*/ 26, /*->14784*/
    7916             : /*14758*/       OPC_CheckChild0Integer, 26|128,23/*2970*/, 
    7917             : /*14761*/       OPC_RecordChild1, // #0 = $wd_in
    7918             : /*14762*/       OPC_RecordChild2, // #1 = $ws
    7919             : /*14763*/       OPC_RecordChild3, // #2 = $n
    7920             : /*14764*/       OPC_MoveChild3,
    7921             : /*14765*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7922             : /*14768*/       OPC_CheckPredicate, 36, // Predicate_immZExt3
    7923             : /*14770*/       OPC_MoveParent,
    7924             : /*14771*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7925             : /*14773*/       OPC_EmitConvertToTarget, 2,
    7926             : /*14775*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SLDI_H), 0,
    7927             :                     MVT::v8i16, 3/*#Ops*/, 0, 1, 3, 
    7928             :                 // Src: (intrinsic_wo_chain:v8i16 2970:iPTR, MSA128HOpnd:v8i16:$wd_in, MSA128HOpnd:v8i16:$ws, (imm:i32)<<P:Predicate_immZExt3>>:$n) - Complexity = 12
    7929             :                 // Dst: (SLDI_H:v8i16 MSA128HOpnd:v8i16:$wd_in, MSA128HOpnd:v8i16:$ws, (imm:i32):$n)
    7930             : /*14784*/     /*Scope*/ 26, /*->14811*/
    7931             : /*14785*/       OPC_CheckChild0Integer, 27|128,23/*2971*/, 
    7932             : /*14788*/       OPC_RecordChild1, // #0 = $wd_in
    7933             : /*14789*/       OPC_RecordChild2, // #1 = $ws
    7934             : /*14790*/       OPC_RecordChild3, // #2 = $n
    7935             : /*14791*/       OPC_MoveChild3,
    7936             : /*14792*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7937             : /*14795*/       OPC_CheckPredicate, 37, // Predicate_immZExt2
    7938             : /*14797*/       OPC_MoveParent,
    7939             : /*14798*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7940             : /*14800*/       OPC_EmitConvertToTarget, 2,
    7941             : /*14802*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SLDI_W), 0,
    7942             :                     MVT::v4i32, 3/*#Ops*/, 0, 1, 3, 
    7943             :                 // Src: (intrinsic_wo_chain:v4i32 2971:iPTR, MSA128WOpnd:v4i32:$wd_in, MSA128WOpnd:v4i32:$ws, (imm:i32)<<P:Predicate_immZExt2>>:$n) - Complexity = 12
    7944             :                 // Dst: (SLDI_W:v4i32 MSA128WOpnd:v4i32:$wd_in, MSA128WOpnd:v4i32:$ws, (imm:i32):$n)
    7945             : /*14811*/     /*Scope*/ 26, /*->14838*/
    7946             : /*14812*/       OPC_CheckChild0Integer, 25|128,23/*2969*/, 
    7947             : /*14815*/       OPC_RecordChild1, // #0 = $wd_in
    7948             : /*14816*/       OPC_RecordChild2, // #1 = $ws
    7949             : /*14817*/       OPC_RecordChild3, // #2 = $n
    7950             : /*14818*/       OPC_MoveChild3,
    7951             : /*14819*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7952             : /*14822*/       OPC_CheckPredicate, 41, // Predicate_immZExt1
    7953             : /*14824*/       OPC_MoveParent,
    7954             : /*14825*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7955             : /*14827*/       OPC_EmitConvertToTarget, 2,
    7956             : /*14829*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SLDI_D), 0,
    7957             :                     MVT::v2i64, 3/*#Ops*/, 0, 1, 3, 
    7958             :                 // Src: (intrinsic_wo_chain:v2i64 2969:iPTR, MSA128DOpnd:v2i64:$wd_in, MSA128DOpnd:v2i64:$ws, (imm:i32)<<P:Predicate_immZExt1>>:$n) - Complexity = 12
    7959             :                 // Dst: (SLDI_D:v2i64 MSA128DOpnd:v2i64:$wd_in, MSA128DOpnd:v2i64:$ws, (imm:i32):$n)
    7960             : /*14838*/     /*Scope*/ 24, /*->14863*/
    7961             : /*14839*/       OPC_CheckChild0Integer, 56|128,23/*3000*/, 
    7962             : /*14842*/       OPC_RecordChild1, // #0 = $ws
    7963             : /*14843*/       OPC_RecordChild2, // #1 = $m
    7964             : /*14844*/       OPC_MoveChild2,
    7965             : /*14845*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7966             : /*14848*/       OPC_CheckPredicate, 36, // Predicate_immZExt3
    7967             : /*14850*/       OPC_MoveParent,
    7968             : /*14851*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7969             : /*14853*/       OPC_EmitConvertToTarget, 1,
    7970             : /*14855*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SRARI_B), 0,
    7971             :                     MVT::v16i8, 2/*#Ops*/, 0, 2, 
    7972             :                 // Src: (intrinsic_wo_chain:v16i8 3000:iPTR, MSA128BOpnd:v16i8:$ws, (imm:i32)<<P:Predicate_immZExt3>>:$m) - Complexity = 12
    7973             :                 // Dst: (SRARI_B:v16i8 MSA128BOpnd:v16i8:$ws, (imm:i32):$m)
    7974             : /*14863*/     /*Scope*/ 24, /*->14888*/
    7975             : /*14864*/       OPC_CheckChild0Integer, 58|128,23/*3002*/, 
    7976             : /*14867*/       OPC_RecordChild1, // #0 = $ws
    7977             : /*14868*/       OPC_RecordChild2, // #1 = $m
    7978             : /*14869*/       OPC_MoveChild2,
    7979             : /*14870*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7980             : /*14873*/       OPC_CheckPredicate, 35, // Predicate_immZExt4
    7981             : /*14875*/       OPC_MoveParent,
    7982             : /*14876*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7983             : /*14878*/       OPC_EmitConvertToTarget, 1,
    7984             : /*14880*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SRARI_H), 0,
    7985             :                     MVT::v8i16, 2/*#Ops*/, 0, 2, 
    7986             :                 // Src: (intrinsic_wo_chain:v8i16 3002:iPTR, MSA128HOpnd:v8i16:$ws, (imm:i32)<<P:Predicate_immZExt4>>:$m) - Complexity = 12
    7987             :                 // Dst: (SRARI_H:v8i16 MSA128HOpnd:v8i16:$ws, (imm:i32):$m)
    7988             : /*14888*/     /*Scope*/ 24, /*->14913*/
    7989             : /*14889*/       OPC_CheckChild0Integer, 59|128,23/*3003*/, 
    7990             : /*14892*/       OPC_RecordChild1, // #0 = $ws
    7991             : /*14893*/       OPC_RecordChild2, // #1 = $m
    7992             : /*14894*/       OPC_MoveChild2,
    7993             : /*14895*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    7994             : /*14898*/       OPC_CheckPredicate, 32, // Predicate_immZExt5
    7995             : /*14900*/       OPC_MoveParent,
    7996             : /*14901*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    7997             : /*14903*/       OPC_EmitConvertToTarget, 1,
    7998             : /*14905*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SRARI_W), 0,
    7999             :                     MVT::v4i32, 2/*#Ops*/, 0, 2, 
    8000             :                 // Src: (intrinsic_wo_chain:v4i32 3003:iPTR, MSA128WOpnd:v4i32:$ws, (imm:i32)<<P:Predicate_immZExt5>>:$m) - Complexity = 12
    8001             :                 // Dst: (SRARI_W:v4i32 MSA128WOpnd:v4i32:$ws, (imm:i32):$m)
    8002             : /*14913*/     /*Scope*/ 24, /*->14938*/
    8003             : /*14914*/       OPC_CheckChild0Integer, 57|128,23/*3001*/, 
    8004             : /*14917*/       OPC_RecordChild1, // #0 = $ws
    8005             : /*14918*/       OPC_RecordChild2, // #1 = $m
    8006             : /*14919*/       OPC_MoveChild2,
    8007             : /*14920*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8008             : /*14923*/       OPC_CheckPredicate, 40, // Predicate_immZExt6
    8009             : /*14925*/       OPC_MoveParent,
    8010             : /*14926*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    8011             : /*14928*/       OPC_EmitConvertToTarget, 1,
    8012             : /*14930*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SRARI_D), 0,
    8013             :                     MVT::v2i64, 2/*#Ops*/, 0, 2, 
    8014             :                 // Src: (intrinsic_wo_chain:v2i64 3001:iPTR, MSA128DOpnd:v2i64:$ws, (imm:i32)<<P:Predicate_immZExt6>>:$m) - Complexity = 12
    8015             :                 // Dst: (SRARI_D:v2i64 MSA128DOpnd:v2i64:$ws, (imm:i32):$m)
    8016             : /*14938*/     /*Scope*/ 24, /*->14963*/
    8017             : /*14939*/       OPC_CheckChild0Integer, 72|128,23/*3016*/, 
    8018             : /*14942*/       OPC_RecordChild1, // #0 = $ws
    8019             : /*14943*/       OPC_RecordChild2, // #1 = $m
    8020             : /*14944*/       OPC_MoveChild2,
    8021             : /*14945*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8022             : /*14948*/       OPC_CheckPredicate, 36, // Predicate_immZExt3
    8023             : /*14950*/       OPC_MoveParent,
    8024             : /*14951*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    8025             : /*14953*/       OPC_EmitConvertToTarget, 1,
    8026             : /*14955*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SRLRI_B), 0,
    8027             :                     MVT::v16i8, 2/*#Ops*/, 0, 2, 
    8028             :                 // Src: (intrinsic_wo_chain:v16i8 3016:iPTR, MSA128BOpnd:v16i8:$ws, (imm:i32)<<P:Predicate_immZExt3>>:$m) - Complexity = 12
    8029             :                 // Dst: (SRLRI_B:v16i8 MSA128BOpnd:v16i8:$ws, (imm:i32):$m)
    8030             : /*14963*/     /*Scope*/ 24, /*->14988*/
    8031             : /*14964*/       OPC_CheckChild0Integer, 74|128,23/*3018*/, 
    8032             : /*14967*/       OPC_RecordChild1, // #0 = $ws
    8033             : /*14968*/       OPC_RecordChild2, // #1 = $m
    8034             : /*14969*/       OPC_MoveChild2,
    8035             : /*14970*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8036             : /*14973*/       OPC_CheckPredicate, 35, // Predicate_immZExt4
    8037             : /*14975*/       OPC_MoveParent,
    8038             : /*14976*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    8039             : /*14978*/       OPC_EmitConvertToTarget, 1,
    8040             : /*14980*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SRLRI_H), 0,
    8041             :                     MVT::v8i16, 2/*#Ops*/, 0, 2, 
    8042             :                 // Src: (intrinsic_wo_chain:v8i16 3018:iPTR, MSA128HOpnd:v8i16:$ws, (imm:i32)<<P:Predicate_immZExt4>>:$m) - Complexity = 12
    8043             :                 // Dst: (SRLRI_H:v8i16 MSA128HOpnd:v8i16:$ws, (imm:i32):$m)
    8044             : /*14988*/     /*Scope*/ 24, /*->15013*/
    8045             : /*14989*/       OPC_CheckChild0Integer, 75|128,23/*3019*/, 
    8046             : /*14992*/       OPC_RecordChild1, // #0 = $ws
    8047             : /*14993*/       OPC_RecordChild2, // #1 = $m
    8048             : /*14994*/       OPC_MoveChild2,
    8049             : /*14995*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8050             : /*14998*/       OPC_CheckPredicate, 32, // Predicate_immZExt5
    8051             : /*15000*/       OPC_MoveParent,
    8052             : /*15001*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    8053             : /*15003*/       OPC_EmitConvertToTarget, 1,
    8054             : /*15005*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SRLRI_W), 0,
    8055             :                     MVT::v4i32, 2/*#Ops*/, 0, 2, 
    8056             :                 // Src: (intrinsic_wo_chain:v4i32 3019:iPTR, MSA128WOpnd:v4i32:$ws, (imm:i32)<<P:Predicate_immZExt5>>:$m) - Complexity = 12
    8057             :                 // Dst: (SRLRI_W:v4i32 MSA128WOpnd:v4i32:$ws, (imm:i32):$m)
    8058             : /*15013*/     /*Scope*/ 24, /*->15038*/
    8059             : /*15014*/       OPC_CheckChild0Integer, 73|128,23/*3017*/, 
    8060             : /*15017*/       OPC_RecordChild1, // #0 = $ws
    8061             : /*15018*/       OPC_RecordChild2, // #1 = $m
    8062             : /*15019*/       OPC_MoveChild2,
    8063             : /*15020*/       OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
    8064             : /*15023*/       OPC_CheckPredicate, 40, // Predicate_immZExt6
    8065             : /*15025*/       OPC_MoveParent,
    8066             : /*15026*/       OPC_CheckPatternPredicate, 24, // (Subtarget->hasMSA()) && (Subtarget->hasStandardEncoding())
    8067             : /*15028*/       OPC_EmitConvertToTarget, 1,
    8068             : /*15030*/       OPC_MorphNodeTo1, TARGET_VAL(Mips::SRLRI_D), 0,
    8069             :                     MVT::v2i64, 2/*#Ops*/, 0, 2, 
    8070             :                 // Src: (intrinsic_wo_chain:v2i64 3017:iPTR, MSA128DOpnd:v2i64:$ws, (imm:i32)<<P:Predicate_immZExt6>>:$m) - Complexity = 12
    8071             :                 // Dst: (SRLRI_D:v2i64 MSA128DOpnd:v2i64:$ws, (imm:i32):$m)
    8072             : /*15038*/     /*Scope*/ 29, /*->15068*/
    8073             : /*15039*/       OPC_CheckChild0Integer, 127|128,18/*2431*/, 
    8074             : /*15042*/       OPC_RecordChild1, // #0 = $rs
    8075             : /*15043*/       OPC_RecordChild2, // #1 = $rt
    8076             : /*15044*/       OPC_Scope, 10, /*->15056*/ // 2 children in Scope
    8077             : /*15046*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8078             : /*15048*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDU_S_QB), 0,
    8079             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8080             :                   // Src: (intrinsic_wo_chain:v4i8 2431:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8081             :                   // Dst: (ADDU_S_QB:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8082             : /*15056*/       /*Scope*/ 10, /*->15067*/
    8083             : /*15057*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8084             : /*15059*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDU_S_QB_MM), 0,
    8085             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8086             :                   // Src: (intrinsic_wo_chain:v4i8 2431:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8087             :                   // Dst: (ADDU_S_QB_MM:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8088             : /*15067*/       0, /*End of Scope*/
    8089             : /*15068*/     /*Scope*/ 29, /*->15098*/
    8090             : /*15069*/       OPC_CheckChild0Integer, 106|128,23/*3050*/, 
    8091             : /*15072*/       OPC_RecordChild1, // #0 = $rs
    8092             : /*15073*/       OPC_RecordChild2, // #1 = $rt
    8093             : /*15074*/       OPC_Scope, 10, /*->15086*/ // 2 children in Scope
    8094             : /*15076*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8095             : /*15078*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBU_S_QB), 0,
    8096             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8097             :                   // Src: (intrinsic_wo_chain:v4i8 3050:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8098             :                   // Dst: (SUBU_S_QB:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8099             : /*15086*/       /*Scope*/ 10, /*->15097*/
    8100             : /*15087*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8101             : /*15089*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBU_S_QB_MM), 0,
    8102             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8103             :                   // Src: (intrinsic_wo_chain:v4i8 3050:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8104             :                   // Dst: (SUBU_S_QB_MM:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8105             : /*15097*/       0, /*End of Scope*/
    8106             : /*15098*/     /*Scope*/ 29, /*->15128*/
    8107             : /*15099*/       OPC_CheckChild0Integer, 105|128,18/*2409*/, 
    8108             : /*15102*/       OPC_RecordChild1, // #0 = $rs
    8109             : /*15103*/       OPC_RecordChild2, // #1 = $rt
    8110             : /*15104*/       OPC_Scope, 10, /*->15116*/ // 2 children in Scope
    8111             : /*15106*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8112             : /*15108*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQ_S_PH), 0,
    8113             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8114             :                   // Src: (intrinsic_wo_chain:v2i16 2409:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8115             :                   // Dst: (ADDQ_S_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8116             : /*15116*/       /*Scope*/ 10, /*->15127*/
    8117             : /*15117*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8118             : /*15119*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQ_S_PH_MM), 0,
    8119             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8120             :                   // Src: (intrinsic_wo_chain:v2i16 2409:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8121             :                   // Dst: (ADDQ_S_PH_MM:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8122             : /*15127*/       0, /*End of Scope*/
    8123             : /*15128*/     /*Scope*/ 29, /*->15158*/
    8124             : /*15129*/       OPC_CheckChild0Integer, 81|128,23/*3025*/, 
    8125             : /*15132*/       OPC_RecordChild1, // #0 = $rs
    8126             : /*15133*/       OPC_RecordChild2, // #1 = $rt
    8127             : /*15134*/       OPC_Scope, 10, /*->15146*/ // 2 children in Scope
    8128             : /*15136*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8129             : /*15138*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQ_S_PH), 0,
    8130             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8131             :                   // Src: (intrinsic_wo_chain:v2i16 3025:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8132             :                   // Dst: (SUBQ_S_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8133             : /*15146*/       /*Scope*/ 10, /*->15157*/
    8134             : /*15147*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8135             : /*15149*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQ_S_PH_MM), 0,
    8136             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8137             :                   // Src: (intrinsic_wo_chain:v2i16 3025:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8138             :                   // Dst: (SUBQ_S_PH_MM:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8139             : /*15157*/       0, /*End of Scope*/
    8140             : /*15158*/     /*Scope*/ 29, /*->15188*/
    8141             : /*15159*/       OPC_CheckChild0Integer, 117|128,22/*2933*/, 
    8142             : /*15162*/       OPC_RecordChild1, // #0 = $rs
    8143             : /*15163*/       OPC_RecordChild2, // #1 = $rt
    8144             : /*15164*/       OPC_Scope, 10, /*->15176*/ // 2 children in Scope
    8145             : /*15166*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8146             : /*15168*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECRQ_QB_PH), 0,
    8147             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8148             :                   // Src: (intrinsic_wo_chain:v4i8 2933:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8149             :                   // Dst: (PRECRQ_QB_PH:v4i8 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8150             : /*15176*/       /*Scope*/ 10, /*->15187*/
    8151             : /*15177*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8152             : /*15179*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECRQ_QB_PH_MM), 0,
    8153             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8154             :                   // Src: (intrinsic_wo_chain:v4i8 2933:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8155             :                   // Dst: (PRECRQ_QB_PH_MM:v4i8 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8156             : /*15187*/       0, /*End of Scope*/
    8157             : /*15188*/     /*Scope*/ 29, /*->15218*/
    8158             : /*15189*/       OPC_CheckChild0Integer, 116|128,22/*2932*/, 
    8159             : /*15192*/       OPC_RecordChild1, // #0 = $rs
    8160             : /*15193*/       OPC_RecordChild2, // #1 = $rt
    8161             : /*15194*/       OPC_Scope, 10, /*->15206*/ // 2 children in Scope
    8162             : /*15196*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8163             : /*15198*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECRQ_PH_W), 0,
    8164             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8165             :                   // Src: (intrinsic_wo_chain:v2i16 2932:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    8166             :                   // Dst: (PRECRQ_PH_W:v2i16 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    8167             : /*15206*/       /*Scope*/ 10, /*->15217*/
    8168             : /*15207*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8169             : /*15209*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECRQ_PH_W_MM), 0,
    8170             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8171             :                   // Src: (intrinsic_wo_chain:v2i16 2932:iPTR, GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt) - Complexity = 8
    8172             :                   // Dst: (PRECRQ_PH_W_MM:v2i16 GPR32Opnd:i32:$rs, GPR32Opnd:i32:$rt)
    8173             : /*15217*/       0, /*End of Scope*/
    8174             : /*15218*/     /*Scope*/ 26, /*->15245*/
    8175             : /*15219*/       OPC_CheckChild0Integer, 105|128,22/*2921*/, 
    8176             : /*15222*/       OPC_RecordChild1, // #0 = $rt
    8177             : /*15223*/       OPC_Scope, 9, /*->15234*/ // 2 children in Scope
    8178             : /*15225*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8179             : /*15227*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQU_PH_QBL), 0,
    8180             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8181             :                   // Src: (intrinsic_wo_chain:v2i16 2921:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    8182             :                   // Dst: (PRECEQU_PH_QBL:v2i16 DSPROpnd:v4i8:$rt)
    8183             : /*15234*/       /*Scope*/ 9, /*->15244*/
    8184             : /*15235*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8185             : /*15237*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQU_PH_QBL_MM), 0,
    8186             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8187             :                   // Src: (intrinsic_wo_chain:v2i16 2921:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    8188             :                   // Dst: (PRECEQU_PH_QBL_MM:v2i16 DSPROpnd:v4i8:$rs)
    8189             : /*15244*/       0, /*End of Scope*/
    8190             : /*15245*/     /*Scope*/ 26, /*->15272*/
    8191             : /*15246*/       OPC_CheckChild0Integer, 107|128,22/*2923*/, 
    8192             : /*15249*/       OPC_RecordChild1, // #0 = $rt
    8193             : /*15250*/       OPC_Scope, 9, /*->15261*/ // 2 children in Scope
    8194             : /*15252*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8195             : /*15254*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQU_PH_QBR), 0,
    8196             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8197             :                   // Src: (intrinsic_wo_chain:v2i16 2923:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    8198             :                   // Dst: (PRECEQU_PH_QBR:v2i16 DSPROpnd:v4i8:$rt)
    8199             : /*15261*/       /*Scope*/ 9, /*->15271*/
    8200             : /*15262*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8201             : /*15264*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQU_PH_QBR_MM), 0,
    8202             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8203             :                   // Src: (intrinsic_wo_chain:v2i16 2923:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    8204             :                   // Dst: (PRECEQU_PH_QBR_MM:v2i16 DSPROpnd:v4i8:$rs)
    8205             : /*15271*/       0, /*End of Scope*/
    8206             : /*15272*/     /*Scope*/ 26, /*->15299*/
    8207             : /*15273*/       OPC_CheckChild0Integer, 106|128,22/*2922*/, 
    8208             : /*15276*/       OPC_RecordChild1, // #0 = $rt
    8209             : /*15277*/       OPC_Scope, 9, /*->15288*/ // 2 children in Scope
    8210             : /*15279*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8211             : /*15281*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQU_PH_QBLA), 0,
    8212             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8213             :                   // Src: (intrinsic_wo_chain:v2i16 2922:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    8214             :                   // Dst: (PRECEQU_PH_QBLA:v2i16 DSPROpnd:v4i8:$rt)
    8215             : /*15288*/       /*Scope*/ 9, /*->15298*/
    8216             : /*15289*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8217             : /*15291*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQU_PH_QBLA_MM), 0,
    8218             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8219             :                   // Src: (intrinsic_wo_chain:v2i16 2922:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    8220             :                   // Dst: (PRECEQU_PH_QBLA_MM:v2i16 DSPROpnd:v4i8:$rs)
    8221             : /*15298*/       0, /*End of Scope*/
    8222             : /*15299*/     /*Scope*/ 26, /*->15326*/
    8223             : /*15300*/       OPC_CheckChild0Integer, 108|128,22/*2924*/, 
    8224             : /*15303*/       OPC_RecordChild1, // #0 = $rt
    8225             : /*15304*/       OPC_Scope, 9, /*->15315*/ // 2 children in Scope
    8226             : /*15306*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8227             : /*15308*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQU_PH_QBRA), 0,
    8228             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8229             :                   // Src: (intrinsic_wo_chain:v2i16 2924:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    8230             :                   // Dst: (PRECEQU_PH_QBRA:v2i16 DSPROpnd:v4i8:$rt)
    8231             : /*15315*/       /*Scope*/ 9, /*->15325*/
    8232             : /*15316*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8233             : /*15318*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEQU_PH_QBRA_MM), 0,
    8234             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8235             :                   // Src: (intrinsic_wo_chain:v2i16 2924:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    8236             :                   // Dst: (PRECEQU_PH_QBRA_MM:v2i16 DSPROpnd:v4i8:$rs)
    8237             : /*15325*/       0, /*End of Scope*/
    8238             : /*15326*/     /*Scope*/ 26, /*->15353*/
    8239             : /*15327*/       OPC_CheckChild0Integer, 109|128,22/*2925*/, 
    8240             : /*15330*/       OPC_RecordChild1, // #0 = $rt
    8241             : /*15331*/       OPC_Scope, 9, /*->15342*/ // 2 children in Scope
    8242             : /*15333*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8243             : /*15335*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEU_PH_QBL), 0,
    8244             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8245             :                   // Src: (intrinsic_wo_chain:v2i16 2925:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    8246             :                   // Dst: (PRECEU_PH_QBL:v2i16 DSPROpnd:v4i8:$rt)
    8247             : /*15342*/       /*Scope*/ 9, /*->15352*/
    8248             : /*15343*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8249             : /*15345*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEU_PH_QBL_MM), 0,
    8250             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8251             :                   // Src: (intrinsic_wo_chain:v2i16 2925:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    8252             :                   // Dst: (PRECEU_PH_QBL_MM:v2i16 DSPROpnd:v4i8:$rs)
    8253             : /*15352*/       0, /*End of Scope*/
    8254             : /*15353*/     /*Scope*/ 26, /*->15380*/
    8255             : /*15354*/       OPC_CheckChild0Integer, 111|128,22/*2927*/, 
    8256             : /*15357*/       OPC_RecordChild1, // #0 = $rt
    8257             : /*15358*/       OPC_Scope, 9, /*->15369*/ // 2 children in Scope
    8258             : /*15360*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8259             : /*15362*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEU_PH_QBR), 0,
    8260             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8261             :                   // Src: (intrinsic_wo_chain:v2i16 2927:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    8262             :                   // Dst: (PRECEU_PH_QBR:v2i16 DSPROpnd:v4i8:$rt)
    8263             : /*15369*/       /*Scope*/ 9, /*->15379*/
    8264             : /*15370*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8265             : /*15372*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEU_PH_QBR_MM), 0,
    8266             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8267             :                   // Src: (intrinsic_wo_chain:v2i16 2927:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    8268             :                   // Dst: (PRECEU_PH_QBR_MM:v2i16 DSPROpnd:v4i8:$rs)
    8269             : /*15379*/       0, /*End of Scope*/
    8270             : /*15380*/     /*Scope*/ 26, /*->15407*/
    8271             : /*15381*/       OPC_CheckChild0Integer, 110|128,22/*2926*/, 
    8272             : /*15384*/       OPC_RecordChild1, // #0 = $rt
    8273             : /*15385*/       OPC_Scope, 9, /*->15396*/ // 2 children in Scope
    8274             : /*15387*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8275             : /*15389*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEU_PH_QBLA), 0,
    8276             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8277             :                   // Src: (intrinsic_wo_chain:v2i16 2926:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    8278             :                   // Dst: (PRECEU_PH_QBLA:v2i16 DSPROpnd:v4i8:$rt)
    8279             : /*15396*/       /*Scope*/ 9, /*->15406*/
    8280             : /*15397*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8281             : /*15399*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEU_PH_QBLA_MM), 0,
    8282             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8283             :                   // Src: (intrinsic_wo_chain:v2i16 2926:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    8284             :                   // Dst: (PRECEU_PH_QBLA_MM:v2i16 DSPROpnd:v4i8:$rs)
    8285             : /*15406*/       0, /*End of Scope*/
    8286             : /*15407*/     /*Scope*/ 26, /*->15434*/
    8287             : /*15408*/       OPC_CheckChild0Integer, 112|128,22/*2928*/, 
    8288             : /*15411*/       OPC_RecordChild1, // #0 = $rt
    8289             : /*15412*/       OPC_Scope, 9, /*->15423*/ // 2 children in Scope
    8290             : /*15414*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8291             : /*15416*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEU_PH_QBRA), 0,
    8292             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8293             :                   // Src: (intrinsic_wo_chain:v2i16 2928:iPTR, DSPROpnd:v4i8:$rt) - Complexity = 8
    8294             :                   // Dst: (PRECEU_PH_QBRA:v2i16 DSPROpnd:v4i8:$rt)
    8295             : /*15423*/       /*Scope*/ 9, /*->15433*/
    8296             : /*15424*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8297             : /*15426*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PRECEU_PH_QBRA_MM), 0,
    8298             :                       MVT::v2i16, 1/*#Ops*/, 0, 
    8299             :                   // Src: (intrinsic_wo_chain:v2i16 2928:iPTR, DSPROpnd:v4i8:$rs) - Complexity = 8
    8300             :                   // Dst: (PRECEU_PH_QBRA_MM:v2i16 DSPROpnd:v4i8:$rs)
    8301             : /*15433*/       0, /*End of Scope*/
    8302             : /*15434*/     /*Scope*/ 29, /*->15464*/
    8303             : /*15435*/       OPC_CheckChild0Integer, 88|128,22/*2904*/, 
    8304             : /*15438*/       OPC_RecordChild1, // #0 = $rs
    8305             : /*15439*/       OPC_RecordChild2, // #1 = $rt
    8306             : /*15440*/       OPC_Scope, 10, /*->15452*/ // 2 children in Scope
    8307             : /*15442*/         OPC_CheckPatternPredicate, 26, // (Subtarget->hasDSP())
    8308             : /*15444*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PACKRL_PH), 0,
    8309             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8310             :                   // Src: (intrinsic_wo_chain:v2i16 2904:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8311             :                   // Dst: (PACKRL_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8312             : /*15452*/       /*Scope*/ 10, /*->15463*/
    8313             : /*15453*/         OPC_CheckPatternPredicate, 43, // (Subtarget->hasDSP()) && (Subtarget->inMicroMipsMode())
    8314             : /*15455*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::PACKRL_PH_MM), 0,
    8315             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8316             :                   // Src: (intrinsic_wo_chain:v2i16 2904:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8317             :                   // Dst: (PACKRL_PH_MM:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8318             : /*15463*/       0, /*End of Scope*/
    8319             : /*15464*/     /*Scope*/ 29, /*->15494*/
    8320             : /*15465*/       OPC_CheckChild0Integer, 0|128,19/*2432*/, 
    8321             : /*15468*/       OPC_RecordChild1, // #0 = $rs
    8322             : /*15469*/       OPC_RecordChild2, // #1 = $rt
    8323             : /*15470*/       OPC_Scope, 10, /*->15482*/ // 2 children in Scope
    8324             : /*15472*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    8325             : /*15474*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDUH_QB), 0,
    8326             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8327             :                   // Src: (intrinsic_wo_chain:v4i8 2432:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8328             :                   // Dst: (ADDUH_QB:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8329             : /*15482*/       /*Scope*/ 10, /*->15493*/
    8330             : /*15483*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    8331             : /*15485*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDUH_QB_MMR2), 0,
    8332             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8333             :                   // Src: (intrinsic_wo_chain:v4i8 2432:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8334             :                   // Dst: (ADDUH_QB_MMR2:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8335             : /*15493*/       0, /*End of Scope*/
    8336             : /*15494*/     /*Scope*/ 29, /*->15524*/
    8337             : /*15495*/       OPC_CheckChild0Integer, 1|128,19/*2433*/, 
    8338             : /*15498*/       OPC_RecordChild1, // #0 = $rs
    8339             : /*15499*/       OPC_RecordChild2, // #1 = $rt
    8340             : /*15500*/       OPC_Scope, 10, /*->15512*/ // 2 children in Scope
    8341             : /*15502*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    8342             : /*15504*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDUH_R_QB), 0,
    8343             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8344             :                   // Src: (intrinsic_wo_chain:v4i8 2433:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8345             :                   // Dst: (ADDUH_R_QB:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8346             : /*15512*/       /*Scope*/ 10, /*->15523*/
    8347             : /*15513*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    8348             : /*15515*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDUH_R_QB_MMR2), 0,
    8349             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8350             :                   // Src: (intrinsic_wo_chain:v4i8 2433:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8351             :                   // Dst: (ADDUH_R_QB_MMR2:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8352             : /*15523*/       0, /*End of Scope*/
    8353             : /*15524*/     /*Scope*/ 29, /*->15554*/
    8354             : /*15525*/       OPC_CheckChild0Integer, 107|128,23/*3051*/, 
    8355             : /*15528*/       OPC_RecordChild1, // #0 = $rs
    8356             : /*15529*/       OPC_RecordChild2, // #1 = $rt
    8357             : /*15530*/       OPC_Scope, 10, /*->15542*/ // 2 children in Scope
    8358             : /*15532*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    8359             : /*15534*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBUH_QB), 0,
    8360             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8361             :                   // Src: (intrinsic_wo_chain:v4i8 3051:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8362             :                   // Dst: (SUBUH_QB:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8363             : /*15542*/       /*Scope*/ 10, /*->15553*/
    8364             : /*15543*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    8365             : /*15545*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBUH_QB_MMR2), 0,
    8366             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8367             :                   // Src: (intrinsic_wo_chain:v4i8 3051:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8368             :                   // Dst: (SUBUH_QB_MMR2:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8369             : /*15553*/       0, /*End of Scope*/
    8370             : /*15554*/     /*Scope*/ 29, /*->15584*/
    8371             : /*15555*/       OPC_CheckChild0Integer, 108|128,23/*3052*/, 
    8372             : /*15558*/       OPC_RecordChild1, // #0 = $rs
    8373             : /*15559*/       OPC_RecordChild2, // #1 = $rt
    8374             : /*15560*/       OPC_Scope, 10, /*->15572*/ // 2 children in Scope
    8375             : /*15562*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    8376             : /*15564*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBUH_R_QB), 0,
    8377             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8378             :                   // Src: (intrinsic_wo_chain:v4i8 3052:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8379             :                   // Dst: (SUBUH_R_QB:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8380             : /*15572*/       /*Scope*/ 10, /*->15583*/
    8381             : /*15573*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    8382             : /*15575*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBUH_R_QB_MMR2), 0,
    8383             :                       MVT::v4i8, 2/*#Ops*/, 0, 1, 
    8384             :                   // Src: (intrinsic_wo_chain:v4i8 3052:iPTR, DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt) - Complexity = 8
    8385             :                   // Dst: (SUBUH_R_QB_MMR2:v4i8 DSPROpnd:v4i8:$rs, DSPROpnd:v4i8:$rt)
    8386             : /*15583*/       0, /*End of Scope*/
    8387             : /*15584*/     /*Scope*/ 29, /*->15614*/
    8388             : /*15585*/       OPC_CheckChild0Integer, 107|128,18/*2411*/, 
    8389             : /*15588*/       OPC_RecordChild1, // #0 = $rs
    8390             : /*15589*/       OPC_RecordChild2, // #1 = $rt
    8391             : /*15590*/       OPC_Scope, 10, /*->15602*/ // 2 children in Scope
    8392             : /*15592*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    8393             : /*15594*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQH_PH), 0,
    8394             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8395             :                   // Src: (intrinsic_wo_chain:v2i16 2411:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8396             :                   // Dst: (ADDQH_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8397             : /*15602*/       /*Scope*/ 10, /*->15613*/
    8398             : /*15603*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    8399             : /*15605*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQH_PH_MMR2), 0,
    8400             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8401             :                   // Src: (intrinsic_wo_chain:v2i16 2411:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8402             :                   // Dst: (ADDQH_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8403             : /*15613*/       0, /*End of Scope*/
    8404             : /*15614*/     /*Scope*/ 29, /*->15644*/
    8405             : /*15615*/       OPC_CheckChild0Integer, 108|128,18/*2412*/, 
    8406             : /*15618*/       OPC_RecordChild1, // #0 = $rs
    8407             : /*15619*/       OPC_RecordChild2, // #1 = $rt
    8408             : /*15620*/       OPC_Scope, 10, /*->15632*/ // 2 children in Scope
    8409             : /*15622*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    8410             : /*15624*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQH_R_PH), 0,
    8411             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8412             :                   // Src: (intrinsic_wo_chain:v2i16 2412:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8413             :                   // Dst: (ADDQH_R_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8414             : /*15632*/       /*Scope*/ 10, /*->15643*/
    8415             : /*15633*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    8416             : /*15635*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDQH_R_PH_MMR2), 0,
    8417             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8418             :                   // Src: (intrinsic_wo_chain:v2i16 2412:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8419             :                   // Dst: (ADDQH_R_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8420             : /*15643*/       0, /*End of Scope*/
    8421             : /*15644*/     /*Scope*/ 29, /*->15674*/
    8422             : /*15645*/       OPC_CheckChild0Integer, 83|128,23/*3027*/, 
    8423             : /*15648*/       OPC_RecordChild1, // #0 = $rs
    8424             : /*15649*/       OPC_RecordChild2, // #1 = $rt
    8425             : /*15650*/       OPC_Scope, 10, /*->15662*/ // 2 children in Scope
    8426             : /*15652*/         OPC_CheckPatternPredicate, 44, // (Subtarget->hasDSPR2())
    8427             : /*15654*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQH_PH), 0,
    8428             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8429             :                   // Src: (intrinsic_wo_chain:v2i16 3027:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8430             :                   // Dst: (SUBQH_PH:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8431             : /*15662*/       /*Scope*/ 10, /*->15673*/
    8432             : /*15663*/         OPC_CheckPatternPredicate, 45, // (Subtarget->hasDSPR2()) && (Subtarget->inMicroMipsMode())
    8433             : /*15665*/         OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBQH_PH_MMR2), 0,
    8434             :                       MVT::v2i16, 2/*#Ops*/, 0, 1, 
    8435             :                   // Src: (intrinsic_wo_chain:v2i16 3027:iPTR, DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt) - Complexity = 8
    8436             :                   // Dst: (SUBQH_PH_MMR2:v2i16 DSPROpnd:v2i16:$rs, DSPROpnd:v2i16:$rt)
    8437             : /*15673*/       0, /*End of Scope*/