LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/Mips - MipsGenMCCodeEmitter.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 1665 1781 93.5 %
Date: 2018-05-20 00:06:23 Functions: 1 1 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Machine Code Emitter                                                       *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : // Undef for HURD
      10             : #ifdef EIEIO
      11             : #undef EIEIO
      12             : #endif
      13       41726 : uint64_t MipsMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
      14             :     SmallVectorImpl<MCFixup> &Fixups,
      15             :     const MCSubtargetInfo &STI) const {
      16             :   static const uint64_t InstBits[] = {
      17             :     UINT64_C(0),
      18             :     UINT64_C(0),
      19             :     UINT64_C(0),
      20             :     UINT64_C(0),
      21             :     UINT64_C(0),
      22             :     UINT64_C(0),
      23             :     UINT64_C(0),
      24             :     UINT64_C(0),
      25             :     UINT64_C(0),
      26             :     UINT64_C(0),
      27             :     UINT64_C(0),
      28             :     UINT64_C(0),
      29             :     UINT64_C(0),
      30             :     UINT64_C(0),
      31             :     UINT64_C(0),
      32             :     UINT64_C(0),
      33             :     UINT64_C(0),
      34             :     UINT64_C(0),
      35             :     UINT64_C(0),
      36             :     UINT64_C(0),
      37             :     UINT64_C(0),
      38             :     UINT64_C(0),
      39             :     UINT64_C(0),
      40             :     UINT64_C(0),
      41             :     UINT64_C(0),
      42             :     UINT64_C(0),
      43             :     UINT64_C(0),
      44             :     UINT64_C(0),
      45             :     UINT64_C(0),
      46             :     UINT64_C(0),
      47             :     UINT64_C(0),
      48             :     UINT64_C(0),
      49             :     UINT64_C(0),
      50             :     UINT64_C(0),
      51             :     UINT64_C(0),
      52             :     UINT64_C(0),
      53             :     UINT64_C(0),
      54             :     UINT64_C(0),
      55             :     UINT64_C(0),
      56             :     UINT64_C(0),
      57             :     UINT64_C(0),
      58             :     UINT64_C(0),
      59             :     UINT64_C(0),
      60             :     UINT64_C(0),
      61             :     UINT64_C(0),
      62             :     UINT64_C(0),
      63             :     UINT64_C(0),
      64             :     UINT64_C(0),
      65             :     UINT64_C(0),
      66             :     UINT64_C(0),
      67             :     UINT64_C(0),
      68             :     UINT64_C(0),
      69             :     UINT64_C(0),
      70             :     UINT64_C(0),
      71             :     UINT64_C(0),
      72             :     UINT64_C(0),
      73             :     UINT64_C(0),
      74             :     UINT64_C(0),
      75             :     UINT64_C(0),
      76             :     UINT64_C(0),
      77             :     UINT64_C(0),
      78             :     UINT64_C(0),
      79             :     UINT64_C(0),
      80             :     UINT64_C(0),
      81             :     UINT64_C(0),
      82             :     UINT64_C(0),
      83             :     UINT64_C(0),
      84             :     UINT64_C(0),
      85             :     UINT64_C(0),
      86             :     UINT64_C(0),
      87             :     UINT64_C(0),
      88             :     UINT64_C(0),
      89             :     UINT64_C(0),
      90             :     UINT64_C(0),
      91             :     UINT64_C(0),
      92             :     UINT64_C(0),
      93             :     UINT64_C(0),
      94             :     UINT64_C(0),
      95             :     UINT64_C(0),
      96             :     UINT64_C(0),
      97             :     UINT64_C(0),
      98             :     UINT64_C(0),
      99             :     UINT64_C(0),
     100             :     UINT64_C(0),
     101             :     UINT64_C(0),
     102             :     UINT64_C(0),
     103             :     UINT64_C(0),
     104             :     UINT64_C(0),
     105             :     UINT64_C(0),
     106             :     UINT64_C(0),
     107             :     UINT64_C(0),
     108             :     UINT64_C(0),
     109             :     UINT64_C(0),
     110             :     UINT64_C(0),
     111             :     UINT64_C(0),
     112             :     UINT64_C(0),
     113             :     UINT64_C(0),
     114             :     UINT64_C(0),
     115             :     UINT64_C(0),
     116             :     UINT64_C(0),
     117             :     UINT64_C(0),
     118             :     UINT64_C(0),
     119             :     UINT64_C(0),
     120             :     UINT64_C(0),
     121             :     UINT64_C(0),
     122             :     UINT64_C(0),
     123             :     UINT64_C(0),
     124             :     UINT64_C(0),
     125             :     UINT64_C(0),
     126             :     UINT64_C(0),
     127             :     UINT64_C(0),
     128             :     UINT64_C(0),
     129             :     UINT64_C(0),
     130             :     UINT64_C(0),
     131             :     UINT64_C(0),
     132             :     UINT64_C(0),
     133             :     UINT64_C(0),
     134             :     UINT64_C(0),
     135             :     UINT64_C(0),
     136             :     UINT64_C(0),
     137             :     UINT64_C(0),
     138             :     UINT64_C(0),
     139             :     UINT64_C(0),
     140             :     UINT64_C(0),
     141             :     UINT64_C(0),
     142             :     UINT64_C(2080375378),       // ABSQ_S_PH
     143             :     UINT64_C(4412),     // ABSQ_S_PH_MM
     144             :     UINT64_C(2080374866),       // ABSQ_S_QB
     145             :     UINT64_C(316),      // ABSQ_S_QB_MMR2
     146             :     UINT64_C(2080375890),       // ABSQ_S_W
     147             :     UINT64_C(8508),     // ABSQ_S_W_MM
     148             :     UINT64_C(32),       // ADD
     149             :     UINT64_C(3959422976),       // ADDIUPC
     150             :     UINT64_C(2013265920),       // ADDIUPC_MM
     151             :     UINT64_C(2013265920),       // ADDIUPC_MMR6
     152             :     UINT64_C(27649),    // ADDIUR1SP_MM
     153             :     UINT64_C(27648),    // ADDIUR2_MM
     154             :     UINT64_C(19456),    // ADDIUS5_MM
     155             :     UINT64_C(19457),    // ADDIUSP_MM
     156             :     UINT64_C(805306368),        // ADDIU_MMR6
     157             :     UINT64_C(2080375320),       // ADDQH_PH
     158             :     UINT64_C(77),       // ADDQH_PH_MMR2
     159             :     UINT64_C(2080375448),       // ADDQH_R_PH
     160             :     UINT64_C(1101),     // ADDQH_R_PH_MMR2
     161             :     UINT64_C(2080375960),       // ADDQH_R_W
     162             :     UINT64_C(1165),     // ADDQH_R_W_MMR2
     163             :     UINT64_C(2080375832),       // ADDQH_W
     164             :     UINT64_C(141),      // ADDQH_W_MMR2
     165             :     UINT64_C(2080375440),       // ADDQ_PH
     166             :     UINT64_C(13),       // ADDQ_PH_MM
     167             :     UINT64_C(2080375696),       // ADDQ_S_PH
     168             :     UINT64_C(1037),     // ADDQ_S_PH_MM
     169             :     UINT64_C(2080376208),       // ADDQ_S_W
     170             :     UINT64_C(773),      // ADDQ_S_W_MM
     171             :     UINT64_C(2080375824),       // ADDSC
     172             :     UINT64_C(901),      // ADDSC_MM
     173             :     UINT64_C(2021654544),       // ADDS_A_B
     174             :     UINT64_C(2027946000),       // ADDS_A_D
     175             :     UINT64_C(2023751696),       // ADDS_A_H
     176             :     UINT64_C(2025848848),       // ADDS_A_W
     177             :     UINT64_C(2030043152),       // ADDS_S_B
     178             :     UINT64_C(2036334608),       // ADDS_S_D
     179             :     UINT64_C(2032140304),       // ADDS_S_H
     180             :     UINT64_C(2034237456),       // ADDS_S_W
     181             :     UINT64_C(2038431760),       // ADDS_U_B
     182             :     UINT64_C(2044723216),       // ADDS_U_D
     183             :     UINT64_C(2040528912),       // ADDS_U_H
     184             :     UINT64_C(2042626064),       // ADDS_U_W
     185             :     UINT64_C(1024),     // ADDU16_MM
     186             :     UINT64_C(1024),     // ADDU16_MMR6
     187             :     UINT64_C(2080374808),       // ADDUH_QB
     188             :     UINT64_C(333),      // ADDUH_QB_MMR2
     189             :     UINT64_C(2080374936),       // ADDUH_R_QB
     190             :     UINT64_C(1357),     // ADDUH_R_QB_MMR2
     191             :     UINT64_C(336),      // ADDU_MMR6
     192             :     UINT64_C(2080375312),       // ADDU_PH
     193             :     UINT64_C(269),      // ADDU_PH_MMR2
     194             :     UINT64_C(2080374800),       // ADDU_QB
     195             :     UINT64_C(205),      // ADDU_QB_MM
     196             :     UINT64_C(2080375568),       // ADDU_S_PH
     197             :     UINT64_C(1293),     // ADDU_S_PH_MMR2
     198             :     UINT64_C(2080375056),       // ADDU_S_QB
     199             :     UINT64_C(1229),     // ADDU_S_QB_MM
     200             :     UINT64_C(2013265926),       // ADDVI_B
     201             :     UINT64_C(2019557382),       // ADDVI_D
     202             :     UINT64_C(2015363078),       // ADDVI_H
     203             :     UINT64_C(2017460230),       // ADDVI_W
     204             :     UINT64_C(2013265934),       // ADDV_B
     205             :     UINT64_C(2019557390),       // ADDV_D
     206             :     UINT64_C(2015363086),       // ADDV_H
     207             :     UINT64_C(2017460238),       // ADDV_W
     208             :     UINT64_C(2080375888),       // ADDWC
     209             :     UINT64_C(965),      // ADDWC_MM
     210             :     UINT64_C(2013265936),       // ADD_A_B
     211             :     UINT64_C(2019557392),       // ADD_A_D
     212             :     UINT64_C(2015363088),       // ADD_A_H
     213             :     UINT64_C(2017460240),       // ADD_A_W
     214             :     UINT64_C(272),      // ADD_MM
     215             :     UINT64_C(272),      // ADD_MMR6
     216             :     UINT64_C(536870912),        // ADDi
     217             :     UINT64_C(268435456),        // ADDi_MM
     218             :     UINT64_C(603979776),        // ADDiu
     219             :     UINT64_C(805306368),        // ADDiu_MM
     220             :     UINT64_C(33),       // ADDu
     221             :     UINT64_C(336),      // ADDu_MM
     222             :     UINT64_C(0),
     223             :     UINT64_C(0),
     224             :     UINT64_C(2080375328),       // ALIGN
     225             :     UINT64_C(31),       // ALIGN_MMR6
     226             :     UINT64_C(3961454592),       // ALUIPC
     227             :     UINT64_C(2015297536),       // ALUIPC_MMR6
     228             :     UINT64_C(36),       // AND
     229             :     UINT64_C(17536),    // AND16_MM
     230             :     UINT64_C(17409),    // AND16_MMR6
     231             :     UINT64_C(36),       // AND64
     232             :     UINT64_C(11264),    // ANDI16_MM
     233             :     UINT64_C(11264),    // ANDI16_MMR6
     234             :     UINT64_C(2013265920),       // ANDI_B
     235             :     UINT64_C(3489660928),       // ANDI_MMR6
     236             :     UINT64_C(592),      // AND_MM
     237             :     UINT64_C(592),      // AND_MMR6
     238             :     UINT64_C(2013265950),       // AND_V
     239             :     UINT64_C(0),
     240             :     UINT64_C(0),
     241             :     UINT64_C(0),
     242             :     UINT64_C(805306368),        // ANDi
     243             :     UINT64_C(805306368),        // ANDi64
     244             :     UINT64_C(3489660928),       // ANDi_MM
     245             :     UINT64_C(2080374833),       // APPEND
     246             :     UINT64_C(533),      // APPEND_MMR2
     247             :     UINT64_C(2046820369),       // ASUB_S_B
     248             :     UINT64_C(2053111825),       // ASUB_S_D
     249             :     UINT64_C(2048917521),       // ASUB_S_H
     250             :     UINT64_C(2051014673),       // ASUB_S_W
     251             :     UINT64_C(2055208977),       // ASUB_U_B
     252             :     UINT64_C(2061500433),       // ASUB_U_D
     253             :     UINT64_C(2057306129),       // ASUB_U_H
     254             :     UINT64_C(2059403281),       // ASUB_U_W
     255             :     UINT64_C(0),
     256             :     UINT64_C(0),
     257             :     UINT64_C(0),
     258             :     UINT64_C(0),
     259             :     UINT64_C(0),
     260             :     UINT64_C(0),
     261             :     UINT64_C(0),
     262             :     UINT64_C(0),
     263             :     UINT64_C(0),
     264             :     UINT64_C(0),
     265             :     UINT64_C(0),
     266             :     UINT64_C(0),
     267             :     UINT64_C(0),
     268             :     UINT64_C(0),
     269             :     UINT64_C(0),
     270             :     UINT64_C(0),
     271             :     UINT64_C(0),
     272             :     UINT64_C(0),
     273             :     UINT64_C(0),
     274             :     UINT64_C(0),
     275             :     UINT64_C(0),
     276             :     UINT64_C(0),
     277             :     UINT64_C(0),
     278             :     UINT64_C(0),
     279             :     UINT64_C(0),
     280             :     UINT64_C(0),
     281             :     UINT64_C(0),
     282             :     UINT64_C(0),
     283             :     UINT64_C(0),
     284             :     UINT64_C(0),
     285             :     UINT64_C(0),
     286             :     UINT64_C(0),
     287             :     UINT64_C(1006632960),       // AUI
     288             :     UINT64_C(3961389056),       // AUIPC
     289             :     UINT64_C(2015232000),       // AUIPC_MMR6
     290             :     UINT64_C(268435456),        // AUI_MMR6
     291             :     UINT64_C(2063597584),       // AVER_S_B
     292             :     UINT64_C(2069889040),       // AVER_S_D
     293             :     UINT64_C(2065694736),       // AVER_S_H
     294             :     UINT64_C(2067791888),       // AVER_S_W
     295             :     UINT64_C(2071986192),       // AVER_U_B
     296             :     UINT64_C(2078277648),       // AVER_U_D
     297             :     UINT64_C(2074083344),       // AVER_U_H
     298             :     UINT64_C(2076180496),       // AVER_U_W
     299             :     UINT64_C(2046820368),       // AVE_S_B
     300             :     UINT64_C(2053111824),       // AVE_S_D
     301             :     UINT64_C(2048917520),       // AVE_S_H
     302             :     UINT64_C(2051014672),       // AVE_S_W
     303             :     UINT64_C(2055208976),       // AVE_U_B
     304             :     UINT64_C(2061500432),       // AVE_U_D
     305             :     UINT64_C(2057306128),       // AVE_U_H
     306             :     UINT64_C(2059403280),       // AVE_U_W
     307             :     UINT64_C(4026550272),       // AddiuRxImmX16
     308             :     UINT64_C(4026533888),       // AddiuRxPcImmX16
     309             :     UINT64_C(18432),    // AddiuRxRxImm16
     310             :     UINT64_C(4026550272),       // AddiuRxRxImmX16
     311             :     UINT64_C(4026548224),       // AddiuRxRyOffMemX16
     312             :     UINT64_C(25344),    // AddiuSpImm16
     313             :     UINT64_C(4026544896),       // AddiuSpImmX16
     314             :     UINT64_C(57345),    // AdduRxRyRz16
     315             :     UINT64_C(59404),    // AndRxRxRy16
     316             :     UINT64_C(0),
     317             :     UINT64_C(52224),    // B16_MM
     318             :     UINT64_C(1879048232),       // BADDu
     319             :     UINT64_C(68222976), // BAL
     320             :     UINT64_C(3892314112),       // BALC
     321             :     UINT64_C(3019898880),       // BALC_MMR6
     322             :     UINT64_C(2080375857),       // BALIGN
     323             :     UINT64_C(2236),     // BALIGN_MMR2
     324             :     UINT64_C(0),
     325             :     UINT64_C(0),
     326             :     UINT64_C(3355443200),       // BBIT0
     327             :     UINT64_C(3623878656),       // BBIT032
     328             :     UINT64_C(3892314112),       // BBIT1
     329             :     UINT64_C(4160749568),       // BBIT132
     330             :     UINT64_C(3355443200),       // BC
     331             :     UINT64_C(52224),    // BC16_MMR6
     332             :     UINT64_C(1159725056),       // BC1EQZ
     333             :     UINT64_C(1090519040),       // BC1EQZC_MMR6
     334             :     UINT64_C(1157627904),       // BC1F
     335             :     UINT64_C(1157758976),       // BC1FL
     336             :     UINT64_C(1132462080),       // BC1F_MM
     337             :     UINT64_C(1168113664),       // BC1NEZ
     338             :     UINT64_C(1092616192),       // BC1NEZC_MMR6
     339             :     UINT64_C(1157693440),       // BC1T
     340             :     UINT64_C(1157824512),       // BC1TL
     341             :     UINT64_C(1134559232),       // BC1T_MM
     342             :     UINT64_C(1226833920),       // BC2EQZ
     343             :     UINT64_C(1094713344),       // BC2EQZC_MMR6
     344             :     UINT64_C(1235222528),       // BC2NEZ
     345             :     UINT64_C(1096810496),       // BC2NEZC_MMR6
     346             :     UINT64_C(2045771785),       // BCLRI_B
     347             :     UINT64_C(2038431753),       // BCLRI_D
     348             :     UINT64_C(2044723209),       // BCLRI_H
     349             :     UINT64_C(2042626057),       // BCLRI_W
     350             :     UINT64_C(2038431757),       // BCLR_B
     351             :     UINT64_C(2044723213),       // BCLR_D
     352             :     UINT64_C(2040528909),       // BCLR_H
     353             :     UINT64_C(2042626061),       // BCLR_W
     354             :     UINT64_C(2483027968),       // BC_MMR6
     355             :     UINT64_C(268435456),        // BEQ
     356             :     UINT64_C(268435456),        // BEQ64
     357             :     UINT64_C(536870912),        // BEQC
     358             :     UINT64_C(536870912),        // BEQC64
     359             :     UINT64_C(1946157056),       // BEQC_MMR6
     360             :     UINT64_C(1342177280),       // BEQL
     361             :     UINT64_C(0),
     362             :     UINT64_C(35840),    // BEQZ16_MM
     363             :     UINT64_C(536870912),        // BEQZALC
     364             :     UINT64_C(1946157056),       // BEQZALC_MMR6
     365             :     UINT64_C(3623878656),       // BEQZC
     366             :     UINT64_C(35840),    // BEQZC16_MMR6
     367             :     UINT64_C(3623878656),       // BEQZC64
     368             :     UINT64_C(1088421888),       // BEQZC_MM
     369             :     UINT64_C(2147483648),       // BEQZC_MMR6
     370             :     UINT64_C(2483027968),       // BEQ_MM
     371             :     UINT64_C(0),
     372             :     UINT64_C(1476395008),       // BGEC
     373             :     UINT64_C(1476395008),       // BGEC64
     374             :     UINT64_C(4093640704),       // BGEC_MMR6
     375             :     UINT64_C(0),
     376             :     UINT64_C(0),
     377             :     UINT64_C(0),
     378             :     UINT64_C(0),
     379             :     UINT64_C(402653184),        // BGEUC
     380             :     UINT64_C(402653184),        // BGEUC64
     381             :     UINT64_C(3221225472),       // BGEUC_MMR6
     382             :     UINT64_C(0),
     383             :     UINT64_C(0),
     384             :     UINT64_C(0),
     385             :     UINT64_C(67174400), // BGEZ
     386             :     UINT64_C(67174400), // BGEZ64
     387             :     UINT64_C(68222976), // BGEZAL
     388             :     UINT64_C(402653184),        // BGEZALC
     389             :     UINT64_C(3221225472),       // BGEZALC_MMR6
     390             :     UINT64_C(68354048), // BGEZALL
     391             :     UINT64_C(1113587712),       // BGEZALS_MM
     392             :     UINT64_C(1080033280),       // BGEZAL_MM
     393             :     UINT64_C(1476395008),       // BGEZC
     394             :     UINT64_C(1476395008),       // BGEZC64
     395             :     UINT64_C(4093640704),       // BGEZC_MMR6
     396             :     UINT64_C(67305472), // BGEZL
     397             :     UINT64_C(1077936128),       // BGEZ_MM
     398             :     UINT64_C(0),
     399             :     UINT64_C(0),
     400             :     UINT64_C(0),
     401             :     UINT64_C(0),
     402             :     UINT64_C(0),
     403             :     UINT64_C(0),
     404             :     UINT64_C(0),
     405             :     UINT64_C(0),
     406             :     UINT64_C(469762048),        // BGTZ
     407             :     UINT64_C(469762048),        // BGTZ64
     408             :     UINT64_C(469762048),        // BGTZALC
     409             :     UINT64_C(3758096384),       // BGTZALC_MMR6
     410             :     UINT64_C(1543503872),       // BGTZC
     411             :     UINT64_C(1543503872),       // BGTZC64
     412             :     UINT64_C(3556769792),       // BGTZC_MMR6
     413             :     UINT64_C(1543503872),       // BGTZL
     414             :     UINT64_C(1086324736),       // BGTZ_MM
     415             :     UINT64_C(2070937609),       // BINSLI_B
     416             :     UINT64_C(2063597577),       // BINSLI_D
     417             :     UINT64_C(2069889033),       // BINSLI_H
     418             :     UINT64_C(2067791881),       // BINSLI_W
     419             :     UINT64_C(2063597581),       // BINSL_B
     420             :     UINT64_C(2069889037),       // BINSL_D
     421             :     UINT64_C(2065694733),       // BINSL_H
     422             :     UINT64_C(2067791885),       // BINSL_W
     423             :     UINT64_C(2079326217),       // BINSRI_B
     424             :     UINT64_C(2071986185),       // BINSRI_D
     425             :     UINT64_C(2078277641),       // BINSRI_H
     426             :     UINT64_C(2076180489),       // BINSRI_W
     427             :     UINT64_C(2071986189),       // BINSR_B
     428             :     UINT64_C(2078277645),       // BINSR_D
     429             :     UINT64_C(2074083341),       // BINSR_H
     430             :     UINT64_C(2076180493),       // BINSR_W
     431             :     UINT64_C(2080376530),       // BITREV
     432             :     UINT64_C(12604),    // BITREV_MM
     433             :     UINT64_C(2080374816),       // BITSWAP
     434             :     UINT64_C(2876),     // BITSWAP_MMR6
     435             :     UINT64_C(0),
     436             :     UINT64_C(0),
     437             :     UINT64_C(0),
     438             :     UINT64_C(0),
     439             :     UINT64_C(0),
     440             :     UINT64_C(0),
     441             :     UINT64_C(0),
     442             :     UINT64_C(0),
     443             :     UINT64_C(402653184),        // BLEZ
     444             :     UINT64_C(402653184),        // BLEZ64
     445             :     UINT64_C(402653184),        // BLEZALC
     446             :     UINT64_C(3221225472),       // BLEZALC_MMR6
     447             :     UINT64_C(1476395008),       // BLEZC
     448             :     UINT64_C(1476395008),       // BLEZC64
     449             :     UINT64_C(4093640704),       // BLEZC_MMR6
     450             :     UINT64_C(1476395008),       // BLEZL
     451             :     UINT64_C(1082130432),       // BLEZ_MM
     452             :     UINT64_C(0),
     453             :     UINT64_C(1543503872),       // BLTC
     454             :     UINT64_C(1543503872),       // BLTC64
     455             :     UINT64_C(3556769792),       // BLTC_MMR6
     456             :     UINT64_C(0),
     457             :     UINT64_C(0),
     458             :     UINT64_C(0),
     459             :     UINT64_C(0),
     460             :     UINT64_C(469762048),        // BLTUC
     461             :     UINT64_C(469762048),        // BLTUC64
     462             :     UINT64_C(3758096384),       // BLTUC_MMR6
     463             :     UINT64_C(0),
     464             :     UINT64_C(0),
     465             :     UINT64_C(0),
     466             :     UINT64_C(67108864), // BLTZ
     467             :     UINT64_C(67108864), // BLTZ64
     468             :     UINT64_C(68157440), // BLTZAL
     469             :     UINT64_C(469762048),        // BLTZALC
     470             :     UINT64_C(3758096384),       // BLTZALC_MMR6
     471             :     UINT64_C(68288512), // BLTZALL
     472             :     UINT64_C(1109393408),       // BLTZALS_MM
     473             :     UINT64_C(1075838976),       // BLTZAL_MM
     474             :     UINT64_C(1543503872),       // BLTZC
     475             :     UINT64_C(1543503872),       // BLTZC64
     476             :     UINT64_C(3556769792),       // BLTZC_MMR6
     477             :     UINT64_C(67239936), // BLTZL
     478             :     UINT64_C(1073741824),       // BLTZ_MM
     479             :     UINT64_C(2013265921),       // BMNZI_B
     480             :     UINT64_C(2021654558),       // BMNZ_V
     481             :     UINT64_C(2030043137),       // BMZI_B
     482             :     UINT64_C(2023751710),       // BMZ_V
     483             :     UINT64_C(335544320),        // BNE
     484             :     UINT64_C(335544320),        // BNE64
     485             :     UINT64_C(1610612736),       // BNEC
     486             :     UINT64_C(1610612736),       // BNEC64
     487             :     UINT64_C(2080374784),       // BNEC_MMR6
     488             :     UINT64_C(2062549001),       // BNEGI_B
     489             :     UINT64_C(2055208969),       // BNEGI_D
     490             :     UINT64_C(2061500425),       // BNEGI_H
     491             :     UINT64_C(2059403273),       // BNEGI_W
     492             :     UINT64_C(2055208973),       // BNEG_B
     493             :     UINT64_C(2061500429),       // BNEG_D
     494             :     UINT64_C(2057306125),       // BNEG_H
     495             :     UINT64_C(2059403277),       // BNEG_W
     496             :     UINT64_C(1409286144),       // BNEL
     497             :     UINT64_C(0),
     498             :     UINT64_C(44032),    // BNEZ16_MM
     499             :     UINT64_C(1610612736),       // BNEZALC
     500             :     UINT64_C(2080374784),       // BNEZALC_MMR6
     501             :     UINT64_C(4160749568),       // BNEZC
     502             :     UINT64_C(44032),    // BNEZC16_MMR6
     503             :     UINT64_C(4160749568),       // BNEZC64
     504             :     UINT64_C(1084227584),       // BNEZC_MM
     505             :     UINT64_C(2684354560),       // BNEZC_MMR6
     506             :     UINT64_C(3019898880),       // BNE_MM
     507             :     UINT64_C(1610612736),       // BNVC
     508             :     UINT64_C(2080374784),       // BNVC_MMR6
     509             :     UINT64_C(1199570944),       // BNZ_B
     510             :     UINT64_C(1205862400),       // BNZ_D
     511             :     UINT64_C(1201668096),       // BNZ_H
     512             :     UINT64_C(1172307968),       // BNZ_V
     513             :     UINT64_C(1203765248),       // BNZ_W
     514             :     UINT64_C(536870912),        // BOVC
     515             :     UINT64_C(1946157056),       // BOVC_MMR6
     516             :     UINT64_C(68943872), // BPOSGE32
     517             :     UINT64_C(1126170624),       // BPOSGE32C_MMR3
     518             :     UINT64_C(1130364928),       // BPOSGE32_MM
     519             :     UINT64_C(0),
     520             :     UINT64_C(13),       // BREAK
     521             :     UINT64_C(18048),    // BREAK16_MM
     522             :     UINT64_C(17435),    // BREAK16_MMR6
     523             :     UINT64_C(7),        // BREAK_MM
     524             :     UINT64_C(7),        // BREAK_MMR6
     525             :     UINT64_C(2046820353),       // BSELI_B
     526             :     UINT64_C(0),
     527             :     UINT64_C(0),
     528             :     UINT64_C(0),
     529             :     UINT64_C(0),
     530             :     UINT64_C(2025848862),       // BSEL_V
     531             :     UINT64_C(0),
     532             :     UINT64_C(2054160393),       // BSETI_B
     533             :     UINT64_C(2046820361),       // BSETI_D
     534             :     UINT64_C(2053111817),       // BSETI_H
     535             :     UINT64_C(2051014665),       // BSETI_W
     536             :     UINT64_C(2046820365),       // BSET_B
     537             :     UINT64_C(2053111821),       // BSET_D
     538             :     UINT64_C(2048917517),       // BSET_H
     539             :     UINT64_C(2051014669),       // BSET_W
     540             :     UINT64_C(1191182336),       // BZ_B
     541             :     UINT64_C(1197473792),       // BZ_D
     542             :     UINT64_C(1193279488),       // BZ_H
     543             :     UINT64_C(1163919360),       // BZ_V
     544             :     UINT64_C(1195376640),       // BZ_W
     545             :     UINT64_C(0),
     546             :     UINT64_C(0),
     547             :     UINT64_C(0),
     548             :     UINT64_C(0),
     549             :     UINT64_C(8192),     // BeqzRxImm16
     550             :     UINT64_C(4026540032),       // BeqzRxImmX16
     551             :     UINT64_C(4096),     // Bimm16
     552             :     UINT64_C(4026535936),       // BimmX16
     553             :     UINT64_C(0),
     554             :     UINT64_C(10240),    // BnezRxImm16
     555             :     UINT64_C(4026542080),       // BnezRxImmX16
     556             :     UINT64_C(59397),    // Break16
     557             :     UINT64_C(24576),    // Bteqz16
     558             :     UINT64_C(0),
     559             :     UINT64_C(0),
     560             :     UINT64_C(0),
     561             :     UINT64_C(0),
     562             :     UINT64_C(0),
     563             :     UINT64_C(0),
     564             :     UINT64_C(4026544128),       // BteqzX16
     565             :     UINT64_C(24832),    // Btnez16
     566             :     UINT64_C(0),
     567             :     UINT64_C(0),
     568             :     UINT64_C(0),
     569             :     UINT64_C(0),
     570             :     UINT64_C(0),
     571             :     UINT64_C(0),
     572             :     UINT64_C(4026544384),       // BtnezX16
     573             :     UINT64_C(0),
     574             :     UINT64_C(0),
     575             :     UINT64_C(3154116608),       // CACHE
     576             :     UINT64_C(2080374811),       // CACHEE
     577             :     UINT64_C(1610655232),       // CACHEE_MM
     578             :     UINT64_C(536895488),        // CACHE_MM
     579             :     UINT64_C(536895488),        // CACHE_MMR6
     580             :     UINT64_C(2080374821),       // CACHE_R6
     581             :     UINT64_C(1176502282),       // CEIL_L_D64
     582             :     UINT64_C(1409307451),       // CEIL_L_D_MMR6
     583             :     UINT64_C(1174405130),       // CEIL_L_S
     584             :     UINT64_C(1409291067),       // CEIL_L_S_MMR6
     585             :     UINT64_C(1176502286),       // CEIL_W_D32
     586             :     UINT64_C(1176502286),       // CEIL_W_D64
     587             :     UINT64_C(1409309499),       // CEIL_W_D_MMR6
     588             :     UINT64_C(1409309499),       // CEIL_W_MM
     589             :     UINT64_C(1174405134),       // CEIL_W_S
     590             :     UINT64_C(1409293115),       // CEIL_W_S_MM
     591             :     UINT64_C(1409293115),       // CEIL_W_S_MMR6
     592             :     UINT64_C(2013265927),       // CEQI_B
     593             :     UINT64_C(2019557383),       // CEQI_D
     594             :     UINT64_C(2015363079),       // CEQI_H
     595             :     UINT64_C(2017460231),       // CEQI_W
     596             :     UINT64_C(2013265935),       // CEQ_B
     597             :     UINT64_C(2019557391),       // CEQ_D
     598             :     UINT64_C(2015363087),       // CEQ_H
     599             :     UINT64_C(2017460239),       // CEQ_W
     600             :     UINT64_C(1145044992),       // CFC1
     601             :     UINT64_C(1409290299),       // CFC1_MM
     602             :     UINT64_C(52540),    // CFC2_MM
     603             :     UINT64_C(2021523481),       // CFCMSA
     604             :     UINT64_C(0),
     605             :     UINT64_C(1879048242),       // CINS
     606             :     UINT64_C(1879048243),       // CINS32
     607             :     UINT64_C(1879048242),       // CINS64_32
     608             :     UINT64_C(1879048242),       // CINS_i32
     609             :     UINT64_C(1176502299),       // CLASS_D
     610             :     UINT64_C(1409286752),       // CLASS_D_MMR6
     611             :     UINT64_C(1174405147),       // CLASS_S
     612             :     UINT64_C(1409286240),       // CLASS_S_MMR6
     613             :     UINT64_C(2046820359),       // CLEI_S_B
     614             :     UINT64_C(2053111815),       // CLEI_S_D
     615             :     UINT64_C(2048917511),       // CLEI_S_H
     616             :     UINT64_C(2051014663),       // CLEI_S_W
     617             :     UINT64_C(2055208967),       // CLEI_U_B
     618             :     UINT64_C(2061500423),       // CLEI_U_D
     619             :     UINT64_C(2057306119),       // CLEI_U_H
     620             :     UINT64_C(2059403271),       // CLEI_U_W
     621             :     UINT64_C(2046820367),       // CLE_S_B
     622             :     UINT64_C(2053111823),       // CLE_S_D
     623             :     UINT64_C(2048917519),       // CLE_S_H
     624             :     UINT64_C(2051014671),       // CLE_S_W
     625             :     UINT64_C(2055208975),       // CLE_U_B
     626             :     UINT64_C(2061500431),       // CLE_U_D
     627             :     UINT64_C(2057306127),       // CLE_U_H
     628             :     UINT64_C(2059403279),       // CLE_U_W
     629             :     UINT64_C(1879048225),       // CLO
     630             :     UINT64_C(19260),    // CLO_MM
     631             :     UINT64_C(19260),    // CLO_MMR6
     632             :     UINT64_C(81),       // CLO_R6
     633             :     UINT64_C(2030043143),       // CLTI_S_B
     634             :     UINT64_C(2036334599),       // CLTI_S_D
     635             :     UINT64_C(2032140295),       // CLTI_S_H
     636             :     UINT64_C(2034237447),       // CLTI_S_W
     637             :     UINT64_C(2038431751),       // CLTI_U_B
     638             :     UINT64_C(2044723207),       // CLTI_U_D
     639             :     UINT64_C(2040528903),       // CLTI_U_H
     640             :     UINT64_C(2042626055),       // CLTI_U_W
     641             :     UINT64_C(2030043151),       // CLT_S_B
     642             :     UINT64_C(2036334607),       // CLT_S_D
     643             :     UINT64_C(2032140303),       // CLT_S_H
     644             :     UINT64_C(2034237455),       // CLT_S_W
     645             :     UINT64_C(2038431759),       // CLT_U_B
     646             :     UINT64_C(2044723215),       // CLT_U_D
     647             :     UINT64_C(2040528911),       // CLT_U_H
     648             :     UINT64_C(2042626063),       // CLT_U_W
     649             :     UINT64_C(1879048224),       // CLZ
     650             :     UINT64_C(23356),    // CLZ_MM
     651             :     UINT64_C(80),       // CLZ_MMR6
     652             :     UINT64_C(80),       // CLZ_R6
     653             :     UINT64_C(2080376337),       // CMPGDU_EQ_QB
     654             :     UINT64_C(389),      // CMPGDU_EQ_QB_MMR2
     655             :     UINT64_C(2080376465),       // CMPGDU_LE_QB
     656             :     UINT64_C(517),      // CMPGDU_LE_QB_MMR2
     657             :     UINT64_C(2080376401),       // CMPGDU_LT_QB
     658             :     UINT64_C(453),      // CMPGDU_LT_QB_MMR2
     659             :     UINT64_C(2080375057),       // CMPGU_EQ_QB
     660             :     UINT64_C(1476395205),       // CMPGU_EQ_QB_MM
     661             :     UINT64_C(2080375185),       // CMPGU_LE_QB
     662             :     UINT64_C(1476395333),       // CMPGU_LE_QB_MM
     663             :     UINT64_C(2080375121),       // CMPGU_LT_QB
     664             :     UINT64_C(1476395269),       // CMPGU_LT_QB_MM
     665             :     UINT64_C(2080374801),       // CMPU_EQ_QB
     666             :     UINT64_C(581),      // CMPU_EQ_QB_MM
     667             :     UINT64_C(2080374929),       // CMPU_LE_QB
     668             :     UINT64_C(709),      // CMPU_LE_QB_MM
     669             :     UINT64_C(2080374865),       // CMPU_LT_QB
     670             :     UINT64_C(645),      // CMPU_LT_QB_MM
     671             :     UINT64_C(1409286165),       // CMP_AF_D_MMR6
     672             :     UINT64_C(1409286149),       // CMP_AF_S_MMR6
     673             :     UINT64_C(1184890882),       // CMP_EQ_D
     674             :     UINT64_C(1409286293),       // CMP_EQ_D_MMR6
     675             :     UINT64_C(2080375313),       // CMP_EQ_PH
     676             :     UINT64_C(5),        // CMP_EQ_PH_MM
     677             :     UINT64_C(1182793730),       // CMP_EQ_S
     678             :     UINT64_C(1409286277),       // CMP_EQ_S_MMR6
     679             :     UINT64_C(1184890880),       // CMP_F_D
     680             :     UINT64_C(1182793728),       // CMP_F_S
     681             :     UINT64_C(1184890886),       // CMP_LE_D
     682             :     UINT64_C(1409286549),       // CMP_LE_D_MMR6
     683             :     UINT64_C(2080375441),       // CMP_LE_PH
     684             :     UINT64_C(133),      // CMP_LE_PH_MM
     685             :     UINT64_C(1182793734),       // CMP_LE_S
     686             :     UINT64_C(1409286533),       // CMP_LE_S_MMR6
     687             :     UINT64_C(1184890884),       // CMP_LT_D
     688             :     UINT64_C(1409286421),       // CMP_LT_D_MMR6
     689             :     UINT64_C(2080375377),       // CMP_LT_PH
     690             :     UINT64_C(69),       // CMP_LT_PH_MM
     691             :     UINT64_C(1182793732),       // CMP_LT_S
     692             :     UINT64_C(1409286405),       // CMP_LT_S_MMR6
     693             :     UINT64_C(1184890888),       // CMP_SAF_D
     694             :     UINT64_C(1409286677),       // CMP_SAF_D_MMR6
     695             :     UINT64_C(1182793736),       // CMP_SAF_S
     696             :     UINT64_C(1409286661),       // CMP_SAF_S_MMR6
     697             :     UINT64_C(1184890890),       // CMP_SEQ_D
     698             :     UINT64_C(1409286805),       // CMP_SEQ_D_MMR6
     699             :     UINT64_C(1182793738),       // CMP_SEQ_S
     700             :     UINT64_C(1409286789),       // CMP_SEQ_S_MMR6
     701             :     UINT64_C(1184890894),       // CMP_SLE_D
     702             :     UINT64_C(1409287061),       // CMP_SLE_D_MMR6
     703             :     UINT64_C(1182793742),       // CMP_SLE_S
     704             :     UINT64_C(1409287045),       // CMP_SLE_S_MMR6
     705             :     UINT64_C(1184890892),       // CMP_SLT_D
     706             :     UINT64_C(1409286933),       // CMP_SLT_D_MMR6
     707             :     UINT64_C(1182793740),       // CMP_SLT_S
     708             :     UINT64_C(1409286917),       // CMP_SLT_S_MMR6
     709             :     UINT64_C(1184890891),       // CMP_SUEQ_D
     710             :     UINT64_C(1409286869),       // CMP_SUEQ_D_MMR6
     711             :     UINT64_C(1182793739),       // CMP_SUEQ_S
     712             :     UINT64_C(1409286853),       // CMP_SUEQ_S_MMR6
     713             :     UINT64_C(1184890895),       // CMP_SULE_D
     714             :     UINT64_C(1409287125),       // CMP_SULE_D_MMR6
     715             :     UINT64_C(1182793743),       // CMP_SULE_S
     716             :     UINT64_C(1409287109),       // CMP_SULE_S_MMR6
     717             :     UINT64_C(1184890893),       // CMP_SULT_D
     718             :     UINT64_C(1409286997),       // CMP_SULT_D_MMR6
     719             :     UINT64_C(1182793741),       // CMP_SULT_S
     720             :     UINT64_C(1409286981),       // CMP_SULT_S_MMR6
     721             :     UINT64_C(1184890889),       // CMP_SUN_D
     722             :     UINT64_C(1409286741),       // CMP_SUN_D_MMR6
     723             :     UINT64_C(1182793737),       // CMP_SUN_S
     724             :     UINT64_C(1409286725),       // CMP_SUN_S_MMR6
     725             :     UINT64_C(1184890883),       // CMP_UEQ_D
     726             :     UINT64_C(1409286357),       // CMP_UEQ_D_MMR6
     727             :     UINT64_C(1182793731),       // CMP_UEQ_S
     728             :     UINT64_C(1409286341),       // CMP_UEQ_S_MMR6
     729             :     UINT64_C(1184890887),       // CMP_ULE_D
     730             :     UINT64_C(1409286613),       // CMP_ULE_D_MMR6
     731             :     UINT64_C(1182793735),       // CMP_ULE_S
     732             :     UINT64_C(1409286597),       // CMP_ULE_S_MMR6
     733             :     UINT64_C(1184890885),       // CMP_ULT_D
     734             :     UINT64_C(1409286485),       // CMP_ULT_D_MMR6
     735             :     UINT64_C(1182793733),       // CMP_ULT_S
     736             :     UINT64_C(1409286469),       // CMP_ULT_S_MMR6
     737             :     UINT64_C(1184890881),       // CMP_UN_D
     738             :     UINT64_C(1409286229),       // CMP_UN_D_MMR6
     739             :     UINT64_C(1182793729),       // CMP_UN_S
     740             :     UINT64_C(1409286213),       // CMP_UN_S_MMR6
     741             :     UINT64_C(0),
     742             :     UINT64_C(0),
     743             :     UINT64_C(0),
     744             :     UINT64_C(2021654553),       // COPY_S_B
     745             :     UINT64_C(2025324569),       // COPY_S_D
     746             :     UINT64_C(2023751705),       // COPY_S_H
     747             :     UINT64_C(2024800281),       // COPY_S_W
     748             :     UINT64_C(2025848857),       // COPY_U_B
     749             :     UINT64_C(2027946009),       // COPY_U_H
     750             :     UINT64_C(2028994585),       // COPY_U_W
     751             :     UINT64_C(2080374799),       // CRC32B
     752             :     UINT64_C(2080375055),       // CRC32CB
     753             :     UINT64_C(2080375247),       // CRC32CD
     754             :     UINT64_C(2080375119),       // CRC32CH
     755             :     UINT64_C(2080375183),       // CRC32CW
     756             :     UINT64_C(2080374991),       // CRC32D
     757             :     UINT64_C(2080374863),       // CRC32H
     758             :     UINT64_C(2080374927),       // CRC32W
     759             :     UINT64_C(1153433600),       // CTC1
     760             :     UINT64_C(1409292347),       // CTC1_MM
     761             :     UINT64_C(56636),    // CTC2_MM
     762             :     UINT64_C(2017329177),       // CTCMSA
     763             :     UINT64_C(0),
     764             :     UINT64_C(1174405153),       // CVT_D32_S
     765             :     UINT64_C(1409291131),       // CVT_D32_S_MM
     766             :     UINT64_C(1182793761),       // CVT_D32_W
     767             :     UINT64_C(1409299323),       // CVT_D32_W_MM
     768             :     UINT64_C(1184890913),       // CVT_D64_L
     769             :     UINT64_C(1174405153),       // CVT_D64_S
     770             :     UINT64_C(1409291131),       // CVT_D64_S_MM
     771             :     UINT64_C(1182793761),       // CVT_D64_W
     772             :     UINT64_C(1409299323),       // CVT_D64_W_MM
     773             :     UINT64_C(1409307515),       // CVT_D_L_MMR6
     774             :     UINT64_C(1176502309),       // CVT_L_D64
     775             :     UINT64_C(1409302843),       // CVT_L_D64_MM
     776             :     UINT64_C(1409302843),       // CVT_L_D_MMR6
     777             :     UINT64_C(1174405157),       // CVT_L_S
     778             :     UINT64_C(1409286459),       // CVT_L_S_MM
     779             :     UINT64_C(1409286459),       // CVT_L_S_MMR6
     780             :     UINT64_C(1176502304),       // CVT_S_D32
     781             :     UINT64_C(1409293179),       // CVT_S_D32_MM
     782             :     UINT64_C(1176502304),       // CVT_S_D64
     783             :     UINT64_C(1409293179),       // CVT_S_D64_MM
     784             :     UINT64_C(1184890912),       // CVT_S_L
     785             :     UINT64_C(1409309563),       // CVT_S_L_MMR6
     786             :     UINT64_C(1182793760),       // CVT_S_W
     787             :     UINT64_C(1409301371),       // CVT_S_W_MM
     788             :     UINT64_C(1409301371),       // CVT_S_W_MMR6
     789             :     UINT64_C(1176502308),       // CVT_W_D32
     790             :     UINT64_C(1409304891),       // CVT_W_D32_MM
     791             :     UINT64_C(1176502308),       // CVT_W_D64
     792             :     UINT64_C(1409304891),       // CVT_W_D64_MM
     793             :     UINT64_C(1174405156),       // CVT_W_S
     794             :     UINT64_C(1409288507),       // CVT_W_S_MM
     795             :     UINT64_C(1409288507),       // CVT_W_S_MMR6
     796             :     UINT64_C(1176502322),       // C_EQ_D32
     797             :     UINT64_C(1409287356),       // C_EQ_D32_MM
     798             :     UINT64_C(1176502322),       // C_EQ_D64
     799             :     UINT64_C(1409287356),       // C_EQ_D64_MM
     800             :     UINT64_C(1174405170),       // C_EQ_S
     801             :     UINT64_C(1409286332),       // C_EQ_S_MM
     802             :     UINT64_C(1176502320),       // C_F_D32
     803             :     UINT64_C(1409287228),       // C_F_D32_MM
     804             :     UINT64_C(1176502320),       // C_F_D64
     805             :     UINT64_C(1409287228),       // C_F_D64_MM
     806             :     UINT64_C(1174405168),       // C_F_S
     807             :     UINT64_C(1409286204),       // C_F_S_MM
     808             :     UINT64_C(1176502334),       // C_LE_D32
     809             :     UINT64_C(1409288124),       // C_LE_D32_MM
     810             :     UINT64_C(1176502334),       // C_LE_D64
     811             :     UINT64_C(1409288124),       // C_LE_D64_MM
     812             :     UINT64_C(1174405182),       // C_LE_S
     813             :     UINT64_C(1409287100),       // C_LE_S_MM
     814             :     UINT64_C(1176502332),       // C_LT_D32
     815             :     UINT64_C(1409287996),       // C_LT_D32_MM
     816             :     UINT64_C(1176502332),       // C_LT_D64
     817             :     UINT64_C(1409287996),       // C_LT_D64_MM
     818             :     UINT64_C(1174405180),       // C_LT_S
     819             :     UINT64_C(1409286972),       // C_LT_S_MM
     820             :     UINT64_C(1176502333),       // C_NGE_D32
     821             :     UINT64_C(1409288060),       // C_NGE_D32_MM
     822             :     UINT64_C(1176502333),       // C_NGE_D64
     823             :     UINT64_C(1409288060),       // C_NGE_D64_MM
     824             :     UINT64_C(1174405181),       // C_NGE_S
     825             :     UINT64_C(1409287036),       // C_NGE_S_MM
     826             :     UINT64_C(1176502329),       // C_NGLE_D32
     827             :     UINT64_C(1409287804),       // C_NGLE_D32_MM
     828             :     UINT64_C(1176502329),       // C_NGLE_D64
     829             :     UINT64_C(1409287804),       // C_NGLE_D64_MM
     830             :     UINT64_C(1174405177),       // C_NGLE_S
     831             :     UINT64_C(1409286780),       // C_NGLE_S_MM
     832             :     UINT64_C(1176502331),       // C_NGL_D32
     833             :     UINT64_C(1409287932),       // C_NGL_D32_MM
     834             :     UINT64_C(1176502331),       // C_NGL_D64
     835             :     UINT64_C(1409287932),       // C_NGL_D64_MM
     836             :     UINT64_C(1174405179),       // C_NGL_S
     837             :     UINT64_C(1409286908),       // C_NGL_S_MM
     838             :     UINT64_C(1176502335),       // C_NGT_D32
     839             :     UINT64_C(1409288188),       // C_NGT_D32_MM
     840             :     UINT64_C(1176502335),       // C_NGT_D64
     841             :     UINT64_C(1409288188),       // C_NGT_D64_MM
     842             :     UINT64_C(1174405183),       // C_NGT_S
     843             :     UINT64_C(1409287164),       // C_NGT_S_MM
     844             :     UINT64_C(1176502326),       // C_OLE_D32
     845             :     UINT64_C(1409287612),       // C_OLE_D32_MM
     846             :     UINT64_C(1176502326),       // C_OLE_D64
     847             :     UINT64_C(1409287612),       // C_OLE_D64_MM
     848             :     UINT64_C(1174405174),       // C_OLE_S
     849             :     UINT64_C(1409286588),       // C_OLE_S_MM
     850             :     UINT64_C(1176502324),       // C_OLT_D32
     851             :     UINT64_C(1409287484),       // C_OLT_D32_MM
     852             :     UINT64_C(1176502324),       // C_OLT_D64
     853             :     UINT64_C(1409287484),       // C_OLT_D64_MM
     854             :     UINT64_C(1174405172),       // C_OLT_S
     855             :     UINT64_C(1409286460),       // C_OLT_S_MM
     856             :     UINT64_C(1176502330),       // C_SEQ_D32
     857             :     UINT64_C(1409287868),       // C_SEQ_D32_MM
     858             :     UINT64_C(1176502330),       // C_SEQ_D64
     859             :     UINT64_C(1409287868),       // C_SEQ_D64_MM
     860             :     UINT64_C(1174405178),       // C_SEQ_S
     861             :     UINT64_C(1409286844),       // C_SEQ_S_MM
     862             :     UINT64_C(1176502328),       // C_SF_D32
     863             :     UINT64_C(1409287740),       // C_SF_D32_MM
     864             :     UINT64_C(1176502328),       // C_SF_D64
     865             :     UINT64_C(1409287740),       // C_SF_D64_MM
     866             :     UINT64_C(1174405176),       // C_SF_S
     867             :     UINT64_C(1409286716),       // C_SF_S_MM
     868             :     UINT64_C(1176502323),       // C_UEQ_D32
     869             :     UINT64_C(1409287420),       // C_UEQ_D32_MM
     870             :     UINT64_C(1176502323),       // C_UEQ_D64
     871             :     UINT64_C(1409287420),       // C_UEQ_D64_MM
     872             :     UINT64_C(1174405171),       // C_UEQ_S
     873             :     UINT64_C(1409286396),       // C_UEQ_S_MM
     874             :     UINT64_C(1176502327),       // C_ULE_D32
     875             :     UINT64_C(1409287676),       // C_ULE_D32_MM
     876             :     UINT64_C(1176502327),       // C_ULE_D64
     877             :     UINT64_C(1409287676),       // C_ULE_D64_MM
     878             :     UINT64_C(1174405175),       // C_ULE_S
     879             :     UINT64_C(1409286652),       // C_ULE_S_MM
     880             :     UINT64_C(1176502325),       // C_ULT_D32
     881             :     UINT64_C(1409287548),       // C_ULT_D32_MM
     882             :     UINT64_C(1176502325),       // C_ULT_D64
     883             :     UINT64_C(1409287548),       // C_ULT_D64_MM
     884             :     UINT64_C(1174405173),       // C_ULT_S
     885             :     UINT64_C(1409286524),       // C_ULT_S_MM
     886             :     UINT64_C(1176502321),       // C_UN_D32
     887             :     UINT64_C(1409287292),       // C_UN_D32_MM
     888             :     UINT64_C(1176502321),       // C_UN_D64
     889             :     UINT64_C(1409287292),       // C_UN_D64_MM
     890             :     UINT64_C(1174405169),       // C_UN_S
     891             :     UINT64_C(1409286268),       // C_UN_S_MM
     892             :     UINT64_C(59402),    // CmpRxRy16
     893             :     UINT64_C(28672),    // CmpiRxImm16
     894             :     UINT64_C(4026560512),       // CmpiRxImmX16
     895             :     UINT64_C(0),
     896             :     UINT64_C(44),       // DADD
     897             :     UINT64_C(1610612736),       // DADDi
     898             :     UINT64_C(1677721600),       // DADDiu
     899             :     UINT64_C(45),       // DADDu
     900             :     UINT64_C(67502080), // DAHI
     901             :     UINT64_C(2080375332),       // DALIGN
     902             :     UINT64_C(69074944), // DATI
     903             :     UINT64_C(1946157056),       // DAUI
     904             :     UINT64_C(2080374820),       // DBITSWAP
     905             :     UINT64_C(1879048229),       // DCLO
     906             :     UINT64_C(83),       // DCLO_R6
     907             :     UINT64_C(1879048228),       // DCLZ
     908             :     UINT64_C(82),       // DCLZ_R6
     909             :     UINT64_C(158),      // DDIV
     910             :     UINT64_C(159),      // DDIVU
     911             :     UINT64_C(1107296287),       // DERET
     912             :     UINT64_C(58236),    // DERET_MM
     913             :     UINT64_C(58236),    // DERET_MMR6
     914             :     UINT64_C(2080374787),       // DEXT
     915             :     UINT64_C(2080374787),       // DEXT64_32
     916             :     UINT64_C(2080374785),       // DEXTM
     917             :     UINT64_C(2080374786),       // DEXTU
     918             :     UINT64_C(1096835072),       // DI
     919             :     UINT64_C(2080374791),       // DINS
     920             :     UINT64_C(2080374789),       // DINSM
     921             :     UINT64_C(2080374790),       // DINSU
     922             :     UINT64_C(154),      // DIV
     923             :     UINT64_C(155),      // DIVU
     924             :     UINT64_C(408),      // DIVU_MMR6
     925             :     UINT64_C(280),      // DIV_MMR6
     926             :     UINT64_C(2046820370),       // DIV_S_B
     927             :     UINT64_C(2053111826),       // DIV_S_D
     928             :     UINT64_C(2048917522),       // DIV_S_H
     929             :     UINT64_C(2051014674),       // DIV_S_W
     930             :     UINT64_C(2055208978),       // DIV_U_B
     931             :     UINT64_C(2061500434),       // DIV_U_D
     932             :     UINT64_C(2057306130),       // DIV_U_H
     933             :     UINT64_C(2059403282),       // DIV_U_W
     934             :     UINT64_C(18300),    // DI_MM
     935             :     UINT64_C(18300),    // DI_MMR6
     936             :     UINT64_C(21),       // DLSA
     937             :     UINT64_C(21),       // DLSA_R6
     938             :     UINT64_C(1075838976),       // DMFC0
     939             :     UINT64_C(1142947840),       // DMFC1
     940             :     UINT64_C(1210056704),       // DMFC2
     941             :     UINT64_C(1210056704),       // DMFC2_OCTEON
     942             :     UINT64_C(1080033536),       // DMFGC0
     943             :     UINT64_C(222),      // DMOD
     944             :     UINT64_C(223),      // DMODU
     945             :     UINT64_C(1096813505),       // DMT
     946             :     UINT64_C(1084227584),       // DMTC0
     947             :     UINT64_C(1151336448),       // DMTC1
     948             :     UINT64_C(1218445312),       // DMTC2
     949             :     UINT64_C(1218445312),       // DMTC2_OCTEON
     950             :     UINT64_C(1080034048),       // DMTGC0
     951             :     UINT64_C(220),      // DMUH
     952             :     UINT64_C(221),      // DMUHU
     953             :     UINT64_C(1879048195),       // DMUL
     954             :     UINT64_C(0),
     955             :     UINT64_C(0),
     956             :     UINT64_C(0),
     957             :     UINT64_C(0),
     958             :     UINT64_C(28),       // DMULT
     959             :     UINT64_C(29),       // DMULTu
     960             :     UINT64_C(157),      // DMULU
     961             :     UINT64_C(156),      // DMUL_R6
     962             :     UINT64_C(2019557395),       // DOTP_S_D
     963             :     UINT64_C(2015363091),       // DOTP_S_H
     964             :     UINT64_C(2017460243),       // DOTP_S_W
     965             :     UINT64_C(2027946003),       // DOTP_U_D
     966             :     UINT64_C(2023751699),       // DOTP_U_H
     967             :     UINT64_C(2025848851),       // DOTP_U_W
     968             :     UINT64_C(2036334611),       // DPADD_S_D
     969             :     UINT64_C(2032140307),       // DPADD_S_H
     970             :     UINT64_C(2034237459),       // DPADD_S_W
     971             :     UINT64_C(2044723219),       // DPADD_U_D
     972             :     UINT64_C(2040528915),       // DPADD_U_H
     973             :     UINT64_C(2042626067),       // DPADD_U_W
     974             :     UINT64_C(2080376496),       // DPAQX_SA_W_PH
     975             :     UINT64_C(12988),    // DPAQX_SA_W_PH_MMR2
     976             :     UINT64_C(2080376368),       // DPAQX_S_W_PH
     977             :     UINT64_C(8892),     // DPAQX_S_W_PH_MMR2
     978             :     UINT64_C(2080375600),       // DPAQ_SA_L_W
     979             :     UINT64_C(4796),     // DPAQ_SA_L_W_MM
     980             :     UINT64_C(2080375088),       // DPAQ_S_W_PH
     981             :     UINT64_C(700),      // DPAQ_S_W_PH_MM
     982             :     UINT64_C(2080375024),       // DPAU_H_QBL
     983             :     UINT64_C(8380),     // DPAU_H_QBL_MM
     984             :     UINT64_C(2080375280),       // DPAU_H_QBR
     985             :     UINT64_C(12476),    // DPAU_H_QBR_MM
     986             :     UINT64_C(2080375344),       // DPAX_W_PH
     987             :     UINT64_C(4284),     // DPAX_W_PH_MMR2
     988             :     UINT64_C(2080374832),       // DPA_W_PH
     989             :     UINT64_C(188),      // DPA_W_PH_MMR2
     990             :     UINT64_C(1879048237),       // DPOP
     991             :     UINT64_C(2080376560),       // DPSQX_SA_W_PH
     992             :     UINT64_C(14012),    // DPSQX_SA_W_PH_MMR2
     993             :     UINT64_C(2080376432),       // DPSQX_S_W_PH
     994             :     UINT64_C(9916),     // DPSQX_S_W_PH_MMR2
     995             :     UINT64_C(2080375664),       // DPSQ_SA_L_W
     996             :     UINT64_C(5820),     // DPSQ_SA_L_W_MM
     997             :     UINT64_C(2080375152),       // DPSQ_S_W_PH
     998             :     UINT64_C(1724),     // DPSQ_S_W_PH_MM
     999             :     UINT64_C(2053111827),       // DPSUB_S_D
    1000             :     UINT64_C(2048917523),       // DPSUB_S_H
    1001             :     UINT64_C(2051014675),       // DPSUB_S_W
    1002             :     UINT64_C(2061500435),       // DPSUB_U_D
    1003             :     UINT64_C(2057306131),       // DPSUB_U_H
    1004             :     UINT64_C(2059403283),       // DPSUB_U_W
    1005             :     UINT64_C(2080375536),       // DPSU_H_QBL
    1006             :     UINT64_C(9404),     // DPSU_H_QBL_MM
    1007             :     UINT64_C(2080375792),       // DPSU_H_QBR
    1008             :     UINT64_C(13500),    // DPSU_H_QBR_MM
    1009             :     UINT64_C(2080375408),       // DPSX_W_PH
    1010             :     UINT64_C(5308),     // DPSX_W_PH_MMR2
    1011             :     UINT64_C(2080374896),       // DPS_W_PH
    1012             :     UINT64_C(1212),     // DPS_W_PH_MMR2
    1013             :     UINT64_C(0),
    1014             :     UINT64_C(0),
    1015             :     UINT64_C(0),
    1016             :     UINT64_C(0),
    1017             :     UINT64_C(2097210),  // DROTR
    1018             :     UINT64_C(2097214),  // DROTR32
    1019             :     UINT64_C(86),       // DROTRV
    1020             :     UINT64_C(2080374948),       // DSBH
    1021             :     UINT64_C(30),       // DSDIV
    1022             :     UINT64_C(0),
    1023             :     UINT64_C(0),
    1024             :     UINT64_C(2080375140),       // DSHD
    1025             :     UINT64_C(56),       // DSLL
    1026             :     UINT64_C(60),       // DSLL32
    1027             :     UINT64_C(60),       // DSLL64_32
    1028             :     UINT64_C(20),       // DSLLV
    1029             :     UINT64_C(59),       // DSRA
    1030             :     UINT64_C(63),       // DSRA32
    1031             :     UINT64_C(23),       // DSRAV
    1032             :     UINT64_C(58),       // DSRL
    1033             :     UINT64_C(62),       // DSRL32
    1034             :     UINT64_C(22),       // DSRLV
    1035             :     UINT64_C(46),       // DSUB
    1036             :     UINT64_C(47),       // DSUBu
    1037             :     UINT64_C(31),       // DUDIV
    1038             :     UINT64_C(0),
    1039             :     UINT64_C(0),
    1040             :     UINT64_C(1096810532),       // DVP
    1041             :     UINT64_C(1096810497),       // DVPE
    1042             :     UINT64_C(6524),     // DVP_MMR6
    1043             :     UINT64_C(59418),    // DivRxRy16
    1044             :     UINT64_C(59419),    // DivuRxRy16
    1045             :     UINT64_C(192),      // EHB
    1046             :     UINT64_C(6144),     // EHB_MM
    1047             :     UINT64_C(6144),     // EHB_MMR6
    1048             :     UINT64_C(1096835104),       // EI
    1049             :     UINT64_C(22396),    // EI_MM
    1050             :     UINT64_C(22396),    // EI_MMR6
    1051             :     UINT64_C(1096813537),       // EMT
    1052             :     UINT64_C(1107296280),       // ERET
    1053             :     UINT64_C(1107296344),       // ERETNC
    1054             :     UINT64_C(127868),   // ERETNC_MMR6
    1055             :     UINT64_C(62332),    // ERET_MM
    1056             :     UINT64_C(62332),    // ERET_MMR6
    1057             :     UINT64_C(0),
    1058             :     UINT64_C(1096810500),       // EVP
    1059             :     UINT64_C(1096810529),       // EVPE
    1060             :     UINT64_C(14716),    // EVP_MMR6
    1061             :     UINT64_C(2080374784),       // EXT
    1062             :     UINT64_C(2080374968),       // EXTP
    1063             :     UINT64_C(2080375480),       // EXTPDP
    1064             :     UINT64_C(2080375544),       // EXTPDPV
    1065             :     UINT64_C(14524),    // EXTPDPV_MM
    1066             :     UINT64_C(13948),    // EXTPDP_MM
    1067             :     UINT64_C(2080375032),       // EXTPV
    1068             :     UINT64_C(10428),    // EXTPV_MM
    1069             :     UINT64_C(9852),     // EXTP_MM
    1070             :     UINT64_C(2080375288),       // EXTRV_RS_W
    1071             :     UINT64_C(11964),    // EXTRV_RS_W_MM
    1072             :     UINT64_C(2080375160),       // EXTRV_R_W
    1073             :     UINT64_C(7868),     // EXTRV_R_W_MM
    1074             :     UINT64_C(2080375800),       // EXTRV_S_H
    1075             :     UINT64_C(16060),    // EXTRV_S_H_MM
    1076             :     UINT64_C(2080374904),       // EXTRV_W
    1077             :     UINT64_C(3772),     // EXTRV_W_MM
    1078             :     UINT64_C(2080375224),       // EXTR_RS_W
    1079             :     UINT64_C(11900),    // EXTR_RS_W_MM
    1080             :     UINT64_C(2080375096),       // EXTR_R_W
    1081             :     UINT64_C(7804),     // EXTR_R_W_MM
    1082             :     UINT64_C(2080375736),       // EXTR_S_H
    1083             :     UINT64_C(15996),    // EXTR_S_H_MM
    1084             :     UINT64_C(2080374840),       // EXTR_W
    1085             :     UINT64_C(3708),     // EXTR_W_MM
    1086             :     UINT64_C(1879048250),       // EXTS
    1087             :     UINT64_C(1879048251),       // EXTS32
    1088             :     UINT64_C(44),       // EXT_MM
    1089             :     UINT64_C(44),       // EXT_MMR6
    1090             :     UINT64_C(0),
    1091             :     UINT64_C(0),
    1092             :     UINT64_C(0),
    1093             :     UINT64_C(1176502277),       // FABS_D32
    1094             :     UINT64_C(1409295227),       // FABS_D32_MM
    1095             :     UINT64_C(1176502277),       // FABS_D64
    1096             :     UINT64_C(1409295227),       // FABS_D64_MM
    1097             :     UINT64_C(1174405125),       // FABS_S
    1098             :     UINT64_C(1409287035),       // FABS_S_MM
    1099             :     UINT64_C(0),
    1100             :     UINT64_C(2015363099),       // FADD_D
    1101             :     UINT64_C(1176502272),       // FADD_D32
    1102             :     UINT64_C(1409286448),       // FADD_D32_MM
    1103             :     UINT64_C(1176502272),       // FADD_D64
    1104             :     UINT64_C(1409286448),       // FADD_D64_MM
    1105             :     UINT64_C(1174405120),       // FADD_S
    1106             :     UINT64_C(1409286192),       // FADD_S_MM
    1107             :     UINT64_C(1409286192),       // FADD_S_MMR6
    1108             :     UINT64_C(2013265947),       // FADD_W
    1109             :     UINT64_C(2015363098),       // FCAF_D
    1110             :     UINT64_C(2013265946),       // FCAF_W
    1111             :     UINT64_C(2023751706),       // FCEQ_D
    1112             :     UINT64_C(2021654554),       // FCEQ_W
    1113             :     UINT64_C(2065760286),       // FCLASS_D
    1114             :     UINT64_C(2065694750),       // FCLASS_W
    1115             :     UINT64_C(2040528922),       // FCLE_D
    1116             :     UINT64_C(2038431770),       // FCLE_W
    1117             :     UINT64_C(2032140314),       // FCLT_D
    1118             :     UINT64_C(2030043162),       // FCLT_W
    1119             :     UINT64_C(1176502320),       // FCMP_D32
    1120             :     UINT64_C(1409287228),       // FCMP_D32_MM
    1121             :     UINT64_C(1176502320),       // FCMP_D64
    1122             :     UINT64_C(1174405168),       // FCMP_S32
    1123             :     UINT64_C(1409286204),       // FCMP_S32_MM
    1124             :     UINT64_C(2027946012),       // FCNE_D
    1125             :     UINT64_C(2025848860),       // FCNE_W
    1126             :     UINT64_C(2019557404),       // FCOR_D
    1127             :     UINT64_C(2017460252),       // FCOR_W
    1128             :     UINT64_C(2027946010),       // FCUEQ_D
    1129             :     UINT64_C(2025848858),       // FCUEQ_W
    1130             :     UINT64_C(2044723226),       // FCULE_D
    1131             :     UINT64_C(2042626074),       // FCULE_W
    1132             :     UINT64_C(2036334618),       // FCULT_D
    1133             :     UINT64_C(2034237466),       // FCULT_W
    1134             :     UINT64_C(2023751708),       // FCUNE_D
    1135             :     UINT64_C(2021654556),       // FCUNE_W
    1136             :     UINT64_C(2019557402),       // FCUN_D
    1137             :     UINT64_C(2017460250),       // FCUN_W
    1138             :     UINT64_C(2027946011),       // FDIV_D
    1139             :     UINT64_C(1176502275),       // FDIV_D32
    1140             :     UINT64_C(1409286640),       // FDIV_D32_MM
    1141             :     UINT64_C(1176502275),       // FDIV_D64
    1142             :     UINT64_C(1409286640),       // FDIV_D64_MM
    1143             :     UINT64_C(1174405123),       // FDIV_S
    1144             :     UINT64_C(1409286384),       // FDIV_S_MM
    1145             :     UINT64_C(1409286384),       // FDIV_S_MMR6
    1146             :     UINT64_C(2025848859),       // FDIV_W
    1147             :     UINT64_C(2046820379),       // FEXDO_H
    1148             :     UINT64_C(2048917531),       // FEXDO_W
    1149             :     UINT64_C(2044723227),       // FEXP2_D
    1150             :     UINT64_C(0),
    1151             :     UINT64_C(2042626075),       // FEXP2_W
    1152             :     UINT64_C(0),
    1153             :     UINT64_C(2066808862),       // FEXUPL_D
    1154             :     UINT64_C(2066743326),       // FEXUPL_W
    1155             :     UINT64_C(2066939934),       // FEXUPR_D
    1156             :     UINT64_C(2066874398),       // FEXUPR_W
    1157             :     UINT64_C(2067595294),       // FFINT_S_D
    1158             :     UINT64_C(2067529758),       // FFINT_S_W
    1159             :     UINT64_C(2067726366),       // FFINT_U_D
    1160             :     UINT64_C(2067660830),       // FFINT_U_W
    1161             :     UINT64_C(2067071006),       // FFQL_D
    1162             :     UINT64_C(2067005470),       // FFQL_W
    1163             :     UINT64_C(2067202078),       // FFQR_D
    1164             :     UINT64_C(2067136542),       // FFQR_W
    1165             :     UINT64_C(2063597598),       // FILL_B
    1166             :     UINT64_C(2063794206),       // FILL_D
    1167             :     UINT64_C(0),
    1168             :     UINT64_C(0),
    1169             :     UINT64_C(2063663134),       // FILL_H
    1170             :     UINT64_C(2063728670),       // FILL_W
    1171             :     UINT64_C(2066677790),       // FLOG2_D
    1172             :     UINT64_C(2066612254),       // FLOG2_W
    1173             :     UINT64_C(1176502283),       // FLOOR_L_D64
    1174             :     UINT64_C(1409303355),       // FLOOR_L_D_MMR6
    1175             :     UINT64_C(1174405131),       // FLOOR_L_S
    1176             :     UINT64_C(1409286971),       // FLOOR_L_S_MMR6
    1177             :     UINT64_C(1176502287),       // FLOOR_W_D32
    1178             :     UINT64_C(1176502287),       // FLOOR_W_D64
    1179             :     UINT64_C(1409305403),       // FLOOR_W_D_MMR6
    1180             :     UINT64_C(1409305403),       // FLOOR_W_MM
    1181             :     UINT64_C(1174405135),       // FLOOR_W_S
    1182             :     UINT64_C(1409289019),       // FLOOR_W_S_MM
    1183             :     UINT64_C(1409289019),       // FLOOR_W_S_MMR6
    1184             :     UINT64_C(2032140315),       // FMADD_D
    1185             :     UINT64_C(2030043163),       // FMADD_W
    1186             :     UINT64_C(2078277659),       // FMAX_A_D
    1187             :     UINT64_C(2076180507),       // FMAX_A_W
    1188             :     UINT64_C(2074083355),       // FMAX_D
    1189             :     UINT64_C(2071986203),       // FMAX_W
    1190             :     UINT64_C(2069889051),       // FMIN_A_D
    1191             :     UINT64_C(2067791899),       // FMIN_A_W
    1192             :     UINT64_C(2065694747),       // FMIN_D
    1193             :     UINT64_C(2063597595),       // FMIN_W
    1194             :     UINT64_C(1176502278),       // FMOV_D32
    1195             :     UINT64_C(1409294459),       // FMOV_D32_MM
    1196             :     UINT64_C(1176502278),       // FMOV_D64
    1197             :     UINT64_C(1409294459),       // FMOV_D64_MM
    1198             :     UINT64_C(1174405126),       // FMOV_S
    1199             :     UINT64_C(1409286267),       // FMOV_S_MM
    1200             :     UINT64_C(1409286267),       // FMOV_S_MMR6
    1201             :     UINT64_C(2036334619),       // FMSUB_D
    1202             :     UINT64_C(2034237467),       // FMSUB_W
    1203             :     UINT64_C(2023751707),       // FMUL_D
    1204             :     UINT64_C(1176502274),       // FMUL_D32
    1205             :     UINT64_C(1409286576),       // FMUL_D32_MM
    1206             :     UINT64_C(1176502274),       // FMUL_D64
    1207             :     UINT64_C(1409286576),       // FMUL_D64_MM
    1208             :     UINT64_C(1174405122),       // FMUL_S
    1209             :     UINT64_C(1409286320),       // FMUL_S_MM
    1210             :     UINT64_C(1409286320),       // FMUL_S_MMR6
    1211             :     UINT64_C(2021654555),       // FMUL_W
    1212             :     UINT64_C(1176502279),       // FNEG_D32
    1213             :     UINT64_C(1409297275),       // FNEG_D32_MM
    1214             :     UINT64_C(1176502279),       // FNEG_D64
    1215             :     UINT64_C(1409297275),       // FNEG_D64_MM
    1216             :     UINT64_C(1174405127),       // FNEG_S
    1217             :     UINT64_C(1409289083),       // FNEG_S_MM
    1218             :     UINT64_C(1409289083),       // FNEG_S_MMR6
    1219             :     UINT64_C(2080374792),       // FORK
    1220             :     UINT64_C(2066415646),       // FRCP_D
    1221             :     UINT64_C(2066350110),       // FRCP_W
    1222             :     UINT64_C(2066546718),       // FRINT_D
    1223             :     UINT64_C(2066481182),       // FRINT_W
    1224             :     UINT64_C(2066284574),       // FRSQRT_D
    1225             :     UINT64_C(2066219038),       // FRSQRT_W
    1226             :     UINT64_C(2048917530),       // FSAF_D
    1227             :     UINT64_C(2046820378),       // FSAF_W
    1228             :     UINT64_C(2057306138),       // FSEQ_D
    1229             :     UINT64_C(2055208986),       // FSEQ_W
    1230             :     UINT64_C(2074083354),       // FSLE_D
    1231             :     UINT64_C(2071986202),       // FSLE_W
    1232             :     UINT64_C(2065694746),       // FSLT_D
    1233             :     UINT64_C(2063597594),       // FSLT_W
    1234             :     UINT64_C(2061500444),       // FSNE_D
    1235             :     UINT64_C(2059403292),       // FSNE_W
    1236             :     UINT64_C(2053111836),       // FSOR_D
    1237             :     UINT64_C(2051014684),       // FSOR_W
    1238             :     UINT64_C(2066153502),       // FSQRT_D
    1239             :     UINT64_C(1176502276),       // FSQRT_D32
    1240             :     UINT64_C(1409305147),       // FSQRT_D32_MM
    1241             :     UINT64_C(1176502276),       // FSQRT_D64
    1242             :     UINT64_C(1409305147),       // FSQRT_D64_MM
    1243             :     UINT64_C(1174405124),       // FSQRT_S
    1244             :     UINT64_C(1409288763),       // FSQRT_S_MM
    1245             :     UINT64_C(2066087966),       // FSQRT_W
    1246             :     UINT64_C(2019557403),       // FSUB_D
    1247             :     UINT64_C(1176502273),       // FSUB_D32
    1248             :     UINT64_C(1409286512),       // FSUB_D32_MM
    1249             :     UINT64_C(1176502273),       // FSUB_D64
    1250             :     UINT64_C(1409286512),       // FSUB_D64_MM
    1251             :     UINT64_C(1174405121),       // FSUB_S
    1252             :     UINT64_C(1409286256),       // FSUB_S_MM
    1253             :     UINT64_C(1409286256),       // FSUB_S_MMR6
    1254             :     UINT64_C(2017460251),       // FSUB_W
    1255             :     UINT64_C(2061500442),       // FSUEQ_D
    1256             :     UINT64_C(2059403290),       // FSUEQ_W
    1257             :     UINT64_C(2078277658),       // FSULE_D
    1258             :     UINT64_C(2076180506),       // FSULE_W
    1259             :     UINT64_C(2069889050),       // FSULT_D
    1260             :     UINT64_C(2067791898),       // FSULT_W
    1261             :     UINT64_C(2057306140),       // FSUNE_D
    1262             :     UINT64_C(2055208988),       // FSUNE_W
    1263             :     UINT64_C(2053111834),       // FSUN_D
    1264             :     UINT64_C(2051014682),       // FSUN_W
    1265             :     UINT64_C(2067333150),       // FTINT_S_D
    1266             :     UINT64_C(2067267614),       // FTINT_S_W
    1267             :     UINT64_C(2067464222),       // FTINT_U_D
    1268             :     UINT64_C(2067398686),       // FTINT_U_W
    1269             :     UINT64_C(2055208987),       // FTQ_H
    1270             :     UINT64_C(2057306139),       // FTQ_W
    1271             :     UINT64_C(2065891358),       // FTRUNC_S_D
    1272             :     UINT64_C(2065825822),       // FTRUNC_S_W
    1273             :     UINT64_C(2066022430),       // FTRUNC_U_D
    1274             :     UINT64_C(2065956894),       // FTRUNC_U_W
    1275             :     UINT64_C(2080374845),       // GINVI
    1276             :     UINT64_C(24956),    // GINVI_MMR6
    1277             :     UINT64_C(2080374973),       // GINVT
    1278             :     UINT64_C(29052),    // GINVT_MMR6
    1279             :     UINT64_C(0),
    1280             :     UINT64_C(2053111829),       // HADD_S_D
    1281             :     UINT64_C(2048917525),       // HADD_S_H
    1282             :     UINT64_C(2051014677),       // HADD_S_W
    1283             :     UINT64_C(2061500437),       // HADD_U_D
    1284             :     UINT64_C(2057306133),       // HADD_U_H
    1285             :     UINT64_C(2059403285),       // HADD_U_W
    1286             :     UINT64_C(2069889045),       // HSUB_S_D
    1287             :     UINT64_C(2065694741),       // HSUB_S_H
    1288             :     UINT64_C(2067791893),       // HSUB_S_W
    1289             :     UINT64_C(2078277653),       // HSUB_U_D
    1290             :     UINT64_C(2074083349),       // HSUB_U_H
    1291             :     UINT64_C(2076180501),       // HSUB_U_W
    1292             :     UINT64_C(1107296296),       // HYPCALL
    1293             :     UINT64_C(50044),    // HYPCALL_MM
    1294             :     UINT64_C(2063597588),       // ILVEV_B
    1295             :     UINT64_C(2069889044),       // ILVEV_D
    1296             :     UINT64_C(2065694740),       // ILVEV_H
    1297             :     UINT64_C(2067791892),       // ILVEV_W
    1298             :     UINT64_C(2046820372),       // ILVL_B
    1299             :     UINT64_C(2053111828),       // ILVL_D
    1300             :     UINT64_C(2048917524),       // ILVL_H
    1301             :     UINT64_C(2051014676),       // ILVL_W
    1302             :     UINT64_C(2071986196),       // ILVOD_B
    1303             :     UINT64_C(2078277652),       // ILVOD_D
    1304             :     UINT64_C(2074083348),       // ILVOD_H
    1305             :     UINT64_C(2076180500),       // ILVOD_W
    1306             :     UINT64_C(2055208980),       // ILVR_B
    1307             :     UINT64_C(2061500436),       // ILVR_D
    1308             :     UINT64_C(2057306132),       // ILVR_H
    1309             :     UINT64_C(2059403284),       // ILVR_W
    1310             :     UINT64_C(2080374788),       // INS
    1311             :     UINT64_C(2030043161),       // INSERT_B
    1312             :     UINT64_C(0),
    1313             :     UINT64_C(0),
    1314             :     UINT64_C(2033713177),       // INSERT_D
    1315             :     UINT64_C(0),
    1316             :     UINT64_C(0),
    1317             :     UINT64_C(0),
    1318             :     UINT64_C(0),
    1319             :     UINT64_C(0),
    1320             :     UINT64_C(0),
    1321             :     UINT64_C(0),
    1322             :     UINT64_C(0),
    1323             :     UINT64_C(2032140313),       // INSERT_H
    1324             :     UINT64_C(0),
    1325             :     UINT64_C(0),
    1326             :     UINT64_C(2033188889),       // INSERT_W
    1327             :     UINT64_C(0),
    1328             :     UINT64_C(0),
    1329             :     UINT64_C(2080374796),       // INSV
    1330             :     UINT64_C(2034237465),       // INSVE_B
    1331             :     UINT64_C(2037907481),       // INSVE_D
    1332             :     UINT64_C(2036334617),       // INSVE_H
    1333             :     UINT64_C(2037383193),       // INSVE_W
    1334             :     UINT64_C(16700),    // INSV_MM
    1335             :     UINT64_C(12),       // INS_MM
    1336             :     UINT64_C(12),       // INS_MMR6
    1337             :     UINT64_C(134217728),        // J
    1338             :     UINT64_C(201326592),        // JAL
    1339             :     UINT64_C(9),        // JALR
    1340             :     UINT64_C(17856),    // JALR16_MM
    1341             :     UINT64_C(9),        // JALR64
    1342             :     UINT64_C(0),
    1343             :     UINT64_C(17419),    // JALRC16_MMR6
    1344             :     UINT64_C(7996),     // JALRC_HB_MMR6
    1345             :     UINT64_C(3900),     // JALRC_MMR6
    1346             :     UINT64_C(0),
    1347             :     UINT64_C(0),
    1348             :     UINT64_C(0),
    1349             :     UINT64_C(17888),    // JALRS16_MM
    1350             :     UINT64_C(20284),    // JALRS_MM
    1351             :     UINT64_C(1033),     // JALR_HB
    1352             :     UINT64_C(1033),     // JALR_HB64
    1353             :     UINT64_C(3900),     // JALR_MM
    1354             :     UINT64_C(1946157056),       // JALS_MM
    1355             :     UINT64_C(1946157056),       // JALX
    1356             :     UINT64_C(4026531840),       // JALX_MM
    1357             :     UINT64_C(4093640704),       // JAL_MM
    1358             :     UINT64_C(4160749568),       // JIALC
    1359             :     UINT64_C(4160749568),       // JIALC64
    1360             :     UINT64_C(2147483648),       // JIALC_MMR6
    1361             :     UINT64_C(3623878656),       // JIC
    1362             :     UINT64_C(3623878656),       // JIC64
    1363             :     UINT64_C(2684354560),       // JIC_MMR6
    1364             :     UINT64_C(8),        // JR
    1365             :     UINT64_C(17792),    // JR16_MM
    1366             :     UINT64_C(8),        // JR64
    1367             :     UINT64_C(18176),    // JRADDIUSP
    1368             :     UINT64_C(17824),    // JRC16_MM
    1369             :     UINT64_C(17411),    // JRC16_MMR6
    1370             :     UINT64_C(17427),    // JRCADDIUSP_MMR6
    1371             :     UINT64_C(1032),     // JR_HB
    1372             :     UINT64_C(1032),     // JR_HB64
    1373             :     UINT64_C(1033),     // JR_HB64_R6
    1374             :     UINT64_C(1033),     // JR_HB_R6
    1375             :     UINT64_C(3900),     // JR_MM
    1376             :     UINT64_C(3556769792),       // J_MM
    1377             :     UINT64_C(402653184),        // Jal16
    1378             :     UINT64_C(402653184),        // JalB16
    1379             :     UINT64_C(0),
    1380             :     UINT64_C(0),
    1381             :     UINT64_C(59424),    // JrRa16
    1382             :     UINT64_C(59616),    // JrcRa16
    1383             :     UINT64_C(59584),    // JrcRx16
    1384             :     UINT64_C(59392),    // JumpLinkReg16
    1385             :     UINT64_C(2147483648),       // LB
    1386             :     UINT64_C(2147483648),       // LB64
    1387             :     UINT64_C(2080374828),       // LBE
    1388             :     UINT64_C(1610639360),       // LBE_MM
    1389             :     UINT64_C(2048),     // LBU16_MM
    1390             :     UINT64_C(2080375178),       // LBUX
    1391             :     UINT64_C(549),      // LBUX_MM
    1392             :     UINT64_C(335544320),        // LBU_MMR6
    1393             :     UINT64_C(469762048),        // LB_MM
    1394             :     UINT64_C(469762048),        // LB_MMR6
    1395             :     UINT64_C(2415919104),       // LBu
    1396             :     UINT64_C(2415919104),       // LBu64
    1397             :     UINT64_C(2080374824),       // LBuE
    1398             :     UINT64_C(1610637312),       // LBuE_MM
    1399             :     UINT64_C(335544320),        // LBu_MM
    1400             :     UINT64_C(3690987520),       // LD
    1401             :     UINT64_C(3556769792),       // LDC1
    1402             :     UINT64_C(3556769792),       // LDC164
    1403             :     UINT64_C(3154116608),       // LDC1_D64_MMR6
    1404             :     UINT64_C(3154116608),       // LDC1_MM
    1405             :     UINT64_C(3623878656),       // LDC2
    1406             :     UINT64_C(536879104),        // LDC2_MMR6
    1407             :     UINT64_C(1237319680),       // LDC2_R6
    1408             :     UINT64_C(3690987520),       // LDC3
    1409             :     UINT64_C(2063597575),       // LDI_B
    1410             :     UINT64_C(2069889031),       // LDI_D
    1411             :     UINT64_C(2065694727),       // LDI_H
    1412             :     UINT64_C(2067791879),       // LDI_W
    1413             :     UINT64_C(1744830464),       // LDL
    1414             :     UINT64_C(0),
    1415             :     UINT64_C(3960995840),       // LDPC
    1416             :     UINT64_C(1811939328),       // LDR
    1417             :     UINT64_C(1275068417),       // LDXC1
    1418             :     UINT64_C(1275068417),       // LDXC164
    1419             :     UINT64_C(2013265952),       // LD_B
    1420             :     UINT64_C(2013265955),       // LD_D
    1421             :     UINT64_C(0),
    1422             :     UINT64_C(2013265953),       // LD_H
    1423             :     UINT64_C(2013265954),       // LD_W
    1424             :     UINT64_C(603979776),        // LEA_ADDiu
    1425             :     UINT64_C(1677721600),       // LEA_ADDiu64
    1426             :     UINT64_C(805306368),        // LEA_ADDiu_MM
    1427             :     UINT64_C(2214592512),       // LH
    1428             :     UINT64_C(2214592512),       // LH64
    1429             :     UINT64_C(2080374829),       // LHE
    1430             :     UINT64_C(1610639872),       // LHE_MM
    1431             :     UINT64_C(10240),    // LHU16_MM
    1432             :     UINT64_C(2080375050),       // LHX
    1433             :     UINT64_C(357),      // LHX_MM
    1434             :     UINT64_C(1006632960),       // LH_MM
    1435             :     UINT64_C(2483027968),       // LHu
    1436             :     UINT64_C(2483027968),       // LHu64
    1437             :     UINT64_C(2080374825),       // LHuE
    1438             :     UINT64_C(1610637824),       // LHuE_MM
    1439             :     UINT64_C(872415232),        // LHu_MM
    1440             :     UINT64_C(60416),    // LI16_MM
    1441             :     UINT64_C(60416),    // LI16_MMR6
    1442             :     UINT64_C(3221225472),       // LL
    1443             :     UINT64_C(3221225472),       // LL64
    1444             :     UINT64_C(2080374838),       // LL64_R6
    1445             :     UINT64_C(3489660928),       // LLD
    1446             :     UINT64_C(2080374839),       // LLD_R6
    1447             :     UINT64_C(2080374830),       // LLE
    1448             :     UINT64_C(1610640384),       // LLE_MM
    1449             :     UINT64_C(1610625024),       // LL_MM
    1450             :     UINT64_C(2080374838),       // LL_R6
    1451             :     UINT64_C(0),
    1452             :     UINT64_C(0),
    1453             :     UINT64_C(0),
    1454             :     UINT64_C(0),
    1455             :     UINT64_C(0),
    1456             :     UINT64_C(0),
    1457             :     UINT64_C(0),
    1458             :     UINT64_C(5),        // LSA
    1459             :     UINT64_C(15),       // LSA_MMR6
    1460             :     UINT64_C(5),        // LSA_R6
    1461             :     UINT64_C(268435456),        // LUI_MMR6
    1462             :     UINT64_C(1275068421),       // LUXC1
    1463             :     UINT64_C(1275068421),       // LUXC164
    1464             :     UINT64_C(1409286472),       // LUXC1_MM
    1465             :     UINT64_C(1006632960),       // LUi
    1466             :     UINT64_C(1006632960),       // LUi64
    1467             :     UINT64_C(1101004800),       // LUi_MM
    1468             :     UINT64_C(2348810240),       // LW
    1469             :     UINT64_C(26624),    // LW16_MM
    1470             :     UINT64_C(2348810240),       // LW64
    1471             :     UINT64_C(3288334336),       // LWC1
    1472             :     UINT64_C(2617245696),       // LWC1_MM
    1473             :     UINT64_C(3355443200),       // LWC2
    1474             :     UINT64_C(536870912),        // LWC2_MMR6
    1475             :     UINT64_C(1228931072),       // LWC2_R6
    1476             :     UINT64_C(3422552064),       // LWC3
    1477             :     UINT64_C(2348810240),       // LWDSP
    1478             :     UINT64_C(4227858432),       // LWDSP_MM
    1479             :     UINT64_C(2080374831),       // LWE
    1480             :     UINT64_C(1610640896),       // LWE_MM
    1481             :     UINT64_C(25600),    // LWGP_MM
    1482             :     UINT64_C(2281701376),       // LWL
    1483             :     UINT64_C(2281701376),       // LWL64
    1484             :     UINT64_C(2080374809),       // LWLE
    1485             :     UINT64_C(1610638336),       // LWLE_MM
    1486             :     UINT64_C(1610612736),       // LWL_MM
    1487             :     UINT64_C(17664),    // LWM16_MM
    1488             :     UINT64_C(17410),    // LWM16_MMR6
    1489             :     UINT64_C(536891392),        // LWM32_MM
    1490             :     UINT64_C(0),
    1491             :     UINT64_C(3959947264),       // LWPC
    1492             :     UINT64_C(2013790208),       // LWPC_MMR6
    1493             :     UINT64_C(536875008),        // LWP_MM
    1494             :     UINT64_C(536875008),        // LWP_MMR6
    1495             :     UINT64_C(2550136832),       // LWR
    1496             :     UINT64_C(2550136832),       // LWR64
    1497             :     UINT64_C(2080374810),       // LWRE
    1498             :     UINT64_C(1610638848),       // LWRE_MM
    1499             :     UINT64_C(1610616832),       // LWR_MM
    1500             :     UINT64_C(18432),    // LWSP_MM
    1501             :     UINT64_C(3960471552),       // LWUPC
    1502             :     UINT64_C(1610670080),       // LWU_MM
    1503             :     UINT64_C(2080374794),       // LWX
    1504             :     UINT64_C(1275068416),       // LWXC1
    1505             :     UINT64_C(1409286216),       // LWXC1_MM
    1506             :     UINT64_C(280),      // LWXS_MM
    1507             :     UINT64_C(421),      // LWX_MM
    1508             :     UINT64_C(4227858432),       // LW_MM
    1509             :     UINT64_C(4227858432),       // LW_MMR6
    1510             :     UINT64_C(2617245696),       // LWu
    1511             :     UINT64_C(4026570752),       // LbRxRyOffMemX16
    1512             :     UINT64_C(4026572800),       // LbuRxRyOffMemX16
    1513             :     UINT64_C(4026572800),       // LhRxRyOffMemX16
    1514             :     UINT64_C(4026572800),       // LhuRxRyOffMemX16
    1515             :     UINT64_C(26624),    // LiRxImm16
    1516             :     UINT64_C(4026558464),       // LiRxImmAlignX16
    1517             :     UINT64_C(4026558464),       // LiRxImmX16
    1518             :     UINT64_C(0),
    1519             :     UINT64_C(0),
    1520             :     UINT64_C(0),
    1521             :     UINT64_C(0),
    1522             :     UINT64_C(0),
    1523             :     UINT64_C(0),
    1524             :     UINT64_C(0),
    1525             :     UINT64_C(0),
    1526             :     UINT64_C(0),
    1527             :     UINT64_C(0),
    1528             :     UINT64_C(0),
    1529             :     UINT64_C(0),
    1530             :     UINT64_C(45056),    // LwRxPcTcp16
    1531             :     UINT64_C(4026576896),       // LwRxPcTcpX16
    1532             :     UINT64_C(4026570752),       // LwRxRyOffMemX16
    1533             :     UINT64_C(4026568704),       // LwRxSpImmX16
    1534             :     UINT64_C(1879048192),       // MADD
    1535             :     UINT64_C(1176502296),       // MADDF_D
    1536             :     UINT64_C(1409287096),       // MADDF_D_MMR6
    1537             :     UINT64_C(1174405144),       // MADDF_S
    1538             :     UINT64_C(1409286584),       // MADDF_S_MMR6
    1539             :     UINT64_C(2067791900),       // MADDR_Q_H
    1540             :     UINT64_C(2069889052),       // MADDR_Q_W
    1541             :     UINT64_C(1879048193),       // MADDU
    1542             :     UINT64_C(1879048193),       // MADDU_DSP
    1543             :     UINT64_C(6844),     // MADDU_DSP_MM
    1544             :     UINT64_C(56124),    // MADDU_MM
    1545             :     UINT64_C(2021654546),       // MADDV_B
    1546             :     UINT64_C(2027946002),       // MADDV_D
    1547             :     UINT64_C(2023751698),       // MADDV_H
    1548             :     UINT64_C(2025848850),       // MADDV_W
    1549             :     UINT64_C(1275068449),       // MADD_D32
    1550             :     UINT64_C(1409286153),       // MADD_D32_MM
    1551             :     UINT64_C(1275068449),       // MADD_D64
    1552             :     UINT64_C(1879048192),       // MADD_DSP
    1553             :     UINT64_C(2748),     // MADD_DSP_MM
    1554             :     UINT64_C(52028),    // MADD_MM
    1555             :     UINT64_C(2034237468),       // MADD_Q_H
    1556             :     UINT64_C(2036334620),       // MADD_Q_W
    1557             :     UINT64_C(1275068448),       // MADD_S
    1558             :     UINT64_C(1409286145),       // MADD_S_MM
    1559             :     UINT64_C(2080375856),       // MAQ_SA_W_PHL
    1560             :     UINT64_C(14972),    // MAQ_SA_W_PHL_MM
    1561             :     UINT64_C(2080375984),       // MAQ_SA_W_PHR
    1562             :     UINT64_C(10876),    // MAQ_SA_W_PHR_MM
    1563             :     UINT64_C(2080376112),       // MAQ_S_W_PHL
    1564             :     UINT64_C(6780),     // MAQ_S_W_PHL_MM
    1565             :     UINT64_C(2080376240),       // MAQ_S_W_PHR
    1566             :     UINT64_C(2684),     // MAQ_S_W_PHR_MM
    1567             :     UINT64_C(1176502303),       // MAXA_D
    1568             :     UINT64_C(1409286699),       // MAXA_D_MMR6
    1569             :     UINT64_C(1174405151),       // MAXA_S
    1570             :     UINT64_C(1409286187),       // MAXA_S_MMR6
    1571             :     UINT64_C(2030043142),       // MAXI_S_B
    1572             :     UINT64_C(2036334598),       // MAXI_S_D
    1573             :     UINT64_C(2032140294),       // MAXI_S_H
    1574             :     UINT64_C(2034237446),       // MAXI_S_W
    1575             :     UINT64_C(2038431750),       // MAXI_U_B
    1576             :     UINT64_C(2044723206),       // MAXI_U_D
    1577             :     UINT64_C(2040528902),       // MAXI_U_H
    1578             :     UINT64_C(2042626054),       // MAXI_U_W
    1579             :     UINT64_C(2063597582),       // MAX_A_B
    1580             :     UINT64_C(2069889038),       // MAX_A_D
    1581             :     UINT64_C(2065694734),       // MAX_A_H
    1582             :     UINT64_C(2067791886),       // MAX_A_W
    1583             :     UINT64_C(1176502301),       // MAX_D
    1584             :     UINT64_C(1409286667),       // MAX_D_MMR6
    1585             :     UINT64_C(1174405149),       // MAX_S
    1586             :     UINT64_C(2030043150),       // MAX_S_B
    1587             :     UINT64_C(2036334606),       // MAX_S_D
    1588             :     UINT64_C(2032140302),       // MAX_S_H
    1589             :     UINT64_C(1409286155),       // MAX_S_MMR6
    1590             :     UINT64_C(2034237454),       // MAX_S_W
    1591             :     UINT64_C(2038431758),       // MAX_U_B
    1592             :     UINT64_C(2044723214),       // MAX_U_D
    1593             :     UINT64_C(2040528910),       // MAX_U_H
    1594             :     UINT64_C(2042626062),       // MAX_U_W
    1595             :     UINT64_C(1073741824),       // MFC0
    1596             :     UINT64_C(252),      // MFC0_MMR6
    1597             :     UINT64_C(1140850688),       // MFC1
    1598             :     UINT64_C(1140850688),       // MFC1_D64
    1599             :     UINT64_C(1409294395),       // MFC1_MM
    1600             :     UINT64_C(1409294395),       // MFC1_MMR6
    1601             :     UINT64_C(1207959552),       // MFC2
    1602             :     UINT64_C(19772),    // MFC2_MMR6
    1603             :     UINT64_C(1080033280),       // MFGC0
    1604             :     UINT64_C(1276),     // MFGC0_MM
    1605             :     UINT64_C(244),      // MFHC0_MMR6
    1606             :     UINT64_C(1147142144),       // MFHC1_D32
    1607             :     UINT64_C(1409298491),       // MFHC1_D32_MM
    1608             :     UINT64_C(1147142144),       // MFHC1_D64
    1609             :     UINT64_C(1409298491),       // MFHC1_D64_MM
    1610             :     UINT64_C(36156),    // MFHC2_MMR6
    1611             :     UINT64_C(1080034304),       // MFHGC0
    1612             :     UINT64_C(1268),     // MFHGC0_MM
    1613             :     UINT64_C(16),       // MFHI
    1614             :     UINT64_C(17920),    // MFHI16_MM
    1615             :     UINT64_C(16),       // MFHI64
    1616             :     UINT64_C(16),       // MFHI_DSP
    1617             :     UINT64_C(124),      // MFHI_DSP_MM
    1618             :     UINT64_C(3452),     // MFHI_MM
    1619             :     UINT64_C(18),       // MFLO
    1620             :     UINT64_C(17984),    // MFLO16_MM
    1621             :     UINT64_C(18),       // MFLO64
    1622             :     UINT64_C(18),       // MFLO_DSP
    1623             :     UINT64_C(4220),     // MFLO_DSP_MM
    1624             :     UINT64_C(7548),     // MFLO_MM
    1625             :     UINT64_C(0),
    1626             :     UINT64_C(0),
    1627             :     UINT64_C(0),
    1628             :     UINT64_C(0),
    1629             :     UINT64_C(0),
    1630             :     UINT64_C(0),
    1631             :     UINT64_C(0),
    1632             :     UINT64_C(0),
    1633             :     UINT64_C(1090519040),       // MFTR
    1634             :     UINT64_C(1176502302),       // MINA_D
    1635             :     UINT64_C(1409286691),       // MINA_D_MMR6
    1636             :     UINT64_C(1174405150),       // MINA_S
    1637             :     UINT64_C(1409286179),       // MINA_S_MMR6
    1638             :     UINT64_C(2046820358),       // MINI_S_B
    1639             :     UINT64_C(2053111814),       // MINI_S_D
    1640             :     UINT64_C(2048917510),       // MINI_S_H
    1641             :     UINT64_C(2051014662),       // MINI_S_W
    1642             :     UINT64_C(2055208966),       // MINI_U_B
    1643             :     UINT64_C(2061500422),       // MINI_U_D
    1644             :     UINT64_C(2057306118),       // MINI_U_H
    1645             :     UINT64_C(2059403270),       // MINI_U_W
    1646             :     UINT64_C(2071986190),       // MIN_A_B
    1647             :     UINT64_C(2078277646),       // MIN_A_D
    1648             :     UINT64_C(2074083342),       // MIN_A_H
    1649             :     UINT64_C(2076180494),       // MIN_A_W
    1650             :     UINT64_C(1176502300),       // MIN_D
    1651             :     UINT64_C(1409286659),       // MIN_D_MMR6
    1652             :     UINT64_C(1174405148),       // MIN_S
    1653             :     UINT64_C(2046820366),       // MIN_S_B
    1654             :     UINT64_C(2053111822),       // MIN_S_D
    1655             :     UINT64_C(2048917518),       // MIN_S_H
    1656             :     UINT64_C(1409286147),       // MIN_S_MMR6
    1657             :     UINT64_C(2051014670),       // MIN_S_W
    1658             :     UINT64_C(2055208974),       // MIN_U_B
    1659             :     UINT64_C(2061500430),       // MIN_U_D
    1660             :     UINT64_C(2057306126),       // MIN_U_H
    1661             :     UINT64_C(2059403278),       // MIN_U_W
    1662             :     UINT64_C(0),
    1663             :     UINT64_C(0),
    1664             :     UINT64_C(218),      // MOD
    1665             :     UINT64_C(2080375952),       // MODSUB
    1666             :     UINT64_C(661),      // MODSUB_MM
    1667             :     UINT64_C(219),      // MODU
    1668             :     UINT64_C(472),      // MODU_MMR6
    1669             :     UINT64_C(344),      // MOD_MMR6
    1670             :     UINT64_C(2063597586),       // MOD_S_B
    1671             :     UINT64_C(2069889042),       // MOD_S_D
    1672             :     UINT64_C(2065694738),       // MOD_S_H
    1673             :     UINT64_C(2067791890),       // MOD_S_W
    1674             :     UINT64_C(2071986194),       // MOD_U_B
    1675             :     UINT64_C(2078277650),       // MOD_U_D
    1676             :     UINT64_C(2074083346),       // MOD_U_H
    1677             :     UINT64_C(2076180498),       // MOD_U_W
    1678             :     UINT64_C(3072),     // MOVE16_MM
    1679             :     UINT64_C(3072),     // MOVE16_MMR6
    1680             :     UINT64_C(33792),    // MOVEP_MM
    1681             :     UINT64_C(17412),    // MOVEP_MMR6
    1682             :     UINT64_C(2025717785),       // MOVE_V
    1683             :     UINT64_C(1176502289),       // MOVF_D32
    1684             :     UINT64_C(1409286688),       // MOVF_D32_MM
    1685             :     UINT64_C(1176502289),       // MOVF_D64
    1686             :     UINT64_C(1),        // MOVF_I
    1687             :     UINT64_C(1),        // MOVF_I64
    1688             :     UINT64_C(1409286523),       // MOVF_I_MM
    1689             :     UINT64_C(1174405137),       // MOVF_S
    1690             :     UINT64_C(1409286176),       // MOVF_S_MM
    1691             :     UINT64_C(1176502291),       // MOVN_I64_D64
    1692             :     UINT64_C(11),       // MOVN_I64_I
    1693             :     UINT64_C(11),       // MOVN_I64_I64
    1694             :     UINT64_C(1174405139),       // MOVN_I64_S
    1695             :     UINT64_C(1176502291),       // MOVN_I_D32
    1696             :     UINT64_C(1409286456),       // MOVN_I_D32_MM
    1697             :     UINT64_C(1176502291),       // MOVN_I_D64
    1698             :     UINT64_C(11),       // MOVN_I_I
    1699             :     UINT64_C(11),       // MOVN_I_I64
    1700             :     UINT64_C(24),       // MOVN_I_MM
    1701             :     UINT64_C(1174405139),       // MOVN_I_S
    1702             :     UINT64_C(1409286200),       // MOVN_I_S_MM
    1703             :     UINT64_C(1176567825),       // MOVT_D32
    1704             :     UINT64_C(1409286752),       // MOVT_D32_MM
    1705             :     UINT64_C(1176567825),       // MOVT_D64
    1706             :     UINT64_C(65537),    // MOVT_I
    1707             :     UINT64_C(65537),    // MOVT_I64
    1708             :     UINT64_C(1409288571),       // MOVT_I_MM
    1709             :     UINT64_C(1174470673),       // MOVT_S
    1710             :     UINT64_C(1409286240),       // MOVT_S_MM
    1711             :     UINT64_C(1176502290),       // MOVZ_I64_D64
    1712             :     UINT64_C(10),       // MOVZ_I64_I
    1713             :     UINT64_C(10),       // MOVZ_I64_I64
    1714             :     UINT64_C(1174405138),       // MOVZ_I64_S
    1715             :     UINT64_C(1176502290),       // MOVZ_I_D32
    1716             :     UINT64_C(1409286520),       // MOVZ_I_D32_MM
    1717             :     UINT64_C(1176502290),       // MOVZ_I_D64
    1718             :     UINT64_C(10),       // MOVZ_I_I
    1719             :     UINT64_C(10),       // MOVZ_I_I64
    1720             :     UINT64_C(88),       // MOVZ_I_MM
    1721             :     UINT64_C(1174405138),       // MOVZ_I_S
    1722             :     UINT64_C(1409286264),       // MOVZ_I_S_MM
    1723             :     UINT64_C(0),
    1724             :     UINT64_C(0),
    1725             :     UINT64_C(0),
    1726             :     UINT64_C(0),
    1727             :     UINT64_C(1879048196),       // MSUB
    1728             :     UINT64_C(1176502297),       // MSUBF_D
    1729             :     UINT64_C(1409287160),       // MSUBF_D_MMR6
    1730             :     UINT64_C(1174405145),       // MSUBF_S
    1731             :     UINT64_C(1409286648),       // MSUBF_S_MMR6
    1732             :     UINT64_C(2071986204),       // MSUBR_Q_H
    1733             :     UINT64_C(2074083356),       // MSUBR_Q_W
    1734             :     UINT64_C(1879048197),       // MSUBU
    1735             :     UINT64_C(1879048197),       // MSUBU_DSP
    1736             :     UINT64_C(15036),    // MSUBU_DSP_MM
    1737             :     UINT64_C(64316),    // MSUBU_MM
    1738             :     UINT64_C(2030043154),       // MSUBV_B
    1739             :     UINT64_C(2036334610),       // MSUBV_D
    1740             :     UINT64_C(2032140306),       // MSUBV_H
    1741             :     UINT64_C(2034237458),       // MSUBV_W
    1742             :     UINT64_C(1275068457),       // MSUB_D32
    1743             :     UINT64_C(1409286185),       // MSUB_D32_MM
    1744             :     UINT64_C(1275068457),       // MSUB_D64
    1745             :     UINT64_C(1879048196),       // MSUB_DSP
    1746             :     UINT64_C(10940),    // MSUB_DSP_MM
    1747             :     UINT64_C(60220),    // MSUB_MM
    1748             :     UINT64_C(2038431772),       // MSUB_Q_H
    1749             :     UINT64_C(2040528924),       // MSUB_Q_W
    1750             :     UINT64_C(1275068456),       // MSUB_S
    1751             :     UINT64_C(1409286177),       // MSUB_S_MM
    1752             :     UINT64_C(1082130432),       // MTC0
    1753             :     UINT64_C(764),      // MTC0_MMR6
    1754             :     UINT64_C(1149239296),       // MTC1
    1755             :     UINT64_C(1149239296),       // MTC1_D64
    1756             :     UINT64_C(1409296443),       // MTC1_MM
    1757             :     UINT64_C(1409296443),       // MTC1_MMR6
    1758             :     UINT64_C(1216348160),       // MTC2
    1759             :     UINT64_C(23868),    // MTC2_MMR6
    1760             :     UINT64_C(1080033792),       // MTGC0
    1761             :     UINT64_C(1788),     // MTGC0_MM
    1762             :     UINT64_C(756),      // MTHC0_MMR6
    1763             :     UINT64_C(1155530752),       // MTHC1_D32
    1764             :     UINT64_C(1409300539),       // MTHC1_D32_MM
    1765             :     UINT64_C(1155530752),       // MTHC1_D64
    1766             :     UINT64_C(1409300539),       // MTHC1_D64_MM
    1767             :     UINT64_C(40252),    // MTHC2_MMR6
    1768             :     UINT64_C(1080034816),       // MTHGC0
    1769             :     UINT64_C(1780),     // MTHGC0_MM
    1770             :     UINT64_C(17),       // MTHI
    1771             :     UINT64_C(17),       // MTHI64
    1772             :     UINT64_C(17),       // MTHI_DSP
    1773             :     UINT64_C(8316),     // MTHI_DSP_MM
    1774             :     UINT64_C(11644),    // MTHI_MM
    1775             :     UINT64_C(2080376824),       // MTHLIP
    1776             :     UINT64_C(636),      // MTHLIP_MM
    1777             :     UINT64_C(19),       // MTLO
    1778             :     UINT64_C(19),       // MTLO64
    1779             :     UINT64_C(19),       // MTLO_DSP
    1780             :     UINT64_C(12412),    // MTLO_DSP_MM
    1781             :     UINT64_C(15740),    // MTLO_MM
    1782             :     UINT64_C(1879048200),       // MTM0
    1783             :     UINT64_C(1879048204),       // MTM1
    1784             :     UINT64_C(1879048205),       // MTM2
    1785             :     UINT64_C(1879048201),       // MTP0
    1786             :     UINT64_C(1879048202),       // MTP1
    1787             :     UINT64_C(1879048203),       // MTP2
    1788             :     UINT64_C(0),
    1789             :     UINT64_C(0),
    1790             :     UINT64_C(0),
    1791             :     UINT64_C(0),
    1792             :     UINT64_C(0),
    1793             :     UINT64_C(0),
    1794             :     UINT64_C(0),
    1795             :     UINT64_C(0),
    1796             :     UINT64_C(1098907648),       // MTTR
    1797             :     UINT64_C(216),      // MUH
    1798             :     UINT64_C(217),      // MUHU
    1799             :     UINT64_C(216),      // MUHU_MMR6
    1800             :     UINT64_C(88),       // MUH_MMR6
    1801             :     UINT64_C(1879048194),       // MUL
    1802             :     UINT64_C(2080376592),       // MULEQ_S_W_PHL
    1803             :     UINT64_C(37),       // MULEQ_S_W_PHL_MM
    1804             :     UINT64_C(2080376656),       // MULEQ_S_W_PHR
    1805             :     UINT64_C(101),      // MULEQ_S_W_PHR_MM
    1806             :     UINT64_C(2080375184),       // MULEU_S_PH_QBL
    1807             :     UINT64_C(149),      // MULEU_S_PH_QBL_MM
    1808             :     UINT64_C(2080375248),       // MULEU_S_PH_QBR
    1809             :     UINT64_C(213),      // MULEU_S_PH_QBR_MM
    1810             :     UINT64_C(0),
    1811             :     UINT64_C(0),
    1812             :     UINT64_C(0),
    1813             :     UINT64_C(2080376784),       // MULQ_RS_PH
    1814             :     UINT64_C(277),      // MULQ_RS_PH_MM
    1815             :     UINT64_C(2080376280),       // MULQ_RS_W
    1816             :     UINT64_C(405),      // MULQ_RS_W_MMR2
    1817             :     UINT64_C(2080376720),       // MULQ_S_PH
    1818             :     UINT64_C(341),      // MULQ_S_PH_MMR2
    1819             :     UINT64_C(2080376216),       // MULQ_S_W
    1820             :     UINT64_C(469),      // MULQ_S_W_MMR2
    1821             :     UINT64_C(2063597596),       // MULR_Q_H
    1822             :     UINT64_C(2065694748),       // MULR_Q_W
    1823             :     UINT64_C(2080375216),       // MULSAQ_S_W_PH
    1824             :     UINT64_C(15548),    // MULSAQ_S_W_PH_MM
    1825             :     UINT64_C(2080374960),       // MULSA_W_PH
    1826             :     UINT64_C(11452),    // MULSA_W_PH_MMR2
    1827             :     UINT64_C(24),       // MULT
    1828             :     UINT64_C(25),       // MULTU_DSP
    1829             :     UINT64_C(7356),     // MULTU_DSP_MM
    1830             :     UINT64_C(24),       // MULT_DSP
    1831             :     UINT64_C(3260),     // MULT_DSP_MM
    1832             :     UINT64_C(35644),    // MULT_MM
    1833             :     UINT64_C(25),       // MULTu
    1834             :     UINT64_C(39740),    // MULTu_MM
    1835             :     UINT64_C(153),      // MULU
    1836             :     UINT64_C(152),      // MULU_MMR6
    1837             :     UINT64_C(2013265938),       // MULV_B
    1838             :     UINT64_C(2019557394),       // MULV_D
    1839             :     UINT64_C(2015363090),       // MULV_H
    1840             :     UINT64_C(2017460242),       // MULV_W
    1841             :     UINT64_C(528),      // MUL_MM
    1842             :     UINT64_C(24),       // MUL_MMR6
    1843             :     UINT64_C(2080375576),       // MUL_PH
    1844             :     UINT64_C(45),       // MUL_PH_MMR2
    1845             :     UINT64_C(2030043164),       // MUL_Q_H
    1846             :     UINT64_C(2032140316),       // MUL_Q_W
    1847             :     UINT64_C(152),      // MUL_R6
    1848             :     UINT64_C(2080375704),       // MUL_S_PH
    1849             :     UINT64_C(1069),     // MUL_S_PH_MMR2
    1850             :     UINT64_C(59408),    // Mfhi16
    1851             :     UINT64_C(59410),    // Mflo16
    1852             :     UINT64_C(25856),    // Move32R16
    1853             :     UINT64_C(26368),    // MoveR3216
    1854             :     UINT64_C(0),
    1855             :     UINT64_C(0),
    1856             :     UINT64_C(0),
    1857             :     UINT64_C(0),
    1858             :     UINT64_C(2064121886),       // NLOC_B
    1859             :     UINT64_C(2064318494),       // NLOC_D
    1860             :     UINT64_C(2064187422),       // NLOC_H
    1861             :     UINT64_C(2064252958),       // NLOC_W
    1862             :     UINT64_C(2064384030),       // NLZC_B
    1863             :     UINT64_C(2064580638),       // NLZC_D
    1864             :     UINT64_C(2064449566),       // NLZC_H
    1865             :     UINT64_C(2064515102),       // NLZC_W
    1866             :     UINT64_C(1275068465),       // NMADD_D32
    1867             :     UINT64_C(1409286154),       // NMADD_D32_MM
    1868             :     UINT64_C(1275068465),       // NMADD_D64
    1869             :     UINT64_C(1275068464),       // NMADD_S
    1870             :     UINT64_C(1409286146),       // NMADD_S_MM
    1871             :     UINT64_C(1275068473),       // NMSUB_D32
    1872             :     UINT64_C(1409286186),       // NMSUB_D32_MM
    1873             :     UINT64_C(1275068473),       // NMSUB_D64
    1874             :     UINT64_C(1275068472),       // NMSUB_S
    1875             :     UINT64_C(1409286178),       // NMSUB_S_MM
    1876             :     UINT64_C(0),
    1877             :     UINT64_C(39),       // NOR
    1878             :     UINT64_C(39),       // NOR64
    1879             :     UINT64_C(2046820352),       // NORI_B
    1880             :     UINT64_C(0),
    1881             :     UINT64_C(0),
    1882             :     UINT64_C(720),      // NOR_MM
    1883             :     UINT64_C(720),      // NOR_MMR6
    1884             :     UINT64_C(2017460254),       // NOR_V
    1885             :     UINT64_C(0),
    1886             :     UINT64_C(0),
    1887             :     UINT64_C(0),
    1888             :     UINT64_C(17408),    // NOT16_MM
    1889             :     UINT64_C(17408),    // NOT16_MMR6
    1890             :     UINT64_C(59421),    // NegRxRy16
    1891             :     UINT64_C(59407),    // NotRxRy16
    1892             :     UINT64_C(37),       // OR
    1893             :     UINT64_C(17600),    // OR16_MM
    1894             :     UINT64_C(17417),    // OR16_MMR6
    1895             :     UINT64_C(37),       // OR64
    1896             :     UINT64_C(2030043136),       // ORI_B
    1897             :     UINT64_C(1342177280),       // ORI_MMR6
    1898             :     UINT64_C(656),      // OR_MM
    1899             :     UINT64_C(656),      // OR_MMR6
    1900             :     UINT64_C(2015363102),       // OR_V
    1901             :     UINT64_C(0),
    1902             :     UINT64_C(0),
    1903             :     UINT64_C(0),
    1904             :     UINT64_C(872415232),        // ORi
    1905             :     UINT64_C(872415232),        // ORi64
    1906             :     UINT64_C(1342177280),       // ORi_MM
    1907             :     UINT64_C(59405),    // OrRxRxRy16
    1908             :     UINT64_C(2080375697),       // PACKRL_PH
    1909             :     UINT64_C(429),      // PACKRL_PH_MM
    1910             :     UINT64_C(320),      // PAUSE
    1911             :     UINT64_C(10240),    // PAUSE_MM
    1912             :     UINT64_C(10240),    // PAUSE_MMR6
    1913             :     UINT64_C(2030043156),       // PCKEV_B
    1914             :     UINT64_C(2036334612),       // PCKEV_D
    1915             :     UINT64_C(2032140308),       // PCKEV_H
    1916             :     UINT64_C(2034237460),       // PCKEV_W
    1917             :     UINT64_C(2038431764),       // PCKOD_B
    1918             :     UINT64_C(2044723220),       // PCKOD_D
    1919             :     UINT64_C(2040528916),       // PCKOD_H
    1920             :     UINT64_C(2042626068),       // PCKOD_W
    1921             :     UINT64_C(2063859742),       // PCNT_B
    1922             :     UINT64_C(2064056350),       // PCNT_D
    1923             :     UINT64_C(2063925278),       // PCNT_H
    1924             :     UINT64_C(2063990814),       // PCNT_W
    1925             :     UINT64_C(2080375505),       // PICK_PH
    1926             :     UINT64_C(557),      // PICK_PH_MM
    1927             :     UINT64_C(2080374993),       // PICK_QB
    1928             :     UINT64_C(493),      // PICK_QB_MM
    1929             :     UINT64_C(1879048236),       // POP
    1930             :     UINT64_C(2080375058),       // PRECEQU_PH_QBL
    1931             :     UINT64_C(2080375186),       // PRECEQU_PH_QBLA
    1932             :     UINT64_C(29500),    // PRECEQU_PH_QBLA_MM
    1933             :     UINT64_C(28988),    // PRECEQU_PH_QBL_MM
    1934             :     UINT64_C(2080375122),       // PRECEQU_PH_QBR
    1935             :     UINT64_C(2080375250),       // PRECEQU_PH_QBRA
    1936             :     UINT64_C(37692),    // PRECEQU_PH_QBRA_MM
    1937             :     UINT64_C(37180),    // PRECEQU_PH_QBR_MM
    1938             :     UINT64_C(2080375570),       // PRECEQ_W_PHL
    1939             :     UINT64_C(20796),    // PRECEQ_W_PHL_MM
    1940             :     UINT64_C(2080375634),       // PRECEQ_W_PHR
    1941             :     UINT64_C(24892),    // PRECEQ_W_PHR_MM
    1942             :     UINT64_C(2080376594),       // PRECEU_PH_QBL
    1943             :     UINT64_C(2080376722),       // PRECEU_PH_QBLA
    1944             :     UINT64_C(45884),    // PRECEU_PH_QBLA_MM
    1945             :     UINT64_C(45372),    // PRECEU_PH_QBL_MM
    1946             :     UINT64_C(2080376658),       // PRECEU_PH_QBR
    1947             :     UINT64_C(2080376786),       // PRECEU_PH_QBRA
    1948             :     UINT64_C(54076),    // PRECEU_PH_QBRA_MM
    1949             :     UINT64_C(53564),    // PRECEU_PH_QBR_MM
    1950             :     UINT64_C(2080375761),       // PRECRQU_S_QB_PH
    1951             :     UINT64_C(365),      // PRECRQU_S_QB_PH_MM
    1952             :     UINT64_C(2080376081),       // PRECRQ_PH_W
    1953             :     UINT64_C(237),      // PRECRQ_PH_W_MM
    1954             :     UINT64_C(2080375569),       // PRECRQ_QB_PH
    1955             :     UINT64_C(173),      // PRECRQ_QB_PH_MM
    1956             :     UINT64_C(2080376145),       // PRECRQ_RS_PH_W
    1957             :     UINT64_C(301),      // PRECRQ_RS_PH_W_MM
    1958             :     UINT64_C(2080375633),       // PRECR_QB_PH
    1959             :     UINT64_C(109),      // PRECR_QB_PH_MMR2
    1960             :     UINT64_C(2080376721),       // PRECR_SRA_PH_W
    1961             :     UINT64_C(973),      // PRECR_SRA_PH_W_MMR2
    1962             :     UINT64_C(2080376785),       // PRECR_SRA_R_PH_W
    1963             :     UINT64_C(1997),     // PRECR_SRA_R_PH_W_MMR2
    1964             :     UINT64_C(3422552064),       // PREF
    1965             :     UINT64_C(2080374819),       // PREFE
    1966             :     UINT64_C(1610654720),       // PREFE_MM
    1967             :     UINT64_C(1409286560),       // PREFX_MM
    1968             :     UINT64_C(1610620928),       // PREF_MM
    1969             :     UINT64_C(1610620928),       // PREF_MMR6
    1970             :     UINT64_C(2080374837),       // PREF_R6
    1971             :     UINT64_C(2080374897),       // PREPEND
    1972             :     UINT64_C(597),      // PREPEND_MMR2
    1973             :     UINT64_C(0),
    1974             :     UINT64_C(0),
    1975             :     UINT64_C(0),
    1976             :     UINT64_C(0),
    1977             :     UINT64_C(0),
    1978             :     UINT64_C(0),
    1979             :     UINT64_C(0),
    1980             :     UINT64_C(0),
    1981             :     UINT64_C(0),
    1982             :     UINT64_C(0),
    1983             :     UINT64_C(0),
    1984             :     UINT64_C(0),
    1985             :     UINT64_C(0),
    1986             :     UINT64_C(0),
    1987             :     UINT64_C(0),
    1988             :     UINT64_C(0),
    1989             :     UINT64_C(0),
    1990             :     UINT64_C(0),
    1991             :     UINT64_C(0),
    1992             :     UINT64_C(0),
    1993             :     UINT64_C(0),
    1994             :     UINT64_C(0),
    1995             :     UINT64_C(0),
    1996             :     UINT64_C(0),
    1997             :     UINT64_C(0),
    1998             :     UINT64_C(0),
    1999             :     UINT64_C(0),
    2000             :     UINT64_C(0),
    2001             :     UINT64_C(0),
    2002             :     UINT64_C(0),
    2003             :     UINT64_C(0),
    2004             :     UINT64_C(0),
    2005             :     UINT64_C(0),
    2006             :     UINT64_C(0),
    2007             :     UINT64_C(0),
    2008             :     UINT64_C(0),
    2009             :     UINT64_C(0),
    2010             :     UINT64_C(0),
    2011             :     UINT64_C(0),
    2012             :     UINT64_C(0),
    2013             :     UINT64_C(0),
    2014             :     UINT64_C(0),
    2015             :     UINT64_C(0),
    2016             :     UINT64_C(0),
    2017             :     UINT64_C(0),
    2018             :     UINT64_C(0),
    2019             :     UINT64_C(0),
    2020             :     UINT64_C(0),
    2021             :     UINT64_C(0),
    2022             :     UINT64_C(0),
    2023             :     UINT64_C(0),
    2024             :     UINT64_C(0),
    2025             :     UINT64_C(0),
    2026             :     UINT64_C(0),
    2027             :     UINT64_C(0),
    2028             :     UINT64_C(0),
    2029             :     UINT64_C(0),
    2030             :     UINT64_C(0),
    2031             :     UINT64_C(0),
    2032             :     UINT64_C(0),
    2033             :     UINT64_C(0),
    2034             :     UINT64_C(0),
    2035             :     UINT64_C(2080376080),       // RADDU_W_QB
    2036             :     UINT64_C(61756),    // RADDU_W_QB_MM
    2037             :     UINT64_C(2080375992),       // RDDSP
    2038             :     UINT64_C(1660),     // RDDSP_MM
    2039             :     UINT64_C(2080374843),       // RDHWR
    2040             :     UINT64_C(2080374843),       // RDHWR64
    2041             :     UINT64_C(27452),    // RDHWR_MM
    2042             :     UINT64_C(448),      // RDHWR_MMR6
    2043             :     UINT64_C(57724),    // RDPGPR_MMR6
    2044             :     UINT64_C(1176502293),       // RECIP_D32
    2045             :     UINT64_C(1409307195),       // RECIP_D32_MM
    2046             :     UINT64_C(1176502293),       // RECIP_D64
    2047             :     UINT64_C(1409307195),       // RECIP_D64_MM
    2048             :     UINT64_C(1174405141),       // RECIP_S
    2049             :     UINT64_C(1409290811),       // RECIP_S_MM
    2050             :     UINT64_C(2080375506),       // REPLV_PH
    2051             :     UINT64_C(828),      // REPLV_PH_MM
    2052             :     UINT64_C(2080374994),       // REPLV_QB
    2053             :     UINT64_C(4924),     // REPLV_QB_MM
    2054             :     UINT64_C(2080375442),       // REPL_PH
    2055             :     UINT64_C(61),       // REPL_PH_MM
    2056             :     UINT64_C(2080374930),       // REPL_QB
    2057             :     UINT64_C(1532),     // REPL_QB_MM
    2058             :     UINT64_C(1176502298),       // RINT_D
    2059             :     UINT64_C(1409286688),       // RINT_D_MMR6
    2060             :     UINT64_C(1174405146),       // RINT_S
    2061             :     UINT64_C(1409286176),       // RINT_S_MMR6
    2062             :     UINT64_C(0),
    2063             :     UINT64_C(0),
    2064             :     UINT64_C(0),
    2065             :     UINT64_C(0),
    2066             :     UINT64_C(2097154),  // ROTR
    2067             :     UINT64_C(70),       // ROTRV
    2068             :     UINT64_C(208),      // ROTRV_MM
    2069             :     UINT64_C(192),      // ROTR_MM
    2070             :     UINT64_C(1176502280),       // ROUND_L_D64
    2071             :     UINT64_C(1409315643),       // ROUND_L_D_MMR6
    2072             :     UINT64_C(1174405128),       // ROUND_L_S
    2073             :     UINT64_C(1409299259),       // ROUND_L_S_MMR6
    2074             :     UINT64_C(1176502284),       // ROUND_W_D32
    2075             :     UINT64_C(1176502284),       // ROUND_W_D64
    2076             :     UINT64_C(1409317691),       // ROUND_W_D_MMR6
    2077             :     UINT64_C(1409317691),       // ROUND_W_MM
    2078             :     UINT64_C(1174405132),       // ROUND_W_S
    2079             :     UINT64_C(1409301307),       // ROUND_W_S_MM
    2080             :     UINT64_C(1409301307),       // ROUND_W_S_MMR6
    2081             :     UINT64_C(1176502294),       // RSQRT_D32
    2082             :     UINT64_C(1409303099),       // RSQRT_D32_MM
    2083             :     UINT64_C(1176502294),       // RSQRT_D64
    2084             :     UINT64_C(1409303099),       // RSQRT_D64_MM
    2085             :     UINT64_C(1174405142),       // RSQRT_S
    2086             :     UINT64_C(1409286715),       // RSQRT_S_MM
    2087             :     UINT64_C(25728),    // Restore16
    2088             :     UINT64_C(25728),    // RestoreX16
    2089             :     UINT64_C(0),
    2090             :     UINT64_C(0),
    2091             :     UINT64_C(2020605962),       // SAT_S_B
    2092             :     UINT64_C(2013265930),       // SAT_S_D
    2093             :     UINT64_C(2019557386),       // SAT_S_H
    2094             :     UINT64_C(2017460234),       // SAT_S_W
    2095             :     UINT64_C(2028994570),       // SAT_U_B
    2096             :     UINT64_C(2021654538),       // SAT_U_D
    2097             :     UINT64_C(2027945994),       // SAT_U_H
    2098             :     UINT64_C(2025848842),       // SAT_U_W
    2099             :     UINT64_C(2684354560),       // SB
    2100             :     UINT64_C(34816),    // SB16_MM
    2101             :     UINT64_C(34816),    // SB16_MMR6
    2102             :     UINT64_C(2684354560),       // SB64
    2103             :     UINT64_C(2080374812),       // SBE
    2104             :     UINT64_C(1610655744),       // SBE_MM
    2105             :     UINT64_C(402653184),        // SB_MM
    2106             :     UINT64_C(402653184),        // SB_MMR6
    2107             :     UINT64_C(3758096384),       // SC
    2108             :     UINT64_C(3758096384),       // SC64
    2109             :     UINT64_C(2080374822),       // SC64_R6
    2110             :     UINT64_C(4026531840),       // SCD
    2111             :     UINT64_C(2080374823),       // SCD_R6
    2112             :     UINT64_C(2080374814),       // SCE
    2113             :     UINT64_C(1610656768),       // SCE_MM
    2114             :     UINT64_C(1610657792),       // SC_MM
    2115             :     UINT64_C(2080374822),       // SC_R6
    2116             :     UINT64_C(4227858432),       // SD
    2117             :     UINT64_C(1879048255),       // SDBBP
    2118             :     UINT64_C(18112),    // SDBBP16_MM
    2119             :     UINT64_C(17467),    // SDBBP16_MMR6
    2120             :     UINT64_C(56188),    // SDBBP_MM
    2121             :     UINT64_C(56188),    // SDBBP_MMR6
    2122             :     UINT64_C(14),       // SDBBP_R6
    2123             :     UINT64_C(4093640704),       // SDC1
    2124             :     UINT64_C(4093640704),       // SDC164
    2125             :     UINT64_C(3087007744),       // SDC1_D64_MMR6
    2126             :     UINT64_C(3087007744),       // SDC1_MM
    2127             :     UINT64_C(4160749568),       // SDC2
    2128             :     UINT64_C(536911872),        // SDC2_MMR6
    2129             :     UINT64_C(1239416832),       // SDC2_R6
    2130             :     UINT64_C(4227858432),       // SDC3
    2131             :     UINT64_C(26),       // SDIV
    2132             :     UINT64_C(43836),    // SDIV_MM
    2133             :     UINT64_C(0),
    2134             :     UINT64_C(2952790016),       // SDL
    2135             :     UINT64_C(0),
    2136             :     UINT64_C(3019898880),       // SDR
    2137             :     UINT64_C(1275068425),       // SDXC1
    2138             :     UINT64_C(1275068425),       // SDXC164
    2139             :     UINT64_C(0),
    2140             :     UINT64_C(0),
    2141             :     UINT64_C(2080375840),       // SEB
    2142             :     UINT64_C(2080375840),       // SEB64
    2143             :     UINT64_C(11068),    // SEB_MM
    2144             :     UINT64_C(2080376352),       // SEH
    2145             :     UINT64_C(2080376352),       // SEH64
    2146             :     UINT64_C(15164),    // SEH_MM
    2147             :     UINT64_C(53),       // SELEQZ
    2148             :     UINT64_C(53),       // SELEQZ64
    2149             :     UINT64_C(1176502292),       // SELEQZ_D
    2150             :     UINT64_C(1409286712),       // SELEQZ_D_MMR6
    2151             :     UINT64_C(320),      // SELEQZ_MMR6
    2152             :     UINT64_C(1174405140),       // SELEQZ_S
    2153             :     UINT64_C(1409286200),       // SELEQZ_S_MMR6
    2154             :     UINT64_C(55),       // SELNEZ
    2155             :     UINT64_C(55),       // SELNEZ64
    2156             :     UINT64_C(1176502295),       // SELNEZ_D
    2157             :     UINT64_C(1409286776),       // SELNEZ_D_MMR6
    2158             :     UINT64_C(384),      // SELNEZ_MMR6
    2159             :     UINT64_C(1174405143),       // SELNEZ_S
    2160             :     UINT64_C(1409286264),       // SELNEZ_S_MMR6
    2161             :     UINT64_C(1176502288),       // SEL_D
    2162             :     UINT64_C(1409286840),       // SEL_D_MMR6
    2163             :     UINT64_C(1174405136),       // SEL_S
    2164             :     UINT64_C(1409286328),       // SEL_S_MMR6
    2165             :     UINT64_C(1879048234),       // SEQ
    2166             :     UINT64_C(0),
    2167             :     UINT64_C(0),
    2168             :     UINT64_C(1879048238),       // SEQi
    2169             :     UINT64_C(2751463424),       // SH
    2170             :     UINT64_C(43008),    // SH16_MM
    2171             :     UINT64_C(43008),    // SH16_MMR6
    2172             :     UINT64_C(2751463424),       // SH64
    2173             :     UINT64_C(2080374813),       // SHE
    2174             :     UINT64_C(1610656256),       // SHE_MM
    2175             :     UINT64_C(2013265922),       // SHF_B
    2176             :     UINT64_C(2030043138),       // SHF_H
    2177             :     UINT64_C(2046820354),       // SHF_W
    2178             :     UINT64_C(2080376504),       // SHILO
    2179             :     UINT64_C(2080376568),       // SHILOV
    2180             :     UINT64_C(4732),     // SHILOV_MM
    2181             :     UINT64_C(29),       // SHILO_MM
    2182             :     UINT64_C(2080375443),       // SHLLV_PH
    2183             :     UINT64_C(14),       // SHLLV_PH_MM
    2184             :     UINT64_C(2080374931),       // SHLLV_QB
    2185             :     UINT64_C(917),      // SHLLV_QB_MM
    2186             :     UINT64_C(2080375699),       // SHLLV_S_PH
    2187             :     UINT64_C(1038),     // SHLLV_S_PH_MM
    2188             :     UINT64_C(2080376211),       // SHLLV_S_W
    2189             :     UINT64_C(981),      // SHLLV_S_W_MM
    2190             :     UINT64_C(2080375315),       // SHLL_PH
    2191             :     UINT64_C(949),      // SHLL_PH_MM
    2192             :     UINT64_C(2080374803),       // SHLL_QB
    2193             :     UINT64_C(2172),     // SHLL_QB_MM
    2194             :     UINT64_C(2080375571),       // SHLL_S_PH
    2195             :     UINT64_C(2997),     // SHLL_S_PH_MM
    2196             :     UINT64_C(2080376083),       // SHLL_S_W
    2197             :     UINT64_C(1013),     // SHLL_S_W_MM
    2198             :     UINT64_C(2080375507),       // SHRAV_PH
    2199             :     UINT64_C(397),      // SHRAV_PH_MM
    2200             :     UINT64_C(2080375187),       // SHRAV_QB
    2201             :     UINT64_C(461),      // SHRAV_QB_MMR2
    2202             :     UINT64_C(2080375763),       // SHRAV_R_PH
    2203             :     UINT64_C(1421),     // SHRAV_R_PH_MM
    2204             :     UINT64_C(2080375251),       // SHRAV_R_QB
    2205             :     UINT64_C(1485),     // SHRAV_R_QB_MMR2
    2206             :     UINT64_C(2080376275),       // SHRAV_R_W
    2207             :     UINT64_C(725),      // SHRAV_R_W_MM
    2208             :     UINT64_C(2080375379),       // SHRA_PH
    2209             :     UINT64_C(821),      // SHRA_PH_MM
    2210             :     UINT64_C(2080375059),       // SHRA_QB
    2211             :     UINT64_C(508),      // SHRA_QB_MMR2
    2212             :     UINT64_C(2080375635),       // SHRA_R_PH
    2213             :     UINT64_C(1845),     // SHRA_R_PH_MM
    2214             :     UINT64_C(2080375123),       // SHRA_R_QB
    2215             :     UINT64_C(4604),     // SHRA_R_QB_MMR2
    2216             :     UINT64_C(2080376147),       // SHRA_R_W
    2217             :     UINT64_C(757),      // SHRA_R_W_MM
    2218             :     UINT64_C(2080376531),       // SHRLV_PH
    2219             :     UINT64_C(789),      // SHRLV_PH_MMR2
    2220             :     UINT64_C(2080374995),       // SHRLV_QB
    2221             :     UINT64_C(853),      // SHRLV_QB_MM
    2222             :     UINT64_C(2080376403),       // SHRL_PH
    2223             :     UINT64_C(1020),     // SHRL_PH_MMR2
    2224             :     UINT64_C(2080374867),       // SHRL_QB
    2225             :     UINT64_C(6268),     // SHRL_QB_MM
    2226             :     UINT64_C(939524096),        // SH_MM
    2227             :     UINT64_C(939524096),        // SH_MMR6
    2228             :     UINT64_C(2013265945),       // SLDI_B
    2229             :     UINT64_C(2016935961),       // SLDI_D
    2230             :     UINT64_C(2015363097),       // SLDI_H
    2231             :     UINT64_C(2016411673),       // SLDI_W
    2232             :     UINT64_C(2013265940),       // SLD_B
    2233             :     UINT64_C(2019557396),       // SLD_D
    2234             :     UINT64_C(2015363092),       // SLD_H
    2235             :     UINT64_C(2017460244),       // SLD_W
    2236             :     UINT64_C(0),        // SLL
    2237             :     UINT64_C(9216),     // SLL16_MM
    2238             :     UINT64_C(9216),     // SLL16_MMR6
    2239             :     UINT64_C(0),        // SLL64_32
    2240             :     UINT64_C(0),        // SLL64_64
    2241             :     UINT64_C(2020605961),       // SLLI_B
    2242             :     UINT64_C(2013265929),       // SLLI_D
    2243             :     UINT64_C(2019557385),       // SLLI_H
    2244             :     UINT64_C(2017460233),       // SLLI_W
    2245             :     UINT64_C(4),        // SLLV
    2246             :     UINT64_C(16),       // SLLV_MM
    2247             :     UINT64_C(2013265933),       // SLL_B
    2248             :     UINT64_C(2019557389),       // SLL_D
    2249             :     UINT64_C(2015363085),       // SLL_H
    2250             :     UINT64_C(0),        // SLL_MM
    2251             :     UINT64_C(0),        // SLL_MMR6
    2252             :     UINT64_C(2017460237),       // SLL_W
    2253             :     UINT64_C(42),       // SLT
    2254             :     UINT64_C(42),       // SLT64
    2255             :     UINT64_C(0),
    2256             :     UINT64_C(0),
    2257             :     UINT64_C(848),      // SLT_MM
    2258             :     UINT64_C(671088640),        // SLTi
    2259             :     UINT64_C(671088640),        // SLTi64
    2260             :     UINT64_C(2415919104),       // SLTi_MM
    2261             :     UINT64_C(738197504),        // SLTiu
    2262             :     UINT64_C(738197504),        // SLTiu64
    2263             :     UINT64_C(2952790016),       // SLTiu_MM
    2264             :     UINT64_C(43),       // SLTu
    2265             :     UINT64_C(43),       // SLTu64
    2266             :     UINT64_C(912),      // SLTu_MM
    2267             :     UINT64_C(1879048235),       // SNE
    2268             :     UINT64_C(1879048239),       // SNEi
    2269             :     UINT64_C(0),
    2270             :     UINT64_C(0),
    2271             :     UINT64_C(0),
    2272             :     UINT64_C(0),
    2273             :     UINT64_C(0),
    2274             :     UINT64_C(2017460249),       // SPLATI_B
    2275             :     UINT64_C(2021130265),       // SPLATI_D
    2276             :     UINT64_C(2019557401),       // SPLATI_H
    2277             :     UINT64_C(2020605977),       // SPLATI_W
    2278             :     UINT64_C(2021654548),       // SPLAT_B
    2279             :     UINT64_C(2027946004),       // SPLAT_D
    2280             :     UINT64_C(2023751700),       // SPLAT_H
    2281             :     UINT64_C(2025848852),       // SPLAT_W
    2282             :     UINT64_C(3),        // SRA
    2283             :     UINT64_C(2028994569),       // SRAI_B
    2284             :     UINT64_C(2021654537),       // SRAI_D
    2285             :     UINT64_C(2027945993),       // SRAI_H
    2286             :     UINT64_C(2025848841),       // SRAI_W
    2287             :     UINT64_C(2037383178),       // SRARI_B
    2288             :     UINT64_C(2030043146),       // SRARI_D
    2289             :     UINT64_C(2036334602),       // SRARI_H
    2290             :     UINT64_C(2034237450),       // SRARI_W
    2291             :     UINT64_C(2021654549),       // SRAR_B
    2292             :     UINT64_C(2027946005),       // SRAR_D
    2293             :     UINT64_C(2023751701),       // SRAR_H
    2294             :     UINT64_C(2025848853),       // SRAR_W
    2295             :     UINT64_C(7),        // SRAV
    2296             :     UINT64_C(144),      // SRAV_MM
    2297             :     UINT64_C(2021654541),       // SRA_B
    2298             :     UINT64_C(2027945997),       // SRA_D
    2299             :     UINT64_C(2023751693),       // SRA_H
    2300             :     UINT64_C(128),      // SRA_MM
    2301             :     UINT64_C(2025848845),       // SRA_W
    2302             :     UINT64_C(2),        // SRL
    2303             :     UINT64_C(9217),     // SRL16_MM
    2304             :     UINT64_C(9217),     // SRL16_MMR6
    2305             :     UINT64_C(2037383177),       // SRLI_B
    2306             :     UINT64_C(2030043145),       // SRLI_D
    2307             :     UINT64_C(2036334601),       // SRLI_H
    2308             :     UINT64_C(2034237449),       // SRLI_W
    2309             :     UINT64_C(2045771786),       // SRLRI_B
    2310             :     UINT64_C(2038431754),       // SRLRI_D
    2311             :     UINT64_C(2044723210),       // SRLRI_H
    2312             :     UINT64_C(2042626058),       // SRLRI_W
    2313             :     UINT64_C(2030043157),       // SRLR_B
    2314             :     UINT64_C(2036334613),       // SRLR_D
    2315             :     UINT64_C(2032140309),       // SRLR_H
    2316             :     UINT64_C(2034237461),       // SRLR_W
    2317             :     UINT64_C(6),        // SRLV
    2318             :     UINT64_C(80),       // SRLV_MM
    2319             :     UINT64_C(2030043149),       // SRL_B
    2320             :     UINT64_C(2036334605),       // SRL_D
    2321             :     UINT64_C(2032140301),       // SRL_H
    2322             :     UINT64_C(64),       // SRL_MM
    2323             :     UINT64_C(2034237453),       // SRL_W
    2324             :     UINT64_C(64),       // SSNOP
    2325             :     UINT64_C(2048),     // SSNOP_MM
    2326             :     UINT64_C(2048),     // SSNOP_MMR6
    2327             :     UINT64_C(0),
    2328             :     UINT64_C(0),
    2329             :     UINT64_C(0),
    2330             :     UINT64_C(0),
    2331             :     UINT64_C(2013265956),       // ST_B
    2332             :     UINT64_C(2013265959),       // ST_D
    2333             :     UINT64_C(0),
    2334             :     UINT64_C(2013265957),       // ST_H
    2335             :     UINT64_C(2013265958),       // ST_W
    2336             :     UINT64_C(34),       // SUB
    2337             :     UINT64_C(2080375384),       // SUBQH_PH
    2338             :     UINT64_C(589),      // SUBQH_PH_MMR2
    2339             :     UINT64_C(2080375512),       // SUBQH_R_PH
    2340             :     UINT64_C(1613),     // SUBQH_R_PH_MMR2
    2341             :     UINT64_C(2080376024),       // SUBQH_R_W
    2342             :     UINT64_C(1677),     // SUBQH_R_W_MMR2
    2343             :     UINT64_C(2080375896),       // SUBQH_W
    2344             :     UINT64_C(653),      // SUBQH_W_MMR2
    2345             :     UINT64_C(2080375504),       // SUBQ_PH
    2346             :     UINT64_C(525),      // SUBQ_PH_MM
    2347             :     UINT64_C(2080375760),       // SUBQ_S_PH
    2348             :     UINT64_C(1549),     // SUBQ_S_PH_MM
    2349             :     UINT64_C(2080376272),       // SUBQ_S_W
    2350             :     UINT64_C(837),      // SUBQ_S_W_MM
    2351             :     UINT64_C(2030043153),       // SUBSUS_U_B
    2352             :     UINT64_C(2036334609),       // SUBSUS_U_D
    2353             :     UINT64_C(2032140305),       // SUBSUS_U_H
    2354             :     UINT64_C(2034237457),       // SUBSUS_U_W
    2355             :     UINT64_C(2038431761),       // SUBSUU_S_B
    2356             :     UINT64_C(2044723217),       // SUBSUU_S_D
    2357             :     UINT64_C(2040528913),       // SUBSUU_S_H
    2358             :     UINT64_C(2042626065),       // SUBSUU_S_W
    2359             :     UINT64_C(2013265937),       // SUBS_S_B
    2360             :     UINT64_C(2019557393),       // SUBS_S_D
    2361             :     UINT64_C(2015363089),       // SUBS_S_H
    2362             :     UINT64_C(2017460241),       // SUBS_S_W
    2363             :     UINT64_C(2021654545),       // SUBS_U_B
    2364             :     UINT64_C(2027946001),       // SUBS_U_D
    2365             :     UINT64_C(2023751697),       // SUBS_U_H
    2366             :     UINT64_C(2025848849),       // SUBS_U_W
    2367             :     UINT64_C(1025),     // SUBU16_MM
    2368             :     UINT64_C(1025),     // SUBU16_MMR6
    2369             :     UINT64_C(2080374872),       // SUBUH_QB
    2370             :     UINT64_C(845),      // SUBUH_QB_MMR2
    2371             :     UINT64_C(2080375000),       // SUBUH_R_QB
    2372             :     UINT64_C(1869),     // SUBUH_R_QB_MMR2
    2373             :     UINT64_C(464),      // SUBU_MMR6
    2374             :     UINT64_C(2080375376),       // SUBU_PH
    2375             :     UINT64_C(781),      // SUBU_PH_MMR2
    2376             :     UINT64_C(2080374864),       // SUBU_QB
    2377             :     UINT64_C(717),      // SUBU_QB_MM
    2378             :     UINT64_C(2080375632),       // SUBU_S_PH
    2379             :     UINT64_C(1805),     // SUBU_S_PH_MMR2
    2380             :     UINT64_C(2080375120),       // SUBU_S_QB
    2381             :     UINT64_C(1741),     // SUBU_S_QB_MM
    2382             :     UINT64_C(2021654534),       // SUBVI_B
    2383             :     UINT64_C(2027945990),       // SUBVI_D
    2384             :     UINT64_C(2023751686),       // SUBVI_H
    2385             :     UINT64_C(2025848838),       // SUBVI_W
    2386             :     UINT64_C(2021654542),       // SUBV_B
    2387             :     UINT64_C(2027945998),       // SUBV_D
    2388             :     UINT64_C(2023751694),       // SUBV_H
    2389             :     UINT64_C(2025848846),       // SUBV_W
    2390             :     UINT64_C(400),      // SUB_MM
    2391             :     UINT64_C(400),      // SUB_MMR6
    2392             :     UINT64_C(35),       // SUBu
    2393             :     UINT64_C(464),      // SUBu_MM
    2394             :     UINT64_C(1275068429),       // SUXC1
    2395             :     UINT64_C(1275068429),       // SUXC164
    2396             :     UINT64_C(1409286536),       // SUXC1_MM
    2397             :     UINT64_C(2885681152),       // SW
    2398             :     UINT64_C(59392),    // SW16_MM
    2399             :     UINT64_C(59392),    // SW16_MMR6
    2400             :     UINT64_C(2885681152),       // SW64
    2401             :     UINT64_C(3825205248),       // SWC1
    2402             :     UINT64_C(2550136832),       // SWC1_MM
    2403             :     UINT64_C(3892314112),       // SWC2
    2404             :     UINT64_C(536903680),        // SWC2_MMR6
    2405             :     UINT64_C(1231028224),       // SWC2_R6
    2406             :     UINT64_C(3959422976),       // SWC3
    2407             :     UINT64_C(2885681152),       // SWDSP
    2408             :     UINT64_C(4160749568),       // SWDSP_MM
    2409             :     UINT64_C(2080374815),       // SWE
    2410             :     UINT64_C(1610657280),       // SWE_MM
    2411             :     UINT64_C(2818572288),       // SWL
    2412             :     UINT64_C(2818572288),       // SWL64
    2413             :     UINT64_C(2080374817),       // SWLE
    2414             :     UINT64_C(1610653696),       // SWLE_MM
    2415             :     UINT64_C(1610645504),       // SWL_MM
    2416             :     UINT64_C(17728),    // SWM16_MM
    2417             :     UINT64_C(17418),    // SWM16_MMR6
    2418             :     UINT64_C(536924160),        // SWM32_MM
    2419             :     UINT64_C(0),
    2420             :     UINT64_C(536907776),        // SWP_MM
    2421             :     UINT64_C(536907776),        // SWP_MMR6
    2422             :     UINT64_C(3087007744),       // SWR
    2423             :     UINT64_C(3087007744),       // SWR64
    2424             :     UINT64_C(2080374818),       // SWRE
    2425             :     UINT64_C(1610654208),       // SWRE_MM
    2426             :     UINT64_C(1610649600),       // SWR_MM
    2427             :     UINT64_C(51200),    // SWSP_MM
    2428             :     UINT64_C(51200),    // SWSP_MMR6
    2429             :     UINT64_C(1275068424),       // SWXC1
    2430             :     UINT64_C(1409286280),       // SWXC1_MM
    2431             :     UINT64_C(4160749568),       // SW_MM
    2432             :     UINT64_C(4160749568),       // SW_MMR6
    2433             :     UINT64_C(15),       // SYNC
    2434             :     UINT64_C(69140480), // SYNCI
    2435             :     UINT64_C(1107296256),       // SYNCI_MM
    2436             :     UINT64_C(1098907648),       // SYNCI_MMR6
    2437             :     UINT64_C(27516),    // SYNC_MM
    2438             :     UINT64_C(27516),    // SYNC_MMR6
    2439             :     UINT64_C(12),       // SYSCALL
    2440             :     UINT64_C(35708),    // SYSCALL_MM
    2441             :     UINT64_C(0),
    2442             :     UINT64_C(0),
    2443             :     UINT64_C(0),
    2444             :     UINT64_C(0),
    2445             :     UINT64_C(0),
    2446             :     UINT64_C(25728),    // Save16
    2447             :     UINT64_C(25728),    // SaveX16
    2448             :     UINT64_C(4026580992),       // SbRxRyOffMemX16
    2449             :     UINT64_C(59537),    // SebRx16
    2450             :     UINT64_C(59569),    // SehRx16
    2451             :     UINT64_C(0),
    2452             :     UINT64_C(0),
    2453             :     UINT64_C(0),
    2454             :     UINT64_C(0),
    2455             :     UINT64_C(0),
    2456             :     UINT64_C(0),
    2457             :     UINT64_C(0),
    2458             :     UINT64_C(0),
    2459             :     UINT64_C(0),
    2460             :     UINT64_C(0),
    2461             :     UINT64_C(0),
    2462             :     UINT64_C(0),
    2463             :     UINT64_C(0),
    2464             :     UINT64_C(0),
    2465             :     UINT64_C(4026583040),       // ShRxRyOffMemX16
    2466             :     UINT64_C(4026544128),       // SllX16
    2467             :     UINT64_C(59396),    // SllvRxRy16
    2468             :     UINT64_C(0),
    2469             :     UINT64_C(59394),    // SltRxRy16
    2470             :     UINT64_C(0),
    2471             :     UINT64_C(20480),    // SltiRxImm16
    2472             :     UINT64_C(4026552320),       // SltiRxImmX16
    2473             :     UINT64_C(0),
    2474             :     UINT64_C(22528),    // SltiuRxImm16
    2475             :     UINT64_C(4026554368),       // SltiuRxImmX16
    2476             :     UINT64_C(0),
    2477             :     UINT64_C(59395),    // SltuRxRy16
    2478             :     UINT64_C(0),
    2479             :     UINT64_C(4026544131),       // SraX16
    2480             :     UINT64_C(59399),    // SravRxRy16
    2481             :     UINT64_C(4026544130),       // SrlX16
    2482             :     UINT64_C(59398),    // SrlvRxRy16
    2483             :     UINT64_C(57347),    // SubuRxRyRz16
    2484             :     UINT64_C(4026587136),       // SwRxRyOffMemX16
    2485             :     UINT64_C(4026585088),       // SwRxSpImmX16
    2486             :     UINT64_C(0),
    2487             :     UINT64_C(0),
    2488             :     UINT64_C(0),
    2489             :     UINT64_C(0),
    2490             :     UINT64_C(0),
    2491             :     UINT64_C(0),
    2492             :     UINT64_C(0),
    2493             :     UINT64_C(0),
    2494             :     UINT64_C(0),
    2495             :     UINT64_C(0),
    2496             :     UINT64_C(0),
    2497             :     UINT64_C(0),
    2498             :     UINT64_C(0),
    2499             :     UINT64_C(52),       // TEQ
    2500             :     UINT64_C(67895296), // TEQI
    2501             :     UINT64_C(1103101952),       // TEQI_MM
    2502             :     UINT64_C(60),       // TEQ_MM
    2503             :     UINT64_C(48),       // TGE
    2504             :     UINT64_C(67633152), // TGEI
    2505             :     UINT64_C(67698688), // TGEIU
    2506             :     UINT64_C(1096810496),       // TGEIU_MM
    2507             :     UINT64_C(1092616192),       // TGEI_MM
    2508             :     UINT64_C(49),       // TGEU
    2509             :     UINT64_C(1084),     // TGEU_MM
    2510             :     UINT64_C(572),      // TGE_MM
    2511             :     UINT64_C(1107296267),       // TLBGINV
    2512             :     UINT64_C(1107296268),       // TLBGINVF
    2513             :     UINT64_C(20860),    // TLBGINVF_MM
    2514             :     UINT64_C(16764),    // TLBGINV_MM
    2515             :     UINT64_C(1107296272),       // TLBGP
    2516             :     UINT64_C(380),      // TLBGP_MM
    2517             :     UINT64_C(1107296265),       // TLBGR
    2518             :     UINT64_C(4476),     // TLBGR_MM
    2519             :     UINT64_C(1107296266),       // TLBGWI
    2520             :     UINT64_C(8572),     // TLBGWI_MM
    2521             :     UINT64_C(1107296270),       // TLBGWR
    2522             :     UINT64_C(12668),    // TLBGWR_MM
    2523             :     UINT64_C(1107296259),       // TLBINV
    2524             :     UINT64_C(1107296260),       // TLBINVF
    2525             :     UINT64_C(21372),    // TLBINVF_MMR6
    2526             :     UINT64_C(17276),    // TLBINV_MMR6
    2527             :     UINT64_C(1107296264),       // TLBP
    2528             :     UINT64_C(892),      // TLBP_MM
    2529             :     UINT64_C(1107296257),       // TLBR
    2530             :     UINT64_C(4988),     // TLBR_MM
    2531             :     UINT64_C(1107296258),       // TLBWI
    2532             :     UINT64_C(9084),     // TLBWI_MM
    2533             :     UINT64_C(1107296262),       // TLBWR
    2534             :     UINT64_C(13180),    // TLBWR_MM
    2535             :     UINT64_C(50),       // TLT
    2536             :     UINT64_C(67764224), // TLTI
    2537             :     UINT64_C(1094713344),       // TLTIU_MM
    2538             :     UINT64_C(1090519040),       // TLTI_MM
    2539             :     UINT64_C(51),       // TLTU
    2540             :     UINT64_C(2620),     // TLTU_MM
    2541             :     UINT64_C(2108),     // TLT_MM
    2542             :     UINT64_C(54),       // TNE
    2543             :     UINT64_C(68026368), // TNEI
    2544             :     UINT64_C(1098907648),       // TNEI_MM
    2545             :     UINT64_C(3132),     // TNE_MM
    2546             :     UINT64_C(0),
    2547             :     UINT64_C(1176502281),       // TRUNC_L_D64
    2548             :     UINT64_C(1409311547),       // TRUNC_L_D_MMR6
    2549             :     UINT64_C(1174405129),       // TRUNC_L_S
    2550             :     UINT64_C(1409295163),       // TRUNC_L_S_MMR6
    2551             :     UINT64_C(1176502285),       // TRUNC_W_D32
    2552             :     UINT64_C(1176502285),       // TRUNC_W_D64
    2553             :     UINT64_C(1409313595),       // TRUNC_W_D_MMR6
    2554             :     UINT64_C(1409313595),       // TRUNC_W_MM
    2555             :     UINT64_C(1174405133),       // TRUNC_W_S
    2556             :     UINT64_C(1409297211),       // TRUNC_W_S_MM
    2557             :     UINT64_C(1409297211),       // TRUNC_W_S_MMR6
    2558             :     UINT64_C(67829760), // TTLTIU
    2559             :     UINT64_C(27),       // UDIV
    2560             :     UINT64_C(47932),    // UDIV_MM
    2561             :     UINT64_C(0),
    2562             :     UINT64_C(0),
    2563             :     UINT64_C(0),
    2564             :     UINT64_C(0),
    2565             :     UINT64_C(0),
    2566             :     UINT64_C(0),
    2567             :     UINT64_C(0),
    2568             :     UINT64_C(0),
    2569             :     UINT64_C(1879048209),       // V3MULU
    2570             :     UINT64_C(1879048208),       // VMM0
    2571             :     UINT64_C(1879048207),       // VMULU
    2572             :     UINT64_C(2013265941),       // VSHF_B
    2573             :     UINT64_C(2019557397),       // VSHF_D
    2574             :     UINT64_C(2015363093),       // VSHF_H
    2575             :     UINT64_C(2017460245),       // VSHF_W
    2576             :     UINT64_C(1107296288),       // WAIT
    2577             :     UINT64_C(37756),    // WAIT_MM
    2578             :     UINT64_C(37756),    // WAIT_MMR6
    2579             :     UINT64_C(2080376056),       // WRDSP
    2580             :     UINT64_C(5756),     // WRDSP_MM
    2581             :     UINT64_C(61820),    // WRPGPR_MMR6
    2582             :     UINT64_C(2080374944),       // WSBH
    2583             :     UINT64_C(31548),    // WSBH_MM
    2584             :     UINT64_C(31548),    // WSBH_MMR6
    2585             :     UINT64_C(38),       // XOR
    2586             :     UINT64_C(17472),    // XOR16_MM
    2587             :     UINT64_C(17416),    // XOR16_MMR6
    2588             :     UINT64_C(38),       // XOR64
    2589             :     UINT64_C(2063597568),       // XORI_B
    2590             :     UINT64_C(1879048192),       // XORI_MMR6
    2591             :     UINT64_C(784),      // XOR_MM
    2592             :     UINT64_C(784),      // XOR_MMR6
    2593             :     UINT64_C(2019557406),       // XOR_V
    2594             :     UINT64_C(0),
    2595             :     UINT64_C(0),
    2596             :     UINT64_C(0),
    2597             :     UINT64_C(939524096),        // XORi
    2598             :     UINT64_C(939524096),        // XORi64
    2599             :     UINT64_C(1879048192),       // XORi_MM
    2600             :     UINT64_C(59406),    // XorRxRxRy16
    2601             :     UINT64_C(2080374793),       // YIELD
    2602             :     UINT64_C(0)
    2603             :   };
    2604       41726 :   const unsigned opcode = MI.getOpcode();
    2605       41726 :   uint64_t Value = InstBits[opcode];
    2606             :   uint64_t op = 0;
    2607             :   (void)op;  // suppress warning
    2608       41726 :   switch (opcode) {
    2609             :     case Mips::Break16:
    2610             :     case Mips::DERET:
    2611             :     case Mips::DERET_MM:
    2612             :     case Mips::DERET_MMR6:
    2613             :     case Mips::EHB:
    2614             :     case Mips::EHB_MM:
    2615             :     case Mips::EHB_MMR6:
    2616             :     case Mips::ERET:
    2617             :     case Mips::ERETNC:
    2618             :     case Mips::ERETNC_MMR6:
    2619             :     case Mips::ERET_MM:
    2620             :     case Mips::ERET_MMR6:
    2621             :     case Mips::JrRa16:
    2622             :     case Mips::JrcRa16:
    2623             :     case Mips::PAUSE:
    2624             :     case Mips::PAUSE_MM:
    2625             :     case Mips::PAUSE_MMR6:
    2626             :     case Mips::Restore16:
    2627             :     case Mips::RestoreX16:
    2628             :     case Mips::SSNOP:
    2629             :     case Mips::SSNOP_MM:
    2630             :     case Mips::SSNOP_MMR6:
    2631             :     case Mips::Save16:
    2632             :     case Mips::SaveX16:
    2633             :     case Mips::TLBGINV:
    2634             :     case Mips::TLBGINVF:
    2635             :     case Mips::TLBGINVF_MM:
    2636             :     case Mips::TLBGINV_MM:
    2637             :     case Mips::TLBGP:
    2638             :     case Mips::TLBGP_MM:
    2639             :     case Mips::TLBGR:
    2640             :     case Mips::TLBGR_MM:
    2641             :     case Mips::TLBGWI:
    2642             :     case Mips::TLBGWI_MM:
    2643             :     case Mips::TLBGWR:
    2644             :     case Mips::TLBGWR_MM:
    2645             :     case Mips::TLBINV:
    2646             :     case Mips::TLBINVF:
    2647             :     case Mips::TLBINVF_MMR6:
    2648             :     case Mips::TLBINV_MMR6:
    2649             :     case Mips::TLBP:
    2650             :     case Mips::TLBP_MM:
    2651             :     case Mips::TLBR:
    2652             :     case Mips::TLBR_MM:
    2653             :     case Mips::TLBWI:
    2654             :     case Mips::TLBWI_MM:
    2655             :     case Mips::TLBWR:
    2656             :     case Mips::TLBWR_MM:
    2657             :     case Mips::WAIT: {
    2658             :       break;
    2659             :     }
    2660             :     case Mips::MTHLIP:
    2661             :     case Mips::SHILOV: {
    2662             :       // op: ac
    2663           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2664           4 :       Value |= (op & UINT64_C(3)) << 11;
    2665             :       // op: rs
    2666           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    2667           4 :       Value |= (op & UINT64_C(31)) << 21;
    2668           4 :       break;
    2669             :     }
    2670             :     case Mips::DPAQX_SA_W_PH:
    2671             :     case Mips::DPAQX_S_W_PH:
    2672             :     case Mips::DPAQ_SA_L_W:
    2673             :     case Mips::DPAQ_S_W_PH:
    2674             :     case Mips::DPAU_H_QBL:
    2675             :     case Mips::DPAU_H_QBR:
    2676             :     case Mips::DPAX_W_PH:
    2677             :     case Mips::DPA_W_PH:
    2678             :     case Mips::DPSQX_SA_W_PH:
    2679             :     case Mips::DPSQX_S_W_PH:
    2680             :     case Mips::DPSQ_SA_L_W:
    2681             :     case Mips::DPSQ_S_W_PH:
    2682             :     case Mips::DPSU_H_QBL:
    2683             :     case Mips::DPSU_H_QBR:
    2684             :     case Mips::DPSX_W_PH:
    2685             :     case Mips::DPS_W_PH:
    2686             :     case Mips::MADDU_DSP:
    2687             :     case Mips::MADD_DSP:
    2688             :     case Mips::MAQ_SA_W_PHL:
    2689             :     case Mips::MAQ_SA_W_PHR:
    2690             :     case Mips::MAQ_S_W_PHL:
    2691             :     case Mips::MAQ_S_W_PHR:
    2692             :     case Mips::MSUBU_DSP:
    2693             :     case Mips::MSUB_DSP:
    2694             :     case Mips::MULSAQ_S_W_PH:
    2695             :     case Mips::MULSA_W_PH:
    2696             :     case Mips::MULTU_DSP:
    2697             :     case Mips::MULT_DSP: {
    2698             :       // op: ac
    2699          47 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2700          47 :       Value |= (op & UINT64_C(3)) << 11;
    2701             :       // op: rs
    2702          47 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    2703          47 :       Value |= (op & UINT64_C(31)) << 21;
    2704             :       // op: rt
    2705          47 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    2706          47 :       Value |= (op & UINT64_C(31)) << 16;
    2707          47 :       break;
    2708             :     }
    2709             :     case Mips::SHILO: {
    2710             :       // op: ac
    2711           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2712           4 :       Value |= (op & UINT64_C(3)) << 11;
    2713             :       // op: shift
    2714           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    2715           4 :       Value |= (op & UINT64_C(63)) << 20;
    2716           4 :       break;
    2717             :     }
    2718          56 :     case Mips::CACHEE:
    2719             :     case Mips::CACHE_R6:
    2720             :     case Mips::PREFE:
    2721             :     case Mips::PREF_R6: {
    2722             :       // op: addr
    2723          56 :       op = getMemEncoding(MI, 0, Fixups, STI);
    2724          56 :       Value |= (op & UINT64_C(2031616)) << 5;
    2725          56 :       Value |= (op & UINT64_C(511)) << 7;
    2726             :       // op: hint
    2727          56 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    2728          56 :       Value |= (op & UINT64_C(31)) << 16;
    2729          56 :       break;
    2730             :     }
    2731           8 :     case Mips::SYNCI: {
    2732             :       // op: addr
    2733           8 :       op = getMemEncoding(MI, 0, Fixups, STI);
    2734           8 :       Value |= (op & UINT64_C(2031616)) << 5;
    2735           8 :       Value |= op & UINT64_C(65535);
    2736           8 :       break;
    2737             :     }
    2738          27 :     case Mips::CACHE:
    2739             :     case Mips::PREF: {
    2740             :       // op: addr
    2741          27 :       op = getMemEncoding(MI, 0, Fixups, STI);
    2742          27 :       Value |= (op & UINT64_C(2031616)) << 5;
    2743          27 :       Value |= op & UINT64_C(65535);
    2744             :       // op: hint
    2745          27 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    2746          27 :       Value |= (op & UINT64_C(31)) << 16;
    2747          27 :       break;
    2748             :     }
    2749           3 :     case Mips::LD_B:
    2750             :     case Mips::ST_B: {
    2751             :       // op: addr
    2752           3 :       op = getMemEncoding(MI, 1, Fixups, STI);
    2753           3 :       Value |= (op & UINT64_C(1023)) << 16;
    2754           3 :       Value |= (op & UINT64_C(2031616)) >> 5;
    2755             :       // op: wd
    2756           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2757           3 :       Value |= (op & UINT64_C(31)) << 6;
    2758           3 :       break;
    2759             :     }
    2760         303 :     case Mips::LBE:
    2761             :     case Mips::LBuE:
    2762             :     case Mips::LHE:
    2763             :     case Mips::LHuE:
    2764             :     case Mips::LLE:
    2765             :     case Mips::LWE:
    2766             :     case Mips::LWLE:
    2767             :     case Mips::LWRE:
    2768             :     case Mips::SBE:
    2769             :     case Mips::SHE:
    2770             :     case Mips::SWE:
    2771             :     case Mips::SWLE:
    2772             :     case Mips::SWRE: {
    2773             :       // op: addr
    2774         303 :       op = getMemEncoding(MI, 1, Fixups, STI);
    2775         303 :       Value |= (op & UINT64_C(2031616)) << 5;
    2776         303 :       Value |= (op & UINT64_C(511)) << 7;
    2777             :       // op: hint
    2778         303 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2779         303 :       Value |= (op & UINT64_C(31)) << 16;
    2780         303 :       break;
    2781             :     }
    2782          25 :     case Mips::SCE: {
    2783             :       // op: addr
    2784          25 :       op = getMemEncoding(MI, 2, Fixups, STI);
    2785          25 :       Value |= (op & UINT64_C(2031616)) << 5;
    2786          25 :       Value |= (op & UINT64_C(511)) << 7;
    2787             :       // op: hint
    2788          25 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2789          25 :       Value |= (op & UINT64_C(31)) << 16;
    2790          25 :       break;
    2791             :     }
    2792           5 :     case Mips::LD_H:
    2793             :     case Mips::ST_H: {
    2794             :       // op: addr
    2795           5 :       op = getMemEncoding<1>(MI, 1, Fixups, STI);
    2796           5 :       Value |= (op & UINT64_C(1023)) << 16;
    2797           5 :       Value |= (op & UINT64_C(2031616)) >> 5;
    2798             :       // op: wd
    2799           5 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2800           5 :       Value |= (op & UINT64_C(31)) << 6;
    2801           5 :       break;
    2802             :     }
    2803           6 :     case Mips::LD_W:
    2804             :     case Mips::ST_W: {
    2805             :       // op: addr
    2806           6 :       op = getMemEncoding<2>(MI, 1, Fixups, STI);
    2807           6 :       Value |= (op & UINT64_C(1023)) << 16;
    2808           6 :       Value |= (op & UINT64_C(2031616)) >> 5;
    2809             :       // op: wd
    2810           6 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2811           6 :       Value |= (op & UINT64_C(31)) << 6;
    2812           6 :       break;
    2813             :     }
    2814           9 :     case Mips::LD_D:
    2815             :     case Mips::ST_D: {
    2816             :       // op: addr
    2817           9 :       op = getMemEncoding<3>(MI, 1, Fixups, STI);
    2818           9 :       Value |= (op & UINT64_C(1023)) << 16;
    2819           9 :       Value |= (op & UINT64_C(2031616)) >> 5;
    2820             :       // op: wd
    2821           9 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2822           9 :       Value |= (op & UINT64_C(31)) << 6;
    2823           9 :       break;
    2824             :     }
    2825           8 :     case Mips::CACHE_MM:
    2826             :     case Mips::CACHE_MMR6:
    2827             :     case Mips::PREF_MM:
    2828             :     case Mips::PREF_MMR6: {
    2829             :       // op: addr
    2830           8 :       op = getMemEncodingMMImm12(MI, 0, Fixups, STI);
    2831           8 :       Value |= op & UINT64_C(2031616);
    2832           8 :       Value |= op & UINT64_C(4095);
    2833             :       // op: hint
    2834           8 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    2835           8 :       Value |= (op & UINT64_C(31)) << 21;
    2836           8 :       break;
    2837             :     }
    2838           2 :     case Mips::SYNCI_MM:
    2839             :     case Mips::SYNCI_MMR6: {
    2840             :       // op: addr
    2841           2 :       op = getMemEncodingMMImm16(MI, 0, Fixups, STI);
    2842           2 :       Value |= op & UINT64_C(2097151);
    2843           2 :       break;
    2844             :     }
    2845           2 :     case Mips::LBU_MMR6:
    2846             :     case Mips::LB_MMR6: {
    2847             :       // op: addr
    2848           2 :       op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
    2849           2 :       Value |= op & UINT64_C(2097151);
    2850             :       // op: rt
    2851           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2852           2 :       Value |= (op & UINT64_C(31)) << 21;
    2853           2 :       break;
    2854             :     }
    2855          12 :     case Mips::CACHEE_MM:
    2856             :     case Mips::PREFE_MM: {
    2857             :       // op: addr
    2858          12 :       op = getMemEncodingMMImm9(MI, 0, Fixups, STI);
    2859          12 :       Value |= op & UINT64_C(2031616);
    2860          12 :       Value |= op & UINT64_C(511);
    2861             :       // op: hint
    2862          12 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    2863          12 :       Value |= (op & UINT64_C(31)) << 21;
    2864          12 :       break;
    2865             :     }
    2866             :     case Mips::HYPCALL: {
    2867             :       // op: code_
    2868           7 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2869           7 :       Value |= (op & UINT64_C(1023)) << 11;
    2870           7 :       break;
    2871             :     }
    2872             :     case Mips::HYPCALL_MM:
    2873             :     case Mips::SDBBP_MM:
    2874             :     case Mips::SDBBP_MMR6:
    2875             :     case Mips::SYSCALL_MM:
    2876             :     case Mips::WAIT_MM:
    2877             :     case Mips::WAIT_MMR6: {
    2878             :       // op: code_
    2879          22 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2880          22 :       Value |= (op & UINT64_C(1023)) << 16;
    2881          22 :       break;
    2882             :     }
    2883             :     case Mips::SDBBP:
    2884             :     case Mips::SDBBP_R6:
    2885             :     case Mips::SYSCALL: {
    2886             :       // op: code_
    2887          53 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2888          53 :       Value |= (op & UINT64_C(1048575)) << 6;
    2889          53 :       break;
    2890             :     }
    2891             :     case Mips::BREAK16_MMR6:
    2892             :     case Mips::SDBBP16_MMR6: {
    2893             :       // op: code_
    2894           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2895           2 :       Value |= (op & UINT64_C(15)) << 6;
    2896           2 :       break;
    2897             :     }
    2898             :     case Mips::BREAK16_MM:
    2899             :     case Mips::SDBBP16_MM: {
    2900             :       // op: code_
    2901           6 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2902           6 :       Value |= op & UINT64_C(15);
    2903           6 :       break;
    2904             :     }
    2905             :     case Mips::BREAK:
    2906             :     case Mips::BREAK_MM:
    2907             :     case Mips::BREAK_MMR6: {
    2908             :       // op: code_1
    2909          87 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2910          87 :       Value |= (op & UINT64_C(1023)) << 16;
    2911             :       // op: code_2
    2912          87 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    2913          87 :       Value |= (op & UINT64_C(1023)) << 6;
    2914          87 :       break;
    2915             :     }
    2916             :     case Mips::BC2EQZ:
    2917             :     case Mips::BC2NEZ: {
    2918             :       // op: ct
    2919           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2920           8 :       Value |= (op & UINT64_C(31)) << 16;
    2921             :       // op: offset
    2922           8 :       op = getBranchTargetOpValue(MI, 1, Fixups, STI);
    2923           8 :       Value |= op & UINT64_C(65535);
    2924           8 :       break;
    2925             :     }
    2926           1 :     case Mips::MOVEP_MMR6: {
    2927             :       // op: dst_regs
    2928           1 :       op = getMovePRegPairOpValue(MI, 0, Fixups, STI);
    2929           1 :       Value |= (op & UINT64_C(7)) << 7;
    2930             :       // op: rt
    2931           1 :       op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
    2932           1 :       Value |= (op & UINT64_C(7)) << 4;
    2933             :       // op: rs
    2934           1 :       op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
    2935           1 :       Value |= (op & UINT64_C(4)) << 1;
    2936           1 :       Value |= op & UINT64_C(3);
    2937           1 :       break;
    2938             :     }
    2939           3 :     case Mips::MOVEP_MM: {
    2940             :       // op: dst_regs
    2941           3 :       op = getMovePRegPairOpValue(MI, 0, Fixups, STI);
    2942           3 :       Value |= (op & UINT64_C(7)) << 7;
    2943             :       // op: rt
    2944           3 :       op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
    2945           3 :       Value |= (op & UINT64_C(7)) << 4;
    2946             :       // op: rs
    2947           3 :       op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
    2948           3 :       Value |= (op & UINT64_C(7)) << 1;
    2949           3 :       break;
    2950             :     }
    2951             :     case Mips::BC1F:
    2952             :     case Mips::BC1FL:
    2953             :     case Mips::BC1T:
    2954             :     case Mips::BC1TL: {
    2955             :       // op: fcc
    2956         146 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2957         146 :       Value |= (op & UINT64_C(7)) << 18;
    2958             :       // op: offset
    2959         146 :       op = getBranchTargetOpValue(MI, 1, Fixups, STI);
    2960         146 :       Value |= op & UINT64_C(65535);
    2961         146 :       break;
    2962             :     }
    2963             :     case Mips::BC1F_MM:
    2964             :     case Mips::BC1T_MM: {
    2965             :       // op: fcc
    2966           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2967           8 :       Value |= (op & UINT64_C(7)) << 18;
    2968             :       // op: offset
    2969           8 :       op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
    2970           8 :       Value |= op & UINT64_C(65535);
    2971           8 :       break;
    2972             :     }
    2973             :     case Mips::LUXC1_MM:
    2974             :     case Mips::LWXC1_MM: {
    2975             :       // op: fd
    2976           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2977           2 :       Value |= (op & UINT64_C(31)) << 11;
    2978             :       // op: base
    2979           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    2980           2 :       Value |= (op & UINT64_C(31)) << 16;
    2981             :       // op: index
    2982           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    2983           2 :       Value |= (op & UINT64_C(31)) << 21;
    2984           2 :       break;
    2985             :     }
    2986             :     case Mips::MOVN_I_D32_MM:
    2987             :     case Mips::MOVN_I_S_MM:
    2988             :     case Mips::MOVZ_I_D32_MM:
    2989             :     case Mips::MOVZ_I_S_MM: {
    2990             :       // op: fd
    2991           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    2992           8 :       Value |= (op & UINT64_C(31)) << 11;
    2993             :       // op: fs
    2994           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    2995           8 :       Value |= (op & UINT64_C(31)) << 16;
    2996             :       // op: rt
    2997           8 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    2998           8 :       Value |= (op & UINT64_C(31)) << 21;
    2999           8 :       break;
    3000             :     }
    3001             :     case Mips::CEIL_W_MM:
    3002             :     case Mips::CEIL_W_S_MM:
    3003             :     case Mips::CVT_D32_S_MM:
    3004             :     case Mips::CVT_D32_W_MM:
    3005             :     case Mips::CVT_D64_S_MM:
    3006             :     case Mips::CVT_D64_W_MM:
    3007             :     case Mips::CVT_L_D64_MM:
    3008             :     case Mips::CVT_L_S_MM:
    3009             :     case Mips::CVT_S_D32_MM:
    3010             :     case Mips::CVT_S_D64_MM:
    3011             :     case Mips::CVT_S_W_MM:
    3012             :     case Mips::CVT_W_D32_MM:
    3013             :     case Mips::CVT_W_D64_MM:
    3014             :     case Mips::CVT_W_S_MM:
    3015             :     case Mips::FABS_D32_MM:
    3016             :     case Mips::FABS_D64_MM:
    3017             :     case Mips::FABS_S_MM:
    3018             :     case Mips::FLOOR_W_MM:
    3019             :     case Mips::FLOOR_W_S_MM:
    3020             :     case Mips::FMOV_D32_MM:
    3021             :     case Mips::FMOV_D64_MM:
    3022             :     case Mips::FMOV_S_MM:
    3023             :     case Mips::FNEG_D32_MM:
    3024             :     case Mips::FNEG_D64_MM:
    3025             :     case Mips::FNEG_S_MM:
    3026             :     case Mips::FSQRT_D32_MM:
    3027             :     case Mips::FSQRT_D64_MM:
    3028             :     case Mips::FSQRT_S_MM:
    3029             :     case Mips::RECIP_D32_MM:
    3030             :     case Mips::RECIP_D64_MM:
    3031             :     case Mips::RECIP_S_MM:
    3032             :     case Mips::ROUND_W_MM:
    3033             :     case Mips::ROUND_W_S_MM:
    3034             :     case Mips::RSQRT_D32_MM:
    3035             :     case Mips::RSQRT_D64_MM:
    3036             :     case Mips::RSQRT_S_MM:
    3037             :     case Mips::TRUNC_W_MM:
    3038             :     case Mips::TRUNC_W_S_MM: {
    3039             :       // op: fd
    3040          86 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3041          86 :       Value |= (op & UINT64_C(31)) << 21;
    3042             :       // op: fs
    3043          86 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3044          86 :       Value |= (op & UINT64_C(31)) << 16;
    3045          86 :       break;
    3046             :     }
    3047             :     case Mips::MOVF_D32_MM:
    3048             :     case Mips::MOVF_S_MM:
    3049             :     case Mips::MOVT_D32_MM:
    3050             :     case Mips::MOVT_S_MM: {
    3051             :       // op: fd
    3052           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3053           8 :       Value |= (op & UINT64_C(31)) << 21;
    3054             :       // op: fs
    3055           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3056           8 :       Value |= (op & UINT64_C(31)) << 16;
    3057             :       // op: fcc
    3058           8 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3059           8 :       Value |= (op & UINT64_C(7)) << 13;
    3060           8 :       break;
    3061             :     }
    3062             :     case Mips::LDXC1:
    3063             :     case Mips::LDXC164:
    3064             :     case Mips::LUXC1:
    3065             :     case Mips::LUXC164:
    3066             :     case Mips::LWXC1: {
    3067             :       // op: fd
    3068          36 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3069          36 :       Value |= (op & UINT64_C(31)) << 6;
    3070             :       // op: base
    3071          36 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3072          36 :       Value |= (op & UINT64_C(31)) << 21;
    3073             :       // op: index
    3074          36 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3075          36 :       Value |= (op & UINT64_C(31)) << 16;
    3076          36 :       break;
    3077             :     }
    3078             :     case Mips::MADD_D32:
    3079             :     case Mips::MADD_D64:
    3080             :     case Mips::MADD_S:
    3081             :     case Mips::MSUB_D32:
    3082             :     case Mips::MSUB_D64:
    3083             :     case Mips::MSUB_S:
    3084             :     case Mips::NMADD_D32:
    3085             :     case Mips::NMADD_D64:
    3086             :     case Mips::NMADD_S:
    3087             :     case Mips::NMSUB_D32:
    3088             :     case Mips::NMSUB_D64:
    3089             :     case Mips::NMSUB_S: {
    3090             :       // op: fd
    3091          60 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3092          60 :       Value |= (op & UINT64_C(31)) << 6;
    3093             :       // op: fr
    3094          60 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3095          60 :       Value |= (op & UINT64_C(31)) << 21;
    3096             :       // op: fs
    3097          60 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3098          60 :       Value |= (op & UINT64_C(31)) << 11;
    3099             :       // op: ft
    3100          60 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    3101          60 :       Value |= (op & UINT64_C(31)) << 16;
    3102          60 :       break;
    3103             :     }
    3104             :     case Mips::CEIL_L_D64:
    3105             :     case Mips::CEIL_L_S:
    3106             :     case Mips::CEIL_W_D32:
    3107             :     case Mips::CEIL_W_D64:
    3108             :     case Mips::CEIL_W_S:
    3109             :     case Mips::CVT_D32_S:
    3110             :     case Mips::CVT_D32_W:
    3111             :     case Mips::CVT_D64_L:
    3112             :     case Mips::CVT_D64_S:
    3113             :     case Mips::CVT_D64_W:
    3114             :     case Mips::CVT_L_D64:
    3115             :     case Mips::CVT_L_S:
    3116             :     case Mips::CVT_S_D32:
    3117             :     case Mips::CVT_S_D64:
    3118             :     case Mips::CVT_S_L:
    3119             :     case Mips::CVT_S_W:
    3120             :     case Mips::CVT_W_D32:
    3121             :     case Mips::CVT_W_D64:
    3122             :     case Mips::CVT_W_S:
    3123             :     case Mips::FABS_D32:
    3124             :     case Mips::FABS_D64:
    3125             :     case Mips::FABS_S:
    3126             :     case Mips::FLOOR_L_D64:
    3127             :     case Mips::FLOOR_L_S:
    3128             :     case Mips::FLOOR_W_D32:
    3129             :     case Mips::FLOOR_W_D64:
    3130             :     case Mips::FLOOR_W_S:
    3131             :     case Mips::FMOV_D32:
    3132             :     case Mips::FMOV_D64:
    3133             :     case Mips::FMOV_S:
    3134             :     case Mips::FNEG_D32:
    3135             :     case Mips::FNEG_D64:
    3136             :     case Mips::FNEG_S:
    3137             :     case Mips::FSQRT_D32:
    3138             :     case Mips::FSQRT_D64:
    3139             :     case Mips::FSQRT_S:
    3140             :     case Mips::RECIP_D32:
    3141             :     case Mips::RECIP_D64:
    3142             :     case Mips::RECIP_S:
    3143             :     case Mips::ROUND_L_D64:
    3144             :     case Mips::ROUND_L_S:
    3145             :     case Mips::ROUND_W_D32:
    3146             :     case Mips::ROUND_W_D64:
    3147             :     case Mips::ROUND_W_S:
    3148             :     case Mips::RSQRT_D32:
    3149             :     case Mips::RSQRT_D64:
    3150             :     case Mips::RSQRT_S:
    3151             :     case Mips::TRUNC_L_D64:
    3152             :     case Mips::TRUNC_L_S:
    3153             :     case Mips::TRUNC_W_D32:
    3154             :     case Mips::TRUNC_W_D64:
    3155             :     case Mips::TRUNC_W_S: {
    3156             :       // op: fd
    3157         545 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3158         545 :       Value |= (op & UINT64_C(31)) << 6;
    3159             :       // op: fs
    3160         545 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3161         545 :       Value |= (op & UINT64_C(31)) << 11;
    3162         545 :       break;
    3163             :     }
    3164             :     case Mips::MOVF_D32:
    3165             :     case Mips::MOVF_D64:
    3166             :     case Mips::MOVF_S:
    3167             :     case Mips::MOVT_D32:
    3168             :     case Mips::MOVT_D64:
    3169             :     case Mips::MOVT_S: {
    3170             :       // op: fd
    3171          44 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3172          44 :       Value |= (op & UINT64_C(31)) << 6;
    3173             :       // op: fs
    3174          44 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3175          44 :       Value |= (op & UINT64_C(31)) << 11;
    3176             :       // op: fcc
    3177          44 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3178          44 :       Value |= (op & UINT64_C(7)) << 18;
    3179          44 :       break;
    3180             :     }
    3181             :     case Mips::CMP_EQ_D:
    3182             :     case Mips::CMP_EQ_S:
    3183             :     case Mips::CMP_F_D:
    3184             :     case Mips::CMP_F_S:
    3185             :     case Mips::CMP_LE_D:
    3186             :     case Mips::CMP_LE_S:
    3187             :     case Mips::CMP_LT_D:
    3188             :     case Mips::CMP_LT_S:
    3189             :     case Mips::CMP_SAF_D:
    3190             :     case Mips::CMP_SAF_S:
    3191             :     case Mips::CMP_SEQ_D:
    3192             :     case Mips::CMP_SEQ_S:
    3193             :     case Mips::CMP_SLE_D:
    3194             :     case Mips::CMP_SLE_S:
    3195             :     case Mips::CMP_SLT_D:
    3196             :     case Mips::CMP_SLT_S:
    3197             :     case Mips::CMP_SUEQ_D:
    3198             :     case Mips::CMP_SUEQ_S:
    3199             :     case Mips::CMP_SULE_D:
    3200             :     case Mips::CMP_SULE_S:
    3201             :     case Mips::CMP_SULT_D:
    3202             :     case Mips::CMP_SULT_S:
    3203             :     case Mips::CMP_SUN_D:
    3204             :     case Mips::CMP_SUN_S:
    3205             :     case Mips::CMP_UEQ_D:
    3206             :     case Mips::CMP_UEQ_S:
    3207             :     case Mips::CMP_ULE_D:
    3208             :     case Mips::CMP_ULE_S:
    3209             :     case Mips::CMP_ULT_D:
    3210             :     case Mips::CMP_ULT_S:
    3211             :     case Mips::CMP_UN_D:
    3212             :     case Mips::CMP_UN_S:
    3213             :     case Mips::FADD_D32:
    3214             :     case Mips::FADD_D64:
    3215             :     case Mips::FADD_S:
    3216             :     case Mips::FDIV_D32:
    3217             :     case Mips::FDIV_D64:
    3218             :     case Mips::FDIV_S:
    3219             :     case Mips::FMUL_D32:
    3220             :     case Mips::FMUL_D64:
    3221             :     case Mips::FMUL_S:
    3222             :     case Mips::FSUB_D32:
    3223             :     case Mips::FSUB_D64:
    3224             :     case Mips::FSUB_S: {
    3225             :       // op: fd
    3226         196 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3227         196 :       Value |= (op & UINT64_C(31)) << 6;
    3228             :       // op: fs
    3229         196 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3230         196 :       Value |= (op & UINT64_C(31)) << 11;
    3231             :       // op: ft
    3232         196 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3233         196 :       Value |= (op & UINT64_C(31)) << 16;
    3234         196 :       break;
    3235             :     }
    3236             :     case Mips::MOVN_I64_D64:
    3237             :     case Mips::MOVN_I64_S:
    3238             :     case Mips::MOVN_I_D32:
    3239             :     case Mips::MOVN_I_D64:
    3240             :     case Mips::MOVN_I_S:
    3241             :     case Mips::MOVZ_I64_D64:
    3242             :     case Mips::MOVZ_I64_S:
    3243             :     case Mips::MOVZ_I_D32:
    3244             :     case Mips::MOVZ_I_D64:
    3245             :     case Mips::MOVZ_I_S: {
    3246             :       // op: fd
    3247          40 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3248          40 :       Value |= (op & UINT64_C(31)) << 6;
    3249             :       // op: fs
    3250          40 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3251          40 :       Value |= (op & UINT64_C(31)) << 11;
    3252             :       // op: rt
    3253          40 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3254          40 :       Value |= (op & UINT64_C(31)) << 16;
    3255          40 :       break;
    3256             :     }
    3257             :     case Mips::SUXC1_MM:
    3258             :     case Mips::SWXC1_MM: {
    3259             :       // op: fs
    3260           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3261           2 :       Value |= (op & UINT64_C(31)) << 11;
    3262             :       // op: base
    3263           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3264           2 :       Value |= (op & UINT64_C(31)) << 16;
    3265             :       // op: index
    3266           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3267           2 :       Value |= (op & UINT64_C(31)) << 21;
    3268           2 :       break;
    3269             :     }
    3270             :     case Mips::SDXC1:
    3271             :     case Mips::SDXC164:
    3272             :     case Mips::SUXC1:
    3273             :     case Mips::SUXC164:
    3274             :     case Mips::SWXC1: {
    3275             :       // op: fs
    3276          31 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3277          31 :       Value |= (op & UINT64_C(31)) << 11;
    3278             :       // op: base
    3279          31 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3280          31 :       Value |= (op & UINT64_C(31)) << 21;
    3281             :       // op: index
    3282          31 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3283          31 :       Value |= (op & UINT64_C(31)) << 16;
    3284          31 :       break;
    3285             :     }
    3286             :     case Mips::FCMP_D32:
    3287             :     case Mips::FCMP_D64:
    3288             :     case Mips::FCMP_S32: {
    3289             :       // op: fs
    3290           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3291           0 :       Value |= (op & UINT64_C(31)) << 11;
    3292             :       // op: ft
    3293           0 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3294           0 :       Value |= (op & UINT64_C(31)) << 16;
    3295             :       // op: cond
    3296           0 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3297           0 :       Value |= op & UINT64_C(15);
    3298           0 :       break;
    3299             :     }
    3300             :     case Mips::FCMP_D32_MM:
    3301             :     case Mips::FCMP_S32_MM: {
    3302             :       // op: fs
    3303           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3304           0 :       Value |= (op & UINT64_C(31)) << 16;
    3305             :       // op: ft
    3306           0 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3307           0 :       Value |= (op & UINT64_C(31)) << 21;
    3308             :       // op: cond
    3309           0 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3310           0 :       Value |= (op & UINT64_C(15)) << 6;
    3311           0 :       break;
    3312             :     }
    3313             :     case Mips::CLASS_D:
    3314             :     case Mips::CLASS_S:
    3315             :     case Mips::RINT_D:
    3316             :     case Mips::RINT_S: {
    3317             :       // op: fs
    3318           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3319           8 :       Value |= (op & UINT64_C(31)) << 11;
    3320             :       // op: fd
    3321           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3322           8 :       Value |= (op & UINT64_C(31)) << 6;
    3323           8 :       break;
    3324             :     }
    3325             :     case Mips::C_EQ_D32:
    3326             :     case Mips::C_EQ_D64:
    3327             :     case Mips::C_EQ_S:
    3328             :     case Mips::C_F_D32:
    3329             :     case Mips::C_F_D64:
    3330             :     case Mips::C_F_S:
    3331             :     case Mips::C_LE_D32:
    3332             :     case Mips::C_LE_D64:
    3333             :     case Mips::C_LE_S:
    3334             :     case Mips::C_LT_D32:
    3335             :     case Mips::C_LT_D64:
    3336             :     case Mips::C_LT_S:
    3337             :     case Mips::C_NGE_D32:
    3338             :     case Mips::C_NGE_D64:
    3339             :     case Mips::C_NGE_S:
    3340             :     case Mips::C_NGLE_D32:
    3341             :     case Mips::C_NGLE_D64:
    3342             :     case Mips::C_NGLE_S:
    3343             :     case Mips::C_NGL_D32:
    3344             :     case Mips::C_NGL_D64:
    3345             :     case Mips::C_NGL_S:
    3346             :     case Mips::C_NGT_D32:
    3347             :     case Mips::C_NGT_D64:
    3348             :     case Mips::C_NGT_S:
    3349             :     case Mips::C_OLE_D32:
    3350             :     case Mips::C_OLE_D64:
    3351             :     case Mips::C_OLE_S:
    3352             :     case Mips::C_OLT_D32:
    3353             :     case Mips::C_OLT_D64:
    3354             :     case Mips::C_OLT_S:
    3355             :     case Mips::C_SEQ_D32:
    3356             :     case Mips::C_SEQ_D64:
    3357             :     case Mips::C_SEQ_S:
    3358             :     case Mips::C_SF_D32:
    3359             :     case Mips::C_SF_D64:
    3360             :     case Mips::C_SF_S:
    3361             :     case Mips::C_UEQ_D32:
    3362             :     case Mips::C_UEQ_D64:
    3363             :     case Mips::C_UEQ_S:
    3364             :     case Mips::C_ULE_D32:
    3365             :     case Mips::C_ULE_D64:
    3366             :     case Mips::C_ULE_S:
    3367             :     case Mips::C_ULT_D32:
    3368             :     case Mips::C_ULT_D64:
    3369             :     case Mips::C_ULT_S:
    3370             :     case Mips::C_UN_D32:
    3371             :     case Mips::C_UN_D64:
    3372             :     case Mips::C_UN_S: {
    3373             :       // op: fs
    3374         396 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3375         396 :       Value |= (op & UINT64_C(31)) << 11;
    3376             :       // op: ft
    3377         396 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3378         396 :       Value |= (op & UINT64_C(31)) << 16;
    3379             :       // op: fcc
    3380         396 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3381         396 :       Value |= (op & UINT64_C(7)) << 8;
    3382         396 :       break;
    3383             :     }
    3384             :     case Mips::C_EQ_D32_MM:
    3385             :     case Mips::C_EQ_D64_MM:
    3386             :     case Mips::C_EQ_S_MM:
    3387             :     case Mips::C_F_D32_MM:
    3388             :     case Mips::C_F_D64_MM:
    3389             :     case Mips::C_F_S_MM:
    3390             :     case Mips::C_LE_D32_MM:
    3391             :     case Mips::C_LE_D64_MM:
    3392             :     case Mips::C_LE_S_MM:
    3393             :     case Mips::C_LT_D32_MM:
    3394             :     case Mips::C_LT_D64_MM:
    3395             :     case Mips::C_LT_S_MM:
    3396             :     case Mips::C_NGE_D32_MM:
    3397             :     case Mips::C_NGE_D64_MM:
    3398             :     case Mips::C_NGE_S_MM:
    3399             :     case Mips::C_NGLE_D32_MM:
    3400             :     case Mips::C_NGLE_D64_MM:
    3401             :     case Mips::C_NGLE_S_MM:
    3402             :     case Mips::C_NGL_D32_MM:
    3403             :     case Mips::C_NGL_D64_MM:
    3404             :     case Mips::C_NGL_S_MM:
    3405             :     case Mips::C_NGT_D32_MM:
    3406             :     case Mips::C_NGT_D64_MM:
    3407             :     case Mips::C_NGT_S_MM:
    3408             :     case Mips::C_OLE_D32_MM:
    3409             :     case Mips::C_OLE_D64_MM:
    3410             :     case Mips::C_OLE_S_MM:
    3411             :     case Mips::C_OLT_D32_MM:
    3412             :     case Mips::C_OLT_D64_MM:
    3413             :     case Mips::C_OLT_S_MM:
    3414             :     case Mips::C_SEQ_D32_MM:
    3415             :     case Mips::C_SEQ_D64_MM:
    3416             :     case Mips::C_SEQ_S_MM:
    3417             :     case Mips::C_SF_D32_MM:
    3418             :     case Mips::C_SF_D64_MM:
    3419             :     case Mips::C_SF_S_MM:
    3420             :     case Mips::C_UEQ_D32_MM:
    3421             :     case Mips::C_UEQ_D64_MM:
    3422             :     case Mips::C_UEQ_S_MM:
    3423             :     case Mips::C_ULE_D32_MM:
    3424             :     case Mips::C_ULE_D64_MM:
    3425             :     case Mips::C_ULE_S_MM:
    3426             :     case Mips::C_ULT_D32_MM:
    3427             :     case Mips::C_ULT_D64_MM:
    3428             :     case Mips::C_ULT_S_MM:
    3429             :     case Mips::C_UN_D32_MM:
    3430             :     case Mips::C_UN_D64_MM:
    3431             :     case Mips::C_UN_S_MM: {
    3432             :       // op: fs
    3433          96 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3434          96 :       Value |= (op & UINT64_C(31)) << 16;
    3435             :       // op: ft
    3436          96 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3437          96 :       Value |= (op & UINT64_C(31)) << 21;
    3438             :       // op: fcc
    3439          96 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3440          96 :       Value |= (op & UINT64_C(7)) << 13;
    3441          96 :       break;
    3442             :     }
    3443             :     case Mips::CLASS_D_MMR6:
    3444             :     case Mips::CLASS_S_MMR6:
    3445             :     case Mips::RINT_D_MMR6:
    3446             :     case Mips::RINT_S_MMR6: {
    3447             :       // op: fs
    3448           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3449           4 :       Value |= (op & UINT64_C(31)) << 21;
    3450             :       // op: fd
    3451           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3452           4 :       Value |= (op & UINT64_C(31)) << 16;
    3453           4 :       break;
    3454             :     }
    3455             :     case Mips::BC1EQZ:
    3456             :     case Mips::BC1NEZ: {
    3457             :       // op: ft
    3458           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3459           8 :       Value |= (op & UINT64_C(31)) << 16;
    3460             :       // op: offset
    3461           8 :       op = getBranchTargetOpValue(MI, 1, Fixups, STI);
    3462           8 :       Value |= op & UINT64_C(65535);
    3463           8 :       break;
    3464             :     }
    3465             :     case Mips::LDC1_D64_MMR6:
    3466             :     case Mips::SDC1_D64_MMR6: {
    3467             :       // op: ft
    3468          16 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3469          16 :       Value |= (op & UINT64_C(31)) << 21;
    3470             :       // op: addr
    3471          16 :       op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
    3472          16 :       Value |= op & UINT64_C(2097151);
    3473          16 :       break;
    3474             :     }
    3475             :     case Mips::CEIL_L_D_MMR6:
    3476             :     case Mips::CEIL_L_S_MMR6:
    3477             :     case Mips::CEIL_W_D_MMR6:
    3478             :     case Mips::CEIL_W_S_MMR6:
    3479             :     case Mips::CVT_D_L_MMR6:
    3480             :     case Mips::CVT_L_D_MMR6:
    3481             :     case Mips::CVT_L_S_MMR6:
    3482             :     case Mips::CVT_S_L_MMR6:
    3483             :     case Mips::CVT_S_W_MMR6:
    3484             :     case Mips::CVT_W_S_MMR6:
    3485             :     case Mips::FLOOR_L_D_MMR6:
    3486             :     case Mips::FLOOR_L_S_MMR6:
    3487             :     case Mips::FLOOR_W_D_MMR6:
    3488             :     case Mips::FLOOR_W_S_MMR6:
    3489             :     case Mips::FMOV_S_MMR6:
    3490             :     case Mips::FNEG_S_MMR6:
    3491             :     case Mips::ROUND_L_D_MMR6:
    3492             :     case Mips::ROUND_L_S_MMR6:
    3493             :     case Mips::ROUND_W_D_MMR6:
    3494             :     case Mips::ROUND_W_S_MMR6:
    3495             :     case Mips::TRUNC_L_D_MMR6:
    3496             :     case Mips::TRUNC_L_S_MMR6:
    3497             :     case Mips::TRUNC_W_D_MMR6:
    3498             :     case Mips::TRUNC_W_S_MMR6: {
    3499             :       // op: ft
    3500          22 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3501          22 :       Value |= (op & UINT64_C(31)) << 21;
    3502             :       // op: fs
    3503          22 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3504          22 :       Value |= (op & UINT64_C(31)) << 16;
    3505          22 :       break;
    3506             :     }
    3507             :     case Mips::FADD_S_MMR6:
    3508             :     case Mips::FDIV_S_MMR6:
    3509             :     case Mips::FMUL_S_MMR6:
    3510             :     case Mips::FSUB_S_MMR6: {
    3511             :       // op: ft
    3512           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3513           4 :       Value |= (op & UINT64_C(31)) << 21;
    3514             :       // op: fs
    3515           4 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3516           4 :       Value |= (op & UINT64_C(31)) << 16;
    3517             :       // op: fd
    3518           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3519           4 :       Value |= (op & UINT64_C(31)) << 11;
    3520           4 :       break;
    3521             :     }
    3522             :     case Mips::MAXA_D:
    3523             :     case Mips::MAXA_S:
    3524             :     case Mips::MAX_D:
    3525             :     case Mips::MAX_S:
    3526             :     case Mips::MINA_D:
    3527             :     case Mips::MINA_S:
    3528             :     case Mips::MIN_D:
    3529             :     case Mips::MIN_S:
    3530             :     case Mips::SELEQZ_D:
    3531             :     case Mips::SELEQZ_S:
    3532             :     case Mips::SELNEZ_D:
    3533             :     case Mips::SELNEZ_S: {
    3534             :       // op: ft
    3535          24 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3536          24 :       Value |= (op & UINT64_C(31)) << 16;
    3537             :       // op: fs
    3538          24 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3539          24 :       Value |= (op & UINT64_C(31)) << 11;
    3540             :       // op: fd
    3541          24 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3542          24 :       Value |= (op & UINT64_C(31)) << 6;
    3543          24 :       break;
    3544             :     }
    3545             :     case Mips::CMP_AF_D_MMR6:
    3546             :     case Mips::CMP_AF_S_MMR6:
    3547             :     case Mips::CMP_EQ_D_MMR6:
    3548             :     case Mips::CMP_EQ_S_MMR6:
    3549             :     case Mips::CMP_LE_D_MMR6:
    3550             :     case Mips::CMP_LE_S_MMR6:
    3551             :     case Mips::CMP_LT_D_MMR6:
    3552             :     case Mips::CMP_LT_S_MMR6:
    3553             :     case Mips::CMP_SAF_D_MMR6:
    3554             :     case Mips::CMP_SAF_S_MMR6:
    3555             :     case Mips::CMP_SEQ_D_MMR6:
    3556             :     case Mips::CMP_SEQ_S_MMR6:
    3557             :     case Mips::CMP_SLE_D_MMR6:
    3558             :     case Mips::CMP_SLE_S_MMR6:
    3559             :     case Mips::CMP_SLT_D_MMR6:
    3560             :     case Mips::CMP_SLT_S_MMR6:
    3561             :     case Mips::CMP_SUEQ_D_MMR6:
    3562             :     case Mips::CMP_SUEQ_S_MMR6:
    3563             :     case Mips::CMP_SULE_D_MMR6:
    3564             :     case Mips::CMP_SULE_S_MMR6:
    3565             :     case Mips::CMP_SULT_D_MMR6:
    3566             :     case Mips::CMP_SULT_S_MMR6:
    3567             :     case Mips::CMP_SUN_D_MMR6:
    3568             :     case Mips::CMP_SUN_S_MMR6:
    3569             :     case Mips::CMP_UEQ_D_MMR6:
    3570             :     case Mips::CMP_UEQ_S_MMR6:
    3571             :     case Mips::CMP_ULE_D_MMR6:
    3572             :     case Mips::CMP_ULE_S_MMR6:
    3573             :     case Mips::CMP_ULT_D_MMR6:
    3574             :     case Mips::CMP_ULT_S_MMR6:
    3575             :     case Mips::CMP_UN_D_MMR6:
    3576             :     case Mips::CMP_UN_S_MMR6:
    3577             :     case Mips::FADD_D32_MM:
    3578             :     case Mips::FADD_D64_MM:
    3579             :     case Mips::FADD_S_MM:
    3580             :     case Mips::FDIV_D32_MM:
    3581             :     case Mips::FDIV_D64_MM:
    3582             :     case Mips::FDIV_S_MM:
    3583             :     case Mips::FMUL_D32_MM:
    3584             :     case Mips::FMUL_D64_MM:
    3585             :     case Mips::FMUL_S_MM:
    3586             :     case Mips::FSUB_D32_MM:
    3587             :     case Mips::FSUB_D64_MM:
    3588             :     case Mips::FSUB_S_MM:
    3589             :     case Mips::MAXA_D_MMR6:
    3590             :     case Mips::MAXA_S_MMR6:
    3591             :     case Mips::MAX_D_MMR6:
    3592             :     case Mips::MAX_S_MMR6:
    3593             :     case Mips::MINA_D_MMR6:
    3594             :     case Mips::MINA_S_MMR6:
    3595             :     case Mips::MIN_D_MMR6:
    3596             :     case Mips::MIN_S_MMR6:
    3597             :     case Mips::SELEQZ_D_MMR6:
    3598             :     case Mips::SELEQZ_S_MMR6:
    3599             :     case Mips::SELNEZ_D_MMR6:
    3600             :     case Mips::SELNEZ_S_MMR6: {
    3601             :       // op: ft
    3602          72 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3603          72 :       Value |= (op & UINT64_C(31)) << 21;
    3604             :       // op: fs
    3605          72 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3606          72 :       Value |= (op & UINT64_C(31)) << 16;
    3607             :       // op: fd
    3608          72 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3609          72 :       Value |= (op & UINT64_C(31)) << 11;
    3610          72 :       break;
    3611             :     }
    3612             :     case Mips::MADDF_D:
    3613             :     case Mips::MADDF_S:
    3614             :     case Mips::MSUBF_D:
    3615             :     case Mips::MSUBF_S:
    3616             :     case Mips::SEL_D:
    3617             :     case Mips::SEL_S: {
    3618             :       // op: ft
    3619          12 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    3620          12 :       Value |= (op & UINT64_C(31)) << 16;
    3621             :       // op: fs
    3622          12 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3623          12 :       Value |= (op & UINT64_C(31)) << 11;
    3624             :       // op: fd
    3625          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3626          12 :       Value |= (op & UINT64_C(31)) << 6;
    3627          12 :       break;
    3628             :     }
    3629             :     case Mips::MADDF_D_MMR6:
    3630             :     case Mips::MADDF_S_MMR6:
    3631             :     case Mips::MSUBF_D_MMR6:
    3632             :     case Mips::MSUBF_S_MMR6:
    3633             :     case Mips::SEL_D_MMR6:
    3634             :     case Mips::SEL_S_MMR6: {
    3635             :       // op: ft
    3636           6 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    3637           6 :       Value |= (op & UINT64_C(31)) << 21;
    3638             :       // op: fs
    3639           6 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3640           6 :       Value |= (op & UINT64_C(31)) << 16;
    3641             :       // op: fd
    3642           6 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3643           6 :       Value |= (op & UINT64_C(31)) << 11;
    3644           6 :       break;
    3645             :     }
    3646             :     case Mips::MADD_D32_MM:
    3647             :     case Mips::MADD_S_MM:
    3648             :     case Mips::MSUB_D32_MM:
    3649             :     case Mips::MSUB_S_MM:
    3650             :     case Mips::NMADD_D32_MM:
    3651             :     case Mips::NMADD_S_MM:
    3652             :     case Mips::NMSUB_D32_MM:
    3653             :     case Mips::NMSUB_S_MM: {
    3654             :       // op: ft
    3655          16 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    3656          16 :       Value |= (op & UINT64_C(31)) << 21;
    3657             :       // op: fs
    3658          16 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3659          16 :       Value |= (op & UINT64_C(31)) << 16;
    3660             :       // op: fd
    3661          16 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3662          16 :       Value |= (op & UINT64_C(31)) << 11;
    3663             :       // op: fr
    3664          16 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3665          16 :       Value |= (op & UINT64_C(31)) << 6;
    3666          16 :       break;
    3667             :     }
    3668             :     case Mips::ADDVI_B:
    3669             :     case Mips::ADDVI_D:
    3670             :     case Mips::ADDVI_H:
    3671             :     case Mips::ADDVI_W:
    3672             :     case Mips::CEQI_B:
    3673             :     case Mips::CEQI_D:
    3674             :     case Mips::CEQI_H:
    3675             :     case Mips::CEQI_W:
    3676             :     case Mips::CLEI_S_B:
    3677             :     case Mips::CLEI_S_D:
    3678             :     case Mips::CLEI_S_H:
    3679             :     case Mips::CLEI_S_W:
    3680             :     case Mips::CLEI_U_B:
    3681             :     case Mips::CLEI_U_D:
    3682             :     case Mips::CLEI_U_H:
    3683             :     case Mips::CLEI_U_W:
    3684             :     case Mips::CLTI_S_B:
    3685             :     case Mips::CLTI_S_D:
    3686             :     case Mips::CLTI_S_H:
    3687             :     case Mips::CLTI_S_W:
    3688             :     case Mips::CLTI_U_B:
    3689             :     case Mips::CLTI_U_D:
    3690             :     case Mips::CLTI_U_H:
    3691             :     case Mips::CLTI_U_W:
    3692             :     case Mips::MAXI_S_B:
    3693             :     case Mips::MAXI_S_D:
    3694             :     case Mips::MAXI_S_H:
    3695             :     case Mips::MAXI_S_W:
    3696             :     case Mips::MAXI_U_B:
    3697             :     case Mips::MAXI_U_D:
    3698             :     case Mips::MAXI_U_H:
    3699             :     case Mips::MAXI_U_W:
    3700             :     case Mips::MINI_S_B:
    3701             :     case Mips::MINI_S_D:
    3702             :     case Mips::MINI_S_H:
    3703             :     case Mips::MINI_S_W:
    3704             :     case Mips::MINI_U_B:
    3705             :     case Mips::MINI_U_D:
    3706             :     case Mips::MINI_U_H:
    3707             :     case Mips::MINI_U_W:
    3708             :     case Mips::SUBVI_B:
    3709             :     case Mips::SUBVI_D:
    3710             :     case Mips::SUBVI_H:
    3711             :     case Mips::SUBVI_W: {
    3712             :       // op: imm
    3713          44 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3714          44 :       Value |= (op & UINT64_C(31)) << 16;
    3715             :       // op: ws
    3716          44 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3717          44 :       Value |= (op & UINT64_C(31)) << 11;
    3718             :       // op: wd
    3719          44 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3720          44 :       Value |= (op & UINT64_C(31)) << 6;
    3721          44 :       break;
    3722             :     }
    3723          22 :     case Mips::ADDIUSP_MM: {
    3724             :       // op: imm
    3725          22 :       op = getSImm9AddiuspValue(MI, 0, Fixups, STI);
    3726          22 :       Value |= (op & UINT64_C(511)) << 1;
    3727          22 :       break;
    3728             :     }
    3729           1 :     case Mips::JRCADDIUSP_MMR6: {
    3730             :       // op: imm
    3731           1 :       op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
    3732           1 :       Value |= (op & UINT64_C(31)) << 5;
    3733           1 :       break;
    3734             :     }
    3735           3 :     case Mips::JRADDIUSP: {
    3736             :       // op: imm
    3737           3 :       op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
    3738           3 :       Value |= op & UINT64_C(31);
    3739           3 :       break;
    3740             :     }
    3741           0 :     case Mips::Bimm16: {
    3742             :       // op: imm11
    3743           0 :       op = getBranchTargetOpValue(MI, 0, Fixups, STI);
    3744           0 :       Value |= op & UINT64_C(2047);
    3745           0 :       break;
    3746             :     }
    3747             :     case Mips::AddiuRxRyOffMemX16: {
    3748             :       // op: imm15
    3749           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3750           0 :       Value |= (op & UINT64_C(2032)) << 16;
    3751           0 :       Value |= (op & UINT64_C(30720)) << 5;
    3752           0 :       Value |= op & UINT64_C(15);
    3753             :       // op: rx
    3754           0 :       op = getMemEncoding(MI, 1, Fixups, STI);
    3755           0 :       Value |= (op & UINT64_C(7)) << 8;
    3756             :       // op: ry
    3757           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3758           0 :       Value |= (op & UINT64_C(7)) << 5;
    3759           0 :       break;
    3760             :     }
    3761           0 :     case Mips::BimmX16: {
    3762             :       // op: imm16
    3763           0 :       op = getBranchTargetOpValue(MI, 0, Fixups, STI);
    3764           0 :       Value |= (op & UINT64_C(2016)) << 16;
    3765           0 :       Value |= (op & UINT64_C(63488)) << 5;
    3766           0 :       Value |= op & UINT64_C(31);
    3767           0 :       break;
    3768             :     }
    3769             :     case Mips::AddiuSpImmX16:
    3770             :     case Mips::BteqzX16:
    3771             :     case Mips::BtnezX16: {
    3772             :       // op: imm16
    3773           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3774           0 :       Value |= (op & UINT64_C(2016)) << 16;
    3775           0 :       Value |= (op & UINT64_C(63488)) << 5;
    3776           0 :       Value |= op & UINT64_C(31);
    3777           0 :       break;
    3778             :     }
    3779             :     case Mips::AddiuRxImmX16:
    3780             :     case Mips::AddiuRxPcImmX16:
    3781             :     case Mips::AddiuRxRxImmX16:
    3782             :     case Mips::BeqzRxImmX16:
    3783             :     case Mips::BnezRxImmX16:
    3784             :     case Mips::CmpiRxImmX16:
    3785             :     case Mips::LiRxImmAlignX16:
    3786             :     case Mips::LiRxImmX16:
    3787             :     case Mips::LwRxPcTcpX16:
    3788             :     case Mips::SltiRxImmX16:
    3789             :     case Mips::SltiuRxImmX16: {
    3790             :       // op: imm16
    3791           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3792           0 :       Value |= (op & UINT64_C(2016)) << 16;
    3793           0 :       Value |= (op & UINT64_C(63488)) << 5;
    3794           0 :       Value |= op & UINT64_C(31);
    3795             :       // op: rx
    3796           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3797           0 :       Value |= (op & UINT64_C(7)) << 8;
    3798           0 :       break;
    3799             :     }
    3800             :     case Mips::LbRxRyOffMemX16:
    3801             :     case Mips::LbuRxRyOffMemX16:
    3802             :     case Mips::LhRxRyOffMemX16:
    3803             :     case Mips::LhuRxRyOffMemX16:
    3804             :     case Mips::LwRxRyOffMemX16:
    3805             :     case Mips::LwRxSpImmX16:
    3806             :     case Mips::SbRxRyOffMemX16:
    3807             :     case Mips::ShRxRyOffMemX16:
    3808             :     case Mips::SwRxRyOffMemX16:
    3809             :     case Mips::SwRxSpImmX16: {
    3810             :       // op: imm16
    3811           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3812           0 :       Value |= (op & UINT64_C(2016)) << 16;
    3813           0 :       Value |= (op & UINT64_C(63488)) << 5;
    3814           0 :       Value |= op & UINT64_C(31);
    3815             :       // op: rx
    3816           0 :       op = getMemEncoding(MI, 1, Fixups, STI);
    3817           0 :       Value |= (op & UINT64_C(7)) << 8;
    3818             :       // op: ry
    3819           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3820           0 :       Value |= (op & UINT64_C(7)) << 5;
    3821           0 :       break;
    3822             :     }
    3823             :     case Mips::Jal16:
    3824             :     case Mips::JalB16: {
    3825             :       // op: imm26
    3826           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3827           0 :       Value |= (op & UINT64_C(2031616)) << 5;
    3828           0 :       Value |= (op & UINT64_C(65011712)) >> 5;
    3829           0 :       Value |= op & UINT64_C(65535);
    3830           0 :       break;
    3831             :     }
    3832             :     case Mips::AddiuSpImm16:
    3833             :     case Mips::Bteqz16:
    3834             :     case Mips::Btnez16: {
    3835             :       // op: imm8
    3836           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3837           0 :       Value |= op & UINT64_C(255);
    3838           0 :       break;
    3839             :     }
    3840             :     case Mips::PREFX_MM: {
    3841             :       // op: index
    3842           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3843           3 :       Value |= (op & UINT64_C(31)) << 21;
    3844             :       // op: base
    3845           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3846           3 :       Value |= (op & UINT64_C(31)) << 16;
    3847             :       // op: hint
    3848           3 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3849           3 :       Value |= (op & UINT64_C(31)) << 11;
    3850           3 :       break;
    3851             :     }
    3852             :     case Mips::LBUX_MM:
    3853             :     case Mips::LHX_MM:
    3854             :     case Mips::LWX_MM: {
    3855             :       // op: index
    3856           3 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3857           3 :       Value |= (op & UINT64_C(31)) << 21;
    3858             :       // op: base
    3859           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3860           3 :       Value |= (op & UINT64_C(31)) << 16;
    3861             :       // op: rd
    3862           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3863           3 :       Value |= (op & UINT64_C(31)) << 11;
    3864           3 :       break;
    3865             :     }
    3866             :     case Mips::COPY_S_D: {
    3867             :       // op: n
    3868           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3869           1 :       Value |= (op & UINT64_C(1)) << 16;
    3870             :       // op: ws
    3871           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3872           1 :       Value |= (op & UINT64_C(31)) << 11;
    3873             :       // op: rd
    3874           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3875           1 :       Value |= (op & UINT64_C(31)) << 6;
    3876           1 :       break;
    3877             :     }
    3878             :     case Mips::SPLATI_D: {
    3879             :       // op: n
    3880           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3881           1 :       Value |= (op & UINT64_C(1)) << 16;
    3882             :       // op: ws
    3883           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3884           1 :       Value |= (op & UINT64_C(31)) << 11;
    3885             :       // op: wd
    3886           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3887           1 :       Value |= (op & UINT64_C(31)) << 6;
    3888           1 :       break;
    3889             :     }
    3890             :     case Mips::INSVE_D: {
    3891             :       // op: n
    3892           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3893           1 :       Value |= (op & UINT64_C(1)) << 16;
    3894             :       // op: ws
    3895           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    3896           1 :       Value |= (op & UINT64_C(31)) << 11;
    3897             :       // op: wd
    3898           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3899           1 :       Value |= (op & UINT64_C(31)) << 6;
    3900           1 :       break;
    3901             :     }
    3902             :     case Mips::COPY_S_B:
    3903             :     case Mips::COPY_U_B: {
    3904             :       // op: n
    3905           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3906           2 :       Value |= (op & UINT64_C(15)) << 16;
    3907             :       // op: ws
    3908           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3909           2 :       Value |= (op & UINT64_C(31)) << 11;
    3910             :       // op: rd
    3911           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3912           2 :       Value |= (op & UINT64_C(31)) << 6;
    3913           2 :       break;
    3914             :     }
    3915             :     case Mips::SPLATI_B: {
    3916             :       // op: n
    3917           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3918           1 :       Value |= (op & UINT64_C(15)) << 16;
    3919             :       // op: ws
    3920           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3921           1 :       Value |= (op & UINT64_C(31)) << 11;
    3922             :       // op: wd
    3923           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3924           1 :       Value |= (op & UINT64_C(31)) << 6;
    3925           1 :       break;
    3926             :     }
    3927             :     case Mips::INSVE_B: {
    3928             :       // op: n
    3929           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3930           1 :       Value |= (op & UINT64_C(15)) << 16;
    3931             :       // op: ws
    3932           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    3933           1 :       Value |= (op & UINT64_C(31)) << 11;
    3934             :       // op: wd
    3935           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3936           1 :       Value |= (op & UINT64_C(31)) << 6;
    3937           1 :       break;
    3938             :     }
    3939             :     case Mips::COPY_S_W:
    3940             :     case Mips::COPY_U_W: {
    3941             :       // op: n
    3942           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3943           1 :       Value |= (op & UINT64_C(3)) << 16;
    3944             :       // op: ws
    3945           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3946           1 :       Value |= (op & UINT64_C(31)) << 11;
    3947             :       // op: rd
    3948           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3949           1 :       Value |= (op & UINT64_C(31)) << 6;
    3950           1 :       break;
    3951             :     }
    3952             :     case Mips::SPLATI_W: {
    3953             :       // op: n
    3954           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3955           1 :       Value |= (op & UINT64_C(3)) << 16;
    3956             :       // op: ws
    3957           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3958           1 :       Value |= (op & UINT64_C(31)) << 11;
    3959             :       // op: wd
    3960           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3961           1 :       Value |= (op & UINT64_C(31)) << 6;
    3962           1 :       break;
    3963             :     }
    3964             :     case Mips::INSVE_W: {
    3965             :       // op: n
    3966           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3967           1 :       Value |= (op & UINT64_C(3)) << 16;
    3968             :       // op: ws
    3969           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    3970           1 :       Value |= (op & UINT64_C(31)) << 11;
    3971             :       // op: wd
    3972           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3973           1 :       Value |= (op & UINT64_C(31)) << 6;
    3974           1 :       break;
    3975             :     }
    3976             :     case Mips::COPY_S_H:
    3977             :     case Mips::COPY_U_H: {
    3978             :       // op: n
    3979           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3980           2 :       Value |= (op & UINT64_C(7)) << 16;
    3981             :       // op: ws
    3982           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3983           2 :       Value |= (op & UINT64_C(31)) << 11;
    3984             :       // op: rd
    3985           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3986           2 :       Value |= (op & UINT64_C(31)) << 6;
    3987           2 :       break;
    3988             :     }
    3989             :     case Mips::SPLATI_H: {
    3990             :       // op: n
    3991           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    3992           1 :       Value |= (op & UINT64_C(7)) << 16;
    3993             :       // op: ws
    3994           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    3995           1 :       Value |= (op & UINT64_C(31)) << 11;
    3996             :       // op: wd
    3997           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    3998           1 :       Value |= (op & UINT64_C(31)) << 6;
    3999           1 :       break;
    4000             :     }
    4001             :     case Mips::INSVE_H: {
    4002             :       // op: n
    4003           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4004           1 :       Value |= (op & UINT64_C(7)) << 16;
    4005             :       // op: ws
    4006           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4007           1 :       Value |= (op & UINT64_C(31)) << 11;
    4008             :       // op: wd
    4009           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4010           1 :       Value |= (op & UINT64_C(31)) << 6;
    4011           1 :       break;
    4012             :     }
    4013             :     case Mips::INSERT_D: {
    4014             :       // op: n
    4015           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4016           1 :       Value |= (op & UINT64_C(1)) << 16;
    4017             :       // op: rs
    4018           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4019           1 :       Value |= (op & UINT64_C(31)) << 11;
    4020             :       // op: wd
    4021           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4022           1 :       Value |= (op & UINT64_C(31)) << 6;
    4023           1 :       break;
    4024             :     }
    4025             :     case Mips::SLDI_D: {
    4026             :       // op: n
    4027           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4028           1 :       Value |= (op & UINT64_C(1)) << 16;
    4029             :       // op: ws
    4030           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4031           1 :       Value |= (op & UINT64_C(31)) << 11;
    4032             :       // op: wd
    4033           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4034           1 :       Value |= (op & UINT64_C(31)) << 6;
    4035           1 :       break;
    4036             :     }
    4037             :     case Mips::INSERT_B: {
    4038             :       // op: n
    4039           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4040           1 :       Value |= (op & UINT64_C(15)) << 16;
    4041             :       // op: rs
    4042           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4043           1 :       Value |= (op & UINT64_C(31)) << 11;
    4044             :       // op: wd
    4045           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4046           1 :       Value |= (op & UINT64_C(31)) << 6;
    4047           1 :       break;
    4048             :     }
    4049             :     case Mips::SLDI_B: {
    4050             :       // op: n
    4051           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4052           1 :       Value |= (op & UINT64_C(15)) << 16;
    4053             :       // op: ws
    4054           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4055           1 :       Value |= (op & UINT64_C(31)) << 11;
    4056             :       // op: wd
    4057           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4058           1 :       Value |= (op & UINT64_C(31)) << 6;
    4059           1 :       break;
    4060             :     }
    4061             :     case Mips::INSERT_W: {
    4062             :       // op: n
    4063           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4064           1 :       Value |= (op & UINT64_C(3)) << 16;
    4065             :       // op: rs
    4066           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4067           1 :       Value |= (op & UINT64_C(31)) << 11;
    4068             :       // op: wd
    4069           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4070           1 :       Value |= (op & UINT64_C(31)) << 6;
    4071           1 :       break;
    4072             :     }
    4073             :     case Mips::SLDI_W: {
    4074             :       // op: n
    4075           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4076           1 :       Value |= (op & UINT64_C(3)) << 16;
    4077             :       // op: ws
    4078           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4079           1 :       Value |= (op & UINT64_C(31)) << 11;
    4080             :       // op: wd
    4081           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4082           1 :       Value |= (op & UINT64_C(31)) << 6;
    4083           1 :       break;
    4084             :     }
    4085             :     case Mips::INSERT_H: {
    4086             :       // op: n
    4087           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4088           1 :       Value |= (op & UINT64_C(7)) << 16;
    4089             :       // op: rs
    4090           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4091           1 :       Value |= (op & UINT64_C(31)) << 11;
    4092             :       // op: wd
    4093           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4094           1 :       Value |= (op & UINT64_C(31)) << 6;
    4095           1 :       break;
    4096             :     }
    4097             :     case Mips::SLDI_H: {
    4098             :       // op: n
    4099           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4100           1 :       Value |= (op & UINT64_C(7)) << 16;
    4101             :       // op: ws
    4102           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4103           1 :       Value |= (op & UINT64_C(31)) << 11;
    4104             :       // op: wd
    4105           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4106           1 :       Value |= (op & UINT64_C(31)) << 6;
    4107           1 :       break;
    4108             :     }
    4109          27 :     case Mips::BALC:
    4110             :     case Mips::BC: {
    4111             :       // op: offset
    4112          27 :       op = getBranchTarget26OpValue(MI, 0, Fixups, STI);
    4113          27 :       Value |= op & UINT64_C(67108863);
    4114          27 :       break;
    4115             :     }
    4116          13 :     case Mips::BALC_MMR6:
    4117             :     case Mips::BC_MMR6: {
    4118             :       // op: offset
    4119          13 :       op = getBranchTarget26OpValueMM(MI, 0, Fixups, STI);
    4120          13 :       Value |= op & UINT64_C(67108863);
    4121          13 :       break;
    4122             :     }
    4123           4 :     case Mips::BAL:
    4124             :     case Mips::BPOSGE32: {
    4125             :       // op: offset
    4126           4 :       op = getBranchTargetOpValue(MI, 0, Fixups, STI);
    4127           4 :       Value |= op & UINT64_C(65535);
    4128           4 :       break;
    4129             :     }
    4130          20 :     case Mips::BNZ_B:
    4131             :     case Mips::BNZ_D:
    4132             :     case Mips::BNZ_H:
    4133             :     case Mips::BNZ_V:
    4134             :     case Mips::BNZ_W:
    4135             :     case Mips::BZ_B:
    4136             :     case Mips::BZ_D:
    4137             :     case Mips::BZ_H:
    4138             :     case Mips::BZ_V:
    4139             :     case Mips::BZ_W: {
    4140             :       // op: offset
    4141          20 :       op = getBranchTargetOpValue(MI, 1, Fixups, STI);
    4142          20 :       Value |= op & UINT64_C(65535);
    4143             :       // op: wt
    4144          20 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4145          20 :       Value |= (op & UINT64_C(31)) << 16;
    4146          20 :       break;
    4147             :     }
    4148           1 :     case Mips::BPOSGE32C_MMR3: {
    4149             :       // op: offset
    4150           1 :       op = getBranchTargetOpValue1SImm16(MI, 0, Fixups, STI);
    4151           1 :       Value |= op & UINT64_C(65535);
    4152           1 :       break;
    4153             :     }
    4154           1 :     case Mips::BPOSGE32_MM: {
    4155             :       // op: offset
    4156           1 :       op = getBranchTargetOpValueMM(MI, 0, Fixups, STI);
    4157           1 :       Value |= op & UINT64_C(65535);
    4158           1 :       break;
    4159             :     }
    4160          12 :     case Mips::B16_MM:
    4161             :     case Mips::BC16_MMR6: {
    4162             :       // op: offset
    4163          12 :       op = getBranchTargetOpValueMMPC10(MI, 0, Fixups, STI);
    4164          12 :       Value |= op & UINT64_C(1023);
    4165          12 :       break;
    4166             :     }
    4167             :     case Mips::Move32R16: {
    4168             :       // op: r32
    4169           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4170           0 :       Value |= (op & UINT64_C(7)) << 5;
    4171           0 :       Value |= op & UINT64_C(24);
    4172             :       // op: rz
    4173           0 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4174           0 :       Value |= op & UINT64_C(7);
    4175           0 :       break;
    4176             :     }
    4177             :     case Mips::MFHI:
    4178             :     case Mips::MFHI64:
    4179             :     case Mips::MFLO:
    4180             :     case Mips::MFLO64: {
    4181             :       // op: rd
    4182         347 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4183         347 :       Value |= (op & UINT64_C(31)) << 11;
    4184         347 :       break;
    4185             :     }
    4186             :     case Mips::MFHI_DSP:
    4187             :     case Mips::MFLO_DSP: {
    4188             :       // op: rd
    4189           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4190           4 :       Value |= (op & UINT64_C(31)) << 11;
    4191             :       // op: ac
    4192           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4193           4 :       Value |= (op & UINT64_C(3)) << 21;
    4194           4 :       break;
    4195             :     }
    4196             :     case Mips::LWXS_MM: {
    4197             :       // op: rd
    4198           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4199           3 :       Value |= (op & UINT64_C(31)) << 11;
    4200             :       // op: base
    4201           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4202           3 :       Value |= (op & UINT64_C(31)) << 16;
    4203             :       // op: index
    4204           3 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4205           3 :       Value |= (op & UINT64_C(31)) << 21;
    4206           3 :       break;
    4207             :     }
    4208             :     case Mips::LBUX:
    4209             :     case Mips::LHX:
    4210             :     case Mips::LWX: {
    4211             :       // op: rd
    4212           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4213           8 :       Value |= (op & UINT64_C(31)) << 11;
    4214             :       // op: base
    4215           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4216           8 :       Value |= (op & UINT64_C(31)) << 21;
    4217             :       // op: index
    4218           8 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4219           8 :       Value |= (op & UINT64_C(31)) << 16;
    4220           8 :       break;
    4221             :     }
    4222             :     case Mips::REPL_PH:
    4223             :     case Mips::REPL_PH_MM:
    4224             :     case Mips::REPL_QB: {
    4225             :       // op: rd
    4226           5 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4227           5 :       Value |= (op & UINT64_C(31)) << 11;
    4228             :       // op: imm
    4229           5 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4230           5 :       Value |= (op & UINT64_C(1023)) << 16;
    4231           5 :       break;
    4232             :     }
    4233             :     case Mips::RDDSP: {
    4234             :       // op: rd
    4235           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4236           2 :       Value |= (op & UINT64_C(31)) << 11;
    4237             :       // op: mask
    4238           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4239           2 :       Value |= (op & UINT64_C(1023)) << 16;
    4240           2 :       break;
    4241             :     }
    4242             :     case Mips::ADDQH_PH_MMR2:
    4243             :     case Mips::ADDQH_R_PH_MMR2:
    4244             :     case Mips::ADDQH_R_W_MMR2:
    4245             :     case Mips::ADDQH_W_MMR2:
    4246             :     case Mips::ADDQ_PH_MM:
    4247             :     case Mips::ADDQ_S_PH_MM:
    4248             :     case Mips::ADDQ_S_W_MM:
    4249             :     case Mips::ADDSC_MM:
    4250             :     case Mips::ADDUH_QB_MMR2:
    4251             :     case Mips::ADDUH_R_QB_MMR2:
    4252             :     case Mips::ADDU_PH_MMR2:
    4253             :     case Mips::ADDU_QB_MM:
    4254             :     case Mips::ADDU_S_PH_MMR2:
    4255             :     case Mips::ADDU_S_QB_MM:
    4256             :     case Mips::ADDWC_MM:
    4257             :     case Mips::CMPGDU_EQ_QB_MMR2:
    4258             :     case Mips::CMPGDU_LE_QB_MMR2:
    4259             :     case Mips::CMPGDU_LT_QB_MMR2:
    4260             :     case Mips::MODSUB_MM:
    4261             :     case Mips::MULEQ_S_W_PHL_MM:
    4262             :     case Mips::MULEQ_S_W_PHR_MM:
    4263             :     case Mips::MULEU_S_PH_QBL_MM:
    4264             :     case Mips::MULEU_S_PH_QBR_MM:
    4265             :     case Mips::MULQ_RS_PH_MM:
    4266             :     case Mips::MULQ_RS_W_MMR2:
    4267             :     case Mips::MULQ_S_PH_MMR2:
    4268             :     case Mips::MULQ_S_W_MMR2:
    4269             :     case Mips::MUL_PH_MMR2:
    4270             :     case Mips::MUL_S_PH_MMR2:
    4271             :     case Mips::PACKRL_PH_MM:
    4272             :     case Mips::PICK_PH_MM:
    4273             :     case Mips::PICK_QB_MM:
    4274             :     case Mips::PRECRQU_S_QB_PH_MM:
    4275             :     case Mips::PRECRQ_PH_W_MM:
    4276             :     case Mips::PRECRQ_QB_PH_MM:
    4277             :     case Mips::PRECRQ_RS_PH_W_MM:
    4278             :     case Mips::PRECR_QB_PH_MMR2:
    4279             :     case Mips::SELEQZ_MMR6:
    4280             :     case Mips::SELNEZ_MMR6:
    4281             :     case Mips::SUBQH_PH_MMR2:
    4282             :     case Mips::SUBQH_R_PH_MMR2:
    4283             :     case Mips::SUBQH_R_W_MMR2:
    4284             :     case Mips::SUBQH_W_MMR2:
    4285             :     case Mips::SUBQ_PH_MM:
    4286             :     case Mips::SUBQ_S_PH_MM:
    4287             :     case Mips::SUBQ_S_W_MM:
    4288             :     case Mips::SUBUH_QB_MMR2:
    4289             :     case Mips::SUBUH_R_QB_MMR2:
    4290             :     case Mips::SUBU_PH_MMR2:
    4291             :     case Mips::SUBU_QB_MM:
    4292             :     case Mips::SUBU_S_PH_MMR2:
    4293             :     case Mips::SUBU_S_QB_MM: {
    4294             :       // op: rd
    4295          78 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4296          78 :       Value |= (op & UINT64_C(31)) << 11;
    4297             :       // op: rs
    4298          78 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4299          78 :       Value |= (op & UINT64_C(31)) << 16;
    4300             :       // op: rt
    4301          78 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4302          78 :       Value |= (op & UINT64_C(31)) << 21;
    4303          78 :       break;
    4304             :     }
    4305             :     case Mips::LSA_MMR6: {
    4306             :       // op: rd
    4307           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4308           1 :       Value |= (op & UINT64_C(31)) << 11;
    4309             :       // op: rs
    4310           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4311           1 :       Value |= (op & UINT64_C(31)) << 16;
    4312             :       // op: rt
    4313           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4314           1 :       Value |= (op & UINT64_C(31)) << 21;
    4315             :       // op: imm2
    4316           1 :       op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
    4317           1 :       Value |= (op & UINT64_C(3)) << 9;
    4318           1 :       break;
    4319             :     }
    4320             :     case Mips::CLO_R6:
    4321             :     case Mips::CLZ_R6:
    4322             :     case Mips::DCLO_R6:
    4323             :     case Mips::DCLZ_R6:
    4324             :     case Mips::DPOP:
    4325             :     case Mips::JALR:
    4326             :     case Mips::JALR64:
    4327             :     case Mips::JALR_HB:
    4328             :     case Mips::JALR_HB64:
    4329             :     case Mips::POP:
    4330             :     case Mips::RADDU_W_QB: {
    4331             :       // op: rd
    4332         149 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4333         149 :       Value |= (op & UINT64_C(31)) << 11;
    4334             :       // op: rs
    4335         149 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4336         149 :       Value |= (op & UINT64_C(31)) << 21;
    4337         149 :       break;
    4338             :     }
    4339             :     case Mips::MOVF_I:
    4340             :     case Mips::MOVF_I64:
    4341             :     case Mips::MOVT_I:
    4342             :     case Mips::MOVT_I64: {
    4343             :       // op: rd
    4344          26 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4345          26 :       Value |= (op & UINT64_C(31)) << 11;
    4346             :       // op: rs
    4347          26 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4348          26 :       Value |= (op & UINT64_C(31)) << 21;
    4349             :       // op: fcc
    4350          26 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4351          26 :       Value |= (op & UINT64_C(7)) << 18;
    4352          26 :       break;
    4353             :     }
    4354             :     case Mips::ADD:
    4355             :     case Mips::ADDQH_PH:
    4356             :     case Mips::ADDQH_R_PH:
    4357             :     case Mips::ADDQH_R_W:
    4358             :     case Mips::ADDQH_W:
    4359             :     case Mips::ADDQ_PH:
    4360             :     case Mips::ADDQ_S_PH:
    4361             :     case Mips::ADDQ_S_W:
    4362             :     case Mips::ADDSC:
    4363             :     case Mips::ADDUH_QB:
    4364             :     case Mips::ADDUH_R_QB:
    4365             :     case Mips::ADDU_PH:
    4366             :     case Mips::ADDU_QB:
    4367             :     case Mips::ADDU_S_PH:
    4368             :     case Mips::ADDU_S_QB:
    4369             :     case Mips::ADDWC:
    4370             :     case Mips::ADDu:
    4371             :     case Mips::AND:
    4372             :     case Mips::AND64:
    4373             :     case Mips::BADDu:
    4374             :     case Mips::DADD:
    4375             :     case Mips::DADDu:
    4376             :     case Mips::DDIV:
    4377             :     case Mips::DDIVU:
    4378             :     case Mips::DIV:
    4379             :     case Mips::DIVU:
    4380             :     case Mips::DMOD:
    4381             :     case Mips::DMODU:
    4382             :     case Mips::DMUH:
    4383             :     case Mips::DMUHU:
    4384             :     case Mips::DMUL:
    4385             :     case Mips::DMULU:
    4386             :     case Mips::DMUL_R6:
    4387             :     case Mips::DSUB:
    4388             :     case Mips::DSUBu:
    4389             :     case Mips::MOD:
    4390             :     case Mips::MODSUB:
    4391             :     case Mips::MODU:
    4392             :     case Mips::MOVN_I64_I:
    4393             :     case Mips::MOVN_I64_I64:
    4394             :     case Mips::MOVN_I_I:
    4395             :     case Mips::MOVN_I_I64:
    4396             :     case Mips::MOVZ_I64_I:
    4397             :     case Mips::MOVZ_I64_I64:
    4398             :     case Mips::MOVZ_I_I:
    4399             :     case Mips::MOVZ_I_I64:
    4400             :     case Mips::MUH:
    4401             :     case Mips::MUHU:
    4402             :     case Mips::MUL:
    4403             :     case Mips::MULEQ_S_W_PHL:
    4404             :     case Mips::MULEQ_S_W_PHR:
    4405             :     case Mips::MULEU_S_PH_QBL:
    4406             :     case Mips::MULEU_S_PH_QBR:
    4407             :     case Mips::MULQ_RS_PH:
    4408             :     case Mips::MULQ_RS_W:
    4409             :     case Mips::MULQ_S_PH:
    4410             :     case Mips::MULQ_S_W:
    4411             :     case Mips::MULU:
    4412             :     case Mips::MUL_PH:
    4413             :     case Mips::MUL_R6:
    4414             :     case Mips::MUL_S_PH:
    4415             :     case Mips::NOR:
    4416             :     case Mips::NOR64:
    4417             :     case Mips::OR:
    4418             :     case Mips::OR64:
    4419             :     case Mips::SELEQZ:
    4420             :     case Mips::SELEQZ64:
    4421             :     case Mips::SELNEZ:
    4422             :     case Mips::SELNEZ64:
    4423             :     case Mips::SEQ:
    4424             :     case Mips::SLT:
    4425             :     case Mips::SLT64:
    4426             :     case Mips::SLTu:
    4427             :     case Mips::SLTu64:
    4428             :     case Mips::SNE:
    4429             :     case Mips::SUB:
    4430             :     case Mips::SUBQH_PH:
    4431             :     case Mips::SUBQH_R_PH:
    4432             :     case Mips::SUBQH_R_W:
    4433             :     case Mips::SUBQH_W:
    4434             :     case Mips::SUBQ_PH:
    4435             :     case Mips::SUBQ_S_PH:
    4436             :     case Mips::SUBQ_S_W:
    4437             :     case Mips::SUBUH_QB:
    4438             :     case Mips::SUBUH_R_QB:
    4439             :     case Mips::SUBU_PH:
    4440             :     case Mips::SUBU_QB:
    4441             :     case Mips::SUBU_S_PH:
    4442             :     case Mips::SUBU_S_QB:
    4443             :     case Mips::SUBu:
    4444             :     case Mips::V3MULU:
    4445             :     case Mips::VMM0:
    4446             :     case Mips::VMULU:
    4447             :     case Mips::XOR:
    4448             :     case Mips::XOR64: {
    4449             :       // op: rd
    4450        1936 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4451        1936 :       Value |= (op & UINT64_C(31)) << 11;
    4452             :       // op: rs
    4453        1936 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4454        1936 :       Value |= (op & UINT64_C(31)) << 21;
    4455             :       // op: rt
    4456        1936 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4457        1936 :       Value |= (op & UINT64_C(31)) << 16;
    4458        1936 :       break;
    4459             :     }
    4460             :     case Mips::ALIGN: {
    4461             :       // op: rd
    4462           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4463           3 :       Value |= (op & UINT64_C(31)) << 11;
    4464             :       // op: rs
    4465           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4466           3 :       Value |= (op & UINT64_C(31)) << 21;
    4467             :       // op: rt
    4468           3 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4469           3 :       Value |= (op & UINT64_C(31)) << 16;
    4470             :       // op: bp
    4471           3 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4472           3 :       Value |= (op & UINT64_C(3)) << 6;
    4473           3 :       break;
    4474             :     }
    4475             :     case Mips::ALIGN_MMR6: {
    4476             :       // op: rd
    4477           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4478           1 :       Value |= (op & UINT64_C(31)) << 11;
    4479             :       // op: rs
    4480           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4481           1 :       Value |= (op & UINT64_C(31)) << 21;
    4482             :       // op: rt
    4483           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4484           1 :       Value |= (op & UINT64_C(31)) << 16;
    4485             :       // op: bp
    4486           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4487           1 :       Value |= (op & UINT64_C(3)) << 9;
    4488           1 :       break;
    4489             :     }
    4490             :     case Mips::DALIGN: {
    4491             :       // op: rd
    4492           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4493           1 :       Value |= (op & UINT64_C(31)) << 11;
    4494             :       // op: rs
    4495           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4496           1 :       Value |= (op & UINT64_C(31)) << 21;
    4497             :       // op: rt
    4498           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4499           1 :       Value |= (op & UINT64_C(31)) << 16;
    4500             :       // op: bp
    4501           1 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    4502           1 :       Value |= (op & UINT64_C(7)) << 6;
    4503           1 :       break;
    4504             :     }
    4505             :     case Mips::DLSA_R6:
    4506             :     case Mips::LSA_R6: {
    4507             :       // op: rd
    4508           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4509           3 :       Value |= (op & UINT64_C(31)) << 11;
    4510             :       // op: rs
    4511           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4512           3 :       Value |= (op & UINT64_C(31)) << 21;
    4513             :       // op: rt
    4514           3 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4515           3 :       Value |= (op & UINT64_C(31)) << 16;
    4516             :       // op: imm2
    4517           3 :       op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
    4518           3 :       Value |= (op & UINT64_C(3)) << 6;
    4519           3 :       break;
    4520             :     }
    4521             :     case Mips::SHLLV_PH_MM:
    4522             :     case Mips::SHLLV_QB_MM:
    4523             :     case Mips::SHLLV_S_PH_MM:
    4524             :     case Mips::SHLLV_S_W_MM:
    4525             :     case Mips::SHRAV_PH_MM:
    4526             :     case Mips::SHRAV_QB_MMR2:
    4527             :     case Mips::SHRAV_R_PH_MM:
    4528             :     case Mips::SHRAV_R_QB_MMR2:
    4529             :     case Mips::SHRAV_R_W_MM:
    4530             :     case Mips::SHRLV_PH_MMR2:
    4531             :     case Mips::SHRLV_QB_MM: {
    4532             :       // op: rd
    4533          19 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4534          19 :       Value |= (op & UINT64_C(31)) << 11;
    4535             :       // op: rs
    4536          19 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4537          19 :       Value |= (op & UINT64_C(31)) << 16;
    4538             :       // op: rt
    4539          19 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4540          19 :       Value |= (op & UINT64_C(31)) << 21;
    4541          19 :       break;
    4542             :     }
    4543             :     case Mips::ABSQ_S_PH:
    4544             :     case Mips::ABSQ_S_QB:
    4545             :     case Mips::ABSQ_S_W:
    4546             :     case Mips::BITREV:
    4547             :     case Mips::BITSWAP:
    4548             :     case Mips::DBITSWAP:
    4549             :     case Mips::DSBH:
    4550             :     case Mips::DSHD:
    4551             :     case Mips::DSLL64_32:
    4552             :     case Mips::PRECEQU_PH_QBL:
    4553             :     case Mips::PRECEQU_PH_QBLA:
    4554             :     case Mips::PRECEQU_PH_QBR:
    4555             :     case Mips::PRECEQU_PH_QBRA:
    4556             :     case Mips::PRECEQ_W_PHL:
    4557             :     case Mips::PRECEQ_W_PHR:
    4558             :     case Mips::PRECEU_PH_QBL:
    4559             :     case Mips::PRECEU_PH_QBLA:
    4560             :     case Mips::PRECEU_PH_QBR:
    4561             :     case Mips::PRECEU_PH_QBRA:
    4562             :     case Mips::REPLV_PH:
    4563             :     case Mips::REPLV_QB:
    4564             :     case Mips::SEB:
    4565             :     case Mips::SEB64:
    4566             :     case Mips::SEH:
    4567             :     case Mips::SEH64:
    4568             :     case Mips::SLL64_32:
    4569             :     case Mips::SLL64_64:
    4570             :     case Mips::WSBH: {
    4571             :       // op: rd
    4572          82 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4573          82 :       Value |= (op & UINT64_C(31)) << 11;
    4574             :       // op: rt
    4575          82 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4576          82 :       Value |= (op & UINT64_C(31)) << 16;
    4577          82 :       break;
    4578             :     }
    4579             :     case Mips::DROTRV:
    4580             :     case Mips::DSLLV:
    4581             :     case Mips::DSRAV:
    4582             :     case Mips::DSRLV:
    4583             :     case Mips::ROTRV:
    4584             :     case Mips::SLLV:
    4585             :     case Mips::SRAV:
    4586             :     case Mips::SRLV: {
    4587             :       // op: rd
    4588         306 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4589         306 :       Value |= (op & UINT64_C(31)) << 11;
    4590             :       // op: rt
    4591         306 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4592         306 :       Value |= (op & UINT64_C(31)) << 16;
    4593             :       // op: rs
    4594         306 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4595         306 :       Value |= (op & UINT64_C(31)) << 21;
    4596         306 :       break;
    4597             :     }
    4598             :     case Mips::SHLLV_PH:
    4599             :     case Mips::SHLLV_QB:
    4600             :     case Mips::SHLLV_S_PH:
    4601             :     case Mips::SHLLV_S_W:
    4602             :     case Mips::SHLL_PH:
    4603             :     case Mips::SHLL_QB:
    4604             :     case Mips::SHLL_S_PH:
    4605             :     case Mips::SHLL_S_W:
    4606             :     case Mips::SHRAV_PH:
    4607             :     case Mips::SHRAV_QB:
    4608             :     case Mips::SHRAV_R_PH:
    4609             :     case Mips::SHRAV_R_QB:
    4610             :     case Mips::SHRAV_R_W:
    4611             :     case Mips::SHRA_PH:
    4612             :     case Mips::SHRA_QB:
    4613             :     case Mips::SHRA_R_PH:
    4614             :     case Mips::SHRA_R_QB:
    4615             :     case Mips::SHRA_R_W:
    4616             :     case Mips::SHRLV_PH:
    4617             :     case Mips::SHRLV_QB:
    4618             :     case Mips::SHRL_PH:
    4619             :     case Mips::SHRL_QB: {
    4620             :       // op: rd
    4621          38 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4622          38 :       Value |= (op & UINT64_C(31)) << 11;
    4623             :       // op: rt
    4624          38 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4625          38 :       Value |= (op & UINT64_C(31)) << 16;
    4626             :       // op: rs_sa
    4627          38 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4628          38 :       Value |= (op & UINT64_C(31)) << 21;
    4629          38 :       break;
    4630             :     }
    4631             :     case Mips::DROTR:
    4632             :     case Mips::DROTR32:
    4633             :     case Mips::DSLL:
    4634             :     case Mips::DSLL32:
    4635             :     case Mips::DSRA:
    4636             :     case Mips::DSRA32:
    4637             :     case Mips::DSRL:
    4638             :     case Mips::DSRL32:
    4639             :     case Mips::ROTR:
    4640             :     case Mips::SLL:
    4641             :     case Mips::SRA:
    4642             :     case Mips::SRL: {
    4643             :       // op: rd
    4644       13282 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4645       13282 :       Value |= (op & UINT64_C(31)) << 11;
    4646             :       // op: rt
    4647       13282 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4648       13282 :       Value |= (op & UINT64_C(31)) << 16;
    4649             :       // op: shamt
    4650       13282 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4651       13282 :       Value |= (op & UINT64_C(31)) << 6;
    4652       13282 :       break;
    4653             :     }
    4654             :     case Mips::ROTRV_MM:
    4655             :     case Mips::SLLV_MM:
    4656             :     case Mips::SRAV_MM:
    4657             :     case Mips::SRLV_MM: {
    4658             :       // op: rd
    4659          44 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4660          44 :       Value |= (op & UINT64_C(31)) << 11;
    4661             :       // op: rt
    4662          44 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4663          44 :       Value |= (op & UINT64_C(31)) << 21;
    4664             :       // op: rs
    4665          44 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4666          44 :       Value |= (op & UINT64_C(31)) << 16;
    4667          44 :       break;
    4668             :     }
    4669             :     case Mips::ADDU_MMR6:
    4670             :     case Mips::ADD_MMR6:
    4671             :     case Mips::AND_MMR6:
    4672             :     case Mips::DIVU_MMR6:
    4673             :     case Mips::DIV_MMR6:
    4674             :     case Mips::MODU_MMR6:
    4675             :     case Mips::MOD_MMR6:
    4676             :     case Mips::MUHU_MMR6:
    4677             :     case Mips::MUH_MMR6:
    4678             :     case Mips::MULU_MMR6:
    4679             :     case Mips::MUL_MMR6:
    4680             :     case Mips::NOR_MMR6:
    4681             :     case Mips::OR_MMR6:
    4682             :     case Mips::SUBU_MMR6:
    4683             :     case Mips::SUB_MMR6:
    4684             :     case Mips::XOR_MMR6: {
    4685             :       // op: rd
    4686          17 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4687          17 :       Value |= (op & UINT64_C(31)) << 11;
    4688             :       // op: rt
    4689          17 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4690          17 :       Value |= (op & UINT64_C(31)) << 21;
    4691             :       // op: rs
    4692          17 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4693          17 :       Value |= (op & UINT64_C(31)) << 16;
    4694          17 :       break;
    4695             :     }
    4696             :     case Mips::MFHI_MM:
    4697             :     case Mips::MFLO_MM: {
    4698             :       // op: rd
    4699           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4700           0 :       Value |= (op & UINT64_C(31)) << 16;
    4701           0 :       break;
    4702             :     }
    4703             :     case Mips::BITSWAP_MMR6: {
    4704             :       // op: rd
    4705           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4706           1 :       Value |= (op & UINT64_C(31)) << 16;
    4707             :       // op: rt
    4708           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4709           1 :       Value |= (op & UINT64_C(31)) << 21;
    4710           1 :       break;
    4711             :     }
    4712             :     case Mips::CLO:
    4713             :     case Mips::CLZ:
    4714             :     case Mips::DCLO:
    4715             :     case Mips::DCLZ: {
    4716             :       // op: rd
    4717          29 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4718          29 :       Value |= (op & UINT64_C(31)) << 16;
    4719          29 :       Value |= (op & UINT64_C(31)) << 11;
    4720             :       // op: rs
    4721          29 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4722          29 :       Value |= (op & UINT64_C(31)) << 21;
    4723          29 :       break;
    4724             :     }
    4725             :     case Mips::CLO_MM:
    4726             :     case Mips::CLZ_MM: {
    4727             :       // op: rd
    4728           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4729           2 :       Value |= (op & UINT64_C(31)) << 21;
    4730             :       // op: rs
    4731           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4732           2 :       Value |= (op & UINT64_C(31)) << 16;
    4733           2 :       break;
    4734             :     }
    4735             :     case Mips::MOVF_I_MM:
    4736             :     case Mips::MOVT_I_MM: {
    4737             :       // op: rd
    4738           6 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4739           6 :       Value |= (op & UINT64_C(31)) << 21;
    4740             :       // op: rs
    4741           6 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4742           6 :       Value |= (op & UINT64_C(31)) << 16;
    4743             :       // op: fcc
    4744           6 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4745           6 :       Value |= (op & UINT64_C(7)) << 13;
    4746           6 :       break;
    4747             :     }
    4748             :     case Mips::SEB_MM:
    4749             :     case Mips::SEH_MM:
    4750             :     case Mips::WSBH_MM: {
    4751             :       // op: rd
    4752           9 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4753           9 :       Value |= (op & UINT64_C(31)) << 21;
    4754             :       // op: rt
    4755           9 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4756           9 :       Value |= (op & UINT64_C(31)) << 16;
    4757           9 :       break;
    4758             :     }
    4759             :     case Mips::ROTR_MM:
    4760             :     case Mips::SLL_MM:
    4761             :     case Mips::SLL_MMR6:
    4762             :     case Mips::SRA_MM:
    4763             :     case Mips::SRL_MM: {
    4764             :       // op: rd
    4765         244 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4766         244 :       Value |= (op & UINT64_C(31)) << 21;
    4767             :       // op: rt
    4768         244 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4769         244 :       Value |= (op & UINT64_C(31)) << 16;
    4770             :       // op: shamt
    4771         244 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4772         244 :       Value |= (op & UINT64_C(31)) << 11;
    4773         244 :       break;
    4774             :     }
    4775             :     case Mips::CFCMSA: {
    4776             :       // op: rd
    4777          16 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4778          16 :       Value |= (op & UINT64_C(31)) << 6;
    4779             :       // op: cs
    4780          16 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4781          16 :       Value |= (op & UINT64_C(31)) << 11;
    4782          16 :       break;
    4783             :     }
    4784             :     case Mips::LI16_MM:
    4785             :     case Mips::LI16_MMR6: {
    4786             :       // op: rd
    4787           9 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4788           9 :       Value |= (op & UINT64_C(7)) << 7;
    4789             :       // op: imm
    4790           9 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4791           9 :       Value |= op & UINT64_C(127);
    4792           9 :       break;
    4793             :     }
    4794             :     case Mips::ADDIUR1SP_MM: {
    4795             :       // op: rd
    4796           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4797           4 :       Value |= (op & UINT64_C(7)) << 7;
    4798             :       // op: imm
    4799           4 :       op = getUImm6Lsl2Encoding(MI, 1, Fixups, STI);
    4800           4 :       Value |= (op & UINT64_C(63)) << 1;
    4801           4 :       break;
    4802             :     }
    4803             :     case Mips::ADDIUR2_MM: {
    4804             :       // op: rd
    4805           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4806           8 :       Value |= (op & UINT64_C(7)) << 7;
    4807             :       // op: rs
    4808           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4809           8 :       Value |= (op & UINT64_C(7)) << 4;
    4810             :       // op: imm
    4811           8 :       op = getSImm3Lsa2Value(MI, 2, Fixups, STI);
    4812           8 :       Value |= (op & UINT64_C(7)) << 1;
    4813           8 :       break;
    4814             :     }
    4815             :     case Mips::ANDI16_MM:
    4816             :     case Mips::ANDI16_MMR6: {
    4817             :       // op: rd
    4818           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4819           4 :       Value |= (op & UINT64_C(7)) << 7;
    4820             :       // op: rs
    4821           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4822           4 :       Value |= (op & UINT64_C(7)) << 4;
    4823             :       // op: imm
    4824           4 :       op = getUImm4AndValue(MI, 2, Fixups, STI);
    4825           4 :       Value |= op & UINT64_C(15);
    4826           4 :       break;
    4827             :     }
    4828             :     case Mips::SLL16_MM:
    4829             :     case Mips::SLL16_MMR6:
    4830             :     case Mips::SRL16_MM:
    4831             :     case Mips::SRL16_MMR6: {
    4832             :       // op: rd
    4833           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4834           8 :       Value |= (op & UINT64_C(7)) << 7;
    4835             :       // op: rt
    4836           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4837           8 :       Value |= (op & UINT64_C(7)) << 4;
    4838             :       // op: shamt
    4839           8 :       op = getUImm3Mod8Encoding(MI, 2, Fixups, STI);
    4840           8 :       Value |= (op & UINT64_C(7)) << 1;
    4841           8 :       break;
    4842             :     }
    4843             :     case Mips::ADDU16_MM:
    4844             :     case Mips::SUBU16_MM: {
    4845             :       // op: rd
    4846           7 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4847           7 :       Value |= (op & UINT64_C(7)) << 7;
    4848             :       // op: rt
    4849           7 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4850           7 :       Value |= (op & UINT64_C(7)) << 4;
    4851             :       // op: rs
    4852           7 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4853           7 :       Value |= (op & UINT64_C(7)) << 1;
    4854           7 :       break;
    4855             :     }
    4856             :     case Mips::MFHI16_MM:
    4857             :     case Mips::MFLO16_MM: {
    4858             :       // op: rd
    4859           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4860           8 :       Value |= op & UINT64_C(31);
    4861           8 :       break;
    4862             :     }
    4863             :     case Mips::ADDIUS5_MM: {
    4864             :       // op: rd
    4865           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4866           4 :       Value |= (op & UINT64_C(31)) << 5;
    4867             :       // op: imm
    4868           4 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4869           4 :       Value |= (op & UINT64_C(15)) << 1;
    4870           4 :       break;
    4871             :     }
    4872           2 :     case Mips::LWP_MMR6:
    4873             :     case Mips::SWP_MMR6: {
    4874             :       // op: rd
    4875           2 :       op = getRegisterPairOpValue(MI, 0, Fixups, STI);
    4876           2 :       Value |= (op & UINT64_C(31)) << 21;
    4877             :       // op: addr
    4878           2 :       op = getMemEncoding(MI, 2, Fixups, STI);
    4879           2 :       Value |= op & UINT64_C(2031616);
    4880           2 :       Value |= op & UINT64_C(4095);
    4881           2 :       break;
    4882             :     }
    4883             :     case Mips::DVP_MMR6:
    4884             :     case Mips::EVP_MMR6:
    4885             :     case Mips::JR_MM:
    4886             :     case Mips::MTHI_MM:
    4887             :     case Mips::MTLO_MM: {
    4888             :       // op: rs
    4889          14 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4890          14 :       Value |= (op & UINT64_C(31)) << 16;
    4891          14 :       break;
    4892             :     }
    4893             :     case Mips::MFHI_DSP_MM:
    4894             :     case Mips::MFLO_DSP_MM: {
    4895             :       // op: rs
    4896           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4897           2 :       Value |= (op & UINT64_C(31)) << 16;
    4898             :       // op: ac
    4899           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4900           2 :       Value |= (op & UINT64_C(3)) << 14;
    4901           2 :       break;
    4902             :     }
    4903             :     case Mips::TEQI_MM:
    4904             :     case Mips::TGEIU_MM:
    4905             :     case Mips::TGEI_MM:
    4906             :     case Mips::TLTIU_MM:
    4907             :     case Mips::TLTI_MM:
    4908             :     case Mips::TNEI_MM: {
    4909             :       // op: rs
    4910          18 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4911          18 :       Value |= (op & UINT64_C(31)) << 16;
    4912             :       // op: imm16
    4913          18 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4914          18 :       Value |= op & UINT64_C(65535);
    4915          18 :       break;
    4916             :     }
    4917             :     case Mips::BEQZC_MM:
    4918             :     case Mips::BGEZALS_MM:
    4919             :     case Mips::BGEZAL_MM:
    4920             :     case Mips::BGEZ_MM:
    4921             :     case Mips::BGTZ_MM:
    4922             :     case Mips::BLEZ_MM:
    4923             :     case Mips::BLTZALS_MM:
    4924             :     case Mips::BLTZAL_MM:
    4925             :     case Mips::BLTZ_MM:
    4926             :     case Mips::BNEZC_MM: {
    4927             :       // op: rs
    4928          44 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4929          44 :       Value |= (op & UINT64_C(31)) << 16;
    4930             :       // op: offset
    4931          44 :       op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
    4932          44 :       Value |= op & UINT64_C(65535);
    4933          44 :       break;
    4934             :     }
    4935             :     case Mips::MADDU_MM:
    4936             :     case Mips::MADD_MM:
    4937             :     case Mips::MSUBU_MM:
    4938             :     case Mips::MSUB_MM:
    4939             :     case Mips::MULT_MM:
    4940             :     case Mips::MULTu_MM:
    4941             :     case Mips::SDIV_MM:
    4942             :     case Mips::UDIV_MM: {
    4943             :       // op: rs
    4944          24 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4945          24 :       Value |= (op & UINT64_C(31)) << 16;
    4946             :       // op: rt
    4947          24 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4948          24 :       Value |= (op & UINT64_C(31)) << 21;
    4949          24 :       break;
    4950             :     }
    4951             :     case Mips::TEQ_MM:
    4952             :     case Mips::TGEU_MM:
    4953             :     case Mips::TGE_MM:
    4954             :     case Mips::TLTU_MM:
    4955             :     case Mips::TLT_MM:
    4956             :     case Mips::TNE_MM: {
    4957             :       // op: rs
    4958          30 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4959          30 :       Value |= (op & UINT64_C(31)) << 16;
    4960             :       // op: rt
    4961          30 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4962          30 :       Value |= (op & UINT64_C(31)) << 21;
    4963             :       // op: code_
    4964          30 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    4965          30 :       Value |= (op & UINT64_C(15)) << 12;
    4966          30 :       break;
    4967             :     }
    4968             :     case Mips::BEQ_MM:
    4969             :     case Mips::BNE_MM: {
    4970             :       // op: rs
    4971          42 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4972          42 :       Value |= (op & UINT64_C(31)) << 16;
    4973             :       // op: rt
    4974          42 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4975          42 :       Value |= (op & UINT64_C(31)) << 21;
    4976             :       // op: offset
    4977          42 :       op = getBranchTargetOpValueMM(MI, 2, Fixups, STI);
    4978          42 :       Value |= op & UINT64_C(65535);
    4979          42 :       break;
    4980             :     }
    4981             :     case Mips::GINVI_MMR6: {
    4982             :       // op: rs
    4983           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4984           1 :       Value |= (op & UINT64_C(31)) << 16;
    4985             :       // op: type
    4986           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4987           1 :       Value |= (op & UINT64_C(3)) << 9;
    4988           1 :       break;
    4989             :     }
    4990             :     case Mips::GINVT_MMR6: {
    4991             :       // op: rs
    4992           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    4993           1 :       Value |= (op & UINT64_C(31)) << 16;
    4994             :       // op: type
    4995           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    4996           1 :       Value |= (op & UINT64_C(3)) << 9;
    4997           1 :       break;
    4998             :     }
    4999             :     case Mips::JR:
    5000             :     case Mips::JR64:
    5001             :     case Mips::JR_HB:
    5002             :     case Mips::JR_HB64:
    5003             :     case Mips::JR_HB64_R6:
    5004             :     case Mips::JR_HB_R6:
    5005             :     case Mips::MTHI:
    5006             :     case Mips::MTHI64:
    5007             :     case Mips::MTLO:
    5008             :     case Mips::MTLO64:
    5009             :     case Mips::MTM0:
    5010             :     case Mips::MTM1:
    5011             :     case Mips::MTM2:
    5012             :     case Mips::MTP0:
    5013             :     case Mips::MTP1:
    5014             :     case Mips::MTP2: {
    5015             :       // op: rs
    5016         182 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5017         182 :       Value |= (op & UINT64_C(31)) << 21;
    5018         182 :       break;
    5019             :     }
    5020             :     case Mips::ALUIPC:
    5021             :     case Mips::AUIPC: {
    5022             :       // op: rs
    5023          15 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5024          15 :       Value |= (op & UINT64_C(31)) << 21;
    5025             :       // op: imm
    5026          15 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5027          15 :       Value |= op & UINT64_C(65535);
    5028          15 :       break;
    5029             :     }
    5030             :     case Mips::DAHI:
    5031             :     case Mips::DATI: {
    5032             :       // op: rs
    5033           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5034           2 :       Value |= (op & UINT64_C(31)) << 21;
    5035             :       // op: imm
    5036           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5037           2 :       Value |= op & UINT64_C(65535);
    5038           2 :       break;
    5039             :     }
    5040             :     case Mips::LDPC: {
    5041             :       // op: rs
    5042           9 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5043           9 :       Value |= (op & UINT64_C(31)) << 21;
    5044             :       // op: imm
    5045           9 :       op = getSimm18Lsl3Encoding(MI, 1, Fixups, STI);
    5046           9 :       Value |= op & UINT64_C(262143);
    5047           9 :       break;
    5048             :     }
    5049             :     case Mips::ADDIUPC:
    5050             :     case Mips::LWPC:
    5051             :     case Mips::LWUPC: {
    5052             :       // op: rs
    5053          46 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5054          46 :       Value |= (op & UINT64_C(31)) << 21;
    5055             :       // op: imm
    5056          46 :       op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
    5057          46 :       Value |= op & UINT64_C(524287);
    5058          46 :       break;
    5059             :     }
    5060             :     case Mips::TEQI:
    5061             :     case Mips::TGEI:
    5062             :     case Mips::TGEIU:
    5063             :     case Mips::TLTI:
    5064             :     case Mips::TNEI:
    5065             :     case Mips::TTLTIU: {
    5066             :       // op: rs
    5067          84 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5068          84 :       Value |= (op & UINT64_C(31)) << 21;
    5069             :       // op: imm16
    5070          84 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5071          84 :       Value |= op & UINT64_C(65535);
    5072          84 :       break;
    5073             :     }
    5074             :     case Mips::WRDSP: {
    5075             :       // op: rs
    5076           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5077           8 :       Value |= (op & UINT64_C(31)) << 21;
    5078             :       // op: mask
    5079           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5080           8 :       Value |= (op & UINT64_C(1023)) << 11;
    5081           8 :       break;
    5082             :     }
    5083             :     case Mips::BEQZC:
    5084             :     case Mips::BEQZC64:
    5085             :     case Mips::BNEZC:
    5086             :     case Mips::BNEZC64: {
    5087             :       // op: rs
    5088          26 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5089          26 :       Value |= (op & UINT64_C(31)) << 21;
    5090             :       // op: offset
    5091          26 :       op = getBranchTarget21OpValue(MI, 1, Fixups, STI);
    5092          26 :       Value |= op & UINT64_C(2097151);
    5093          26 :       break;
    5094             :     }
    5095             :     case Mips::BEQZC_MMR6:
    5096             :     case Mips::BNEZC_MMR6: {
    5097             :       // op: rs
    5098           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5099           8 :       Value |= (op & UINT64_C(31)) << 21;
    5100             :       // op: offset
    5101           8 :       op = getBranchTarget21OpValueMM(MI, 1, Fixups, STI);
    5102           8 :       Value |= op & UINT64_C(2097151);
    5103           8 :       break;
    5104             :     }
    5105             :     case Mips::BGEZ:
    5106             :     case Mips::BGEZ64:
    5107             :     case Mips::BGEZAL:
    5108             :     case Mips::BGEZALL:
    5109             :     case Mips::BGEZL:
    5110             :     case Mips::BGTZ:
    5111             :     case Mips::BGTZ64:
    5112             :     case Mips::BGTZL:
    5113             :     case Mips::BLEZ:
    5114             :     case Mips::BLEZ64:
    5115             :     case Mips::BLEZL:
    5116             :     case Mips::BLTZ:
    5117             :     case Mips::BLTZ64:
    5118             :     case Mips::BLTZAL:
    5119             :     case Mips::BLTZALL:
    5120             :     case Mips::BLTZL: {
    5121             :       // op: rs
    5122         170 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5123         170 :       Value |= (op & UINT64_C(31)) << 21;
    5124             :       // op: offset
    5125         170 :       op = getBranchTargetOpValue(MI, 1, Fixups, STI);
    5126         170 :       Value |= op & UINT64_C(65535);
    5127         170 :       break;
    5128             :     }
    5129             :     case Mips::BBIT0:
    5130             :     case Mips::BBIT032:
    5131             :     case Mips::BBIT1:
    5132             :     case Mips::BBIT132: {
    5133             :       // op: rs
    5134           6 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5135           6 :       Value |= (op & UINT64_C(31)) << 21;
    5136             :       // op: p
    5137           6 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5138           6 :       Value |= (op & UINT64_C(31)) << 16;
    5139             :       // op: offset
    5140           6 :       op = getBranchTargetOpValue(MI, 2, Fixups, STI);
    5141           6 :       Value |= op & UINT64_C(65535);
    5142           6 :       break;
    5143             :     }
    5144             :     case Mips::CMPU_EQ_QB:
    5145             :     case Mips::CMPU_LE_QB:
    5146             :     case Mips::CMPU_LT_QB:
    5147             :     case Mips::CMP_EQ_PH:
    5148             :     case Mips::CMP_LE_PH:
    5149             :     case Mips::CMP_LT_PH:
    5150             :     case Mips::DMULT:
    5151             :     case Mips::DMULTu:
    5152             :     case Mips::DSDIV:
    5153             :     case Mips::DUDIV:
    5154             :     case Mips::MADD:
    5155             :     case Mips::MADDU:
    5156             :     case Mips::MSUB:
    5157             :     case Mips::MSUBU:
    5158             :     case Mips::MULT:
    5159             :     case Mips::MULTu:
    5160             :     case Mips::SDIV:
    5161             :     case Mips::UDIV: {
    5162             :       // op: rs
    5163         467 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5164         467 :       Value |= (op & UINT64_C(31)) << 21;
    5165             :       // op: rt
    5166         467 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5167         467 :       Value |= (op & UINT64_C(31)) << 16;
    5168         467 :       break;
    5169             :     }
    5170             :     case Mips::TEQ:
    5171             :     case Mips::TGE:
    5172             :     case Mips::TGEU:
    5173             :     case Mips::TLT:
    5174             :     case Mips::TLTU:
    5175             :     case Mips::TNE: {
    5176             :       // op: rs
    5177         270 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5178         270 :       Value |= (op & UINT64_C(31)) << 21;
    5179             :       // op: rt
    5180         270 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5181         270 :       Value |= (op & UINT64_C(31)) << 16;
    5182             :       // op: code_
    5183         270 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5184         270 :       Value |= (op & UINT64_C(1023)) << 6;
    5185         270 :       break;
    5186             :     }
    5187             :     case Mips::BEQ:
    5188             :     case Mips::BEQ64:
    5189             :     case Mips::BEQC:
    5190             :     case Mips::BEQC64:
    5191             :     case Mips::BEQL:
    5192             :     case Mips::BGEC:
    5193             :     case Mips::BGEC64:
    5194             :     case Mips::BGEUC:
    5195             :     case Mips::BGEUC64:
    5196             :     case Mips::BLTC:
    5197             :     case Mips::BLTC64:
    5198             :     case Mips::BLTUC:
    5199             :     case Mips::BLTUC64:
    5200             :     case Mips::BNE:
    5201             :     case Mips::BNE64:
    5202             :     case Mips::BNEC:
    5203             :     case Mips::BNEC64:
    5204             :     case Mips::BNEL:
    5205             :     case Mips::BNVC:
    5206             :     case Mips::BOVC: {
    5207             :       // op: rs
    5208         333 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5209         333 :       Value |= (op & UINT64_C(31)) << 21;
    5210             :       // op: rt
    5211         333 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5212         333 :       Value |= (op & UINT64_C(31)) << 16;
    5213             :       // op: offset
    5214         333 :       op = getBranchTargetOpValue(MI, 2, Fixups, STI);
    5215         333 :       Value |= op & UINT64_C(65535);
    5216         333 :       break;
    5217             :     }
    5218             :     case Mips::FORK: {
    5219             :       // op: rs
    5220           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5221           1 :       Value |= (op & UINT64_C(31)) << 21;
    5222             :       // op: rt
    5223           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5224           1 :       Value |= (op & UINT64_C(31)) << 16;
    5225             :       // op: rd
    5226           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5227           1 :       Value |= (op & UINT64_C(31)) << 11;
    5228           1 :       break;
    5229             :     }
    5230             :     case Mips::GINVI: {
    5231             :       // op: rs
    5232           5 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5233           5 :       Value |= (op & UINT64_C(31)) << 21;
    5234             :       // op: type_
    5235           5 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5236           5 :       Value |= (op & UINT64_C(3)) << 8;
    5237           5 :       break;
    5238             :     }
    5239             :     case Mips::GINVT: {
    5240             :       // op: rs
    5241           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5242           2 :       Value |= (op & UINT64_C(31)) << 21;
    5243             :       // op: type_
    5244           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5245           2 :       Value |= (op & UINT64_C(3)) << 8;
    5246           2 :       break;
    5247             :     }
    5248             :     case Mips::JALRC16_MMR6:
    5249             :     case Mips::JRC16_MMR6: {
    5250             :       // op: rs
    5251           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5252           2 :       Value |= (op & UINT64_C(31)) << 5;
    5253           2 :       break;
    5254             :     }
    5255             :     case Mips::ADDIUPC_MM: {
    5256             :       // op: rs
    5257           9 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5258           9 :       Value |= (op & UINT64_C(7)) << 23;
    5259             :       // op: imm
    5260           9 :       op = getSimm23Lsl2Encoding(MI, 1, Fixups, STI);
    5261           9 :       Value |= op & UINT64_C(8388607);
    5262           9 :       break;
    5263             :     }
    5264             :     case Mips::BEQZ16_MM:
    5265             :     case Mips::BEQZC16_MMR6:
    5266             :     case Mips::BNEZ16_MM:
    5267             :     case Mips::BNEZC16_MMR6: {
    5268             :       // op: rs
    5269          15 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5270          15 :       Value |= (op & UINT64_C(7)) << 7;
    5271             :       // op: offset
    5272          15 :       op = getBranchTarget7OpValueMM(MI, 1, Fixups, STI);
    5273          15 :       Value |= op & UINT64_C(127);
    5274          15 :       break;
    5275             :     }
    5276             :     case Mips::JALR16_MM:
    5277             :     case Mips::JALRS16_MM:
    5278             :     case Mips::JR16_MM:
    5279             :     case Mips::JRC16_MM: {
    5280             :       // op: rs
    5281          28 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5282          28 :       Value |= op & UINT64_C(31);
    5283          28 :       break;
    5284             :     }
    5285             :     case Mips::CTCMSA: {
    5286             :       // op: rs
    5287          16 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5288          16 :       Value |= (op & UINT64_C(31)) << 11;
    5289             :       // op: cd
    5290          16 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5291          16 :       Value |= (op & UINT64_C(31)) << 6;
    5292          16 :       break;
    5293             :     }
    5294             :     case Mips::FILL_B:
    5295             :     case Mips::FILL_D:
    5296             :     case Mips::FILL_H:
    5297             :     case Mips::FILL_W: {
    5298             :       // op: rs
    5299           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5300           4 :       Value |= (op & UINT64_C(31)) << 11;
    5301             :       // op: wd
    5302           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5303           4 :       Value |= (op & UINT64_C(31)) << 6;
    5304           4 :       break;
    5305             :     }
    5306             :     case Mips::MTHI_DSP_MM:
    5307             :     case Mips::MTHLIP_MM:
    5308             :     case Mips::MTLO_DSP_MM:
    5309             :     case Mips::SHILOV_MM: {
    5310             :       // op: rs
    5311           5 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5312           5 :       Value |= (op & UINT64_C(31)) << 16;
    5313             :       // op: ac
    5314           5 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5315           5 :       Value |= (op & UINT64_C(3)) << 14;
    5316           5 :       break;
    5317             :     }
    5318             :     case Mips::JALRS_MM:
    5319             :     case Mips::JALR_MM: {
    5320             :       // op: rs
    5321          30 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5322          30 :       Value |= (op & UINT64_C(31)) << 16;
    5323             :       // op: rd
    5324          30 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5325          30 :       Value |= (op & UINT64_C(31)) << 21;
    5326          30 :       break;
    5327             :     }
    5328             :     case Mips::CLO_MMR6: {
    5329             :       // op: rs
    5330           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5331           1 :       Value |= (op & UINT64_C(31)) << 16;
    5332             :       // op: rt
    5333           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5334           1 :       Value |= (op & UINT64_C(31)) << 21;
    5335           1 :       break;
    5336             :     }
    5337             :     case Mips::AUI_MMR6: {
    5338             :       // op: rs
    5339           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5340           1 :       Value |= (op & UINT64_C(31)) << 16;
    5341             :       // op: rt
    5342           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5343           1 :       Value |= (op & UINT64_C(31)) << 21;
    5344             :       // op: imm
    5345           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5346           1 :       Value |= op & UINT64_C(65535);
    5347           1 :       break;
    5348             :     }
    5349             :     case Mips::ADDi_MM:
    5350             :     case Mips::ADDiu_MM:
    5351             :     case Mips::ANDi_MM:
    5352             :     case Mips::ORi_MM:
    5353             :     case Mips::XORi_MM: {
    5354             :       // op: rs
    5355         234 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5356         234 :       Value |= (op & UINT64_C(31)) << 16;
    5357             :       // op: rt
    5358         234 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5359         234 :       Value |= (op & UINT64_C(31)) << 21;
    5360             :       // op: imm16
    5361         234 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5362         234 :       Value |= op & UINT64_C(65535);
    5363         234 :       break;
    5364             :     }
    5365             :     case Mips::MTHI_DSP:
    5366             :     case Mips::MTLO_DSP: {
    5367             :       // op: rs
    5368           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5369           4 :       Value |= (op & UINT64_C(31)) << 21;
    5370             :       // op: ac
    5371           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5372           4 :       Value |= (op & UINT64_C(3)) << 11;
    5373           4 :       break;
    5374             :     }
    5375             :     case Mips::YIELD: {
    5376             :       // op: rs
    5377           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5378           2 :       Value |= (op & UINT64_C(31)) << 21;
    5379             :       // op: rd
    5380           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5381           2 :       Value |= (op & UINT64_C(31)) << 11;
    5382           2 :       break;
    5383             :     }
    5384             :     case Mips::CLZ_MMR6: {
    5385             :       // op: rs
    5386           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5387           1 :       Value |= (op & UINT64_C(31)) << 21;
    5388             :       // op: rt
    5389           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5390           1 :       Value |= (op & UINT64_C(31)) << 11;
    5391           1 :       break;
    5392             :     }
    5393             :     case Mips::AUI:
    5394             :     case Mips::DAUI: {
    5395             :       // op: rs
    5396           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5397           4 :       Value |= (op & UINT64_C(31)) << 21;
    5398             :       // op: rt
    5399           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5400           4 :       Value |= (op & UINT64_C(31)) << 16;
    5401             :       // op: imm
    5402           4 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5403           4 :       Value |= op & UINT64_C(65535);
    5404           4 :       break;
    5405             :     }
    5406             :     case Mips::SEQi:
    5407             :     case Mips::SNEi: {
    5408             :       // op: rs
    5409           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5410           4 :       Value |= (op & UINT64_C(31)) << 21;
    5411             :       // op: rt
    5412           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5413           4 :       Value |= (op & UINT64_C(31)) << 16;
    5414             :       // op: imm10
    5415           4 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5416           4 :       Value |= (op & UINT64_C(1023)) << 6;
    5417           4 :       break;
    5418             :     }
    5419             :     case Mips::ADDi:
    5420             :     case Mips::ADDiu:
    5421             :     case Mips::ANDi:
    5422             :     case Mips::ANDi64:
    5423             :     case Mips::DADDi:
    5424             :     case Mips::DADDiu:
    5425             :     case Mips::ORi:
    5426             :     case Mips::ORi64:
    5427             :     case Mips::XORi:
    5428             :     case Mips::XORi64: {
    5429             :       // op: rs
    5430        3937 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5431        3937 :       Value |= (op & UINT64_C(31)) << 21;
    5432             :       // op: rt
    5433        3937 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5434        3937 :       Value |= (op & UINT64_C(31)) << 16;
    5435             :       // op: imm16
    5436        3937 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5437        3937 :       Value |= op & UINT64_C(65535);
    5438        3937 :       break;
    5439             :     }
    5440             :     case Mips::PRECR_SRA_PH_W:
    5441             :     case Mips::PRECR_SRA_R_PH_W: {
    5442             :       // op: rs
    5443           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5444           4 :       Value |= (op & UINT64_C(31)) << 21;
    5445             :       // op: rt
    5446           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5447           4 :       Value |= (op & UINT64_C(31)) << 16;
    5448             :       // op: sa
    5449           4 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5450           4 :       Value |= (op & UINT64_C(31)) << 11;
    5451           4 :       break;
    5452             :     }
    5453             :     case Mips::CRC32B:
    5454             :     case Mips::CRC32CB:
    5455             :     case Mips::CRC32CD:
    5456             :     case Mips::CRC32CH:
    5457             :     case Mips::CRC32CW:
    5458             :     case Mips::CRC32D:
    5459             :     case Mips::CRC32H:
    5460             :     case Mips::CRC32W: {
    5461             :       // op: rs
    5462          17 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5463          17 :       Value |= (op & UINT64_C(31)) << 21;
    5464             :       // op: rt
    5465          17 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5466          17 :       Value |= (op & UINT64_C(31)) << 16;
    5467          17 :       break;
    5468             :     }
    5469             :     case Mips::CMPGDU_EQ_QB:
    5470             :     case Mips::CMPGDU_LE_QB:
    5471             :     case Mips::CMPGDU_LT_QB:
    5472             :     case Mips::CMPGU_EQ_QB:
    5473             :     case Mips::CMPGU_LE_QB:
    5474             :     case Mips::CMPGU_LT_QB:
    5475             :     case Mips::PACKRL_PH:
    5476             :     case Mips::PICK_PH:
    5477             :     case Mips::PICK_QB:
    5478             :     case Mips::PRECRQU_S_QB_PH:
    5479             :     case Mips::PRECRQ_PH_W:
    5480             :     case Mips::PRECRQ_QB_PH:
    5481             :     case Mips::PRECRQ_RS_PH_W:
    5482             :     case Mips::PRECR_QB_PH: {
    5483             :       // op: rs
    5484          24 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5485          24 :       Value |= (op & UINT64_C(31)) << 21;
    5486             :       // op: rt
    5487          24 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5488          24 :       Value |= (op & UINT64_C(31)) << 16;
    5489             :       // op: rd
    5490          24 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5491          24 :       Value |= (op & UINT64_C(31)) << 11;
    5492          24 :       break;
    5493             :     }
    5494             :     case Mips::DLSA:
    5495             :     case Mips::LSA: {
    5496             :       // op: rs
    5497           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5498           8 :       Value |= (op & UINT64_C(31)) << 21;
    5499             :       // op: rt
    5500           8 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5501           8 :       Value |= (op & UINT64_C(31)) << 16;
    5502             :       // op: rd
    5503           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5504           8 :       Value |= (op & UINT64_C(31)) << 11;
    5505             :       // op: sa
    5506           8 :       op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
    5507           8 :       Value |= (op & UINT64_C(3)) << 6;
    5508           8 :       break;
    5509             :     }
    5510             :     case Mips::ADDU16_MMR6:
    5511             :     case Mips::SUBU16_MMR6: {
    5512             :       // op: rs
    5513           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5514           2 :       Value |= (op & UINT64_C(7)) << 7;
    5515             :       // op: rt
    5516           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5517           2 :       Value |= (op & UINT64_C(7)) << 4;
    5518             :       // op: rd
    5519           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5520           2 :       Value |= (op & UINT64_C(7)) << 1;
    5521           2 :       break;
    5522             :     }
    5523             :     case Mips::MOVE16_MM:
    5524             :     case Mips::MOVE16_MMR6: {
    5525             :       // op: rs
    5526          42 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5527          42 :       Value |= op & UINT64_C(31);
    5528             :       // op: rd
    5529          42 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5530          42 :       Value |= (op & UINT64_C(31)) << 5;
    5531          42 :       break;
    5532             :     }
    5533             :     case Mips::DI:
    5534             :     case Mips::DI_MM:
    5535             :     case Mips::DI_MMR6:
    5536             :     case Mips::DMT:
    5537             :     case Mips::DVP:
    5538             :     case Mips::DVPE:
    5539             :     case Mips::EI:
    5540             :     case Mips::EI_MM:
    5541             :     case Mips::EI_MMR6:
    5542             :     case Mips::EMT:
    5543             :     case Mips::EVP:
    5544             :     case Mips::EVPE: {
    5545             :       // op: rt
    5546          84 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5547          84 :       Value |= (op & UINT64_C(31)) << 16;
    5548          84 :       break;
    5549             :     }
    5550             :     case Mips::EXTP:
    5551             :     case Mips::EXTPDP:
    5552             :     case Mips::EXTPDPV:
    5553             :     case Mips::EXTPV:
    5554             :     case Mips::EXTRV_RS_W:
    5555             :     case Mips::EXTRV_R_W:
    5556             :     case Mips::EXTRV_S_H:
    5557             :     case Mips::EXTRV_W:
    5558             :     case Mips::EXTR_RS_W:
    5559             :     case Mips::EXTR_R_W:
    5560             :     case Mips::EXTR_S_H:
    5561             :     case Mips::EXTR_W: {
    5562             :       // op: rt
    5563          24 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5564          24 :       Value |= (op & UINT64_C(31)) << 16;
    5565             :       // op: ac
    5566          24 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5567          24 :       Value |= (op & UINT64_C(3)) << 11;
    5568             :       // op: shift_rs
    5569          24 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5570          24 :       Value |= (op & UINT64_C(31)) << 21;
    5571          24 :       break;
    5572             :     }
    5573             :     case Mips::LL64_R6:
    5574             :     case Mips::LLD_R6:
    5575             :     case Mips::LL_R6: {
    5576             :       // op: rt
    5577           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5578           3 :       Value |= (op & UINT64_C(31)) << 16;
    5579             :       // op: addr
    5580           3 :       op = getMemEncoding(MI, 1, Fixups, STI);
    5581           3 :       Value |= (op & UINT64_C(2031616)) << 5;
    5582           3 :       Value |= (op & UINT64_C(511)) << 7;
    5583           3 :       break;
    5584             :     }
    5585             :     case Mips::LB:
    5586             :     case Mips::LB64:
    5587             :     case Mips::LBu:
    5588             :     case Mips::LBu64:
    5589             :     case Mips::LD:
    5590             :     case Mips::LDC1:
    5591             :     case Mips::LDC164:
    5592             :     case Mips::LDC2:
    5593             :     case Mips::LDC3:
    5594             :     case Mips::LDL:
    5595             :     case Mips::LDR:
    5596             :     case Mips::LEA_ADDiu:
    5597             :     case Mips::LEA_ADDiu64:
    5598             :     case Mips::LH:
    5599             :     case Mips::LH64:
    5600             :     case Mips::LHu:
    5601             :     case Mips::LHu64:
    5602             :     case Mips::LL:
    5603             :     case Mips::LL64:
    5604             :     case Mips::LLD:
    5605             :     case Mips::LW:
    5606             :     case Mips::LW64:
    5607             :     case Mips::LWC1:
    5608             :     case Mips::LWC2:
    5609             :     case Mips::LWC3:
    5610             :     case Mips::LWDSP:
    5611             :     case Mips::LWL:
    5612             :     case Mips::LWL64:
    5613             :     case Mips::LWR:
    5614             :     case Mips::LWR64:
    5615             :     case Mips::LWu:
    5616             :     case Mips::SB:
    5617             :     case Mips::SB64:
    5618             :     case Mips::SD:
    5619             :     case Mips::SDC1:
    5620             :     case Mips::SDC164:
    5621             :     case Mips::SDC2:
    5622             :     case Mips::SDC3:
    5623             :     case Mips::SDL:
    5624             :     case Mips::SDR:
    5625             :     case Mips::SH:
    5626             :     case Mips::SH64:
    5627             :     case Mips::SW:
    5628             :     case Mips::SW64:
    5629             :     case Mips::SWC1:
    5630             :     case Mips::SWC2:
    5631             :     case Mips::SWC3:
    5632             :     case Mips::SWDSP:
    5633             :     case Mips::SWL:
    5634             :     case Mips::SWL64:
    5635             :     case Mips::SWR:
    5636             :     case Mips::SWR64: {
    5637             :       // op: rt
    5638       11954 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5639       11954 :       Value |= (op & UINT64_C(31)) << 16;
    5640             :       // op: addr
    5641       11954 :       op = getMemEncoding(MI, 1, Fixups, STI);
    5642       11954 :       Value |= (op & UINT64_C(2031616)) << 5;
    5643       11954 :       Value |= op & UINT64_C(65535);
    5644       11954 :       break;
    5645             :     }
    5646             :     case Mips::LDC2_R6:
    5647             :     case Mips::LWC2_R6:
    5648             :     case Mips::SDC2_R6:
    5649             :     case Mips::SWC2_R6: {
    5650             :       // op: rt
    5651           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5652           8 :       Value |= (op & UINT64_C(31)) << 16;
    5653             :       // op: addr
    5654           8 :       op = getMemEncoding(MI, 1, Fixups, STI);
    5655           8 :       Value |= (op & UINT64_C(2031616)) >> 5;
    5656           8 :       Value |= op & UINT64_C(2047);
    5657           8 :       break;
    5658             :     }
    5659             :     case Mips::CFC1:
    5660             :     case Mips::DMFC1:
    5661             :     case Mips::MFC1:
    5662             :     case Mips::MFC1_D64:
    5663             :     case Mips::MFHC1_D32:
    5664             :     case Mips::MFHC1_D64: {
    5665             :       // op: rt
    5666          52 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5667          52 :       Value |= (op & UINT64_C(31)) << 16;
    5668             :       // op: fs
    5669          52 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5670          52 :       Value |= (op & UINT64_C(31)) << 11;
    5671          52 :       break;
    5672             :     }
    5673             :     case Mips::DMFC2_OCTEON:
    5674             :     case Mips::DMTC2_OCTEON:
    5675             :     case Mips::LUi:
    5676             :     case Mips::LUi64:
    5677             :     case Mips::LUi_MM: {
    5678             :       // op: rt
    5679        1676 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5680        1676 :       Value |= (op & UINT64_C(31)) << 16;
    5681             :       // op: imm16
    5682        1676 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5683        1676 :       Value |= op & UINT64_C(65535);
    5684        1676 :       break;
    5685             :     }
    5686             :     case Mips::BEQZALC:
    5687             :     case Mips::BGTZALC:
    5688             :     case Mips::BGTZC:
    5689             :     case Mips::BGTZC64:
    5690             :     case Mips::BLEZALC:
    5691             :     case Mips::BLEZC:
    5692             :     case Mips::BLEZC64:
    5693             :     case Mips::BNEZALC: {
    5694             :       // op: rt
    5695          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5696          12 :       Value |= (op & UINT64_C(31)) << 16;
    5697             :       // op: offset
    5698          12 :       op = getBranchTargetOpValue(MI, 1, Fixups, STI);
    5699          12 :       Value |= op & UINT64_C(65535);
    5700          12 :       break;
    5701             :     }
    5702             :     case Mips::BC1EQZC_MMR6:
    5703             :     case Mips::BC1NEZC_MMR6:
    5704             :     case Mips::BC2EQZC_MMR6:
    5705             :     case Mips::BC2NEZC_MMR6: {
    5706             :       // op: rt
    5707           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5708           4 :       Value |= (op & UINT64_C(31)) << 16;
    5709             :       // op: offset
    5710           4 :       op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
    5711           4 :       Value |= op & UINT64_C(65535);
    5712           4 :       break;
    5713             :     }
    5714             :     case Mips::JIALC:
    5715             :     case Mips::JIALC64:
    5716             :     case Mips::JIALC_MMR6:
    5717             :     case Mips::JIC:
    5718             :     case Mips::JIC64:
    5719             :     case Mips::JIC_MMR6: {
    5720             :       // op: rt
    5721          52 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5722          52 :       Value |= (op & UINT64_C(31)) << 16;
    5723             :       // op: offset
    5724          52 :       op = getJumpOffset16OpValue(MI, 1, Fixups, STI);
    5725          52 :       Value |= op & UINT64_C(65535);
    5726          52 :       break;
    5727             :     }
    5728             :     case Mips::RDHWR:
    5729             :     case Mips::RDHWR64: {
    5730             :       // op: rt
    5731          52 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5732          52 :       Value |= (op & UINT64_C(31)) << 16;
    5733             :       // op: rd
    5734          52 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5735          52 :       Value |= (op & UINT64_C(31)) << 11;
    5736          52 :       break;
    5737             :     }
    5738             :     case Mips::DMFC0:
    5739             :     case Mips::DMFC2:
    5740             :     case Mips::DMFGC0:
    5741             :     case Mips::MFC0:
    5742             :     case Mips::MFC2:
    5743             :     case Mips::MFGC0:
    5744             :     case Mips::MFHGC0: {
    5745             :       // op: rt
    5746          43 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5747          43 :       Value |= (op & UINT64_C(31)) << 16;
    5748             :       // op: rd
    5749          43 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5750          43 :       Value |= (op & UINT64_C(31)) << 11;
    5751             :       // op: sel
    5752          43 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5753          43 :       Value |= op & UINT64_C(7);
    5754          43 :       break;
    5755             :     }
    5756             :     case Mips::SLTi:
    5757             :     case Mips::SLTi64:
    5758             :     case Mips::SLTiu:
    5759             :     case Mips::SLTiu64: {
    5760             :       // op: rt
    5761          68 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5762          68 :       Value |= (op & UINT64_C(31)) << 16;
    5763             :       // op: rs
    5764          68 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5765          68 :       Value |= (op & UINT64_C(31)) << 21;
    5766             :       // op: imm16
    5767          68 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5768          68 :       Value |= op & UINT64_C(65535);
    5769          68 :       break;
    5770             :     }
    5771             :     case Mips::CINS:
    5772             :     case Mips::CINS32:
    5773             :     case Mips::CINS64_32:
    5774             :     case Mips::CINS_i32:
    5775             :     case Mips::EXTS:
    5776             :     case Mips::EXTS32: {
    5777             :       // op: rt
    5778          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5779          12 :       Value |= (op & UINT64_C(31)) << 16;
    5780             :       // op: rs
    5781          12 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5782          12 :       Value |= (op & UINT64_C(31)) << 21;
    5783             :       // op: pos
    5784          12 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5785          12 :       Value |= (op & UINT64_C(31)) << 6;
    5786             :       // op: lenm1
    5787          12 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    5788          12 :       Value |= (op & UINT64_C(31)) << 11;
    5789          12 :       break;
    5790             :     }
    5791             :     case Mips::DINS:
    5792             :     case Mips::DINSM:
    5793             :     case Mips::DINSU:
    5794             :     case Mips::INS: {
    5795             :       // op: rt
    5796          17 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5797          17 :       Value |= (op & UINT64_C(31)) << 16;
    5798             :       // op: rs
    5799          17 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5800          17 :       Value |= (op & UINT64_C(31)) << 21;
    5801             :       // op: pos
    5802          17 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5803          17 :       Value |= (op & UINT64_C(31)) << 6;
    5804             :       // op: size
    5805          17 :       op = getSizeInsEncoding(MI, 3, Fixups, STI);
    5806          17 :       Value |= (op & UINT64_C(31)) << 11;
    5807          17 :       break;
    5808             :     }
    5809             :     case Mips::DEXT:
    5810             :     case Mips::DEXT64_32:
    5811             :     case Mips::DEXTM:
    5812             :     case Mips::DEXTU:
    5813             :     case Mips::EXT: {
    5814             :       // op: rt
    5815          16 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5816          16 :       Value |= (op & UINT64_C(31)) << 16;
    5817             :       // op: rs
    5818          16 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5819          16 :       Value |= (op & UINT64_C(31)) << 21;
    5820             :       // op: pos
    5821          16 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5822          16 :       Value |= (op & UINT64_C(31)) << 6;
    5823             :       // op: size
    5824          16 :       op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
    5825          16 :       Value |= (op & UINT64_C(31)) << 11;
    5826          16 :       break;
    5827             :     }
    5828             :     case Mips::APPEND:
    5829             :     case Mips::BALIGN:
    5830             :     case Mips::PREPEND: {
    5831             :       // op: rt
    5832           5 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5833           5 :       Value |= (op & UINT64_C(31)) << 16;
    5834             :       // op: rs
    5835           5 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5836           5 :       Value |= (op & UINT64_C(31)) << 21;
    5837             :       // op: sa
    5838           5 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5839           5 :       Value |= (op & UINT64_C(31)) << 11;
    5840           5 :       break;
    5841             :     }
    5842             :     case Mips::INSV: {
    5843             :       // op: rt
    5844           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5845           2 :       Value |= (op & UINT64_C(31)) << 16;
    5846             :       // op: rs
    5847           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5848           2 :       Value |= (op & UINT64_C(31)) << 21;
    5849           2 :       break;
    5850             :     }
    5851             :     case Mips::LWU_MM: {
    5852             :       // op: rt
    5853           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5854           3 :       Value |= (op & UINT64_C(31)) << 21;
    5855             :       // op: addr
    5856           3 :       op = getMemEncoding(MI, 1, Fixups, STI);
    5857           3 :       Value |= op & UINT64_C(2031616);
    5858           3 :       Value |= op & UINT64_C(4095);
    5859           3 :       break;
    5860             :     }
    5861             :     case Mips::LBE_MM:
    5862             :     case Mips::LBuE_MM:
    5863             :     case Mips::LHE_MM:
    5864             :     case Mips::LHuE_MM:
    5865             :     case Mips::LLE_MM:
    5866             :     case Mips::LWE_MM:
    5867             :     case Mips::SBE_MM:
    5868             :     case Mips::SHE_MM:
    5869             :     case Mips::SWE_MM: {
    5870             :       // op: rt
    5871          56 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5872          56 :       Value |= (op & UINT64_C(31)) << 21;
    5873             :       // op: addr
    5874          56 :       op = getMemEncoding(MI, 1, Fixups, STI);
    5875          56 :       Value |= op & UINT64_C(2031616);
    5876          56 :       Value |= op & UINT64_C(511);
    5877          56 :       break;
    5878             :     }
    5879             :     case Mips::LEA_ADDiu_MM:
    5880             :     case Mips::LH_MM:
    5881             :     case Mips::LHu_MM:
    5882             :     case Mips::LWDSP_MM:
    5883             :     case Mips::LW_MM:
    5884             :     case Mips::LW_MMR6:
    5885             :     case Mips::SB_MM:
    5886             :     case Mips::SB_MMR6:
    5887             :     case Mips::SH_MM:
    5888             :     case Mips::SH_MMR6:
    5889             :     case Mips::SWDSP_MM:
    5890             :     case Mips::SW_MM:
    5891             :     case Mips::SW_MMR6: {
    5892             :       // op: rt
    5893         103 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5894         103 :       Value |= (op & UINT64_C(31)) << 21;
    5895             :       // op: addr
    5896         103 :       op = getMemEncoding(MI, 1, Fixups, STI);
    5897         103 :       Value |= op & UINT64_C(2097151);
    5898         103 :       break;
    5899             :     }
    5900             :     case Mips::LDC2_MMR6:
    5901             :     case Mips::LWC2_MMR6:
    5902             :     case Mips::SDC2_MMR6:
    5903             :     case Mips::SWC2_MMR6: {
    5904             :       // op: rt
    5905           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5906           4 :       Value |= (op & UINT64_C(31)) << 21;
    5907             :       // op: addr
    5908           4 :       op = getMemEncodingMMImm11(MI, 1, Fixups, STI);
    5909           4 :       Value |= op & UINT64_C(2031616);
    5910           4 :       Value |= op & UINT64_C(2047);
    5911           4 :       break;
    5912             :     }
    5913             :     case Mips::LL_MM:
    5914             :     case Mips::LWL_MM:
    5915             :     case Mips::LWR_MM:
    5916             :     case Mips::SWL_MM:
    5917             :     case Mips::SWR_MM: {
    5918             :       // op: rt
    5919          22 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5920          22 :       Value |= (op & UINT64_C(31)) << 21;
    5921             :       // op: addr
    5922          22 :       op = getMemEncodingMMImm12(MI, 1, Fixups, STI);
    5923          22 :       Value |= op & UINT64_C(2031616);
    5924          22 :       Value |= op & UINT64_C(4095);
    5925          22 :       break;
    5926             :     }
    5927             :     case Mips::LB_MM:
    5928             :     case Mips::LBu_MM:
    5929             :     case Mips::LDC1_MM:
    5930             :     case Mips::LWC1_MM:
    5931             :     case Mips::SDC1_MM:
    5932             :     case Mips::SWC1_MM: {
    5933             :       // op: rt
    5934          20 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5935          20 :       Value |= (op & UINT64_C(31)) << 21;
    5936             :       // op: addr
    5937          20 :       op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
    5938          20 :       Value |= op & UINT64_C(2097151);
    5939          20 :       break;
    5940             :     }
    5941             :     case Mips::LWLE_MM:
    5942             :     case Mips::LWRE_MM:
    5943             :     case Mips::SWLE_MM:
    5944             :     case Mips::SWRE_MM: {
    5945             :       // op: rt
    5946          16 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5947          16 :       Value |= (op & UINT64_C(31)) << 21;
    5948             :       // op: addr
    5949          16 :       op = getMemEncodingMMImm9(MI, 1, Fixups, STI);
    5950          16 :       Value |= op & UINT64_C(2031616);
    5951          16 :       Value |= op & UINT64_C(511);
    5952          16 :       break;
    5953             :     }
    5954             :     case Mips::CFC1_MM:
    5955             :     case Mips::MFC1_MM:
    5956             :     case Mips::MFC1_MMR6:
    5957             :     case Mips::MFHC1_D32_MM:
    5958             :     case Mips::MFHC1_D64_MM: {
    5959             :       // op: rt
    5960          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5961          12 :       Value |= (op & UINT64_C(31)) << 21;
    5962             :       // op: fs
    5963          12 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5964          12 :       Value |= (op & UINT64_C(31)) << 16;
    5965          12 :       break;
    5966             :     }
    5967             :     case Mips::REPL_QB_MM: {
    5968             :       // op: rt
    5969           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5970           1 :       Value |= (op & UINT64_C(31)) << 21;
    5971             :       // op: imm
    5972           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5973           1 :       Value |= (op & UINT64_C(255)) << 13;
    5974           1 :       break;
    5975             :     }
    5976             :     case Mips::ALUIPC_MMR6:
    5977             :     case Mips::AUIPC_MMR6: {
    5978             :       // op: rt
    5979           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5980           2 :       Value |= (op & UINT64_C(31)) << 21;
    5981             :       // op: imm
    5982           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    5983           2 :       Value |= op & UINT64_C(65535);
    5984           2 :       break;
    5985             :     }
    5986             :     case Mips::EXTPDP_MM:
    5987             :     case Mips::EXTP_MM:
    5988             :     case Mips::EXTR_RS_W_MM:
    5989             :     case Mips::EXTR_R_W_MM:
    5990             :     case Mips::EXTR_S_H_MM:
    5991             :     case Mips::EXTR_W_MM: {
    5992             :       // op: rt
    5993          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    5994          12 :       Value |= (op & UINT64_C(31)) << 21;
    5995             :       // op: imm
    5996          12 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    5997          12 :       Value |= (op & UINT64_C(31)) << 16;
    5998             :       // op: ac
    5999          12 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6000          12 :       Value |= (op & UINT64_C(3)) << 14;
    6001          12 :       break;
    6002             :     }
    6003             :     case Mips::ADDIUPC_MMR6:
    6004             :     case Mips::LWPC_MMR6: {
    6005             :       // op: rt
    6006          13 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6007          13 :       Value |= (op & UINT64_C(31)) << 21;
    6008             :       // op: imm
    6009          13 :       op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
    6010          13 :       Value |= op & UINT64_C(524287);
    6011          13 :       break;
    6012             :     }
    6013             :     case Mips::LUI_MMR6: {
    6014             :       // op: rt
    6015           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6016           1 :       Value |= (op & UINT64_C(31)) << 21;
    6017             :       // op: imm16
    6018           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6019           1 :       Value |= op & UINT64_C(65535);
    6020           1 :       break;
    6021             :     }
    6022             :     case Mips::CFC2_MM:
    6023             :     case Mips::MFC2_MMR6:
    6024             :     case Mips::MFHC2_MMR6: {
    6025             :       // op: rt
    6026           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6027           4 :       Value |= (op & UINT64_C(31)) << 21;
    6028             :       // op: impl
    6029           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6030           4 :       Value |= (op & UINT64_C(31)) << 16;
    6031           4 :       break;
    6032             :     }
    6033             :     case Mips::RDDSP_MM:
    6034             :     case Mips::WRDSP_MM: {
    6035             :       // op: rt
    6036           7 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6037           7 :       Value |= (op & UINT64_C(31)) << 21;
    6038             :       // op: mask
    6039           7 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6040           7 :       Value |= (op & UINT64_C(127)) << 14;
    6041           7 :       break;
    6042             :     }
    6043             :     case Mips::BGTZC_MMR6:
    6044             :     case Mips::BLEZC_MMR6: {
    6045             :       // op: rt
    6046           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6047           2 :       Value |= (op & UINT64_C(31)) << 21;
    6048             :       // op: offset
    6049           2 :       op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI);
    6050           2 :       Value |= op & UINT64_C(65535);
    6051           2 :       break;
    6052             :     }
    6053             :     case Mips::BEQZALC_MMR6:
    6054             :     case Mips::BGTZALC_MMR6:
    6055             :     case Mips::BLEZALC_MMR6:
    6056             :     case Mips::BNEZALC_MMR6: {
    6057             :       // op: rt
    6058           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6059           4 :       Value |= (op & UINT64_C(31)) << 21;
    6060             :       // op: offset
    6061           4 :       op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
    6062           4 :       Value |= op & UINT64_C(65535);
    6063           4 :       break;
    6064             :     }
    6065             :     case Mips::RDHWR_MM:
    6066             :     case Mips::RDPGPR_MMR6: {
    6067             :       // op: rt
    6068           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6069           3 :       Value |= (op & UINT64_C(31)) << 21;
    6070             :       // op: rd
    6071           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6072           3 :       Value |= (op & UINT64_C(31)) << 16;
    6073           3 :       break;
    6074             :     }
    6075             :     case Mips::ABSQ_S_PH_MM:
    6076             :     case Mips::ABSQ_S_QB_MMR2:
    6077             :     case Mips::ABSQ_S_W_MM:
    6078             :     case Mips::BITREV_MM:
    6079             :     case Mips::JALRC_HB_MMR6:
    6080             :     case Mips::JALRC_MMR6:
    6081             :     case Mips::PRECEQU_PH_QBLA_MM:
    6082             :     case Mips::PRECEQU_PH_QBL_MM:
    6083             :     case Mips::PRECEQU_PH_QBRA_MM:
    6084             :     case Mips::PRECEQU_PH_QBR_MM:
    6085             :     case Mips::PRECEQ_W_PHL_MM:
    6086             :     case Mips::PRECEQ_W_PHR_MM:
    6087             :     case Mips::PRECEU_PH_QBLA_MM:
    6088             :     case Mips::PRECEU_PH_QBL_MM:
    6089             :     case Mips::PRECEU_PH_QBRA_MM:
    6090             :     case Mips::PRECEU_PH_QBR_MM:
    6091             :     case Mips::RADDU_W_QB_MM:
    6092             :     case Mips::REPLV_PH_MM:
    6093             :     case Mips::REPLV_QB_MM:
    6094             :     case Mips::WRPGPR_MMR6:
    6095             :     case Mips::WSBH_MMR6: {
    6096             :       // op: rt
    6097          36 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6098          36 :       Value |= (op & UINT64_C(31)) << 21;
    6099             :       // op: rs
    6100          36 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6101          36 :       Value |= (op & UINT64_C(31)) << 16;
    6102          36 :       break;
    6103             :     }
    6104             :     case Mips::BALIGN_MMR2: {
    6105             :       // op: rt
    6106           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6107           1 :       Value |= (op & UINT64_C(31)) << 21;
    6108             :       // op: rs
    6109           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6110           1 :       Value |= (op & UINT64_C(31)) << 16;
    6111             :       // op: bp
    6112           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6113           1 :       Value |= (op & UINT64_C(3)) << 14;
    6114           1 :       break;
    6115             :     }
    6116             :     case Mips::ADDIU_MMR6:
    6117             :     case Mips::ANDI_MMR6:
    6118             :     case Mips::ORI_MMR6:
    6119             :     case Mips::SLTi_MM:
    6120             :     case Mips::SLTiu_MM:
    6121             :     case Mips::XORI_MMR6: {
    6122             :       // op: rt
    6123          29 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6124          29 :       Value |= (op & UINT64_C(31)) << 21;
    6125             :       // op: rs
    6126          29 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6127          29 :       Value |= (op & UINT64_C(31)) << 16;
    6128             :       // op: imm16
    6129          29 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6130          29 :       Value |= op & UINT64_C(65535);
    6131          29 :       break;
    6132             :     }
    6133             :     case Mips::BNVC_MMR6:
    6134             :     case Mips::BOVC_MMR6: {
    6135             :       // op: rt
    6136           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6137           4 :       Value |= (op & UINT64_C(31)) << 21;
    6138             :       // op: rs
    6139           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6140           4 :       Value |= (op & UINT64_C(31)) << 16;
    6141             :       // op: offset
    6142           4 :       op = getBranchTargetOpValueMMR6(MI, 2, Fixups, STI);
    6143           4 :       Value |= op & UINT64_C(65535);
    6144           4 :       break;
    6145             :     }
    6146             :     case Mips::INS_MM: {
    6147             :       // op: rt
    6148           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6149           1 :       Value |= (op & UINT64_C(31)) << 21;
    6150             :       // op: rs
    6151           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6152           1 :       Value |= (op & UINT64_C(31)) << 16;
    6153             :       // op: pos
    6154           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6155           1 :       Value |= (op & UINT64_C(31)) << 6;
    6156             :       // op: size
    6157           1 :       op = getSizeInsEncoding(MI, 3, Fixups, STI);
    6158           1 :       Value |= (op & UINT64_C(31)) << 11;
    6159           1 :       break;
    6160             :     }
    6161             :     case Mips::EXT_MM: {
    6162             :       // op: rt
    6163           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6164           1 :       Value |= (op & UINT64_C(31)) << 21;
    6165             :       // op: rs
    6166           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6167           1 :       Value |= (op & UINT64_C(31)) << 16;
    6168             :       // op: pos
    6169           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6170           1 :       Value |= (op & UINT64_C(31)) << 6;
    6171             :       // op: size
    6172           1 :       op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
    6173           1 :       Value |= (op & UINT64_C(31)) << 11;
    6174           1 :       break;
    6175             :     }
    6176             :     case Mips::SHLL_PH_MM:
    6177             :     case Mips::SHLL_S_PH_MM:
    6178             :     case Mips::SHRA_PH_MM:
    6179             :     case Mips::SHRA_R_PH_MM:
    6180             :     case Mips::SHRL_PH_MMR2: {
    6181             :       // op: rt
    6182           9 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6183           9 :       Value |= (op & UINT64_C(31)) << 21;
    6184             :       // op: rs
    6185           9 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6186           9 :       Value |= (op & UINT64_C(31)) << 16;
    6187             :       // op: sa
    6188           9 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6189           9 :       Value |= (op & UINT64_C(15)) << 12;
    6190           9 :       break;
    6191             :     }
    6192             :     case Mips::APPEND_MMR2:
    6193             :     case Mips::PRECR_SRA_PH_W_MMR2:
    6194             :     case Mips::PRECR_SRA_R_PH_W_MMR2:
    6195             :     case Mips::PREPEND_MMR2:
    6196             :     case Mips::SHLL_S_W_MM:
    6197             :     case Mips::SHRA_R_W_MM: {
    6198             :       // op: rt
    6199           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6200           8 :       Value |= (op & UINT64_C(31)) << 21;
    6201             :       // op: rs
    6202           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6203           8 :       Value |= (op & UINT64_C(31)) << 16;
    6204             :       // op: sa
    6205           8 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6206           8 :       Value |= (op & UINT64_C(31)) << 11;
    6207           8 :       break;
    6208             :     }
    6209             :     case Mips::SHLL_QB_MM:
    6210             :     case Mips::SHRA_QB_MMR2:
    6211             :     case Mips::SHRA_R_QB_MMR2:
    6212             :     case Mips::SHRL_QB_MM: {
    6213             :       // op: rt
    6214           6 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6215           6 :       Value |= (op & UINT64_C(31)) << 21;
    6216             :       // op: rs
    6217           6 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6218           6 :       Value |= (op & UINT64_C(31)) << 16;
    6219             :       // op: sa
    6220           6 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6221           6 :       Value |= (op & UINT64_C(7)) << 13;
    6222           6 :       break;
    6223             :     }
    6224             :     case Mips::MFC0_MMR6:
    6225             :     case Mips::MFGC0_MM:
    6226             :     case Mips::MFHC0_MMR6:
    6227             :     case Mips::MFHGC0_MM:
    6228             :     case Mips::RDHWR_MMR6: {
    6229             :       // op: rt
    6230          11 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6231          11 :       Value |= (op & UINT64_C(31)) << 21;
    6232             :       // op: rs
    6233          11 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6234          11 :       Value |= (op & UINT64_C(31)) << 16;
    6235             :       // op: sel
    6236          11 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6237          11 :       Value |= (op & UINT64_C(7)) << 11;
    6238          11 :       break;
    6239             :     }
    6240             :     case Mips::INS_MMR6: {
    6241             :       // op: rt
    6242           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6243           1 :       Value |= (op & UINT64_C(31)) << 21;
    6244             :       // op: rs
    6245           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6246           1 :       Value |= (op & UINT64_C(31)) << 16;
    6247             :       // op: size
    6248           1 :       op = getSizeInsEncoding(MI, 3, Fixups, STI);
    6249           1 :       Value |= (op & UINT64_C(31)) << 11;
    6250             :       // op: pos
    6251           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6252           1 :       Value |= (op & UINT64_C(31)) << 6;
    6253           1 :       break;
    6254             :     }
    6255             :     case Mips::EXT_MMR6: {
    6256             :       // op: rt
    6257           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6258           1 :       Value |= (op & UINT64_C(31)) << 21;
    6259             :       // op: rs
    6260           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6261           1 :       Value |= (op & UINT64_C(31)) << 16;
    6262             :       // op: size
    6263           1 :       op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
    6264           1 :       Value |= (op & UINT64_C(31)) << 11;
    6265             :       // op: pos
    6266           1 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6267           1 :       Value |= (op & UINT64_C(31)) << 6;
    6268           1 :       break;
    6269             :     }
    6270             :     case Mips::INSV_MM: {
    6271             :       // op: rt
    6272           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6273           2 :       Value |= (op & UINT64_C(31)) << 21;
    6274             :       // op: rs
    6275           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6276           2 :       Value |= (op & UINT64_C(31)) << 16;
    6277           2 :       break;
    6278             :     }
    6279             :     case Mips::EXTPDPV_MM:
    6280             :     case Mips::EXTPV_MM:
    6281             :     case Mips::EXTRV_RS_W_MM:
    6282             :     case Mips::EXTRV_R_W_MM:
    6283             :     case Mips::EXTRV_S_H_MM:
    6284             :     case Mips::EXTRV_W_MM: {
    6285             :       // op: rt
    6286          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6287          12 :       Value |= (op & UINT64_C(31)) << 21;
    6288             :       // op: rs
    6289          12 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6290          12 :       Value |= (op & UINT64_C(31)) << 16;
    6291             :       // op: ac
    6292          12 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6293          12 :       Value |= (op & UINT64_C(3)) << 14;
    6294          12 :       break;
    6295             :     }
    6296             :     case Mips::BGEZALC:
    6297             :     case Mips::BGEZC:
    6298             :     case Mips::BGEZC64:
    6299             :     case Mips::BLTZALC:
    6300             :     case Mips::BLTZC:
    6301             :     case Mips::BLTZC64: {
    6302             :       // op: rt
    6303           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6304           8 :       Value |= (op & UINT64_C(31)) << 21;
    6305           8 :       Value |= (op & UINT64_C(31)) << 16;
    6306             :       // op: offset
    6307           8 :       op = getBranchTargetOpValue(MI, 1, Fixups, STI);
    6308           8 :       Value |= op & UINT64_C(65535);
    6309           8 :       break;
    6310             :     }
    6311             :     case Mips::BGEZC_MMR6:
    6312             :     case Mips::BLTZC_MMR6: {
    6313             :       // op: rt
    6314           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6315           2 :       Value |= (op & UINT64_C(31)) << 21;
    6316           2 :       Value |= (op & UINT64_C(31)) << 16;
    6317             :       // op: offset
    6318           2 :       op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI);
    6319           2 :       Value |= op & UINT64_C(65535);
    6320           2 :       break;
    6321             :     }
    6322             :     case Mips::BGEZALC_MMR6:
    6323             :     case Mips::BLTZALC_MMR6: {
    6324             :       // op: rt
    6325           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6326           2 :       Value |= (op & UINT64_C(31)) << 21;
    6327           2 :       Value |= (op & UINT64_C(31)) << 16;
    6328             :       // op: offset
    6329           2 :       op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
    6330           2 :       Value |= op & UINT64_C(65535);
    6331           2 :       break;
    6332             :     }
    6333             :     case Mips::LWSP_MM:
    6334             :     case Mips::SWSP_MM:
    6335             :     case Mips::SWSP_MMR6: {
    6336             :       // op: rt
    6337          19 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6338          19 :       Value |= (op & UINT64_C(31)) << 5;
    6339             :       // op: offset
    6340          19 :       op = getMemEncodingMMSPImm5Lsl2(MI, 1, Fixups, STI);
    6341          19 :       Value |= op & UINT64_C(31);
    6342          19 :       break;
    6343             :     }
    6344             :     case Mips::NOT16_MM: {
    6345             :       // op: rt
    6346           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6347           3 :       Value |= (op & UINT64_C(7)) << 3;
    6348             :       // op: rs
    6349           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6350           3 :       Value |= op & UINT64_C(7);
    6351           3 :       break;
    6352             :     }
    6353             :     case Mips::LBU16_MM:
    6354             :     case Mips::SB16_MM:
    6355             :     case Mips::SB16_MMR6: {
    6356             :       // op: rt
    6357          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6358          12 :       Value |= (op & UINT64_C(7)) << 7;
    6359             :       // op: addr
    6360          12 :       op = getMemEncodingMMImm4(MI, 1, Fixups, STI);
    6361          12 :       Value |= op & UINT64_C(127);
    6362          12 :       break;
    6363             :     }
    6364             :     case Mips::LHU16_MM:
    6365             :     case Mips::SH16_MM:
    6366             :     case Mips::SH16_MMR6: {
    6367             :       // op: rt
    6368           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6369           8 :       Value |= (op & UINT64_C(7)) << 7;
    6370             :       // op: addr
    6371           8 :       op = getMemEncodingMMImm4Lsl1(MI, 1, Fixups, STI);
    6372           8 :       Value |= op & UINT64_C(127);
    6373           8 :       break;
    6374             :     }
    6375             :     case Mips::LW16_MM:
    6376             :     case Mips::SW16_MM:
    6377             :     case Mips::SW16_MMR6: {
    6378             :       // op: rt
    6379          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6380          12 :       Value |= (op & UINT64_C(7)) << 7;
    6381             :       // op: addr
    6382          12 :       op = getMemEncodingMMImm4Lsl2(MI, 1, Fixups, STI);
    6383          12 :       Value |= op & UINT64_C(127);
    6384          12 :       break;
    6385             :     }
    6386             :     case Mips::LWGP_MM: {
    6387             :       // op: rt
    6388           6 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6389           6 :       Value |= (op & UINT64_C(7)) << 7;
    6390             :       // op: offset
    6391           6 :       op = getMemEncodingMMGPImm7Lsl2(MI, 1, Fixups, STI);
    6392           6 :       Value |= op & UINT64_C(127);
    6393           6 :       break;
    6394             :     }
    6395             :     case Mips::NOT16_MMR6: {
    6396             :       // op: rt
    6397           1 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6398           1 :       Value |= (op & UINT64_C(7)) << 7;
    6399             :       // op: rs
    6400           1 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6401           1 :       Value |= (op & UINT64_C(7)) << 4;
    6402           1 :       break;
    6403             :     }
    6404             :     case Mips::SC64_R6:
    6405             :     case Mips::SCD_R6:
    6406             :     case Mips::SC_R6: {
    6407             :       // op: rt
    6408           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6409           3 :       Value |= (op & UINT64_C(31)) << 16;
    6410             :       // op: addr
    6411           3 :       op = getMemEncoding(MI, 2, Fixups, STI);
    6412           3 :       Value |= (op & UINT64_C(2031616)) << 5;
    6413           3 :       Value |= (op & UINT64_C(511)) << 7;
    6414           3 :       break;
    6415             :     }
    6416             :     case Mips::SC:
    6417             :     case Mips::SC64:
    6418             :     case Mips::SCD: {
    6419             :       // op: rt
    6420          21 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6421          21 :       Value |= (op & UINT64_C(31)) << 16;
    6422             :       // op: addr
    6423          21 :       op = getMemEncoding(MI, 2, Fixups, STI);
    6424          21 :       Value |= (op & UINT64_C(2031616)) << 5;
    6425          21 :       Value |= op & UINT64_C(65535);
    6426          21 :       break;
    6427             :     }
    6428             :     case Mips::CTC1:
    6429             :     case Mips::DMTC1:
    6430             :     case Mips::MTC1:
    6431             :     case Mips::MTC1_D64: {
    6432             :       // op: rt
    6433         125 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6434         125 :       Value |= (op & UINT64_C(31)) << 16;
    6435             :       // op: fs
    6436         125 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6437         125 :       Value |= (op & UINT64_C(31)) << 11;
    6438         125 :       break;
    6439             :     }
    6440             :     case Mips::DMTC0:
    6441             :     case Mips::DMTC2:
    6442             :     case Mips::DMTGC0:
    6443             :     case Mips::MTC0:
    6444             :     case Mips::MTC2:
    6445             :     case Mips::MTGC0:
    6446             :     case Mips::MTHGC0: {
    6447             :       // op: rt
    6448          41 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6449          41 :       Value |= (op & UINT64_C(31)) << 16;
    6450             :       // op: rd
    6451          41 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6452          41 :       Value |= (op & UINT64_C(31)) << 11;
    6453             :       // op: sel
    6454          41 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6455          41 :       Value |= op & UINT64_C(7);
    6456          41 :       break;
    6457             :     }
    6458             :     case Mips::MFTR:
    6459             :     case Mips::MTTR: {
    6460             :       // op: rt
    6461          66 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6462          66 :       Value |= (op & UINT64_C(31)) << 16;
    6463             :       // op: rd
    6464          66 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6465          66 :       Value |= (op & UINT64_C(31)) << 11;
    6466             :       // op: u
    6467          66 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6468          66 :       Value |= (op & UINT64_C(1)) << 5;
    6469             :       // op: h
    6470          66 :       op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
    6471          66 :       Value |= (op & UINT64_C(1)) << 4;
    6472             :       // op: sel
    6473          66 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    6474          66 :       Value |= op & UINT64_C(7);
    6475          66 :       break;
    6476             :     }
    6477             :     case Mips::SCE_MM: {
    6478             :       // op: rt
    6479           6 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6480           6 :       Value |= (op & UINT64_C(31)) << 21;
    6481             :       // op: addr
    6482           6 :       op = getMemEncoding(MI, 2, Fixups, STI);
    6483           6 :       Value |= op & UINT64_C(2031616);
    6484           6 :       Value |= op & UINT64_C(511);
    6485           6 :       break;
    6486             :     }
    6487             :     case Mips::SC_MM: {
    6488             :       // op: rt
    6489           6 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6490           6 :       Value |= (op & UINT64_C(31)) << 21;
    6491             :       // op: addr
    6492           6 :       op = getMemEncodingMMImm12(MI, 2, Fixups, STI);
    6493           6 :       Value |= op & UINT64_C(2031616);
    6494           6 :       Value |= op & UINT64_C(4095);
    6495           6 :       break;
    6496             :     }
    6497             :     case Mips::CTC1_MM:
    6498             :     case Mips::MTC1_MM:
    6499             :     case Mips::MTC1_MMR6: {
    6500             :       // op: rt
    6501           7 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6502           7 :       Value |= (op & UINT64_C(31)) << 21;
    6503             :       // op: fs
    6504           7 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6505           7 :       Value |= (op & UINT64_C(31)) << 16;
    6506           7 :       break;
    6507             :     }
    6508             :     case Mips::CTC2_MM:
    6509             :     case Mips::MTC2_MMR6:
    6510             :     case Mips::MTHC2_MMR6: {
    6511             :       // op: rt
    6512           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6513           4 :       Value |= (op & UINT64_C(31)) << 21;
    6514             :       // op: impl
    6515           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6516           4 :       Value |= (op & UINT64_C(31)) << 16;
    6517           4 :       break;
    6518             :     }
    6519             :     case Mips::CMPU_EQ_QB_MM:
    6520             :     case Mips::CMPU_LE_QB_MM:
    6521             :     case Mips::CMPU_LT_QB_MM:
    6522             :     case Mips::CMP_EQ_PH_MM:
    6523             :     case Mips::CMP_LE_PH_MM:
    6524             :     case Mips::CMP_LT_PH_MM: {
    6525             :       // op: rt
    6526          12 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6527          12 :       Value |= (op & UINT64_C(31)) << 21;
    6528             :       // op: rs
    6529          12 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6530          12 :       Value |= (op & UINT64_C(31)) << 16;
    6531          12 :       break;
    6532             :     }
    6533             :     case Mips::BEQC_MMR6:
    6534             :     case Mips::BGEC_MMR6:
    6535             :     case Mips::BGEUC_MMR6:
    6536             :     case Mips::BLTC_MMR6:
    6537             :     case Mips::BLTUC_MMR6:
    6538             :     case Mips::BNEC_MMR6: {
    6539             :       // op: rt
    6540           6 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6541           6 :       Value |= (op & UINT64_C(31)) << 21;
    6542             :       // op: rs
    6543           6 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6544           6 :       Value |= (op & UINT64_C(31)) << 16;
    6545             :       // op: offset
    6546           6 :       op = getBranchTargetOpValueLsl2MMR6(MI, 2, Fixups, STI);
    6547           6 :       Value |= op & UINT64_C(65535);
    6548           6 :       break;
    6549             :     }
    6550             :     case Mips::MTC0_MMR6:
    6551             :     case Mips::MTGC0_MM:
    6552             :     case Mips::MTHC0_MMR6:
    6553             :     case Mips::MTHGC0_MM: {
    6554             :       // op: rt
    6555           8 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6556           8 :       Value |= (op & UINT64_C(31)) << 21;
    6557             :       // op: rs
    6558           8 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6559           8 :       Value |= (op & UINT64_C(31)) << 16;
    6560             :       // op: sel
    6561           8 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6562           8 :       Value |= (op & UINT64_C(7)) << 11;
    6563           8 :       break;
    6564             :     }
    6565             :     case Mips::MTHC1_D32:
    6566             :     case Mips::MTHC1_D64: {
    6567             :       // op: rt
    6568          17 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6569          17 :       Value |= (op & UINT64_C(31)) << 16;
    6570             :       // op: fs
    6571          17 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6572          17 :       Value |= (op & UINT64_C(31)) << 11;
    6573          17 :       break;
    6574             :     }
    6575             :     case Mips::SPLAT_B:
    6576             :     case Mips::SPLAT_D:
    6577             :     case Mips::SPLAT_H:
    6578             :     case Mips::SPLAT_W: {
    6579             :       // op: rt
    6580           4 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6581           4 :       Value |= (op & UINT64_C(31)) << 16;
    6582             :       // op: ws
    6583           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6584           4 :       Value |= (op & UINT64_C(31)) << 11;
    6585             :       // op: wd
    6586           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6587           4 :       Value |= (op & UINT64_C(31)) << 6;
    6588           4 :       break;
    6589             :     }
    6590             :     case Mips::MTHC1_D32_MM:
    6591             :     case Mips::MTHC1_D64_MM: {
    6592             :       // op: rt
    6593           5 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6594           5 :       Value |= (op & UINT64_C(31)) << 21;
    6595             :       // op: fs
    6596           5 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6597           5 :       Value |= (op & UINT64_C(31)) << 16;
    6598           5 :       break;
    6599             :     }
    6600             :     case Mips::DPAQX_SA_W_PH_MMR2:
    6601             :     case Mips::DPAQX_S_W_PH_MMR2:
    6602             :     case Mips::DPAQ_SA_L_W_MM:
    6603             :     case Mips::DPAQ_S_W_PH_MM:
    6604             :     case Mips::DPAU_H_QBL_MM:
    6605             :     case Mips::DPAU_H_QBR_MM:
    6606             :     case Mips::DPAX_W_PH_MMR2:
    6607             :     case Mips::DPA_W_PH_MMR2:
    6608             :     case Mips::DPSQX_SA_W_PH_MMR2:
    6609             :     case Mips::DPSQX_S_W_PH_MMR2:
    6610             :     case Mips::DPSQ_SA_L_W_MM:
    6611             :     case Mips::DPSQ_S_W_PH_MM:
    6612             :     case Mips::DPSU_H_QBL_MM:
    6613             :     case Mips::DPSU_H_QBR_MM:
    6614             :     case Mips::DPSX_W_PH_MMR2:
    6615             :     case Mips::DPS_W_PH_MMR2:
    6616             :     case Mips::MADDU_DSP_MM:
    6617             :     case Mips::MADD_DSP_MM:
    6618             :     case Mips::MAQ_SA_W_PHL_MM:
    6619             :     case Mips::MAQ_SA_W_PHR_MM:
    6620             :     case Mips::MAQ_S_W_PHL_MM:
    6621             :     case Mips::MAQ_S_W_PHR_MM:
    6622             :     case Mips::MSUBU_DSP_MM:
    6623             :     case Mips::MSUB_DSP_MM:
    6624             :     case Mips::MULSAQ_S_W_PH_MM:
    6625             :     case Mips::MULSA_W_PH_MMR2:
    6626             :     case Mips::MULTU_DSP_MM:
    6627             :     case Mips::MULT_DSP_MM: {
    6628             :       // op: rt
    6629          42 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6630          42 :       Value |= (op & UINT64_C(31)) << 21;
    6631             :       // op: rs
    6632          42 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6633          42 :       Value |= (op & UINT64_C(31)) << 16;
    6634             :       // op: ac
    6635          42 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6636          42 :       Value |= (op & UINT64_C(3)) << 14;
    6637          42 :       break;
    6638             :     }
    6639             :     case Mips::ADD_MM:
    6640             :     case Mips::ADDu_MM:
    6641             :     case Mips::AND_MM:
    6642             :     case Mips::CMPGU_EQ_QB_MM:
    6643             :     case Mips::CMPGU_LE_QB_MM:
    6644             :     case Mips::CMPGU_LT_QB_MM:
    6645             :     case Mips::MOVN_I_MM:
    6646             :     case Mips::MOVZ_I_MM:
    6647             :     case Mips::MUL_MM:
    6648             :     case Mips::NOR_MM:
    6649             :     case Mips::OR_MM:
    6650             :     case Mips::SLT_MM:
    6651             :     case Mips::SLTu_MM:
    6652             :     case Mips::SUB_MM:
    6653             :     case Mips::SUBu_MM:
    6654             :     case Mips::XOR_MM: {
    6655             :       // op: rt
    6656         173 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6657         173 :       Value |= (op & UINT64_C(31)) << 21;
    6658             :       // op: rs
    6659         173 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6660         173 :       Value |= (op & UINT64_C(31)) << 16;
    6661             :       // op: rd
    6662         173 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6663         173 :       Value |= (op & UINT64_C(31)) << 11;
    6664         173 :       break;
    6665             :     }
    6666             :     case Mips::AND16_MM:
    6667             :     case Mips::OR16_MM:
    6668             :     case Mips::XOR16_MM: {
    6669             :       // op: rt
    6670           9 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6671           9 :       Value |= (op & UINT64_C(7)) << 3;
    6672             :       // op: rs
    6673           9 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6674           9 :       Value |= op & UINT64_C(7);
    6675           9 :       break;
    6676             :     }
    6677             :     case Mips::AND16_MMR6:
    6678             :     case Mips::OR16_MMR6:
    6679             :     case Mips::XOR16_MMR6: {
    6680             :       // op: rt
    6681           3 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6682           3 :       Value |= (op & UINT64_C(7)) << 7;
    6683             :       // op: rs
    6684           3 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6685           3 :       Value |= (op & UINT64_C(7)) << 4;
    6686           3 :       break;
    6687             :     }
    6688             :     case Mips::SLD_B:
    6689             :     case Mips::SLD_D:
    6690             :     case Mips::SLD_H:
    6691             :     case Mips::SLD_W: {
    6692             :       // op: rt
    6693           4 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    6694           4 :       Value |= (op & UINT64_C(31)) << 16;
    6695             :       // op: ws
    6696           4 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6697           4 :       Value |= (op & UINT64_C(31)) << 11;
    6698             :       // op: wd
    6699           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6700           4 :       Value |= (op & UINT64_C(31)) << 6;
    6701           4 :       break;
    6702             :     }
    6703          45 :     case Mips::LWM32_MM:
    6704             :     case Mips::SWM32_MM: {
    6705             :       // op: rt
    6706          45 :       op = getRegisterListOpValue(MI, 0, Fixups, STI);
    6707          45 :       Value |= (op & UINT64_C(31)) << 21;
    6708             :       // op: addr
    6709          45 :       op = getMemEncodingMMImm12(MI, 1, Fixups, STI);
    6710          45 :       Value |= op & UINT64_C(2031616);
    6711          45 :       Value |= op & UINT64_C(4095);
    6712          45 :       break;
    6713             :     }
    6714          10 :     case Mips::LWM16_MM:
    6715             :     case Mips::SWM16_MM: {
    6716             :       // op: rt
    6717          10 :       op = getRegisterListOpValue16(MI, 0, Fixups, STI);
    6718          10 :       Value |= (op & UINT64_C(3)) << 4;
    6719             :       // op: addr
    6720          10 :       op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI);
    6721          10 :       Value |= op & UINT64_C(15);
    6722          10 :       break;
    6723             :     }
    6724           4 :     case Mips::LWM16_MMR6:
    6725             :     case Mips::SWM16_MMR6: {
    6726             :       // op: rt
    6727           4 :       op = getRegisterListOpValue16(MI, 0, Fixups, STI);
    6728           4 :       Value |= (op & UINT64_C(3)) << 8;
    6729             :       // op: addr
    6730           4 :       op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI);
    6731           4 :       Value |= (op & UINT64_C(15)) << 4;
    6732           4 :       break;
    6733             :     }
    6734           6 :     case Mips::LWP_MM:
    6735             :     case Mips::SWP_MM: {
    6736             :       // op: rt
    6737           6 :       op = getRegisterPairOpValue(MI, 0, Fixups, STI);
    6738           6 :       Value |= (op & UINT64_C(31)) << 21;
    6739             :       // op: addr
    6740           6 :       op = getMemEncoding(MI, 2, Fixups, STI);
    6741           6 :       Value |= op & UINT64_C(2031616);
    6742           6 :       Value |= op & UINT64_C(4095);
    6743           6 :       break;
    6744             :     }
    6745             :     case Mips::JrcRx16:
    6746             :     case Mips::JumpLinkReg16:
    6747             :     case Mips::SebRx16:
    6748             :     case Mips::SehRx16: {
    6749             :       // op: rx
    6750           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6751           0 :       Value |= (op & UINT64_C(7)) << 8;
    6752           0 :       break;
    6753             :     }
    6754             :     case Mips::AddiuRxRxImm16:
    6755             :     case Mips::BeqzRxImm16:
    6756             :     case Mips::BnezRxImm16:
    6757             :     case Mips::CmpiRxImm16:
    6758             :     case Mips::LiRxImm16:
    6759             :     case Mips::LwRxPcTcp16:
    6760             :     case Mips::SltiRxImm16:
    6761             :     case Mips::SltiuRxImm16: {
    6762             :       // op: rx
    6763           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6764           0 :       Value |= (op & UINT64_C(7)) << 8;
    6765             :       // op: imm8
    6766           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6767           0 :       Value |= op & UINT64_C(255);
    6768           0 :       break;
    6769             :     }
    6770             :     case Mips::Mfhi16:
    6771             :     case Mips::Mflo16: {
    6772             :       // op: rx
    6773           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6774           0 :       Value |= (op & UINT64_C(7)) << 8;
    6775             :       // op: ry
    6776           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6777           0 :       Value |= (op & UINT64_C(7)) << 5;
    6778           0 :       break;
    6779             :     }
    6780             :     case Mips::CmpRxRy16:
    6781             :     case Mips::DivRxRy16:
    6782             :     case Mips::DivuRxRy16:
    6783             :     case Mips::NegRxRy16:
    6784             :     case Mips::NotRxRy16:
    6785             :     case Mips::SltRxRy16:
    6786             :     case Mips::SltuRxRy16: {
    6787             :       // op: rx
    6788           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6789           0 :       Value |= (op & UINT64_C(7)) << 8;
    6790             :       // op: ry
    6791           0 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6792           0 :       Value |= (op & UINT64_C(7)) << 5;
    6793           0 :       break;
    6794             :     }
    6795             :     case Mips::AndRxRxRy16:
    6796             :     case Mips::OrRxRxRy16:
    6797             :     case Mips::SllvRxRy16:
    6798             :     case Mips::SravRxRy16:
    6799             :     case Mips::SrlvRxRy16:
    6800             :     case Mips::XorRxRxRy16: {
    6801             :       // op: rx
    6802           0 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6803           0 :       Value |= (op & UINT64_C(7)) << 8;
    6804             :       // op: ry
    6805           0 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6806           0 :       Value |= (op & UINT64_C(7)) << 5;
    6807           0 :       break;
    6808             :     }
    6809             :     case Mips::AdduRxRyRz16:
    6810             :     case Mips::SubuRxRyRz16: {
    6811             :       // op: rx
    6812           0 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6813           0 :       Value |= (op & UINT64_C(7)) << 8;
    6814             :       // op: ry
    6815           0 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6816           0 :       Value |= (op & UINT64_C(7)) << 5;
    6817             :       // op: rz
    6818           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6819           0 :       Value |= (op & UINT64_C(7)) << 2;
    6820           0 :       break;
    6821             :     }
    6822             :     case Mips::MoveR3216: {
    6823             :       // op: ry
    6824           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6825           0 :       Value |= (op & UINT64_C(15)) << 4;
    6826             :       // op: r32
    6827           0 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6828           0 :       Value |= op & UINT64_C(15);
    6829           0 :       break;
    6830             :     }
    6831             :     case Mips::LDI_B:
    6832             :     case Mips::LDI_D:
    6833             :     case Mips::LDI_H:
    6834             :     case Mips::LDI_W: {
    6835             :       // op: s10
    6836           4 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6837           4 :       Value |= (op & UINT64_C(1023)) << 11;
    6838             :       // op: wd
    6839           4 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6840           4 :       Value |= (op & UINT64_C(31)) << 6;
    6841           4 :       break;
    6842             :     }
    6843             :     case Mips::SllX16:
    6844             :     case Mips::SraX16:
    6845             :     case Mips::SrlX16: {
    6846             :       // op: sa6
    6847           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6848           0 :       Value |= (op & UINT64_C(31)) << 22;
    6849           0 :       Value |= (op & UINT64_C(32)) << 16;
    6850             :       // op: rx
    6851           0 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6852           0 :       Value |= (op & UINT64_C(7)) << 8;
    6853             :       // op: ry
    6854           0 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6855           0 :       Value |= (op & UINT64_C(7)) << 5;
    6856           0 :       break;
    6857             :     }
    6858             :     case Mips::SHILO_MM: {
    6859             :       // op: shift
    6860           2 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6861           2 :       Value |= (op & UINT64_C(63)) << 16;
    6862             :       // op: ac
    6863           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6864           2 :       Value |= (op & UINT64_C(3)) << 14;
    6865           2 :       break;
    6866             :     }
    6867             :     case Mips::SYNC_MM:
    6868             :     case Mips::SYNC_MMR6: {
    6869             :       // op: stype
    6870           7 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6871           7 :       Value |= (op & UINT64_C(31)) << 16;
    6872           7 :       break;
    6873             :     }
    6874             :     case Mips::SYNC: {
    6875             :       // op: stype
    6876          34 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6877          34 :       Value |= (op & UINT64_C(31)) << 6;
    6878          34 :       break;
    6879             :     }
    6880         138 :     case Mips::J:
    6881             :     case Mips::JAL:
    6882             :     case Mips::JALX:
    6883             :     case Mips::JALX_MM: {
    6884             :       // op: target
    6885         138 :       op = getJumpTargetOpValue(MI, 0, Fixups, STI);
    6886         138 :       Value |= op & UINT64_C(67108863);
    6887         138 :       break;
    6888             :     }
    6889          21 :     case Mips::JALS_MM:
    6890             :     case Mips::JAL_MM:
    6891             :     case Mips::J_MM: {
    6892             :       // op: target
    6893          21 :       op = getJumpTargetOpValueMM(MI, 0, Fixups, STI);
    6894          21 :       Value |= op & UINT64_C(67108863);
    6895          21 :       break;
    6896             :     }
    6897             :     case Mips::ANDI_B:
    6898             :     case Mips::NORI_B:
    6899             :     case Mips::ORI_B:
    6900             :     case Mips::SHF_B:
    6901             :     case Mips::SHF_H:
    6902             :     case Mips::SHF_W:
    6903             :     case Mips::XORI_B: {
    6904             :       // op: u8
    6905           7 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6906           7 :       Value |= (op & UINT64_C(255)) << 16;
    6907             :       // op: ws
    6908           7 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6909           7 :       Value |= (op & UINT64_C(31)) << 11;
    6910             :       // op: wd
    6911           7 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6912           7 :       Value |= (op & UINT64_C(31)) << 6;
    6913           7 :       break;
    6914             :     }
    6915             :     case Mips::BMNZI_B:
    6916             :     case Mips::BMZI_B:
    6917             :     case Mips::BSELI_B: {
    6918             :       // op: u8
    6919           3 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    6920           3 :       Value |= (op & UINT64_C(255)) << 16;
    6921             :       // op: ws
    6922           3 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    6923           3 :       Value |= (op & UINT64_C(31)) << 11;
    6924             :       // op: wd
    6925           3 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6926           3 :       Value |= (op & UINT64_C(31)) << 6;
    6927           3 :       break;
    6928             :     }
    6929             :     case Mips::FCLASS_D:
    6930             :     case Mips::FCLASS_W:
    6931             :     case Mips::FEXUPL_D:
    6932             :     case Mips::FEXUPL_W:
    6933             :     case Mips::FEXUPR_D:
    6934             :     case Mips::FEXUPR_W:
    6935             :     case Mips::FFINT_S_D:
    6936             :     case Mips::FFINT_S_W:
    6937             :     case Mips::FFINT_U_D:
    6938             :     case Mips::FFINT_U_W:
    6939             :     case Mips::FFQL_D:
    6940             :     case Mips::FFQL_W:
    6941             :     case Mips::FFQR_D:
    6942             :     case Mips::FFQR_W:
    6943             :     case Mips::FLOG2_D:
    6944             :     case Mips::FLOG2_W:
    6945             :     case Mips::FRCP_D:
    6946             :     case Mips::FRCP_W:
    6947             :     case Mips::FRINT_D:
    6948             :     case Mips::FRINT_W:
    6949             :     case Mips::FRSQRT_D:
    6950             :     case Mips::FRSQRT_W:
    6951             :     case Mips::FSQRT_D:
    6952             :     case Mips::FSQRT_W:
    6953             :     case Mips::FTINT_S_D:
    6954             :     case Mips::FTINT_S_W:
    6955             :     case Mips::FTINT_U_D:
    6956             :     case Mips::FTINT_U_W:
    6957             :     case Mips::FTRUNC_S_D:
    6958             :     case Mips::FTRUNC_S_W:
    6959             :     case Mips::FTRUNC_U_D:
    6960             :     case Mips::FTRUNC_U_W:
    6961             :     case Mips::MOVE_V:
    6962             :     case Mips::NLOC_B:
    6963             :     case Mips::NLOC_D:
    6964             :     case Mips::NLOC_H:
    6965             :     case Mips::NLOC_W:
    6966             :     case Mips::NLZC_B:
    6967             :     case Mips::NLZC_D:
    6968             :     case Mips::NLZC_H:
    6969             :     case Mips::NLZC_W:
    6970             :     case Mips::PCNT_B:
    6971             :     case Mips::PCNT_D:
    6972             :     case Mips::PCNT_H:
    6973             :     case Mips::PCNT_W: {
    6974             :       // op: ws
    6975          45 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6976          45 :       Value |= (op & UINT64_C(31)) << 11;
    6977             :       // op: wd
    6978          45 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6979          45 :       Value |= (op & UINT64_C(31)) << 6;
    6980          45 :       break;
    6981             :     }
    6982             :     case Mips::BCLRI_H:
    6983             :     case Mips::BNEGI_H:
    6984             :     case Mips::BSETI_H:
    6985             :     case Mips::SAT_S_H:
    6986             :     case Mips::SAT_U_H:
    6987             :     case Mips::SLLI_H:
    6988             :     case Mips::SRAI_H:
    6989             :     case Mips::SRARI_H:
    6990             :     case Mips::SRLI_H:
    6991             :     case Mips::SRLRI_H: {
    6992             :       // op: ws
    6993          10 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    6994          10 :       Value |= (op & UINT64_C(31)) << 11;
    6995             :       // op: wd
    6996          10 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    6997          10 :       Value |= (op & UINT64_C(31)) << 6;
    6998             :       // op: m
    6999          10 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7000          10 :       Value |= (op & UINT64_C(15)) << 16;
    7001          10 :       break;
    7002             :     }
    7003             :     case Mips::BCLRI_W:
    7004             :     case Mips::BNEGI_W:
    7005             :     case Mips::BSETI_W:
    7006             :     case Mips::SAT_S_W:
    7007             :     case Mips::SAT_U_W:
    7008             :     case Mips::SLLI_W:
    7009             :     case Mips::SRAI_W:
    7010             :     case Mips::SRARI_W:
    7011             :     case Mips::SRLI_W:
    7012             :     case Mips::SRLRI_W: {
    7013             :       // op: ws
    7014          10 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    7015          10 :       Value |= (op & UINT64_C(31)) << 11;
    7016             :       // op: wd
    7017          10 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7018          10 :       Value |= (op & UINT64_C(31)) << 6;
    7019             :       // op: m
    7020          10 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7021          10 :       Value |= (op & UINT64_C(31)) << 16;
    7022          10 :       break;
    7023             :     }
    7024             :     case Mips::BCLRI_D:
    7025             :     case Mips::BNEGI_D:
    7026             :     case Mips::BSETI_D:
    7027             :     case Mips::SAT_S_D:
    7028             :     case Mips::SAT_U_D:
    7029             :     case Mips::SLLI_D:
    7030             :     case Mips::SRAI_D:
    7031             :     case Mips::SRARI_D:
    7032             :     case Mips::SRLI_D:
    7033             :     case Mips::SRLRI_D: {
    7034             :       // op: ws
    7035          10 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    7036          10 :       Value |= (op & UINT64_C(31)) << 11;
    7037             :       // op: wd
    7038          10 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7039          10 :       Value |= (op & UINT64_C(31)) << 6;
    7040             :       // op: m
    7041          10 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7042          10 :       Value |= (op & UINT64_C(63)) << 16;
    7043          10 :       break;
    7044             :     }
    7045             :     case Mips::BCLRI_B:
    7046             :     case Mips::BNEGI_B:
    7047             :     case Mips::BSETI_B:
    7048             :     case Mips::SAT_S_B:
    7049             :     case Mips::SAT_U_B:
    7050             :     case Mips::SLLI_B:
    7051             :     case Mips::SRAI_B:
    7052             :     case Mips::SRARI_B:
    7053             :     case Mips::SRLI_B:
    7054             :     case Mips::SRLRI_B: {
    7055             :       // op: ws
    7056          10 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    7057          10 :       Value |= (op & UINT64_C(31)) << 11;
    7058             :       // op: wd
    7059          10 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7060          10 :       Value |= (op & UINT64_C(31)) << 6;
    7061             :       // op: m
    7062          10 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7063          10 :       Value |= (op & UINT64_C(7)) << 16;
    7064          10 :       break;
    7065             :     }
    7066             :     case Mips::BINSLI_H:
    7067             :     case Mips::BINSRI_H: {
    7068             :       // op: ws
    7069           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7070           2 :       Value |= (op & UINT64_C(31)) << 11;
    7071             :       // op: wd
    7072           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7073           2 :       Value |= (op & UINT64_C(31)) << 6;
    7074             :       // op: m
    7075           2 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    7076           2 :       Value |= (op & UINT64_C(15)) << 16;
    7077           2 :       break;
    7078             :     }
    7079             :     case Mips::BINSLI_W:
    7080             :     case Mips::BINSRI_W: {
    7081             :       // op: ws
    7082           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7083           2 :       Value |= (op & UINT64_C(31)) << 11;
    7084             :       // op: wd
    7085           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7086           2 :       Value |= (op & UINT64_C(31)) << 6;
    7087             :       // op: m
    7088           2 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    7089           2 :       Value |= (op & UINT64_C(31)) << 16;
    7090           2 :       break;
    7091             :     }
    7092             :     case Mips::BINSLI_D:
    7093             :     case Mips::BINSRI_D: {
    7094             :       // op: ws
    7095           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7096           2 :       Value |= (op & UINT64_C(31)) << 11;
    7097             :       // op: wd
    7098           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7099           2 :       Value |= (op & UINT64_C(31)) << 6;
    7100             :       // op: m
    7101           2 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    7102           2 :       Value |= (op & UINT64_C(63)) << 16;
    7103           2 :       break;
    7104             :     }
    7105             :     case Mips::BINSLI_B:
    7106             :     case Mips::BINSRI_B: {
    7107             :       // op: ws
    7108           2 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7109           2 :       Value |= (op & UINT64_C(31)) << 11;
    7110             :       // op: wd
    7111           2 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7112           2 :       Value |= (op & UINT64_C(31)) << 6;
    7113             :       // op: m
    7114           2 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    7115           2 :       Value |= (op & UINT64_C(7)) << 16;
    7116           2 :       break;
    7117             :     }
    7118             :     case Mips::ADDS_A_B:
    7119             :     case Mips::ADDS_A_D:
    7120             :     case Mips::ADDS_A_H:
    7121             :     case Mips::ADDS_A_W:
    7122             :     case Mips::ADDS_S_B:
    7123             :     case Mips::ADDS_S_D:
    7124             :     case Mips::ADDS_S_H:
    7125             :     case Mips::ADDS_S_W:
    7126             :     case Mips::ADDS_U_B:
    7127             :     case Mips::ADDS_U_D:
    7128             :     case Mips::ADDS_U_H:
    7129             :     case Mips::ADDS_U_W:
    7130             :     case Mips::ADDV_B:
    7131             :     case Mips::ADDV_D:
    7132             :     case Mips::ADDV_H:
    7133             :     case Mips::ADDV_W:
    7134             :     case Mips::ADD_A_B:
    7135             :     case Mips::ADD_A_D:
    7136             :     case Mips::ADD_A_H:
    7137             :     case Mips::ADD_A_W:
    7138             :     case Mips::AND_V:
    7139             :     case Mips::ASUB_S_B:
    7140             :     case Mips::ASUB_S_D:
    7141             :     case Mips::ASUB_S_H:
    7142             :     case Mips::ASUB_S_W:
    7143             :     case Mips::ASUB_U_B:
    7144             :     case Mips::ASUB_U_D:
    7145             :     case Mips::ASUB_U_H:
    7146             :     case Mips::ASUB_U_W:
    7147             :     case Mips::AVER_S_B:
    7148             :     case Mips::AVER_S_D:
    7149             :     case Mips::AVER_S_H:
    7150             :     case Mips::AVER_S_W:
    7151             :     case Mips::AVER_U_B:
    7152             :     case Mips::AVER_U_D:
    7153             :     case Mips::AVER_U_H:
    7154             :     case Mips::AVER_U_W:
    7155             :     case Mips::AVE_S_B:
    7156             :     case Mips::AVE_S_D:
    7157             :     case Mips::AVE_S_H:
    7158             :     case Mips::AVE_S_W:
    7159             :     case Mips::AVE_U_B:
    7160             :     case Mips::AVE_U_D:
    7161             :     case Mips::AVE_U_H:
    7162             :     case Mips::AVE_U_W:
    7163             :     case Mips::BCLR_B:
    7164             :     case Mips::BCLR_D:
    7165             :     case Mips::BCLR_H:
    7166             :     case Mips::BCLR_W:
    7167             :     case Mips::BNEG_B:
    7168             :     case Mips::BNEG_D:
    7169             :     case Mips::BNEG_H:
    7170             :     case Mips::BNEG_W:
    7171             :     case Mips::BSET_B:
    7172             :     case Mips::BSET_D:
    7173             :     case Mips::BSET_H:
    7174             :     case Mips::BSET_W:
    7175             :     case Mips::CEQ_B:
    7176             :     case Mips::CEQ_D:
    7177             :     case Mips::CEQ_H:
    7178             :     case Mips::CEQ_W:
    7179             :     case Mips::CLE_S_B:
    7180             :     case Mips::CLE_S_D:
    7181             :     case Mips::CLE_S_H:
    7182             :     case Mips::CLE_S_W:
    7183             :     case Mips::CLE_U_B:
    7184             :     case Mips::CLE_U_D:
    7185             :     case Mips::CLE_U_H:
    7186             :     case Mips::CLE_U_W:
    7187             :     case Mips::CLT_S_B:
    7188             :     case Mips::CLT_S_D:
    7189             :     case Mips::CLT_S_H:
    7190             :     case Mips::CLT_S_W:
    7191             :     case Mips::CLT_U_B:
    7192             :     case Mips::CLT_U_D:
    7193             :     case Mips::CLT_U_H:
    7194             :     case Mips::CLT_U_W:
    7195             :     case Mips::DIV_S_B:
    7196             :     case Mips::DIV_S_D:
    7197             :     case Mips::DIV_S_H:
    7198             :     case Mips::DIV_S_W:
    7199             :     case Mips::DIV_U_B:
    7200             :     case Mips::DIV_U_D:
    7201             :     case Mips::DIV_U_H:
    7202             :     case Mips::DIV_U_W:
    7203             :     case Mips::DOTP_S_D:
    7204             :     case Mips::DOTP_S_H:
    7205             :     case Mips::DOTP_S_W:
    7206             :     case Mips::DOTP_U_D:
    7207             :     case Mips::DOTP_U_H:
    7208             :     case Mips::DOTP_U_W:
    7209             :     case Mips::FADD_D:
    7210             :     case Mips::FADD_W:
    7211             :     case Mips::FCAF_D:
    7212             :     case Mips::FCAF_W:
    7213             :     case Mips::FCEQ_D:
    7214             :     case Mips::FCEQ_W:
    7215             :     case Mips::FCLE_D:
    7216             :     case Mips::FCLE_W:
    7217             :     case Mips::FCLT_D:
    7218             :     case Mips::FCLT_W:
    7219             :     case Mips::FCNE_D:
    7220             :     case Mips::FCNE_W:
    7221             :     case Mips::FCOR_D:
    7222             :     case Mips::FCOR_W:
    7223             :     case Mips::FCUEQ_D:
    7224             :     case Mips::FCUEQ_W:
    7225             :     case Mips::FCULE_D:
    7226             :     case Mips::FCULE_W:
    7227             :     case Mips::FCULT_D:
    7228             :     case Mips::FCULT_W:
    7229             :     case Mips::FCUNE_D:
    7230             :     case Mips::FCUNE_W:
    7231             :     case Mips::FCUN_D:
    7232             :     case Mips::FCUN_W:
    7233             :     case Mips::FDIV_D:
    7234             :     case Mips::FDIV_W:
    7235             :     case Mips::FEXDO_H:
    7236             :     case Mips::FEXDO_W:
    7237             :     case Mips::FEXP2_D:
    7238             :     case Mips::FEXP2_W:
    7239             :     case Mips::FMAX_A_D:
    7240             :     case Mips::FMAX_A_W:
    7241             :     case Mips::FMAX_D:
    7242             :     case Mips::FMAX_W:
    7243             :     case Mips::FMIN_A_D:
    7244             :     case Mips::FMIN_A_W:
    7245             :     case Mips::FMIN_D:
    7246             :     case Mips::FMIN_W:
    7247             :     case Mips::FMUL_D:
    7248             :     case Mips::FMUL_W:
    7249             :     case Mips::FSAF_D:
    7250             :     case Mips::FSAF_W:
    7251             :     case Mips::FSEQ_D:
    7252             :     case Mips::FSEQ_W:
    7253             :     case Mips::FSLE_D:
    7254             :     case Mips::FSLE_W:
    7255             :     case Mips::FSLT_D:
    7256             :     case Mips::FSLT_W:
    7257             :     case Mips::FSNE_D:
    7258             :     case Mips::FSNE_W:
    7259             :     case Mips::FSOR_D:
    7260             :     case Mips::FSOR_W:
    7261             :     case Mips::FSUB_D:
    7262             :     case Mips::FSUB_W:
    7263             :     case Mips::FSUEQ_D:
    7264             :     case Mips::FSUEQ_W:
    7265             :     case Mips::FSULE_D:
    7266             :     case Mips::FSULE_W:
    7267             :     case Mips::FSULT_D:
    7268             :     case Mips::FSULT_W:
    7269             :     case Mips::FSUNE_D:
    7270             :     case Mips::FSUNE_W:
    7271             :     case Mips::FSUN_D:
    7272             :     case Mips::FSUN_W:
    7273             :     case Mips::FTQ_H:
    7274             :     case Mips::FTQ_W:
    7275             :     case Mips::HADD_S_D:
    7276             :     case Mips::HADD_S_H:
    7277             :     case Mips::HADD_S_W:
    7278             :     case Mips::HADD_U_D:
    7279             :     case Mips::HADD_U_H:
    7280             :     case Mips::HADD_U_W:
    7281             :     case Mips::HSUB_S_D:
    7282             :     case Mips::HSUB_S_H:
    7283             :     case Mips::HSUB_S_W:
    7284             :     case Mips::HSUB_U_D:
    7285             :     case Mips::HSUB_U_H:
    7286             :     case Mips::HSUB_U_W:
    7287             :     case Mips::ILVEV_B:
    7288             :     case Mips::ILVEV_D:
    7289             :     case Mips::ILVEV_H:
    7290             :     case Mips::ILVEV_W:
    7291             :     case Mips::ILVL_B:
    7292             :     case Mips::ILVL_D:
    7293             :     case Mips::ILVL_H:
    7294             :     case Mips::ILVL_W:
    7295             :     case Mips::ILVOD_B:
    7296             :     case Mips::ILVOD_D:
    7297             :     case Mips::ILVOD_H:
    7298             :     case Mips::ILVOD_W:
    7299             :     case Mips::ILVR_B:
    7300             :     case Mips::ILVR_D:
    7301             :     case Mips::ILVR_H:
    7302             :     case Mips::ILVR_W:
    7303             :     case Mips::MAX_A_B:
    7304             :     case Mips::MAX_A_D:
    7305             :     case Mips::MAX_A_H:
    7306             :     case Mips::MAX_A_W:
    7307             :     case Mips::MAX_S_B:
    7308             :     case Mips::MAX_S_D:
    7309             :     case Mips::MAX_S_H:
    7310             :     case Mips::MAX_S_W:
    7311             :     case Mips::MAX_U_B:
    7312             :     case Mips::MAX_U_D:
    7313             :     case Mips::MAX_U_H:
    7314             :     case Mips::MAX_U_W:
    7315             :     case Mips::MIN_A_B:
    7316             :     case Mips::MIN_A_D:
    7317             :     case Mips::MIN_A_H:
    7318             :     case Mips::MIN_A_W:
    7319             :     case Mips::MIN_S_B:
    7320             :     case Mips::MIN_S_D:
    7321             :     case Mips::MIN_S_H:
    7322             :     case Mips::MIN_S_W:
    7323             :     case Mips::MIN_U_B:
    7324             :     case Mips::MIN_U_D:
    7325             :     case Mips::MIN_U_H:
    7326             :     case Mips::MIN_U_W:
    7327             :     case Mips::MOD_S_B:
    7328             :     case Mips::MOD_S_D:
    7329             :     case Mips::MOD_S_H:
    7330             :     case Mips::MOD_S_W:
    7331             :     case Mips::MOD_U_B:
    7332             :     case Mips::MOD_U_D:
    7333             :     case Mips::MOD_U_H:
    7334             :     case Mips::MOD_U_W:
    7335             :     case Mips::MULR_Q_H:
    7336             :     case Mips::MULR_Q_W:
    7337             :     case Mips::MULV_B:
    7338             :     case Mips::MULV_D:
    7339             :     case Mips::MULV_H:
    7340             :     case Mips::MULV_W:
    7341             :     case Mips::MUL_Q_H:
    7342             :     case Mips::MUL_Q_W:
    7343             :     case Mips::NOR_V:
    7344             :     case Mips::OR_V:
    7345             :     case Mips::PCKEV_B:
    7346             :     case Mips::PCKEV_D:
    7347             :     case Mips::PCKEV_H:
    7348             :     case Mips::PCKEV_W:
    7349             :     case Mips::PCKOD_B:
    7350             :     case Mips::PCKOD_D:
    7351             :     case Mips::PCKOD_H:
    7352             :     case Mips::PCKOD_W:
    7353             :     case Mips::SLL_B:
    7354             :     case Mips::SLL_D:
    7355             :     case Mips::SLL_H:
    7356             :     case Mips::SLL_W:
    7357             :     case Mips::SRAR_B:
    7358             :     case Mips::SRAR_D:
    7359             :     case Mips::SRAR_H:
    7360             :     case Mips::SRAR_W:
    7361             :     case Mips::SRA_B:
    7362             :     case Mips::SRA_D:
    7363             :     case Mips::SRA_H:
    7364             :     case Mips::SRA_W:
    7365             :     case Mips::SRLR_B:
    7366             :     case Mips::SRLR_D:
    7367             :     case Mips::SRLR_H:
    7368             :     case Mips::SRLR_W:
    7369             :     case Mips::SRL_B:
    7370             :     case Mips::SRL_D:
    7371             :     case Mips::SRL_H:
    7372             :     case Mips::SRL_W:
    7373             :     case Mips::SUBSUS_U_B:
    7374             :     case Mips::SUBSUS_U_D:
    7375             :     case Mips::SUBSUS_U_H:
    7376             :     case Mips::SUBSUS_U_W:
    7377             :     case Mips::SUBSUU_S_B:
    7378             :     case Mips::SUBSUU_S_D:
    7379             :     case Mips::SUBSUU_S_H:
    7380             :     case Mips::SUBSUU_S_W:
    7381             :     case Mips::SUBS_S_B:
    7382             :     case Mips::SUBS_S_D:
    7383             :     case Mips::SUBS_S_H:
    7384             :     case Mips::SUBS_S_W:
    7385             :     case Mips::SUBS_U_B:
    7386             :     case Mips::SUBS_U_D:
    7387             :     case Mips::SUBS_U_H:
    7388             :     case Mips::SUBS_U_W:
    7389             :     case Mips::SUBV_B:
    7390             :     case Mips::SUBV_D:
    7391             :     case Mips::SUBV_H:
    7392             :     case Mips::SUBV_W:
    7393             :     case Mips::XOR_V: {
    7394             :       // op: wt
    7395         282 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7396         282 :       Value |= (op & UINT64_C(31)) << 16;
    7397             :       // op: ws
    7398         282 :       op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
    7399         282 :       Value |= (op & UINT64_C(31)) << 11;
    7400             :       // op: wd
    7401         282 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7402         282 :       Value |= (op & UINT64_C(31)) << 6;
    7403         282 :       break;
    7404             :     }
    7405             :     case Mips::BINSL_B:
    7406             :     case Mips::BINSL_D:
    7407             :     case Mips::BINSL_H:
    7408             :     case Mips::BINSL_W:
    7409             :     case Mips::BINSR_B:
    7410             :     case Mips::BINSR_D:
    7411             :     case Mips::BINSR_H:
    7412             :     case Mips::BINSR_W:
    7413             :     case Mips::BMNZ_V:
    7414             :     case Mips::BMZ_V:
    7415             :     case Mips::BSEL_V:
    7416             :     case Mips::DPADD_S_D:
    7417             :     case Mips::DPADD_S_H:
    7418             :     case Mips::DPADD_S_W:
    7419             :     case Mips::DPADD_U_D:
    7420             :     case Mips::DPADD_U_H:
    7421             :     case Mips::DPADD_U_W:
    7422             :     case Mips::DPSUB_S_D:
    7423             :     case Mips::DPSUB_S_H:
    7424             :     case Mips::DPSUB_S_W:
    7425             :     case Mips::DPSUB_U_D:
    7426             :     case Mips::DPSUB_U_H:
    7427             :     case Mips::DPSUB_U_W:
    7428             :     case Mips::FMADD_D:
    7429             :     case Mips::FMADD_W:
    7430             :     case Mips::FMSUB_D:
    7431             :     case Mips::FMSUB_W:
    7432             :     case Mips::MADDR_Q_H:
    7433             :     case Mips::MADDR_Q_W:
    7434             :     case Mips::MADDV_B:
    7435             :     case Mips::MADDV_D:
    7436             :     case Mips::MADDV_H:
    7437             :     case Mips::MADDV_W:
    7438             :     case Mips::MADD_Q_H:
    7439             :     case Mips::MADD_Q_W:
    7440             :     case Mips::MSUBR_Q_H:
    7441             :     case Mips::MSUBR_Q_W:
    7442             :     case Mips::MSUBV_B:
    7443             :     case Mips::MSUBV_D:
    7444             :     case Mips::MSUBV_H:
    7445             :     case Mips::MSUBV_W:
    7446             :     case Mips::MSUB_Q_H:
    7447             :     case Mips::MSUB_Q_W:
    7448             :     case Mips::VSHF_B:
    7449             :     case Mips::VSHF_D:
    7450             :     case Mips::VSHF_H:
    7451             :     case Mips::VSHF_W: {
    7452             :       // op: wt
    7453          47 :       op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
    7454          47 :       Value |= (op & UINT64_C(31)) << 16;
    7455             :       // op: ws
    7456          47 :       op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
    7457          47 :       Value |= (op & UINT64_C(31)) << 11;
    7458             :       // op: wd
    7459          47 :       op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
    7460          47 :       Value |= (op & UINT64_C(31)) << 6;
    7461          47 :       break;
    7462             :     }
    7463             :   default:
    7464             :     std::string msg;
    7465             :     raw_string_ostream Msg(msg);
    7466           0 :     Msg << "Not supported instr: " << MI;
    7467           0 :     report_fatal_error(Msg.str());
    7468             :   }
    7469       41726 :   return Value;
    7470             : }
    7471             : 
    7472             : #ifdef ENABLE_INSTR_PREDICATE_VERIFIER
    7473             : #undef ENABLE_INSTR_PREDICATE_VERIFIER
    7474             : #include <sstream>
    7475             : 
    7476             : // Flags for subtarget features that participate in instruction matching.
    7477             : enum SubtargetFeatureFlag : uint64_t {
    7478             :   Feature_HasMips2 = (1ULL << 10),
    7479             :   Feature_HasMips3_32 = (1ULL << 16),
    7480             :   Feature_HasMips3_32r2 = (1ULL << 17),
    7481             :   Feature_HasMips3 = (1ULL << 11),
    7482             :   Feature_NotMips3 = (1ULL << 44),
    7483             :   Feature_HasMips4_32 = (1ULL << 18),
    7484             :   Feature_NotMips4_32 = (1ULL << 46),
    7485             :   Feature_HasMips4_32r2 = (1ULL << 19),
    7486             :   Feature_HasMips5_32r2 = (1ULL << 20),
    7487             :   Feature_HasMips32 = (1ULL << 12),
    7488             :   Feature_HasMips32r2 = (1ULL << 13),
    7489             :   Feature_HasMips32r5 = (1ULL << 14),
    7490             :   Feature_HasMips32r6 = (1ULL << 15),
    7491             :   Feature_NotMips32r6 = (1ULL << 45),
    7492             :   Feature_IsGP64bit = (1ULL << 31),
    7493             :   Feature_IsGP32bit = (1ULL << 30),
    7494             :   Feature_IsPTR64bit = (1ULL << 35),
    7495             :   Feature_IsPTR32bit = (1ULL << 34),
    7496             :   Feature_HasMips64 = (1ULL << 21),
    7497             :   Feature_NotMips64 = (1ULL << 47),
    7498             :   Feature_HasMips64r2 = (1ULL << 22),
    7499             :   Feature_HasMips64r5 = (1ULL << 23),
    7500             :   Feature_HasMips64r6 = (1ULL << 24),
    7501             :   Feature_NotMips64r6 = (1ULL << 48),
    7502             :   Feature_InMips16Mode = (1ULL << 28),
    7503             :   Feature_NotInMips16Mode = (1ULL << 43),
    7504             :   Feature_HasCnMips = (1ULL << 1),
    7505             :   Feature_NotCnMips = (1ULL << 40),
    7506             :   Feature_IsSym32 = (1ULL << 37),
    7507             :   Feature_IsSym64 = (1ULL << 38),
    7508             :   Feature_HasStdEnc = (1ULL << 25),
    7509             :   Feature_InMicroMips = (1ULL << 27),
    7510             :   Feature_NotInMicroMips = (1ULL << 42),
    7511             :   Feature_HasEVA = (1ULL << 5),
    7512             :   Feature_HasMSA = (1ULL << 7),
    7513             :   Feature_HasMadd4 = (1ULL << 9),
    7514             :   Feature_HasMT = (1ULL << 8),
    7515             :   Feature_UseIndirectJumpsHazard = (1ULL << 49),
    7516             :   Feature_NoIndirectJumpGuards = (1ULL << 39),
    7517             :   Feature_HasCRC = (1ULL << 0),
    7518             :   Feature_HasVirt = (1ULL << 26),
    7519             :   Feature_HasGINV = (1ULL << 6),
    7520             :   Feature_IsFP64bit = (1ULL << 29),
    7521             :   Feature_NotFP64bit = (1ULL << 41),
    7522             :   Feature_IsSingleFloat = (1ULL << 36),
    7523             :   Feature_IsNotSingleFloat = (1ULL << 32),
    7524             :   Feature_IsNotSoftFloat = (1ULL << 33),
    7525             :   Feature_HasDSP = (1ULL << 2),
    7526             :   Feature_HasDSPR2 = (1ULL << 3),
    7527             :   Feature_HasDSPR3 = (1ULL << 4),
    7528             :   Feature_None = 0
    7529             : };
    7530             : 
    7531             : #ifndef NDEBUG
    7532             : static const char *SubtargetFeatureNames[] = {
    7533             :   "Feature_HasCRC",
    7534             :   "Feature_HasCnMips",
    7535             :   "Feature_HasDSP",
    7536             :   "Feature_HasDSPR2",
    7537             :   "Feature_HasDSPR3",
    7538             :   "Feature_HasEVA",
    7539             :   "Feature_HasGINV",
    7540             :   "Feature_HasMSA",
    7541             :   "Feature_HasMT",
    7542             :   "Feature_HasMadd4",
    7543             :   "Feature_HasMips2",
    7544             :   "Feature_HasMips3",
    7545             :   "Feature_HasMips32",
    7546             :   "Feature_HasMips32r2",
    7547             :   "Feature_HasMips32r5",
    7548             :   "Feature_HasMips32r6",
    7549             :   "Feature_HasMips3_32",
    7550             :   "Feature_HasMips3_32r2",
    7551             :   "Feature_HasMips4_32",
    7552             :   "Feature_HasMips4_32r2",
    7553             :   "Feature_HasMips5_32r2",
    7554             :   "Feature_HasMips64",
    7555             :   "Feature_HasMips64r2",
    7556             :   "Feature_HasMips64r5",
    7557             :   "Feature_HasMips64r6",
    7558             :   "Feature_HasStdEnc",
    7559             :   "Feature_HasVirt",
    7560             :   "Feature_InMicroMips",
    7561             :   "Feature_InMips16Mode",
    7562             :   "Feature_IsFP64bit",
    7563             :   "Feature_IsGP32bit",
    7564             :   "Feature_IsGP64bit",
    7565             :   "Feature_IsNotSingleFloat",
    7566             :   "Feature_IsNotSoftFloat",
    7567             :   "Feature_IsPTR32bit",
    7568             :   "Feature_IsPTR64bit",
    7569             :   "Feature_IsSingleFloat",
    7570             :   "Feature_IsSym32",
    7571             :   "Feature_IsSym64",
    7572             :   "Feature_NoIndirectJumpGuards",
    7573             :   "Feature_NotCnMips",
    7574             :   "Feature_NotFP64bit",
    7575             :   "Feature_NotInMicroMips",
    7576             :   "Feature_NotInMips16Mode",
    7577             :   "Feature_NotMips3",
    7578             :   "Feature_NotMips32r6",
    7579             :   "Feature_NotMips4_32",
    7580             :   "Feature_NotMips64",
    7581             :   "Feature_NotMips64r6",
    7582             :   "Feature_UseIndirectJumpsHazard",
    7583             :   nullptr
    7584             : };
    7585             : 
    7586             : #endif // NDEBUG
    7587             : uint64_t MipsMCCodeEmitter::
    7588             : computeAvailableFeatures(const FeatureBitset& FB) const {
    7589             :   uint64_t Features = 0;
    7590             :   if ((FB[Mips::FeatureMips2]))
    7591             :     Features |= Feature_HasMips2;
    7592             :   if ((FB[Mips::FeatureMips3_32]))
    7593             :     Features |= Feature_HasMips3_32;
    7594             :   if ((FB[Mips::FeatureMips3_32r2]))
    7595             :     Features |= Feature_HasMips3_32r2;
    7596             :   if ((FB[Mips::FeatureMips3]))
    7597             :     Features |= Feature_HasMips3;
    7598             :   if ((!FB[Mips::FeatureMips3]))
    7599             :     Features |= Feature_NotMips3;
    7600             :   if ((FB[Mips::FeatureMips4_32]))
    7601             :     Features |= Feature_HasMips4_32;
    7602             :   if ((!FB[Mips::FeatureMips4_32]))
    7603             :     Features |= Feature_NotMips4_32;
    7604             :   if ((FB[Mips::FeatureMips4_32r2]))
    7605             :     Features |= Feature_HasMips4_32r2;
    7606             :   if ((FB[Mips::FeatureMips5_32r2]))
    7607             :     Features |= Feature_HasMips5_32r2;
    7608             :   if ((FB[Mips::FeatureMips32]))
    7609             :     Features |= Feature_HasMips32;
    7610             :   if ((FB[Mips::FeatureMips32r2]))
    7611             :     Features |= Feature_HasMips32r2;
    7612             :   if ((FB[Mips::FeatureMips32r5]))
    7613             :     Features |= Feature_HasMips32r5;
    7614             :   if ((FB[Mips::FeatureMips32r6]))
    7615             :     Features |= Feature_HasMips32r6;
    7616             :   if ((!FB[Mips::FeatureMips32r6]))
    7617             :     Features |= Feature_NotMips32r6;
    7618             :   if ((FB[Mips::FeatureGP64Bit]))
    7619             :     Features |= Feature_IsGP64bit;
    7620             :   if ((!FB[Mips::FeatureGP64Bit]))
    7621             :     Features |= Feature_IsGP32bit;
    7622             :   if ((FB[Mips::FeaturePTR64Bit]))
    7623             :     Features |= Feature_IsPTR64bit;
    7624             :   if ((!FB[Mips::FeaturePTR64Bit]))
    7625             :     Features |= Feature_IsPTR32bit;
    7626             :   if ((FB[Mips::FeatureMips64]))
    7627             :     Features |= Feature_HasMips64;
    7628             :   if ((!FB[Mips::FeatureMips64]))
    7629             :     Features |= Feature_NotMips64;
    7630             :   if ((FB[Mips::FeatureMips64r2]))
    7631             :     Features |= Feature_HasMips64r2;
    7632             :   if ((FB[Mips::FeatureMips64r5]))
    7633             :     Features |= Feature_HasMips64r5;
    7634             :   if ((FB[Mips::FeatureMips64r6]))
    7635             :     Features |= Feature_HasMips64r6;
    7636             :   if ((!FB[Mips::FeatureMips64r6]))
    7637             :     Features |= Feature_NotMips64r6;
    7638             :   if ((FB[Mips::FeatureMips16]))
    7639             :     Features |= Feature_InMips16Mode;
    7640             :   if ((!FB[Mips::FeatureMips16]))
    7641             :     Features |= Feature_NotInMips16Mode;
    7642             :   if ((FB[Mips::FeatureCnMips]))
    7643             :     Features |= Feature_HasCnMips;
    7644             :   if ((!FB[Mips::FeatureCnMips]))
    7645             :     Features |= Feature_NotCnMips;
    7646             :   if ((FB[Mips::FeatureSym32]))
    7647             :     Features |= Feature_IsSym32;
    7648             :   if ((!FB[Mips::FeatureSym32]))
    7649             :     Features |= Feature_IsSym64;
    7650             :   if ((!FB[Mips::FeatureMips16]))
    7651             :     Features |= Feature_HasStdEnc;
    7652             :   if ((FB[Mips::FeatureMicroMips]))
    7653             :     Features |= Feature_InMicroMips;
    7654             :   if ((!FB[Mips::FeatureMicroMips]))
    7655             :     Features |= Feature_NotInMicroMips;
    7656             :   if ((FB[Mips::FeatureEVA]))
    7657             :     Features |= Feature_HasEVA;
    7658             :   if ((FB[Mips::FeatureMSA]))
    7659             :     Features |= Feature_HasMSA;
    7660             :   if ((!FB[Mips::FeatureMadd4]))
    7661             :     Features |= Feature_HasMadd4;
    7662             :   if ((FB[Mips::FeatureMT]))
    7663             :     Features |= Feature_HasMT;
    7664             :   if ((FB[Mips::FeatureUseIndirectJumpsHazard]))
    7665             :     Features |= Feature_UseIndirectJumpsHazard;
    7666             :   if ((!FB[Mips::FeatureUseIndirectJumpsHazard]))
    7667             :     Features |= Feature_NoIndirectJumpGuards;
    7668             :   if ((FB[Mips::FeatureCRC]))
    7669             :     Features |= Feature_HasCRC;
    7670             :   if ((FB[Mips::FeatureVirt]))
    7671             :     Features |= Feature_HasVirt;
    7672             :   if ((FB[Mips::FeatureGINV]))
    7673             :     Features |= Feature_HasGINV;
    7674             :   if ((FB[Mips::FeatureFP64Bit]))
    7675             :     Features |= Feature_IsFP64bit;
    7676             :   if ((!FB[Mips::FeatureFP64Bit]))
    7677             :     Features |= Feature_NotFP64bit;
    7678             :   if ((FB[Mips::FeatureSingleFloat]))
    7679             :     Features |= Feature_IsSingleFloat;
    7680             :   if ((!FB[Mips::FeatureSingleFloat]))
    7681             :     Features |= Feature_IsNotSingleFloat;
    7682             :   if ((!FB[Mips::FeatureSoftFloat]))
    7683             :     Features |= Feature_IsNotSoftFloat;
    7684             :   if ((FB[Mips::FeatureDSP]))
    7685             :     Features |= Feature_HasDSP;
    7686             :   if ((FB[Mips::FeatureDSPR2]))
    7687             :     Features |= Feature_HasDSPR2;
    7688             :   if ((FB[Mips::FeatureDSPR3]))
    7689             :     Features |= Feature_HasDSPR3;
    7690             :   return Features;
    7691             : }
    7692             : 
    7693             : void MipsMCCodeEmitter::verifyInstructionPredicates(
    7694             :     const MCInst &Inst, uint64_t AvailableFeatures) const {
    7695             : #ifndef NDEBUG
    7696             :   static uint64_t RequiredFeatures[] = {
    7697             :     0, // PHI = 0
    7698             :     0, // INLINEASM = 1
    7699             :     0, // CFI_INSTRUCTION = 2
    7700             :     0, // EH_LABEL = 3
    7701             :     0, // GC_LABEL = 4
    7702             :     0, // ANNOTATION_LABEL = 5
    7703             :     0, // KILL = 6
    7704             :     0, // EXTRACT_SUBREG = 7
    7705             :     0, // INSERT_SUBREG = 8
    7706             :     0, // IMPLICIT_DEF = 9
    7707             :     0, // SUBREG_TO_REG = 10
    7708             :     0, // COPY_TO_REGCLASS = 11
    7709             :     0, // DBG_VALUE = 12
    7710             :     0, // DBG_LABEL = 13
    7711             :     0, // REG_SEQUENCE = 14
    7712             :     0, // COPY = 15
    7713             :     0, // BUNDLE = 16
    7714             :     0, // LIFETIME_START = 17
    7715             :     0, // LIFETIME_END = 18
    7716             :     0, // STACKMAP = 19
    7717             :     0, // FENTRY_CALL = 20
    7718             :     0, // PATCHPOINT = 21
    7719             :     0, // LOAD_STACK_GUARD = 22
    7720             :     0, // STATEPOINT = 23
    7721             :     0, // LOCAL_ESCAPE = 24
    7722             :     0, // FAULTING_OP = 25
    7723             :     0, // PATCHABLE_OP = 26
    7724             :     0, // PATCHABLE_FUNCTION_ENTER = 27
    7725             :     0, // PATCHABLE_RET = 28
    7726             :     0, // PATCHABLE_FUNCTION_EXIT = 29
    7727             :     0, // PATCHABLE_TAIL_CALL = 30
    7728             :     0, // PATCHABLE_EVENT_CALL = 31
    7729             :     0, // PATCHABLE_TYPED_EVENT_CALL = 32
    7730             :     0, // ICALL_BRANCH_FUNNEL = 33
    7731             :     0, // G_ADD = 34
    7732             :     0, // G_SUB = 35
    7733             :     0, // G_MUL = 36
    7734             :     0, // G_SDIV = 37
    7735             :     0, // G_UDIV = 38
    7736             :     0, // G_SREM = 39
    7737             :     0, // G_UREM = 40
    7738             :     0, // G_AND = 41
    7739             :     0, // G_OR = 42
    7740             :     0, // G_XOR = 43
    7741             :     0, // G_IMPLICIT_DEF = 44
    7742             :     0, // G_PHI = 45
    7743             :     0, // G_FRAME_INDEX = 46
    7744             :     0, // G_GLOBAL_VALUE = 47
    7745             :     0, // G_EXTRACT = 48
    7746             :     0, // G_UNMERGE_VALUES = 49
    7747             :     0, // G_INSERT = 50
    7748             :     0, // G_MERGE_VALUES = 51
    7749             :     0, // G_PTRTOINT = 52
    7750             :     0, // G_INTTOPTR = 53
    7751             :     0, // G_BITCAST = 54
    7752             :     0, // G_LOAD = 55
    7753             :     0, // G_SEXTLOAD = 56
    7754             :     0, // G_ZEXTLOAD = 57
    7755             :     0, // G_STORE = 58
    7756             :     0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 59
    7757             :     0, // G_ATOMIC_CMPXCHG = 60
    7758             :     0, // G_ATOMICRMW_XCHG = 61
    7759             :     0, // G_ATOMICRMW_ADD = 62
    7760             :     0, // G_ATOMICRMW_SUB = 63
    7761             :     0, // G_ATOMICRMW_AND = 64
    7762             :     0, // G_ATOMICRMW_NAND = 65
    7763             :     0, // G_ATOMICRMW_OR = 66
    7764             :     0, // G_ATOMICRMW_XOR = 67
    7765             :     0, // G_ATOMICRMW_MAX = 68
    7766             :     0, // G_ATOMICRMW_MIN = 69
    7767             :     0, // G_ATOMICRMW_UMAX = 70
    7768             :     0, // G_ATOMICRMW_UMIN = 71
    7769             :     0, // G_BRCOND = 72
    7770             :     0, // G_BRINDIRECT = 73
    7771             :     0, // G_INTRINSIC = 74
    7772             :     0, // G_INTRINSIC_W_SIDE_EFFECTS = 75
    7773             :     0, // G_ANYEXT = 76
    7774             :     0, // G_TRUNC = 77
    7775             :     0, // G_CONSTANT = 78
    7776             :     0, // G_FCONSTANT = 79
    7777             :     0, // G_VASTART = 80
    7778             :     0, // G_VAARG = 81
    7779             :     0, // G_SEXT = 82
    7780             :     0, // G_ZEXT = 83
    7781             :     0, // G_SHL = 84
    7782             :     0, // G_LSHR = 85
    7783             :     0, // G_ASHR = 86
    7784             :     0, // G_ICMP = 87
    7785             :     0, // G_FCMP = 88
    7786             :     0, // G_SELECT = 89
    7787             :     0, // G_UADDE = 90
    7788             :     0, // G_USUBE = 91
    7789             :     0, // G_SADDO = 92
    7790             :     0, // G_SSUBO = 93
    7791             :     0, // G_UMULO = 94
    7792             :     0, // G_SMULO = 95
    7793             :     0, // G_UMULH = 96
    7794             :     0, // G_SMULH = 97
    7795             :     0, // G_FADD = 98
    7796             :     0, // G_FSUB = 99
    7797             :     0, // G_FMUL = 100
    7798             :     0, // G_FMA = 101
    7799             :     0, // G_FDIV = 102
    7800             :     0, // G_FREM = 103
    7801             :     0, // G_FPOW = 104
    7802             :     0, // G_FEXP = 105
    7803             :     0, // G_FEXP2 = 106
    7804             :     0, // G_FLOG = 107
    7805             :     0, // G_FLOG2 = 108
    7806             :     0, // G_FNEG = 109
    7807             :     0, // G_FPEXT = 110
    7808             :     0, // G_FPTRUNC = 111
    7809             :     0, // G_FPTOSI = 112
    7810             :     0, // G_FPTOUI = 113
    7811             :     0, // G_SITOFP = 114
    7812             :     0, // G_UITOFP = 115
    7813             :     0, // G_FABS = 116
    7814             :     0, // G_GEP = 117
    7815             :     0, // G_PTR_MASK = 118
    7816             :     0, // G_BR = 119
    7817             :     0, // G_INSERT_VECTOR_ELT = 120
    7818             :     0, // G_EXTRACT_VECTOR_ELT = 121
    7819             :     0, // G_SHUFFLE_VECTOR = 122
    7820             :     0, // G_BSWAP = 123
    7821             :     0, // ABSMacro = 124
    7822             :     Feature_HasDSP | 0, // ABSQ_S_PH = 125
    7823             :     Feature_HasDSP | Feature_InMicroMips | 0, // ABSQ_S_PH_MM = 126
    7824             :     Feature_HasDSPR2 | 0, // ABSQ_S_QB = 127
    7825             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ABSQ_S_QB_MMR2 = 128
    7826             :     Feature_HasDSP | 0, // ABSQ_S_W = 129
    7827             :     Feature_HasDSP | Feature_InMicroMips | 0, // ABSQ_S_W_MM = 130
    7828             :     Feature_HasStdEnc | 0, // ADD = 131
    7829             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ADDIUPC = 132
    7830             :     Feature_InMicroMips | 0, // ADDIUPC_MM = 133
    7831             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDIUPC_MMR6 = 134
    7832             :     Feature_InMicroMips | 0, // ADDIUR1SP_MM = 135
    7833             :     Feature_InMicroMips | 0, // ADDIUR2_MM = 136
    7834             :     Feature_InMicroMips | 0, // ADDIUS5_MM = 137
    7835             :     Feature_InMicroMips | 0, // ADDIUSP_MM = 138
    7836             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDIU_MMR6 = 139
    7837             :     Feature_HasDSPR2 | 0, // ADDQH_PH = 140
    7838             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ADDQH_PH_MMR2 = 141
    7839             :     Feature_HasDSPR2 | 0, // ADDQH_R_PH = 142
    7840             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ADDQH_R_PH_MMR2 = 143
    7841             :     Feature_HasDSPR2 | 0, // ADDQH_R_W = 144
    7842             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ADDQH_R_W_MMR2 = 145
    7843             :     Feature_HasDSPR2 | 0, // ADDQH_W = 146
    7844             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ADDQH_W_MMR2 = 147
    7845             :     Feature_HasDSP | 0, // ADDQ_PH = 148
    7846             :     Feature_HasDSP | Feature_InMicroMips | 0, // ADDQ_PH_MM = 149
    7847             :     Feature_HasDSP | 0, // ADDQ_S_PH = 150
    7848             :     Feature_HasDSP | Feature_InMicroMips | 0, // ADDQ_S_PH_MM = 151
    7849             :     Feature_HasDSP | 0, // ADDQ_S_W = 152
    7850             :     Feature_HasDSP | Feature_InMicroMips | 0, // ADDQ_S_W_MM = 153
    7851             :     Feature_HasDSP | 0, // ADDSC = 154
    7852             :     Feature_HasDSP | Feature_InMicroMips | 0, // ADDSC_MM = 155
    7853             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_B = 156
    7854             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_D = 157
    7855             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_H = 158
    7856             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_W = 159
    7857             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_B = 160
    7858             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_D = 161
    7859             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_H = 162
    7860             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_W = 163
    7861             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_B = 164
    7862             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_D = 165
    7863             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_H = 166
    7864             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_W = 167
    7865             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDU16_MM = 168
    7866             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDU16_MMR6 = 169
    7867             :     Feature_HasDSPR2 | 0, // ADDUH_QB = 170
    7868             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ADDUH_QB_MMR2 = 171
    7869             :     Feature_HasDSPR2 | 0, // ADDUH_R_QB = 172
    7870             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ADDUH_R_QB_MMR2 = 173
    7871             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDU_MMR6 = 174
    7872             :     Feature_HasDSPR2 | 0, // ADDU_PH = 175
    7873             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ADDU_PH_MMR2 = 176
    7874             :     Feature_HasDSP | 0, // ADDU_QB = 177
    7875             :     Feature_HasDSP | Feature_InMicroMips | 0, // ADDU_QB_MM = 178
    7876             :     Feature_HasDSPR2 | 0, // ADDU_S_PH = 179
    7877             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // ADDU_S_PH_MMR2 = 180
    7878             :     Feature_HasDSP | 0, // ADDU_S_QB = 181
    7879             :     Feature_HasDSP | Feature_InMicroMips | 0, // ADDU_S_QB_MM = 182
    7880             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_B = 183
    7881             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_D = 184
    7882             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_H = 185
    7883             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_W = 186
    7884             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_B = 187
    7885             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_D = 188
    7886             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_H = 189
    7887             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_W = 190
    7888             :     Feature_HasDSP | 0, // ADDWC = 191
    7889             :     Feature_HasDSP | Feature_InMicroMips | 0, // ADDWC_MM = 192
    7890             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_B = 193
    7891             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_D = 194
    7892             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_H = 195
    7893             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_W = 196
    7894             :     Feature_InMicroMips | 0, // ADD_MM = 197
    7895             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADD_MMR6 = 198
    7896             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // ADDi = 199
    7897             :     Feature_InMicroMips | 0, // ADDi_MM = 200
    7898             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADDiu = 201
    7899             :     Feature_InMicroMips | 0, // ADDiu_MM = 202
    7900             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADDu = 203
    7901             :     Feature_InMicroMips | 0, // ADDu_MM = 204
    7902             :     0, // ADJCALLSTACKDOWN = 205
    7903             :     0, // ADJCALLSTACKUP = 206
    7904             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ALIGN = 207
    7905             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ALIGN_MMR6 = 208
    7906             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ALUIPC = 209
    7907             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ALUIPC_MMR6 = 210
    7908             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // AND = 211
    7909             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // AND16_MM = 212
    7910             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // AND16_MMR6 = 213
    7911             :     Feature_HasStdEnc | 0, // AND64 = 214
    7912             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // ANDI16_MM = 215
    7913             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ANDI16_MMR6 = 216
    7914             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ANDI_B = 217
    7915             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ANDI_MMR6 = 218
    7916             :     Feature_InMicroMips | 0, // AND_MM = 219
    7917             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // AND_MMR6 = 220
    7918             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V = 221
    7919             :     Feature_HasMSA | 0, // AND_V_D_PSEUDO = 222
    7920             :     Feature_HasMSA | 0, // AND_V_H_PSEUDO = 223
    7921             :     Feature_HasMSA | 0, // AND_V_W_PSEUDO = 224
    7922             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ANDi = 225
    7923             :     Feature_HasStdEnc | 0, // ANDi64 = 226
    7924             :     Feature_InMicroMips | 0, // ANDi_MM = 227
    7925             :     Feature_HasDSPR2 | 0, // APPEND = 228
    7926             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // APPEND_MMR2 = 229
    7927             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_B = 230
    7928             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_D = 231
    7929             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_H = 232
    7930             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_W = 233
    7931             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_B = 234
    7932             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_D = 235
    7933             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_H = 236
    7934             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_W = 237
    7935             :     Feature_HasStdEnc | 0, // ATOMIC_CMP_SWAP_I16 = 238
    7936             :     Feature_HasStdEnc | 0, // ATOMIC_CMP_SWAP_I32 = 239
    7937             :     Feature_HasStdEnc | 0, // ATOMIC_CMP_SWAP_I64 = 240
    7938             :     Feature_HasStdEnc | 0, // ATOMIC_CMP_SWAP_I8 = 241
    7939             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_ADD_I16 = 242
    7940             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_ADD_I32 = 243
    7941             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_ADD_I64 = 244
    7942             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_ADD_I8 = 245
    7943             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_AND_I16 = 246
    7944             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_AND_I32 = 247
    7945             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_AND_I64 = 248
    7946             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_AND_I8 = 249
    7947             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_NAND_I16 = 250
    7948             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_NAND_I32 = 251
    7949             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_NAND_I64 = 252
    7950             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_NAND_I8 = 253
    7951             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_OR_I16 = 254
    7952             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_OR_I32 = 255
    7953             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_OR_I64 = 256
    7954             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_OR_I8 = 257
    7955             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_SUB_I16 = 258
    7956             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_SUB_I32 = 259
    7957             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_SUB_I64 = 260
    7958             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_SUB_I8 = 261
    7959             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_XOR_I16 = 262
    7960             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_XOR_I32 = 263
    7961             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_XOR_I64 = 264
    7962             :     Feature_HasStdEnc | 0, // ATOMIC_LOAD_XOR_I8 = 265
    7963             :     Feature_HasStdEnc | 0, // ATOMIC_SWAP_I16 = 266
    7964             :     Feature_HasStdEnc | 0, // ATOMIC_SWAP_I32 = 267
    7965             :     Feature_HasStdEnc | 0, // ATOMIC_SWAP_I64 = 268
    7966             :     Feature_HasStdEnc | 0, // ATOMIC_SWAP_I8 = 269
    7967             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // AUI = 270
    7968             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // AUIPC = 271
    7969             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // AUIPC_MMR6 = 272
    7970             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // AUI_MMR6 = 273
    7971             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_B = 274
    7972             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_D = 275
    7973             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_H = 276
    7974             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_W = 277
    7975             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_B = 278
    7976             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_D = 279
    7977             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_H = 280
    7978             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_W = 281
    7979             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_B = 282
    7980             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_D = 283
    7981             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_H = 284
    7982             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_W = 285
    7983             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_B = 286
    7984             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_D = 287
    7985             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_H = 288
    7986             :     Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_W = 289
    7987             :     Feature_InMips16Mode | 0, // AddiuRxImmX16 = 290
    7988             :     Feature_InMips16Mode | 0, // AddiuRxPcImmX16 = 291
    7989             :     Feature_InMips16Mode | 0, // AddiuRxRxImm16 = 292
    7990             :     Feature_InMips16Mode | 0, // AddiuRxRxImmX16 = 293
    7991             :     Feature_InMips16Mode | 0, // AddiuRxRyOffMemX16 = 294
    7992             :     Feature_InMips16Mode | 0, // AddiuSpImm16 = 295
    7993             :     Feature_InMips16Mode | 0, // AddiuSpImmX16 = 296
    7994             :     Feature_InMips16Mode | 0, // AdduRxRyRz16 = 297
    7995             :     Feature_InMips16Mode | 0, // AndRxRxRy16 = 298
    7996             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // B = 299
    7997             :     Feature_InMicroMips | 0, // B16_MM = 300
    7998             :     Feature_HasCnMips | 0, // BADDu = 301
    7999             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BAL = 302
    8000             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BALC = 303
    8001             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BALC_MMR6 = 304
    8002             :     Feature_HasDSPR2 | 0, // BALIGN = 305
    8003             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // BALIGN_MMR2 = 306
    8004             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BAL_BR = 307
    8005             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BAL_BR_MM = 308
    8006             :     Feature_HasCnMips | 0, // BBIT0 = 309
    8007             :     Feature_HasCnMips | 0, // BBIT032 = 310
    8008             :     Feature_HasCnMips | 0, // BBIT1 = 311
    8009             :     Feature_HasCnMips | 0, // BBIT132 = 312
    8010             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC = 313
    8011             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC16_MMR6 = 314
    8012             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1EQZ = 315
    8013             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // BC1EQZC_MMR6 = 316
    8014             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1F = 317
    8015             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1FL = 318
    8016             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // BC1F_MM = 319
    8017             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1NEZ = 320
    8018             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // BC1NEZC_MMR6 = 321
    8019             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1T = 322
    8020             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1TL = 323
    8021             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // BC1T_MM = 324
    8022             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC2EQZ = 325
    8023             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC2EQZC_MMR6 = 326
    8024             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC2NEZ = 327
    8025             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC2NEZC_MMR6 = 328
    8026             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_B = 329
    8027             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_D = 330
    8028             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_H = 331
    8029             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_W = 332
    8030             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_B = 333
    8031             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_D = 334
    8032             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_H = 335
    8033             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_W = 336
    8034             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC_MMR6 = 337
    8035             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BEQ = 338
    8036             :     Feature_HasStdEnc | 0, // BEQ64 = 339
    8037             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQC = 340
    8038             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BEQC64 = 341
    8039             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQC_MMR6 = 342
    8040             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BEQL = 343
    8041             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BEQLImmMacro = 344
    8042             :     Feature_InMicroMips | 0, // BEQZ16_MM = 345
    8043             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQZALC = 346
    8044             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZALC_MMR6 = 347
    8045             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQZC = 348
    8046             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZC16_MMR6 = 349
    8047             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BEQZC64 = 350
    8048             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BEQZC_MM = 351
    8049             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZC_MMR6 = 352
    8050             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQ_MM = 353
    8051             :     0, // BGE = 354
    8052             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEC = 355
    8053             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEC64 = 356
    8054             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEC_MMR6 = 357
    8055             :     0, // BGEImmMacro = 358
    8056             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEL = 359
    8057             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGELImmMacro = 360
    8058             :     0, // BGEU = 361
    8059             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEUC = 362
    8060             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEUC64 = 363
    8061             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEUC_MMR6 = 364
    8062             :     0, // BGEUImmMacro = 365
    8063             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEUL = 366
    8064             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEULImmMacro = 367
    8065             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGEZ = 368
    8066             :     Feature_HasStdEnc | 0, // BGEZ64 = 369
    8067             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZAL = 370
    8068             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEZALC = 371
    8069             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEZALC_MMR6 = 372
    8070             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZALL = 373
    8071             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZALS_MM = 374
    8072             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZAL_MM = 375
    8073             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEZC = 376
    8074             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEZC64 = 377
    8075             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEZC_MMR6 = 378
    8076             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZL = 379
    8077             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZ_MM = 380
    8078             :     0, // BGT = 381
    8079             :     0, // BGTImmMacro = 382
    8080             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTL = 383
    8081             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTLImmMacro = 384
    8082             :     0, // BGTU = 385
    8083             :     0, // BGTUImmMacro = 386
    8084             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTUL = 387
    8085             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTULImmMacro = 388
    8086             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGTZ = 389
    8087             :     Feature_HasStdEnc | 0, // BGTZ64 = 390
    8088             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGTZALC = 391
    8089             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGTZALC_MMR6 = 392
    8090             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGTZC = 393
    8091             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGTZC64 = 394
    8092             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGTZC_MMR6 = 395
    8093             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGTZL = 396
    8094             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGTZ_MM = 397
    8095             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_B = 398
    8096             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_D = 399
    8097             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_H = 400
    8098             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_W = 401
    8099             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_B = 402
    8100             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_D = 403
    8101             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_H = 404
    8102             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_W = 405
    8103             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_B = 406
    8104             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_D = 407
    8105             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_H = 408
    8106             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_W = 409
    8107             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_B = 410
    8108             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_D = 411
    8109             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_H = 412
    8110             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_W = 413
    8111             :     Feature_HasDSP | 0, // BITREV = 414
    8112             :     Feature_HasDSP | Feature_InMicroMips | 0, // BITREV_MM = 415
    8113             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BITSWAP = 416
    8114             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BITSWAP_MMR6 = 417
    8115             :     0, // BLE = 418
    8116             :     0, // BLEImmMacro = 419
    8117             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEL = 420
    8118             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLELImmMacro = 421
    8119             :     0, // BLEU = 422
    8120             :     0, // BLEUImmMacro = 423
    8121             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEUL = 424
    8122             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEULImmMacro = 425
    8123             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLEZ = 426
    8124             :     Feature_HasStdEnc | 0, // BLEZ64 = 427
    8125             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLEZALC = 428
    8126             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLEZALC_MMR6 = 429
    8127             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLEZC = 430
    8128             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLEZC64 = 431
    8129             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLEZC_MMR6 = 432
    8130             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLEZL = 433
    8131             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLEZ_MM = 434
    8132             :     0, // BLT = 435
    8133             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTC = 436
    8134             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTC64 = 437
    8135             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTC_MMR6 = 438
    8136             :     0, // BLTImmMacro = 439
    8137             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTL = 440
    8138             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTLImmMacro = 441
    8139             :     0, // BLTU = 442
    8140             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTUC = 443
    8141             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTUC64 = 444
    8142             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTUC_MMR6 = 445
    8143             :     0, // BLTUImmMacro = 446
    8144             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTUL = 447
    8145             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTULImmMacro = 448
    8146             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLTZ = 449
    8147             :     Feature_HasStdEnc | 0, // BLTZ64 = 450
    8148             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZAL = 451
    8149             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTZALC = 452
    8150             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTZALC_MMR6 = 453
    8151             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZALL = 454
    8152             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZALS_MM = 455
    8153             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZAL_MM = 456
    8154             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTZC = 457
    8155             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTZC64 = 458
    8156             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTZC_MMR6 = 459
    8157             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZL = 460
    8158             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZ_MM = 461
    8159             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BMNZI_B = 462
    8160             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BMNZ_V = 463
    8161             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BMZI_B = 464
    8162             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BMZ_V = 465
    8163             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BNE = 466
    8164             :     Feature_HasStdEnc | 0, // BNE64 = 467
    8165             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEC = 468
    8166             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BNEC64 = 469
    8167             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEC_MMR6 = 470
    8168             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_B = 471
    8169             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_D = 472
    8170             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_H = 473
    8171             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_W = 474
    8172             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_B = 475
    8173             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_D = 476
    8174             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_H = 477
    8175             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_W = 478
    8176             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BNEL = 479
    8177             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BNELImmMacro = 480
    8178             :     Feature_InMicroMips | 0, // BNEZ16_MM = 481
    8179             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEZALC = 482
    8180             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZALC_MMR6 = 483
    8181             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEZC = 484
    8182             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZC16_MMR6 = 485
    8183             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BNEZC64 = 486
    8184             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BNEZC_MM = 487
    8185             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZC_MMR6 = 488
    8186             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNE_MM = 489
    8187             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNVC = 490
    8188             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNVC_MMR6 = 491
    8189             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_B = 492
    8190             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_D = 493
    8191             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_H = 494
    8192             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_V = 495
    8193             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_W = 496
    8194             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BOVC = 497
    8195             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BOVC_MMR6 = 498
    8196             :     Feature_HasDSP | Feature_NotInMicroMips | 0, // BPOSGE32 = 499
    8197             :     Feature_HasDSPR3 | Feature_InMicroMips | 0, // BPOSGE32C_MMR3 = 500
    8198             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasDSP | Feature_InMicroMips | 0, // BPOSGE32_MM = 501
    8199             :     0, // BPOSGE32_PSEUDO = 502
    8200             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BREAK = 503
    8201             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // BREAK16_MM = 504
    8202             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BREAK16_MMR6 = 505
    8203             :     Feature_InMicroMips | 0, // BREAK_MM = 506
    8204             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // BREAK_MMR6 = 507
    8205             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSELI_B = 508
    8206             :     Feature_HasMSA | 0, // BSEL_D_PSEUDO = 509
    8207             :     Feature_HasMSA | 0, // BSEL_FD_PSEUDO = 510
    8208             :     Feature_HasMSA | 0, // BSEL_FW_PSEUDO = 511
    8209             :     Feature_HasMSA | 0, // BSEL_H_PSEUDO = 512
    8210             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_V = 513
    8211             :     Feature_HasMSA | 0, // BSEL_W_PSEUDO = 514
    8212             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_B = 515
    8213             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_D = 516
    8214             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_H = 517
    8215             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_W = 518
    8216             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_B = 519
    8217             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_D = 520
    8218             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_H = 521
    8219             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_W = 522
    8220             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_B = 523
    8221             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_D = 524
    8222             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_H = 525
    8223             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_V = 526
    8224             :     Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_W = 527
    8225             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // B_MM = 528
    8226             :     0, // B_MMR6_Pseudo = 529
    8227             :     Feature_InMicroMips | 0, // B_MM_Pseudo = 530
    8228             :     0, // BeqImm = 531
    8229             :     Feature_InMips16Mode | 0, // BeqzRxImm16 = 532
    8230             :     Feature_InMips16Mode | 0, // BeqzRxImmX16 = 533
    8231             :     Feature_InMips16Mode | 0, // Bimm16 = 534
    8232             :     Feature_InMips16Mode | 0, // BimmX16 = 535
    8233             :     0, // BneImm = 536
    8234             :     Feature_InMips16Mode | 0, // BnezRxImm16 = 537
    8235             :     Feature_InMips16Mode | 0, // BnezRxImmX16 = 538
    8236             :     Feature_InMips16Mode | 0, // Break16 = 539
    8237             :     Feature_InMips16Mode | 0, // Bteqz16 = 540
    8238             :     Feature_InMips16Mode | 0, // BteqzT8CmpX16 = 541
    8239             :     Feature_InMips16Mode | 0, // BteqzT8CmpiX16 = 542
    8240             :     Feature_InMips16Mode | 0, // BteqzT8SltX16 = 543
    8241             :     Feature_InMips16Mode | 0, // BteqzT8SltiX16 = 544
    8242             :     Feature_InMips16Mode | 0, // BteqzT8SltiuX16 = 545
    8243             :     Feature_InMips16Mode | 0, // BteqzT8SltuX16 = 546
    8244             :     Feature_InMips16Mode | 0, // BteqzX16 = 547
    8245             :     Feature_InMips16Mode | 0, // Btnez16 = 548
    8246             :     Feature_InMips16Mode | 0, // BtnezT8CmpX16 = 549
    8247             :     Feature_InMips16Mode | 0, // BtnezT8CmpiX16 = 550
    8248             :     Feature_InMips16Mode | 0, // BtnezT8SltX16 = 551
    8249             :     Feature_InMips16Mode | 0, // BtnezT8SltiX16 = 552
    8250             :     Feature_InMips16Mode | 0, // BtnezT8SltiuX16 = 553
    8251             :     Feature_InMips16Mode | 0, // BtnezT8SltuX16 = 554
    8252             :     Feature_InMips16Mode | 0, // BtnezX16 = 555
    8253             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // BuildPairF64 = 556
    8254             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // BuildPairF64_64 = 557
    8255             :     Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // CACHE = 558
    8256             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // CACHEE = 559
    8257             :     Feature_InMicroMips | Feature_HasEVA | 0, // CACHEE_MM = 560
    8258             :     Feature_InMicroMips | 0, // CACHE_MM = 561
    8259             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // CACHE_MMR6 = 562
    8260             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CACHE_R6 = 563
    8261             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_D64 = 564
    8262             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_L_D_MMR6 = 565
    8263             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_S = 566
    8264             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_L_S_MMR6 = 567
    8265             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_D32 = 568
    8266             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_D64 = 569
    8267             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_W_D_MMR6 = 570
    8268             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CEIL_W_MM = 571
    8269             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_S = 572
    8270             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CEIL_W_S_MM = 573
    8271             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_W_S_MMR6 = 574
    8272             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_B = 575
    8273             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_D = 576
    8274             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_H = 577
    8275             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_W = 578
    8276             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_B = 579
    8277             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_D = 580
    8278             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_H = 581
    8279             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_W = 582
    8280             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CFC1 = 583
    8281             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CFC1_MM = 584
    8282             :     Feature_HasStdEnc | Feature_InMicroMips | 0, // CFC2_MM = 585
    8283             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CFCMSA = 586
    8284             :     Feature_HasMT | 0, // CFTC1 = 587
    8285             :     Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS = 588
    8286             :     Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS32 = 589
    8287             :     Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS64_32 = 590
    8288             :     Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS_i32 = 591
    8289             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CLASS_D = 592
    8290             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLASS_D_MMR6 = 593
    8291             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CLASS_S = 594
    8292             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLASS_S_MMR6 = 595
    8293             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_B = 596
    8294             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_D = 597
    8295             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_H = 598
    8296             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_W = 599
    8297             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_B = 600
    8298             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_D = 601
    8299             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_H = 602
    8300             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_W = 603
    8301             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_B = 604
    8302             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_D = 605
    8303             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_H = 606
    8304             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_W = 607
    8305             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_B = 608
    8306             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_D = 609
    8307             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_H = 610
    8308             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_W = 611
    8309             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CLO = 612
    8310             :     Feature_InMicroMips | 0, // CLO_MM = 613
    8311             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLO_MMR6 = 614
    8312             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CLO_R6 = 615
    8313             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_B = 616
    8314             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_D = 617
    8315             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_H = 618
    8316             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_W = 619
    8317             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_B = 620
    8318             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_D = 621
    8319             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_H = 622
    8320             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_W = 623
    8321             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_B = 624
    8322             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_D = 625
    8323             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_H = 626
    8324             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_W = 627
    8325             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_B = 628
    8326             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_D = 629
    8327             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_H = 630
    8328             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_W = 631
    8329             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CLZ = 632
    8330             :     Feature_InMicroMips | 0, // CLZ_MM = 633
    8331             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLZ_MMR6 = 634
    8332             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CLZ_R6 = 635
    8333             :     Feature_HasDSPR2 | 0, // CMPGDU_EQ_QB = 636
    8334             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // CMPGDU_EQ_QB_MMR2 = 637
    8335             :     Feature_HasDSPR2 | 0, // CMPGDU_LE_QB = 638
    8336             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // CMPGDU_LE_QB_MMR2 = 639
    8337             :     Feature_HasDSPR2 | 0, // CMPGDU_LT_QB = 640
    8338             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // CMPGDU_LT_QB_MMR2 = 641
    8339             :     Feature_HasDSP | 0, // CMPGU_EQ_QB = 642
    8340             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMPGU_EQ_QB_MM = 643
    8341             :     Feature_HasDSP | 0, // CMPGU_LE_QB = 644
    8342             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMPGU_LE_QB_MM = 645
    8343             :     Feature_HasDSP | 0, // CMPGU_LT_QB = 646
    8344             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMPGU_LT_QB_MM = 647
    8345             :     Feature_HasDSP | 0, // CMPU_EQ_QB = 648
    8346             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMPU_EQ_QB_MM = 649
    8347             :     Feature_HasDSP | 0, // CMPU_LE_QB = 650
    8348             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMPU_LE_QB_MM = 651
    8349             :     Feature_HasDSP | 0, // CMPU_LT_QB = 652
    8350             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMPU_LT_QB_MM = 653
    8351             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_AF_D_MMR6 = 654
    8352             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_AF_S_MMR6 = 655
    8353             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_EQ_D = 656
    8354             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_EQ_D_MMR6 = 657
    8355             :     Feature_HasDSP | 0, // CMP_EQ_PH = 658
    8356             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMP_EQ_PH_MM = 659
    8357             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_EQ_S = 660
    8358             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_EQ_S_MMR6 = 661
    8359             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_F_D = 662
    8360             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_F_S = 663
    8361             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LE_D = 664
    8362             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LE_D_MMR6 = 665
    8363             :     Feature_HasDSP | 0, // CMP_LE_PH = 666
    8364             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMP_LE_PH_MM = 667
    8365             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LE_S = 668
    8366             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LE_S_MMR6 = 669
    8367             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LT_D = 670
    8368             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LT_D_MMR6 = 671
    8369             :     Feature_HasDSP | 0, // CMP_LT_PH = 672
    8370             :     Feature_HasDSP | Feature_InMicroMips | 0, // CMP_LT_PH_MM = 673
    8371             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LT_S = 674
    8372             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LT_S_MMR6 = 675
    8373             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SAF_D = 676
    8374             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SAF_D_MMR6 = 677
    8375             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SAF_S = 678
    8376             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SAF_S_MMR6 = 679
    8377             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SEQ_D = 680
    8378             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SEQ_D_MMR6 = 681
    8379             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SEQ_S = 682
    8380             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SEQ_S_MMR6 = 683
    8381             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLE_D = 684
    8382             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLE_D_MMR6 = 685
    8383             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLE_S = 686
    8384             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLE_S_MMR6 = 687
    8385             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLT_D = 688
    8386             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLT_D_MMR6 = 689
    8387             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLT_S = 690
    8388             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLT_S_MMR6 = 691
    8389             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUEQ_D = 692
    8390             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUEQ_D_MMR6 = 693
    8391             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUEQ_S = 694
    8392             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUEQ_S_MMR6 = 695
    8393             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULE_D = 696
    8394             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULE_D_MMR6 = 697
    8395             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULE_S = 698
    8396             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULE_S_MMR6 = 699
    8397             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULT_D = 700
    8398             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULT_D_MMR6 = 701
    8399             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULT_S = 702
    8400             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULT_S_MMR6 = 703
    8401             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUN_D = 704
    8402             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUN_D_MMR6 = 705
    8403             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUN_S = 706
    8404             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUN_S_MMR6 = 707
    8405             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UEQ_D = 708
    8406             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UEQ_D_MMR6 = 709
    8407             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UEQ_S = 710
    8408             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UEQ_S_MMR6 = 711
    8409             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULE_D = 712
    8410             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULE_D_MMR6 = 713
    8411             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULE_S = 714
    8412             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULE_S_MMR6 = 715
    8413             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULT_D = 716
    8414             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULT_D_MMR6 = 717
    8415             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULT_S = 718
    8416             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULT_S_MMR6 = 719
    8417             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UN_D = 720
    8418             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UN_D_MMR6 = 721
    8419             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UN_S = 722
    8420             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UN_S_MMR6 = 723
    8421             :     Feature_InMips16Mode | 0, // CONSTPOOL_ENTRY = 724
    8422             :     Feature_HasMSA | 0, // COPY_FD_PSEUDO = 725
    8423             :     Feature_HasMSA | 0, // COPY_FW_PSEUDO = 726
    8424             :     Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_B = 727
    8425             :     Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // COPY_S_D = 728
    8426             :     Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_H = 729
    8427             :     Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_W = 730
    8428             :     Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_U_B = 731
    8429             :     Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_U_H = 732
    8430             :     Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // COPY_U_W = 733
    8431             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32B = 734
    8432             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CB = 735
    8433             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CD = 736
    8434             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CH = 737
    8435             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CW = 738
    8436             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32D = 739
    8437             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32H = 740
    8438             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32W = 741
    8439             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CTC1 = 742
    8440             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CTC1_MM = 743
    8441             :     Feature_HasStdEnc | Feature_InMicroMips | 0, // CTC2_MM = 744
    8442             :     Feature_HasStdEnc | Feature_HasMSA | 0, // CTCMSA = 745
    8443             :     Feature_HasMT | 0, // CTTC1 = 746
    8444             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D32_S = 747
    8445             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D32_S_MM = 748
    8446             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D32_W = 749
    8447             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D32_W_MM = 750
    8448             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_L = 751
    8449             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_S = 752
    8450             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D64_S_MM = 753
    8451             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_W = 754
    8452             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D64_W_MM = 755
    8453             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_D_L_MMR6 = 756
    8454             :     Feature_HasStdEnc | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_L_D64 = 757
    8455             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_L_D64_MM = 758
    8456             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_L_D_MMR6 = 759
    8457             :     Feature_HasStdEnc | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_L_S = 760
    8458             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_L_S_MM = 761
    8459             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_L_S_MMR6 = 762
    8460             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_D32 = 763
    8461             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_S_D32_MM = 764
    8462             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_D64 = 765
    8463             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_S_D64_MM = 766
    8464             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_L = 767
    8465             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_S_L_MMR6 = 768
    8466             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_W = 769
    8467             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CVT_S_W_MM = 770
    8468             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_S_W_MMR6 = 771
    8469             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_D32 = 772
    8470             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_W_D32_MM = 773
    8471             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_D64 = 774
    8472             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_W_D64_MM = 775
    8473             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_S = 776
    8474             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CVT_W_S_MM = 777
    8475             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_W_S_MMR6 = 778
    8476             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_D32 = 779
    8477             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_D32_MM = 780
    8478             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_D64 = 781
    8479             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_D64_MM = 782
    8480             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_S = 783
    8481             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_S_MM = 784
    8482             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_D32 = 785
    8483             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_D32_MM = 786
    8484             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_D64 = 787
    8485             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_D64_MM = 788
    8486             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_S = 789
    8487             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_S_MM = 790
    8488             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_D32 = 791
    8489             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_D32_MM = 792
    8490             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_D64 = 793
    8491             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_D64_MM = 794
    8492             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_S = 795
    8493             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_S_MM = 796
    8494             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_D32 = 797
    8495             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_D32_MM = 798
    8496             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_D64 = 799
    8497             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_D64_MM = 800
    8498             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_S = 801
    8499             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_S_MM = 802
    8500             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_D32 = 803
    8501             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_D32_MM = 804
    8502             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_D64 = 805
    8503             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_D64_MM = 806
    8504             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_S = 807
    8505             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_S_MM = 808
    8506             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_D32 = 809
    8507             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_D32_MM = 810
    8508             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_D64 = 811
    8509             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_D64_MM = 812
    8510             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_S = 813
    8511             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_S_MM = 814
    8512             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_D32 = 815
    8513             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_D32_MM = 816
    8514             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_D64 = 817
    8515             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_D64_MM = 818
    8516             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_S = 819
    8517             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_S_MM = 820
    8518             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_D32 = 821
    8519             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_D32_MM = 822
    8520             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_D64 = 823
    8521             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_D64_MM = 824
    8522             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_S = 825
    8523             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_S_MM = 826
    8524             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_D32 = 827
    8525             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_D32_MM = 828
    8526             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_D64 = 829
    8527             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_D64_MM = 830
    8528             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_S = 831
    8529             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_S_MM = 832
    8530             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_D32 = 833
    8531             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_D32_MM = 834
    8532             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_D64 = 835
    8533             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_D64_MM = 836
    8534             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_S = 837
    8535             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_S_MM = 838
    8536             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_D32 = 839
    8537             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_D32_MM = 840
    8538             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_D64 = 841
    8539             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_D64_MM = 842
    8540             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_S = 843
    8541             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_S_MM = 844
    8542             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_D32 = 845
    8543             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_D32_MM = 846
    8544             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_D64 = 847
    8545             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_D64_MM = 848
    8546             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_S = 849
    8547             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_S_MM = 850
    8548             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_D32 = 851
    8549             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_D32_MM = 852
    8550             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_D64 = 853
    8551             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_D64_MM = 854
    8552             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_S = 855
    8553             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_S_MM = 856
    8554             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_D32 = 857
    8555             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_D32_MM = 858
    8556             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_D64 = 859
    8557             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_D64_MM = 860
    8558             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_S = 861
    8559             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_S_MM = 862
    8560             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_D32 = 863
    8561             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_D32_MM = 864
    8562             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_D64 = 865
    8563             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_D64_MM = 866
    8564             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_S = 867
    8565             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_S_MM = 868
    8566             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_D32 = 869
    8567             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_D32_MM = 870
    8568             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_D64 = 871
    8569             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_D64_MM = 872
    8570             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_S = 873
    8571             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_S_MM = 874
    8572             :     Feature_InMips16Mode | 0, // CmpRxRy16 = 875
    8573             :     Feature_InMips16Mode | 0, // CmpiRxImm16 = 876
    8574             :     Feature_InMips16Mode | 0, // CmpiRxImmX16 = 877
    8575             :     Feature_InMips16Mode | 0, // Constant32 = 878
    8576             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADD = 879
    8577             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DADDi = 880
    8578             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADDiu = 881
    8579             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADDu = 882
    8580             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DAHI = 883
    8581             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DALIGN = 884
    8582             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DATI = 885
    8583             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DAUI = 886
    8584             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DBITSWAP = 887
    8585             :     Feature_HasStdEnc | Feature_HasMips64 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DCLO = 888
    8586             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLO_R6 = 889
    8587             :     Feature_HasStdEnc | Feature_HasMips64 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DCLZ = 890
    8588             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLZ_R6 = 891
    8589             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DDIV = 892
    8590             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DDIVU = 893
    8591             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotInMicroMips | 0, // DERET = 894
    8592             :     Feature_InMicroMips | 0, // DERET_MM = 895
    8593             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // DERET_MMR6 = 896
    8594             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXT = 897
    8595             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXT64_32 = 898
    8596             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXTM = 899
    8597             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXTU = 900
    8598             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // DI = 901
    8599             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINS = 902
    8600             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINSM = 903
    8601             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINSU = 904
    8602             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // DIV = 905
    8603             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // DIVU = 906
    8604             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // DIVU_MMR6 = 907
    8605             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // DIV_MMR6 = 908
    8606             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_B = 909
    8607             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_D = 910
    8608             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_H = 911
    8609             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_W = 912
    8610             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_B = 913
    8611             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_D = 914
    8612             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_H = 915
    8613             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_W = 916
    8614             :     Feature_InMicroMips | 0, // DI_MM = 917
    8615             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // DI_MMR6 = 918
    8616             :     Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // DLSA = 919
    8617             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DLSA_R6 = 920
    8618             :     Feature_HasMips64 | 0, // DMFC0 = 921
    8619             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // DMFC1 = 922
    8620             :     Feature_HasMips64 | 0, // DMFC2 = 923
    8621             :     Feature_HasCnMips | 0, // DMFC2_OCTEON = 924
    8622             :     Feature_HasStdEnc | Feature_HasMips64r5 | Feature_HasVirt | 0, // DMFGC0 = 925
    8623             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMOD = 926
    8624             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMODU = 927
    8625             :     Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // DMT = 928
    8626             :     Feature_HasMips64 | 0, // DMTC0 = 929
    8627             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // DMTC1 = 930
    8628             :     Feature_HasMips64 | 0, // DMTC2 = 931
    8629             :     Feature_HasCnMips | 0, // DMTC2_OCTEON = 932
    8630             :     Feature_HasStdEnc | Feature_HasMips64r5 | Feature_HasVirt | 0, // DMTGC0 = 933
    8631             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUH = 934
    8632             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUHU = 935
    8633             :     Feature_HasCnMips | 0, // DMUL = 936
    8634             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULImmMacro = 937
    8635             :     Feature_HasMips3 | Feature_NotMips64r6 | Feature_NotCnMips | 0, // DMULMacro = 938
    8636             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULOMacro = 939
    8637             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULOUMacro = 940
    8638             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DMULT = 941
    8639             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DMULTu = 942
    8640             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMULU = 943
    8641             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUL_R6 = 944
    8642             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_D = 945
    8643             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_H = 946
    8644             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_W = 947
    8645             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_D = 948
    8646             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_H = 949
    8647             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_W = 950
    8648             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_D = 951
    8649             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_H = 952
    8650             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_W = 953
    8651             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_D = 954
    8652             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_H = 955
    8653             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_W = 956
    8654             :     Feature_HasDSPR2 | 0, // DPAQX_SA_W_PH = 957
    8655             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // DPAQX_SA_W_PH_MMR2 = 958
    8656             :     Feature_HasDSPR2 | 0, // DPAQX_S_W_PH = 959
    8657             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // DPAQX_S_W_PH_MMR2 = 960
    8658             :     Feature_HasDSP | 0, // DPAQ_SA_L_W = 961
    8659             :     Feature_HasDSP | Feature_InMicroMips | 0, // DPAQ_SA_L_W_MM = 962
    8660             :     Feature_HasDSP | 0, // DPAQ_S_W_PH = 963
    8661             :     Feature_HasDSP | Feature_InMicroMips | 0, // DPAQ_S_W_PH_MM = 964
    8662             :     Feature_HasDSP | 0, // DPAU_H_QBL = 965
    8663             :     Feature_HasDSP | Feature_InMicroMips | 0, // DPAU_H_QBL_MM = 966
    8664             :     Feature_HasDSP | 0, // DPAU_H_QBR = 967
    8665             :     Feature_HasDSP | Feature_InMicroMips | 0, // DPAU_H_QBR_MM = 968
    8666             :     Feature_HasDSPR2 | 0, // DPAX_W_PH = 969
    8667             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // DPAX_W_PH_MMR2 = 970
    8668             :     Feature_HasDSPR2 | 0, // DPA_W_PH = 971
    8669             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // DPA_W_PH_MMR2 = 972
    8670             :     Feature_HasCnMips | 0, // DPOP = 973
    8671             :     Feature_HasDSPR2 | 0, // DPSQX_SA_W_PH = 974
    8672             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // DPSQX_SA_W_PH_MMR2 = 975
    8673             :     Feature_HasDSPR2 | 0, // DPSQX_S_W_PH = 976
    8674             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // DPSQX_S_W_PH_MMR2 = 977
    8675             :     Feature_HasDSP | 0, // DPSQ_SA_L_W = 978
    8676             :     Feature_HasDSP | Feature_InMicroMips | 0, // DPSQ_SA_L_W_MM = 979
    8677             :     Feature_HasDSP | 0, // DPSQ_S_W_PH = 980
    8678             :     Feature_HasDSP | Feature_InMicroMips | 0, // DPSQ_S_W_PH_MM = 981
    8679             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_D = 982
    8680             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_H = 983
    8681             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_W = 984
    8682             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_D = 985
    8683             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_H = 986
    8684             :     Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_W = 987
    8685             :     Feature_HasDSP | 0, // DPSU_H_QBL = 988
    8686             :     Feature_HasDSP | Feature_InMicroMips | 0, // DPSU_H_QBL_MM = 989
    8687             :     Feature_HasDSP | 0, // DPSU_H_QBR = 990
    8688             :     Feature_HasDSP | Feature_InMicroMips | 0, // DPSU_H_QBR_MM = 991
    8689             :     Feature_HasDSPR2 | 0, // DPSX_W_PH = 992
    8690             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // DPSX_W_PH_MMR2 = 993
    8691             :     Feature_HasDSPR2 | 0, // DPS_W_PH = 994
    8692             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // DPS_W_PH_MMR2 = 995
    8693             :     Feature_HasStdEnc | Feature_HasMips64 | 0, // DROL = 996
    8694             :     Feature_HasStdEnc | Feature_HasMips64 | 0, // DROLImm = 997
    8695             :     Feature_HasStdEnc | Feature_HasMips64 | 0, // DROR = 998
    8696             :     Feature_HasStdEnc | Feature_HasMips64 | 0, // DRORImm = 999
    8697             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTR = 1000
    8698             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTR32 = 1001
    8699             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTRV = 1002
    8700             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSBH = 1003
    8701             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDIV = 1004
    8702             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDivIMacro = 1005
    8703             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDivMacro = 1006
    8704             :     Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSHD = 1007
    8705             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLL = 1008
    8706             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLL32 = 1009
    8707             :     Feature_HasStdEnc | 0, // DSLL64_32 = 1010
    8708             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLLV = 1011
    8709             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRA = 1012
    8710             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRA32 = 1013
    8711             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRAV = 1014
    8712             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRL = 1015
    8713             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRL32 = 1016
    8714             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRLV = 1017
    8715             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSUB = 1018
    8716             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSUBu = 1019
    8717             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDIV = 1020
    8718             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDivIMacro = 1021
    8719             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDivMacro = 1022
    8720             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // DVP = 1023
    8721             :     Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // DVPE = 1024
    8722             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // DVP_MMR6 = 1025
    8723             :     Feature_InMips16Mode | 0, // DivRxRy16 = 1026
    8724             :     Feature_InMips16Mode | 0, // DivuRxRy16 = 1027
    8725             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // EHB = 1028
    8726             :     Feature_InMicroMips | 0, // EHB_MM = 1029
    8727             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // EHB_MMR6 = 1030
    8728             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // EI = 1031
    8729             :     Feature_InMicroMips | 0, // EI_MM = 1032
    8730             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // EI_MMR6 = 1033
    8731             :     Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // EMT = 1034
    8732             :     Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotInMicroMips | 0, // ERET = 1035
    8733             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_NotInMicroMips | 0, // ERETNC = 1036
    8734             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ERETNC_MMR6 = 1037
    8735             :     Feature_InMicroMips | 0, // ERET_MM = 1038
    8736             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ERET_MMR6 = 1039
    8737             :     Feature_HasStdEnc | 0, // ERet = 1040
    8738             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // EVP = 1041
    8739             :     Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // EVPE = 1042
    8740             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // EVP_MMR6 = 1043
    8741             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // EXT = 1044
    8742             :     Feature_HasDSP | 0, // EXTP = 1045
    8743             :     Feature_HasDSP | 0, // EXTPDP = 1046
    8744             :     Feature_HasDSP | 0, // EXTPDPV = 1047
    8745             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTPDPV_MM = 1048
    8746             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTPDP_MM = 1049
    8747             :     Feature_HasDSP | 0, // EXTPV = 1050
    8748             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTPV_MM = 1051
    8749             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTP_MM = 1052
    8750             :     Feature_HasDSP | 0, // EXTRV_RS_W = 1053
    8751             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTRV_RS_W_MM = 1054
    8752             :     Feature_HasDSP | 0, // EXTRV_R_W = 1055
    8753             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTRV_R_W_MM = 1056
    8754             :     Feature_HasDSP | 0, // EXTRV_S_H = 1057
    8755             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTRV_S_H_MM = 1058
    8756             :     Feature_HasDSP | 0, // EXTRV_W = 1059
    8757             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTRV_W_MM = 1060
    8758             :     Feature_HasDSP | 0, // EXTR_RS_W = 1061
    8759             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTR_RS_W_MM = 1062
    8760             :     Feature_HasDSP | 0, // EXTR_R_W = 1063
    8761             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTR_R_W_MM = 1064
    8762             :     Feature_HasDSP | 0, // EXTR_S_H = 1065
    8763             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTR_S_H_MM = 1066
    8764             :     Feature_HasDSP | 0, // EXTR_W = 1067
    8765             :     Feature_HasDSP | Feature_InMicroMips | 0, // EXTR_W_MM = 1068
    8766             :     Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // EXTS = 1069
    8767             :     Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // EXTS32 = 1070
    8768             :     Feature_InMicroMips | 0, // EXT_MM = 1071
    8769             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // EXT_MMR6 = 1072
    8770             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // ExtractElementF64 = 1073
    8771             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // ExtractElementF64_64 = 1074
    8772             :     Feature_HasMSA | 0, // FABS_D = 1075
    8773             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_D32 = 1076
    8774             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FABS_D32_MM = 1077
    8775             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_D64 = 1078
    8776             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FABS_D64_MM = 1079
    8777             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_S = 1080
    8778             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FABS_S_MM = 1081
    8779             :     Feature_HasMSA | 0, // FABS_W = 1082
    8780             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FADD_D = 1083
    8781             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_D32 = 1084
    8782             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FADD_D32_MM = 1085
    8783             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_D64 = 1086
    8784             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FADD_D64_MM = 1087
    8785             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_S = 1088
    8786             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FADD_S_MM = 1089
    8787             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FADD_S_MMR6 = 1090
    8788             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FADD_W = 1091
    8789             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCAF_D = 1092
    8790             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCAF_W = 1093
    8791             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCEQ_D = 1094
    8792             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCEQ_W = 1095
    8793             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCLASS_D = 1096
    8794             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCLASS_W = 1097
    8795             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCLE_D = 1098
    8796             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCLE_W = 1099
    8797             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCLT_D = 1100
    8798             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCLT_W = 1101
    8799             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FCMP_D32 = 1102
    8800             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // FCMP_D32_MM = 1103
    8801             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // FCMP_D64 = 1104
    8802             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FCMP_S32 = 1105
    8803             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // FCMP_S32_MM = 1106
    8804             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCNE_D = 1107
    8805             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCNE_W = 1108
    8806             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCOR_D = 1109
    8807             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCOR_W = 1110
    8808             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCUEQ_D = 1111
    8809             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCUEQ_W = 1112
    8810             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCULE_D = 1113
    8811             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCULE_W = 1114
    8812             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCULT_D = 1115
    8813             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCULT_W = 1116
    8814             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCUNE_D = 1117
    8815             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCUNE_W = 1118
    8816             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCUN_D = 1119
    8817             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FCUN_W = 1120
    8818             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_D = 1121
    8819             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_D32 = 1122
    8820             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FDIV_D32_MM = 1123
    8821             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_D64 = 1124
    8822             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FDIV_D64_MM = 1125
    8823             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_S = 1126
    8824             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FDIV_S_MM = 1127
    8825             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FDIV_S_MMR6 = 1128
    8826             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_W = 1129
    8827             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FEXDO_H = 1130
    8828             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FEXDO_W = 1131
    8829             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_D = 1132
    8830             :     Feature_HasMSA | 0, // FEXP2_D_1_PSEUDO = 1133
    8831             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_W = 1134
    8832             :     Feature_HasMSA | 0, // FEXP2_W_1_PSEUDO = 1135
    8833             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPL_D = 1136
    8834             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPL_W = 1137
    8835             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPR_D = 1138
    8836             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPR_W = 1139
    8837             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_S_D = 1140
    8838             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_S_W = 1141
    8839             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_U_D = 1142
    8840             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_U_W = 1143
    8841             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FFQL_D = 1144
    8842             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FFQL_W = 1145
    8843             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FFQR_D = 1146
    8844             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FFQR_W = 1147
    8845             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_B = 1148
    8846             :     Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // FILL_D = 1149
    8847             :     Feature_HasMSA | 0, // FILL_FD_PSEUDO = 1150
    8848             :     Feature_HasMSA | 0, // FILL_FW_PSEUDO = 1151
    8849             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_H = 1152
    8850             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_W = 1153
    8851             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FLOG2_D = 1154
    8852             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FLOG2_W = 1155
    8853             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_L_D64 = 1156
    8854             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_L_D_MMR6 = 1157
    8855             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_L_S = 1158
    8856             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_L_S_MMR6 = 1159
    8857             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_D32 = 1160
    8858             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_D64 = 1161
    8859             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_W_D_MMR6 = 1162
    8860             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FLOOR_W_MM = 1163
    8861             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_S = 1164
    8862             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FLOOR_W_S_MM = 1165
    8863             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_W_S_MMR6 = 1166
    8864             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMADD_D = 1167
    8865             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMADD_W = 1168
    8866             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_A_D = 1169
    8867             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_A_W = 1170
    8868             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_D = 1171
    8869             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_W = 1172
    8870             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_A_D = 1173
    8871             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_A_W = 1174
    8872             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_D = 1175
    8873             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_W = 1176
    8874             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_D32 = 1177
    8875             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FMOV_D32_MM = 1178
    8876             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_D64 = 1179
    8877             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FMOV_D64_MM = 1180
    8878             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_S = 1181
    8879             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FMOV_S_MM = 1182
    8880             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FMOV_S_MMR6 = 1183
    8881             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMSUB_D = 1184
    8882             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMSUB_W = 1185
    8883             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMUL_D = 1186
    8884             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_D32 = 1187
    8885             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FMUL_D32_MM = 1188
    8886             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_D64 = 1189
    8887             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FMUL_D64_MM = 1190
    8888             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_S = 1191
    8889             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FMUL_S_MM = 1192
    8890             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FMUL_S_MMR6 = 1193
    8891             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FMUL_W = 1194
    8892             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FNEG_D32 = 1195
    8893             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FNEG_D32_MM = 1196
    8894             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FNEG_D64 = 1197
    8895             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FNEG_D64_MM = 1198
    8896             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // FNEG_S = 1199
    8897             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FNEG_S_MM = 1200
    8898             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FNEG_S_MMR6 = 1201
    8899             :     Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // FORK = 1202
    8900             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FRCP_D = 1203
    8901             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FRCP_W = 1204
    8902             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FRINT_D = 1205
    8903             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FRINT_W = 1206
    8904             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FRSQRT_D = 1207
    8905             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FRSQRT_W = 1208
    8906             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSAF_D = 1209
    8907             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSAF_W = 1210
    8908             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSEQ_D = 1211
    8909             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSEQ_W = 1212
    8910             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSLE_D = 1213
    8911             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSLE_W = 1214
    8912             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSLT_D = 1215
    8913             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSLT_W = 1216
    8914             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSNE_D = 1217
    8915             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSNE_W = 1218
    8916             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSOR_D = 1219
    8917             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSOR_W = 1220
    8918             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSQRT_D = 1221
    8919             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_D32 = 1222
    8920             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FSQRT_D32_MM = 1223
    8921             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_D64 = 1224
    8922             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FSQRT_D64_MM = 1225
    8923             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_S = 1226
    8924             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FSQRT_S_MM = 1227
    8925             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSQRT_W = 1228
    8926             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSUB_D = 1229
    8927             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_D32 = 1230
    8928             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FSUB_D32_MM = 1231
    8929             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_D64 = 1232
    8930             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FSUB_D64_MM = 1233
    8931             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_S = 1234
    8932             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FSUB_S_MM = 1235
    8933             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FSUB_S_MMR6 = 1236
    8934             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSUB_W = 1237
    8935             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSUEQ_D = 1238
    8936             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSUEQ_W = 1239
    8937             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSULE_D = 1240
    8938             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSULE_W = 1241
    8939             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSULT_D = 1242
    8940             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSULT_W = 1243
    8941             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSUNE_D = 1244
    8942             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSUNE_W = 1245
    8943             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSUN_D = 1246
    8944             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FSUN_W = 1247
    8945             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_S_D = 1248
    8946             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_S_W = 1249
    8947             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_U_D = 1250
    8948             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_U_W = 1251
    8949             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTQ_H = 1252
    8950             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTQ_W = 1253
    8951             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_S_D = 1254
    8952             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_S_W = 1255
    8953             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_U_D = 1256
    8954             :     Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_U_W = 1257
    8955             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasGINV | Feature_NotInMicroMips | 0, // GINVI = 1258
    8956             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_HasGINV | 0, // GINVI_MMR6 = 1259
    8957             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasGINV | Feature_NotInMicroMips | 0, // GINVT = 1260
    8958             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_HasGINV | 0, // GINVT_MMR6 = 1261
    8959             :     Feature_InMips16Mode | 0, // GotPrologue16 = 1262
    8960             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_D = 1263
    8961             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_H = 1264
    8962             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_W = 1265
    8963             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_D = 1266
    8964             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_H = 1267
    8965             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_W = 1268
    8966             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_D = 1269
    8967             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_H = 1270
    8968             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_W = 1271
    8969             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_D = 1272
    8970             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_H = 1273
    8971             :     Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_W = 1274
    8972             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // HYPCALL = 1275
    8973             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // HYPCALL_MM = 1276
    8974             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_B = 1277
    8975             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_D = 1278
    8976             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_H = 1279
    8977             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_W = 1280
    8978             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_B = 1281
    8979             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_D = 1282
    8980             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_H = 1283
    8981             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_W = 1284
    8982             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_B = 1285
    8983             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_D = 1286
    8984             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_H = 1287
    8985             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_W = 1288
    8986             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_B = 1289
    8987             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_D = 1290
    8988             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_H = 1291
    8989             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_W = 1292
    8990             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // INS = 1293
    8991             :     Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B = 1294
    8992             :     Feature_HasMSA | 0, // INSERT_B_VIDX64_PSEUDO = 1295
    8993             :     Feature_HasMSA | 0, // INSERT_B_VIDX_PSEUDO = 1296
    8994             :     Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // INSERT_D = 1297
    8995             :     Feature_HasMSA | 0, // INSERT_D_VIDX64_PSEUDO = 1298
    8996             :     Feature_HasMSA | 0, // INSERT_D_VIDX_PSEUDO = 1299
    8997             :     Feature_HasMSA | 0, // INSERT_FD_PSEUDO = 1300
    8998             :     Feature_HasMSA | 0, // INSERT_FD_VIDX64_PSEUDO = 1301
    8999             :     Feature_HasMSA | 0, // INSERT_FD_VIDX_PSEUDO = 1302
    9000             :     Feature_HasMSA | 0, // INSERT_FW_PSEUDO = 1303
    9001             :     Feature_HasMSA | 0, // INSERT_FW_VIDX64_PSEUDO = 1304
    9002             :     Feature_HasMSA | 0, // INSERT_FW_VIDX_PSEUDO = 1305
    9003             :     Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H = 1306
    9004             :     Feature_HasMSA | 0, // INSERT_H_VIDX64_PSEUDO = 1307
    9005             :     Feature_HasMSA | 0, // INSERT_H_VIDX_PSEUDO = 1308
    9006             :     Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W = 1309
    9007             :     Feature_HasMSA | 0, // INSERT_W_VIDX64_PSEUDO = 1310
    9008             :     Feature_HasMSA | 0, // INSERT_W_VIDX_PSEUDO = 1311
    9009             :     Feature_HasDSP | 0, // INSV = 1312
    9010             :     Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_B = 1313
    9011             :     Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_D = 1314
    9012             :     Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_H = 1315
    9013             :     Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_W = 1316
    9014             :     Feature_HasDSP | Feature_InMicroMips | 0, // INSV_MM = 1317
    9015             :     Feature_InMicroMips | 0, // INS_MM = 1318
    9016             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // INS_MMR6 = 1319
    9017             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // J = 1320
    9018             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // JAL = 1321
    9019             :     Feature_HasStdEnc | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // JALR = 1322
    9020             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALR16_MM = 1323
    9021             :     Feature_HasStdEnc | 0, // JALR64 = 1324
    9022             :     Feature_HasStdEnc | Feature_NoIndirectJumpGuards | 0, // JALR64Pseudo = 1325
    9023             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC16_MMR6 = 1326
    9024             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC_HB_MMR6 = 1327
    9025             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC_MMR6 = 1328
    9026             :     Feature_HasStdEnc | Feature_UseIndirectJumpsHazard | 0, // JALRHB64Pseudo = 1329
    9027             :     Feature_HasStdEnc | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // JALRHBPseudo = 1330
    9028             :     Feature_HasStdEnc | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // JALRPseudo = 1331
    9029             :     Feature_InMicroMips | 0, // JALRS16_MM = 1332
    9030             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALRS_MM = 1333
    9031             :     Feature_HasStdEnc | Feature_HasMips32 | 0, // JALR_HB = 1334
    9032             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // JALR_HB64 = 1335
    9033             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALR_MM = 1336
    9034             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALS_MM = 1337
    9035             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JALX = 1338
    9036             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALX_MM = 1339
    9037             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // JAL_MM = 1340
    9038             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JIALC = 1341
    9039             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // JIALC64 = 1342
    9040             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // JIALC_MMR6 = 1343
    9041             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JIC = 1344
    9042             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // JIC64 = 1345
    9043             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // JIC_MMR6 = 1346
    9044             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JR = 1347
    9045             :     Feature_InMicroMips | 0, // JR16_MM = 1348
    9046             :     Feature_HasStdEnc | Feature_IsPTR64bit | Feature_NotInMicroMips | 0, // JR64 = 1349
    9047             :     Feature_InMicroMips | 0, // JRADDIUSP = 1350
    9048             :     Feature_InMicroMips | 0, // JRC16_MM = 1351
    9049             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // JRC16_MMR6 = 1352
    9050             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // JRCADDIUSP_MMR6 = 1353
    9051             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // JR_HB = 1354
    9052             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JR_HB64 = 1355
    9053             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JR_HB64_R6 = 1356
    9054             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JR_HB_R6 = 1357
    9055             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // JR_MM = 1358
    9056             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // J_MM = 1359
    9057             :     Feature_InMips16Mode | 0, // Jal16 = 1360
    9058             :     Feature_InMips16Mode | 0, // JalB16 = 1361
    9059             :     0, // JalOneReg = 1362
    9060             :     0, // JalTwoReg = 1363
    9061             :     Feature_InMips16Mode | 0, // JrRa16 = 1364
    9062             :     Feature_InMips16Mode | 0, // JrcRa16 = 1365
    9063             :     Feature_InMips16Mode | 0, // JrcRx16 = 1366
    9064             :     Feature_InMips16Mode | 0, // JumpLinkReg16 = 1367
    9065             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LB = 1368
    9066             :     Feature_HasStdEnc | 0, // LB64 = 1369
    9067             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LBE = 1370
    9068             :     Feature_InMicroMips | Feature_HasEVA | 0, // LBE_MM = 1371
    9069             :     Feature_InMicroMips | 0, // LBU16_MM = 1372
    9070             :     Feature_HasDSP | 0, // LBUX = 1373
    9071             :     Feature_HasDSP | Feature_InMicroMips | 0, // LBUX_MM = 1374
    9072             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LBU_MMR6 = 1375
    9073             :     Feature_InMicroMips | 0, // LB_MM = 1376
    9074             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LB_MMR6 = 1377
    9075             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LBu = 1378
    9076             :     Feature_HasStdEnc | 0, // LBu64 = 1379
    9077             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LBuE = 1380
    9078             :     Feature_InMicroMips | Feature_HasEVA | 0, // LBuE_MM = 1381
    9079             :     Feature_InMicroMips | 0, // LBu_MM = 1382
    9080             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // LD = 1383
    9081             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDC1 = 1384
    9082             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDC164 = 1385
    9083             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // LDC1_D64_MMR6 = 1386
    9084             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // LDC1_MM = 1387
    9085             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LDC2 = 1388
    9086             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LDC2_MMR6 = 1389
    9087             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LDC2_R6 = 1390
    9088             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // LDC3 = 1391
    9089             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_B = 1392
    9090             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_D = 1393
    9091             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_H = 1394
    9092             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_W = 1395
    9093             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // LDL = 1396
    9094             :     Feature_HasStdEnc | Feature_NotMips3 | 0, // LDMacro = 1397
    9095             :     Feature_HasStdEnc | Feature_HasMips64r6 | 0, // LDPC = 1398
    9096             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // LDR = 1399
    9097             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDXC1 = 1400
    9098             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // LDXC164 = 1401
    9099             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LD_B = 1402
    9100             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LD_D = 1403
    9101             :     Feature_HasMSA | 0, // LD_F16 = 1404
    9102             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LD_H = 1405
    9103             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LD_W = 1406
    9104             :     Feature_HasStdEnc | 0, // LEA_ADDiu = 1407
    9105             :     Feature_HasStdEnc | 0, // LEA_ADDiu64 = 1408
    9106             :     Feature_InMicroMips | 0, // LEA_ADDiu_MM = 1409
    9107             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LH = 1410
    9108             :     Feature_HasStdEnc | 0, // LH64 = 1411
    9109             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LHE = 1412
    9110             :     Feature_InMicroMips | Feature_HasEVA | 0, // LHE_MM = 1413
    9111             :     Feature_InMicroMips | 0, // LHU16_MM = 1414
    9112             :     Feature_HasDSP | 0, // LHX = 1415
    9113             :     Feature_HasDSP | Feature_InMicroMips | 0, // LHX_MM = 1416
    9114             :     Feature_InMicroMips | 0, // LH_MM = 1417
    9115             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LHu = 1418
    9116             :     Feature_HasStdEnc | 0, // LHu64 = 1419
    9117             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LHuE = 1420
    9118             :     Feature_InMicroMips | Feature_HasEVA | 0, // LHuE_MM = 1421
    9119             :     Feature_InMicroMips | 0, // LHu_MM = 1422
    9120             :     Feature_InMicroMips | 0, // LI16_MM = 1423
    9121             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LI16_MMR6 = 1424
    9122             :     Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LL = 1425
    9123             :     Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LL64 = 1426
    9124             :     Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // LL64_R6 = 1427
    9125             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LLD = 1428
    9126             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // LLD_R6 = 1429
    9127             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LLE = 1430
    9128             :     Feature_InMicroMips | Feature_HasEVA | 0, // LLE_MM = 1431
    9129             :     Feature_InMicroMips | 0, // LL_MM = 1432
    9130             :     Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LL_R6 = 1433
    9131             :     Feature_HasStdEnc | 0, // LOAD_ACC128 = 1434
    9132             :     Feature_HasStdEnc | 0, // LOAD_ACC64 = 1435
    9133             :     Feature_HasStdEnc | 0, // LOAD_ACC64DSP = 1436
    9134             :     Feature_HasStdEnc | 0, // LOAD_CCOND_DSP = 1437
    9135             :     Feature_HasStdEnc | 0, // LONG_BRANCH_ADDiu = 1438
    9136             :     Feature_HasStdEnc | 0, // LONG_BRANCH_DADDiu = 1439
    9137             :     Feature_HasStdEnc | 0, // LONG_BRANCH_LUi = 1440
    9138             :     Feature_HasStdEnc | Feature_HasMSA | 0, // LSA = 1441
    9139             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LSA_MMR6 = 1442
    9140             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // LSA_R6 = 1443
    9141             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LUI_MMR6 = 1444
    9142             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LUXC1 = 1445
    9143             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LUXC164 = 1446
    9144             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // LUXC1_MM = 1447
    9145             :     Feature_HasStdEnc | 0, // LUi = 1448
    9146             :     Feature_HasStdEnc | 0, // LUi64 = 1449
    9147             :     Feature_InMicroMips | 0, // LUi_MM = 1450
    9148             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LW = 1451
    9149             :     Feature_InMicroMips | 0, // LW16_MM = 1452
    9150             :     Feature_HasStdEnc | 0, // LW64 = 1453
    9151             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LWC1 = 1454
    9152             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // LWC1_MM = 1455
    9153             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWC2 = 1456
    9154             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWC2_MMR6 = 1457
    9155             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LWC2_R6 = 1458
    9156             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // LWC3 = 1459
    9157             :     Feature_HasStdEnc | Feature_HasDSP | 0, // LWDSP = 1460
    9158             :     Feature_HasStdEnc | Feature_HasDSP | Feature_InMicroMips | 0, // LWDSP_MM = 1461
    9159             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWE = 1462
    9160             :     Feature_InMicroMips | Feature_HasEVA | 0, // LWE_MM = 1463
    9161             :     Feature_InMicroMips | 0, // LWGP_MM = 1464
    9162             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWL = 1465
    9163             :     Feature_HasStdEnc | 0, // LWL64 = 1466
    9164             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWLE = 1467
    9165             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // LWLE_MM = 1468
    9166             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWL_MM = 1469
    9167             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWM16_MM = 1470
    9168             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWM16_MMR6 = 1471
    9169             :     Feature_InMicroMips | 0, // LWM32_MM = 1472
    9170             :     Feature_InMicroMips | 0, // LWM_MM = 1473
    9171             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // LWPC = 1474
    9172             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWPC_MMR6 = 1475
    9173             :     Feature_InMicroMips | 0, // LWP_MM = 1476
    9174             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWP_MMR6 = 1477
    9175             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWR = 1478
    9176             :     Feature_HasStdEnc | 0, // LWR64 = 1479
    9177             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWRE = 1480
    9178             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // LWRE_MM = 1481
    9179             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWR_MM = 1482
    9180             :     Feature_InMicroMips | 0, // LWSP_MM = 1483
    9181             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LWUPC = 1484
    9182             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWU_MM = 1485
    9183             :     Feature_HasDSP | 0, // LWX = 1486
    9184             :     Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // LWXC1 = 1487
    9185             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // LWXC1_MM = 1488
    9186             :     Feature_InMicroMips | 0, // LWXS_MM = 1489
    9187             :     Feature_HasDSP | Feature_InMicroMips | 0, // LWX_MM = 1490
    9188             :     Feature_InMicroMips | 0, // LW_MM = 1491
    9189             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // LW_MMR6 = 1492
    9190             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // LWu = 1493
    9191             :     Feature_InMips16Mode | 0, // LbRxRyOffMemX16 = 1494
    9192             :     Feature_InMips16Mode | 0, // LbuRxRyOffMemX16 = 1495
    9193             :     Feature_InMips16Mode | 0, // LhRxRyOffMemX16 = 1496
    9194             :     Feature_InMips16Mode | 0, // LhuRxRyOffMemX16 = 1497
    9195             :     Feature_InMips16Mode | 0, // LiRxImm16 = 1498
    9196             :     Feature_InMips16Mode | 0, // LiRxImmAlignX16 = 1499
    9197             :     Feature_InMips16Mode | 0, // LiRxImmX16 = 1500
    9198             :     0, // LoadAddrImm32 = 1501
    9199             :     0, // LoadAddrImm64 = 1502
    9200             :     0, // LoadAddrReg32 = 1503
    9201             :     0, // LoadAddrReg64 = 1504
    9202             :     0, // LoadImm32 = 1505
    9203             :     0, // LoadImm64 = 1506
    9204             :     Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // LoadImmDoubleFGR = 1507
    9205             :     Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // LoadImmDoubleFGR_32 = 1508
    9206             :     0, // LoadImmDoubleGPR = 1509
    9207             :     Feature_IsNotSoftFloat | 0, // LoadImmSingleFGR = 1510
    9208             :     0, // LoadImmSingleGPR = 1511
    9209             :     Feature_InMips16Mode | 0, // LwConstant32 = 1512
    9210             :     Feature_InMips16Mode | 0, // LwRxPcTcp16 = 1513
    9211             :     Feature_InMips16Mode | 0, // LwRxPcTcpX16 = 1514
    9212             :     Feature_InMips16Mode | 0, // LwRxRyOffMemX16 = 1515
    9213             :     Feature_InMips16Mode | 0, // LwRxSpImmX16 = 1516
    9214             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MADD = 1517
    9215             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MADDF_D = 1518
    9216             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MADDF_D_MMR6 = 1519
    9217             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MADDF_S = 1520
    9218             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MADDF_S_MMR6 = 1521
    9219             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MADDR_Q_H = 1522
    9220             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MADDR_Q_W = 1523
    9221             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MADDU = 1524
    9222             :     Feature_HasDSP | 0, // MADDU_DSP = 1525
    9223             :     Feature_HasDSP | Feature_InMicroMips | 0, // MADDU_DSP_MM = 1526
    9224             :     Feature_InMicroMips | 0, // MADDU_MM = 1527
    9225             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_B = 1528
    9226             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_D = 1529
    9227             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_H = 1530
    9228             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_W = 1531
    9229             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_D32 = 1532
    9230             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MADD_D32_MM = 1533
    9231             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_D64 = 1534
    9232             :     Feature_HasDSP | 0, // MADD_DSP = 1535
    9233             :     Feature_HasDSP | Feature_InMicroMips | 0, // MADD_DSP_MM = 1536
    9234             :     Feature_InMicroMips | 0, // MADD_MM = 1537
    9235             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MADD_Q_H = 1538
    9236             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MADD_Q_W = 1539
    9237             :     Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_S = 1540
    9238             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MADD_S_MM = 1541
    9239             :     Feature_HasDSP | 0, // MAQ_SA_W_PHL = 1542
    9240             :     Feature_HasDSP | Feature_InMicroMips | 0, // MAQ_SA_W_PHL_MM = 1543
    9241             :     Feature_HasDSP | 0, // MAQ_SA_W_PHR = 1544
    9242             :     Feature_HasDSP | Feature_InMicroMips | 0, // MAQ_SA_W_PHR_MM = 1545
    9243             :     Feature_HasDSP | 0, // MAQ_S_W_PHL = 1546
    9244             :     Feature_HasDSP | Feature_InMicroMips | 0, // MAQ_S_W_PHL_MM = 1547
    9245             :     Feature_HasDSP | 0, // MAQ_S_W_PHR = 1548
    9246             :     Feature_HasDSP | Feature_InMicroMips | 0, // MAQ_S_W_PHR_MM = 1549
    9247             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAXA_D = 1550
    9248             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAXA_D_MMR6 = 1551
    9249             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAXA_S = 1552
    9250             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAXA_S_MMR6 = 1553
    9251             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_B = 1554
    9252             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_D = 1555
    9253             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_H = 1556
    9254             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_W = 1557
    9255             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_B = 1558
    9256             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_D = 1559
    9257             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_H = 1560
    9258             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_W = 1561
    9259             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_B = 1562
    9260             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_D = 1563
    9261             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_H = 1564
    9262             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_W = 1565
    9263             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAX_D = 1566
    9264             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAX_D_MMR6 = 1567
    9265             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAX_S = 1568
    9266             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_B = 1569
    9267             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_D = 1570
    9268             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_H = 1571
    9269             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAX_S_MMR6 = 1572
    9270             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_W = 1573
    9271             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_B = 1574
    9272             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_D = 1575
    9273             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_H = 1576
    9274             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_W = 1577
    9275             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MFC0 = 1578
    9276             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFC0_MMR6 = 1579
    9277             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFC1 = 1580
    9278             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFC1_D64 = 1581
    9279             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // MFC1_MM = 1582
    9280             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MFC1_MMR6 = 1583
    9281             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MFC2 = 1584
    9282             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFC2_MMR6 = 1585
    9283             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MFGC0 = 1586
    9284             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MFGC0_MM = 1587
    9285             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFHC0_MMR6 = 1588
    9286             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFHC1_D32 = 1589
    9287             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // MFHC1_D32_MM = 1590
    9288             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFHC1_D64 = 1591
    9289             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MFHC1_D64_MM = 1592
    9290             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFHC2_MMR6 = 1593
    9291             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MFHGC0 = 1594
    9292             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MFHGC0_MM = 1595
    9293             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MFHI = 1596
    9294             :     Feature_InMicroMips | 0, // MFHI16_MM = 1597
    9295             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MFHI64 = 1598
    9296             :     Feature_HasDSP | 0, // MFHI_DSP = 1599
    9297             :     Feature_HasDSP | Feature_InMicroMips | 0, // MFHI_DSP_MM = 1600
    9298             :     Feature_InMicroMips | 0, // MFHI_MM = 1601
    9299             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MFLO = 1602
    9300             :     Feature_InMicroMips | 0, // MFLO16_MM = 1603
    9301             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MFLO64 = 1604
    9302             :     Feature_HasDSP | 0, // MFLO_DSP = 1605
    9303             :     Feature_HasDSP | Feature_InMicroMips | 0, // MFLO_DSP_MM = 1606
    9304             :     Feature_InMicroMips | 0, // MFLO_MM = 1607
    9305             :     Feature_HasMT | 0, // MFTACX = 1608
    9306             :     Feature_HasMT | 0, // MFTC0 = 1609
    9307             :     Feature_HasMT | 0, // MFTC1 = 1610
    9308             :     Feature_HasMT | 0, // MFTDSP = 1611
    9309             :     Feature_HasMT | 0, // MFTGPR = 1612
    9310             :     Feature_HasMT | 0, // MFTHC1 = 1613
    9311             :     Feature_HasMT | 0, // MFTHI = 1614
    9312             :     Feature_HasMT | 0, // MFTLO = 1615
    9313             :     Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // MFTR = 1616
    9314             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MINA_D = 1617
    9315             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MINA_D_MMR6 = 1618
    9316             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MINA_S = 1619
    9317             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MINA_S_MMR6 = 1620
    9318             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_B = 1621
    9319             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_D = 1622
    9320             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_H = 1623
    9321             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_W = 1624
    9322             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_B = 1625
    9323             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_D = 1626
    9324             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_H = 1627
    9325             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_W = 1628
    9326             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_B = 1629
    9327             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_D = 1630
    9328             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_H = 1631
    9329             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_W = 1632
    9330             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MIN_D = 1633
    9331             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MIN_D_MMR6 = 1634
    9332             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MIN_S = 1635
    9333             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_B = 1636
    9334             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_D = 1637
    9335             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_H = 1638
    9336             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MIN_S_MMR6 = 1639
    9337             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_W = 1640
    9338             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_B = 1641
    9339             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_D = 1642
    9340             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_H = 1643
    9341             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_W = 1644
    9342             :     0, // MIPSeh_return32 = 1645
    9343             :     0, // MIPSeh_return64 = 1646
    9344             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MOD = 1647
    9345             :     Feature_HasDSP | 0, // MODSUB = 1648
    9346             :     Feature_HasDSP | Feature_InMicroMips | 0, // MODSUB_MM = 1649
    9347             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MODU = 1650
    9348             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MODU_MMR6 = 1651
    9349             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOD_MMR6 = 1652
    9350             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_B = 1653
    9351             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_D = 1654
    9352             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_H = 1655
    9353             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_W = 1656
    9354             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_B = 1657
    9355             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_D = 1658
    9356             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_H = 1659
    9357             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_W = 1660
    9358             :     Feature_InMicroMips | 0, // MOVE16_MM = 1661
    9359             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOVE16_MMR6 = 1662
    9360             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVEP_MM = 1663
    9361             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOVEP_MMR6 = 1664
    9362             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MOVE_V = 1665
    9363             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_D32 = 1666
    9364             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_D32_MM = 1667
    9365             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_D64 = 1668
    9366             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_I = 1669
    9367             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_I64 = 1670
    9368             :     Feature_InMicroMips | 0, // MOVF_I_MM = 1671
    9369             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_S = 1672
    9370             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_S_MM = 1673
    9371             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I64_D64 = 1674
    9372             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I64_I = 1675
    9373             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I64_I64 = 1676
    9374             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I64_S = 1677
    9375             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_D32 = 1678
    9376             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVN_I_D32_MM = 1679
    9377             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_D64 = 1680
    9378             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I_I = 1681
    9379             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I_I64 = 1682
    9380             :     Feature_InMicroMips | 0, // MOVN_I_MM = 1683
    9381             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_S = 1684
    9382             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVN_I_S_MM = 1685
    9383             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_D32 = 1686
    9384             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_D32_MM = 1687
    9385             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_D64 = 1688
    9386             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_I = 1689
    9387             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_I64 = 1690
    9388             :     Feature_InMicroMips | 0, // MOVT_I_MM = 1691
    9389             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_S = 1692
    9390             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_S_MM = 1693
    9391             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I64_D64 = 1694
    9392             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I64_I = 1695
    9393             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I64_I64 = 1696
    9394             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I64_S = 1697
    9395             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_D32 = 1698
    9396             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVZ_I_D32_MM = 1699
    9397             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_D64 = 1700
    9398             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I_I = 1701
    9399             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I_I64 = 1702
    9400             :     Feature_InMicroMips | 0, // MOVZ_I_MM = 1703
    9401             :     Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_S = 1704
    9402             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVZ_I_S_MM = 1705
    9403             :     Feature_HasMSA | 0, // MSA_FP_EXTEND_D_PSEUDO = 1706
    9404             :     Feature_HasMSA | 0, // MSA_FP_EXTEND_W_PSEUDO = 1707
    9405             :     Feature_HasMSA | 0, // MSA_FP_ROUND_D_PSEUDO = 1708
    9406             :     Feature_HasMSA | 0, // MSA_FP_ROUND_W_PSEUDO = 1709
    9407             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MSUB = 1710
    9408             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MSUBF_D = 1711
    9409             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MSUBF_D_MMR6 = 1712
    9410             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MSUBF_S = 1713
    9411             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MSUBF_S_MMR6 = 1714
    9412             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBR_Q_H = 1715
    9413             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBR_Q_W = 1716
    9414             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MSUBU = 1717
    9415             :     Feature_HasDSP | 0, // MSUBU_DSP = 1718
    9416             :     Feature_HasDSP | Feature_InMicroMips | 0, // MSUBU_DSP_MM = 1719
    9417             :     Feature_InMicroMips | 0, // MSUBU_MM = 1720
    9418             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_B = 1721
    9419             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_D = 1722
    9420             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_H = 1723
    9421             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_W = 1724
    9422             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_D32 = 1725
    9423             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MSUB_D32_MM = 1726
    9424             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_D64 = 1727
    9425             :     Feature_HasDSP | 0, // MSUB_DSP = 1728
    9426             :     Feature_HasDSP | Feature_InMicroMips | 0, // MSUB_DSP_MM = 1729
    9427             :     Feature_InMicroMips | 0, // MSUB_MM = 1730
    9428             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MSUB_Q_H = 1731
    9429             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MSUB_Q_W = 1732
    9430             :     Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_S = 1733
    9431             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MSUB_S_MM = 1734
    9432             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MTC0 = 1735
    9433             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTC0_MMR6 = 1736
    9434             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTC1 = 1737
    9435             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTC1_D64 = 1738
    9436             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // MTC1_MM = 1739
    9437             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MTC1_MMR6 = 1740
    9438             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MTC2 = 1741
    9439             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTC2_MMR6 = 1742
    9440             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MTGC0 = 1743
    9441             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MTGC0_MM = 1744
    9442             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTHC0_MMR6 = 1745
    9443             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTHC1_D32 = 1746
    9444             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // MTHC1_D32_MM = 1747
    9445             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTHC1_D64 = 1748
    9446             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MTHC1_D64_MM = 1749
    9447             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTHC2_MMR6 = 1750
    9448             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MTHGC0 = 1751
    9449             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MTHGC0_MM = 1752
    9450             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTHI = 1753
    9451             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTHI64 = 1754
    9452             :     Feature_HasDSP | 0, // MTHI_DSP = 1755
    9453             :     Feature_HasDSP | Feature_InMicroMips | 0, // MTHI_DSP_MM = 1756
    9454             :     Feature_InMicroMips | 0, // MTHI_MM = 1757
    9455             :     Feature_HasDSP | 0, // MTHLIP = 1758
    9456             :     Feature_HasDSP | Feature_InMicroMips | 0, // MTHLIP_MM = 1759
    9457             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTLO = 1760
    9458             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTLO64 = 1761
    9459             :     Feature_HasDSP | 0, // MTLO_DSP = 1762
    9460             :     Feature_HasDSP | Feature_InMicroMips | 0, // MTLO_DSP_MM = 1763
    9461             :     Feature_InMicroMips | 0, // MTLO_MM = 1764
    9462             :     Feature_HasCnMips | 0, // MTM0 = 1765
    9463             :     Feature_HasCnMips | 0, // MTM1 = 1766
    9464             :     Feature_HasCnMips | 0, // MTM2 = 1767
    9465             :     Feature_HasCnMips | 0, // MTP0 = 1768
    9466             :     Feature_HasCnMips | 0, // MTP1 = 1769
    9467             :     Feature_HasCnMips | 0, // MTP2 = 1770
    9468             :     Feature_HasMT | 0, // MTTACX = 1771
    9469             :     Feature_HasMT | 0, // MTTC0 = 1772
    9470             :     Feature_HasMT | 0, // MTTC1 = 1773
    9471             :     Feature_HasMT | 0, // MTTDSP = 1774
    9472             :     Feature_HasMT | 0, // MTTGPR = 1775
    9473             :     Feature_HasMT | 0, // MTTHC1 = 1776
    9474             :     Feature_HasMT | 0, // MTTHI = 1777
    9475             :     Feature_HasMT | 0, // MTTLO = 1778
    9476             :     Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // MTTR = 1779
    9477             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUH = 1780
    9478             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUHU = 1781
    9479             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUHU_MMR6 = 1782
    9480             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUH_MMR6 = 1783
    9481             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MUL = 1784
    9482             :     Feature_HasDSP | 0, // MULEQ_S_W_PHL = 1785
    9483             :     Feature_HasDSP | Feature_InMicroMips | 0, // MULEQ_S_W_PHL_MM = 1786
    9484             :     Feature_HasDSP | 0, // MULEQ_S_W_PHR = 1787
    9485             :     Feature_HasDSP | Feature_InMicroMips | 0, // MULEQ_S_W_PHR_MM = 1788
    9486             :     Feature_HasDSP | 0, // MULEU_S_PH_QBL = 1789
    9487             :     Feature_HasDSP | Feature_InMicroMips | 0, // MULEU_S_PH_QBL_MM = 1790
    9488             :     Feature_HasDSP | 0, // MULEU_S_PH_QBR = 1791
    9489             :     Feature_HasDSP | Feature_InMicroMips | 0, // MULEU_S_PH_QBR_MM = 1792
    9490             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULImmMacro = 1793
    9491             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULOMacro = 1794
    9492             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULOUMacro = 1795
    9493             :     Feature_HasDSP | 0, // MULQ_RS_PH = 1796
    9494             :     Feature_HasDSP | Feature_InMicroMips | 0, // MULQ_RS_PH_MM = 1797
    9495             :     Feature_HasDSPR2 | 0, // MULQ_RS_W = 1798
    9496             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // MULQ_RS_W_MMR2 = 1799
    9497             :     Feature_HasDSPR2 | 0, // MULQ_S_PH = 1800
    9498             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // MULQ_S_PH_MMR2 = 1801
    9499             :     Feature_HasDSPR2 | 0, // MULQ_S_W = 1802
    9500             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // MULQ_S_W_MMR2 = 1803
    9501             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MULR_Q_H = 1804
    9502             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MULR_Q_W = 1805
    9503             :     Feature_HasDSP | 0, // MULSAQ_S_W_PH = 1806
    9504             :     Feature_HasDSP | Feature_InMicroMips | 0, // MULSAQ_S_W_PH_MM = 1807
    9505             :     Feature_HasDSPR2 | 0, // MULSA_W_PH = 1808
    9506             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // MULSA_W_PH_MMR2 = 1809
    9507             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULT = 1810
    9508             :     Feature_HasDSP | 0, // MULTU_DSP = 1811
    9509             :     Feature_HasDSP | Feature_InMicroMips | 0, // MULTU_DSP_MM = 1812
    9510             :     Feature_HasDSP | 0, // MULT_DSP = 1813
    9511             :     Feature_HasDSP | Feature_InMicroMips | 0, // MULT_DSP_MM = 1814
    9512             :     Feature_InMicroMips | 0, // MULT_MM = 1815
    9513             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULTu = 1816
    9514             :     Feature_InMicroMips | 0, // MULTu_MM = 1817
    9515             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MULU = 1818
    9516             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MULU_MMR6 = 1819
    9517             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_B = 1820
    9518             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_D = 1821
    9519             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_H = 1822
    9520             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_W = 1823
    9521             :     Feature_InMicroMips | 0, // MUL_MM = 1824
    9522             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUL_MMR6 = 1825
    9523             :     Feature_HasDSPR2 | 0, // MUL_PH = 1826
    9524             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // MUL_PH_MMR2 = 1827
    9525             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MUL_Q_H = 1828
    9526             :     Feature_HasStdEnc | Feature_HasMSA | 0, // MUL_Q_W = 1829
    9527             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUL_R6 = 1830
    9528             :     Feature_HasDSPR2 | 0, // MUL_S_PH = 1831
    9529             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // MUL_S_PH_MMR2 = 1832
    9530             :     Feature_InMips16Mode | 0, // Mfhi16 = 1833
    9531             :     Feature_InMips16Mode | 0, // Mflo16 = 1834
    9532             :     Feature_InMips16Mode | 0, // Move32R16 = 1835
    9533             :     Feature_InMips16Mode | 0, // MoveR3216 = 1836
    9534             :     Feature_InMips16Mode | 0, // MultRxRy16 = 1837
    9535             :     Feature_InMips16Mode | 0, // MultRxRyRz16 = 1838
    9536             :     Feature_InMips16Mode | 0, // MultuRxRy16 = 1839
    9537             :     Feature_InMips16Mode | 0, // MultuRxRyRz16 = 1840
    9538             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_B = 1841
    9539             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_D = 1842
    9540             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_H = 1843
    9541             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_W = 1844
    9542             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_B = 1845
    9543             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_D = 1846
    9544             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_H = 1847
    9545             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_W = 1848
    9546             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_D32 = 1849
    9547             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMADD_D32_MM = 1850
    9548             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_D64 = 1851
    9549             :     Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_S = 1852
    9550             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMADD_S_MM = 1853
    9551             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_D32 = 1854
    9552             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMSUB_D32_MM = 1855
    9553             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_D64 = 1856
    9554             :     Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_S = 1857
    9555             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMSUB_S_MM = 1858
    9556             :     Feature_HasStdEnc | 0, // NOP = 1859
    9557             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // NOR = 1860
    9558             :     Feature_HasStdEnc | 0, // NOR64 = 1861
    9559             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NORI_B = 1862
    9560             :     Feature_IsGP32bit | 0, // NORImm = 1863
    9561             :     Feature_IsGP64bit | 0, // NORImm64 = 1864
    9562             :     Feature_InMicroMips | 0, // NOR_MM = 1865
    9563             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // NOR_MMR6 = 1866
    9564             :     Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V = 1867
    9565             :     Feature_HasMSA | 0, // NOR_V_D_PSEUDO = 1868
    9566             :     Feature_HasMSA | 0, // NOR_V_H_PSEUDO = 1869
    9567             :     Feature_HasMSA | 0, // NOR_V_W_PSEUDO = 1870
    9568             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // NOT16_MM = 1871
    9569             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // NOT16_MMR6 = 1872
    9570             :     Feature_InMips16Mode | 0, // NegRxRy16 = 1873
    9571             :     Feature_InMips16Mode | 0, // NotRxRy16 = 1874
    9572             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // OR = 1875
    9573             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // OR16_MM = 1876
    9574             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // OR16_MMR6 = 1877
    9575             :     Feature_HasStdEnc | 0, // OR64 = 1878
    9576             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ORI_B = 1879
    9577             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // ORI_MMR6 = 1880
    9578             :     Feature_InMicroMips | 0, // OR_MM = 1881
    9579             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // OR_MMR6 = 1882
    9580             :     Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V = 1883
    9581             :     Feature_HasMSA | 0, // OR_V_D_PSEUDO = 1884
    9582             :     Feature_HasMSA | 0, // OR_V_H_PSEUDO = 1885
    9583             :     Feature_HasMSA | 0, // OR_V_W_PSEUDO = 1886
    9584             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ORi = 1887
    9585             :     Feature_HasStdEnc | 0, // ORi64 = 1888
    9586             :     Feature_InMicroMips | 0, // ORi_MM = 1889
    9587             :     Feature_InMips16Mode | 0, // OrRxRxRy16 = 1890
    9588             :     Feature_HasDSP | 0, // PACKRL_PH = 1891
    9589             :     Feature_HasDSP | Feature_InMicroMips | 0, // PACKRL_PH_MM = 1892
    9590             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // PAUSE = 1893
    9591             :     Feature_InMicroMips | 0, // PAUSE_MM = 1894
    9592             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // PAUSE_MMR6 = 1895
    9593             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_B = 1896
    9594             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_D = 1897
    9595             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_H = 1898
    9596             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_W = 1899
    9597             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_B = 1900
    9598             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_D = 1901
    9599             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_H = 1902
    9600             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_W = 1903
    9601             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_B = 1904
    9602             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_D = 1905
    9603             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_H = 1906
    9604             :     Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_W = 1907
    9605             :     Feature_HasDSP | 0, // PICK_PH = 1908
    9606             :     Feature_HasDSP | Feature_InMicroMips | 0, // PICK_PH_MM = 1909
    9607             :     Feature_HasDSP | 0, // PICK_QB = 1910
    9608             :     Feature_HasDSP | Feature_InMicroMips | 0, // PICK_QB_MM = 1911
    9609             :     Feature_HasCnMips | 0, // POP = 1912
    9610             :     Feature_HasDSP | 0, // PRECEQU_PH_QBL = 1913
    9611             :     Feature_HasDSP | 0, // PRECEQU_PH_QBLA = 1914
    9612             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEQU_PH_QBLA_MM = 1915
    9613             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEQU_PH_QBL_MM = 1916
    9614             :     Feature_HasDSP | 0, // PRECEQU_PH_QBR = 1917
    9615             :     Feature_HasDSP | 0, // PRECEQU_PH_QBRA = 1918
    9616             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEQU_PH_QBRA_MM = 1919
    9617             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEQU_PH_QBR_MM = 1920
    9618             :     Feature_HasDSP | 0, // PRECEQ_W_PHL = 1921
    9619             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEQ_W_PHL_MM = 1922
    9620             :     Feature_HasDSP | 0, // PRECEQ_W_PHR = 1923
    9621             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEQ_W_PHR_MM = 1924
    9622             :     Feature_HasDSP | 0, // PRECEU_PH_QBL = 1925
    9623             :     Feature_HasDSP | 0, // PRECEU_PH_QBLA = 1926
    9624             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEU_PH_QBLA_MM = 1927
    9625             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEU_PH_QBL_MM = 1928
    9626             :     Feature_HasDSP | 0, // PRECEU_PH_QBR = 1929
    9627             :     Feature_HasDSP | 0, // PRECEU_PH_QBRA = 1930
    9628             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEU_PH_QBRA_MM = 1931
    9629             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECEU_PH_QBR_MM = 1932
    9630             :     Feature_HasDSP | 0, // PRECRQU_S_QB_PH = 1933
    9631             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECRQU_S_QB_PH_MM = 1934
    9632             :     Feature_HasDSP | 0, // PRECRQ_PH_W = 1935
    9633             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECRQ_PH_W_MM = 1936
    9634             :     Feature_HasDSP | 0, // PRECRQ_QB_PH = 1937
    9635             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECRQ_QB_PH_MM = 1938
    9636             :     Feature_HasDSP | 0, // PRECRQ_RS_PH_W = 1939
    9637             :     Feature_HasDSP | Feature_InMicroMips | 0, // PRECRQ_RS_PH_W_MM = 1940
    9638             :     Feature_HasDSPR2 | 0, // PRECR_QB_PH = 1941
    9639             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // PRECR_QB_PH_MMR2 = 1942
    9640             :     Feature_HasDSPR2 | 0, // PRECR_SRA_PH_W = 1943
    9641             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // PRECR_SRA_PH_W_MMR2 = 1944
    9642             :     Feature_HasDSPR2 | 0, // PRECR_SRA_R_PH_W = 1945
    9643             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // PRECR_SRA_R_PH_W_MMR2 = 1946
    9644             :     Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PREF = 1947
    9645             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // PREFE = 1948
    9646             :     Feature_InMicroMips | Feature_HasEVA | 0, // PREFE_MM = 1949
    9647             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // PREFX_MM = 1950
    9648             :     Feature_InMicroMips | 0, // PREF_MM = 1951
    9649             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // PREF_MMR6 = 1952
    9650             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // PREF_R6 = 1953
    9651             :     Feature_HasDSPR2 | 0, // PREPEND = 1954
    9652             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // PREPEND_MMR2 = 1955
    9653             :     Feature_HasDSP | 0, // PseudoCMPU_EQ_QB = 1956
    9654             :     Feature_HasDSP | 0, // PseudoCMPU_LE_QB = 1957
    9655             :     Feature_HasDSP | 0, // PseudoCMPU_LT_QB = 1958
    9656             :     Feature_HasDSP | 0, // PseudoCMP_EQ_PH = 1959
    9657             :     Feature_HasDSP | 0, // PseudoCMP_LE_PH = 1960
    9658             :     Feature_HasDSP | 0, // PseudoCMP_LT_PH = 1961
    9659             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // PseudoCVT_D32_W = 1962
    9660             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // PseudoCVT_D64_L = 1963
    9661             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // PseudoCVT_D64_W = 1964
    9662             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // PseudoCVT_S_L = 1965
    9663             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // PseudoCVT_S_W = 1966
    9664             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDMULT = 1967
    9665             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDMULTu = 1968
    9666             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDSDIV = 1969
    9667             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDUDIV = 1970
    9668             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch = 1971
    9669             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch64 = 1972
    9670             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch64R6 = 1973
    9671             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranchR6 = 1974
    9672             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoIndirectBranch_MM = 1975
    9673             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // PseudoIndirectBranch_MMR6 = 1976
    9674             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndirectHazardBranch = 1977
    9675             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndirectHazardBranch64 = 1978
    9676             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndrectHazardBranch64R6 = 1979
    9677             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndrectHazardBranchR6 = 1980
    9678             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMADD = 1981
    9679             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMADDU = 1982
    9680             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFHI = 1983
    9681             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFHI64 = 1984
    9682             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFLO = 1985
    9683             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFLO64 = 1986
    9684             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMSUB = 1987
    9685             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMSUBU = 1988
    9686             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMTLOHI = 1989
    9687             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMTLOHI64 = 1990
    9688             :     Feature_HasStdEnc | 0, // PseudoMTLOHI_DSP = 1991
    9689             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMULT = 1992
    9690             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMULTu = 1993
    9691             :     Feature_HasDSP | 0, // PseudoPICK_PH = 1994
    9692             :     Feature_HasDSP | 0, // PseudoPICK_QB = 1995
    9693             :     0, // PseudoReturn = 1996
    9694             :     0, // PseudoReturn64 = 1997
    9695             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PseudoSDIV = 1998
    9696             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_D32 = 1999
    9697             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_D64 = 2000
    9698             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_I = 2001
    9699             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_I64 = 2002
    9700             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_S = 2003
    9701             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_D32 = 2004
    9702             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_D64 = 2005
    9703             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_I = 2006
    9704             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_I64 = 2007
    9705             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_S = 2008
    9706             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECT_D32 = 2009
    9707             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECT_D64 = 2010
    9708             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_I = 2011
    9709             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_I64 = 2012
    9710             :     Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_S = 2013
    9711             :     Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // PseudoTRUNC_W_D = 2014
    9712             :     Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // PseudoTRUNC_W_D32 = 2015
    9713             :     0, // PseudoTRUNC_W_S = 2016
    9714             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PseudoUDIV = 2017
    9715             :     Feature_HasDSP | 0, // RADDU_W_QB = 2018
    9716             :     Feature_HasDSP | Feature_InMicroMips | 0, // RADDU_W_QB_MM = 2019
    9717             :     Feature_HasDSP | 0, // RDDSP = 2020
    9718             :     Feature_HasDSP | Feature_InMicroMips | 0, // RDDSP_MM = 2021
    9719             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // RDHWR = 2022
    9720             :     Feature_HasStdEnc | 0, // RDHWR64 = 2023
    9721             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // RDHWR_MM = 2024
    9722             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // RDHWR_MMR6 = 2025
    9723             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // RDPGPR_MMR6 = 2026
    9724             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_D32 = 2027
    9725             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // RECIP_D32_MM = 2028
    9726             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_D64 = 2029
    9727             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // RECIP_D64_MM = 2030
    9728             :     Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_S = 2031
    9729             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // RECIP_S_MM = 2032
    9730             :     Feature_HasDSP | 0, // REPLV_PH = 2033
    9731             :     Feature_HasDSP | Feature_InMicroMips | 0, // REPLV_PH_MM = 2034
    9732             :     Feature_HasDSP | 0, // REPLV_QB = 2035
    9733             :     Feature_HasDSP | Feature_InMicroMips | 0, // REPLV_QB_MM = 2036
    9734             :     Feature_HasDSP | 0, // REPL_PH = 2037
    9735             :     Feature_HasDSP | Feature_InMicroMips | 0, // REPL_PH_MM = 2038
    9736             :     Feature_HasDSP | 0, // REPL_QB = 2039
    9737             :     Feature_HasDSP | Feature_InMicroMips | 0, // REPL_QB_MM = 2040
    9738             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RINT_D = 2041
    9739             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // RINT_D_MMR6 = 2042
    9740             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RINT_S = 2043
    9741             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // RINT_S_MMR6 = 2044
    9742             :     0, // ROL = 2045
    9743             :     0, // ROLImm = 2046
    9744             :     0, // ROR = 2047
    9745             :     0, // RORImm = 2048
    9746             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // ROTR = 2049
    9747             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // ROTRV = 2050
    9748             :     Feature_InMicroMips | 0, // ROTRV_MM = 2051
    9749             :     Feature_InMicroMips | 0, // ROTR_MM = 2052
    9750             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_L_D64 = 2053
    9751             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_L_D_MMR6 = 2054
    9752             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_L_S = 2055
    9753             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_L_S_MMR6 = 2056
    9754             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_D32 = 2057
    9755             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_D64 = 2058
    9756             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_W_D_MMR6 = 2059
    9757             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // ROUND_W_MM = 2060
    9758             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_S = 2061
    9759             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // ROUND_W_S_MM = 2062
    9760             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_W_S_MMR6 = 2063
    9761             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_D32 = 2064
    9762             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // RSQRT_D32_MM = 2065
    9763             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_D64 = 2066
    9764             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // RSQRT_D64_MM = 2067
    9765             :     Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_S = 2068
    9766             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // RSQRT_S_MM = 2069
    9767             :     Feature_InMips16Mode | 0, // Restore16 = 2070
    9768             :     Feature_InMips16Mode | 0, // RestoreX16 = 2071
    9769             :     Feature_HasStdEnc | 0, // RetRA = 2072
    9770             :     Feature_InMips16Mode | 0, // RetRA16 = 2073
    9771             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_B = 2074
    9772             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_D = 2075
    9773             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_H = 2076
    9774             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_W = 2077
    9775             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_B = 2078
    9776             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_D = 2079
    9777             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_H = 2080
    9778             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_W = 2081
    9779             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SB = 2082
    9780             :     Feature_InMicroMips | 0, // SB16_MM = 2083
    9781             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SB16_MMR6 = 2084
    9782             :     Feature_HasStdEnc | 0, // SB64 = 2085
    9783             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SBE = 2086
    9784             :     Feature_InMicroMips | Feature_HasEVA | 0, // SBE_MM = 2087
    9785             :     Feature_InMicroMips | 0, // SB_MM = 2088
    9786             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SB_MMR6 = 2089
    9787             :     Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SC = 2090
    9788             :     Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SC64 = 2091
    9789             :     Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // SC64_R6 = 2092
    9790             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SCD = 2093
    9791             :     Feature_HasStdEnc | Feature_HasMips32r6 | 0, // SCD_R6 = 2094
    9792             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SCE = 2095
    9793             :     Feature_InMicroMips | Feature_HasEVA | 0, // SCE_MM = 2096
    9794             :     Feature_InMicroMips | 0, // SC_MM = 2097
    9795             :     Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SC_R6 = 2098
    9796             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // SD = 2099
    9797             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDBBP = 2100
    9798             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // SDBBP16_MM = 2101
    9799             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDBBP16_MMR6 = 2102
    9800             :     Feature_InMicroMips | 0, // SDBBP_MM = 2103
    9801             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDBBP_MMR6 = 2104
    9802             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SDBBP_R6 = 2105
    9803             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDC1 = 2106
    9804             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDC164 = 2107
    9805             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // SDC1_D64_MMR6 = 2108
    9806             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // SDC1_MM = 2109
    9807             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDC2 = 2110
    9808             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDC2_MMR6 = 2111
    9809             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SDC2_R6 = 2112
    9810             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // SDC3 = 2113
    9811             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDIV = 2114
    9812             :     Feature_InMicroMips | 0, // SDIV_MM = 2115
    9813             :     Feature_InMicroMips | 0, // SDIV_MM_Pseudo = 2116
    9814             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDL = 2117
    9815             :     Feature_HasStdEnc | Feature_NotMips3 | 0, // SDMacro = 2118
    9816             :     Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDR = 2119
    9817             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDXC1 = 2120
    9818             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // SDXC164 = 2121
    9819             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDivIMacro = 2122
    9820             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDivMacro = 2123
    9821             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SEB = 2124
    9822             :     Feature_HasStdEnc | Feature_HasMips32r2 | 0, // SEB64 = 2125
    9823             :     Feature_InMicroMips | 0, // SEB_MM = 2126
    9824             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SEH = 2127
    9825             :     Feature_HasStdEnc | Feature_HasMips32r2 | 0, // SEH64 = 2128
    9826             :     Feature_InMicroMips | 0, // SEH_MM = 2129
    9827             :     Feature_HasStdEnc | Feature_IsGP32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SELEQZ = 2130
    9828             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips32r6 | 0, // SELEQZ64 = 2131
    9829             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELEQZ_D = 2132
    9830             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_D_MMR6 = 2133
    9831             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_MMR6 = 2134
    9832             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELEQZ_S = 2135
    9833             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_S_MMR6 = 2136
    9834             :     Feature_HasStdEnc | Feature_IsGP32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SELNEZ = 2137
    9835             :     Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips32r6 | 0, // SELNEZ64 = 2138
    9836             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELNEZ_D = 2139
    9837             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_D_MMR6 = 2140
    9838             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_MMR6 = 2141
    9839             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELNEZ_S = 2142
    9840             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_S_MMR6 = 2143
    9841             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SEL_D = 2144
    9842             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SEL_D_MMR6 = 2145
    9843             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SEL_S = 2146
    9844             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SEL_S_MMR6 = 2147
    9845             :     Feature_HasCnMips | 0, // SEQ = 2148
    9846             :     Feature_NotCnMips | 0, // SEQIMacro = 2149
    9847             :     Feature_NotCnMips | 0, // SEQMacro = 2150
    9848             :     Feature_HasCnMips | 0, // SEQi = 2151
    9849             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SH = 2152
    9850             :     Feature_InMicroMips | 0, // SH16_MM = 2153
    9851             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SH16_MMR6 = 2154
    9852             :     Feature_HasStdEnc | 0, // SH64 = 2155
    9853             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SHE = 2156
    9854             :     Feature_InMicroMips | Feature_HasEVA | 0, // SHE_MM = 2157
    9855             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_B = 2158
    9856             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_H = 2159
    9857             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_W = 2160
    9858             :     Feature_HasDSP | 0, // SHILO = 2161
    9859             :     Feature_HasDSP | 0, // SHILOV = 2162
    9860             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHILOV_MM = 2163
    9861             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHILO_MM = 2164
    9862             :     Feature_HasDSP | 0, // SHLLV_PH = 2165
    9863             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHLLV_PH_MM = 2166
    9864             :     Feature_HasDSP | 0, // SHLLV_QB = 2167
    9865             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHLLV_QB_MM = 2168
    9866             :     Feature_HasDSP | 0, // SHLLV_S_PH = 2169
    9867             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHLLV_S_PH_MM = 2170
    9868             :     Feature_HasDSP | 0, // SHLLV_S_W = 2171
    9869             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHLLV_S_W_MM = 2172
    9870             :     Feature_HasDSP | 0, // SHLL_PH = 2173
    9871             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHLL_PH_MM = 2174
    9872             :     Feature_HasDSP | 0, // SHLL_QB = 2175
    9873             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHLL_QB_MM = 2176
    9874             :     Feature_HasDSP | 0, // SHLL_S_PH = 2177
    9875             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHLL_S_PH_MM = 2178
    9876             :     Feature_HasDSP | 0, // SHLL_S_W = 2179
    9877             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHLL_S_W_MM = 2180
    9878             :     Feature_HasDSP | 0, // SHRAV_PH = 2181
    9879             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHRAV_PH_MM = 2182
    9880             :     Feature_HasDSPR2 | 0, // SHRAV_QB = 2183
    9881             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SHRAV_QB_MMR2 = 2184
    9882             :     Feature_HasDSP | 0, // SHRAV_R_PH = 2185
    9883             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHRAV_R_PH_MM = 2186
    9884             :     Feature_HasDSPR2 | 0, // SHRAV_R_QB = 2187
    9885             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SHRAV_R_QB_MMR2 = 2188
    9886             :     Feature_HasDSP | 0, // SHRAV_R_W = 2189
    9887             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHRAV_R_W_MM = 2190
    9888             :     Feature_HasDSP | 0, // SHRA_PH = 2191
    9889             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHRA_PH_MM = 2192
    9890             :     Feature_HasDSPR2 | 0, // SHRA_QB = 2193
    9891             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SHRA_QB_MMR2 = 2194
    9892             :     Feature_HasDSP | 0, // SHRA_R_PH = 2195
    9893             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHRA_R_PH_MM = 2196
    9894             :     Feature_HasDSPR2 | 0, // SHRA_R_QB = 2197
    9895             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SHRA_R_QB_MMR2 = 2198
    9896             :     Feature_HasDSP | 0, // SHRA_R_W = 2199
    9897             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHRA_R_W_MM = 2200
    9898             :     Feature_HasDSPR2 | 0, // SHRLV_PH = 2201
    9899             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SHRLV_PH_MMR2 = 2202
    9900             :     Feature_HasDSP | 0, // SHRLV_QB = 2203
    9901             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHRLV_QB_MM = 2204
    9902             :     Feature_HasDSPR2 | 0, // SHRL_PH = 2205
    9903             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SHRL_PH_MMR2 = 2206
    9904             :     Feature_HasDSP | 0, // SHRL_QB = 2207
    9905             :     Feature_HasDSP | Feature_InMicroMips | 0, // SHRL_QB_MM = 2208
    9906             :     Feature_InMicroMips | 0, // SH_MM = 2209
    9907             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SH_MMR6 = 2210
    9908             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_B = 2211
    9909             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_D = 2212
    9910             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_H = 2213
    9911             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_W = 2214
    9912             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_B = 2215
    9913             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_D = 2216
    9914             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_H = 2217
    9915             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_W = 2218
    9916             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLL = 2219
    9917             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // SLL16_MM = 2220
    9918             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SLL16_MMR6 = 2221
    9919             :     Feature_HasStdEnc | 0, // SLL64_32 = 2222
    9920             :     Feature_HasStdEnc | 0, // SLL64_64 = 2223
    9921             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_B = 2224
    9922             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_D = 2225
    9923             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_H = 2226
    9924             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_W = 2227
    9925             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLLV = 2228
    9926             :     Feature_InMicroMips | 0, // SLLV_MM = 2229
    9927             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_B = 2230
    9928             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_D = 2231
    9929             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_H = 2232
    9930             :     Feature_InMicroMips | 0, // SLL_MM = 2233
    9931             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SLL_MMR6 = 2234
    9932             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_W = 2235
    9933             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLT = 2236
    9934             :     Feature_HasStdEnc | 0, // SLT64 = 2237
    9935             :     Feature_IsGP64bit | 0, // SLTImm64 = 2238
    9936             :     Feature_IsGP64bit | 0, // SLTUImm64 = 2239
    9937             :     Feature_InMicroMips | 0, // SLT_MM = 2240
    9938             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTi = 2241
    9939             :     Feature_HasStdEnc | 0, // SLTi64 = 2242
    9940             :     Feature_InMicroMips | 0, // SLTi_MM = 2243
    9941             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTiu = 2244
    9942             :     Feature_HasStdEnc | 0, // SLTiu64 = 2245
    9943             :     Feature_InMicroMips | 0, // SLTiu_MM = 2246
    9944             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTu = 2247
    9945             :     Feature_HasStdEnc | 0, // SLTu64 = 2248
    9946             :     Feature_InMicroMips | 0, // SLTu_MM = 2249
    9947             :     Feature_HasCnMips | 0, // SNE = 2250
    9948             :     Feature_HasCnMips | 0, // SNEi = 2251
    9949             :     0, // SNZ_B_PSEUDO = 2252
    9950             :     0, // SNZ_D_PSEUDO = 2253
    9951             :     0, // SNZ_H_PSEUDO = 2254
    9952             :     0, // SNZ_V_PSEUDO = 2255
    9953             :     0, // SNZ_W_PSEUDO = 2256
    9954             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_B = 2257
    9955             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_D = 2258
    9956             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_H = 2259
    9957             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_W = 2260
    9958             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_B = 2261
    9959             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_D = 2262
    9960             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_H = 2263
    9961             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_W = 2264
    9962             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRA = 2265
    9963             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_B = 2266
    9964             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_D = 2267
    9965             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_H = 2268
    9966             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_W = 2269
    9967             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_B = 2270
    9968             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_D = 2271
    9969             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_H = 2272
    9970             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_W = 2273
    9971             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_B = 2274
    9972             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_D = 2275
    9973             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_H = 2276
    9974             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_W = 2277
    9975             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRAV = 2278
    9976             :     Feature_InMicroMips | 0, // SRAV_MM = 2279
    9977             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_B = 2280
    9978             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_D = 2281
    9979             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_H = 2282
    9980             :     Feature_InMicroMips | 0, // SRA_MM = 2283
    9981             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_W = 2284
    9982             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRL = 2285
    9983             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // SRL16_MM = 2286
    9984             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SRL16_MMR6 = 2287
    9985             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_B = 2288
    9986             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_D = 2289
    9987             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_H = 2290
    9988             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_W = 2291
    9989             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_B = 2292
    9990             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_D = 2293
    9991             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_H = 2294
    9992             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_W = 2295
    9993             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_B = 2296
    9994             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_D = 2297
    9995             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_H = 2298
    9996             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_W = 2299
    9997             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRLV = 2300
    9998             :     Feature_InMicroMips | 0, // SRLV_MM = 2301
    9999             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_B = 2302
   10000             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_D = 2303
   10001             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_H = 2304
   10002             :     Feature_InMicroMips | 0, // SRL_MM = 2305
   10003             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_W = 2306
   10004             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SSNOP = 2307
   10005             :     Feature_InMicroMips | 0, // SSNOP_MM = 2308
   10006             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SSNOP_MMR6 = 2309
   10007             :     Feature_HasStdEnc | 0, // STORE_ACC128 = 2310
   10008             :     Feature_HasStdEnc | 0, // STORE_ACC64 = 2311
   10009             :     Feature_HasStdEnc | 0, // STORE_ACC64DSP = 2312
   10010             :     Feature_HasStdEnc | 0, // STORE_CCOND_DSP = 2313
   10011             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ST_B = 2314
   10012             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ST_D = 2315
   10013             :     Feature_HasMSA | 0, // ST_F16 = 2316
   10014             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ST_H = 2317
   10015             :     Feature_HasStdEnc | Feature_HasMSA | 0, // ST_W = 2318
   10016             :     Feature_HasStdEnc | 0, // SUB = 2319
   10017             :     Feature_HasDSPR2 | 0, // SUBQH_PH = 2320
   10018             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SUBQH_PH_MMR2 = 2321
   10019             :     Feature_HasDSPR2 | 0, // SUBQH_R_PH = 2322
   10020             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SUBQH_R_PH_MMR2 = 2323
   10021             :     Feature_HasDSPR2 | 0, // SUBQH_R_W = 2324
   10022             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SUBQH_R_W_MMR2 = 2325
   10023             :     Feature_HasDSPR2 | 0, // SUBQH_W = 2326
   10024             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SUBQH_W_MMR2 = 2327
   10025             :     Feature_HasDSP | 0, // SUBQ_PH = 2328
   10026             :     Feature_HasDSP | Feature_InMicroMips | 0, // SUBQ_PH_MM = 2329
   10027             :     Feature_HasDSP | 0, // SUBQ_S_PH = 2330
   10028             :     Feature_HasDSP | Feature_InMicroMips | 0, // SUBQ_S_PH_MM = 2331
   10029             :     Feature_HasDSP | 0, // SUBQ_S_W = 2332
   10030             :     Feature_HasDSP | Feature_InMicroMips | 0, // SUBQ_S_W_MM = 2333
   10031             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_B = 2334
   10032             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_D = 2335
   10033             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_H = 2336
   10034             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_W = 2337
   10035             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_B = 2338
   10036             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_D = 2339
   10037             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_H = 2340
   10038             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_W = 2341
   10039             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_B = 2342
   10040             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_D = 2343
   10041             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_H = 2344
   10042             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_W = 2345
   10043             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_B = 2346
   10044             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_D = 2347
   10045             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_H = 2348
   10046             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_W = 2349
   10047             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUBU16_MM = 2350
   10048             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUBU16_MMR6 = 2351
   10049             :     Feature_HasDSPR2 | 0, // SUBUH_QB = 2352
   10050             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SUBUH_QB_MMR2 = 2353
   10051             :     Feature_HasDSPR2 | 0, // SUBUH_R_QB = 2354
   10052             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SUBUH_R_QB_MMR2 = 2355
   10053             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUBU_MMR6 = 2356
   10054             :     Feature_HasDSPR2 | 0, // SUBU_PH = 2357
   10055             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SUBU_PH_MMR2 = 2358
   10056             :     Feature_HasDSP | 0, // SUBU_QB = 2359
   10057             :     Feature_HasDSP | Feature_InMicroMips | 0, // SUBU_QB_MM = 2360
   10058             :     Feature_HasDSPR2 | 0, // SUBU_S_PH = 2361
   10059             :     Feature_HasDSPR2 | Feature_InMicroMips | 0, // SUBU_S_PH_MMR2 = 2362
   10060             :     Feature_HasDSP | 0, // SUBU_S_QB = 2363
   10061             :     Feature_HasDSP | Feature_InMicroMips | 0, // SUBU_S_QB_MM = 2364
   10062             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_B = 2365
   10063             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_D = 2366
   10064             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_H = 2367
   10065             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_W = 2368
   10066             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_B = 2369
   10067             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_D = 2370
   10068             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_H = 2371
   10069             :     Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_W = 2372
   10070             :     Feature_InMicroMips | 0, // SUB_MM = 2373
   10071             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUB_MMR6 = 2374
   10072             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SUBu = 2375
   10073             :     Feature_InMicroMips | 0, // SUBu_MM = 2376
   10074             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SUXC1 = 2377
   10075             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SUXC164 = 2378
   10076             :     Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // SUXC1_MM = 2379
   10077             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SW = 2380
   10078             :     Feature_InMicroMips | 0, // SW16_MM = 2381
   10079             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SW16_MMR6 = 2382
   10080             :     Feature_HasStdEnc | 0, // SW64 = 2383
   10081             :     Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SWC1 = 2384
   10082             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // SWC1_MM = 2385
   10083             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWC2 = 2386
   10084             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWC2_MMR6 = 2387
   10085             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SWC2_R6 = 2388
   10086             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // SWC3 = 2389
   10087             :     Feature_HasStdEnc | Feature_HasDSP | 0, // SWDSP = 2390
   10088             :     Feature_HasStdEnc | Feature_HasDSP | Feature_InMicroMips | 0, // SWDSP_MM = 2391
   10089             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWE = 2392
   10090             :     Feature_InMicroMips | Feature_HasEVA | 0, // SWE_MM = 2393
   10091             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWL = 2394
   10092             :     Feature_HasStdEnc | 0, // SWL64 = 2395
   10093             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWLE = 2396
   10094             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // SWLE_MM = 2397
   10095             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWL_MM = 2398
   10096             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWM16_MM = 2399
   10097             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWM16_MMR6 = 2400
   10098             :     Feature_InMicroMips | 0, // SWM32_MM = 2401
   10099             :     Feature_InMicroMips | 0, // SWM_MM = 2402
   10100             :     Feature_InMicroMips | 0, // SWP_MM = 2403
   10101             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWP_MMR6 = 2404
   10102             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWR = 2405
   10103             :     Feature_HasStdEnc | 0, // SWR64 = 2406
   10104             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWRE = 2407
   10105             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // SWRE_MM = 2408
   10106             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWR_MM = 2409
   10107             :     Feature_InMicroMips | 0, // SWSP_MM = 2410
   10108             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWSP_MMR6 = 2411
   10109             :     Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // SWXC1 = 2412
   10110             :     Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // SWXC1_MM = 2413
   10111             :     Feature_InMicroMips | 0, // SW_MM = 2414
   10112             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SW_MMR6 = 2415
   10113             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // SYNC = 2416
   10114             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SYNCI = 2417
   10115             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // SYNCI_MM = 2418
   10116             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SYNCI_MMR6 = 2419
   10117             :     Feature_InMicroMips | 0, // SYNC_MM = 2420
   10118             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // SYNC_MMR6 = 2421
   10119             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SYSCALL = 2422
   10120             :     Feature_InMicroMips | 0, // SYSCALL_MM = 2423
   10121             :     0, // SZ_B_PSEUDO = 2424
   10122             :     0, // SZ_D_PSEUDO = 2425
   10123             :     0, // SZ_H_PSEUDO = 2426
   10124             :     0, // SZ_V_PSEUDO = 2427
   10125             :     0, // SZ_W_PSEUDO = 2428
   10126             :     Feature_InMips16Mode | 0, // Save16 = 2429
   10127             :     Feature_InMips16Mode | 0, // SaveX16 = 2430
   10128             :     Feature_InMips16Mode | 0, // SbRxRyOffMemX16 = 2431
   10129             :     Feature_InMips16Mode | 0, // SebRx16 = 2432
   10130             :     Feature_InMips16Mode | 0, // SehRx16 = 2433
   10131             :     Feature_InMips16Mode | 0, // SelBeqZ = 2434
   10132             :     Feature_InMips16Mode | 0, // SelBneZ = 2435
   10133             :     Feature_InMips16Mode | 0, // SelTBteqZCmp = 2436
   10134             :     Feature_InMips16Mode | 0, // SelTBteqZCmpi = 2437
   10135             :     Feature_InMips16Mode | 0, // SelTBteqZSlt = 2438
   10136             :     Feature_InMips16Mode | 0, // SelTBteqZSlti = 2439
   10137             :     Feature_InMips16Mode | 0, // SelTBteqZSltiu = 2440
   10138             :     Feature_InMips16Mode | 0, // SelTBteqZSltu = 2441
   10139             :     Feature_InMips16Mode | 0, // SelTBtneZCmp = 2442
   10140             :     Feature_InMips16Mode | 0, // SelTBtneZCmpi = 2443
   10141             :     Feature_InMips16Mode | 0, // SelTBtneZSlt = 2444
   10142             :     Feature_InMips16Mode | 0, // SelTBtneZSlti = 2445
   10143             :     Feature_InMips16Mode | 0, // SelTBtneZSltiu = 2446
   10144             :     Feature_InMips16Mode | 0, // SelTBtneZSltu = 2447
   10145             :     Feature_InMips16Mode | 0, // ShRxRyOffMemX16 = 2448
   10146             :     Feature_InMips16Mode | 0, // SllX16 = 2449
   10147             :     Feature_InMips16Mode | 0, // SllvRxRy16 = 2450
   10148             :     Feature_InMips16Mode | 0, // SltCCRxRy16 = 2451
   10149             :     Feature_InMips16Mode | 0, // SltRxRy16 = 2452
   10150             :     Feature_InMips16Mode | 0, // SltiCCRxImmX16 = 2453
   10151             :     Feature_InMips16Mode | 0, // SltiRxImm16 = 2454
   10152             :     Feature_InMips16Mode | 0, // SltiRxImmX16 = 2455
   10153             :     Feature_InMips16Mode | 0, // SltiuCCRxImmX16 = 2456
   10154             :     Feature_InMips16Mode | 0, // SltiuRxImm16 = 2457
   10155             :     Feature_InMips16Mode | 0, // SltiuRxImmX16 = 2458
   10156             :     Feature_InMips16Mode | 0, // SltuCCRxRy16 = 2459
   10157             :     Feature_InMips16Mode | 0, // SltuRxRy16 = 2460
   10158             :     Feature_InMips16Mode | 0, // SltuRxRyRz16 = 2461
   10159             :     Feature_InMips16Mode | 0, // SraX16 = 2462
   10160             :     Feature_InMips16Mode | 0, // SravRxRy16 = 2463
   10161             :     Feature_InMips16Mode | 0, // SrlX16 = 2464
   10162             :     Feature_InMips16Mode | 0, // SrlvRxRy16 = 2465
   10163             :     Feature_InMips16Mode | 0, // SubuRxRyRz16 = 2466
   10164             :     Feature_InMips16Mode | 0, // SwRxRyOffMemX16 = 2467
   10165             :     Feature_InMips16Mode | 0, // SwRxSpImmX16 = 2468
   10166             :     Feature_HasStdEnc | Feature_NotInMips16Mode | Feature_NotInMicroMips | 0, // TAILCALL = 2469
   10167             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALL64R6REG = 2470
   10168             :     Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLHB64R6REG = 2471
   10169             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLHBR6REG = 2472
   10170             :     Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLR6REG = 2473
   10171             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLREG = 2474
   10172             :     Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLREG64 = 2475
   10173             :     Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLREGHB = 2476
   10174             :     Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLREGHB64 = 2477
   10175             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // TAILCALLREG_MM = 2478
   10176             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // TAILCALLREG_MMR6 = 2479
   10177             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // TAILCALL_MM = 2480
   10178             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // TAILCALL_MMR6 = 2481
   10179             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TEQ = 2482
   10180             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TEQI = 2483
   10181             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // TEQI_MM = 2484
   10182             :     Feature_InMicroMips | 0, // TEQ_MM = 2485
   10183             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TGE = 2486
   10184             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TGEI = 2487
   10185             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TGEIU = 2488
   10186             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // TGEIU_MM = 2489
   10187             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // TGEI_MM = 2490
   10188             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TGEU = 2491
   10189             :     Feature_InMicroMips | 0, // TGEU_MM = 2492
   10190             :     Feature_InMicroMips | 0, // TGE_MM = 2493
   10191             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGINV = 2494
   10192             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGINVF = 2495
   10193             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGINVF_MM = 2496
   10194             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGINV_MM = 2497
   10195             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGP = 2498
   10196             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGP_MM = 2499
   10197             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGR = 2500
   10198             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGR_MM = 2501
   10199             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGWI = 2502
   10200             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGWI_MM = 2503
   10201             :     Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGWR = 2504
   10202             :     Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGWR_MM = 2505
   10203             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // TLBINV = 2506
   10204             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // TLBINVF = 2507
   10205             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // TLBINVF_MMR6 = 2508
   10206             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // TLBINV_MMR6 = 2509
   10207             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBP = 2510
   10208             :     Feature_InMicroMips | 0, // TLBP_MM = 2511
   10209             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBR = 2512
   10210             :     Feature_InMicroMips | 0, // TLBR_MM = 2513
   10211             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBWI = 2514
   10212             :     Feature_InMicroMips | 0, // TLBWI_MM = 2515
   10213             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBWR = 2516
   10214             :     Feature_InMicroMips | 0, // TLBWR_MM = 2517
   10215             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TLT = 2518
   10216             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TLTI = 2519
   10217             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // TLTIU_MM = 2520
   10218             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // TLTI_MM = 2521
   10219             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TLTU = 2522
   10220             :     Feature_InMicroMips | 0, // TLTU_MM = 2523
   10221             :     Feature_InMicroMips | 0, // TLT_MM = 2524
   10222             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TNE = 2525
   10223             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TNEI = 2526
   10224             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // TNEI_MM = 2527
   10225             :     Feature_InMicroMips | 0, // TNE_MM = 2528
   10226             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TRAP = 2529
   10227             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_L_D64 = 2530
   10228             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_L_D_MMR6 = 2531
   10229             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_L_S = 2532
   10230             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_L_S_MMR6 = 2533
   10231             :     Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_D32 = 2534
   10232             :     Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_D64 = 2535
   10233             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_W_D_MMR6 = 2536
   10234             :     Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // TRUNC_W_MM = 2537
   10235             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_S = 2538
   10236             :     Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // TRUNC_W_S_MM = 2539
   10237             :     Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_W_S_MMR6 = 2540
   10238             :     Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TTLTIU = 2541
   10239             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // UDIV = 2542
   10240             :     Feature_InMicroMips | 0, // UDIV_MM = 2543
   10241             :     Feature_InMicroMips | 0, // UDIV_MM_Pseudo = 2544
   10242             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDivIMacro = 2545
   10243             :     Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDivMacro = 2546
   10244             :     0, // Ulh = 2547
   10245             :     0, // Ulhu = 2548
   10246             :     0, // Ulw = 2549
   10247             :     0, // Ush = 2550
   10248             :     0, // Usw = 2551
   10249             :     Feature_HasCnMips | 0, // V3MULU = 2552
   10250             :     Feature_HasCnMips | 0, // VMM0 = 2553
   10251             :     Feature_HasCnMips | 0, // VMULU = 2554
   10252             :     Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_B = 2555
   10253             :     Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_D = 2556
   10254             :     Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_H = 2557
   10255             :     Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_W = 2558
   10256             :     Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotInMicroMips | 0, // WAIT = 2559
   10257             :     Feature_InMicroMips | 0, // WAIT_MM = 2560
   10258             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // WAIT_MMR6 = 2561
   10259             :     Feature_HasDSP | Feature_NotInMicroMips | 0, // WRDSP = 2562
   10260             :     Feature_HasDSP | Feature_InMicroMips | 0, // WRDSP_MM = 2563
   10261             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // WRPGPR_MMR6 = 2564
   10262             :     Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // WSBH = 2565
   10263             :     Feature_InMicroMips | 0, // WSBH_MM = 2566
   10264             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // WSBH_MMR6 = 2567
   10265             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // XOR = 2568
   10266             :     Feature_InMicroMips | Feature_NotMips32r6 | 0, // XOR16_MM = 2569
   10267             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // XOR16_MMR6 = 2570
   10268             :     Feature_HasStdEnc | 0, // XOR64 = 2571
   10269             :     Feature_HasStdEnc | Feature_HasMSA | 0, // XORI_B = 2572
   10270             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // XORI_MMR6 = 2573
   10271             :     Feature_InMicroMips | 0, // XOR_MM = 2574
   10272             :     Feature_InMicroMips | Feature_HasMips32r6 | 0, // XOR_MMR6 = 2575
   10273             :     Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V = 2576
   10274             :     Feature_HasMSA | 0, // XOR_V_D_PSEUDO = 2577
   10275             :     Feature_HasMSA | 0, // XOR_V_H_PSEUDO = 2578
   10276             :     Feature_HasMSA | 0, // XOR_V_W_PSEUDO = 2579
   10277             :     Feature_HasStdEnc | Feature_NotInMicroMips | 0, // XORi = 2580
   10278             :     Feature_HasStdEnc | 0, // XORi64 = 2581
   10279             :     Feature_InMicroMips | 0, // XORi_MM = 2582
   10280             :     Feature_InMips16Mode | 0, // XorRxRxRy16 = 2583
   10281             :     Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // YIELD = 2584
   10282             :   };
   10283             : 
   10284             :   assert(Inst.getOpcode() < 2585);
   10285             :   uint64_t MissingFeatures =
   10286             :       (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
   10287             :       RequiredFeatures[Inst.getOpcode()];
   10288             :   if (MissingFeatures) {
   10289             :     std::ostringstream Msg;
   10290             :     Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
   10291             :         << " instruction but the ";
   10292             :     for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
   10293             :       if (MissingFeatures & (1ULL << i))
   10294             :         Msg << SubtargetFeatureNames[i] << " ";
   10295             :     Msg << "predicate(s) are not met";
   10296             :     report_fatal_error(Msg.str());
   10297             :   }
   10298             : #else
   10299             : // Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
   10300             : (void)MCII;
   10301             : #endif // NDEBUG
   10302             : }
   10303             : #endif

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