Line data Source code
1 : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2 : |* *|
3 : |* Machine Code Emitter *|
4 : |* *|
5 : |* Automatically generated file, do not edit! *|
6 : |* *|
7 : \*===----------------------------------------------------------------------===*/
8 :
9 : // Undef for HURD
10 : #ifdef EIEIO
11 : #undef EIEIO
12 : #endif
13 42741 : uint64_t MipsMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
14 : SmallVectorImpl<MCFixup> &Fixups,
15 : const MCSubtargetInfo &STI) const {
16 : static const uint64_t InstBits[] = {
17 : UINT64_C(0),
18 : UINT64_C(0),
19 : UINT64_C(0),
20 : UINT64_C(0),
21 : UINT64_C(0),
22 : UINT64_C(0),
23 : UINT64_C(0),
24 : UINT64_C(0),
25 : UINT64_C(0),
26 : UINT64_C(0),
27 : UINT64_C(0),
28 : UINT64_C(0),
29 : UINT64_C(0),
30 : UINT64_C(0),
31 : UINT64_C(0),
32 : UINT64_C(0),
33 : UINT64_C(0),
34 : UINT64_C(0),
35 : UINT64_C(0),
36 : UINT64_C(0),
37 : UINT64_C(0),
38 : UINT64_C(0),
39 : UINT64_C(0),
40 : UINT64_C(0),
41 : UINT64_C(0),
42 : UINT64_C(0),
43 : UINT64_C(0),
44 : UINT64_C(0),
45 : UINT64_C(0),
46 : UINT64_C(0),
47 : UINT64_C(0),
48 : UINT64_C(0),
49 : UINT64_C(0),
50 : UINT64_C(0),
51 : UINT64_C(0),
52 : UINT64_C(0),
53 : UINT64_C(0),
54 : UINT64_C(0),
55 : UINT64_C(0),
56 : UINT64_C(0),
57 : UINT64_C(0),
58 : UINT64_C(0),
59 : UINT64_C(0),
60 : UINT64_C(0),
61 : UINT64_C(0),
62 : UINT64_C(0),
63 : UINT64_C(0),
64 : UINT64_C(0),
65 : UINT64_C(0),
66 : UINT64_C(0),
67 : UINT64_C(0),
68 : UINT64_C(0),
69 : UINT64_C(0),
70 : UINT64_C(0),
71 : UINT64_C(0),
72 : UINT64_C(0),
73 : UINT64_C(0),
74 : UINT64_C(0),
75 : UINT64_C(0),
76 : UINT64_C(0),
77 : UINT64_C(0),
78 : UINT64_C(0),
79 : UINT64_C(0),
80 : UINT64_C(0),
81 : UINT64_C(0),
82 : UINT64_C(0),
83 : UINT64_C(0),
84 : UINT64_C(0),
85 : UINT64_C(0),
86 : UINT64_C(0),
87 : UINT64_C(0),
88 : UINT64_C(0),
89 : UINT64_C(0),
90 : UINT64_C(0),
91 : UINT64_C(0),
92 : UINT64_C(0),
93 : UINT64_C(0),
94 : UINT64_C(0),
95 : UINT64_C(0),
96 : UINT64_C(0),
97 : UINT64_C(0),
98 : UINT64_C(0),
99 : UINT64_C(0),
100 : UINT64_C(0),
101 : UINT64_C(0),
102 : UINT64_C(0),
103 : UINT64_C(0),
104 : UINT64_C(0),
105 : UINT64_C(0),
106 : UINT64_C(0),
107 : UINT64_C(0),
108 : UINT64_C(0),
109 : UINT64_C(0),
110 : UINT64_C(0),
111 : UINT64_C(0),
112 : UINT64_C(0),
113 : UINT64_C(0),
114 : UINT64_C(0),
115 : UINT64_C(0),
116 : UINT64_C(0),
117 : UINT64_C(0),
118 : UINT64_C(0),
119 : UINT64_C(0),
120 : UINT64_C(0),
121 : UINT64_C(0),
122 : UINT64_C(0),
123 : UINT64_C(0),
124 : UINT64_C(0),
125 : UINT64_C(0),
126 : UINT64_C(0),
127 : UINT64_C(0),
128 : UINT64_C(0),
129 : UINT64_C(0),
130 : UINT64_C(0),
131 : UINT64_C(0),
132 : UINT64_C(0),
133 : UINT64_C(0),
134 : UINT64_C(0),
135 : UINT64_C(0),
136 : UINT64_C(0),
137 : UINT64_C(0),
138 : UINT64_C(0),
139 : UINT64_C(0),
140 : UINT64_C(0),
141 : UINT64_C(0),
142 : UINT64_C(0),
143 : UINT64_C(0),
144 : UINT64_C(0),
145 : UINT64_C(0),
146 : UINT64_C(0),
147 : UINT64_C(0),
148 : UINT64_C(0),
149 : UINT64_C(0),
150 : UINT64_C(0),
151 : UINT64_C(0),
152 : UINT64_C(0),
153 : UINT64_C(0),
154 : UINT64_C(0),
155 : UINT64_C(0),
156 : UINT64_C(0),
157 : UINT64_C(0),
158 : UINT64_C(0),
159 : UINT64_C(0),
160 : UINT64_C(0),
161 : UINT64_C(0),
162 : UINT64_C(0),
163 : UINT64_C(0),
164 : UINT64_C(0),
165 : UINT64_C(0),
166 : UINT64_C(0),
167 : UINT64_C(0),
168 : UINT64_C(0),
169 : UINT64_C(0),
170 : UINT64_C(0),
171 : UINT64_C(0),
172 : UINT64_C(0),
173 : UINT64_C(0),
174 : UINT64_C(0),
175 : UINT64_C(0),
176 : UINT64_C(0),
177 : UINT64_C(0),
178 : UINT64_C(0),
179 : UINT64_C(0),
180 : UINT64_C(0),
181 : UINT64_C(0),
182 : UINT64_C(0),
183 : UINT64_C(0),
184 : UINT64_C(0),
185 : UINT64_C(0),
186 : UINT64_C(0),
187 : UINT64_C(0),
188 : UINT64_C(0),
189 : UINT64_C(0),
190 : UINT64_C(0),
191 : UINT64_C(0),
192 : UINT64_C(0),
193 : UINT64_C(0),
194 : UINT64_C(0),
195 : UINT64_C(0),
196 : UINT64_C(0),
197 : UINT64_C(0),
198 : UINT64_C(0),
199 : UINT64_C(0),
200 : UINT64_C(0),
201 : UINT64_C(0),
202 : UINT64_C(0),
203 : UINT64_C(0),
204 : UINT64_C(0),
205 : UINT64_C(0),
206 : UINT64_C(0),
207 : UINT64_C(0),
208 : UINT64_C(0),
209 : UINT64_C(0),
210 : UINT64_C(0),
211 : UINT64_C(0),
212 : UINT64_C(0),
213 : UINT64_C(0),
214 : UINT64_C(0),
215 : UINT64_C(0),
216 : UINT64_C(0),
217 : UINT64_C(0),
218 : UINT64_C(0),
219 : UINT64_C(0),
220 : UINT64_C(0),
221 : UINT64_C(0),
222 : UINT64_C(0),
223 : UINT64_C(0),
224 : UINT64_C(0),
225 : UINT64_C(0),
226 : UINT64_C(0),
227 : UINT64_C(0),
228 : UINT64_C(0),
229 : UINT64_C(0),
230 : UINT64_C(0),
231 : UINT64_C(0),
232 : UINT64_C(0),
233 : UINT64_C(0),
234 : UINT64_C(0),
235 : UINT64_C(0),
236 : UINT64_C(0),
237 : UINT64_C(0),
238 : UINT64_C(0),
239 : UINT64_C(0),
240 : UINT64_C(0),
241 : UINT64_C(0),
242 : UINT64_C(0),
243 : UINT64_C(0),
244 : UINT64_C(0),
245 : UINT64_C(0),
246 : UINT64_C(0),
247 : UINT64_C(0),
248 : UINT64_C(0),
249 : UINT64_C(0),
250 : UINT64_C(0),
251 : UINT64_C(0),
252 : UINT64_C(0),
253 : UINT64_C(0),
254 : UINT64_C(0),
255 : UINT64_C(0),
256 : UINT64_C(0),
257 : UINT64_C(0),
258 : UINT64_C(0),
259 : UINT64_C(0),
260 : UINT64_C(0),
261 : UINT64_C(0),
262 : UINT64_C(0),
263 : UINT64_C(0),
264 : UINT64_C(0),
265 : UINT64_C(0),
266 : UINT64_C(0),
267 : UINT64_C(0),
268 : UINT64_C(0),
269 : UINT64_C(0),
270 : UINT64_C(0),
271 : UINT64_C(0),
272 : UINT64_C(0),
273 : UINT64_C(0),
274 : UINT64_C(0),
275 : UINT64_C(0),
276 : UINT64_C(0),
277 : UINT64_C(0),
278 : UINT64_C(0),
279 : UINT64_C(0),
280 : UINT64_C(0),
281 : UINT64_C(0),
282 : UINT64_C(0),
283 : UINT64_C(0),
284 : UINT64_C(0),
285 : UINT64_C(0),
286 : UINT64_C(0),
287 : UINT64_C(0),
288 : UINT64_C(0),
289 : UINT64_C(0),
290 : UINT64_C(0),
291 : UINT64_C(0),
292 : UINT64_C(0),
293 : UINT64_C(0),
294 : UINT64_C(0),
295 : UINT64_C(0),
296 : UINT64_C(0),
297 : UINT64_C(0),
298 : UINT64_C(0),
299 : UINT64_C(0),
300 : UINT64_C(0),
301 : UINT64_C(0),
302 : UINT64_C(0),
303 : UINT64_C(0),
304 : UINT64_C(0),
305 : UINT64_C(0),
306 : UINT64_C(0),
307 : UINT64_C(0),
308 : UINT64_C(0),
309 : UINT64_C(0),
310 : UINT64_C(0),
311 : UINT64_C(0),
312 : UINT64_C(0),
313 : UINT64_C(0),
314 : UINT64_C(0),
315 : UINT64_C(0),
316 : UINT64_C(0),
317 : UINT64_C(0),
318 : UINT64_C(0),
319 : UINT64_C(0),
320 : UINT64_C(0),
321 : UINT64_C(0),
322 : UINT64_C(0),
323 : UINT64_C(0),
324 : UINT64_C(0),
325 : UINT64_C(0),
326 : UINT64_C(0),
327 : UINT64_C(0),
328 : UINT64_C(0),
329 : UINT64_C(0),
330 : UINT64_C(0),
331 : UINT64_C(0),
332 : UINT64_C(0),
333 : UINT64_C(0),
334 : UINT64_C(0),
335 : UINT64_C(0),
336 : UINT64_C(0),
337 : UINT64_C(0),
338 : UINT64_C(0),
339 : UINT64_C(0),
340 : UINT64_C(0),
341 : UINT64_C(0),
342 : UINT64_C(0),
343 : UINT64_C(0),
344 : UINT64_C(0),
345 : UINT64_C(0),
346 : UINT64_C(0),
347 : UINT64_C(0),
348 : UINT64_C(0),
349 : UINT64_C(0),
350 : UINT64_C(0),
351 : UINT64_C(0),
352 : UINT64_C(0),
353 : UINT64_C(0),
354 : UINT64_C(0),
355 : UINT64_C(0),
356 : UINT64_C(0),
357 : UINT64_C(0),
358 : UINT64_C(0),
359 : UINT64_C(0),
360 : UINT64_C(0),
361 : UINT64_C(0),
362 : UINT64_C(0),
363 : UINT64_C(0),
364 : UINT64_C(0),
365 : UINT64_C(0),
366 : UINT64_C(0),
367 : UINT64_C(0),
368 : UINT64_C(0),
369 : UINT64_C(0),
370 : UINT64_C(0),
371 : UINT64_C(0),
372 : UINT64_C(0),
373 : UINT64_C(0),
374 : UINT64_C(0),
375 : UINT64_C(0),
376 : UINT64_C(0),
377 : UINT64_C(0),
378 : UINT64_C(0),
379 : UINT64_C(0),
380 : UINT64_C(0),
381 : UINT64_C(0),
382 : UINT64_C(0),
383 : UINT64_C(0),
384 : UINT64_C(0),
385 : UINT64_C(0),
386 : UINT64_C(0),
387 : UINT64_C(0),
388 : UINT64_C(0),
389 : UINT64_C(0),
390 : UINT64_C(0),
391 : UINT64_C(0),
392 : UINT64_C(0),
393 : UINT64_C(0),
394 : UINT64_C(0),
395 : UINT64_C(0),
396 : UINT64_C(0),
397 : UINT64_C(0),
398 : UINT64_C(0),
399 : UINT64_C(0),
400 : UINT64_C(0),
401 : UINT64_C(0),
402 : UINT64_C(0),
403 : UINT64_C(0),
404 : UINT64_C(0),
405 : UINT64_C(0),
406 : UINT64_C(0),
407 : UINT64_C(0),
408 : UINT64_C(0),
409 : UINT64_C(0),
410 : UINT64_C(0),
411 : UINT64_C(0),
412 : UINT64_C(0),
413 : UINT64_C(0),
414 : UINT64_C(0),
415 : UINT64_C(0),
416 : UINT64_C(0),
417 : UINT64_C(0),
418 : UINT64_C(0),
419 : UINT64_C(0),
420 : UINT64_C(0),
421 : UINT64_C(0),
422 : UINT64_C(0),
423 : UINT64_C(0),
424 : UINT64_C(0),
425 : UINT64_C(0),
426 : UINT64_C(0),
427 : UINT64_C(0),
428 : UINT64_C(0),
429 : UINT64_C(0),
430 : UINT64_C(0),
431 : UINT64_C(0),
432 : UINT64_C(0),
433 : UINT64_C(0),
434 : UINT64_C(0),
435 : UINT64_C(0),
436 : UINT64_C(0),
437 : UINT64_C(0),
438 : UINT64_C(0),
439 : UINT64_C(0),
440 : UINT64_C(0),
441 : UINT64_C(0),
442 : UINT64_C(0),
443 : UINT64_C(0),
444 : UINT64_C(0),
445 : UINT64_C(0),
446 : UINT64_C(0),
447 : UINT64_C(0),
448 : UINT64_C(0),
449 : UINT64_C(0),
450 : UINT64_C(0),
451 : UINT64_C(0),
452 : UINT64_C(0),
453 : UINT64_C(0),
454 : UINT64_C(0),
455 : UINT64_C(0),
456 : UINT64_C(0),
457 : UINT64_C(0),
458 : UINT64_C(0),
459 : UINT64_C(0),
460 : UINT64_C(0),
461 : UINT64_C(0),
462 : UINT64_C(0),
463 : UINT64_C(0),
464 : UINT64_C(0),
465 : UINT64_C(0),
466 : UINT64_C(0),
467 : UINT64_C(0),
468 : UINT64_C(0),
469 : UINT64_C(0),
470 : UINT64_C(0),
471 : UINT64_C(0),
472 : UINT64_C(0),
473 : UINT64_C(0),
474 : UINT64_C(0),
475 : UINT64_C(0),
476 : UINT64_C(0),
477 : UINT64_C(0),
478 : UINT64_C(0),
479 : UINT64_C(0),
480 : UINT64_C(0),
481 : UINT64_C(0),
482 : UINT64_C(0),
483 : UINT64_C(0),
484 : UINT64_C(0),
485 : UINT64_C(0),
486 : UINT64_C(0),
487 : UINT64_C(0),
488 : UINT64_C(0),
489 : UINT64_C(0),
490 : UINT64_C(0),
491 : UINT64_C(0),
492 : UINT64_C(0),
493 : UINT64_C(0),
494 : UINT64_C(0),
495 : UINT64_C(0),
496 : UINT64_C(0),
497 : UINT64_C(0),
498 : UINT64_C(0),
499 : UINT64_C(0),
500 : UINT64_C(0),
501 : UINT64_C(0),
502 : UINT64_C(0),
503 : UINT64_C(0),
504 : UINT64_C(0),
505 : UINT64_C(0),
506 : UINT64_C(0),
507 : UINT64_C(0),
508 : UINT64_C(0),
509 : UINT64_C(0),
510 : UINT64_C(0),
511 : UINT64_C(0),
512 : UINT64_C(0),
513 : UINT64_C(0),
514 : UINT64_C(0),
515 : UINT64_C(0),
516 : UINT64_C(0),
517 : UINT64_C(0),
518 : UINT64_C(0),
519 : UINT64_C(0),
520 : UINT64_C(0),
521 : UINT64_C(0),
522 : UINT64_C(0),
523 : UINT64_C(0),
524 : UINT64_C(0),
525 : UINT64_C(0),
526 : UINT64_C(0),
527 : UINT64_C(0),
528 : UINT64_C(0),
529 : UINT64_C(0),
530 : UINT64_C(0),
531 : UINT64_C(0),
532 : UINT64_C(0),
533 : UINT64_C(0),
534 : UINT64_C(0),
535 : UINT64_C(0),
536 : UINT64_C(0),
537 : UINT64_C(0),
538 : UINT64_C(0),
539 : UINT64_C(0),
540 : UINT64_C(0),
541 : UINT64_C(0),
542 : UINT64_C(0),
543 : UINT64_C(0),
544 : UINT64_C(0),
545 : UINT64_C(0),
546 : UINT64_C(0),
547 : UINT64_C(0),
548 : UINT64_C(2080375378), // ABSQ_S_PH
549 : UINT64_C(4412), // ABSQ_S_PH_MM
550 : UINT64_C(2080374866), // ABSQ_S_QB
551 : UINT64_C(316), // ABSQ_S_QB_MMR2
552 : UINT64_C(2080375890), // ABSQ_S_W
553 : UINT64_C(8508), // ABSQ_S_W_MM
554 : UINT64_C(32), // ADD
555 : UINT64_C(3959422976), // ADDIUPC
556 : UINT64_C(2013265920), // ADDIUPC_MM
557 : UINT64_C(2013265920), // ADDIUPC_MMR6
558 : UINT64_C(27649), // ADDIUR1SP_MM
559 : UINT64_C(27648), // ADDIUR2_MM
560 : UINT64_C(19456), // ADDIUS5_MM
561 : UINT64_C(19457), // ADDIUSP_MM
562 : UINT64_C(805306368), // ADDIU_MMR6
563 : UINT64_C(2080375320), // ADDQH_PH
564 : UINT64_C(77), // ADDQH_PH_MMR2
565 : UINT64_C(2080375448), // ADDQH_R_PH
566 : UINT64_C(1101), // ADDQH_R_PH_MMR2
567 : UINT64_C(2080375960), // ADDQH_R_W
568 : UINT64_C(1165), // ADDQH_R_W_MMR2
569 : UINT64_C(2080375832), // ADDQH_W
570 : UINT64_C(141), // ADDQH_W_MMR2
571 : UINT64_C(2080375440), // ADDQ_PH
572 : UINT64_C(13), // ADDQ_PH_MM
573 : UINT64_C(2080375696), // ADDQ_S_PH
574 : UINT64_C(1037), // ADDQ_S_PH_MM
575 : UINT64_C(2080376208), // ADDQ_S_W
576 : UINT64_C(773), // ADDQ_S_W_MM
577 : UINT64_C(2080375824), // ADDSC
578 : UINT64_C(901), // ADDSC_MM
579 : UINT64_C(2021654544), // ADDS_A_B
580 : UINT64_C(2027946000), // ADDS_A_D
581 : UINT64_C(2023751696), // ADDS_A_H
582 : UINT64_C(2025848848), // ADDS_A_W
583 : UINT64_C(2030043152), // ADDS_S_B
584 : UINT64_C(2036334608), // ADDS_S_D
585 : UINT64_C(2032140304), // ADDS_S_H
586 : UINT64_C(2034237456), // ADDS_S_W
587 : UINT64_C(2038431760), // ADDS_U_B
588 : UINT64_C(2044723216), // ADDS_U_D
589 : UINT64_C(2040528912), // ADDS_U_H
590 : UINT64_C(2042626064), // ADDS_U_W
591 : UINT64_C(1024), // ADDU16_MM
592 : UINT64_C(1024), // ADDU16_MMR6
593 : UINT64_C(2080374808), // ADDUH_QB
594 : UINT64_C(333), // ADDUH_QB_MMR2
595 : UINT64_C(2080374936), // ADDUH_R_QB
596 : UINT64_C(1357), // ADDUH_R_QB_MMR2
597 : UINT64_C(336), // ADDU_MMR6
598 : UINT64_C(2080375312), // ADDU_PH
599 : UINT64_C(269), // ADDU_PH_MMR2
600 : UINT64_C(2080374800), // ADDU_QB
601 : UINT64_C(205), // ADDU_QB_MM
602 : UINT64_C(2080375568), // ADDU_S_PH
603 : UINT64_C(1293), // ADDU_S_PH_MMR2
604 : UINT64_C(2080375056), // ADDU_S_QB
605 : UINT64_C(1229), // ADDU_S_QB_MM
606 : UINT64_C(2013265926), // ADDVI_B
607 : UINT64_C(2019557382), // ADDVI_D
608 : UINT64_C(2015363078), // ADDVI_H
609 : UINT64_C(2017460230), // ADDVI_W
610 : UINT64_C(2013265934), // ADDV_B
611 : UINT64_C(2019557390), // ADDV_D
612 : UINT64_C(2015363086), // ADDV_H
613 : UINT64_C(2017460238), // ADDV_W
614 : UINT64_C(2080375888), // ADDWC
615 : UINT64_C(965), // ADDWC_MM
616 : UINT64_C(2013265936), // ADD_A_B
617 : UINT64_C(2019557392), // ADD_A_D
618 : UINT64_C(2015363088), // ADD_A_H
619 : UINT64_C(2017460240), // ADD_A_W
620 : UINT64_C(272), // ADD_MM
621 : UINT64_C(272), // ADD_MMR6
622 : UINT64_C(536870912), // ADDi
623 : UINT64_C(268435456), // ADDi_MM
624 : UINT64_C(603979776), // ADDiu
625 : UINT64_C(805306368), // ADDiu_MM
626 : UINT64_C(33), // ADDu
627 : UINT64_C(336), // ADDu_MM
628 : UINT64_C(2080375328), // ALIGN
629 : UINT64_C(31), // ALIGN_MMR6
630 : UINT64_C(3961454592), // ALUIPC
631 : UINT64_C(2015297536), // ALUIPC_MMR6
632 : UINT64_C(36), // AND
633 : UINT64_C(17536), // AND16_MM
634 : UINT64_C(17409), // AND16_MMR6
635 : UINT64_C(36), // AND64
636 : UINT64_C(11264), // ANDI16_MM
637 : UINT64_C(11264), // ANDI16_MMR6
638 : UINT64_C(2013265920), // ANDI_B
639 : UINT64_C(3489660928), // ANDI_MMR6
640 : UINT64_C(592), // AND_MM
641 : UINT64_C(592), // AND_MMR6
642 : UINT64_C(2013265950), // AND_V
643 : UINT64_C(805306368), // ANDi
644 : UINT64_C(805306368), // ANDi64
645 : UINT64_C(3489660928), // ANDi_MM
646 : UINT64_C(2080374833), // APPEND
647 : UINT64_C(533), // APPEND_MMR2
648 : UINT64_C(2046820369), // ASUB_S_B
649 : UINT64_C(2053111825), // ASUB_S_D
650 : UINT64_C(2048917521), // ASUB_S_H
651 : UINT64_C(2051014673), // ASUB_S_W
652 : UINT64_C(2055208977), // ASUB_U_B
653 : UINT64_C(2061500433), // ASUB_U_D
654 : UINT64_C(2057306129), // ASUB_U_H
655 : UINT64_C(2059403281), // ASUB_U_W
656 : UINT64_C(1006632960), // AUI
657 : UINT64_C(3961389056), // AUIPC
658 : UINT64_C(2015232000), // AUIPC_MMR6
659 : UINT64_C(268435456), // AUI_MMR6
660 : UINT64_C(2063597584), // AVER_S_B
661 : UINT64_C(2069889040), // AVER_S_D
662 : UINT64_C(2065694736), // AVER_S_H
663 : UINT64_C(2067791888), // AVER_S_W
664 : UINT64_C(2071986192), // AVER_U_B
665 : UINT64_C(2078277648), // AVER_U_D
666 : UINT64_C(2074083344), // AVER_U_H
667 : UINT64_C(2076180496), // AVER_U_W
668 : UINT64_C(2046820368), // AVE_S_B
669 : UINT64_C(2053111824), // AVE_S_D
670 : UINT64_C(2048917520), // AVE_S_H
671 : UINT64_C(2051014672), // AVE_S_W
672 : UINT64_C(2055208976), // AVE_U_B
673 : UINT64_C(2061500432), // AVE_U_D
674 : UINT64_C(2057306128), // AVE_U_H
675 : UINT64_C(2059403280), // AVE_U_W
676 : UINT64_C(4026550272), // AddiuRxImmX16
677 : UINT64_C(4026533888), // AddiuRxPcImmX16
678 : UINT64_C(18432), // AddiuRxRxImm16
679 : UINT64_C(4026550272), // AddiuRxRxImmX16
680 : UINT64_C(4026548224), // AddiuRxRyOffMemX16
681 : UINT64_C(25344), // AddiuSpImm16
682 : UINT64_C(4026544896), // AddiuSpImmX16
683 : UINT64_C(57345), // AdduRxRyRz16
684 : UINT64_C(59404), // AndRxRxRy16
685 : UINT64_C(52224), // B16_MM
686 : UINT64_C(1879048232), // BADDu
687 : UINT64_C(68222976), // BAL
688 : UINT64_C(3892314112), // BALC
689 : UINT64_C(3019898880), // BALC_MMR6
690 : UINT64_C(2080375857), // BALIGN
691 : UINT64_C(2236), // BALIGN_MMR2
692 : UINT64_C(3355443200), // BBIT0
693 : UINT64_C(3623878656), // BBIT032
694 : UINT64_C(3892314112), // BBIT1
695 : UINT64_C(4160749568), // BBIT132
696 : UINT64_C(3355443200), // BC
697 : UINT64_C(52224), // BC16_MMR6
698 : UINT64_C(1159725056), // BC1EQZ
699 : UINT64_C(1090519040), // BC1EQZC_MMR6
700 : UINT64_C(1157627904), // BC1F
701 : UINT64_C(1157758976), // BC1FL
702 : UINT64_C(1132462080), // BC1F_MM
703 : UINT64_C(1168113664), // BC1NEZ
704 : UINT64_C(1092616192), // BC1NEZC_MMR6
705 : UINT64_C(1157693440), // BC1T
706 : UINT64_C(1157824512), // BC1TL
707 : UINT64_C(1134559232), // BC1T_MM
708 : UINT64_C(1226833920), // BC2EQZ
709 : UINT64_C(1094713344), // BC2EQZC_MMR6
710 : UINT64_C(1235222528), // BC2NEZ
711 : UINT64_C(1096810496), // BC2NEZC_MMR6
712 : UINT64_C(2045771785), // BCLRI_B
713 : UINT64_C(2038431753), // BCLRI_D
714 : UINT64_C(2044723209), // BCLRI_H
715 : UINT64_C(2042626057), // BCLRI_W
716 : UINT64_C(2038431757), // BCLR_B
717 : UINT64_C(2044723213), // BCLR_D
718 : UINT64_C(2040528909), // BCLR_H
719 : UINT64_C(2042626061), // BCLR_W
720 : UINT64_C(2483027968), // BC_MMR6
721 : UINT64_C(268435456), // BEQ
722 : UINT64_C(268435456), // BEQ64
723 : UINT64_C(536870912), // BEQC
724 : UINT64_C(536870912), // BEQC64
725 : UINT64_C(1946157056), // BEQC_MMR6
726 : UINT64_C(1342177280), // BEQL
727 : UINT64_C(35840), // BEQZ16_MM
728 : UINT64_C(536870912), // BEQZALC
729 : UINT64_C(1946157056), // BEQZALC_MMR6
730 : UINT64_C(3623878656), // BEQZC
731 : UINT64_C(35840), // BEQZC16_MMR6
732 : UINT64_C(3623878656), // BEQZC64
733 : UINT64_C(1088421888), // BEQZC_MM
734 : UINT64_C(2147483648), // BEQZC_MMR6
735 : UINT64_C(2483027968), // BEQ_MM
736 : UINT64_C(1476395008), // BGEC
737 : UINT64_C(1476395008), // BGEC64
738 : UINT64_C(4093640704), // BGEC_MMR6
739 : UINT64_C(402653184), // BGEUC
740 : UINT64_C(402653184), // BGEUC64
741 : UINT64_C(3221225472), // BGEUC_MMR6
742 : UINT64_C(67174400), // BGEZ
743 : UINT64_C(67174400), // BGEZ64
744 : UINT64_C(68222976), // BGEZAL
745 : UINT64_C(402653184), // BGEZALC
746 : UINT64_C(3221225472), // BGEZALC_MMR6
747 : UINT64_C(68354048), // BGEZALL
748 : UINT64_C(1113587712), // BGEZALS_MM
749 : UINT64_C(1080033280), // BGEZAL_MM
750 : UINT64_C(1476395008), // BGEZC
751 : UINT64_C(1476395008), // BGEZC64
752 : UINT64_C(4093640704), // BGEZC_MMR6
753 : UINT64_C(67305472), // BGEZL
754 : UINT64_C(1077936128), // BGEZ_MM
755 : UINT64_C(469762048), // BGTZ
756 : UINT64_C(469762048), // BGTZ64
757 : UINT64_C(469762048), // BGTZALC
758 : UINT64_C(3758096384), // BGTZALC_MMR6
759 : UINT64_C(1543503872), // BGTZC
760 : UINT64_C(1543503872), // BGTZC64
761 : UINT64_C(3556769792), // BGTZC_MMR6
762 : UINT64_C(1543503872), // BGTZL
763 : UINT64_C(1086324736), // BGTZ_MM
764 : UINT64_C(2070937609), // BINSLI_B
765 : UINT64_C(2063597577), // BINSLI_D
766 : UINT64_C(2069889033), // BINSLI_H
767 : UINT64_C(2067791881), // BINSLI_W
768 : UINT64_C(2063597581), // BINSL_B
769 : UINT64_C(2069889037), // BINSL_D
770 : UINT64_C(2065694733), // BINSL_H
771 : UINT64_C(2067791885), // BINSL_W
772 : UINT64_C(2079326217), // BINSRI_B
773 : UINT64_C(2071986185), // BINSRI_D
774 : UINT64_C(2078277641), // BINSRI_H
775 : UINT64_C(2076180489), // BINSRI_W
776 : UINT64_C(2071986189), // BINSR_B
777 : UINT64_C(2078277645), // BINSR_D
778 : UINT64_C(2074083341), // BINSR_H
779 : UINT64_C(2076180493), // BINSR_W
780 : UINT64_C(2080376530), // BITREV
781 : UINT64_C(12604), // BITREV_MM
782 : UINT64_C(2080374816), // BITSWAP
783 : UINT64_C(2876), // BITSWAP_MMR6
784 : UINT64_C(402653184), // BLEZ
785 : UINT64_C(402653184), // BLEZ64
786 : UINT64_C(402653184), // BLEZALC
787 : UINT64_C(3221225472), // BLEZALC_MMR6
788 : UINT64_C(1476395008), // BLEZC
789 : UINT64_C(1476395008), // BLEZC64
790 : UINT64_C(4093640704), // BLEZC_MMR6
791 : UINT64_C(1476395008), // BLEZL
792 : UINT64_C(1082130432), // BLEZ_MM
793 : UINT64_C(1543503872), // BLTC
794 : UINT64_C(1543503872), // BLTC64
795 : UINT64_C(3556769792), // BLTC_MMR6
796 : UINT64_C(469762048), // BLTUC
797 : UINT64_C(469762048), // BLTUC64
798 : UINT64_C(3758096384), // BLTUC_MMR6
799 : UINT64_C(67108864), // BLTZ
800 : UINT64_C(67108864), // BLTZ64
801 : UINT64_C(68157440), // BLTZAL
802 : UINT64_C(469762048), // BLTZALC
803 : UINT64_C(3758096384), // BLTZALC_MMR6
804 : UINT64_C(68288512), // BLTZALL
805 : UINT64_C(1109393408), // BLTZALS_MM
806 : UINT64_C(1075838976), // BLTZAL_MM
807 : UINT64_C(1543503872), // BLTZC
808 : UINT64_C(1543503872), // BLTZC64
809 : UINT64_C(3556769792), // BLTZC_MMR6
810 : UINT64_C(67239936), // BLTZL
811 : UINT64_C(1073741824), // BLTZ_MM
812 : UINT64_C(2013265921), // BMNZI_B
813 : UINT64_C(2021654558), // BMNZ_V
814 : UINT64_C(2030043137), // BMZI_B
815 : UINT64_C(2023751710), // BMZ_V
816 : UINT64_C(335544320), // BNE
817 : UINT64_C(335544320), // BNE64
818 : UINT64_C(1610612736), // BNEC
819 : UINT64_C(1610612736), // BNEC64
820 : UINT64_C(2080374784), // BNEC_MMR6
821 : UINT64_C(2062549001), // BNEGI_B
822 : UINT64_C(2055208969), // BNEGI_D
823 : UINT64_C(2061500425), // BNEGI_H
824 : UINT64_C(2059403273), // BNEGI_W
825 : UINT64_C(2055208973), // BNEG_B
826 : UINT64_C(2061500429), // BNEG_D
827 : UINT64_C(2057306125), // BNEG_H
828 : UINT64_C(2059403277), // BNEG_W
829 : UINT64_C(1409286144), // BNEL
830 : UINT64_C(44032), // BNEZ16_MM
831 : UINT64_C(1610612736), // BNEZALC
832 : UINT64_C(2080374784), // BNEZALC_MMR6
833 : UINT64_C(4160749568), // BNEZC
834 : UINT64_C(44032), // BNEZC16_MMR6
835 : UINT64_C(4160749568), // BNEZC64
836 : UINT64_C(1084227584), // BNEZC_MM
837 : UINT64_C(2684354560), // BNEZC_MMR6
838 : UINT64_C(3019898880), // BNE_MM
839 : UINT64_C(1610612736), // BNVC
840 : UINT64_C(2080374784), // BNVC_MMR6
841 : UINT64_C(1199570944), // BNZ_B
842 : UINT64_C(1205862400), // BNZ_D
843 : UINT64_C(1201668096), // BNZ_H
844 : UINT64_C(1172307968), // BNZ_V
845 : UINT64_C(1203765248), // BNZ_W
846 : UINT64_C(536870912), // BOVC
847 : UINT64_C(1946157056), // BOVC_MMR6
848 : UINT64_C(68943872), // BPOSGE32
849 : UINT64_C(1126170624), // BPOSGE32C_MMR3
850 : UINT64_C(1130364928), // BPOSGE32_MM
851 : UINT64_C(13), // BREAK
852 : UINT64_C(18048), // BREAK16_MM
853 : UINT64_C(17435), // BREAK16_MMR6
854 : UINT64_C(7), // BREAK_MM
855 : UINT64_C(7), // BREAK_MMR6
856 : UINT64_C(2046820353), // BSELI_B
857 : UINT64_C(2025848862), // BSEL_V
858 : UINT64_C(2054160393), // BSETI_B
859 : UINT64_C(2046820361), // BSETI_D
860 : UINT64_C(2053111817), // BSETI_H
861 : UINT64_C(2051014665), // BSETI_W
862 : UINT64_C(2046820365), // BSET_B
863 : UINT64_C(2053111821), // BSET_D
864 : UINT64_C(2048917517), // BSET_H
865 : UINT64_C(2051014669), // BSET_W
866 : UINT64_C(1191182336), // BZ_B
867 : UINT64_C(1197473792), // BZ_D
868 : UINT64_C(1193279488), // BZ_H
869 : UINT64_C(1163919360), // BZ_V
870 : UINT64_C(1195376640), // BZ_W
871 : UINT64_C(8192), // BeqzRxImm16
872 : UINT64_C(4026540032), // BeqzRxImmX16
873 : UINT64_C(4096), // Bimm16
874 : UINT64_C(4026535936), // BimmX16
875 : UINT64_C(10240), // BnezRxImm16
876 : UINT64_C(4026542080), // BnezRxImmX16
877 : UINT64_C(59397), // Break16
878 : UINT64_C(24576), // Bteqz16
879 : UINT64_C(4026544128), // BteqzX16
880 : UINT64_C(24832), // Btnez16
881 : UINT64_C(4026544384), // BtnezX16
882 : UINT64_C(3154116608), // CACHE
883 : UINT64_C(2080374811), // CACHEE
884 : UINT64_C(1610655232), // CACHEE_MM
885 : UINT64_C(536895488), // CACHE_MM
886 : UINT64_C(536895488), // CACHE_MMR6
887 : UINT64_C(2080374821), // CACHE_R6
888 : UINT64_C(1176502282), // CEIL_L_D64
889 : UINT64_C(1409307451), // CEIL_L_D_MMR6
890 : UINT64_C(1174405130), // CEIL_L_S
891 : UINT64_C(1409291067), // CEIL_L_S_MMR6
892 : UINT64_C(1176502286), // CEIL_W_D32
893 : UINT64_C(1176502286), // CEIL_W_D64
894 : UINT64_C(1409309499), // CEIL_W_D_MMR6
895 : UINT64_C(1409309499), // CEIL_W_MM
896 : UINT64_C(1174405134), // CEIL_W_S
897 : UINT64_C(1409293115), // CEIL_W_S_MM
898 : UINT64_C(1409293115), // CEIL_W_S_MMR6
899 : UINT64_C(2013265927), // CEQI_B
900 : UINT64_C(2019557383), // CEQI_D
901 : UINT64_C(2015363079), // CEQI_H
902 : UINT64_C(2017460231), // CEQI_W
903 : UINT64_C(2013265935), // CEQ_B
904 : UINT64_C(2019557391), // CEQ_D
905 : UINT64_C(2015363087), // CEQ_H
906 : UINT64_C(2017460239), // CEQ_W
907 : UINT64_C(1145044992), // CFC1
908 : UINT64_C(1409290299), // CFC1_MM
909 : UINT64_C(52540), // CFC2_MM
910 : UINT64_C(2021523481), // CFCMSA
911 : UINT64_C(1879048242), // CINS
912 : UINT64_C(1879048243), // CINS32
913 : UINT64_C(1879048242), // CINS64_32
914 : UINT64_C(1879048242), // CINS_i32
915 : UINT64_C(1176502299), // CLASS_D
916 : UINT64_C(1409286752), // CLASS_D_MMR6
917 : UINT64_C(1174405147), // CLASS_S
918 : UINT64_C(1409286240), // CLASS_S_MMR6
919 : UINT64_C(2046820359), // CLEI_S_B
920 : UINT64_C(2053111815), // CLEI_S_D
921 : UINT64_C(2048917511), // CLEI_S_H
922 : UINT64_C(2051014663), // CLEI_S_W
923 : UINT64_C(2055208967), // CLEI_U_B
924 : UINT64_C(2061500423), // CLEI_U_D
925 : UINT64_C(2057306119), // CLEI_U_H
926 : UINT64_C(2059403271), // CLEI_U_W
927 : UINT64_C(2046820367), // CLE_S_B
928 : UINT64_C(2053111823), // CLE_S_D
929 : UINT64_C(2048917519), // CLE_S_H
930 : UINT64_C(2051014671), // CLE_S_W
931 : UINT64_C(2055208975), // CLE_U_B
932 : UINT64_C(2061500431), // CLE_U_D
933 : UINT64_C(2057306127), // CLE_U_H
934 : UINT64_C(2059403279), // CLE_U_W
935 : UINT64_C(1879048225), // CLO
936 : UINT64_C(19260), // CLO_MM
937 : UINT64_C(19260), // CLO_MMR6
938 : UINT64_C(81), // CLO_R6
939 : UINT64_C(2030043143), // CLTI_S_B
940 : UINT64_C(2036334599), // CLTI_S_D
941 : UINT64_C(2032140295), // CLTI_S_H
942 : UINT64_C(2034237447), // CLTI_S_W
943 : UINT64_C(2038431751), // CLTI_U_B
944 : UINT64_C(2044723207), // CLTI_U_D
945 : UINT64_C(2040528903), // CLTI_U_H
946 : UINT64_C(2042626055), // CLTI_U_W
947 : UINT64_C(2030043151), // CLT_S_B
948 : UINT64_C(2036334607), // CLT_S_D
949 : UINT64_C(2032140303), // CLT_S_H
950 : UINT64_C(2034237455), // CLT_S_W
951 : UINT64_C(2038431759), // CLT_U_B
952 : UINT64_C(2044723215), // CLT_U_D
953 : UINT64_C(2040528911), // CLT_U_H
954 : UINT64_C(2042626063), // CLT_U_W
955 : UINT64_C(1879048224), // CLZ
956 : UINT64_C(23356), // CLZ_MM
957 : UINT64_C(80), // CLZ_MMR6
958 : UINT64_C(80), // CLZ_R6
959 : UINT64_C(2080376337), // CMPGDU_EQ_QB
960 : UINT64_C(389), // CMPGDU_EQ_QB_MMR2
961 : UINT64_C(2080376465), // CMPGDU_LE_QB
962 : UINT64_C(517), // CMPGDU_LE_QB_MMR2
963 : UINT64_C(2080376401), // CMPGDU_LT_QB
964 : UINT64_C(453), // CMPGDU_LT_QB_MMR2
965 : UINT64_C(2080375057), // CMPGU_EQ_QB
966 : UINT64_C(1476395205), // CMPGU_EQ_QB_MM
967 : UINT64_C(2080375185), // CMPGU_LE_QB
968 : UINT64_C(1476395333), // CMPGU_LE_QB_MM
969 : UINT64_C(2080375121), // CMPGU_LT_QB
970 : UINT64_C(1476395269), // CMPGU_LT_QB_MM
971 : UINT64_C(2080374801), // CMPU_EQ_QB
972 : UINT64_C(581), // CMPU_EQ_QB_MM
973 : UINT64_C(2080374929), // CMPU_LE_QB
974 : UINT64_C(709), // CMPU_LE_QB_MM
975 : UINT64_C(2080374865), // CMPU_LT_QB
976 : UINT64_C(645), // CMPU_LT_QB_MM
977 : UINT64_C(1409286165), // CMP_AF_D_MMR6
978 : UINT64_C(1409286149), // CMP_AF_S_MMR6
979 : UINT64_C(1184890882), // CMP_EQ_D
980 : UINT64_C(1409286293), // CMP_EQ_D_MMR6
981 : UINT64_C(2080375313), // CMP_EQ_PH
982 : UINT64_C(5), // CMP_EQ_PH_MM
983 : UINT64_C(1182793730), // CMP_EQ_S
984 : UINT64_C(1409286277), // CMP_EQ_S_MMR6
985 : UINT64_C(1184890880), // CMP_F_D
986 : UINT64_C(1182793728), // CMP_F_S
987 : UINT64_C(1184890886), // CMP_LE_D
988 : UINT64_C(1409286549), // CMP_LE_D_MMR6
989 : UINT64_C(2080375441), // CMP_LE_PH
990 : UINT64_C(133), // CMP_LE_PH_MM
991 : UINT64_C(1182793734), // CMP_LE_S
992 : UINT64_C(1409286533), // CMP_LE_S_MMR6
993 : UINT64_C(1184890884), // CMP_LT_D
994 : UINT64_C(1409286421), // CMP_LT_D_MMR6
995 : UINT64_C(2080375377), // CMP_LT_PH
996 : UINT64_C(69), // CMP_LT_PH_MM
997 : UINT64_C(1182793732), // CMP_LT_S
998 : UINT64_C(1409286405), // CMP_LT_S_MMR6
999 : UINT64_C(1184890888), // CMP_SAF_D
1000 : UINT64_C(1409286677), // CMP_SAF_D_MMR6
1001 : UINT64_C(1182793736), // CMP_SAF_S
1002 : UINT64_C(1409286661), // CMP_SAF_S_MMR6
1003 : UINT64_C(1184890890), // CMP_SEQ_D
1004 : UINT64_C(1409286805), // CMP_SEQ_D_MMR6
1005 : UINT64_C(1182793738), // CMP_SEQ_S
1006 : UINT64_C(1409286789), // CMP_SEQ_S_MMR6
1007 : UINT64_C(1184890894), // CMP_SLE_D
1008 : UINT64_C(1409287061), // CMP_SLE_D_MMR6
1009 : UINT64_C(1182793742), // CMP_SLE_S
1010 : UINT64_C(1409287045), // CMP_SLE_S_MMR6
1011 : UINT64_C(1184890892), // CMP_SLT_D
1012 : UINT64_C(1409286933), // CMP_SLT_D_MMR6
1013 : UINT64_C(1182793740), // CMP_SLT_S
1014 : UINT64_C(1409286917), // CMP_SLT_S_MMR6
1015 : UINT64_C(1184890891), // CMP_SUEQ_D
1016 : UINT64_C(1409286869), // CMP_SUEQ_D_MMR6
1017 : UINT64_C(1182793739), // CMP_SUEQ_S
1018 : UINT64_C(1409286853), // CMP_SUEQ_S_MMR6
1019 : UINT64_C(1184890895), // CMP_SULE_D
1020 : UINT64_C(1409287125), // CMP_SULE_D_MMR6
1021 : UINT64_C(1182793743), // CMP_SULE_S
1022 : UINT64_C(1409287109), // CMP_SULE_S_MMR6
1023 : UINT64_C(1184890893), // CMP_SULT_D
1024 : UINT64_C(1409286997), // CMP_SULT_D_MMR6
1025 : UINT64_C(1182793741), // CMP_SULT_S
1026 : UINT64_C(1409286981), // CMP_SULT_S_MMR6
1027 : UINT64_C(1184890889), // CMP_SUN_D
1028 : UINT64_C(1409286741), // CMP_SUN_D_MMR6
1029 : UINT64_C(1182793737), // CMP_SUN_S
1030 : UINT64_C(1409286725), // CMP_SUN_S_MMR6
1031 : UINT64_C(1184890883), // CMP_UEQ_D
1032 : UINT64_C(1409286357), // CMP_UEQ_D_MMR6
1033 : UINT64_C(1182793731), // CMP_UEQ_S
1034 : UINT64_C(1409286341), // CMP_UEQ_S_MMR6
1035 : UINT64_C(1184890887), // CMP_ULE_D
1036 : UINT64_C(1409286613), // CMP_ULE_D_MMR6
1037 : UINT64_C(1182793735), // CMP_ULE_S
1038 : UINT64_C(1409286597), // CMP_ULE_S_MMR6
1039 : UINT64_C(1184890885), // CMP_ULT_D
1040 : UINT64_C(1409286485), // CMP_ULT_D_MMR6
1041 : UINT64_C(1182793733), // CMP_ULT_S
1042 : UINT64_C(1409286469), // CMP_ULT_S_MMR6
1043 : UINT64_C(1184890881), // CMP_UN_D
1044 : UINT64_C(1409286229), // CMP_UN_D_MMR6
1045 : UINT64_C(1182793729), // CMP_UN_S
1046 : UINT64_C(1409286213), // CMP_UN_S_MMR6
1047 : UINT64_C(2021654553), // COPY_S_B
1048 : UINT64_C(2025324569), // COPY_S_D
1049 : UINT64_C(2023751705), // COPY_S_H
1050 : UINT64_C(2024800281), // COPY_S_W
1051 : UINT64_C(2025848857), // COPY_U_B
1052 : UINT64_C(2027946009), // COPY_U_H
1053 : UINT64_C(2028994585), // COPY_U_W
1054 : UINT64_C(2080374799), // CRC32B
1055 : UINT64_C(2080375055), // CRC32CB
1056 : UINT64_C(2080375247), // CRC32CD
1057 : UINT64_C(2080375119), // CRC32CH
1058 : UINT64_C(2080375183), // CRC32CW
1059 : UINT64_C(2080374991), // CRC32D
1060 : UINT64_C(2080374863), // CRC32H
1061 : UINT64_C(2080374927), // CRC32W
1062 : UINT64_C(1153433600), // CTC1
1063 : UINT64_C(1409292347), // CTC1_MM
1064 : UINT64_C(56636), // CTC2_MM
1065 : UINT64_C(2017329177), // CTCMSA
1066 : UINT64_C(1174405153), // CVT_D32_S
1067 : UINT64_C(1409291131), // CVT_D32_S_MM
1068 : UINT64_C(1182793761), // CVT_D32_W
1069 : UINT64_C(1409299323), // CVT_D32_W_MM
1070 : UINT64_C(1184890913), // CVT_D64_L
1071 : UINT64_C(1174405153), // CVT_D64_S
1072 : UINT64_C(1409291131), // CVT_D64_S_MM
1073 : UINT64_C(1182793761), // CVT_D64_W
1074 : UINT64_C(1409299323), // CVT_D64_W_MM
1075 : UINT64_C(1409307515), // CVT_D_L_MMR6
1076 : UINT64_C(1176502309), // CVT_L_D64
1077 : UINT64_C(1409302843), // CVT_L_D64_MM
1078 : UINT64_C(1409302843), // CVT_L_D_MMR6
1079 : UINT64_C(1174405157), // CVT_L_S
1080 : UINT64_C(1409286459), // CVT_L_S_MM
1081 : UINT64_C(1409286459), // CVT_L_S_MMR6
1082 : UINT64_C(1174405158), // CVT_PS_S64
1083 : UINT64_C(1176502304), // CVT_S_D32
1084 : UINT64_C(1409293179), // CVT_S_D32_MM
1085 : UINT64_C(1176502304), // CVT_S_D64
1086 : UINT64_C(1409293179), // CVT_S_D64_MM
1087 : UINT64_C(1184890912), // CVT_S_L
1088 : UINT64_C(1409309563), // CVT_S_L_MMR6
1089 : UINT64_C(1186988072), // CVT_S_PL64
1090 : UINT64_C(1186988064), // CVT_S_PU64
1091 : UINT64_C(1182793760), // CVT_S_W
1092 : UINT64_C(1409301371), // CVT_S_W_MM
1093 : UINT64_C(1409301371), // CVT_S_W_MMR6
1094 : UINT64_C(1176502308), // CVT_W_D32
1095 : UINT64_C(1409304891), // CVT_W_D32_MM
1096 : UINT64_C(1176502308), // CVT_W_D64
1097 : UINT64_C(1409304891), // CVT_W_D64_MM
1098 : UINT64_C(1174405156), // CVT_W_S
1099 : UINT64_C(1409288507), // CVT_W_S_MM
1100 : UINT64_C(1409288507), // CVT_W_S_MMR6
1101 : UINT64_C(1176502322), // C_EQ_D32
1102 : UINT64_C(1409287356), // C_EQ_D32_MM
1103 : UINT64_C(1176502322), // C_EQ_D64
1104 : UINT64_C(1409287356), // C_EQ_D64_MM
1105 : UINT64_C(1174405170), // C_EQ_S
1106 : UINT64_C(1409286332), // C_EQ_S_MM
1107 : UINT64_C(1176502320), // C_F_D32
1108 : UINT64_C(1409287228), // C_F_D32_MM
1109 : UINT64_C(1176502320), // C_F_D64
1110 : UINT64_C(1409287228), // C_F_D64_MM
1111 : UINT64_C(1174405168), // C_F_S
1112 : UINT64_C(1409286204), // C_F_S_MM
1113 : UINT64_C(1176502334), // C_LE_D32
1114 : UINT64_C(1409288124), // C_LE_D32_MM
1115 : UINT64_C(1176502334), // C_LE_D64
1116 : UINT64_C(1409288124), // C_LE_D64_MM
1117 : UINT64_C(1174405182), // C_LE_S
1118 : UINT64_C(1409287100), // C_LE_S_MM
1119 : UINT64_C(1176502332), // C_LT_D32
1120 : UINT64_C(1409287996), // C_LT_D32_MM
1121 : UINT64_C(1176502332), // C_LT_D64
1122 : UINT64_C(1409287996), // C_LT_D64_MM
1123 : UINT64_C(1174405180), // C_LT_S
1124 : UINT64_C(1409286972), // C_LT_S_MM
1125 : UINT64_C(1176502333), // C_NGE_D32
1126 : UINT64_C(1409288060), // C_NGE_D32_MM
1127 : UINT64_C(1176502333), // C_NGE_D64
1128 : UINT64_C(1409288060), // C_NGE_D64_MM
1129 : UINT64_C(1174405181), // C_NGE_S
1130 : UINT64_C(1409287036), // C_NGE_S_MM
1131 : UINT64_C(1176502329), // C_NGLE_D32
1132 : UINT64_C(1409287804), // C_NGLE_D32_MM
1133 : UINT64_C(1176502329), // C_NGLE_D64
1134 : UINT64_C(1409287804), // C_NGLE_D64_MM
1135 : UINT64_C(1174405177), // C_NGLE_S
1136 : UINT64_C(1409286780), // C_NGLE_S_MM
1137 : UINT64_C(1176502331), // C_NGL_D32
1138 : UINT64_C(1409287932), // C_NGL_D32_MM
1139 : UINT64_C(1176502331), // C_NGL_D64
1140 : UINT64_C(1409287932), // C_NGL_D64_MM
1141 : UINT64_C(1174405179), // C_NGL_S
1142 : UINT64_C(1409286908), // C_NGL_S_MM
1143 : UINT64_C(1176502335), // C_NGT_D32
1144 : UINT64_C(1409288188), // C_NGT_D32_MM
1145 : UINT64_C(1176502335), // C_NGT_D64
1146 : UINT64_C(1409288188), // C_NGT_D64_MM
1147 : UINT64_C(1174405183), // C_NGT_S
1148 : UINT64_C(1409287164), // C_NGT_S_MM
1149 : UINT64_C(1176502326), // C_OLE_D32
1150 : UINT64_C(1409287612), // C_OLE_D32_MM
1151 : UINT64_C(1176502326), // C_OLE_D64
1152 : UINT64_C(1409287612), // C_OLE_D64_MM
1153 : UINT64_C(1174405174), // C_OLE_S
1154 : UINT64_C(1409286588), // C_OLE_S_MM
1155 : UINT64_C(1176502324), // C_OLT_D32
1156 : UINT64_C(1409287484), // C_OLT_D32_MM
1157 : UINT64_C(1176502324), // C_OLT_D64
1158 : UINT64_C(1409287484), // C_OLT_D64_MM
1159 : UINT64_C(1174405172), // C_OLT_S
1160 : UINT64_C(1409286460), // C_OLT_S_MM
1161 : UINT64_C(1176502330), // C_SEQ_D32
1162 : UINT64_C(1409287868), // C_SEQ_D32_MM
1163 : UINT64_C(1176502330), // C_SEQ_D64
1164 : UINT64_C(1409287868), // C_SEQ_D64_MM
1165 : UINT64_C(1174405178), // C_SEQ_S
1166 : UINT64_C(1409286844), // C_SEQ_S_MM
1167 : UINT64_C(1176502328), // C_SF_D32
1168 : UINT64_C(1409287740), // C_SF_D32_MM
1169 : UINT64_C(1176502328), // C_SF_D64
1170 : UINT64_C(1409287740), // C_SF_D64_MM
1171 : UINT64_C(1174405176), // C_SF_S
1172 : UINT64_C(1409286716), // C_SF_S_MM
1173 : UINT64_C(1176502323), // C_UEQ_D32
1174 : UINT64_C(1409287420), // C_UEQ_D32_MM
1175 : UINT64_C(1176502323), // C_UEQ_D64
1176 : UINT64_C(1409287420), // C_UEQ_D64_MM
1177 : UINT64_C(1174405171), // C_UEQ_S
1178 : UINT64_C(1409286396), // C_UEQ_S_MM
1179 : UINT64_C(1176502327), // C_ULE_D32
1180 : UINT64_C(1409287676), // C_ULE_D32_MM
1181 : UINT64_C(1176502327), // C_ULE_D64
1182 : UINT64_C(1409287676), // C_ULE_D64_MM
1183 : UINT64_C(1174405175), // C_ULE_S
1184 : UINT64_C(1409286652), // C_ULE_S_MM
1185 : UINT64_C(1176502325), // C_ULT_D32
1186 : UINT64_C(1409287548), // C_ULT_D32_MM
1187 : UINT64_C(1176502325), // C_ULT_D64
1188 : UINT64_C(1409287548), // C_ULT_D64_MM
1189 : UINT64_C(1174405173), // C_ULT_S
1190 : UINT64_C(1409286524), // C_ULT_S_MM
1191 : UINT64_C(1176502321), // C_UN_D32
1192 : UINT64_C(1409287292), // C_UN_D32_MM
1193 : UINT64_C(1176502321), // C_UN_D64
1194 : UINT64_C(1409287292), // C_UN_D64_MM
1195 : UINT64_C(1174405169), // C_UN_S
1196 : UINT64_C(1409286268), // C_UN_S_MM
1197 : UINT64_C(59402), // CmpRxRy16
1198 : UINT64_C(28672), // CmpiRxImm16
1199 : UINT64_C(4026560512), // CmpiRxImmX16
1200 : UINT64_C(44), // DADD
1201 : UINT64_C(1610612736), // DADDi
1202 : UINT64_C(1677721600), // DADDiu
1203 : UINT64_C(45), // DADDu
1204 : UINT64_C(67502080), // DAHI
1205 : UINT64_C(2080375332), // DALIGN
1206 : UINT64_C(69074944), // DATI
1207 : UINT64_C(1946157056), // DAUI
1208 : UINT64_C(2080374820), // DBITSWAP
1209 : UINT64_C(1879048229), // DCLO
1210 : UINT64_C(83), // DCLO_R6
1211 : UINT64_C(1879048228), // DCLZ
1212 : UINT64_C(82), // DCLZ_R6
1213 : UINT64_C(158), // DDIV
1214 : UINT64_C(159), // DDIVU
1215 : UINT64_C(1107296287), // DERET
1216 : UINT64_C(58236), // DERET_MM
1217 : UINT64_C(58236), // DERET_MMR6
1218 : UINT64_C(2080374787), // DEXT
1219 : UINT64_C(2080374787), // DEXT64_32
1220 : UINT64_C(2080374785), // DEXTM
1221 : UINT64_C(2080374786), // DEXTU
1222 : UINT64_C(1096835072), // DI
1223 : UINT64_C(2080374791), // DINS
1224 : UINT64_C(2080374789), // DINSM
1225 : UINT64_C(2080374790), // DINSU
1226 : UINT64_C(154), // DIV
1227 : UINT64_C(155), // DIVU
1228 : UINT64_C(408), // DIVU_MMR6
1229 : UINT64_C(280), // DIV_MMR6
1230 : UINT64_C(2046820370), // DIV_S_B
1231 : UINT64_C(2053111826), // DIV_S_D
1232 : UINT64_C(2048917522), // DIV_S_H
1233 : UINT64_C(2051014674), // DIV_S_W
1234 : UINT64_C(2055208978), // DIV_U_B
1235 : UINT64_C(2061500434), // DIV_U_D
1236 : UINT64_C(2057306130), // DIV_U_H
1237 : UINT64_C(2059403282), // DIV_U_W
1238 : UINT64_C(18300), // DI_MM
1239 : UINT64_C(18300), // DI_MMR6
1240 : UINT64_C(21), // DLSA
1241 : UINT64_C(21), // DLSA_R6
1242 : UINT64_C(1075838976), // DMFC0
1243 : UINT64_C(1142947840), // DMFC1
1244 : UINT64_C(1210056704), // DMFC2
1245 : UINT64_C(1210056704), // DMFC2_OCTEON
1246 : UINT64_C(1080033536), // DMFGC0
1247 : UINT64_C(222), // DMOD
1248 : UINT64_C(223), // DMODU
1249 : UINT64_C(1096813505), // DMT
1250 : UINT64_C(1084227584), // DMTC0
1251 : UINT64_C(1151336448), // DMTC1
1252 : UINT64_C(1218445312), // DMTC2
1253 : UINT64_C(1218445312), // DMTC2_OCTEON
1254 : UINT64_C(1080034048), // DMTGC0
1255 : UINT64_C(220), // DMUH
1256 : UINT64_C(221), // DMUHU
1257 : UINT64_C(1879048195), // DMUL
1258 : UINT64_C(28), // DMULT
1259 : UINT64_C(29), // DMULTu
1260 : UINT64_C(157), // DMULU
1261 : UINT64_C(156), // DMUL_R6
1262 : UINT64_C(2019557395), // DOTP_S_D
1263 : UINT64_C(2015363091), // DOTP_S_H
1264 : UINT64_C(2017460243), // DOTP_S_W
1265 : UINT64_C(2027946003), // DOTP_U_D
1266 : UINT64_C(2023751699), // DOTP_U_H
1267 : UINT64_C(2025848851), // DOTP_U_W
1268 : UINT64_C(2036334611), // DPADD_S_D
1269 : UINT64_C(2032140307), // DPADD_S_H
1270 : UINT64_C(2034237459), // DPADD_S_W
1271 : UINT64_C(2044723219), // DPADD_U_D
1272 : UINT64_C(2040528915), // DPADD_U_H
1273 : UINT64_C(2042626067), // DPADD_U_W
1274 : UINT64_C(2080376496), // DPAQX_SA_W_PH
1275 : UINT64_C(12988), // DPAQX_SA_W_PH_MMR2
1276 : UINT64_C(2080376368), // DPAQX_S_W_PH
1277 : UINT64_C(8892), // DPAQX_S_W_PH_MMR2
1278 : UINT64_C(2080375600), // DPAQ_SA_L_W
1279 : UINT64_C(4796), // DPAQ_SA_L_W_MM
1280 : UINT64_C(2080375088), // DPAQ_S_W_PH
1281 : UINT64_C(700), // DPAQ_S_W_PH_MM
1282 : UINT64_C(2080375024), // DPAU_H_QBL
1283 : UINT64_C(8380), // DPAU_H_QBL_MM
1284 : UINT64_C(2080375280), // DPAU_H_QBR
1285 : UINT64_C(12476), // DPAU_H_QBR_MM
1286 : UINT64_C(2080375344), // DPAX_W_PH
1287 : UINT64_C(4284), // DPAX_W_PH_MMR2
1288 : UINT64_C(2080374832), // DPA_W_PH
1289 : UINT64_C(188), // DPA_W_PH_MMR2
1290 : UINT64_C(1879048237), // DPOP
1291 : UINT64_C(2080376560), // DPSQX_SA_W_PH
1292 : UINT64_C(14012), // DPSQX_SA_W_PH_MMR2
1293 : UINT64_C(2080376432), // DPSQX_S_W_PH
1294 : UINT64_C(9916), // DPSQX_S_W_PH_MMR2
1295 : UINT64_C(2080375664), // DPSQ_SA_L_W
1296 : UINT64_C(5820), // DPSQ_SA_L_W_MM
1297 : UINT64_C(2080375152), // DPSQ_S_W_PH
1298 : UINT64_C(1724), // DPSQ_S_W_PH_MM
1299 : UINT64_C(2053111827), // DPSUB_S_D
1300 : UINT64_C(2048917523), // DPSUB_S_H
1301 : UINT64_C(2051014675), // DPSUB_S_W
1302 : UINT64_C(2061500435), // DPSUB_U_D
1303 : UINT64_C(2057306131), // DPSUB_U_H
1304 : UINT64_C(2059403283), // DPSUB_U_W
1305 : UINT64_C(2080375536), // DPSU_H_QBL
1306 : UINT64_C(9404), // DPSU_H_QBL_MM
1307 : UINT64_C(2080375792), // DPSU_H_QBR
1308 : UINT64_C(13500), // DPSU_H_QBR_MM
1309 : UINT64_C(2080375408), // DPSX_W_PH
1310 : UINT64_C(5308), // DPSX_W_PH_MMR2
1311 : UINT64_C(2080374896), // DPS_W_PH
1312 : UINT64_C(1212), // DPS_W_PH_MMR2
1313 : UINT64_C(2097210), // DROTR
1314 : UINT64_C(2097214), // DROTR32
1315 : UINT64_C(86), // DROTRV
1316 : UINT64_C(2080374948), // DSBH
1317 : UINT64_C(30), // DSDIV
1318 : UINT64_C(2080375140), // DSHD
1319 : UINT64_C(56), // DSLL
1320 : UINT64_C(60), // DSLL32
1321 : UINT64_C(60), // DSLL64_32
1322 : UINT64_C(20), // DSLLV
1323 : UINT64_C(59), // DSRA
1324 : UINT64_C(63), // DSRA32
1325 : UINT64_C(23), // DSRAV
1326 : UINT64_C(58), // DSRL
1327 : UINT64_C(62), // DSRL32
1328 : UINT64_C(22), // DSRLV
1329 : UINT64_C(46), // DSUB
1330 : UINT64_C(47), // DSUBu
1331 : UINT64_C(31), // DUDIV
1332 : UINT64_C(1096810532), // DVP
1333 : UINT64_C(1096810497), // DVPE
1334 : UINT64_C(6524), // DVP_MMR6
1335 : UINT64_C(59418), // DivRxRy16
1336 : UINT64_C(59419), // DivuRxRy16
1337 : UINT64_C(192), // EHB
1338 : UINT64_C(6144), // EHB_MM
1339 : UINT64_C(6144), // EHB_MMR6
1340 : UINT64_C(1096835104), // EI
1341 : UINT64_C(22396), // EI_MM
1342 : UINT64_C(22396), // EI_MMR6
1343 : UINT64_C(1096813537), // EMT
1344 : UINT64_C(1107296280), // ERET
1345 : UINT64_C(1107296344), // ERETNC
1346 : UINT64_C(127868), // ERETNC_MMR6
1347 : UINT64_C(62332), // ERET_MM
1348 : UINT64_C(62332), // ERET_MMR6
1349 : UINT64_C(1096810500), // EVP
1350 : UINT64_C(1096810529), // EVPE
1351 : UINT64_C(14716), // EVP_MMR6
1352 : UINT64_C(2080374784), // EXT
1353 : UINT64_C(2080374968), // EXTP
1354 : UINT64_C(2080375480), // EXTPDP
1355 : UINT64_C(2080375544), // EXTPDPV
1356 : UINT64_C(14524), // EXTPDPV_MM
1357 : UINT64_C(13948), // EXTPDP_MM
1358 : UINT64_C(2080375032), // EXTPV
1359 : UINT64_C(10428), // EXTPV_MM
1360 : UINT64_C(9852), // EXTP_MM
1361 : UINT64_C(2080375288), // EXTRV_RS_W
1362 : UINT64_C(11964), // EXTRV_RS_W_MM
1363 : UINT64_C(2080375160), // EXTRV_R_W
1364 : UINT64_C(7868), // EXTRV_R_W_MM
1365 : UINT64_C(2080375800), // EXTRV_S_H
1366 : UINT64_C(16060), // EXTRV_S_H_MM
1367 : UINT64_C(2080374904), // EXTRV_W
1368 : UINT64_C(3772), // EXTRV_W_MM
1369 : UINT64_C(2080375224), // EXTR_RS_W
1370 : UINT64_C(11900), // EXTR_RS_W_MM
1371 : UINT64_C(2080375096), // EXTR_R_W
1372 : UINT64_C(7804), // EXTR_R_W_MM
1373 : UINT64_C(2080375736), // EXTR_S_H
1374 : UINT64_C(15996), // EXTR_S_H_MM
1375 : UINT64_C(2080374840), // EXTR_W
1376 : UINT64_C(3708), // EXTR_W_MM
1377 : UINT64_C(1879048250), // EXTS
1378 : UINT64_C(1879048251), // EXTS32
1379 : UINT64_C(44), // EXT_MM
1380 : UINT64_C(44), // EXT_MMR6
1381 : UINT64_C(1176502277), // FABS_D32
1382 : UINT64_C(1409295227), // FABS_D32_MM
1383 : UINT64_C(1176502277), // FABS_D64
1384 : UINT64_C(1409295227), // FABS_D64_MM
1385 : UINT64_C(1174405125), // FABS_S
1386 : UINT64_C(1409287035), // FABS_S_MM
1387 : UINT64_C(2015363099), // FADD_D
1388 : UINT64_C(1176502272), // FADD_D32
1389 : UINT64_C(1409286448), // FADD_D32_MM
1390 : UINT64_C(1176502272), // FADD_D64
1391 : UINT64_C(1409286448), // FADD_D64_MM
1392 : UINT64_C(1174405120), // FADD_S
1393 : UINT64_C(1409286192), // FADD_S_MM
1394 : UINT64_C(1409286192), // FADD_S_MMR6
1395 : UINT64_C(2013265947), // FADD_W
1396 : UINT64_C(2015363098), // FCAF_D
1397 : UINT64_C(2013265946), // FCAF_W
1398 : UINT64_C(2023751706), // FCEQ_D
1399 : UINT64_C(2021654554), // FCEQ_W
1400 : UINT64_C(2065760286), // FCLASS_D
1401 : UINT64_C(2065694750), // FCLASS_W
1402 : UINT64_C(2040528922), // FCLE_D
1403 : UINT64_C(2038431770), // FCLE_W
1404 : UINT64_C(2032140314), // FCLT_D
1405 : UINT64_C(2030043162), // FCLT_W
1406 : UINT64_C(1176502320), // FCMP_D32
1407 : UINT64_C(1409287228), // FCMP_D32_MM
1408 : UINT64_C(1176502320), // FCMP_D64
1409 : UINT64_C(1174405168), // FCMP_S32
1410 : UINT64_C(1409286204), // FCMP_S32_MM
1411 : UINT64_C(2027946012), // FCNE_D
1412 : UINT64_C(2025848860), // FCNE_W
1413 : UINT64_C(2019557404), // FCOR_D
1414 : UINT64_C(2017460252), // FCOR_W
1415 : UINT64_C(2027946010), // FCUEQ_D
1416 : UINT64_C(2025848858), // FCUEQ_W
1417 : UINT64_C(2044723226), // FCULE_D
1418 : UINT64_C(2042626074), // FCULE_W
1419 : UINT64_C(2036334618), // FCULT_D
1420 : UINT64_C(2034237466), // FCULT_W
1421 : UINT64_C(2023751708), // FCUNE_D
1422 : UINT64_C(2021654556), // FCUNE_W
1423 : UINT64_C(2019557402), // FCUN_D
1424 : UINT64_C(2017460250), // FCUN_W
1425 : UINT64_C(2027946011), // FDIV_D
1426 : UINT64_C(1176502275), // FDIV_D32
1427 : UINT64_C(1409286640), // FDIV_D32_MM
1428 : UINT64_C(1176502275), // FDIV_D64
1429 : UINT64_C(1409286640), // FDIV_D64_MM
1430 : UINT64_C(1174405123), // FDIV_S
1431 : UINT64_C(1409286384), // FDIV_S_MM
1432 : UINT64_C(1409286384), // FDIV_S_MMR6
1433 : UINT64_C(2025848859), // FDIV_W
1434 : UINT64_C(2046820379), // FEXDO_H
1435 : UINT64_C(2048917531), // FEXDO_W
1436 : UINT64_C(2044723227), // FEXP2_D
1437 : UINT64_C(2042626075), // FEXP2_W
1438 : UINT64_C(2066808862), // FEXUPL_D
1439 : UINT64_C(2066743326), // FEXUPL_W
1440 : UINT64_C(2066939934), // FEXUPR_D
1441 : UINT64_C(2066874398), // FEXUPR_W
1442 : UINT64_C(2067595294), // FFINT_S_D
1443 : UINT64_C(2067529758), // FFINT_S_W
1444 : UINT64_C(2067726366), // FFINT_U_D
1445 : UINT64_C(2067660830), // FFINT_U_W
1446 : UINT64_C(2067071006), // FFQL_D
1447 : UINT64_C(2067005470), // FFQL_W
1448 : UINT64_C(2067202078), // FFQR_D
1449 : UINT64_C(2067136542), // FFQR_W
1450 : UINT64_C(2063597598), // FILL_B
1451 : UINT64_C(2063794206), // FILL_D
1452 : UINT64_C(2063663134), // FILL_H
1453 : UINT64_C(2063728670), // FILL_W
1454 : UINT64_C(2066677790), // FLOG2_D
1455 : UINT64_C(2066612254), // FLOG2_W
1456 : UINT64_C(1176502283), // FLOOR_L_D64
1457 : UINT64_C(1409303355), // FLOOR_L_D_MMR6
1458 : UINT64_C(1174405131), // FLOOR_L_S
1459 : UINT64_C(1409286971), // FLOOR_L_S_MMR6
1460 : UINT64_C(1176502287), // FLOOR_W_D32
1461 : UINT64_C(1176502287), // FLOOR_W_D64
1462 : UINT64_C(1409305403), // FLOOR_W_D_MMR6
1463 : UINT64_C(1409305403), // FLOOR_W_MM
1464 : UINT64_C(1174405135), // FLOOR_W_S
1465 : UINT64_C(1409289019), // FLOOR_W_S_MM
1466 : UINT64_C(1409289019), // FLOOR_W_S_MMR6
1467 : UINT64_C(2032140315), // FMADD_D
1468 : UINT64_C(2030043163), // FMADD_W
1469 : UINT64_C(2078277659), // FMAX_A_D
1470 : UINT64_C(2076180507), // FMAX_A_W
1471 : UINT64_C(2074083355), // FMAX_D
1472 : UINT64_C(2071986203), // FMAX_W
1473 : UINT64_C(2069889051), // FMIN_A_D
1474 : UINT64_C(2067791899), // FMIN_A_W
1475 : UINT64_C(2065694747), // FMIN_D
1476 : UINT64_C(2063597595), // FMIN_W
1477 : UINT64_C(1176502278), // FMOV_D32
1478 : UINT64_C(1409294459), // FMOV_D32_MM
1479 : UINT64_C(1176502278), // FMOV_D64
1480 : UINT64_C(1409294459), // FMOV_D64_MM
1481 : UINT64_C(1174405126), // FMOV_S
1482 : UINT64_C(1409286267), // FMOV_S_MM
1483 : UINT64_C(1409286267), // FMOV_S_MMR6
1484 : UINT64_C(2036334619), // FMSUB_D
1485 : UINT64_C(2034237467), // FMSUB_W
1486 : UINT64_C(2023751707), // FMUL_D
1487 : UINT64_C(1176502274), // FMUL_D32
1488 : UINT64_C(1409286576), // FMUL_D32_MM
1489 : UINT64_C(1176502274), // FMUL_D64
1490 : UINT64_C(1409286576), // FMUL_D64_MM
1491 : UINT64_C(1174405122), // FMUL_S
1492 : UINT64_C(1409286320), // FMUL_S_MM
1493 : UINT64_C(1409286320), // FMUL_S_MMR6
1494 : UINT64_C(2021654555), // FMUL_W
1495 : UINT64_C(1176502279), // FNEG_D32
1496 : UINT64_C(1409297275), // FNEG_D32_MM
1497 : UINT64_C(1176502279), // FNEG_D64
1498 : UINT64_C(1409297275), // FNEG_D64_MM
1499 : UINT64_C(1174405127), // FNEG_S
1500 : UINT64_C(1409289083), // FNEG_S_MM
1501 : UINT64_C(1409289083), // FNEG_S_MMR6
1502 : UINT64_C(2080374792), // FORK
1503 : UINT64_C(2066415646), // FRCP_D
1504 : UINT64_C(2066350110), // FRCP_W
1505 : UINT64_C(2066546718), // FRINT_D
1506 : UINT64_C(2066481182), // FRINT_W
1507 : UINT64_C(2066284574), // FRSQRT_D
1508 : UINT64_C(2066219038), // FRSQRT_W
1509 : UINT64_C(2048917530), // FSAF_D
1510 : UINT64_C(2046820378), // FSAF_W
1511 : UINT64_C(2057306138), // FSEQ_D
1512 : UINT64_C(2055208986), // FSEQ_W
1513 : UINT64_C(2074083354), // FSLE_D
1514 : UINT64_C(2071986202), // FSLE_W
1515 : UINT64_C(2065694746), // FSLT_D
1516 : UINT64_C(2063597594), // FSLT_W
1517 : UINT64_C(2061500444), // FSNE_D
1518 : UINT64_C(2059403292), // FSNE_W
1519 : UINT64_C(2053111836), // FSOR_D
1520 : UINT64_C(2051014684), // FSOR_W
1521 : UINT64_C(2066153502), // FSQRT_D
1522 : UINT64_C(1176502276), // FSQRT_D32
1523 : UINT64_C(1409305147), // FSQRT_D32_MM
1524 : UINT64_C(1176502276), // FSQRT_D64
1525 : UINT64_C(1409305147), // FSQRT_D64_MM
1526 : UINT64_C(1174405124), // FSQRT_S
1527 : UINT64_C(1409288763), // FSQRT_S_MM
1528 : UINT64_C(2066087966), // FSQRT_W
1529 : UINT64_C(2019557403), // FSUB_D
1530 : UINT64_C(1176502273), // FSUB_D32
1531 : UINT64_C(1409286512), // FSUB_D32_MM
1532 : UINT64_C(1176502273), // FSUB_D64
1533 : UINT64_C(1409286512), // FSUB_D64_MM
1534 : UINT64_C(1174405121), // FSUB_S
1535 : UINT64_C(1409286256), // FSUB_S_MM
1536 : UINT64_C(1409286256), // FSUB_S_MMR6
1537 : UINT64_C(2017460251), // FSUB_W
1538 : UINT64_C(2061500442), // FSUEQ_D
1539 : UINT64_C(2059403290), // FSUEQ_W
1540 : UINT64_C(2078277658), // FSULE_D
1541 : UINT64_C(2076180506), // FSULE_W
1542 : UINT64_C(2069889050), // FSULT_D
1543 : UINT64_C(2067791898), // FSULT_W
1544 : UINT64_C(2057306140), // FSUNE_D
1545 : UINT64_C(2055208988), // FSUNE_W
1546 : UINT64_C(2053111834), // FSUN_D
1547 : UINT64_C(2051014682), // FSUN_W
1548 : UINT64_C(2067333150), // FTINT_S_D
1549 : UINT64_C(2067267614), // FTINT_S_W
1550 : UINT64_C(2067464222), // FTINT_U_D
1551 : UINT64_C(2067398686), // FTINT_U_W
1552 : UINT64_C(2055208987), // FTQ_H
1553 : UINT64_C(2057306139), // FTQ_W
1554 : UINT64_C(2065891358), // FTRUNC_S_D
1555 : UINT64_C(2065825822), // FTRUNC_S_W
1556 : UINT64_C(2066022430), // FTRUNC_U_D
1557 : UINT64_C(2065956894), // FTRUNC_U_W
1558 : UINT64_C(2080374845), // GINVI
1559 : UINT64_C(24956), // GINVI_MMR6
1560 : UINT64_C(2080374973), // GINVT
1561 : UINT64_C(29052), // GINVT_MMR6
1562 : UINT64_C(2053111829), // HADD_S_D
1563 : UINT64_C(2048917525), // HADD_S_H
1564 : UINT64_C(2051014677), // HADD_S_W
1565 : UINT64_C(2061500437), // HADD_U_D
1566 : UINT64_C(2057306133), // HADD_U_H
1567 : UINT64_C(2059403285), // HADD_U_W
1568 : UINT64_C(2069889045), // HSUB_S_D
1569 : UINT64_C(2065694741), // HSUB_S_H
1570 : UINT64_C(2067791893), // HSUB_S_W
1571 : UINT64_C(2078277653), // HSUB_U_D
1572 : UINT64_C(2074083349), // HSUB_U_H
1573 : UINT64_C(2076180501), // HSUB_U_W
1574 : UINT64_C(1107296296), // HYPCALL
1575 : UINT64_C(50044), // HYPCALL_MM
1576 : UINT64_C(2063597588), // ILVEV_B
1577 : UINT64_C(2069889044), // ILVEV_D
1578 : UINT64_C(2065694740), // ILVEV_H
1579 : UINT64_C(2067791892), // ILVEV_W
1580 : UINT64_C(2046820372), // ILVL_B
1581 : UINT64_C(2053111828), // ILVL_D
1582 : UINT64_C(2048917524), // ILVL_H
1583 : UINT64_C(2051014676), // ILVL_W
1584 : UINT64_C(2071986196), // ILVOD_B
1585 : UINT64_C(2078277652), // ILVOD_D
1586 : UINT64_C(2074083348), // ILVOD_H
1587 : UINT64_C(2076180500), // ILVOD_W
1588 : UINT64_C(2055208980), // ILVR_B
1589 : UINT64_C(2061500436), // ILVR_D
1590 : UINT64_C(2057306132), // ILVR_H
1591 : UINT64_C(2059403284), // ILVR_W
1592 : UINT64_C(2080374788), // INS
1593 : UINT64_C(2030043161), // INSERT_B
1594 : UINT64_C(2033713177), // INSERT_D
1595 : UINT64_C(2032140313), // INSERT_H
1596 : UINT64_C(2033188889), // INSERT_W
1597 : UINT64_C(2080374796), // INSV
1598 : UINT64_C(2034237465), // INSVE_B
1599 : UINT64_C(2037907481), // INSVE_D
1600 : UINT64_C(2036334617), // INSVE_H
1601 : UINT64_C(2037383193), // INSVE_W
1602 : UINT64_C(16700), // INSV_MM
1603 : UINT64_C(12), // INS_MM
1604 : UINT64_C(12), // INS_MMR6
1605 : UINT64_C(134217728), // J
1606 : UINT64_C(201326592), // JAL
1607 : UINT64_C(9), // JALR
1608 : UINT64_C(17856), // JALR16_MM
1609 : UINT64_C(9), // JALR64
1610 : UINT64_C(17419), // JALRC16_MMR6
1611 : UINT64_C(7996), // JALRC_HB_MMR6
1612 : UINT64_C(3900), // JALRC_MMR6
1613 : UINT64_C(17888), // JALRS16_MM
1614 : UINT64_C(20284), // JALRS_MM
1615 : UINT64_C(1033), // JALR_HB
1616 : UINT64_C(1033), // JALR_HB64
1617 : UINT64_C(3900), // JALR_MM
1618 : UINT64_C(1946157056), // JALS_MM
1619 : UINT64_C(1946157056), // JALX
1620 : UINT64_C(4026531840), // JALX_MM
1621 : UINT64_C(4093640704), // JAL_MM
1622 : UINT64_C(4160749568), // JIALC
1623 : UINT64_C(4160749568), // JIALC64
1624 : UINT64_C(2147483648), // JIALC_MMR6
1625 : UINT64_C(3623878656), // JIC
1626 : UINT64_C(3623878656), // JIC64
1627 : UINT64_C(2684354560), // JIC_MMR6
1628 : UINT64_C(8), // JR
1629 : UINT64_C(17792), // JR16_MM
1630 : UINT64_C(8), // JR64
1631 : UINT64_C(18176), // JRADDIUSP
1632 : UINT64_C(17824), // JRC16_MM
1633 : UINT64_C(17411), // JRC16_MMR6
1634 : UINT64_C(17427), // JRCADDIUSP_MMR6
1635 : UINT64_C(1032), // JR_HB
1636 : UINT64_C(1032), // JR_HB64
1637 : UINT64_C(1033), // JR_HB64_R6
1638 : UINT64_C(1033), // JR_HB_R6
1639 : UINT64_C(3900), // JR_MM
1640 : UINT64_C(3556769792), // J_MM
1641 : UINT64_C(402653184), // Jal16
1642 : UINT64_C(402653184), // JalB16
1643 : UINT64_C(59424), // JrRa16
1644 : UINT64_C(59616), // JrcRa16
1645 : UINT64_C(59584), // JrcRx16
1646 : UINT64_C(59392), // JumpLinkReg16
1647 : UINT64_C(2147483648), // LB
1648 : UINT64_C(2147483648), // LB64
1649 : UINT64_C(2080374828), // LBE
1650 : UINT64_C(1610639360), // LBE_MM
1651 : UINT64_C(2048), // LBU16_MM
1652 : UINT64_C(2080375178), // LBUX
1653 : UINT64_C(549), // LBUX_MM
1654 : UINT64_C(335544320), // LBU_MMR6
1655 : UINT64_C(469762048), // LB_MM
1656 : UINT64_C(469762048), // LB_MMR6
1657 : UINT64_C(2415919104), // LBu
1658 : UINT64_C(2415919104), // LBu64
1659 : UINT64_C(2080374824), // LBuE
1660 : UINT64_C(1610637312), // LBuE_MM
1661 : UINT64_C(335544320), // LBu_MM
1662 : UINT64_C(3690987520), // LD
1663 : UINT64_C(3556769792), // LDC1
1664 : UINT64_C(3556769792), // LDC164
1665 : UINT64_C(3154116608), // LDC1_D64_MMR6
1666 : UINT64_C(3154116608), // LDC1_MM
1667 : UINT64_C(3623878656), // LDC2
1668 : UINT64_C(536879104), // LDC2_MMR6
1669 : UINT64_C(1237319680), // LDC2_R6
1670 : UINT64_C(3690987520), // LDC3
1671 : UINT64_C(2063597575), // LDI_B
1672 : UINT64_C(2069889031), // LDI_D
1673 : UINT64_C(2065694727), // LDI_H
1674 : UINT64_C(2067791879), // LDI_W
1675 : UINT64_C(1744830464), // LDL
1676 : UINT64_C(3960995840), // LDPC
1677 : UINT64_C(1811939328), // LDR
1678 : UINT64_C(1275068417), // LDXC1
1679 : UINT64_C(1275068417), // LDXC164
1680 : UINT64_C(2013265952), // LD_B
1681 : UINT64_C(2013265955), // LD_D
1682 : UINT64_C(2013265953), // LD_H
1683 : UINT64_C(2013265954), // LD_W
1684 : UINT64_C(603979776), // LEA_ADDiu
1685 : UINT64_C(1677721600), // LEA_ADDiu64
1686 : UINT64_C(805306368), // LEA_ADDiu_MM
1687 : UINT64_C(2214592512), // LH
1688 : UINT64_C(2214592512), // LH64
1689 : UINT64_C(2080374829), // LHE
1690 : UINT64_C(1610639872), // LHE_MM
1691 : UINT64_C(10240), // LHU16_MM
1692 : UINT64_C(2080375050), // LHX
1693 : UINT64_C(357), // LHX_MM
1694 : UINT64_C(1006632960), // LH_MM
1695 : UINT64_C(2483027968), // LHu
1696 : UINT64_C(2483027968), // LHu64
1697 : UINT64_C(2080374825), // LHuE
1698 : UINT64_C(1610637824), // LHuE_MM
1699 : UINT64_C(872415232), // LHu_MM
1700 : UINT64_C(60416), // LI16_MM
1701 : UINT64_C(60416), // LI16_MMR6
1702 : UINT64_C(3221225472), // LL
1703 : UINT64_C(3221225472), // LL64
1704 : UINT64_C(2080374838), // LL64_R6
1705 : UINT64_C(3489660928), // LLD
1706 : UINT64_C(2080374839), // LLD_R6
1707 : UINT64_C(2080374830), // LLE
1708 : UINT64_C(1610640384), // LLE_MM
1709 : UINT64_C(1610625024), // LL_MM
1710 : UINT64_C(1610625024), // LL_MMR6
1711 : UINT64_C(2080374838), // LL_R6
1712 : UINT64_C(5), // LSA
1713 : UINT64_C(15), // LSA_MMR6
1714 : UINT64_C(5), // LSA_R6
1715 : UINT64_C(268435456), // LUI_MMR6
1716 : UINT64_C(1275068421), // LUXC1
1717 : UINT64_C(1275068421), // LUXC164
1718 : UINT64_C(1409286472), // LUXC1_MM
1719 : UINT64_C(1006632960), // LUi
1720 : UINT64_C(1006632960), // LUi64
1721 : UINT64_C(1101004800), // LUi_MM
1722 : UINT64_C(2348810240), // LW
1723 : UINT64_C(26624), // LW16_MM
1724 : UINT64_C(2348810240), // LW64
1725 : UINT64_C(3288334336), // LWC1
1726 : UINT64_C(2617245696), // LWC1_MM
1727 : UINT64_C(3355443200), // LWC2
1728 : UINT64_C(536870912), // LWC2_MMR6
1729 : UINT64_C(1228931072), // LWC2_R6
1730 : UINT64_C(3422552064), // LWC3
1731 : UINT64_C(2348810240), // LWDSP
1732 : UINT64_C(4227858432), // LWDSP_MM
1733 : UINT64_C(2080374831), // LWE
1734 : UINT64_C(1610640896), // LWE_MM
1735 : UINT64_C(25600), // LWGP_MM
1736 : UINT64_C(2281701376), // LWL
1737 : UINT64_C(2281701376), // LWL64
1738 : UINT64_C(2080374809), // LWLE
1739 : UINT64_C(1610638336), // LWLE_MM
1740 : UINT64_C(1610612736), // LWL_MM
1741 : UINT64_C(17664), // LWM16_MM
1742 : UINT64_C(17410), // LWM16_MMR6
1743 : UINT64_C(536891392), // LWM32_MM
1744 : UINT64_C(3959947264), // LWPC
1745 : UINT64_C(2013790208), // LWPC_MMR6
1746 : UINT64_C(536875008), // LWP_MM
1747 : UINT64_C(2550136832), // LWR
1748 : UINT64_C(2550136832), // LWR64
1749 : UINT64_C(2080374810), // LWRE
1750 : UINT64_C(1610638848), // LWRE_MM
1751 : UINT64_C(1610616832), // LWR_MM
1752 : UINT64_C(18432), // LWSP_MM
1753 : UINT64_C(3960471552), // LWUPC
1754 : UINT64_C(1610670080), // LWU_MM
1755 : UINT64_C(2080374794), // LWX
1756 : UINT64_C(1275068416), // LWXC1
1757 : UINT64_C(1409286216), // LWXC1_MM
1758 : UINT64_C(280), // LWXS_MM
1759 : UINT64_C(421), // LWX_MM
1760 : UINT64_C(4227858432), // LW_MM
1761 : UINT64_C(4227858432), // LW_MMR6
1762 : UINT64_C(2617245696), // LWu
1763 : UINT64_C(4026570752), // LbRxRyOffMemX16
1764 : UINT64_C(4026572800), // LbuRxRyOffMemX16
1765 : UINT64_C(4026572800), // LhRxRyOffMemX16
1766 : UINT64_C(4026572800), // LhuRxRyOffMemX16
1767 : UINT64_C(26624), // LiRxImm16
1768 : UINT64_C(4026558464), // LiRxImmAlignX16
1769 : UINT64_C(4026558464), // LiRxImmX16
1770 : UINT64_C(45056), // LwRxPcTcp16
1771 : UINT64_C(4026576896), // LwRxPcTcpX16
1772 : UINT64_C(4026570752), // LwRxRyOffMemX16
1773 : UINT64_C(4026568704), // LwRxSpImmX16
1774 : UINT64_C(1879048192), // MADD
1775 : UINT64_C(1176502296), // MADDF_D
1776 : UINT64_C(1409287096), // MADDF_D_MMR6
1777 : UINT64_C(1174405144), // MADDF_S
1778 : UINT64_C(1409286584), // MADDF_S_MMR6
1779 : UINT64_C(2067791900), // MADDR_Q_H
1780 : UINT64_C(2069889052), // MADDR_Q_W
1781 : UINT64_C(1879048193), // MADDU
1782 : UINT64_C(1879048193), // MADDU_DSP
1783 : UINT64_C(6844), // MADDU_DSP_MM
1784 : UINT64_C(56124), // MADDU_MM
1785 : UINT64_C(2021654546), // MADDV_B
1786 : UINT64_C(2027946002), // MADDV_D
1787 : UINT64_C(2023751698), // MADDV_H
1788 : UINT64_C(2025848850), // MADDV_W
1789 : UINT64_C(1275068449), // MADD_D32
1790 : UINT64_C(1409286153), // MADD_D32_MM
1791 : UINT64_C(1275068449), // MADD_D64
1792 : UINT64_C(1879048192), // MADD_DSP
1793 : UINT64_C(2748), // MADD_DSP_MM
1794 : UINT64_C(52028), // MADD_MM
1795 : UINT64_C(2034237468), // MADD_Q_H
1796 : UINT64_C(2036334620), // MADD_Q_W
1797 : UINT64_C(1275068448), // MADD_S
1798 : UINT64_C(1409286145), // MADD_S_MM
1799 : UINT64_C(2080375856), // MAQ_SA_W_PHL
1800 : UINT64_C(14972), // MAQ_SA_W_PHL_MM
1801 : UINT64_C(2080375984), // MAQ_SA_W_PHR
1802 : UINT64_C(10876), // MAQ_SA_W_PHR_MM
1803 : UINT64_C(2080376112), // MAQ_S_W_PHL
1804 : UINT64_C(6780), // MAQ_S_W_PHL_MM
1805 : UINT64_C(2080376240), // MAQ_S_W_PHR
1806 : UINT64_C(2684), // MAQ_S_W_PHR_MM
1807 : UINT64_C(1176502303), // MAXA_D
1808 : UINT64_C(1409286699), // MAXA_D_MMR6
1809 : UINT64_C(1174405151), // MAXA_S
1810 : UINT64_C(1409286187), // MAXA_S_MMR6
1811 : UINT64_C(2030043142), // MAXI_S_B
1812 : UINT64_C(2036334598), // MAXI_S_D
1813 : UINT64_C(2032140294), // MAXI_S_H
1814 : UINT64_C(2034237446), // MAXI_S_W
1815 : UINT64_C(2038431750), // MAXI_U_B
1816 : UINT64_C(2044723206), // MAXI_U_D
1817 : UINT64_C(2040528902), // MAXI_U_H
1818 : UINT64_C(2042626054), // MAXI_U_W
1819 : UINT64_C(2063597582), // MAX_A_B
1820 : UINT64_C(2069889038), // MAX_A_D
1821 : UINT64_C(2065694734), // MAX_A_H
1822 : UINT64_C(2067791886), // MAX_A_W
1823 : UINT64_C(1176502301), // MAX_D
1824 : UINT64_C(1409286667), // MAX_D_MMR6
1825 : UINT64_C(1174405149), // MAX_S
1826 : UINT64_C(2030043150), // MAX_S_B
1827 : UINT64_C(2036334606), // MAX_S_D
1828 : UINT64_C(2032140302), // MAX_S_H
1829 : UINT64_C(1409286155), // MAX_S_MMR6
1830 : UINT64_C(2034237454), // MAX_S_W
1831 : UINT64_C(2038431758), // MAX_U_B
1832 : UINT64_C(2044723214), // MAX_U_D
1833 : UINT64_C(2040528910), // MAX_U_H
1834 : UINT64_C(2042626062), // MAX_U_W
1835 : UINT64_C(1073741824), // MFC0
1836 : UINT64_C(252), // MFC0_MMR6
1837 : UINT64_C(1140850688), // MFC1
1838 : UINT64_C(1140850688), // MFC1_D64
1839 : UINT64_C(1409294395), // MFC1_MM
1840 : UINT64_C(1409294395), // MFC1_MMR6
1841 : UINT64_C(1207959552), // MFC2
1842 : UINT64_C(19772), // MFC2_MMR6
1843 : UINT64_C(1080033280), // MFGC0
1844 : UINT64_C(1276), // MFGC0_MM
1845 : UINT64_C(244), // MFHC0_MMR6
1846 : UINT64_C(1147142144), // MFHC1_D32
1847 : UINT64_C(1409298491), // MFHC1_D32_MM
1848 : UINT64_C(1147142144), // MFHC1_D64
1849 : UINT64_C(1409298491), // MFHC1_D64_MM
1850 : UINT64_C(36156), // MFHC2_MMR6
1851 : UINT64_C(1080034304), // MFHGC0
1852 : UINT64_C(1268), // MFHGC0_MM
1853 : UINT64_C(16), // MFHI
1854 : UINT64_C(17920), // MFHI16_MM
1855 : UINT64_C(16), // MFHI64
1856 : UINT64_C(16), // MFHI_DSP
1857 : UINT64_C(124), // MFHI_DSP_MM
1858 : UINT64_C(3452), // MFHI_MM
1859 : UINT64_C(18), // MFLO
1860 : UINT64_C(17984), // MFLO16_MM
1861 : UINT64_C(18), // MFLO64
1862 : UINT64_C(18), // MFLO_DSP
1863 : UINT64_C(4220), // MFLO_DSP_MM
1864 : UINT64_C(7548), // MFLO_MM
1865 : UINT64_C(1090519040), // MFTR
1866 : UINT64_C(1176502302), // MINA_D
1867 : UINT64_C(1409286691), // MINA_D_MMR6
1868 : UINT64_C(1174405150), // MINA_S
1869 : UINT64_C(1409286179), // MINA_S_MMR6
1870 : UINT64_C(2046820358), // MINI_S_B
1871 : UINT64_C(2053111814), // MINI_S_D
1872 : UINT64_C(2048917510), // MINI_S_H
1873 : UINT64_C(2051014662), // MINI_S_W
1874 : UINT64_C(2055208966), // MINI_U_B
1875 : UINT64_C(2061500422), // MINI_U_D
1876 : UINT64_C(2057306118), // MINI_U_H
1877 : UINT64_C(2059403270), // MINI_U_W
1878 : UINT64_C(2071986190), // MIN_A_B
1879 : UINT64_C(2078277646), // MIN_A_D
1880 : UINT64_C(2074083342), // MIN_A_H
1881 : UINT64_C(2076180494), // MIN_A_W
1882 : UINT64_C(1176502300), // MIN_D
1883 : UINT64_C(1409286659), // MIN_D_MMR6
1884 : UINT64_C(1174405148), // MIN_S
1885 : UINT64_C(2046820366), // MIN_S_B
1886 : UINT64_C(2053111822), // MIN_S_D
1887 : UINT64_C(2048917518), // MIN_S_H
1888 : UINT64_C(1409286147), // MIN_S_MMR6
1889 : UINT64_C(2051014670), // MIN_S_W
1890 : UINT64_C(2055208974), // MIN_U_B
1891 : UINT64_C(2061500430), // MIN_U_D
1892 : UINT64_C(2057306126), // MIN_U_H
1893 : UINT64_C(2059403278), // MIN_U_W
1894 : UINT64_C(218), // MOD
1895 : UINT64_C(2080375952), // MODSUB
1896 : UINT64_C(661), // MODSUB_MM
1897 : UINT64_C(219), // MODU
1898 : UINT64_C(472), // MODU_MMR6
1899 : UINT64_C(344), // MOD_MMR6
1900 : UINT64_C(2063597586), // MOD_S_B
1901 : UINT64_C(2069889042), // MOD_S_D
1902 : UINT64_C(2065694738), // MOD_S_H
1903 : UINT64_C(2067791890), // MOD_S_W
1904 : UINT64_C(2071986194), // MOD_U_B
1905 : UINT64_C(2078277650), // MOD_U_D
1906 : UINT64_C(2074083346), // MOD_U_H
1907 : UINT64_C(2076180498), // MOD_U_W
1908 : UINT64_C(3072), // MOVE16_MM
1909 : UINT64_C(3072), // MOVE16_MMR6
1910 : UINT64_C(33792), // MOVEP_MM
1911 : UINT64_C(17412), // MOVEP_MMR6
1912 : UINT64_C(2025717785), // MOVE_V
1913 : UINT64_C(1176502289), // MOVF_D32
1914 : UINT64_C(1409286688), // MOVF_D32_MM
1915 : UINT64_C(1176502289), // MOVF_D64
1916 : UINT64_C(1), // MOVF_I
1917 : UINT64_C(1), // MOVF_I64
1918 : UINT64_C(1409286523), // MOVF_I_MM
1919 : UINT64_C(1174405137), // MOVF_S
1920 : UINT64_C(1409286176), // MOVF_S_MM
1921 : UINT64_C(1176502291), // MOVN_I64_D64
1922 : UINT64_C(11), // MOVN_I64_I
1923 : UINT64_C(11), // MOVN_I64_I64
1924 : UINT64_C(1174405139), // MOVN_I64_S
1925 : UINT64_C(1176502291), // MOVN_I_D32
1926 : UINT64_C(1409286456), // MOVN_I_D32_MM
1927 : UINT64_C(1176502291), // MOVN_I_D64
1928 : UINT64_C(11), // MOVN_I_I
1929 : UINT64_C(11), // MOVN_I_I64
1930 : UINT64_C(24), // MOVN_I_MM
1931 : UINT64_C(1174405139), // MOVN_I_S
1932 : UINT64_C(1409286200), // MOVN_I_S_MM
1933 : UINT64_C(1176567825), // MOVT_D32
1934 : UINT64_C(1409286752), // MOVT_D32_MM
1935 : UINT64_C(1176567825), // MOVT_D64
1936 : UINT64_C(65537), // MOVT_I
1937 : UINT64_C(65537), // MOVT_I64
1938 : UINT64_C(1409288571), // MOVT_I_MM
1939 : UINT64_C(1174470673), // MOVT_S
1940 : UINT64_C(1409286240), // MOVT_S_MM
1941 : UINT64_C(1176502290), // MOVZ_I64_D64
1942 : UINT64_C(10), // MOVZ_I64_I
1943 : UINT64_C(10), // MOVZ_I64_I64
1944 : UINT64_C(1174405138), // MOVZ_I64_S
1945 : UINT64_C(1176502290), // MOVZ_I_D32
1946 : UINT64_C(1409286520), // MOVZ_I_D32_MM
1947 : UINT64_C(1176502290), // MOVZ_I_D64
1948 : UINT64_C(10), // MOVZ_I_I
1949 : UINT64_C(10), // MOVZ_I_I64
1950 : UINT64_C(88), // MOVZ_I_MM
1951 : UINT64_C(1174405138), // MOVZ_I_S
1952 : UINT64_C(1409286264), // MOVZ_I_S_MM
1953 : UINT64_C(1879048196), // MSUB
1954 : UINT64_C(1176502297), // MSUBF_D
1955 : UINT64_C(1409287160), // MSUBF_D_MMR6
1956 : UINT64_C(1174405145), // MSUBF_S
1957 : UINT64_C(1409286648), // MSUBF_S_MMR6
1958 : UINT64_C(2071986204), // MSUBR_Q_H
1959 : UINT64_C(2074083356), // MSUBR_Q_W
1960 : UINT64_C(1879048197), // MSUBU
1961 : UINT64_C(1879048197), // MSUBU_DSP
1962 : UINT64_C(15036), // MSUBU_DSP_MM
1963 : UINT64_C(64316), // MSUBU_MM
1964 : UINT64_C(2030043154), // MSUBV_B
1965 : UINT64_C(2036334610), // MSUBV_D
1966 : UINT64_C(2032140306), // MSUBV_H
1967 : UINT64_C(2034237458), // MSUBV_W
1968 : UINT64_C(1275068457), // MSUB_D32
1969 : UINT64_C(1409286185), // MSUB_D32_MM
1970 : UINT64_C(1275068457), // MSUB_D64
1971 : UINT64_C(1879048196), // MSUB_DSP
1972 : UINT64_C(10940), // MSUB_DSP_MM
1973 : UINT64_C(60220), // MSUB_MM
1974 : UINT64_C(2038431772), // MSUB_Q_H
1975 : UINT64_C(2040528924), // MSUB_Q_W
1976 : UINT64_C(1275068456), // MSUB_S
1977 : UINT64_C(1409286177), // MSUB_S_MM
1978 : UINT64_C(1082130432), // MTC0
1979 : UINT64_C(764), // MTC0_MMR6
1980 : UINT64_C(1149239296), // MTC1
1981 : UINT64_C(1149239296), // MTC1_D64
1982 : UINT64_C(1409296443), // MTC1_D64_MM
1983 : UINT64_C(1409296443), // MTC1_MM
1984 : UINT64_C(1409296443), // MTC1_MMR6
1985 : UINT64_C(1216348160), // MTC2
1986 : UINT64_C(23868), // MTC2_MMR6
1987 : UINT64_C(1080033792), // MTGC0
1988 : UINT64_C(1788), // MTGC0_MM
1989 : UINT64_C(756), // MTHC0_MMR6
1990 : UINT64_C(1155530752), // MTHC1_D32
1991 : UINT64_C(1409300539), // MTHC1_D32_MM
1992 : UINT64_C(1155530752), // MTHC1_D64
1993 : UINT64_C(1409300539), // MTHC1_D64_MM
1994 : UINT64_C(40252), // MTHC2_MMR6
1995 : UINT64_C(1080034816), // MTHGC0
1996 : UINT64_C(1780), // MTHGC0_MM
1997 : UINT64_C(17), // MTHI
1998 : UINT64_C(17), // MTHI64
1999 : UINT64_C(17), // MTHI_DSP
2000 : UINT64_C(8316), // MTHI_DSP_MM
2001 : UINT64_C(11644), // MTHI_MM
2002 : UINT64_C(2080376824), // MTHLIP
2003 : UINT64_C(636), // MTHLIP_MM
2004 : UINT64_C(19), // MTLO
2005 : UINT64_C(19), // MTLO64
2006 : UINT64_C(19), // MTLO_DSP
2007 : UINT64_C(12412), // MTLO_DSP_MM
2008 : UINT64_C(15740), // MTLO_MM
2009 : UINT64_C(1879048200), // MTM0
2010 : UINT64_C(1879048204), // MTM1
2011 : UINT64_C(1879048205), // MTM2
2012 : UINT64_C(1879048201), // MTP0
2013 : UINT64_C(1879048202), // MTP1
2014 : UINT64_C(1879048203), // MTP2
2015 : UINT64_C(1098907648), // MTTR
2016 : UINT64_C(216), // MUH
2017 : UINT64_C(217), // MUHU
2018 : UINT64_C(216), // MUHU_MMR6
2019 : UINT64_C(88), // MUH_MMR6
2020 : UINT64_C(1879048194), // MUL
2021 : UINT64_C(2080376592), // MULEQ_S_W_PHL
2022 : UINT64_C(37), // MULEQ_S_W_PHL_MM
2023 : UINT64_C(2080376656), // MULEQ_S_W_PHR
2024 : UINT64_C(101), // MULEQ_S_W_PHR_MM
2025 : UINT64_C(2080375184), // MULEU_S_PH_QBL
2026 : UINT64_C(149), // MULEU_S_PH_QBL_MM
2027 : UINT64_C(2080375248), // MULEU_S_PH_QBR
2028 : UINT64_C(213), // MULEU_S_PH_QBR_MM
2029 : UINT64_C(2080376784), // MULQ_RS_PH
2030 : UINT64_C(277), // MULQ_RS_PH_MM
2031 : UINT64_C(2080376280), // MULQ_RS_W
2032 : UINT64_C(405), // MULQ_RS_W_MMR2
2033 : UINT64_C(2080376720), // MULQ_S_PH
2034 : UINT64_C(341), // MULQ_S_PH_MMR2
2035 : UINT64_C(2080376216), // MULQ_S_W
2036 : UINT64_C(469), // MULQ_S_W_MMR2
2037 : UINT64_C(2063597596), // MULR_Q_H
2038 : UINT64_C(2065694748), // MULR_Q_W
2039 : UINT64_C(2080375216), // MULSAQ_S_W_PH
2040 : UINT64_C(15548), // MULSAQ_S_W_PH_MM
2041 : UINT64_C(2080374960), // MULSA_W_PH
2042 : UINT64_C(11452), // MULSA_W_PH_MMR2
2043 : UINT64_C(24), // MULT
2044 : UINT64_C(25), // MULTU_DSP
2045 : UINT64_C(7356), // MULTU_DSP_MM
2046 : UINT64_C(24), // MULT_DSP
2047 : UINT64_C(3260), // MULT_DSP_MM
2048 : UINT64_C(35644), // MULT_MM
2049 : UINT64_C(25), // MULTu
2050 : UINT64_C(39740), // MULTu_MM
2051 : UINT64_C(153), // MULU
2052 : UINT64_C(152), // MULU_MMR6
2053 : UINT64_C(2013265938), // MULV_B
2054 : UINT64_C(2019557394), // MULV_D
2055 : UINT64_C(2015363090), // MULV_H
2056 : UINT64_C(2017460242), // MULV_W
2057 : UINT64_C(528), // MUL_MM
2058 : UINT64_C(24), // MUL_MMR6
2059 : UINT64_C(2080375576), // MUL_PH
2060 : UINT64_C(45), // MUL_PH_MMR2
2061 : UINT64_C(2030043164), // MUL_Q_H
2062 : UINT64_C(2032140316), // MUL_Q_W
2063 : UINT64_C(152), // MUL_R6
2064 : UINT64_C(2080375704), // MUL_S_PH
2065 : UINT64_C(1069), // MUL_S_PH_MMR2
2066 : UINT64_C(59408), // Mfhi16
2067 : UINT64_C(59410), // Mflo16
2068 : UINT64_C(25856), // Move32R16
2069 : UINT64_C(26368), // MoveR3216
2070 : UINT64_C(2064121886), // NLOC_B
2071 : UINT64_C(2064318494), // NLOC_D
2072 : UINT64_C(2064187422), // NLOC_H
2073 : UINT64_C(2064252958), // NLOC_W
2074 : UINT64_C(2064384030), // NLZC_B
2075 : UINT64_C(2064580638), // NLZC_D
2076 : UINT64_C(2064449566), // NLZC_H
2077 : UINT64_C(2064515102), // NLZC_W
2078 : UINT64_C(1275068465), // NMADD_D32
2079 : UINT64_C(1409286154), // NMADD_D32_MM
2080 : UINT64_C(1275068465), // NMADD_D64
2081 : UINT64_C(1275068464), // NMADD_S
2082 : UINT64_C(1409286146), // NMADD_S_MM
2083 : UINT64_C(1275068473), // NMSUB_D32
2084 : UINT64_C(1409286186), // NMSUB_D32_MM
2085 : UINT64_C(1275068473), // NMSUB_D64
2086 : UINT64_C(1275068472), // NMSUB_S
2087 : UINT64_C(1409286178), // NMSUB_S_MM
2088 : UINT64_C(39), // NOR
2089 : UINT64_C(39), // NOR64
2090 : UINT64_C(2046820352), // NORI_B
2091 : UINT64_C(720), // NOR_MM
2092 : UINT64_C(720), // NOR_MMR6
2093 : UINT64_C(2017460254), // NOR_V
2094 : UINT64_C(17408), // NOT16_MM
2095 : UINT64_C(17408), // NOT16_MMR6
2096 : UINT64_C(59421), // NegRxRy16
2097 : UINT64_C(59407), // NotRxRy16
2098 : UINT64_C(37), // OR
2099 : UINT64_C(17600), // OR16_MM
2100 : UINT64_C(17417), // OR16_MMR6
2101 : UINT64_C(37), // OR64
2102 : UINT64_C(2030043136), // ORI_B
2103 : UINT64_C(1342177280), // ORI_MMR6
2104 : UINT64_C(656), // OR_MM
2105 : UINT64_C(656), // OR_MMR6
2106 : UINT64_C(2015363102), // OR_V
2107 : UINT64_C(872415232), // ORi
2108 : UINT64_C(872415232), // ORi64
2109 : UINT64_C(1342177280), // ORi_MM
2110 : UINT64_C(59405), // OrRxRxRy16
2111 : UINT64_C(2080375697), // PACKRL_PH
2112 : UINT64_C(429), // PACKRL_PH_MM
2113 : UINT64_C(320), // PAUSE
2114 : UINT64_C(10240), // PAUSE_MM
2115 : UINT64_C(10240), // PAUSE_MMR6
2116 : UINT64_C(2030043156), // PCKEV_B
2117 : UINT64_C(2036334612), // PCKEV_D
2118 : UINT64_C(2032140308), // PCKEV_H
2119 : UINT64_C(2034237460), // PCKEV_W
2120 : UINT64_C(2038431764), // PCKOD_B
2121 : UINT64_C(2044723220), // PCKOD_D
2122 : UINT64_C(2040528916), // PCKOD_H
2123 : UINT64_C(2042626068), // PCKOD_W
2124 : UINT64_C(2063859742), // PCNT_B
2125 : UINT64_C(2064056350), // PCNT_D
2126 : UINT64_C(2063925278), // PCNT_H
2127 : UINT64_C(2063990814), // PCNT_W
2128 : UINT64_C(2080375505), // PICK_PH
2129 : UINT64_C(557), // PICK_PH_MM
2130 : UINT64_C(2080374993), // PICK_QB
2131 : UINT64_C(493), // PICK_QB_MM
2132 : UINT64_C(1186988076), // PLL_PS64
2133 : UINT64_C(1186988077), // PLU_PS64
2134 : UINT64_C(1879048236), // POP
2135 : UINT64_C(2080375058), // PRECEQU_PH_QBL
2136 : UINT64_C(2080375186), // PRECEQU_PH_QBLA
2137 : UINT64_C(29500), // PRECEQU_PH_QBLA_MM
2138 : UINT64_C(28988), // PRECEQU_PH_QBL_MM
2139 : UINT64_C(2080375122), // PRECEQU_PH_QBR
2140 : UINT64_C(2080375250), // PRECEQU_PH_QBRA
2141 : UINT64_C(37692), // PRECEQU_PH_QBRA_MM
2142 : UINT64_C(37180), // PRECEQU_PH_QBR_MM
2143 : UINT64_C(2080375570), // PRECEQ_W_PHL
2144 : UINT64_C(20796), // PRECEQ_W_PHL_MM
2145 : UINT64_C(2080375634), // PRECEQ_W_PHR
2146 : UINT64_C(24892), // PRECEQ_W_PHR_MM
2147 : UINT64_C(2080376594), // PRECEU_PH_QBL
2148 : UINT64_C(2080376722), // PRECEU_PH_QBLA
2149 : UINT64_C(45884), // PRECEU_PH_QBLA_MM
2150 : UINT64_C(45372), // PRECEU_PH_QBL_MM
2151 : UINT64_C(2080376658), // PRECEU_PH_QBR
2152 : UINT64_C(2080376786), // PRECEU_PH_QBRA
2153 : UINT64_C(54076), // PRECEU_PH_QBRA_MM
2154 : UINT64_C(53564), // PRECEU_PH_QBR_MM
2155 : UINT64_C(2080375761), // PRECRQU_S_QB_PH
2156 : UINT64_C(365), // PRECRQU_S_QB_PH_MM
2157 : UINT64_C(2080376081), // PRECRQ_PH_W
2158 : UINT64_C(237), // PRECRQ_PH_W_MM
2159 : UINT64_C(2080375569), // PRECRQ_QB_PH
2160 : UINT64_C(173), // PRECRQ_QB_PH_MM
2161 : UINT64_C(2080376145), // PRECRQ_RS_PH_W
2162 : UINT64_C(301), // PRECRQ_RS_PH_W_MM
2163 : UINT64_C(2080375633), // PRECR_QB_PH
2164 : UINT64_C(109), // PRECR_QB_PH_MMR2
2165 : UINT64_C(2080376721), // PRECR_SRA_PH_W
2166 : UINT64_C(973), // PRECR_SRA_PH_W_MMR2
2167 : UINT64_C(2080376785), // PRECR_SRA_R_PH_W
2168 : UINT64_C(1997), // PRECR_SRA_R_PH_W_MMR2
2169 : UINT64_C(3422552064), // PREF
2170 : UINT64_C(2080374819), // PREFE
2171 : UINT64_C(1610654720), // PREFE_MM
2172 : UINT64_C(1409286560), // PREFX_MM
2173 : UINT64_C(1610620928), // PREF_MM
2174 : UINT64_C(1610620928), // PREF_MMR6
2175 : UINT64_C(2080374837), // PREF_R6
2176 : UINT64_C(2080374897), // PREPEND
2177 : UINT64_C(597), // PREPEND_MMR2
2178 : UINT64_C(2080376080), // RADDU_W_QB
2179 : UINT64_C(61756), // RADDU_W_QB_MM
2180 : UINT64_C(2080375992), // RDDSP
2181 : UINT64_C(1660), // RDDSP_MM
2182 : UINT64_C(2080374843), // RDHWR
2183 : UINT64_C(2080374843), // RDHWR64
2184 : UINT64_C(27452), // RDHWR_MM
2185 : UINT64_C(448), // RDHWR_MMR6
2186 : UINT64_C(57724), // RDPGPR_MMR6
2187 : UINT64_C(1176502293), // RECIP_D32
2188 : UINT64_C(1409307195), // RECIP_D32_MM
2189 : UINT64_C(1176502293), // RECIP_D64
2190 : UINT64_C(1409307195), // RECIP_D64_MM
2191 : UINT64_C(1174405141), // RECIP_S
2192 : UINT64_C(1409290811), // RECIP_S_MM
2193 : UINT64_C(2080375506), // REPLV_PH
2194 : UINT64_C(828), // REPLV_PH_MM
2195 : UINT64_C(2080374994), // REPLV_QB
2196 : UINT64_C(4924), // REPLV_QB_MM
2197 : UINT64_C(2080375442), // REPL_PH
2198 : UINT64_C(61), // REPL_PH_MM
2199 : UINT64_C(2080374930), // REPL_QB
2200 : UINT64_C(1532), // REPL_QB_MM
2201 : UINT64_C(1176502298), // RINT_D
2202 : UINT64_C(1409286688), // RINT_D_MMR6
2203 : UINT64_C(1174405146), // RINT_S
2204 : UINT64_C(1409286176), // RINT_S_MMR6
2205 : UINT64_C(2097154), // ROTR
2206 : UINT64_C(70), // ROTRV
2207 : UINT64_C(208), // ROTRV_MM
2208 : UINT64_C(192), // ROTR_MM
2209 : UINT64_C(1176502280), // ROUND_L_D64
2210 : UINT64_C(1409315643), // ROUND_L_D_MMR6
2211 : UINT64_C(1174405128), // ROUND_L_S
2212 : UINT64_C(1409299259), // ROUND_L_S_MMR6
2213 : UINT64_C(1176502284), // ROUND_W_D32
2214 : UINT64_C(1176502284), // ROUND_W_D64
2215 : UINT64_C(1409317691), // ROUND_W_D_MMR6
2216 : UINT64_C(1409317691), // ROUND_W_MM
2217 : UINT64_C(1174405132), // ROUND_W_S
2218 : UINT64_C(1409301307), // ROUND_W_S_MM
2219 : UINT64_C(1409301307), // ROUND_W_S_MMR6
2220 : UINT64_C(1176502294), // RSQRT_D32
2221 : UINT64_C(1409303099), // RSQRT_D32_MM
2222 : UINT64_C(1176502294), // RSQRT_D64
2223 : UINT64_C(1409303099), // RSQRT_D64_MM
2224 : UINT64_C(1174405142), // RSQRT_S
2225 : UINT64_C(1409286715), // RSQRT_S_MM
2226 : UINT64_C(25728), // Restore16
2227 : UINT64_C(25728), // RestoreX16
2228 : UINT64_C(2020605962), // SAT_S_B
2229 : UINT64_C(2013265930), // SAT_S_D
2230 : UINT64_C(2019557386), // SAT_S_H
2231 : UINT64_C(2017460234), // SAT_S_W
2232 : UINT64_C(2028994570), // SAT_U_B
2233 : UINT64_C(2021654538), // SAT_U_D
2234 : UINT64_C(2027945994), // SAT_U_H
2235 : UINT64_C(2025848842), // SAT_U_W
2236 : UINT64_C(2684354560), // SB
2237 : UINT64_C(34816), // SB16_MM
2238 : UINT64_C(34816), // SB16_MMR6
2239 : UINT64_C(2684354560), // SB64
2240 : UINT64_C(2080374812), // SBE
2241 : UINT64_C(1610655744), // SBE_MM
2242 : UINT64_C(402653184), // SB_MM
2243 : UINT64_C(402653184), // SB_MMR6
2244 : UINT64_C(3758096384), // SC
2245 : UINT64_C(3758096384), // SC64
2246 : UINT64_C(2080374822), // SC64_R6
2247 : UINT64_C(4026531840), // SCD
2248 : UINT64_C(2080374823), // SCD_R6
2249 : UINT64_C(2080374814), // SCE
2250 : UINT64_C(1610656768), // SCE_MM
2251 : UINT64_C(1610657792), // SC_MM
2252 : UINT64_C(1610657792), // SC_MMR6
2253 : UINT64_C(2080374822), // SC_R6
2254 : UINT64_C(4227858432), // SD
2255 : UINT64_C(1879048255), // SDBBP
2256 : UINT64_C(18112), // SDBBP16_MM
2257 : UINT64_C(17467), // SDBBP16_MMR6
2258 : UINT64_C(56188), // SDBBP_MM
2259 : UINT64_C(56188), // SDBBP_MMR6
2260 : UINT64_C(14), // SDBBP_R6
2261 : UINT64_C(4093640704), // SDC1
2262 : UINT64_C(4093640704), // SDC164
2263 : UINT64_C(3087007744), // SDC1_D64_MMR6
2264 : UINT64_C(3087007744), // SDC1_MM
2265 : UINT64_C(4160749568), // SDC2
2266 : UINT64_C(536911872), // SDC2_MMR6
2267 : UINT64_C(1239416832), // SDC2_R6
2268 : UINT64_C(4227858432), // SDC3
2269 : UINT64_C(26), // SDIV
2270 : UINT64_C(43836), // SDIV_MM
2271 : UINT64_C(2952790016), // SDL
2272 : UINT64_C(3019898880), // SDR
2273 : UINT64_C(1275068425), // SDXC1
2274 : UINT64_C(1275068425), // SDXC164
2275 : UINT64_C(2080375840), // SEB
2276 : UINT64_C(2080375840), // SEB64
2277 : UINT64_C(11068), // SEB_MM
2278 : UINT64_C(2080376352), // SEH
2279 : UINT64_C(2080376352), // SEH64
2280 : UINT64_C(15164), // SEH_MM
2281 : UINT64_C(53), // SELEQZ
2282 : UINT64_C(53), // SELEQZ64
2283 : UINT64_C(1176502292), // SELEQZ_D
2284 : UINT64_C(1409286712), // SELEQZ_D_MMR6
2285 : UINT64_C(320), // SELEQZ_MMR6
2286 : UINT64_C(1174405140), // SELEQZ_S
2287 : UINT64_C(1409286200), // SELEQZ_S_MMR6
2288 : UINT64_C(55), // SELNEZ
2289 : UINT64_C(55), // SELNEZ64
2290 : UINT64_C(1176502295), // SELNEZ_D
2291 : UINT64_C(1409286776), // SELNEZ_D_MMR6
2292 : UINT64_C(384), // SELNEZ_MMR6
2293 : UINT64_C(1174405143), // SELNEZ_S
2294 : UINT64_C(1409286264), // SELNEZ_S_MMR6
2295 : UINT64_C(1176502288), // SEL_D
2296 : UINT64_C(1409286840), // SEL_D_MMR6
2297 : UINT64_C(1174405136), // SEL_S
2298 : UINT64_C(1409286328), // SEL_S_MMR6
2299 : UINT64_C(1879048234), // SEQ
2300 : UINT64_C(1879048238), // SEQi
2301 : UINT64_C(2751463424), // SH
2302 : UINT64_C(43008), // SH16_MM
2303 : UINT64_C(43008), // SH16_MMR6
2304 : UINT64_C(2751463424), // SH64
2305 : UINT64_C(2080374813), // SHE
2306 : UINT64_C(1610656256), // SHE_MM
2307 : UINT64_C(2013265922), // SHF_B
2308 : UINT64_C(2030043138), // SHF_H
2309 : UINT64_C(2046820354), // SHF_W
2310 : UINT64_C(2080376504), // SHILO
2311 : UINT64_C(2080376568), // SHILOV
2312 : UINT64_C(4732), // SHILOV_MM
2313 : UINT64_C(29), // SHILO_MM
2314 : UINT64_C(2080375443), // SHLLV_PH
2315 : UINT64_C(14), // SHLLV_PH_MM
2316 : UINT64_C(2080374931), // SHLLV_QB
2317 : UINT64_C(917), // SHLLV_QB_MM
2318 : UINT64_C(2080375699), // SHLLV_S_PH
2319 : UINT64_C(1038), // SHLLV_S_PH_MM
2320 : UINT64_C(2080376211), // SHLLV_S_W
2321 : UINT64_C(981), // SHLLV_S_W_MM
2322 : UINT64_C(2080375315), // SHLL_PH
2323 : UINT64_C(949), // SHLL_PH_MM
2324 : UINT64_C(2080374803), // SHLL_QB
2325 : UINT64_C(2172), // SHLL_QB_MM
2326 : UINT64_C(2080375571), // SHLL_S_PH
2327 : UINT64_C(2997), // SHLL_S_PH_MM
2328 : UINT64_C(2080376083), // SHLL_S_W
2329 : UINT64_C(1013), // SHLL_S_W_MM
2330 : UINT64_C(2080375507), // SHRAV_PH
2331 : UINT64_C(397), // SHRAV_PH_MM
2332 : UINT64_C(2080375187), // SHRAV_QB
2333 : UINT64_C(461), // SHRAV_QB_MMR2
2334 : UINT64_C(2080375763), // SHRAV_R_PH
2335 : UINT64_C(1421), // SHRAV_R_PH_MM
2336 : UINT64_C(2080375251), // SHRAV_R_QB
2337 : UINT64_C(1485), // SHRAV_R_QB_MMR2
2338 : UINT64_C(2080376275), // SHRAV_R_W
2339 : UINT64_C(725), // SHRAV_R_W_MM
2340 : UINT64_C(2080375379), // SHRA_PH
2341 : UINT64_C(821), // SHRA_PH_MM
2342 : UINT64_C(2080375059), // SHRA_QB
2343 : UINT64_C(508), // SHRA_QB_MMR2
2344 : UINT64_C(2080375635), // SHRA_R_PH
2345 : UINT64_C(1845), // SHRA_R_PH_MM
2346 : UINT64_C(2080375123), // SHRA_R_QB
2347 : UINT64_C(4604), // SHRA_R_QB_MMR2
2348 : UINT64_C(2080376147), // SHRA_R_W
2349 : UINT64_C(757), // SHRA_R_W_MM
2350 : UINT64_C(2080376531), // SHRLV_PH
2351 : UINT64_C(789), // SHRLV_PH_MMR2
2352 : UINT64_C(2080374995), // SHRLV_QB
2353 : UINT64_C(853), // SHRLV_QB_MM
2354 : UINT64_C(2080376403), // SHRL_PH
2355 : UINT64_C(1020), // SHRL_PH_MMR2
2356 : UINT64_C(2080374867), // SHRL_QB
2357 : UINT64_C(6268), // SHRL_QB_MM
2358 : UINT64_C(939524096), // SH_MM
2359 : UINT64_C(939524096), // SH_MMR6
2360 : UINT64_C(2013265945), // SLDI_B
2361 : UINT64_C(2016935961), // SLDI_D
2362 : UINT64_C(2015363097), // SLDI_H
2363 : UINT64_C(2016411673), // SLDI_W
2364 : UINT64_C(2013265940), // SLD_B
2365 : UINT64_C(2019557396), // SLD_D
2366 : UINT64_C(2015363092), // SLD_H
2367 : UINT64_C(2017460244), // SLD_W
2368 : UINT64_C(0), // SLL
2369 : UINT64_C(9216), // SLL16_MM
2370 : UINT64_C(9216), // SLL16_MMR6
2371 : UINT64_C(0), // SLL64_32
2372 : UINT64_C(0), // SLL64_64
2373 : UINT64_C(2020605961), // SLLI_B
2374 : UINT64_C(2013265929), // SLLI_D
2375 : UINT64_C(2019557385), // SLLI_H
2376 : UINT64_C(2017460233), // SLLI_W
2377 : UINT64_C(4), // SLLV
2378 : UINT64_C(16), // SLLV_MM
2379 : UINT64_C(2013265933), // SLL_B
2380 : UINT64_C(2019557389), // SLL_D
2381 : UINT64_C(2015363085), // SLL_H
2382 : UINT64_C(0), // SLL_MM
2383 : UINT64_C(0), // SLL_MMR6
2384 : UINT64_C(2017460237), // SLL_W
2385 : UINT64_C(42), // SLT
2386 : UINT64_C(42), // SLT64
2387 : UINT64_C(848), // SLT_MM
2388 : UINT64_C(671088640), // SLTi
2389 : UINT64_C(671088640), // SLTi64
2390 : UINT64_C(2415919104), // SLTi_MM
2391 : UINT64_C(738197504), // SLTiu
2392 : UINT64_C(738197504), // SLTiu64
2393 : UINT64_C(2952790016), // SLTiu_MM
2394 : UINT64_C(43), // SLTu
2395 : UINT64_C(43), // SLTu64
2396 : UINT64_C(912), // SLTu_MM
2397 : UINT64_C(1879048235), // SNE
2398 : UINT64_C(1879048239), // SNEi
2399 : UINT64_C(2017460249), // SPLATI_B
2400 : UINT64_C(2021130265), // SPLATI_D
2401 : UINT64_C(2019557401), // SPLATI_H
2402 : UINT64_C(2020605977), // SPLATI_W
2403 : UINT64_C(2021654548), // SPLAT_B
2404 : UINT64_C(2027946004), // SPLAT_D
2405 : UINT64_C(2023751700), // SPLAT_H
2406 : UINT64_C(2025848852), // SPLAT_W
2407 : UINT64_C(3), // SRA
2408 : UINT64_C(2028994569), // SRAI_B
2409 : UINT64_C(2021654537), // SRAI_D
2410 : UINT64_C(2027945993), // SRAI_H
2411 : UINT64_C(2025848841), // SRAI_W
2412 : UINT64_C(2037383178), // SRARI_B
2413 : UINT64_C(2030043146), // SRARI_D
2414 : UINT64_C(2036334602), // SRARI_H
2415 : UINT64_C(2034237450), // SRARI_W
2416 : UINT64_C(2021654549), // SRAR_B
2417 : UINT64_C(2027946005), // SRAR_D
2418 : UINT64_C(2023751701), // SRAR_H
2419 : UINT64_C(2025848853), // SRAR_W
2420 : UINT64_C(7), // SRAV
2421 : UINT64_C(144), // SRAV_MM
2422 : UINT64_C(2021654541), // SRA_B
2423 : UINT64_C(2027945997), // SRA_D
2424 : UINT64_C(2023751693), // SRA_H
2425 : UINT64_C(128), // SRA_MM
2426 : UINT64_C(2025848845), // SRA_W
2427 : UINT64_C(2), // SRL
2428 : UINT64_C(9217), // SRL16_MM
2429 : UINT64_C(9217), // SRL16_MMR6
2430 : UINT64_C(2037383177), // SRLI_B
2431 : UINT64_C(2030043145), // SRLI_D
2432 : UINT64_C(2036334601), // SRLI_H
2433 : UINT64_C(2034237449), // SRLI_W
2434 : UINT64_C(2045771786), // SRLRI_B
2435 : UINT64_C(2038431754), // SRLRI_D
2436 : UINT64_C(2044723210), // SRLRI_H
2437 : UINT64_C(2042626058), // SRLRI_W
2438 : UINT64_C(2030043157), // SRLR_B
2439 : UINT64_C(2036334613), // SRLR_D
2440 : UINT64_C(2032140309), // SRLR_H
2441 : UINT64_C(2034237461), // SRLR_W
2442 : UINT64_C(6), // SRLV
2443 : UINT64_C(80), // SRLV_MM
2444 : UINT64_C(2030043149), // SRL_B
2445 : UINT64_C(2036334605), // SRL_D
2446 : UINT64_C(2032140301), // SRL_H
2447 : UINT64_C(64), // SRL_MM
2448 : UINT64_C(2034237453), // SRL_W
2449 : UINT64_C(64), // SSNOP
2450 : UINT64_C(2048), // SSNOP_MM
2451 : UINT64_C(2048), // SSNOP_MMR6
2452 : UINT64_C(2013265956), // ST_B
2453 : UINT64_C(2013265959), // ST_D
2454 : UINT64_C(2013265957), // ST_H
2455 : UINT64_C(2013265958), // ST_W
2456 : UINT64_C(34), // SUB
2457 : UINT64_C(2080375384), // SUBQH_PH
2458 : UINT64_C(589), // SUBQH_PH_MMR2
2459 : UINT64_C(2080375512), // SUBQH_R_PH
2460 : UINT64_C(1613), // SUBQH_R_PH_MMR2
2461 : UINT64_C(2080376024), // SUBQH_R_W
2462 : UINT64_C(1677), // SUBQH_R_W_MMR2
2463 : UINT64_C(2080375896), // SUBQH_W
2464 : UINT64_C(653), // SUBQH_W_MMR2
2465 : UINT64_C(2080375504), // SUBQ_PH
2466 : UINT64_C(525), // SUBQ_PH_MM
2467 : UINT64_C(2080375760), // SUBQ_S_PH
2468 : UINT64_C(1549), // SUBQ_S_PH_MM
2469 : UINT64_C(2080376272), // SUBQ_S_W
2470 : UINT64_C(837), // SUBQ_S_W_MM
2471 : UINT64_C(2030043153), // SUBSUS_U_B
2472 : UINT64_C(2036334609), // SUBSUS_U_D
2473 : UINT64_C(2032140305), // SUBSUS_U_H
2474 : UINT64_C(2034237457), // SUBSUS_U_W
2475 : UINT64_C(2038431761), // SUBSUU_S_B
2476 : UINT64_C(2044723217), // SUBSUU_S_D
2477 : UINT64_C(2040528913), // SUBSUU_S_H
2478 : UINT64_C(2042626065), // SUBSUU_S_W
2479 : UINT64_C(2013265937), // SUBS_S_B
2480 : UINT64_C(2019557393), // SUBS_S_D
2481 : UINT64_C(2015363089), // SUBS_S_H
2482 : UINT64_C(2017460241), // SUBS_S_W
2483 : UINT64_C(2021654545), // SUBS_U_B
2484 : UINT64_C(2027946001), // SUBS_U_D
2485 : UINT64_C(2023751697), // SUBS_U_H
2486 : UINT64_C(2025848849), // SUBS_U_W
2487 : UINT64_C(1025), // SUBU16_MM
2488 : UINT64_C(1025), // SUBU16_MMR6
2489 : UINT64_C(2080374872), // SUBUH_QB
2490 : UINT64_C(845), // SUBUH_QB_MMR2
2491 : UINT64_C(2080375000), // SUBUH_R_QB
2492 : UINT64_C(1869), // SUBUH_R_QB_MMR2
2493 : UINT64_C(464), // SUBU_MMR6
2494 : UINT64_C(2080375376), // SUBU_PH
2495 : UINT64_C(781), // SUBU_PH_MMR2
2496 : UINT64_C(2080374864), // SUBU_QB
2497 : UINT64_C(717), // SUBU_QB_MM
2498 : UINT64_C(2080375632), // SUBU_S_PH
2499 : UINT64_C(1805), // SUBU_S_PH_MMR2
2500 : UINT64_C(2080375120), // SUBU_S_QB
2501 : UINT64_C(1741), // SUBU_S_QB_MM
2502 : UINT64_C(2021654534), // SUBVI_B
2503 : UINT64_C(2027945990), // SUBVI_D
2504 : UINT64_C(2023751686), // SUBVI_H
2505 : UINT64_C(2025848838), // SUBVI_W
2506 : UINT64_C(2021654542), // SUBV_B
2507 : UINT64_C(2027945998), // SUBV_D
2508 : UINT64_C(2023751694), // SUBV_H
2509 : UINT64_C(2025848846), // SUBV_W
2510 : UINT64_C(400), // SUB_MM
2511 : UINT64_C(400), // SUB_MMR6
2512 : UINT64_C(35), // SUBu
2513 : UINT64_C(464), // SUBu_MM
2514 : UINT64_C(1275068429), // SUXC1
2515 : UINT64_C(1275068429), // SUXC164
2516 : UINT64_C(1409286536), // SUXC1_MM
2517 : UINT64_C(2885681152), // SW
2518 : UINT64_C(59392), // SW16_MM
2519 : UINT64_C(59392), // SW16_MMR6
2520 : UINT64_C(2885681152), // SW64
2521 : UINT64_C(3825205248), // SWC1
2522 : UINT64_C(2550136832), // SWC1_MM
2523 : UINT64_C(3892314112), // SWC2
2524 : UINT64_C(536903680), // SWC2_MMR6
2525 : UINT64_C(1231028224), // SWC2_R6
2526 : UINT64_C(3959422976), // SWC3
2527 : UINT64_C(2885681152), // SWDSP
2528 : UINT64_C(4160749568), // SWDSP_MM
2529 : UINT64_C(2080374815), // SWE
2530 : UINT64_C(1610657280), // SWE_MM
2531 : UINT64_C(2818572288), // SWL
2532 : UINT64_C(2818572288), // SWL64
2533 : UINT64_C(2080374817), // SWLE
2534 : UINT64_C(1610653696), // SWLE_MM
2535 : UINT64_C(1610645504), // SWL_MM
2536 : UINT64_C(17728), // SWM16_MM
2537 : UINT64_C(17418), // SWM16_MMR6
2538 : UINT64_C(536924160), // SWM32_MM
2539 : UINT64_C(536907776), // SWP_MM
2540 : UINT64_C(3087007744), // SWR
2541 : UINT64_C(3087007744), // SWR64
2542 : UINT64_C(2080374818), // SWRE
2543 : UINT64_C(1610654208), // SWRE_MM
2544 : UINT64_C(1610649600), // SWR_MM
2545 : UINT64_C(51200), // SWSP_MM
2546 : UINT64_C(51200), // SWSP_MMR6
2547 : UINT64_C(1275068424), // SWXC1
2548 : UINT64_C(1409286280), // SWXC1_MM
2549 : UINT64_C(4160749568), // SW_MM
2550 : UINT64_C(4160749568), // SW_MMR6
2551 : UINT64_C(15), // SYNC
2552 : UINT64_C(69140480), // SYNCI
2553 : UINT64_C(1107296256), // SYNCI_MM
2554 : UINT64_C(1098907648), // SYNCI_MMR6
2555 : UINT64_C(27516), // SYNC_MM
2556 : UINT64_C(27516), // SYNC_MMR6
2557 : UINT64_C(12), // SYSCALL
2558 : UINT64_C(35708), // SYSCALL_MM
2559 : UINT64_C(25728), // Save16
2560 : UINT64_C(25728), // SaveX16
2561 : UINT64_C(4026580992), // SbRxRyOffMemX16
2562 : UINT64_C(59537), // SebRx16
2563 : UINT64_C(59569), // SehRx16
2564 : UINT64_C(4026583040), // ShRxRyOffMemX16
2565 : UINT64_C(4026544128), // SllX16
2566 : UINT64_C(59396), // SllvRxRy16
2567 : UINT64_C(59394), // SltRxRy16
2568 : UINT64_C(20480), // SltiRxImm16
2569 : UINT64_C(4026552320), // SltiRxImmX16
2570 : UINT64_C(22528), // SltiuRxImm16
2571 : UINT64_C(4026554368), // SltiuRxImmX16
2572 : UINT64_C(59395), // SltuRxRy16
2573 : UINT64_C(4026544131), // SraX16
2574 : UINT64_C(59399), // SravRxRy16
2575 : UINT64_C(4026544130), // SrlX16
2576 : UINT64_C(59398), // SrlvRxRy16
2577 : UINT64_C(57347), // SubuRxRyRz16
2578 : UINT64_C(4026587136), // SwRxRyOffMemX16
2579 : UINT64_C(4026585088), // SwRxSpImmX16
2580 : UINT64_C(52), // TEQ
2581 : UINT64_C(67895296), // TEQI
2582 : UINT64_C(1103101952), // TEQI_MM
2583 : UINT64_C(60), // TEQ_MM
2584 : UINT64_C(48), // TGE
2585 : UINT64_C(67633152), // TGEI
2586 : UINT64_C(67698688), // TGEIU
2587 : UINT64_C(1096810496), // TGEIU_MM
2588 : UINT64_C(1092616192), // TGEI_MM
2589 : UINT64_C(49), // TGEU
2590 : UINT64_C(1084), // TGEU_MM
2591 : UINT64_C(572), // TGE_MM
2592 : UINT64_C(1107296267), // TLBGINV
2593 : UINT64_C(1107296268), // TLBGINVF
2594 : UINT64_C(20860), // TLBGINVF_MM
2595 : UINT64_C(16764), // TLBGINV_MM
2596 : UINT64_C(1107296272), // TLBGP
2597 : UINT64_C(380), // TLBGP_MM
2598 : UINT64_C(1107296265), // TLBGR
2599 : UINT64_C(4476), // TLBGR_MM
2600 : UINT64_C(1107296266), // TLBGWI
2601 : UINT64_C(8572), // TLBGWI_MM
2602 : UINT64_C(1107296270), // TLBGWR
2603 : UINT64_C(12668), // TLBGWR_MM
2604 : UINT64_C(1107296259), // TLBINV
2605 : UINT64_C(1107296260), // TLBINVF
2606 : UINT64_C(21372), // TLBINVF_MMR6
2607 : UINT64_C(17276), // TLBINV_MMR6
2608 : UINT64_C(1107296264), // TLBP
2609 : UINT64_C(892), // TLBP_MM
2610 : UINT64_C(1107296257), // TLBR
2611 : UINT64_C(4988), // TLBR_MM
2612 : UINT64_C(1107296258), // TLBWI
2613 : UINT64_C(9084), // TLBWI_MM
2614 : UINT64_C(1107296262), // TLBWR
2615 : UINT64_C(13180), // TLBWR_MM
2616 : UINT64_C(50), // TLT
2617 : UINT64_C(67764224), // TLTI
2618 : UINT64_C(1094713344), // TLTIU_MM
2619 : UINT64_C(1090519040), // TLTI_MM
2620 : UINT64_C(51), // TLTU
2621 : UINT64_C(2620), // TLTU_MM
2622 : UINT64_C(2108), // TLT_MM
2623 : UINT64_C(54), // TNE
2624 : UINT64_C(68026368), // TNEI
2625 : UINT64_C(1098907648), // TNEI_MM
2626 : UINT64_C(3132), // TNE_MM
2627 : UINT64_C(1176502281), // TRUNC_L_D64
2628 : UINT64_C(1409311547), // TRUNC_L_D_MMR6
2629 : UINT64_C(1174405129), // TRUNC_L_S
2630 : UINT64_C(1409295163), // TRUNC_L_S_MMR6
2631 : UINT64_C(1176502285), // TRUNC_W_D32
2632 : UINT64_C(1176502285), // TRUNC_W_D64
2633 : UINT64_C(1409313595), // TRUNC_W_D_MMR6
2634 : UINT64_C(1409313595), // TRUNC_W_MM
2635 : UINT64_C(1174405133), // TRUNC_W_S
2636 : UINT64_C(1409297211), // TRUNC_W_S_MM
2637 : UINT64_C(1409297211), // TRUNC_W_S_MMR6
2638 : UINT64_C(67829760), // TTLTIU
2639 : UINT64_C(27), // UDIV
2640 : UINT64_C(47932), // UDIV_MM
2641 : UINT64_C(1879048209), // V3MULU
2642 : UINT64_C(1879048208), // VMM0
2643 : UINT64_C(1879048207), // VMULU
2644 : UINT64_C(2013265941), // VSHF_B
2645 : UINT64_C(2019557397), // VSHF_D
2646 : UINT64_C(2015363093), // VSHF_H
2647 : UINT64_C(2017460245), // VSHF_W
2648 : UINT64_C(1107296288), // WAIT
2649 : UINT64_C(37756), // WAIT_MM
2650 : UINT64_C(37756), // WAIT_MMR6
2651 : UINT64_C(2080376056), // WRDSP
2652 : UINT64_C(5756), // WRDSP_MM
2653 : UINT64_C(61820), // WRPGPR_MMR6
2654 : UINT64_C(2080374944), // WSBH
2655 : UINT64_C(31548), // WSBH_MM
2656 : UINT64_C(31548), // WSBH_MMR6
2657 : UINT64_C(38), // XOR
2658 : UINT64_C(17472), // XOR16_MM
2659 : UINT64_C(17416), // XOR16_MMR6
2660 : UINT64_C(38), // XOR64
2661 : UINT64_C(2063597568), // XORI_B
2662 : UINT64_C(1879048192), // XORI_MMR6
2663 : UINT64_C(784), // XOR_MM
2664 : UINT64_C(784), // XOR_MMR6
2665 : UINT64_C(2019557406), // XOR_V
2666 : UINT64_C(939524096), // XORi
2667 : UINT64_C(939524096), // XORi64
2668 : UINT64_C(1879048192), // XORi_MM
2669 : UINT64_C(59406), // XorRxRxRy16
2670 : UINT64_C(2080374793), // YIELD
2671 : UINT64_C(0)
2672 : };
2673 42741 : const unsigned opcode = MI.getOpcode();
2674 42741 : uint64_t Value = InstBits[opcode];
2675 : uint64_t op = 0;
2676 : (void)op; // suppress warning
2677 42741 : switch (opcode) {
2678 : case Mips::Break16:
2679 : case Mips::DERET:
2680 : case Mips::DERET_MM:
2681 : case Mips::DERET_MMR6:
2682 : case Mips::EHB:
2683 : case Mips::EHB_MM:
2684 : case Mips::EHB_MMR6:
2685 : case Mips::ERET:
2686 : case Mips::ERETNC:
2687 : case Mips::ERETNC_MMR6:
2688 : case Mips::ERET_MM:
2689 : case Mips::ERET_MMR6:
2690 : case Mips::JrRa16:
2691 : case Mips::JrcRa16:
2692 : case Mips::PAUSE:
2693 : case Mips::PAUSE_MM:
2694 : case Mips::PAUSE_MMR6:
2695 : case Mips::Restore16:
2696 : case Mips::RestoreX16:
2697 : case Mips::SSNOP:
2698 : case Mips::SSNOP_MM:
2699 : case Mips::SSNOP_MMR6:
2700 : case Mips::Save16:
2701 : case Mips::SaveX16:
2702 : case Mips::TLBGINV:
2703 : case Mips::TLBGINVF:
2704 : case Mips::TLBGINVF_MM:
2705 : case Mips::TLBGINV_MM:
2706 : case Mips::TLBGP:
2707 : case Mips::TLBGP_MM:
2708 : case Mips::TLBGR:
2709 : case Mips::TLBGR_MM:
2710 : case Mips::TLBGWI:
2711 : case Mips::TLBGWI_MM:
2712 : case Mips::TLBGWR:
2713 : case Mips::TLBGWR_MM:
2714 : case Mips::TLBINV:
2715 : case Mips::TLBINVF:
2716 : case Mips::TLBINVF_MMR6:
2717 : case Mips::TLBINV_MMR6:
2718 : case Mips::TLBP:
2719 : case Mips::TLBP_MM:
2720 : case Mips::TLBR:
2721 : case Mips::TLBR_MM:
2722 : case Mips::TLBWI:
2723 : case Mips::TLBWI_MM:
2724 : case Mips::TLBWR:
2725 : case Mips::TLBWR_MM:
2726 : case Mips::WAIT: {
2727 : break;
2728 : }
2729 : case Mips::MTHLIP:
2730 : case Mips::SHILOV: {
2731 : // op: ac
2732 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2733 4 : Value |= (op & UINT64_C(3)) << 11;
2734 : // op: rs
2735 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2736 4 : Value |= (op & UINT64_C(31)) << 21;
2737 4 : break;
2738 : }
2739 : case Mips::DPAQX_SA_W_PH:
2740 : case Mips::DPAQX_S_W_PH:
2741 : case Mips::DPAQ_SA_L_W:
2742 : case Mips::DPAQ_S_W_PH:
2743 : case Mips::DPAU_H_QBL:
2744 : case Mips::DPAU_H_QBR:
2745 : case Mips::DPAX_W_PH:
2746 : case Mips::DPA_W_PH:
2747 : case Mips::DPSQX_SA_W_PH:
2748 : case Mips::DPSQX_S_W_PH:
2749 : case Mips::DPSQ_SA_L_W:
2750 : case Mips::DPSQ_S_W_PH:
2751 : case Mips::DPSU_H_QBL:
2752 : case Mips::DPSU_H_QBR:
2753 : case Mips::DPSX_W_PH:
2754 : case Mips::DPS_W_PH:
2755 : case Mips::MADDU_DSP:
2756 : case Mips::MADD_DSP:
2757 : case Mips::MAQ_SA_W_PHL:
2758 : case Mips::MAQ_SA_W_PHR:
2759 : case Mips::MAQ_S_W_PHL:
2760 : case Mips::MAQ_S_W_PHR:
2761 : case Mips::MSUBU_DSP:
2762 : case Mips::MSUB_DSP:
2763 : case Mips::MULSAQ_S_W_PH:
2764 : case Mips::MULSA_W_PH:
2765 : case Mips::MULTU_DSP:
2766 : case Mips::MULT_DSP: {
2767 : // op: ac
2768 47 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2769 47 : Value |= (op & UINT64_C(3)) << 11;
2770 : // op: rs
2771 47 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2772 47 : Value |= (op & UINT64_C(31)) << 21;
2773 : // op: rt
2774 47 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2775 47 : Value |= (op & UINT64_C(31)) << 16;
2776 47 : break;
2777 : }
2778 : case Mips::SHILO: {
2779 : // op: ac
2780 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2781 4 : Value |= (op & UINT64_C(3)) << 11;
2782 : // op: shift
2783 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2784 4 : Value |= (op & UINT64_C(63)) << 20;
2785 4 : break;
2786 : }
2787 54 : case Mips::CACHEE:
2788 : case Mips::CACHE_R6:
2789 : case Mips::PREFE:
2790 : case Mips::PREF_R6: {
2791 : // op: addr
2792 54 : op = getMemEncoding(MI, 0, Fixups, STI);
2793 54 : Value |= (op & UINT64_C(2031616)) << 5;
2794 54 : Value |= (op & UINT64_C(511)) << 7;
2795 : // op: hint
2796 54 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2797 54 : Value |= (op & UINT64_C(31)) << 16;
2798 54 : break;
2799 : }
2800 8 : case Mips::SYNCI: {
2801 : // op: addr
2802 8 : op = getMemEncoding(MI, 0, Fixups, STI);
2803 8 : Value |= (op & UINT64_C(2031616)) << 5;
2804 8 : Value |= op & UINT64_C(65535);
2805 8 : break;
2806 : }
2807 21 : case Mips::CACHE:
2808 : case Mips::PREF: {
2809 : // op: addr
2810 21 : op = getMemEncoding(MI, 0, Fixups, STI);
2811 21 : Value |= (op & UINT64_C(2031616)) << 5;
2812 21 : Value |= op & UINT64_C(65535);
2813 : // op: hint
2814 21 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2815 21 : Value |= (op & UINT64_C(31)) << 16;
2816 21 : break;
2817 : }
2818 3 : case Mips::LD_B:
2819 : case Mips::ST_B: {
2820 : // op: addr
2821 3 : op = getMemEncoding(MI, 1, Fixups, STI);
2822 3 : Value |= (op & UINT64_C(1023)) << 16;
2823 3 : Value |= (op & UINT64_C(2031616)) >> 5;
2824 : // op: wd
2825 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2826 3 : Value |= (op & UINT64_C(31)) << 6;
2827 3 : break;
2828 : }
2829 303 : case Mips::LBE:
2830 : case Mips::LBuE:
2831 : case Mips::LHE:
2832 : case Mips::LHuE:
2833 : case Mips::LLE:
2834 : case Mips::LWE:
2835 : case Mips::LWLE:
2836 : case Mips::LWRE:
2837 : case Mips::SBE:
2838 : case Mips::SHE:
2839 : case Mips::SWE:
2840 : case Mips::SWLE:
2841 : case Mips::SWRE: {
2842 : // op: addr
2843 303 : op = getMemEncoding(MI, 1, Fixups, STI);
2844 303 : Value |= (op & UINT64_C(2031616)) << 5;
2845 303 : Value |= (op & UINT64_C(511)) << 7;
2846 : // op: hint
2847 303 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2848 303 : Value |= (op & UINT64_C(31)) << 16;
2849 303 : break;
2850 : }
2851 25 : case Mips::SCE: {
2852 : // op: addr
2853 25 : op = getMemEncoding(MI, 2, Fixups, STI);
2854 25 : Value |= (op & UINT64_C(2031616)) << 5;
2855 25 : Value |= (op & UINT64_C(511)) << 7;
2856 : // op: hint
2857 25 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2858 25 : Value |= (op & UINT64_C(31)) << 16;
2859 25 : break;
2860 : }
2861 5 : case Mips::LD_H:
2862 : case Mips::ST_H: {
2863 : // op: addr
2864 5 : op = getMemEncoding<1>(MI, 1, Fixups, STI);
2865 5 : Value |= (op & UINT64_C(1023)) << 16;
2866 5 : Value |= (op & UINT64_C(2031616)) >> 5;
2867 : // op: wd
2868 5 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2869 5 : Value |= (op & UINT64_C(31)) << 6;
2870 5 : break;
2871 : }
2872 6 : case Mips::LD_W:
2873 : case Mips::ST_W: {
2874 : // op: addr
2875 6 : op = getMemEncoding<2>(MI, 1, Fixups, STI);
2876 6 : Value |= (op & UINT64_C(1023)) << 16;
2877 6 : Value |= (op & UINT64_C(2031616)) >> 5;
2878 : // op: wd
2879 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2880 6 : Value |= (op & UINT64_C(31)) << 6;
2881 6 : break;
2882 : }
2883 9 : case Mips::LD_D:
2884 : case Mips::ST_D: {
2885 : // op: addr
2886 9 : op = getMemEncoding<3>(MI, 1, Fixups, STI);
2887 9 : Value |= (op & UINT64_C(1023)) << 16;
2888 9 : Value |= (op & UINT64_C(2031616)) >> 5;
2889 : // op: wd
2890 9 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2891 9 : Value |= (op & UINT64_C(31)) << 6;
2892 9 : break;
2893 : }
2894 8 : case Mips::CACHE_MM:
2895 : case Mips::CACHE_MMR6:
2896 : case Mips::PREF_MM:
2897 : case Mips::PREF_MMR6: {
2898 : // op: addr
2899 8 : op = getMemEncodingMMImm12(MI, 0, Fixups, STI);
2900 8 : Value |= op & UINT64_C(2031616);
2901 8 : Value |= op & UINT64_C(4095);
2902 : // op: hint
2903 8 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2904 8 : Value |= (op & UINT64_C(31)) << 21;
2905 8 : break;
2906 : }
2907 2 : case Mips::SYNCI_MM:
2908 : case Mips::SYNCI_MMR6: {
2909 : // op: addr
2910 2 : op = getMemEncodingMMImm16(MI, 0, Fixups, STI);
2911 2 : Value |= op & UINT64_C(2097151);
2912 2 : break;
2913 : }
2914 2 : case Mips::LBU_MMR6:
2915 : case Mips::LB_MMR6: {
2916 : // op: addr
2917 2 : op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
2918 2 : Value |= op & UINT64_C(2097151);
2919 : // op: rt
2920 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2921 2 : Value |= (op & UINT64_C(31)) << 21;
2922 2 : break;
2923 : }
2924 12 : case Mips::CACHEE_MM:
2925 : case Mips::PREFE_MM: {
2926 : // op: addr
2927 12 : op = getMemEncodingMMImm9(MI, 0, Fixups, STI);
2928 12 : Value |= op & UINT64_C(2031616);
2929 12 : Value |= op & UINT64_C(511);
2930 : // op: hint
2931 12 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2932 12 : Value |= (op & UINT64_C(31)) << 21;
2933 12 : break;
2934 : }
2935 : case Mips::HYPCALL: {
2936 : // op: code_
2937 7 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2938 7 : Value |= (op & UINT64_C(1023)) << 11;
2939 7 : break;
2940 : }
2941 : case Mips::HYPCALL_MM:
2942 : case Mips::SDBBP_MM:
2943 : case Mips::SDBBP_MMR6:
2944 : case Mips::SYSCALL_MM:
2945 : case Mips::WAIT_MM:
2946 : case Mips::WAIT_MMR6: {
2947 : // op: code_
2948 22 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2949 22 : Value |= (op & UINT64_C(1023)) << 16;
2950 22 : break;
2951 : }
2952 : case Mips::SDBBP:
2953 : case Mips::SDBBP_R6:
2954 : case Mips::SYSCALL: {
2955 : // op: code_
2956 53 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2957 53 : Value |= (op & UINT64_C(1048575)) << 6;
2958 53 : break;
2959 : }
2960 : case Mips::BREAK16_MMR6:
2961 : case Mips::SDBBP16_MMR6: {
2962 : // op: code_
2963 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2964 2 : Value |= (op & UINT64_C(15)) << 6;
2965 2 : break;
2966 : }
2967 : case Mips::BREAK16_MM:
2968 : case Mips::SDBBP16_MM: {
2969 : // op: code_
2970 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2971 6 : Value |= op & UINT64_C(15);
2972 6 : break;
2973 : }
2974 : case Mips::BREAK:
2975 : case Mips::BREAK_MM:
2976 : case Mips::BREAK_MMR6: {
2977 : // op: code_1
2978 142 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2979 142 : Value |= (op & UINT64_C(1023)) << 16;
2980 : // op: code_2
2981 142 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2982 142 : Value |= (op & UINT64_C(1023)) << 6;
2983 142 : break;
2984 : }
2985 : case Mips::BC2EQZ:
2986 : case Mips::BC2NEZ: {
2987 : // op: ct
2988 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2989 8 : Value |= (op & UINT64_C(31)) << 16;
2990 : // op: offset
2991 8 : op = getBranchTargetOpValue(MI, 1, Fixups, STI);
2992 8 : Value |= op & UINT64_C(65535);
2993 8 : break;
2994 : }
2995 : case Mips::MOVEP_MMR6: {
2996 : // op: dst_regs
2997 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2998 1 : Value |= (op & UINT64_C(7)) << 7;
2999 : // op: rt
3000 1 : op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
3001 1 : Value |= (op & UINT64_C(7)) << 4;
3002 : // op: rs
3003 1 : op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
3004 1 : Value |= (op & UINT64_C(4)) << 1;
3005 1 : Value |= op & UINT64_C(3);
3006 1 : break;
3007 : }
3008 : case Mips::MOVEP_MM: {
3009 : // op: dst_regs
3010 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3011 3 : Value |= (op & UINT64_C(7)) << 7;
3012 : // op: rt
3013 3 : op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
3014 3 : Value |= (op & UINT64_C(7)) << 4;
3015 : // op: rs
3016 3 : op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
3017 3 : Value |= (op & UINT64_C(7)) << 1;
3018 3 : break;
3019 : }
3020 : case Mips::BC1F:
3021 : case Mips::BC1FL:
3022 : case Mips::BC1T:
3023 : case Mips::BC1TL: {
3024 : // op: fcc
3025 146 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3026 146 : Value |= (op & UINT64_C(7)) << 18;
3027 : // op: offset
3028 146 : op = getBranchTargetOpValue(MI, 1, Fixups, STI);
3029 146 : Value |= op & UINT64_C(65535);
3030 146 : break;
3031 : }
3032 : case Mips::BC1F_MM:
3033 : case Mips::BC1T_MM: {
3034 : // op: fcc
3035 9 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3036 9 : Value |= (op & UINT64_C(7)) << 18;
3037 : // op: offset
3038 9 : op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
3039 9 : Value |= op & UINT64_C(65535);
3040 9 : break;
3041 : }
3042 : case Mips::LUXC1_MM:
3043 : case Mips::LWXC1_MM: {
3044 : // op: fd
3045 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3046 2 : Value |= (op & UINT64_C(31)) << 11;
3047 : // op: base
3048 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3049 2 : Value |= (op & UINT64_C(31)) << 16;
3050 : // op: index
3051 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3052 2 : Value |= (op & UINT64_C(31)) << 21;
3053 2 : break;
3054 : }
3055 : case Mips::MOVN_I_D32_MM:
3056 : case Mips::MOVN_I_S_MM:
3057 : case Mips::MOVZ_I_D32_MM:
3058 : case Mips::MOVZ_I_S_MM: {
3059 : // op: fd
3060 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3061 8 : Value |= (op & UINT64_C(31)) << 11;
3062 : // op: fs
3063 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3064 8 : Value |= (op & UINT64_C(31)) << 16;
3065 : // op: rt
3066 8 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3067 8 : Value |= (op & UINT64_C(31)) << 21;
3068 8 : break;
3069 : }
3070 : case Mips::CEIL_W_MM:
3071 : case Mips::CEIL_W_S_MM:
3072 : case Mips::CVT_D32_S_MM:
3073 : case Mips::CVT_D32_W_MM:
3074 : case Mips::CVT_D64_S_MM:
3075 : case Mips::CVT_D64_W_MM:
3076 : case Mips::CVT_L_D64_MM:
3077 : case Mips::CVT_L_S_MM:
3078 : case Mips::CVT_S_D32_MM:
3079 : case Mips::CVT_S_D64_MM:
3080 : case Mips::CVT_S_W_MM:
3081 : case Mips::CVT_W_D32_MM:
3082 : case Mips::CVT_W_D64_MM:
3083 : case Mips::CVT_W_S_MM:
3084 : case Mips::FABS_D32_MM:
3085 : case Mips::FABS_D64_MM:
3086 : case Mips::FABS_S_MM:
3087 : case Mips::FLOOR_W_MM:
3088 : case Mips::FLOOR_W_S_MM:
3089 : case Mips::FMOV_D32_MM:
3090 : case Mips::FMOV_D64_MM:
3091 : case Mips::FMOV_S_MM:
3092 : case Mips::FNEG_D32_MM:
3093 : case Mips::FNEG_D64_MM:
3094 : case Mips::FNEG_S_MM:
3095 : case Mips::FSQRT_D32_MM:
3096 : case Mips::FSQRT_D64_MM:
3097 : case Mips::FSQRT_S_MM:
3098 : case Mips::RECIP_D32_MM:
3099 : case Mips::RECIP_D64_MM:
3100 : case Mips::RECIP_S_MM:
3101 : case Mips::ROUND_W_MM:
3102 : case Mips::ROUND_W_S_MM:
3103 : case Mips::RSQRT_D32_MM:
3104 : case Mips::RSQRT_D64_MM:
3105 : case Mips::RSQRT_S_MM:
3106 : case Mips::TRUNC_W_MM:
3107 : case Mips::TRUNC_W_S_MM: {
3108 : // op: fd
3109 89 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3110 89 : Value |= (op & UINT64_C(31)) << 21;
3111 : // op: fs
3112 89 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3113 89 : Value |= (op & UINT64_C(31)) << 16;
3114 89 : break;
3115 : }
3116 : case Mips::MOVF_D32_MM:
3117 : case Mips::MOVF_S_MM:
3118 : case Mips::MOVT_D32_MM:
3119 : case Mips::MOVT_S_MM: {
3120 : // op: fd
3121 9 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3122 9 : Value |= (op & UINT64_C(31)) << 21;
3123 : // op: fs
3124 9 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3125 9 : Value |= (op & UINT64_C(31)) << 16;
3126 : // op: fcc
3127 9 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3128 9 : Value |= (op & UINT64_C(7)) << 13;
3129 9 : break;
3130 : }
3131 : case Mips::LDXC1:
3132 : case Mips::LDXC164:
3133 : case Mips::LUXC1:
3134 : case Mips::LUXC164:
3135 : case Mips::LWXC1: {
3136 : // op: fd
3137 36 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3138 36 : Value |= (op & UINT64_C(31)) << 6;
3139 : // op: base
3140 36 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3141 36 : Value |= (op & UINT64_C(31)) << 21;
3142 : // op: index
3143 36 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3144 36 : Value |= (op & UINT64_C(31)) << 16;
3145 36 : break;
3146 : }
3147 : case Mips::MADD_D32:
3148 : case Mips::MADD_D64:
3149 : case Mips::MADD_S:
3150 : case Mips::MSUB_D32:
3151 : case Mips::MSUB_D64:
3152 : case Mips::MSUB_S:
3153 : case Mips::NMADD_D32:
3154 : case Mips::NMADD_D64:
3155 : case Mips::NMADD_S:
3156 : case Mips::NMSUB_D32:
3157 : case Mips::NMSUB_D64:
3158 : case Mips::NMSUB_S: {
3159 : // op: fd
3160 60 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3161 60 : Value |= (op & UINT64_C(31)) << 6;
3162 : // op: fr
3163 60 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3164 60 : Value |= (op & UINT64_C(31)) << 21;
3165 : // op: fs
3166 60 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3167 60 : Value |= (op & UINT64_C(31)) << 11;
3168 : // op: ft
3169 60 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3170 60 : Value |= (op & UINT64_C(31)) << 16;
3171 60 : break;
3172 : }
3173 : case Mips::CEIL_L_D64:
3174 : case Mips::CEIL_L_S:
3175 : case Mips::CEIL_W_D32:
3176 : case Mips::CEIL_W_D64:
3177 : case Mips::CEIL_W_S:
3178 : case Mips::CVT_D32_S:
3179 : case Mips::CVT_D32_W:
3180 : case Mips::CVT_D64_L:
3181 : case Mips::CVT_D64_S:
3182 : case Mips::CVT_D64_W:
3183 : case Mips::CVT_L_D64:
3184 : case Mips::CVT_L_S:
3185 : case Mips::CVT_S_D32:
3186 : case Mips::CVT_S_D64:
3187 : case Mips::CVT_S_L:
3188 : case Mips::CVT_S_PL64:
3189 : case Mips::CVT_S_PU64:
3190 : case Mips::CVT_S_W:
3191 : case Mips::CVT_W_D32:
3192 : case Mips::CVT_W_D64:
3193 : case Mips::CVT_W_S:
3194 : case Mips::FABS_D32:
3195 : case Mips::FABS_D64:
3196 : case Mips::FABS_S:
3197 : case Mips::FLOOR_L_D64:
3198 : case Mips::FLOOR_L_S:
3199 : case Mips::FLOOR_W_D32:
3200 : case Mips::FLOOR_W_D64:
3201 : case Mips::FLOOR_W_S:
3202 : case Mips::FMOV_D32:
3203 : case Mips::FMOV_D64:
3204 : case Mips::FMOV_S:
3205 : case Mips::FNEG_D32:
3206 : case Mips::FNEG_D64:
3207 : case Mips::FNEG_S:
3208 : case Mips::FSQRT_D32:
3209 : case Mips::FSQRT_D64:
3210 : case Mips::FSQRT_S:
3211 : case Mips::RECIP_D32:
3212 : case Mips::RECIP_D64:
3213 : case Mips::RECIP_S:
3214 : case Mips::ROUND_L_D64:
3215 : case Mips::ROUND_L_S:
3216 : case Mips::ROUND_W_D32:
3217 : case Mips::ROUND_W_D64:
3218 : case Mips::ROUND_W_S:
3219 : case Mips::RSQRT_D32:
3220 : case Mips::RSQRT_D64:
3221 : case Mips::RSQRT_S:
3222 : case Mips::TRUNC_L_D64:
3223 : case Mips::TRUNC_L_S:
3224 : case Mips::TRUNC_W_D32:
3225 : case Mips::TRUNC_W_D64:
3226 : case Mips::TRUNC_W_S: {
3227 : // op: fd
3228 554 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3229 554 : Value |= (op & UINT64_C(31)) << 6;
3230 : // op: fs
3231 554 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3232 554 : Value |= (op & UINT64_C(31)) << 11;
3233 554 : break;
3234 : }
3235 : case Mips::MOVF_D32:
3236 : case Mips::MOVF_D64:
3237 : case Mips::MOVF_S:
3238 : case Mips::MOVT_D32:
3239 : case Mips::MOVT_D64:
3240 : case Mips::MOVT_S: {
3241 : // op: fd
3242 44 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3243 44 : Value |= (op & UINT64_C(31)) << 6;
3244 : // op: fs
3245 44 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3246 44 : Value |= (op & UINT64_C(31)) << 11;
3247 : // op: fcc
3248 44 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3249 44 : Value |= (op & UINT64_C(7)) << 18;
3250 44 : break;
3251 : }
3252 : case Mips::CMP_EQ_D:
3253 : case Mips::CMP_EQ_S:
3254 : case Mips::CMP_F_D:
3255 : case Mips::CMP_F_S:
3256 : case Mips::CMP_LE_D:
3257 : case Mips::CMP_LE_S:
3258 : case Mips::CMP_LT_D:
3259 : case Mips::CMP_LT_S:
3260 : case Mips::CMP_SAF_D:
3261 : case Mips::CMP_SAF_S:
3262 : case Mips::CMP_SEQ_D:
3263 : case Mips::CMP_SEQ_S:
3264 : case Mips::CMP_SLE_D:
3265 : case Mips::CMP_SLE_S:
3266 : case Mips::CMP_SLT_D:
3267 : case Mips::CMP_SLT_S:
3268 : case Mips::CMP_SUEQ_D:
3269 : case Mips::CMP_SUEQ_S:
3270 : case Mips::CMP_SULE_D:
3271 : case Mips::CMP_SULE_S:
3272 : case Mips::CMP_SULT_D:
3273 : case Mips::CMP_SULT_S:
3274 : case Mips::CMP_SUN_D:
3275 : case Mips::CMP_SUN_S:
3276 : case Mips::CMP_UEQ_D:
3277 : case Mips::CMP_UEQ_S:
3278 : case Mips::CMP_ULE_D:
3279 : case Mips::CMP_ULE_S:
3280 : case Mips::CMP_ULT_D:
3281 : case Mips::CMP_ULT_S:
3282 : case Mips::CMP_UN_D:
3283 : case Mips::CMP_UN_S:
3284 : case Mips::CVT_PS_S64:
3285 : case Mips::FADD_D32:
3286 : case Mips::FADD_D64:
3287 : case Mips::FADD_S:
3288 : case Mips::FDIV_D32:
3289 : case Mips::FDIV_D64:
3290 : case Mips::FDIV_S:
3291 : case Mips::FMUL_D32:
3292 : case Mips::FMUL_D64:
3293 : case Mips::FMUL_S:
3294 : case Mips::FSUB_D32:
3295 : case Mips::FSUB_D64:
3296 : case Mips::FSUB_S:
3297 : case Mips::PLL_PS64:
3298 : case Mips::PLU_PS64: {
3299 : // op: fd
3300 205 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3301 205 : Value |= (op & UINT64_C(31)) << 6;
3302 : // op: fs
3303 205 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3304 205 : Value |= (op & UINT64_C(31)) << 11;
3305 : // op: ft
3306 205 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3307 205 : Value |= (op & UINT64_C(31)) << 16;
3308 205 : break;
3309 : }
3310 : case Mips::MOVN_I64_D64:
3311 : case Mips::MOVN_I64_S:
3312 : case Mips::MOVN_I_D32:
3313 : case Mips::MOVN_I_D64:
3314 : case Mips::MOVN_I_S:
3315 : case Mips::MOVZ_I64_D64:
3316 : case Mips::MOVZ_I64_S:
3317 : case Mips::MOVZ_I_D32:
3318 : case Mips::MOVZ_I_D64:
3319 : case Mips::MOVZ_I_S: {
3320 : // op: fd
3321 40 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3322 40 : Value |= (op & UINT64_C(31)) << 6;
3323 : // op: fs
3324 40 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3325 40 : Value |= (op & UINT64_C(31)) << 11;
3326 : // op: rt
3327 40 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3328 40 : Value |= (op & UINT64_C(31)) << 16;
3329 40 : break;
3330 : }
3331 : case Mips::SUXC1_MM:
3332 : case Mips::SWXC1_MM: {
3333 : // op: fs
3334 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3335 2 : Value |= (op & UINT64_C(31)) << 11;
3336 : // op: base
3337 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3338 2 : Value |= (op & UINT64_C(31)) << 16;
3339 : // op: index
3340 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3341 2 : Value |= (op & UINT64_C(31)) << 21;
3342 2 : break;
3343 : }
3344 : case Mips::SDXC1:
3345 : case Mips::SDXC164:
3346 : case Mips::SUXC1:
3347 : case Mips::SUXC164:
3348 : case Mips::SWXC1: {
3349 : // op: fs
3350 31 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3351 31 : Value |= (op & UINT64_C(31)) << 11;
3352 : // op: base
3353 31 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3354 31 : Value |= (op & UINT64_C(31)) << 21;
3355 : // op: index
3356 31 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3357 31 : Value |= (op & UINT64_C(31)) << 16;
3358 31 : break;
3359 : }
3360 : case Mips::FCMP_D32:
3361 : case Mips::FCMP_D64:
3362 : case Mips::FCMP_S32: {
3363 : // op: fs
3364 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3365 0 : Value |= (op & UINT64_C(31)) << 11;
3366 : // op: ft
3367 0 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3368 0 : Value |= (op & UINT64_C(31)) << 16;
3369 : // op: cond
3370 0 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3371 0 : Value |= op & UINT64_C(15);
3372 0 : break;
3373 : }
3374 : case Mips::FCMP_D32_MM:
3375 : case Mips::FCMP_S32_MM: {
3376 : // op: fs
3377 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3378 2 : Value |= (op & UINT64_C(31)) << 16;
3379 : // op: ft
3380 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3381 2 : Value |= (op & UINT64_C(31)) << 21;
3382 : // op: cond
3383 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3384 2 : Value |= (op & UINT64_C(15)) << 6;
3385 2 : break;
3386 : }
3387 : case Mips::CLASS_D:
3388 : case Mips::CLASS_S:
3389 : case Mips::RINT_D:
3390 : case Mips::RINT_S: {
3391 : // op: fs
3392 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3393 8 : Value |= (op & UINT64_C(31)) << 11;
3394 : // op: fd
3395 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3396 8 : Value |= (op & UINT64_C(31)) << 6;
3397 8 : break;
3398 : }
3399 : case Mips::C_EQ_D32:
3400 : case Mips::C_EQ_D64:
3401 : case Mips::C_EQ_S:
3402 : case Mips::C_F_D32:
3403 : case Mips::C_F_D64:
3404 : case Mips::C_F_S:
3405 : case Mips::C_LE_D32:
3406 : case Mips::C_LE_D64:
3407 : case Mips::C_LE_S:
3408 : case Mips::C_LT_D32:
3409 : case Mips::C_LT_D64:
3410 : case Mips::C_LT_S:
3411 : case Mips::C_NGE_D32:
3412 : case Mips::C_NGE_D64:
3413 : case Mips::C_NGE_S:
3414 : case Mips::C_NGLE_D32:
3415 : case Mips::C_NGLE_D64:
3416 : case Mips::C_NGLE_S:
3417 : case Mips::C_NGL_D32:
3418 : case Mips::C_NGL_D64:
3419 : case Mips::C_NGL_S:
3420 : case Mips::C_NGT_D32:
3421 : case Mips::C_NGT_D64:
3422 : case Mips::C_NGT_S:
3423 : case Mips::C_OLE_D32:
3424 : case Mips::C_OLE_D64:
3425 : case Mips::C_OLE_S:
3426 : case Mips::C_OLT_D32:
3427 : case Mips::C_OLT_D64:
3428 : case Mips::C_OLT_S:
3429 : case Mips::C_SEQ_D32:
3430 : case Mips::C_SEQ_D64:
3431 : case Mips::C_SEQ_S:
3432 : case Mips::C_SF_D32:
3433 : case Mips::C_SF_D64:
3434 : case Mips::C_SF_S:
3435 : case Mips::C_UEQ_D32:
3436 : case Mips::C_UEQ_D64:
3437 : case Mips::C_UEQ_S:
3438 : case Mips::C_ULE_D32:
3439 : case Mips::C_ULE_D64:
3440 : case Mips::C_ULE_S:
3441 : case Mips::C_ULT_D32:
3442 : case Mips::C_ULT_D64:
3443 : case Mips::C_ULT_S:
3444 : case Mips::C_UN_D32:
3445 : case Mips::C_UN_D64:
3446 : case Mips::C_UN_S: {
3447 : // op: fs
3448 396 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3449 396 : Value |= (op & UINT64_C(31)) << 11;
3450 : // op: ft
3451 396 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3452 396 : Value |= (op & UINT64_C(31)) << 16;
3453 : // op: fcc
3454 396 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3455 396 : Value |= (op & UINT64_C(7)) << 8;
3456 396 : break;
3457 : }
3458 : case Mips::C_EQ_D32_MM:
3459 : case Mips::C_EQ_D64_MM:
3460 : case Mips::C_EQ_S_MM:
3461 : case Mips::C_F_D32_MM:
3462 : case Mips::C_F_D64_MM:
3463 : case Mips::C_F_S_MM:
3464 : case Mips::C_LE_D32_MM:
3465 : case Mips::C_LE_D64_MM:
3466 : case Mips::C_LE_S_MM:
3467 : case Mips::C_LT_D32_MM:
3468 : case Mips::C_LT_D64_MM:
3469 : case Mips::C_LT_S_MM:
3470 : case Mips::C_NGE_D32_MM:
3471 : case Mips::C_NGE_D64_MM:
3472 : case Mips::C_NGE_S_MM:
3473 : case Mips::C_NGLE_D32_MM:
3474 : case Mips::C_NGLE_D64_MM:
3475 : case Mips::C_NGLE_S_MM:
3476 : case Mips::C_NGL_D32_MM:
3477 : case Mips::C_NGL_D64_MM:
3478 : case Mips::C_NGL_S_MM:
3479 : case Mips::C_NGT_D32_MM:
3480 : case Mips::C_NGT_D64_MM:
3481 : case Mips::C_NGT_S_MM:
3482 : case Mips::C_OLE_D32_MM:
3483 : case Mips::C_OLE_D64_MM:
3484 : case Mips::C_OLE_S_MM:
3485 : case Mips::C_OLT_D32_MM:
3486 : case Mips::C_OLT_D64_MM:
3487 : case Mips::C_OLT_S_MM:
3488 : case Mips::C_SEQ_D32_MM:
3489 : case Mips::C_SEQ_D64_MM:
3490 : case Mips::C_SEQ_S_MM:
3491 : case Mips::C_SF_D32_MM:
3492 : case Mips::C_SF_D64_MM:
3493 : case Mips::C_SF_S_MM:
3494 : case Mips::C_UEQ_D32_MM:
3495 : case Mips::C_UEQ_D64_MM:
3496 : case Mips::C_UEQ_S_MM:
3497 : case Mips::C_ULE_D32_MM:
3498 : case Mips::C_ULE_D64_MM:
3499 : case Mips::C_ULE_S_MM:
3500 : case Mips::C_ULT_D32_MM:
3501 : case Mips::C_ULT_D64_MM:
3502 : case Mips::C_ULT_S_MM:
3503 : case Mips::C_UN_D32_MM:
3504 : case Mips::C_UN_D64_MM:
3505 : case Mips::C_UN_S_MM: {
3506 : // op: fs
3507 96 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3508 96 : Value |= (op & UINT64_C(31)) << 16;
3509 : // op: ft
3510 96 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3511 96 : Value |= (op & UINT64_C(31)) << 21;
3512 : // op: fcc
3513 96 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3514 96 : Value |= (op & UINT64_C(7)) << 13;
3515 96 : break;
3516 : }
3517 : case Mips::CLASS_D_MMR6:
3518 : case Mips::CLASS_S_MMR6:
3519 : case Mips::RINT_D_MMR6:
3520 : case Mips::RINT_S_MMR6: {
3521 : // op: fs
3522 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3523 4 : Value |= (op & UINT64_C(31)) << 21;
3524 : // op: fd
3525 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3526 4 : Value |= (op & UINT64_C(31)) << 16;
3527 4 : break;
3528 : }
3529 : case Mips::BC1EQZ:
3530 : case Mips::BC1NEZ: {
3531 : // op: ft
3532 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3533 8 : Value |= (op & UINT64_C(31)) << 16;
3534 : // op: offset
3535 8 : op = getBranchTargetOpValue(MI, 1, Fixups, STI);
3536 8 : Value |= op & UINT64_C(65535);
3537 8 : break;
3538 : }
3539 : case Mips::LDC1_D64_MMR6:
3540 : case Mips::SDC1_D64_MMR6: {
3541 : // op: ft
3542 16 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3543 16 : Value |= (op & UINT64_C(31)) << 21;
3544 : // op: addr
3545 16 : op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
3546 16 : Value |= op & UINT64_C(2097151);
3547 16 : break;
3548 : }
3549 : case Mips::CEIL_L_D_MMR6:
3550 : case Mips::CEIL_L_S_MMR6:
3551 : case Mips::CEIL_W_D_MMR6:
3552 : case Mips::CEIL_W_S_MMR6:
3553 : case Mips::CVT_D_L_MMR6:
3554 : case Mips::CVT_L_D_MMR6:
3555 : case Mips::CVT_L_S_MMR6:
3556 : case Mips::CVT_S_L_MMR6:
3557 : case Mips::CVT_S_W_MMR6:
3558 : case Mips::CVT_W_S_MMR6:
3559 : case Mips::FLOOR_L_D_MMR6:
3560 : case Mips::FLOOR_L_S_MMR6:
3561 : case Mips::FLOOR_W_D_MMR6:
3562 : case Mips::FLOOR_W_S_MMR6:
3563 : case Mips::FMOV_S_MMR6:
3564 : case Mips::FNEG_S_MMR6:
3565 : case Mips::ROUND_L_D_MMR6:
3566 : case Mips::ROUND_L_S_MMR6:
3567 : case Mips::ROUND_W_D_MMR6:
3568 : case Mips::ROUND_W_S_MMR6:
3569 : case Mips::TRUNC_L_D_MMR6:
3570 : case Mips::TRUNC_L_S_MMR6:
3571 : case Mips::TRUNC_W_D_MMR6:
3572 : case Mips::TRUNC_W_S_MMR6: {
3573 : // op: ft
3574 22 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3575 22 : Value |= (op & UINT64_C(31)) << 21;
3576 : // op: fs
3577 22 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3578 22 : Value |= (op & UINT64_C(31)) << 16;
3579 22 : break;
3580 : }
3581 : case Mips::FADD_S_MMR6:
3582 : case Mips::FDIV_S_MMR6:
3583 : case Mips::FMUL_S_MMR6:
3584 : case Mips::FSUB_S_MMR6: {
3585 : // op: ft
3586 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3587 4 : Value |= (op & UINT64_C(31)) << 21;
3588 : // op: fs
3589 4 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3590 4 : Value |= (op & UINT64_C(31)) << 16;
3591 : // op: fd
3592 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3593 4 : Value |= (op & UINT64_C(31)) << 11;
3594 4 : break;
3595 : }
3596 : case Mips::MAXA_D:
3597 : case Mips::MAXA_S:
3598 : case Mips::MAX_D:
3599 : case Mips::MAX_S:
3600 : case Mips::MINA_D:
3601 : case Mips::MINA_S:
3602 : case Mips::MIN_D:
3603 : case Mips::MIN_S:
3604 : case Mips::SELEQZ_D:
3605 : case Mips::SELEQZ_S:
3606 : case Mips::SELNEZ_D:
3607 : case Mips::SELNEZ_S: {
3608 : // op: ft
3609 24 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3610 24 : Value |= (op & UINT64_C(31)) << 16;
3611 : // op: fs
3612 24 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3613 24 : Value |= (op & UINT64_C(31)) << 11;
3614 : // op: fd
3615 24 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3616 24 : Value |= (op & UINT64_C(31)) << 6;
3617 24 : break;
3618 : }
3619 : case Mips::CMP_AF_D_MMR6:
3620 : case Mips::CMP_AF_S_MMR6:
3621 : case Mips::CMP_EQ_D_MMR6:
3622 : case Mips::CMP_EQ_S_MMR6:
3623 : case Mips::CMP_LE_D_MMR6:
3624 : case Mips::CMP_LE_S_MMR6:
3625 : case Mips::CMP_LT_D_MMR6:
3626 : case Mips::CMP_LT_S_MMR6:
3627 : case Mips::CMP_SAF_D_MMR6:
3628 : case Mips::CMP_SAF_S_MMR6:
3629 : case Mips::CMP_SEQ_D_MMR6:
3630 : case Mips::CMP_SEQ_S_MMR6:
3631 : case Mips::CMP_SLE_D_MMR6:
3632 : case Mips::CMP_SLE_S_MMR6:
3633 : case Mips::CMP_SLT_D_MMR6:
3634 : case Mips::CMP_SLT_S_MMR6:
3635 : case Mips::CMP_SUEQ_D_MMR6:
3636 : case Mips::CMP_SUEQ_S_MMR6:
3637 : case Mips::CMP_SULE_D_MMR6:
3638 : case Mips::CMP_SULE_S_MMR6:
3639 : case Mips::CMP_SULT_D_MMR6:
3640 : case Mips::CMP_SULT_S_MMR6:
3641 : case Mips::CMP_SUN_D_MMR6:
3642 : case Mips::CMP_SUN_S_MMR6:
3643 : case Mips::CMP_UEQ_D_MMR6:
3644 : case Mips::CMP_UEQ_S_MMR6:
3645 : case Mips::CMP_ULE_D_MMR6:
3646 : case Mips::CMP_ULE_S_MMR6:
3647 : case Mips::CMP_ULT_D_MMR6:
3648 : case Mips::CMP_ULT_S_MMR6:
3649 : case Mips::CMP_UN_D_MMR6:
3650 : case Mips::CMP_UN_S_MMR6:
3651 : case Mips::FADD_D32_MM:
3652 : case Mips::FADD_D64_MM:
3653 : case Mips::FADD_S_MM:
3654 : case Mips::FDIV_D32_MM:
3655 : case Mips::FDIV_D64_MM:
3656 : case Mips::FDIV_S_MM:
3657 : case Mips::FMUL_D32_MM:
3658 : case Mips::FMUL_D64_MM:
3659 : case Mips::FMUL_S_MM:
3660 : case Mips::FSUB_D32_MM:
3661 : case Mips::FSUB_D64_MM:
3662 : case Mips::FSUB_S_MM:
3663 : case Mips::MAXA_D_MMR6:
3664 : case Mips::MAXA_S_MMR6:
3665 : case Mips::MAX_D_MMR6:
3666 : case Mips::MAX_S_MMR6:
3667 : case Mips::MINA_D_MMR6:
3668 : case Mips::MINA_S_MMR6:
3669 : case Mips::MIN_D_MMR6:
3670 : case Mips::MIN_S_MMR6:
3671 : case Mips::SELEQZ_D_MMR6:
3672 : case Mips::SELEQZ_S_MMR6:
3673 : case Mips::SELNEZ_D_MMR6:
3674 : case Mips::SELNEZ_S_MMR6: {
3675 : // op: ft
3676 82 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3677 82 : Value |= (op & UINT64_C(31)) << 21;
3678 : // op: fs
3679 82 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3680 82 : Value |= (op & UINT64_C(31)) << 16;
3681 : // op: fd
3682 82 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3683 82 : Value |= (op & UINT64_C(31)) << 11;
3684 82 : break;
3685 : }
3686 : case Mips::MADDF_D:
3687 : case Mips::MADDF_S:
3688 : case Mips::MSUBF_D:
3689 : case Mips::MSUBF_S:
3690 : case Mips::SEL_D:
3691 : case Mips::SEL_S: {
3692 : // op: ft
3693 12 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3694 12 : Value |= (op & UINT64_C(31)) << 16;
3695 : // op: fs
3696 12 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3697 12 : Value |= (op & UINT64_C(31)) << 11;
3698 : // op: fd
3699 12 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3700 12 : Value |= (op & UINT64_C(31)) << 6;
3701 12 : break;
3702 : }
3703 : case Mips::MADDF_D_MMR6:
3704 : case Mips::MADDF_S_MMR6:
3705 : case Mips::MSUBF_D_MMR6:
3706 : case Mips::MSUBF_S_MMR6:
3707 : case Mips::SEL_D_MMR6:
3708 : case Mips::SEL_S_MMR6: {
3709 : // op: ft
3710 7 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3711 7 : Value |= (op & UINT64_C(31)) << 21;
3712 : // op: fs
3713 7 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3714 7 : Value |= (op & UINT64_C(31)) << 16;
3715 : // op: fd
3716 7 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3717 7 : Value |= (op & UINT64_C(31)) << 11;
3718 7 : break;
3719 : }
3720 : case Mips::MADD_D32_MM:
3721 : case Mips::MADD_S_MM:
3722 : case Mips::MSUB_D32_MM:
3723 : case Mips::MSUB_S_MM:
3724 : case Mips::NMADD_D32_MM:
3725 : case Mips::NMADD_S_MM:
3726 : case Mips::NMSUB_D32_MM:
3727 : case Mips::NMSUB_S_MM: {
3728 : // op: ft
3729 16 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3730 16 : Value |= (op & UINT64_C(31)) << 21;
3731 : // op: fs
3732 16 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3733 16 : Value |= (op & UINT64_C(31)) << 16;
3734 : // op: fd
3735 16 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3736 16 : Value |= (op & UINT64_C(31)) << 11;
3737 : // op: fr
3738 16 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3739 16 : Value |= (op & UINT64_C(31)) << 6;
3740 16 : break;
3741 : }
3742 : case Mips::ADDVI_B:
3743 : case Mips::ADDVI_D:
3744 : case Mips::ADDVI_H:
3745 : case Mips::ADDVI_W:
3746 : case Mips::CEQI_B:
3747 : case Mips::CEQI_D:
3748 : case Mips::CEQI_H:
3749 : case Mips::CEQI_W:
3750 : case Mips::CLEI_S_B:
3751 : case Mips::CLEI_S_D:
3752 : case Mips::CLEI_S_H:
3753 : case Mips::CLEI_S_W:
3754 : case Mips::CLEI_U_B:
3755 : case Mips::CLEI_U_D:
3756 : case Mips::CLEI_U_H:
3757 : case Mips::CLEI_U_W:
3758 : case Mips::CLTI_S_B:
3759 : case Mips::CLTI_S_D:
3760 : case Mips::CLTI_S_H:
3761 : case Mips::CLTI_S_W:
3762 : case Mips::CLTI_U_B:
3763 : case Mips::CLTI_U_D:
3764 : case Mips::CLTI_U_H:
3765 : case Mips::CLTI_U_W:
3766 : case Mips::MAXI_S_B:
3767 : case Mips::MAXI_S_D:
3768 : case Mips::MAXI_S_H:
3769 : case Mips::MAXI_S_W:
3770 : case Mips::MAXI_U_B:
3771 : case Mips::MAXI_U_D:
3772 : case Mips::MAXI_U_H:
3773 : case Mips::MAXI_U_W:
3774 : case Mips::MINI_S_B:
3775 : case Mips::MINI_S_D:
3776 : case Mips::MINI_S_H:
3777 : case Mips::MINI_S_W:
3778 : case Mips::MINI_U_B:
3779 : case Mips::MINI_U_D:
3780 : case Mips::MINI_U_H:
3781 : case Mips::MINI_U_W:
3782 : case Mips::SUBVI_B:
3783 : case Mips::SUBVI_D:
3784 : case Mips::SUBVI_H:
3785 : case Mips::SUBVI_W: {
3786 : // op: imm
3787 44 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3788 44 : Value |= (op & UINT64_C(31)) << 16;
3789 : // op: ws
3790 44 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3791 44 : Value |= (op & UINT64_C(31)) << 11;
3792 : // op: wd
3793 44 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3794 44 : Value |= (op & UINT64_C(31)) << 6;
3795 44 : break;
3796 : }
3797 24 : case Mips::ADDIUSP_MM: {
3798 : // op: imm
3799 24 : op = getSImm9AddiuspValue(MI, 0, Fixups, STI);
3800 24 : Value |= (op & UINT64_C(511)) << 1;
3801 24 : break;
3802 : }
3803 1 : case Mips::JRCADDIUSP_MMR6: {
3804 : // op: imm
3805 1 : op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
3806 1 : Value |= (op & UINT64_C(31)) << 5;
3807 1 : break;
3808 : }
3809 3 : case Mips::JRADDIUSP: {
3810 : // op: imm
3811 3 : op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
3812 3 : Value |= op & UINT64_C(31);
3813 3 : break;
3814 : }
3815 0 : case Mips::Bimm16: {
3816 : // op: imm11
3817 0 : op = getBranchTargetOpValue(MI, 0, Fixups, STI);
3818 0 : Value |= op & UINT64_C(2047);
3819 0 : break;
3820 : }
3821 : case Mips::AddiuRxRyOffMemX16: {
3822 : // op: imm15
3823 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3824 0 : Value |= (op & UINT64_C(2032)) << 16;
3825 0 : Value |= (op & UINT64_C(30720)) << 5;
3826 0 : Value |= op & UINT64_C(15);
3827 : // op: rx
3828 0 : op = getMemEncoding(MI, 1, Fixups, STI);
3829 0 : Value |= (op & UINT64_C(7)) << 8;
3830 : // op: ry
3831 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3832 0 : Value |= (op & UINT64_C(7)) << 5;
3833 0 : break;
3834 : }
3835 0 : case Mips::BimmX16: {
3836 : // op: imm16
3837 0 : op = getBranchTargetOpValue(MI, 0, Fixups, STI);
3838 0 : Value |= (op & UINT64_C(2016)) << 16;
3839 0 : Value |= (op & UINT64_C(63488)) << 5;
3840 0 : Value |= op & UINT64_C(31);
3841 0 : break;
3842 : }
3843 : case Mips::AddiuSpImmX16:
3844 : case Mips::BteqzX16:
3845 : case Mips::BtnezX16: {
3846 : // op: imm16
3847 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3848 0 : Value |= (op & UINT64_C(2016)) << 16;
3849 0 : Value |= (op & UINT64_C(63488)) << 5;
3850 0 : Value |= op & UINT64_C(31);
3851 0 : break;
3852 : }
3853 : case Mips::AddiuRxImmX16:
3854 : case Mips::AddiuRxPcImmX16:
3855 : case Mips::AddiuRxRxImmX16:
3856 : case Mips::BeqzRxImmX16:
3857 : case Mips::BnezRxImmX16:
3858 : case Mips::CmpiRxImmX16:
3859 : case Mips::LiRxImmAlignX16:
3860 : case Mips::LiRxImmX16:
3861 : case Mips::LwRxPcTcpX16:
3862 : case Mips::SltiRxImmX16:
3863 : case Mips::SltiuRxImmX16: {
3864 : // op: imm16
3865 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3866 0 : Value |= (op & UINT64_C(2016)) << 16;
3867 0 : Value |= (op & UINT64_C(63488)) << 5;
3868 0 : Value |= op & UINT64_C(31);
3869 : // op: rx
3870 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3871 0 : Value |= (op & UINT64_C(7)) << 8;
3872 0 : break;
3873 : }
3874 : case Mips::LbRxRyOffMemX16:
3875 : case Mips::LbuRxRyOffMemX16:
3876 : case Mips::LhRxRyOffMemX16:
3877 : case Mips::LhuRxRyOffMemX16:
3878 : case Mips::LwRxRyOffMemX16:
3879 : case Mips::LwRxSpImmX16:
3880 : case Mips::SbRxRyOffMemX16:
3881 : case Mips::ShRxRyOffMemX16:
3882 : case Mips::SwRxRyOffMemX16:
3883 : case Mips::SwRxSpImmX16: {
3884 : // op: imm16
3885 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3886 0 : Value |= (op & UINT64_C(2016)) << 16;
3887 0 : Value |= (op & UINT64_C(63488)) << 5;
3888 0 : Value |= op & UINT64_C(31);
3889 : // op: rx
3890 0 : op = getMemEncoding(MI, 1, Fixups, STI);
3891 0 : Value |= (op & UINT64_C(7)) << 8;
3892 : // op: ry
3893 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3894 0 : Value |= (op & UINT64_C(7)) << 5;
3895 0 : break;
3896 : }
3897 : case Mips::Jal16:
3898 : case Mips::JalB16: {
3899 : // op: imm26
3900 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3901 0 : Value |= (op & UINT64_C(2031616)) << 5;
3902 0 : Value |= (op & UINT64_C(65011712)) >> 5;
3903 0 : Value |= op & UINT64_C(65535);
3904 0 : break;
3905 : }
3906 : case Mips::AddiuSpImm16:
3907 : case Mips::Bteqz16:
3908 : case Mips::Btnez16: {
3909 : // op: imm8
3910 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3911 0 : Value |= op & UINT64_C(255);
3912 0 : break;
3913 : }
3914 : case Mips::PREFX_MM: {
3915 : // op: index
3916 3 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3917 3 : Value |= (op & UINT64_C(31)) << 21;
3918 : // op: base
3919 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3920 3 : Value |= (op & UINT64_C(31)) << 16;
3921 : // op: hint
3922 3 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3923 3 : Value |= (op & UINT64_C(31)) << 11;
3924 3 : break;
3925 : }
3926 : case Mips::LBUX_MM:
3927 : case Mips::LHX_MM:
3928 : case Mips::LWX_MM: {
3929 : // op: index
3930 3 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3931 3 : Value |= (op & UINT64_C(31)) << 21;
3932 : // op: base
3933 3 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3934 3 : Value |= (op & UINT64_C(31)) << 16;
3935 : // op: rd
3936 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3937 3 : Value |= (op & UINT64_C(31)) << 11;
3938 3 : break;
3939 : }
3940 : case Mips::COPY_S_D: {
3941 : // op: n
3942 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3943 1 : Value |= (op & UINT64_C(1)) << 16;
3944 : // op: ws
3945 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3946 1 : Value |= (op & UINT64_C(31)) << 11;
3947 : // op: rd
3948 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3949 1 : Value |= (op & UINT64_C(31)) << 6;
3950 1 : break;
3951 : }
3952 : case Mips::SPLATI_D: {
3953 : // op: n
3954 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3955 1 : Value |= (op & UINT64_C(1)) << 16;
3956 : // op: ws
3957 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3958 1 : Value |= (op & UINT64_C(31)) << 11;
3959 : // op: wd
3960 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3961 1 : Value |= (op & UINT64_C(31)) << 6;
3962 1 : break;
3963 : }
3964 : case Mips::INSVE_D: {
3965 : // op: n
3966 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3967 1 : Value |= (op & UINT64_C(1)) << 16;
3968 : // op: ws
3969 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3970 1 : Value |= (op & UINT64_C(31)) << 11;
3971 : // op: wd
3972 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3973 1 : Value |= (op & UINT64_C(31)) << 6;
3974 1 : break;
3975 : }
3976 : case Mips::COPY_S_B:
3977 : case Mips::COPY_U_B: {
3978 : // op: n
3979 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3980 2 : Value |= (op & UINT64_C(15)) << 16;
3981 : // op: ws
3982 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3983 2 : Value |= (op & UINT64_C(31)) << 11;
3984 : // op: rd
3985 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3986 2 : Value |= (op & UINT64_C(31)) << 6;
3987 2 : break;
3988 : }
3989 : case Mips::SPLATI_B: {
3990 : // op: n
3991 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3992 1 : Value |= (op & UINT64_C(15)) << 16;
3993 : // op: ws
3994 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3995 1 : Value |= (op & UINT64_C(31)) << 11;
3996 : // op: wd
3997 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3998 1 : Value |= (op & UINT64_C(31)) << 6;
3999 1 : break;
4000 : }
4001 : case Mips::INSVE_B: {
4002 : // op: n
4003 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4004 1 : Value |= (op & UINT64_C(15)) << 16;
4005 : // op: ws
4006 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4007 1 : Value |= (op & UINT64_C(31)) << 11;
4008 : // op: wd
4009 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4010 1 : Value |= (op & UINT64_C(31)) << 6;
4011 1 : break;
4012 : }
4013 : case Mips::COPY_S_W:
4014 : case Mips::COPY_U_W: {
4015 : // op: n
4016 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4017 1 : Value |= (op & UINT64_C(3)) << 16;
4018 : // op: ws
4019 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4020 1 : Value |= (op & UINT64_C(31)) << 11;
4021 : // op: rd
4022 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4023 1 : Value |= (op & UINT64_C(31)) << 6;
4024 1 : break;
4025 : }
4026 : case Mips::SPLATI_W: {
4027 : // op: n
4028 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4029 1 : Value |= (op & UINT64_C(3)) << 16;
4030 : // op: ws
4031 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4032 1 : Value |= (op & UINT64_C(31)) << 11;
4033 : // op: wd
4034 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4035 1 : Value |= (op & UINT64_C(31)) << 6;
4036 1 : break;
4037 : }
4038 : case Mips::INSVE_W: {
4039 : // op: n
4040 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4041 1 : Value |= (op & UINT64_C(3)) << 16;
4042 : // op: ws
4043 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4044 1 : Value |= (op & UINT64_C(31)) << 11;
4045 : // op: wd
4046 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4047 1 : Value |= (op & UINT64_C(31)) << 6;
4048 1 : break;
4049 : }
4050 : case Mips::COPY_S_H:
4051 : case Mips::COPY_U_H: {
4052 : // op: n
4053 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4054 2 : Value |= (op & UINT64_C(7)) << 16;
4055 : // op: ws
4056 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4057 2 : Value |= (op & UINT64_C(31)) << 11;
4058 : // op: rd
4059 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4060 2 : Value |= (op & UINT64_C(31)) << 6;
4061 2 : break;
4062 : }
4063 : case Mips::SPLATI_H: {
4064 : // op: n
4065 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4066 1 : Value |= (op & UINT64_C(7)) << 16;
4067 : // op: ws
4068 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4069 1 : Value |= (op & UINT64_C(31)) << 11;
4070 : // op: wd
4071 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4072 1 : Value |= (op & UINT64_C(31)) << 6;
4073 1 : break;
4074 : }
4075 : case Mips::INSVE_H: {
4076 : // op: n
4077 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4078 1 : Value |= (op & UINT64_C(7)) << 16;
4079 : // op: ws
4080 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4081 1 : Value |= (op & UINT64_C(31)) << 11;
4082 : // op: wd
4083 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4084 1 : Value |= (op & UINT64_C(31)) << 6;
4085 1 : break;
4086 : }
4087 : case Mips::INSERT_D: {
4088 : // op: n
4089 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4090 1 : Value |= (op & UINT64_C(1)) << 16;
4091 : // op: rs
4092 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4093 1 : Value |= (op & UINT64_C(31)) << 11;
4094 : // op: wd
4095 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4096 1 : Value |= (op & UINT64_C(31)) << 6;
4097 1 : break;
4098 : }
4099 : case Mips::SLDI_D: {
4100 : // op: n
4101 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4102 1 : Value |= (op & UINT64_C(1)) << 16;
4103 : // op: ws
4104 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4105 1 : Value |= (op & UINT64_C(31)) << 11;
4106 : // op: wd
4107 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4108 1 : Value |= (op & UINT64_C(31)) << 6;
4109 1 : break;
4110 : }
4111 : case Mips::INSERT_B: {
4112 : // op: n
4113 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4114 1 : Value |= (op & UINT64_C(15)) << 16;
4115 : // op: rs
4116 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4117 1 : Value |= (op & UINT64_C(31)) << 11;
4118 : // op: wd
4119 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4120 1 : Value |= (op & UINT64_C(31)) << 6;
4121 1 : break;
4122 : }
4123 : case Mips::SLDI_B: {
4124 : // op: n
4125 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4126 1 : Value |= (op & UINT64_C(15)) << 16;
4127 : // op: ws
4128 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4129 1 : Value |= (op & UINT64_C(31)) << 11;
4130 : // op: wd
4131 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4132 1 : Value |= (op & UINT64_C(31)) << 6;
4133 1 : break;
4134 : }
4135 : case Mips::INSERT_W: {
4136 : // op: n
4137 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4138 1 : Value |= (op & UINT64_C(3)) << 16;
4139 : // op: rs
4140 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4141 1 : Value |= (op & UINT64_C(31)) << 11;
4142 : // op: wd
4143 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4144 1 : Value |= (op & UINT64_C(31)) << 6;
4145 1 : break;
4146 : }
4147 : case Mips::SLDI_W: {
4148 : // op: n
4149 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4150 1 : Value |= (op & UINT64_C(3)) << 16;
4151 : // op: ws
4152 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4153 1 : Value |= (op & UINT64_C(31)) << 11;
4154 : // op: wd
4155 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4156 1 : Value |= (op & UINT64_C(31)) << 6;
4157 1 : break;
4158 : }
4159 : case Mips::INSERT_H: {
4160 : // op: n
4161 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4162 1 : Value |= (op & UINT64_C(7)) << 16;
4163 : // op: rs
4164 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4165 1 : Value |= (op & UINT64_C(31)) << 11;
4166 : // op: wd
4167 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4168 1 : Value |= (op & UINT64_C(31)) << 6;
4169 1 : break;
4170 : }
4171 : case Mips::SLDI_H: {
4172 : // op: n
4173 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4174 1 : Value |= (op & UINT64_C(7)) << 16;
4175 : // op: ws
4176 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4177 1 : Value |= (op & UINT64_C(31)) << 11;
4178 : // op: wd
4179 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4180 1 : Value |= (op & UINT64_C(31)) << 6;
4181 1 : break;
4182 : }
4183 27 : case Mips::BALC:
4184 : case Mips::BC: {
4185 : // op: offset
4186 27 : op = getBranchTarget26OpValue(MI, 0, Fixups, STI);
4187 27 : Value |= op & UINT64_C(67108863);
4188 27 : break;
4189 : }
4190 13 : case Mips::BALC_MMR6:
4191 : case Mips::BC_MMR6: {
4192 : // op: offset
4193 13 : op = getBranchTarget26OpValueMM(MI, 0, Fixups, STI);
4194 13 : Value |= op & UINT64_C(67108863);
4195 13 : break;
4196 : }
4197 4 : case Mips::BAL:
4198 : case Mips::BPOSGE32: {
4199 : // op: offset
4200 4 : op = getBranchTargetOpValue(MI, 0, Fixups, STI);
4201 4 : Value |= op & UINT64_C(65535);
4202 4 : break;
4203 : }
4204 20 : case Mips::BNZ_B:
4205 : case Mips::BNZ_D:
4206 : case Mips::BNZ_H:
4207 : case Mips::BNZ_V:
4208 : case Mips::BNZ_W:
4209 : case Mips::BZ_B:
4210 : case Mips::BZ_D:
4211 : case Mips::BZ_H:
4212 : case Mips::BZ_V:
4213 : case Mips::BZ_W: {
4214 : // op: offset
4215 20 : op = getBranchTargetOpValue(MI, 1, Fixups, STI);
4216 20 : Value |= op & UINT64_C(65535);
4217 : // op: wt
4218 20 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4219 20 : Value |= (op & UINT64_C(31)) << 16;
4220 20 : break;
4221 : }
4222 1 : case Mips::BPOSGE32C_MMR3: {
4223 : // op: offset
4224 1 : op = getBranchTargetOpValue1SImm16(MI, 0, Fixups, STI);
4225 1 : Value |= op & UINT64_C(65535);
4226 1 : break;
4227 : }
4228 1 : case Mips::BPOSGE32_MM: {
4229 : // op: offset
4230 1 : op = getBranchTargetOpValueMM(MI, 0, Fixups, STI);
4231 1 : Value |= op & UINT64_C(65535);
4232 1 : break;
4233 : }
4234 12 : case Mips::B16_MM:
4235 : case Mips::BC16_MMR6: {
4236 : // op: offset
4237 12 : op = getBranchTargetOpValueMMPC10(MI, 0, Fixups, STI);
4238 12 : Value |= op & UINT64_C(1023);
4239 12 : break;
4240 : }
4241 : case Mips::Move32R16: {
4242 : // op: r32
4243 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4244 2 : Value |= (op & UINT64_C(7)) << 5;
4245 2 : Value |= op & UINT64_C(24);
4246 : // op: rz
4247 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4248 2 : Value |= op & UINT64_C(7);
4249 2 : break;
4250 : }
4251 : case Mips::MFHI:
4252 : case Mips::MFHI64:
4253 : case Mips::MFLO:
4254 : case Mips::MFLO64: {
4255 : // op: rd
4256 467 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4257 467 : Value |= (op & UINT64_C(31)) << 11;
4258 467 : break;
4259 : }
4260 : case Mips::MFHI_DSP:
4261 : case Mips::MFLO_DSP: {
4262 : // op: rd
4263 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4264 4 : Value |= (op & UINT64_C(31)) << 11;
4265 : // op: ac
4266 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4267 4 : Value |= (op & UINT64_C(3)) << 21;
4268 4 : break;
4269 : }
4270 : case Mips::LWXS_MM: {
4271 : // op: rd
4272 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4273 3 : Value |= (op & UINT64_C(31)) << 11;
4274 : // op: base
4275 3 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4276 3 : Value |= (op & UINT64_C(31)) << 16;
4277 : // op: index
4278 3 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4279 3 : Value |= (op & UINT64_C(31)) << 21;
4280 3 : break;
4281 : }
4282 : case Mips::LBUX:
4283 : case Mips::LHX:
4284 : case Mips::LWX: {
4285 : // op: rd
4286 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4287 8 : Value |= (op & UINT64_C(31)) << 11;
4288 : // op: base
4289 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4290 8 : Value |= (op & UINT64_C(31)) << 21;
4291 : // op: index
4292 8 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4293 8 : Value |= (op & UINT64_C(31)) << 16;
4294 8 : break;
4295 : }
4296 : case Mips::REPL_PH:
4297 : case Mips::REPL_PH_MM:
4298 : case Mips::REPL_QB: {
4299 : // op: rd
4300 5 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4301 5 : Value |= (op & UINT64_C(31)) << 11;
4302 : // op: imm
4303 5 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4304 5 : Value |= (op & UINT64_C(1023)) << 16;
4305 5 : break;
4306 : }
4307 : case Mips::RDDSP: {
4308 : // op: rd
4309 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4310 2 : Value |= (op & UINT64_C(31)) << 11;
4311 : // op: mask
4312 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4313 2 : Value |= (op & UINT64_C(1023)) << 16;
4314 2 : break;
4315 : }
4316 : case Mips::ADDQH_PH_MMR2:
4317 : case Mips::ADDQH_R_PH_MMR2:
4318 : case Mips::ADDQH_R_W_MMR2:
4319 : case Mips::ADDQH_W_MMR2:
4320 : case Mips::ADDQ_PH_MM:
4321 : case Mips::ADDQ_S_PH_MM:
4322 : case Mips::ADDQ_S_W_MM:
4323 : case Mips::ADDSC_MM:
4324 : case Mips::ADDUH_QB_MMR2:
4325 : case Mips::ADDUH_R_QB_MMR2:
4326 : case Mips::ADDU_PH_MMR2:
4327 : case Mips::ADDU_QB_MM:
4328 : case Mips::ADDU_S_PH_MMR2:
4329 : case Mips::ADDU_S_QB_MM:
4330 : case Mips::ADDWC_MM:
4331 : case Mips::CMPGDU_EQ_QB_MMR2:
4332 : case Mips::CMPGDU_LE_QB_MMR2:
4333 : case Mips::CMPGDU_LT_QB_MMR2:
4334 : case Mips::MODSUB_MM:
4335 : case Mips::MULEQ_S_W_PHL_MM:
4336 : case Mips::MULEQ_S_W_PHR_MM:
4337 : case Mips::MULEU_S_PH_QBL_MM:
4338 : case Mips::MULEU_S_PH_QBR_MM:
4339 : case Mips::MULQ_RS_PH_MM:
4340 : case Mips::MULQ_RS_W_MMR2:
4341 : case Mips::MULQ_S_PH_MMR2:
4342 : case Mips::MULQ_S_W_MMR2:
4343 : case Mips::MUL_PH_MMR2:
4344 : case Mips::MUL_S_PH_MMR2:
4345 : case Mips::PACKRL_PH_MM:
4346 : case Mips::PICK_PH_MM:
4347 : case Mips::PICK_QB_MM:
4348 : case Mips::PRECRQU_S_QB_PH_MM:
4349 : case Mips::PRECRQ_PH_W_MM:
4350 : case Mips::PRECRQ_QB_PH_MM:
4351 : case Mips::PRECRQ_RS_PH_W_MM:
4352 : case Mips::PRECR_QB_PH_MMR2:
4353 : case Mips::SELEQZ_MMR6:
4354 : case Mips::SELNEZ_MMR6:
4355 : case Mips::SUBQH_PH_MMR2:
4356 : case Mips::SUBQH_R_PH_MMR2:
4357 : case Mips::SUBQH_R_W_MMR2:
4358 : case Mips::SUBQH_W_MMR2:
4359 : case Mips::SUBQ_PH_MM:
4360 : case Mips::SUBQ_S_PH_MM:
4361 : case Mips::SUBQ_S_W_MM:
4362 : case Mips::SUBUH_QB_MMR2:
4363 : case Mips::SUBUH_R_QB_MMR2:
4364 : case Mips::SUBU_PH_MMR2:
4365 : case Mips::SUBU_QB_MM:
4366 : case Mips::SUBU_S_PH_MMR2:
4367 : case Mips::SUBU_S_QB_MM: {
4368 : // op: rd
4369 78 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4370 78 : Value |= (op & UINT64_C(31)) << 11;
4371 : // op: rs
4372 78 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4373 78 : Value |= (op & UINT64_C(31)) << 16;
4374 : // op: rt
4375 78 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4376 78 : Value |= (op & UINT64_C(31)) << 21;
4377 78 : break;
4378 : }
4379 : case Mips::LSA_MMR6: {
4380 : // op: rd
4381 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4382 1 : Value |= (op & UINT64_C(31)) << 11;
4383 : // op: rs
4384 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4385 1 : Value |= (op & UINT64_C(31)) << 16;
4386 : // op: rt
4387 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4388 1 : Value |= (op & UINT64_C(31)) << 21;
4389 : // op: imm2
4390 1 : op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
4391 1 : Value |= (op & UINT64_C(3)) << 9;
4392 1 : break;
4393 : }
4394 : case Mips::CLO_R6:
4395 : case Mips::CLZ_R6:
4396 : case Mips::DCLO_R6:
4397 : case Mips::DCLZ_R6:
4398 : case Mips::DPOP:
4399 : case Mips::JALR:
4400 : case Mips::JALR64:
4401 : case Mips::JALR_HB:
4402 : case Mips::JALR_HB64:
4403 : case Mips::POP:
4404 : case Mips::RADDU_W_QB: {
4405 : // op: rd
4406 150 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4407 150 : Value |= (op & UINT64_C(31)) << 11;
4408 : // op: rs
4409 150 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4410 150 : Value |= (op & UINT64_C(31)) << 21;
4411 150 : break;
4412 : }
4413 : case Mips::MOVF_I:
4414 : case Mips::MOVF_I64:
4415 : case Mips::MOVT_I:
4416 : case Mips::MOVT_I64: {
4417 : // op: rd
4418 26 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4419 26 : Value |= (op & UINT64_C(31)) << 11;
4420 : // op: rs
4421 26 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4422 26 : Value |= (op & UINT64_C(31)) << 21;
4423 : // op: fcc
4424 26 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4425 26 : Value |= (op & UINT64_C(7)) << 18;
4426 26 : break;
4427 : }
4428 : case Mips::ADD:
4429 : case Mips::ADDQH_PH:
4430 : case Mips::ADDQH_R_PH:
4431 : case Mips::ADDQH_R_W:
4432 : case Mips::ADDQH_W:
4433 : case Mips::ADDQ_PH:
4434 : case Mips::ADDQ_S_PH:
4435 : case Mips::ADDQ_S_W:
4436 : case Mips::ADDSC:
4437 : case Mips::ADDUH_QB:
4438 : case Mips::ADDUH_R_QB:
4439 : case Mips::ADDU_PH:
4440 : case Mips::ADDU_QB:
4441 : case Mips::ADDU_S_PH:
4442 : case Mips::ADDU_S_QB:
4443 : case Mips::ADDWC:
4444 : case Mips::ADDu:
4445 : case Mips::AND:
4446 : case Mips::AND64:
4447 : case Mips::BADDu:
4448 : case Mips::DADD:
4449 : case Mips::DADDu:
4450 : case Mips::DDIV:
4451 : case Mips::DDIVU:
4452 : case Mips::DIV:
4453 : case Mips::DIVU:
4454 : case Mips::DMOD:
4455 : case Mips::DMODU:
4456 : case Mips::DMUH:
4457 : case Mips::DMUHU:
4458 : case Mips::DMUL:
4459 : case Mips::DMULU:
4460 : case Mips::DMUL_R6:
4461 : case Mips::DSUB:
4462 : case Mips::DSUBu:
4463 : case Mips::MOD:
4464 : case Mips::MODSUB:
4465 : case Mips::MODU:
4466 : case Mips::MOVN_I64_I:
4467 : case Mips::MOVN_I64_I64:
4468 : case Mips::MOVN_I_I:
4469 : case Mips::MOVN_I_I64:
4470 : case Mips::MOVZ_I64_I:
4471 : case Mips::MOVZ_I64_I64:
4472 : case Mips::MOVZ_I_I:
4473 : case Mips::MOVZ_I_I64:
4474 : case Mips::MUH:
4475 : case Mips::MUHU:
4476 : case Mips::MUL:
4477 : case Mips::MULEQ_S_W_PHL:
4478 : case Mips::MULEQ_S_W_PHR:
4479 : case Mips::MULEU_S_PH_QBL:
4480 : case Mips::MULEU_S_PH_QBR:
4481 : case Mips::MULQ_RS_PH:
4482 : case Mips::MULQ_RS_W:
4483 : case Mips::MULQ_S_PH:
4484 : case Mips::MULQ_S_W:
4485 : case Mips::MULU:
4486 : case Mips::MUL_PH:
4487 : case Mips::MUL_R6:
4488 : case Mips::MUL_S_PH:
4489 : case Mips::NOR:
4490 : case Mips::NOR64:
4491 : case Mips::OR:
4492 : case Mips::OR64:
4493 : case Mips::SELEQZ:
4494 : case Mips::SELEQZ64:
4495 : case Mips::SELNEZ:
4496 : case Mips::SELNEZ64:
4497 : case Mips::SEQ:
4498 : case Mips::SLT:
4499 : case Mips::SLT64:
4500 : case Mips::SLTu:
4501 : case Mips::SLTu64:
4502 : case Mips::SNE:
4503 : case Mips::SUB:
4504 : case Mips::SUBQH_PH:
4505 : case Mips::SUBQH_R_PH:
4506 : case Mips::SUBQH_R_W:
4507 : case Mips::SUBQH_W:
4508 : case Mips::SUBQ_PH:
4509 : case Mips::SUBQ_S_PH:
4510 : case Mips::SUBQ_S_W:
4511 : case Mips::SUBUH_QB:
4512 : case Mips::SUBUH_R_QB:
4513 : case Mips::SUBU_PH:
4514 : case Mips::SUBU_QB:
4515 : case Mips::SUBU_S_PH:
4516 : case Mips::SUBU_S_QB:
4517 : case Mips::SUBu:
4518 : case Mips::V3MULU:
4519 : case Mips::VMM0:
4520 : case Mips::VMULU:
4521 : case Mips::XOR:
4522 : case Mips::XOR64: {
4523 : // op: rd
4524 1965 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4525 1965 : Value |= (op & UINT64_C(31)) << 11;
4526 : // op: rs
4527 1965 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4528 1965 : Value |= (op & UINT64_C(31)) << 21;
4529 : // op: rt
4530 1965 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4531 1965 : Value |= (op & UINT64_C(31)) << 16;
4532 1965 : break;
4533 : }
4534 : case Mips::ALIGN: {
4535 : // op: rd
4536 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4537 3 : Value |= (op & UINT64_C(31)) << 11;
4538 : // op: rs
4539 3 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4540 3 : Value |= (op & UINT64_C(31)) << 21;
4541 : // op: rt
4542 3 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4543 3 : Value |= (op & UINT64_C(31)) << 16;
4544 : // op: bp
4545 3 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4546 3 : Value |= (op & UINT64_C(3)) << 6;
4547 3 : break;
4548 : }
4549 : case Mips::ALIGN_MMR6: {
4550 : // op: rd
4551 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4552 1 : Value |= (op & UINT64_C(31)) << 11;
4553 : // op: rs
4554 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4555 1 : Value |= (op & UINT64_C(31)) << 21;
4556 : // op: rt
4557 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4558 1 : Value |= (op & UINT64_C(31)) << 16;
4559 : // op: bp
4560 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4561 1 : Value |= (op & UINT64_C(3)) << 9;
4562 1 : break;
4563 : }
4564 : case Mips::DALIGN: {
4565 : // op: rd
4566 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4567 1 : Value |= (op & UINT64_C(31)) << 11;
4568 : // op: rs
4569 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4570 1 : Value |= (op & UINT64_C(31)) << 21;
4571 : // op: rt
4572 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4573 1 : Value |= (op & UINT64_C(31)) << 16;
4574 : // op: bp
4575 1 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4576 1 : Value |= (op & UINT64_C(7)) << 6;
4577 1 : break;
4578 : }
4579 : case Mips::DLSA_R6:
4580 : case Mips::LSA_R6: {
4581 : // op: rd
4582 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4583 3 : Value |= (op & UINT64_C(31)) << 11;
4584 : // op: rs
4585 3 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4586 3 : Value |= (op & UINT64_C(31)) << 21;
4587 : // op: rt
4588 3 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4589 3 : Value |= (op & UINT64_C(31)) << 16;
4590 : // op: imm2
4591 3 : op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
4592 3 : Value |= (op & UINT64_C(3)) << 6;
4593 3 : break;
4594 : }
4595 : case Mips::SHLLV_PH_MM:
4596 : case Mips::SHLLV_QB_MM:
4597 : case Mips::SHLLV_S_PH_MM:
4598 : case Mips::SHLLV_S_W_MM:
4599 : case Mips::SHRAV_PH_MM:
4600 : case Mips::SHRAV_QB_MMR2:
4601 : case Mips::SHRAV_R_PH_MM:
4602 : case Mips::SHRAV_R_QB_MMR2:
4603 : case Mips::SHRAV_R_W_MM:
4604 : case Mips::SHRLV_PH_MMR2:
4605 : case Mips::SHRLV_QB_MM: {
4606 : // op: rd
4607 19 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4608 19 : Value |= (op & UINT64_C(31)) << 11;
4609 : // op: rs
4610 19 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4611 19 : Value |= (op & UINT64_C(31)) << 16;
4612 : // op: rt
4613 19 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4614 19 : Value |= (op & UINT64_C(31)) << 21;
4615 19 : break;
4616 : }
4617 : case Mips::ABSQ_S_PH:
4618 : case Mips::ABSQ_S_QB:
4619 : case Mips::ABSQ_S_W:
4620 : case Mips::BITREV:
4621 : case Mips::BITSWAP:
4622 : case Mips::DBITSWAP:
4623 : case Mips::DSBH:
4624 : case Mips::DSHD:
4625 : case Mips::DSLL64_32:
4626 : case Mips::PRECEQU_PH_QBL:
4627 : case Mips::PRECEQU_PH_QBLA:
4628 : case Mips::PRECEQU_PH_QBR:
4629 : case Mips::PRECEQU_PH_QBRA:
4630 : case Mips::PRECEQ_W_PHL:
4631 : case Mips::PRECEQ_W_PHR:
4632 : case Mips::PRECEU_PH_QBL:
4633 : case Mips::PRECEU_PH_QBLA:
4634 : case Mips::PRECEU_PH_QBR:
4635 : case Mips::PRECEU_PH_QBRA:
4636 : case Mips::REPLV_PH:
4637 : case Mips::REPLV_QB:
4638 : case Mips::SEB:
4639 : case Mips::SEB64:
4640 : case Mips::SEH:
4641 : case Mips::SEH64:
4642 : case Mips::SLL64_32:
4643 : case Mips::SLL64_64:
4644 : case Mips::WSBH: {
4645 : // op: rd
4646 82 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4647 82 : Value |= (op & UINT64_C(31)) << 11;
4648 : // op: rt
4649 82 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4650 82 : Value |= (op & UINT64_C(31)) << 16;
4651 82 : break;
4652 : }
4653 : case Mips::DROTRV:
4654 : case Mips::DSLLV:
4655 : case Mips::DSRAV:
4656 : case Mips::DSRLV:
4657 : case Mips::ROTRV:
4658 : case Mips::SLLV:
4659 : case Mips::SRAV:
4660 : case Mips::SRLV: {
4661 : // op: rd
4662 306 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4663 306 : Value |= (op & UINT64_C(31)) << 11;
4664 : // op: rt
4665 306 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4666 306 : Value |= (op & UINT64_C(31)) << 16;
4667 : // op: rs
4668 306 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4669 306 : Value |= (op & UINT64_C(31)) << 21;
4670 306 : break;
4671 : }
4672 : case Mips::SHLLV_PH:
4673 : case Mips::SHLLV_QB:
4674 : case Mips::SHLLV_S_PH:
4675 : case Mips::SHLLV_S_W:
4676 : case Mips::SHLL_PH:
4677 : case Mips::SHLL_QB:
4678 : case Mips::SHLL_S_PH:
4679 : case Mips::SHLL_S_W:
4680 : case Mips::SHRAV_PH:
4681 : case Mips::SHRAV_QB:
4682 : case Mips::SHRAV_R_PH:
4683 : case Mips::SHRAV_R_QB:
4684 : case Mips::SHRAV_R_W:
4685 : case Mips::SHRA_PH:
4686 : case Mips::SHRA_QB:
4687 : case Mips::SHRA_R_PH:
4688 : case Mips::SHRA_R_QB:
4689 : case Mips::SHRA_R_W:
4690 : case Mips::SHRLV_PH:
4691 : case Mips::SHRLV_QB:
4692 : case Mips::SHRL_PH:
4693 : case Mips::SHRL_QB: {
4694 : // op: rd
4695 38 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4696 38 : Value |= (op & UINT64_C(31)) << 11;
4697 : // op: rt
4698 38 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4699 38 : Value |= (op & UINT64_C(31)) << 16;
4700 : // op: rs_sa
4701 38 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4702 38 : Value |= (op & UINT64_C(31)) << 21;
4703 38 : break;
4704 : }
4705 : case Mips::DROTR:
4706 : case Mips::DROTR32:
4707 : case Mips::DSLL:
4708 : case Mips::DSLL32:
4709 : case Mips::DSRA:
4710 : case Mips::DSRA32:
4711 : case Mips::DSRL:
4712 : case Mips::DSRL32:
4713 : case Mips::ROTR:
4714 : case Mips::SLL:
4715 : case Mips::SRA:
4716 : case Mips::SRL: {
4717 : // op: rd
4718 13513 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4719 13513 : Value |= (op & UINT64_C(31)) << 11;
4720 : // op: rt
4721 13513 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4722 13513 : Value |= (op & UINT64_C(31)) << 16;
4723 : // op: shamt
4724 13513 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4725 13513 : Value |= (op & UINT64_C(31)) << 6;
4726 13513 : break;
4727 : }
4728 : case Mips::ROTRV_MM:
4729 : case Mips::SLLV_MM:
4730 : case Mips::SRAV_MM:
4731 : case Mips::SRLV_MM: {
4732 : // op: rd
4733 44 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4734 44 : Value |= (op & UINT64_C(31)) << 11;
4735 : // op: rt
4736 44 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4737 44 : Value |= (op & UINT64_C(31)) << 21;
4738 : // op: rs
4739 44 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4740 44 : Value |= (op & UINT64_C(31)) << 16;
4741 44 : break;
4742 : }
4743 : case Mips::ADDU_MMR6:
4744 : case Mips::ADD_MMR6:
4745 : case Mips::AND_MMR6:
4746 : case Mips::DIVU_MMR6:
4747 : case Mips::DIV_MMR6:
4748 : case Mips::MODU_MMR6:
4749 : case Mips::MOD_MMR6:
4750 : case Mips::MUHU_MMR6:
4751 : case Mips::MUH_MMR6:
4752 : case Mips::MULU_MMR6:
4753 : case Mips::MUL_MMR6:
4754 : case Mips::NOR_MMR6:
4755 : case Mips::OR_MMR6:
4756 : case Mips::SUBU_MMR6:
4757 : case Mips::SUB_MMR6:
4758 : case Mips::XOR_MMR6: {
4759 : // op: rd
4760 22 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4761 22 : Value |= (op & UINT64_C(31)) << 11;
4762 : // op: rt
4763 22 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4764 22 : Value |= (op & UINT64_C(31)) << 21;
4765 : // op: rs
4766 22 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4767 22 : Value |= (op & UINT64_C(31)) << 16;
4768 22 : break;
4769 : }
4770 : case Mips::MFHI_MM:
4771 : case Mips::MFLO_MM: {
4772 : // op: rd
4773 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4774 2 : Value |= (op & UINT64_C(31)) << 16;
4775 2 : break;
4776 : }
4777 : case Mips::BITSWAP_MMR6: {
4778 : // op: rd
4779 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4780 1 : Value |= (op & UINT64_C(31)) << 16;
4781 : // op: rt
4782 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4783 1 : Value |= (op & UINT64_C(31)) << 21;
4784 1 : break;
4785 : }
4786 : case Mips::CLO:
4787 : case Mips::CLZ:
4788 : case Mips::DCLO:
4789 : case Mips::DCLZ: {
4790 : // op: rd
4791 29 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4792 29 : Value |= (op & UINT64_C(31)) << 16;
4793 29 : Value |= (op & UINT64_C(31)) << 11;
4794 : // op: rs
4795 29 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4796 29 : Value |= (op & UINT64_C(31)) << 21;
4797 29 : break;
4798 : }
4799 : case Mips::CLO_MM:
4800 : case Mips::CLZ_MM: {
4801 : // op: rd
4802 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4803 2 : Value |= (op & UINT64_C(31)) << 21;
4804 : // op: rs
4805 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4806 2 : Value |= (op & UINT64_C(31)) << 16;
4807 2 : break;
4808 : }
4809 : case Mips::MOVF_I_MM:
4810 : case Mips::MOVT_I_MM: {
4811 : // op: rd
4812 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4813 6 : Value |= (op & UINT64_C(31)) << 21;
4814 : // op: rs
4815 6 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4816 6 : Value |= (op & UINT64_C(31)) << 16;
4817 : // op: fcc
4818 6 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4819 6 : Value |= (op & UINT64_C(7)) << 13;
4820 6 : break;
4821 : }
4822 : case Mips::SEB_MM:
4823 : case Mips::SEH_MM:
4824 : case Mips::WSBH_MM: {
4825 : // op: rd
4826 9 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4827 9 : Value |= (op & UINT64_C(31)) << 21;
4828 : // op: rt
4829 9 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4830 9 : Value |= (op & UINT64_C(31)) << 16;
4831 9 : break;
4832 : }
4833 : case Mips::ROTR_MM:
4834 : case Mips::SLL_MM:
4835 : case Mips::SLL_MMR6:
4836 : case Mips::SRA_MM:
4837 : case Mips::SRL_MM: {
4838 : // op: rd
4839 221 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4840 221 : Value |= (op & UINT64_C(31)) << 21;
4841 : // op: rt
4842 221 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4843 221 : Value |= (op & UINT64_C(31)) << 16;
4844 : // op: shamt
4845 221 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4846 221 : Value |= (op & UINT64_C(31)) << 11;
4847 221 : break;
4848 : }
4849 : case Mips::CFCMSA: {
4850 : // op: rd
4851 16 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4852 16 : Value |= (op & UINT64_C(31)) << 6;
4853 : // op: cs
4854 16 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4855 16 : Value |= (op & UINT64_C(31)) << 11;
4856 16 : break;
4857 : }
4858 : case Mips::LI16_MM:
4859 : case Mips::LI16_MMR6: {
4860 : // op: rd
4861 17 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4862 17 : Value |= (op & UINT64_C(7)) << 7;
4863 : // op: imm
4864 17 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4865 17 : Value |= op & UINT64_C(127);
4866 17 : break;
4867 : }
4868 : case Mips::ADDIUR1SP_MM: {
4869 : // op: rd
4870 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4871 4 : Value |= (op & UINT64_C(7)) << 7;
4872 : // op: imm
4873 4 : op = getUImm6Lsl2Encoding(MI, 1, Fixups, STI);
4874 4 : Value |= (op & UINT64_C(63)) << 1;
4875 4 : break;
4876 : }
4877 : case Mips::ADDIUR2_MM: {
4878 : // op: rd
4879 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4880 8 : Value |= (op & UINT64_C(7)) << 7;
4881 : // op: rs
4882 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4883 8 : Value |= (op & UINT64_C(7)) << 4;
4884 : // op: imm
4885 8 : op = getSImm3Lsa2Value(MI, 2, Fixups, STI);
4886 8 : Value |= (op & UINT64_C(7)) << 1;
4887 8 : break;
4888 : }
4889 : case Mips::ANDI16_MM:
4890 : case Mips::ANDI16_MMR6: {
4891 : // op: rd
4892 5 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4893 5 : Value |= (op & UINT64_C(7)) << 7;
4894 : // op: rs
4895 5 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4896 5 : Value |= (op & UINT64_C(7)) << 4;
4897 : // op: imm
4898 5 : op = getUImm4AndValue(MI, 2, Fixups, STI);
4899 5 : Value |= op & UINT64_C(15);
4900 5 : break;
4901 : }
4902 : case Mips::SLL16_MM:
4903 : case Mips::SLL16_MMR6:
4904 : case Mips::SRL16_MM:
4905 : case Mips::SRL16_MMR6: {
4906 : // op: rd
4907 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4908 8 : Value |= (op & UINT64_C(7)) << 7;
4909 : // op: rt
4910 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4911 8 : Value |= (op & UINT64_C(7)) << 4;
4912 : // op: shamt
4913 8 : op = getUImm3Mod8Encoding(MI, 2, Fixups, STI);
4914 8 : Value |= (op & UINT64_C(7)) << 1;
4915 8 : break;
4916 : }
4917 : case Mips::ADDU16_MM:
4918 : case Mips::SUBU16_MM: {
4919 : // op: rd
4920 7 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4921 7 : Value |= (op & UINT64_C(7)) << 7;
4922 : // op: rt
4923 7 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4924 7 : Value |= (op & UINT64_C(7)) << 4;
4925 : // op: rs
4926 7 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4927 7 : Value |= (op & UINT64_C(7)) << 1;
4928 7 : break;
4929 : }
4930 : case Mips::MFHI16_MM:
4931 : case Mips::MFLO16_MM: {
4932 : // op: rd
4933 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4934 6 : Value |= op & UINT64_C(31);
4935 6 : break;
4936 : }
4937 : case Mips::ADDIUS5_MM: {
4938 : // op: rd
4939 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4940 4 : Value |= (op & UINT64_C(31)) << 5;
4941 : // op: imm
4942 4 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4943 4 : Value |= (op & UINT64_C(15)) << 1;
4944 4 : break;
4945 : }
4946 : case Mips::DVP_MMR6:
4947 : case Mips::EVP_MMR6:
4948 : case Mips::JR_MM:
4949 : case Mips::MTHI_MM:
4950 : case Mips::MTLO_MM: {
4951 : // op: rs
4952 21 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4953 21 : Value |= (op & UINT64_C(31)) << 16;
4954 21 : break;
4955 : }
4956 : case Mips::MFHI_DSP_MM:
4957 : case Mips::MFLO_DSP_MM: {
4958 : // op: rs
4959 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4960 2 : Value |= (op & UINT64_C(31)) << 16;
4961 : // op: ac
4962 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4963 2 : Value |= (op & UINT64_C(3)) << 14;
4964 2 : break;
4965 : }
4966 : case Mips::TEQI_MM:
4967 : case Mips::TGEIU_MM:
4968 : case Mips::TGEI_MM:
4969 : case Mips::TLTIU_MM:
4970 : case Mips::TLTI_MM:
4971 : case Mips::TNEI_MM: {
4972 : // op: rs
4973 18 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4974 18 : Value |= (op & UINT64_C(31)) << 16;
4975 : // op: imm16
4976 18 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4977 18 : Value |= op & UINT64_C(65535);
4978 18 : break;
4979 : }
4980 : case Mips::BEQZC_MM:
4981 : case Mips::BGEZALS_MM:
4982 : case Mips::BGEZAL_MM:
4983 : case Mips::BGEZ_MM:
4984 : case Mips::BGTZ_MM:
4985 : case Mips::BLEZ_MM:
4986 : case Mips::BLTZALS_MM:
4987 : case Mips::BLTZAL_MM:
4988 : case Mips::BLTZ_MM:
4989 : case Mips::BNEZC_MM: {
4990 : // op: rs
4991 50 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4992 50 : Value |= (op & UINT64_C(31)) << 16;
4993 : // op: offset
4994 50 : op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
4995 50 : Value |= op & UINT64_C(65535);
4996 50 : break;
4997 : }
4998 : case Mips::MADDU_MM:
4999 : case Mips::MADD_MM:
5000 : case Mips::MSUBU_MM:
5001 : case Mips::MSUB_MM:
5002 : case Mips::MULT_MM:
5003 : case Mips::MULTu_MM:
5004 : case Mips::SDIV_MM:
5005 : case Mips::UDIV_MM: {
5006 : // op: rs
5007 24 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5008 24 : Value |= (op & UINT64_C(31)) << 16;
5009 : // op: rt
5010 24 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5011 24 : Value |= (op & UINT64_C(31)) << 21;
5012 24 : break;
5013 : }
5014 : case Mips::TEQ_MM:
5015 : case Mips::TGEU_MM:
5016 : case Mips::TGE_MM:
5017 : case Mips::TLTU_MM:
5018 : case Mips::TLT_MM:
5019 : case Mips::TNE_MM: {
5020 : // op: rs
5021 30 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5022 30 : Value |= (op & UINT64_C(31)) << 16;
5023 : // op: rt
5024 30 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5025 30 : Value |= (op & UINT64_C(31)) << 21;
5026 : // op: code_
5027 30 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5028 30 : Value |= (op & UINT64_C(15)) << 12;
5029 30 : break;
5030 : }
5031 : case Mips::BEQ_MM:
5032 : case Mips::BNE_MM: {
5033 : // op: rs
5034 33 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5035 33 : Value |= (op & UINT64_C(31)) << 16;
5036 : // op: rt
5037 33 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5038 33 : Value |= (op & UINT64_C(31)) << 21;
5039 : // op: offset
5040 33 : op = getBranchTargetOpValueMM(MI, 2, Fixups, STI);
5041 33 : Value |= op & UINT64_C(65535);
5042 33 : break;
5043 : }
5044 : case Mips::GINVI_MMR6: {
5045 : // op: rs
5046 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5047 1 : Value |= (op & UINT64_C(31)) << 16;
5048 : // op: type
5049 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5050 1 : Value |= (op & UINT64_C(3)) << 9;
5051 1 : break;
5052 : }
5053 : case Mips::GINVT_MMR6: {
5054 : // op: rs
5055 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5056 1 : Value |= (op & UINT64_C(31)) << 16;
5057 : // op: type
5058 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5059 1 : Value |= (op & UINT64_C(3)) << 9;
5060 1 : break;
5061 : }
5062 : case Mips::JR:
5063 : case Mips::JR64:
5064 : case Mips::JR_HB:
5065 : case Mips::JR_HB64:
5066 : case Mips::JR_HB64_R6:
5067 : case Mips::JR_HB_R6:
5068 : case Mips::MTHI:
5069 : case Mips::MTHI64:
5070 : case Mips::MTLO:
5071 : case Mips::MTLO64:
5072 : case Mips::MTM0:
5073 : case Mips::MTM1:
5074 : case Mips::MTM2:
5075 : case Mips::MTP0:
5076 : case Mips::MTP1:
5077 : case Mips::MTP2: {
5078 : // op: rs
5079 185 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5080 185 : Value |= (op & UINT64_C(31)) << 21;
5081 185 : break;
5082 : }
5083 : case Mips::ALUIPC:
5084 : case Mips::AUIPC: {
5085 : // op: rs
5086 15 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5087 15 : Value |= (op & UINT64_C(31)) << 21;
5088 : // op: imm
5089 15 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5090 15 : Value |= op & UINT64_C(65535);
5091 15 : break;
5092 : }
5093 : case Mips::DAHI:
5094 : case Mips::DATI: {
5095 : // op: rs
5096 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5097 2 : Value |= (op & UINT64_C(31)) << 21;
5098 : // op: imm
5099 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5100 2 : Value |= op & UINT64_C(65535);
5101 2 : break;
5102 : }
5103 : case Mips::LDPC: {
5104 : // op: rs
5105 9 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5106 9 : Value |= (op & UINT64_C(31)) << 21;
5107 : // op: imm
5108 9 : op = getSimm18Lsl3Encoding(MI, 1, Fixups, STI);
5109 9 : Value |= op & UINT64_C(262143);
5110 9 : break;
5111 : }
5112 : case Mips::ADDIUPC:
5113 : case Mips::LWPC:
5114 : case Mips::LWUPC: {
5115 : // op: rs
5116 46 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5117 46 : Value |= (op & UINT64_C(31)) << 21;
5118 : // op: imm
5119 46 : op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
5120 46 : Value |= op & UINT64_C(524287);
5121 46 : break;
5122 : }
5123 : case Mips::TEQI:
5124 : case Mips::TGEI:
5125 : case Mips::TGEIU:
5126 : case Mips::TLTI:
5127 : case Mips::TNEI:
5128 : case Mips::TTLTIU: {
5129 : // op: rs
5130 84 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5131 84 : Value |= (op & UINT64_C(31)) << 21;
5132 : // op: imm16
5133 84 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5134 84 : Value |= op & UINT64_C(65535);
5135 84 : break;
5136 : }
5137 : case Mips::WRDSP: {
5138 : // op: rs
5139 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5140 8 : Value |= (op & UINT64_C(31)) << 21;
5141 : // op: mask
5142 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5143 8 : Value |= (op & UINT64_C(1023)) << 11;
5144 8 : break;
5145 : }
5146 : case Mips::BEQZC:
5147 : case Mips::BEQZC64:
5148 : case Mips::BNEZC:
5149 : case Mips::BNEZC64: {
5150 : // op: rs
5151 26 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5152 26 : Value |= (op & UINT64_C(31)) << 21;
5153 : // op: offset
5154 26 : op = getBranchTarget21OpValue(MI, 1, Fixups, STI);
5155 26 : Value |= op & UINT64_C(2097151);
5156 26 : break;
5157 : }
5158 : case Mips::BEQZC_MMR6:
5159 : case Mips::BNEZC_MMR6: {
5160 : // op: rs
5161 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5162 8 : Value |= (op & UINT64_C(31)) << 21;
5163 : // op: offset
5164 8 : op = getBranchTarget21OpValueMM(MI, 1, Fixups, STI);
5165 8 : Value |= op & UINT64_C(2097151);
5166 8 : break;
5167 : }
5168 : case Mips::BGEZ:
5169 : case Mips::BGEZ64:
5170 : case Mips::BGEZAL:
5171 : case Mips::BGEZALL:
5172 : case Mips::BGEZL:
5173 : case Mips::BGTZ:
5174 : case Mips::BGTZ64:
5175 : case Mips::BGTZL:
5176 : case Mips::BLEZ:
5177 : case Mips::BLEZ64:
5178 : case Mips::BLEZL:
5179 : case Mips::BLTZ:
5180 : case Mips::BLTZ64:
5181 : case Mips::BLTZAL:
5182 : case Mips::BLTZALL:
5183 : case Mips::BLTZL: {
5184 : // op: rs
5185 168 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5186 168 : Value |= (op & UINT64_C(31)) << 21;
5187 : // op: offset
5188 168 : op = getBranchTargetOpValue(MI, 1, Fixups, STI);
5189 168 : Value |= op & UINT64_C(65535);
5190 168 : break;
5191 : }
5192 : case Mips::BBIT0:
5193 : case Mips::BBIT032:
5194 : case Mips::BBIT1:
5195 : case Mips::BBIT132: {
5196 : // op: rs
5197 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5198 6 : Value |= (op & UINT64_C(31)) << 21;
5199 : // op: p
5200 6 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5201 6 : Value |= (op & UINT64_C(31)) << 16;
5202 : // op: offset
5203 6 : op = getBranchTargetOpValue(MI, 2, Fixups, STI);
5204 6 : Value |= op & UINT64_C(65535);
5205 6 : break;
5206 : }
5207 : case Mips::CMPU_EQ_QB:
5208 : case Mips::CMPU_LE_QB:
5209 : case Mips::CMPU_LT_QB:
5210 : case Mips::CMP_EQ_PH:
5211 : case Mips::CMP_LE_PH:
5212 : case Mips::CMP_LT_PH:
5213 : case Mips::DMULT:
5214 : case Mips::DMULTu:
5215 : case Mips::DSDIV:
5216 : case Mips::DUDIV:
5217 : case Mips::MADD:
5218 : case Mips::MADDU:
5219 : case Mips::MSUB:
5220 : case Mips::MSUBU:
5221 : case Mips::MULT:
5222 : case Mips::MULTu:
5223 : case Mips::SDIV:
5224 : case Mips::UDIV: {
5225 : // op: rs
5226 585 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5227 585 : Value |= (op & UINT64_C(31)) << 21;
5228 : // op: rt
5229 585 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5230 585 : Value |= (op & UINT64_C(31)) << 16;
5231 585 : break;
5232 : }
5233 : case Mips::TEQ:
5234 : case Mips::TGE:
5235 : case Mips::TGEU:
5236 : case Mips::TLT:
5237 : case Mips::TLTU:
5238 : case Mips::TNE: {
5239 : // op: rs
5240 321 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5241 321 : Value |= (op & UINT64_C(31)) << 21;
5242 : // op: rt
5243 321 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5244 321 : Value |= (op & UINT64_C(31)) << 16;
5245 : // op: code_
5246 321 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5247 321 : Value |= (op & UINT64_C(1023)) << 6;
5248 321 : break;
5249 : }
5250 : case Mips::BEQ:
5251 : case Mips::BEQ64:
5252 : case Mips::BEQC:
5253 : case Mips::BEQC64:
5254 : case Mips::BEQL:
5255 : case Mips::BGEC:
5256 : case Mips::BGEC64:
5257 : case Mips::BGEUC:
5258 : case Mips::BGEUC64:
5259 : case Mips::BLTC:
5260 : case Mips::BLTC64:
5261 : case Mips::BLTUC:
5262 : case Mips::BLTUC64:
5263 : case Mips::BNE:
5264 : case Mips::BNE64:
5265 : case Mips::BNEC:
5266 : case Mips::BNEC64:
5267 : case Mips::BNEL:
5268 : case Mips::BNVC:
5269 : case Mips::BOVC: {
5270 : // op: rs
5271 360 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5272 360 : Value |= (op & UINT64_C(31)) << 21;
5273 : // op: rt
5274 360 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5275 360 : Value |= (op & UINT64_C(31)) << 16;
5276 : // op: offset
5277 360 : op = getBranchTargetOpValue(MI, 2, Fixups, STI);
5278 360 : Value |= op & UINT64_C(65535);
5279 360 : break;
5280 : }
5281 : case Mips::FORK: {
5282 : // op: rs
5283 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5284 1 : Value |= (op & UINT64_C(31)) << 21;
5285 : // op: rt
5286 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5287 1 : Value |= (op & UINT64_C(31)) << 16;
5288 : // op: rd
5289 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5290 1 : Value |= (op & UINT64_C(31)) << 11;
5291 1 : break;
5292 : }
5293 : case Mips::GINVI: {
5294 : // op: rs
5295 5 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5296 5 : Value |= (op & UINT64_C(31)) << 21;
5297 : // op: type_
5298 5 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5299 5 : Value |= (op & UINT64_C(3)) << 8;
5300 5 : break;
5301 : }
5302 : case Mips::GINVT: {
5303 : // op: rs
5304 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5305 2 : Value |= (op & UINT64_C(31)) << 21;
5306 : // op: type_
5307 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5308 2 : Value |= (op & UINT64_C(3)) << 8;
5309 2 : break;
5310 : }
5311 : case Mips::JALRC16_MMR6:
5312 : case Mips::JRC16_MMR6: {
5313 : // op: rs
5314 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5315 2 : Value |= (op & UINT64_C(31)) << 5;
5316 2 : break;
5317 : }
5318 : case Mips::ADDIUPC_MM: {
5319 : // op: rs
5320 9 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5321 9 : Value |= (op & UINT64_C(7)) << 23;
5322 : // op: imm
5323 9 : op = getSimm23Lsl2Encoding(MI, 1, Fixups, STI);
5324 9 : Value |= op & UINT64_C(8388607);
5325 9 : break;
5326 : }
5327 : case Mips::BEQZ16_MM:
5328 : case Mips::BEQZC16_MMR6:
5329 : case Mips::BNEZ16_MM:
5330 : case Mips::BNEZC16_MMR6: {
5331 : // op: rs
5332 15 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5333 15 : Value |= (op & UINT64_C(7)) << 7;
5334 : // op: offset
5335 15 : op = getBranchTarget7OpValueMM(MI, 1, Fixups, STI);
5336 15 : Value |= op & UINT64_C(127);
5337 15 : break;
5338 : }
5339 : case Mips::JALR16_MM:
5340 : case Mips::JALRS16_MM:
5341 : case Mips::JR16_MM:
5342 : case Mips::JRC16_MM: {
5343 : // op: rs
5344 35 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5345 35 : Value |= op & UINT64_C(31);
5346 35 : break;
5347 : }
5348 : case Mips::CTCMSA: {
5349 : // op: rs
5350 16 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5351 16 : Value |= (op & UINT64_C(31)) << 11;
5352 : // op: cd
5353 16 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5354 16 : Value |= (op & UINT64_C(31)) << 6;
5355 16 : break;
5356 : }
5357 : case Mips::FILL_B:
5358 : case Mips::FILL_D:
5359 : case Mips::FILL_H:
5360 : case Mips::FILL_W: {
5361 : // op: rs
5362 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5363 4 : Value |= (op & UINT64_C(31)) << 11;
5364 : // op: wd
5365 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5366 4 : Value |= (op & UINT64_C(31)) << 6;
5367 4 : break;
5368 : }
5369 : case Mips::MTHI_DSP_MM:
5370 : case Mips::MTHLIP_MM:
5371 : case Mips::MTLO_DSP_MM:
5372 : case Mips::SHILOV_MM: {
5373 : // op: rs
5374 5 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5375 5 : Value |= (op & UINT64_C(31)) << 16;
5376 : // op: ac
5377 5 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5378 5 : Value |= (op & UINT64_C(3)) << 14;
5379 5 : break;
5380 : }
5381 : case Mips::JALRS_MM:
5382 : case Mips::JALR_MM: {
5383 : // op: rs
5384 18 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5385 18 : Value |= (op & UINT64_C(31)) << 16;
5386 : // op: rd
5387 18 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5388 18 : Value |= (op & UINT64_C(31)) << 21;
5389 18 : break;
5390 : }
5391 : case Mips::CLO_MMR6: {
5392 : // op: rs
5393 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5394 1 : Value |= (op & UINT64_C(31)) << 16;
5395 : // op: rt
5396 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5397 1 : Value |= (op & UINT64_C(31)) << 21;
5398 1 : break;
5399 : }
5400 : case Mips::AUI_MMR6: {
5401 : // op: rs
5402 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5403 1 : Value |= (op & UINT64_C(31)) << 16;
5404 : // op: rt
5405 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5406 1 : Value |= (op & UINT64_C(31)) << 21;
5407 : // op: imm
5408 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5409 1 : Value |= op & UINT64_C(65535);
5410 1 : break;
5411 : }
5412 : case Mips::ADDi_MM:
5413 : case Mips::ADDiu_MM:
5414 : case Mips::ANDi_MM:
5415 : case Mips::ORi_MM:
5416 : case Mips::XORi_MM: {
5417 : // op: rs
5418 262 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5419 262 : Value |= (op & UINT64_C(31)) << 16;
5420 : // op: rt
5421 262 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5422 262 : Value |= (op & UINT64_C(31)) << 21;
5423 : // op: imm16
5424 262 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5425 262 : Value |= op & UINT64_C(65535);
5426 262 : break;
5427 : }
5428 : case Mips::MTHI_DSP:
5429 : case Mips::MTLO_DSP: {
5430 : // op: rs
5431 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5432 4 : Value |= (op & UINT64_C(31)) << 21;
5433 : // op: ac
5434 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5435 4 : Value |= (op & UINT64_C(3)) << 11;
5436 4 : break;
5437 : }
5438 : case Mips::YIELD: {
5439 : // op: rs
5440 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5441 2 : Value |= (op & UINT64_C(31)) << 21;
5442 : // op: rd
5443 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5444 2 : Value |= (op & UINT64_C(31)) << 11;
5445 2 : break;
5446 : }
5447 : case Mips::CLZ_MMR6: {
5448 : // op: rs
5449 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5450 1 : Value |= (op & UINT64_C(31)) << 21;
5451 : // op: rt
5452 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5453 1 : Value |= (op & UINT64_C(31)) << 11;
5454 1 : break;
5455 : }
5456 : case Mips::AUI:
5457 : case Mips::DAUI: {
5458 : // op: rs
5459 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5460 4 : Value |= (op & UINT64_C(31)) << 21;
5461 : // op: rt
5462 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5463 4 : Value |= (op & UINT64_C(31)) << 16;
5464 : // op: imm
5465 4 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5466 4 : Value |= op & UINT64_C(65535);
5467 4 : break;
5468 : }
5469 : case Mips::SEQi:
5470 : case Mips::SNEi: {
5471 : // op: rs
5472 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5473 4 : Value |= (op & UINT64_C(31)) << 21;
5474 : // op: rt
5475 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5476 4 : Value |= (op & UINT64_C(31)) << 16;
5477 : // op: imm10
5478 4 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5479 4 : Value |= (op & UINT64_C(1023)) << 6;
5480 4 : break;
5481 : }
5482 : case Mips::ADDi:
5483 : case Mips::ADDiu:
5484 : case Mips::ANDi:
5485 : case Mips::ANDi64:
5486 : case Mips::DADDi:
5487 : case Mips::DADDiu:
5488 : case Mips::ORi:
5489 : case Mips::ORi64:
5490 : case Mips::XORi:
5491 : case Mips::XORi64: {
5492 : // op: rs
5493 4110 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5494 4110 : Value |= (op & UINT64_C(31)) << 21;
5495 : // op: rt
5496 4110 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5497 4110 : Value |= (op & UINT64_C(31)) << 16;
5498 : // op: imm16
5499 4110 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5500 4110 : Value |= op & UINT64_C(65535);
5501 4110 : break;
5502 : }
5503 : case Mips::PRECR_SRA_PH_W:
5504 : case Mips::PRECR_SRA_R_PH_W: {
5505 : // op: rs
5506 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5507 4 : Value |= (op & UINT64_C(31)) << 21;
5508 : // op: rt
5509 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5510 4 : Value |= (op & UINT64_C(31)) << 16;
5511 : // op: sa
5512 4 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5513 4 : Value |= (op & UINT64_C(31)) << 11;
5514 4 : break;
5515 : }
5516 : case Mips::CRC32B:
5517 : case Mips::CRC32CB:
5518 : case Mips::CRC32CD:
5519 : case Mips::CRC32CH:
5520 : case Mips::CRC32CW:
5521 : case Mips::CRC32D:
5522 : case Mips::CRC32H:
5523 : case Mips::CRC32W: {
5524 : // op: rs
5525 17 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5526 17 : Value |= (op & UINT64_C(31)) << 21;
5527 : // op: rt
5528 17 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5529 17 : Value |= (op & UINT64_C(31)) << 16;
5530 17 : break;
5531 : }
5532 : case Mips::CMPGDU_EQ_QB:
5533 : case Mips::CMPGDU_LE_QB:
5534 : case Mips::CMPGDU_LT_QB:
5535 : case Mips::CMPGU_EQ_QB:
5536 : case Mips::CMPGU_LE_QB:
5537 : case Mips::CMPGU_LT_QB:
5538 : case Mips::PACKRL_PH:
5539 : case Mips::PICK_PH:
5540 : case Mips::PICK_QB:
5541 : case Mips::PRECRQU_S_QB_PH:
5542 : case Mips::PRECRQ_PH_W:
5543 : case Mips::PRECRQ_QB_PH:
5544 : case Mips::PRECRQ_RS_PH_W:
5545 : case Mips::PRECR_QB_PH: {
5546 : // op: rs
5547 24 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5548 24 : Value |= (op & UINT64_C(31)) << 21;
5549 : // op: rt
5550 24 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5551 24 : Value |= (op & UINT64_C(31)) << 16;
5552 : // op: rd
5553 24 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5554 24 : Value |= (op & UINT64_C(31)) << 11;
5555 24 : break;
5556 : }
5557 : case Mips::DLSA:
5558 : case Mips::LSA: {
5559 : // op: rs
5560 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5561 8 : Value |= (op & UINT64_C(31)) << 21;
5562 : // op: rt
5563 8 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5564 8 : Value |= (op & UINT64_C(31)) << 16;
5565 : // op: rd
5566 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5567 8 : Value |= (op & UINT64_C(31)) << 11;
5568 : // op: sa
5569 8 : op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
5570 8 : Value |= (op & UINT64_C(3)) << 6;
5571 8 : break;
5572 : }
5573 : case Mips::ADDU16_MMR6:
5574 : case Mips::SUBU16_MMR6: {
5575 : // op: rs
5576 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5577 2 : Value |= (op & UINT64_C(7)) << 7;
5578 : // op: rt
5579 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5580 2 : Value |= (op & UINT64_C(7)) << 4;
5581 : // op: rd
5582 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5583 2 : Value |= (op & UINT64_C(7)) << 1;
5584 2 : break;
5585 : }
5586 : case Mips::MOVE16_MM:
5587 : case Mips::MOVE16_MMR6: {
5588 : // op: rs
5589 44 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5590 44 : Value |= op & UINT64_C(31);
5591 : // op: rd
5592 44 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5593 44 : Value |= (op & UINT64_C(31)) << 5;
5594 44 : break;
5595 : }
5596 : case Mips::DI:
5597 : case Mips::DI_MM:
5598 : case Mips::DI_MMR6:
5599 : case Mips::DMT:
5600 : case Mips::DVP:
5601 : case Mips::DVPE:
5602 : case Mips::EI:
5603 : case Mips::EI_MM:
5604 : case Mips::EI_MMR6:
5605 : case Mips::EMT:
5606 : case Mips::EVP:
5607 : case Mips::EVPE: {
5608 : // op: rt
5609 84 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5610 84 : Value |= (op & UINT64_C(31)) << 16;
5611 84 : break;
5612 : }
5613 : case Mips::EXTP:
5614 : case Mips::EXTPDP:
5615 : case Mips::EXTPDPV:
5616 : case Mips::EXTPV:
5617 : case Mips::EXTRV_RS_W:
5618 : case Mips::EXTRV_R_W:
5619 : case Mips::EXTRV_S_H:
5620 : case Mips::EXTRV_W:
5621 : case Mips::EXTR_RS_W:
5622 : case Mips::EXTR_R_W:
5623 : case Mips::EXTR_S_H:
5624 : case Mips::EXTR_W: {
5625 : // op: rt
5626 24 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5627 24 : Value |= (op & UINT64_C(31)) << 16;
5628 : // op: ac
5629 24 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5630 24 : Value |= (op & UINT64_C(3)) << 11;
5631 : // op: shift_rs
5632 24 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5633 24 : Value |= (op & UINT64_C(31)) << 21;
5634 24 : break;
5635 : }
5636 : case Mips::LL64_R6:
5637 : case Mips::LLD_R6:
5638 : case Mips::LL_R6: {
5639 : // op: rt
5640 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5641 3 : Value |= (op & UINT64_C(31)) << 16;
5642 : // op: addr
5643 3 : op = getMemEncoding(MI, 1, Fixups, STI);
5644 3 : Value |= (op & UINT64_C(2031616)) << 5;
5645 3 : Value |= (op & UINT64_C(511)) << 7;
5646 3 : break;
5647 : }
5648 : case Mips::LB:
5649 : case Mips::LB64:
5650 : case Mips::LBu:
5651 : case Mips::LBu64:
5652 : case Mips::LD:
5653 : case Mips::LDC1:
5654 : case Mips::LDC164:
5655 : case Mips::LDC2:
5656 : case Mips::LDC3:
5657 : case Mips::LDL:
5658 : case Mips::LDR:
5659 : case Mips::LEA_ADDiu:
5660 : case Mips::LEA_ADDiu64:
5661 : case Mips::LH:
5662 : case Mips::LH64:
5663 : case Mips::LHu:
5664 : case Mips::LHu64:
5665 : case Mips::LL:
5666 : case Mips::LL64:
5667 : case Mips::LLD:
5668 : case Mips::LW:
5669 : case Mips::LW64:
5670 : case Mips::LWC1:
5671 : case Mips::LWC2:
5672 : case Mips::LWC3:
5673 : case Mips::LWDSP:
5674 : case Mips::LWL:
5675 : case Mips::LWL64:
5676 : case Mips::LWR:
5677 : case Mips::LWR64:
5678 : case Mips::LWu:
5679 : case Mips::SB:
5680 : case Mips::SB64:
5681 : case Mips::SD:
5682 : case Mips::SDC1:
5683 : case Mips::SDC164:
5684 : case Mips::SDC2:
5685 : case Mips::SDC3:
5686 : case Mips::SDL:
5687 : case Mips::SDR:
5688 : case Mips::SH:
5689 : case Mips::SH64:
5690 : case Mips::SW:
5691 : case Mips::SW64:
5692 : case Mips::SWC1:
5693 : case Mips::SWC2:
5694 : case Mips::SWC3:
5695 : case Mips::SWDSP:
5696 : case Mips::SWL:
5697 : case Mips::SWL64:
5698 : case Mips::SWR:
5699 : case Mips::SWR64: {
5700 : // op: rt
5701 11987 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5702 11987 : Value |= (op & UINT64_C(31)) << 16;
5703 : // op: addr
5704 11987 : op = getMemEncoding(MI, 1, Fixups, STI);
5705 11987 : Value |= (op & UINT64_C(2031616)) << 5;
5706 11987 : Value |= op & UINT64_C(65535);
5707 11987 : break;
5708 : }
5709 : case Mips::LDC2_R6:
5710 : case Mips::LWC2_R6:
5711 : case Mips::SDC2_R6:
5712 : case Mips::SWC2_R6: {
5713 : // op: rt
5714 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5715 8 : Value |= (op & UINT64_C(31)) << 16;
5716 : // op: addr
5717 8 : op = getMemEncoding(MI, 1, Fixups, STI);
5718 8 : Value |= (op & UINT64_C(2031616)) >> 5;
5719 8 : Value |= op & UINT64_C(2047);
5720 8 : break;
5721 : }
5722 : case Mips::CFC1:
5723 : case Mips::DMFC1:
5724 : case Mips::MFC1:
5725 : case Mips::MFC1_D64:
5726 : case Mips::MFHC1_D32:
5727 : case Mips::MFHC1_D64: {
5728 : // op: rt
5729 54 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5730 54 : Value |= (op & UINT64_C(31)) << 16;
5731 : // op: fs
5732 54 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5733 54 : Value |= (op & UINT64_C(31)) << 11;
5734 54 : break;
5735 : }
5736 : case Mips::DMFC2_OCTEON:
5737 : case Mips::DMTC2_OCTEON:
5738 : case Mips::LUi:
5739 : case Mips::LUi64:
5740 : case Mips::LUi_MM: {
5741 : // op: rt
5742 1762 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5743 1762 : Value |= (op & UINT64_C(31)) << 16;
5744 : // op: imm16
5745 1762 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5746 1762 : Value |= op & UINT64_C(65535);
5747 1762 : break;
5748 : }
5749 : case Mips::BEQZALC:
5750 : case Mips::BGTZALC:
5751 : case Mips::BGTZC:
5752 : case Mips::BGTZC64:
5753 : case Mips::BLEZALC:
5754 : case Mips::BLEZC:
5755 : case Mips::BLEZC64:
5756 : case Mips::BNEZALC: {
5757 : // op: rt
5758 12 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5759 12 : Value |= (op & UINT64_C(31)) << 16;
5760 : // op: offset
5761 12 : op = getBranchTargetOpValue(MI, 1, Fixups, STI);
5762 12 : Value |= op & UINT64_C(65535);
5763 12 : break;
5764 : }
5765 : case Mips::BC1EQZC_MMR6:
5766 : case Mips::BC1NEZC_MMR6:
5767 : case Mips::BC2EQZC_MMR6:
5768 : case Mips::BC2NEZC_MMR6: {
5769 : // op: rt
5770 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5771 4 : Value |= (op & UINT64_C(31)) << 16;
5772 : // op: offset
5773 4 : op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
5774 4 : Value |= op & UINT64_C(65535);
5775 4 : break;
5776 : }
5777 : case Mips::JIALC:
5778 : case Mips::JIALC64:
5779 : case Mips::JIALC_MMR6:
5780 : case Mips::JIC:
5781 : case Mips::JIC64:
5782 : case Mips::JIC_MMR6: {
5783 : // op: rt
5784 52 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5785 52 : Value |= (op & UINT64_C(31)) << 16;
5786 : // op: offset
5787 52 : op = getJumpOffset16OpValue(MI, 1, Fixups, STI);
5788 52 : Value |= op & UINT64_C(65535);
5789 52 : break;
5790 : }
5791 : case Mips::RDHWR:
5792 : case Mips::RDHWR64: {
5793 : // op: rt
5794 52 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5795 52 : Value |= (op & UINT64_C(31)) << 16;
5796 : // op: rd
5797 52 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5798 52 : Value |= (op & UINT64_C(31)) << 11;
5799 : // op: sel
5800 52 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5801 52 : Value |= (op & UINT64_C(7)) << 6;
5802 52 : break;
5803 : }
5804 : case Mips::DMFC0:
5805 : case Mips::DMFC2:
5806 : case Mips::DMFGC0:
5807 : case Mips::MFC0:
5808 : case Mips::MFC2:
5809 : case Mips::MFGC0:
5810 : case Mips::MFHGC0: {
5811 : // op: rt
5812 43 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5813 43 : Value |= (op & UINT64_C(31)) << 16;
5814 : // op: rd
5815 43 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5816 43 : Value |= (op & UINT64_C(31)) << 11;
5817 : // op: sel
5818 43 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5819 43 : Value |= op & UINT64_C(7);
5820 43 : break;
5821 : }
5822 : case Mips::SLTi:
5823 : case Mips::SLTi64:
5824 : case Mips::SLTiu:
5825 : case Mips::SLTiu64: {
5826 : // op: rt
5827 68 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5828 68 : Value |= (op & UINT64_C(31)) << 16;
5829 : // op: rs
5830 68 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5831 68 : Value |= (op & UINT64_C(31)) << 21;
5832 : // op: imm16
5833 68 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5834 68 : Value |= op & UINT64_C(65535);
5835 68 : break;
5836 : }
5837 : case Mips::CINS:
5838 : case Mips::CINS32:
5839 : case Mips::CINS64_32:
5840 : case Mips::CINS_i32:
5841 : case Mips::EXTS:
5842 : case Mips::EXTS32: {
5843 : // op: rt
5844 12 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5845 12 : Value |= (op & UINT64_C(31)) << 16;
5846 : // op: rs
5847 12 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5848 12 : Value |= (op & UINT64_C(31)) << 21;
5849 : // op: pos
5850 12 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5851 12 : Value |= (op & UINT64_C(31)) << 6;
5852 : // op: lenm1
5853 12 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5854 12 : Value |= (op & UINT64_C(31)) << 11;
5855 12 : break;
5856 : }
5857 : case Mips::DINS:
5858 : case Mips::DINSM:
5859 : case Mips::DINSU:
5860 : case Mips::INS: {
5861 : // op: rt
5862 17 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5863 17 : Value |= (op & UINT64_C(31)) << 16;
5864 : // op: rs
5865 17 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5866 17 : Value |= (op & UINT64_C(31)) << 21;
5867 : // op: pos
5868 17 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5869 17 : Value |= (op & UINT64_C(31)) << 6;
5870 : // op: size
5871 17 : op = getSizeInsEncoding(MI, 3, Fixups, STI);
5872 17 : Value |= (op & UINT64_C(31)) << 11;
5873 17 : break;
5874 : }
5875 : case Mips::DEXT:
5876 : case Mips::DEXT64_32:
5877 : case Mips::DEXTM:
5878 : case Mips::DEXTU:
5879 : case Mips::EXT: {
5880 : // op: rt
5881 16 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5882 16 : Value |= (op & UINT64_C(31)) << 16;
5883 : // op: rs
5884 16 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5885 16 : Value |= (op & UINT64_C(31)) << 21;
5886 : // op: pos
5887 16 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5888 16 : Value |= (op & UINT64_C(31)) << 6;
5889 : // op: size
5890 16 : op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
5891 16 : Value |= (op & UINT64_C(31)) << 11;
5892 16 : break;
5893 : }
5894 : case Mips::APPEND:
5895 : case Mips::BALIGN:
5896 : case Mips::PREPEND: {
5897 : // op: rt
5898 5 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5899 5 : Value |= (op & UINT64_C(31)) << 16;
5900 : // op: rs
5901 5 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5902 5 : Value |= (op & UINT64_C(31)) << 21;
5903 : // op: sa
5904 5 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5905 5 : Value |= (op & UINT64_C(31)) << 11;
5906 5 : break;
5907 : }
5908 : case Mips::INSV: {
5909 : // op: rt
5910 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5911 2 : Value |= (op & UINT64_C(31)) << 16;
5912 : // op: rs
5913 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5914 2 : Value |= (op & UINT64_C(31)) << 21;
5915 2 : break;
5916 : }
5917 : case Mips::LWU_MM: {
5918 : // op: rt
5919 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5920 3 : Value |= (op & UINT64_C(31)) << 21;
5921 : // op: addr
5922 3 : op = getMemEncoding(MI, 1, Fixups, STI);
5923 3 : Value |= op & UINT64_C(2031616);
5924 3 : Value |= op & UINT64_C(4095);
5925 3 : break;
5926 : }
5927 : case Mips::LBE_MM:
5928 : case Mips::LBuE_MM:
5929 : case Mips::LHE_MM:
5930 : case Mips::LHuE_MM:
5931 : case Mips::LLE_MM:
5932 : case Mips::LWE_MM:
5933 : case Mips::SBE_MM:
5934 : case Mips::SHE_MM:
5935 : case Mips::SWE_MM: {
5936 : // op: rt
5937 56 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5938 56 : Value |= (op & UINT64_C(31)) << 21;
5939 : // op: addr
5940 56 : op = getMemEncoding(MI, 1, Fixups, STI);
5941 56 : Value |= op & UINT64_C(2031616);
5942 56 : Value |= op & UINT64_C(511);
5943 56 : break;
5944 : }
5945 : case Mips::LEA_ADDiu_MM:
5946 : case Mips::LH_MM:
5947 : case Mips::LHu_MM:
5948 : case Mips::LWDSP_MM:
5949 : case Mips::LW_MM:
5950 : case Mips::LW_MMR6:
5951 : case Mips::SB_MM:
5952 : case Mips::SB_MMR6:
5953 : case Mips::SH_MM:
5954 : case Mips::SH_MMR6:
5955 : case Mips::SWDSP_MM:
5956 : case Mips::SW_MM:
5957 : case Mips::SW_MMR6: {
5958 : // op: rt
5959 108 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5960 108 : Value |= (op & UINT64_C(31)) << 21;
5961 : // op: addr
5962 108 : op = getMemEncoding(MI, 1, Fixups, STI);
5963 108 : Value |= op & UINT64_C(2097151);
5964 108 : break;
5965 : }
5966 : case Mips::LWP_MM:
5967 : case Mips::SWP_MM: {
5968 : // op: rt
5969 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5970 8 : Value |= (op & UINT64_C(31)) << 21;
5971 : // op: addr
5972 8 : op = getMemEncoding(MI, 2, Fixups, STI);
5973 8 : Value |= op & UINT64_C(2031616);
5974 8 : Value |= op & UINT64_C(4095);
5975 8 : break;
5976 : }
5977 : case Mips::LDC2_MMR6:
5978 : case Mips::LWC2_MMR6:
5979 : case Mips::SDC2_MMR6:
5980 : case Mips::SWC2_MMR6: {
5981 : // op: rt
5982 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5983 4 : Value |= (op & UINT64_C(31)) << 21;
5984 : // op: addr
5985 4 : op = getMemEncodingMMImm11(MI, 1, Fixups, STI);
5986 4 : Value |= op & UINT64_C(2031616);
5987 4 : Value |= op & UINT64_C(2047);
5988 4 : break;
5989 : }
5990 : case Mips::LL_MM:
5991 : case Mips::LWL_MM:
5992 : case Mips::LWR_MM:
5993 : case Mips::SWL_MM:
5994 : case Mips::SWR_MM: {
5995 : // op: rt
5996 21 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5997 21 : Value |= (op & UINT64_C(31)) << 21;
5998 : // op: addr
5999 21 : op = getMemEncodingMMImm12(MI, 1, Fixups, STI);
6000 21 : Value |= op & UINT64_C(2031616);
6001 21 : Value |= op & UINT64_C(4095);
6002 21 : break;
6003 : }
6004 : case Mips::LB_MM:
6005 : case Mips::LBu_MM:
6006 : case Mips::LDC1_MM:
6007 : case Mips::LWC1_MM:
6008 : case Mips::SDC1_MM:
6009 : case Mips::SWC1_MM: {
6010 : // op: rt
6011 20 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6012 20 : Value |= (op & UINT64_C(31)) << 21;
6013 : // op: addr
6014 20 : op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
6015 20 : Value |= op & UINT64_C(2097151);
6016 20 : break;
6017 : }
6018 : case Mips::LL_MMR6:
6019 : case Mips::LWLE_MM:
6020 : case Mips::LWRE_MM:
6021 : case Mips::SWLE_MM:
6022 : case Mips::SWRE_MM: {
6023 : // op: rt
6024 17 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6025 17 : Value |= (op & UINT64_C(31)) << 21;
6026 : // op: addr
6027 17 : op = getMemEncodingMMImm9(MI, 1, Fixups, STI);
6028 17 : Value |= op & UINT64_C(2031616);
6029 17 : Value |= op & UINT64_C(511);
6030 17 : break;
6031 : }
6032 : case Mips::CFC1_MM:
6033 : case Mips::MFC1_MM:
6034 : case Mips::MFC1_MMR6:
6035 : case Mips::MFHC1_D32_MM:
6036 : case Mips::MFHC1_D64_MM: {
6037 : // op: rt
6038 15 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6039 15 : Value |= (op & UINT64_C(31)) << 21;
6040 : // op: fs
6041 15 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6042 15 : Value |= (op & UINT64_C(31)) << 16;
6043 15 : break;
6044 : }
6045 : case Mips::REPL_QB_MM: {
6046 : // op: rt
6047 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6048 1 : Value |= (op & UINT64_C(31)) << 21;
6049 : // op: imm
6050 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6051 1 : Value |= (op & UINT64_C(255)) << 13;
6052 1 : break;
6053 : }
6054 : case Mips::ALUIPC_MMR6:
6055 : case Mips::AUIPC_MMR6: {
6056 : // op: rt
6057 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6058 2 : Value |= (op & UINT64_C(31)) << 21;
6059 : // op: imm
6060 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6061 2 : Value |= op & UINT64_C(65535);
6062 2 : break;
6063 : }
6064 : case Mips::EXTPDP_MM:
6065 : case Mips::EXTP_MM:
6066 : case Mips::EXTR_RS_W_MM:
6067 : case Mips::EXTR_R_W_MM:
6068 : case Mips::EXTR_S_H_MM:
6069 : case Mips::EXTR_W_MM: {
6070 : // op: rt
6071 12 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6072 12 : Value |= (op & UINT64_C(31)) << 21;
6073 : // op: imm
6074 12 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6075 12 : Value |= (op & UINT64_C(31)) << 16;
6076 : // op: ac
6077 12 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6078 12 : Value |= (op & UINT64_C(3)) << 14;
6079 12 : break;
6080 : }
6081 : case Mips::ADDIUPC_MMR6:
6082 : case Mips::LWPC_MMR6: {
6083 : // op: rt
6084 13 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6085 13 : Value |= (op & UINT64_C(31)) << 21;
6086 : // op: imm
6087 13 : op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
6088 13 : Value |= op & UINT64_C(524287);
6089 13 : break;
6090 : }
6091 : case Mips::LUI_MMR6: {
6092 : // op: rt
6093 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6094 1 : Value |= (op & UINT64_C(31)) << 21;
6095 : // op: imm16
6096 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6097 1 : Value |= op & UINT64_C(65535);
6098 1 : break;
6099 : }
6100 : case Mips::CFC2_MM:
6101 : case Mips::MFC2_MMR6:
6102 : case Mips::MFHC2_MMR6: {
6103 : // op: rt
6104 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6105 4 : Value |= (op & UINT64_C(31)) << 21;
6106 : // op: impl
6107 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6108 4 : Value |= (op & UINT64_C(31)) << 16;
6109 4 : break;
6110 : }
6111 : case Mips::RDDSP_MM:
6112 : case Mips::WRDSP_MM: {
6113 : // op: rt
6114 7 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6115 7 : Value |= (op & UINT64_C(31)) << 21;
6116 : // op: mask
6117 7 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6118 7 : Value |= (op & UINT64_C(127)) << 14;
6119 7 : break;
6120 : }
6121 : case Mips::BGTZC_MMR6:
6122 : case Mips::BLEZC_MMR6: {
6123 : // op: rt
6124 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6125 2 : Value |= (op & UINT64_C(31)) << 21;
6126 : // op: offset
6127 2 : op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI);
6128 2 : Value |= op & UINT64_C(65535);
6129 2 : break;
6130 : }
6131 : case Mips::BEQZALC_MMR6:
6132 : case Mips::BGTZALC_MMR6:
6133 : case Mips::BLEZALC_MMR6:
6134 : case Mips::BNEZALC_MMR6: {
6135 : // op: rt
6136 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6137 4 : Value |= (op & UINT64_C(31)) << 21;
6138 : // op: offset
6139 4 : op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
6140 4 : Value |= op & UINT64_C(65535);
6141 4 : break;
6142 : }
6143 : case Mips::RDHWR_MM:
6144 : case Mips::RDPGPR_MMR6: {
6145 : // op: rt
6146 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6147 6 : Value |= (op & UINT64_C(31)) << 21;
6148 : // op: rd
6149 6 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6150 6 : Value |= (op & UINT64_C(31)) << 16;
6151 6 : break;
6152 : }
6153 : case Mips::ABSQ_S_PH_MM:
6154 : case Mips::ABSQ_S_QB_MMR2:
6155 : case Mips::ABSQ_S_W_MM:
6156 : case Mips::BITREV_MM:
6157 : case Mips::JALRC_HB_MMR6:
6158 : case Mips::JALRC_MMR6:
6159 : case Mips::PRECEQU_PH_QBLA_MM:
6160 : case Mips::PRECEQU_PH_QBL_MM:
6161 : case Mips::PRECEQU_PH_QBRA_MM:
6162 : case Mips::PRECEQU_PH_QBR_MM:
6163 : case Mips::PRECEQ_W_PHL_MM:
6164 : case Mips::PRECEQ_W_PHR_MM:
6165 : case Mips::PRECEU_PH_QBLA_MM:
6166 : case Mips::PRECEU_PH_QBL_MM:
6167 : case Mips::PRECEU_PH_QBRA_MM:
6168 : case Mips::PRECEU_PH_QBR_MM:
6169 : case Mips::RADDU_W_QB_MM:
6170 : case Mips::REPLV_PH_MM:
6171 : case Mips::REPLV_QB_MM:
6172 : case Mips::WRPGPR_MMR6:
6173 : case Mips::WSBH_MMR6: {
6174 : // op: rt
6175 36 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6176 36 : Value |= (op & UINT64_C(31)) << 21;
6177 : // op: rs
6178 36 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6179 36 : Value |= (op & UINT64_C(31)) << 16;
6180 36 : break;
6181 : }
6182 : case Mips::BALIGN_MMR2: {
6183 : // op: rt
6184 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6185 1 : Value |= (op & UINT64_C(31)) << 21;
6186 : // op: rs
6187 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6188 1 : Value |= (op & UINT64_C(31)) << 16;
6189 : // op: bp
6190 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6191 1 : Value |= (op & UINT64_C(3)) << 14;
6192 1 : break;
6193 : }
6194 : case Mips::ADDIU_MMR6:
6195 : case Mips::ANDI_MMR6:
6196 : case Mips::ORI_MMR6:
6197 : case Mips::SLTi_MM:
6198 : case Mips::SLTiu_MM:
6199 : case Mips::XORI_MMR6: {
6200 : // op: rt
6201 29 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6202 29 : Value |= (op & UINT64_C(31)) << 21;
6203 : // op: rs
6204 29 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6205 29 : Value |= (op & UINT64_C(31)) << 16;
6206 : // op: imm16
6207 29 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6208 29 : Value |= op & UINT64_C(65535);
6209 29 : break;
6210 : }
6211 : case Mips::BNVC_MMR6:
6212 : case Mips::BOVC_MMR6: {
6213 : // op: rt
6214 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6215 4 : Value |= (op & UINT64_C(31)) << 21;
6216 : // op: rs
6217 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6218 4 : Value |= (op & UINT64_C(31)) << 16;
6219 : // op: offset
6220 4 : op = getBranchTargetOpValueMMR6(MI, 2, Fixups, STI);
6221 4 : Value |= op & UINT64_C(65535);
6222 4 : break;
6223 : }
6224 : case Mips::INS_MM: {
6225 : // op: rt
6226 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6227 1 : Value |= (op & UINT64_C(31)) << 21;
6228 : // op: rs
6229 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6230 1 : Value |= (op & UINT64_C(31)) << 16;
6231 : // op: pos
6232 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6233 1 : Value |= (op & UINT64_C(31)) << 6;
6234 : // op: size
6235 1 : op = getSizeInsEncoding(MI, 3, Fixups, STI);
6236 1 : Value |= (op & UINT64_C(31)) << 11;
6237 1 : break;
6238 : }
6239 : case Mips::EXT_MM: {
6240 : // op: rt
6241 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6242 1 : Value |= (op & UINT64_C(31)) << 21;
6243 : // op: rs
6244 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6245 1 : Value |= (op & UINT64_C(31)) << 16;
6246 : // op: pos
6247 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6248 1 : Value |= (op & UINT64_C(31)) << 6;
6249 : // op: size
6250 1 : op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
6251 1 : Value |= (op & UINT64_C(31)) << 11;
6252 1 : break;
6253 : }
6254 : case Mips::SHLL_PH_MM:
6255 : case Mips::SHLL_S_PH_MM:
6256 : case Mips::SHRA_PH_MM:
6257 : case Mips::SHRA_R_PH_MM:
6258 : case Mips::SHRL_PH_MMR2: {
6259 : // op: rt
6260 9 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6261 9 : Value |= (op & UINT64_C(31)) << 21;
6262 : // op: rs
6263 9 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6264 9 : Value |= (op & UINT64_C(31)) << 16;
6265 : // op: sa
6266 9 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6267 9 : Value |= (op & UINT64_C(15)) << 12;
6268 9 : break;
6269 : }
6270 : case Mips::APPEND_MMR2:
6271 : case Mips::PRECR_SRA_PH_W_MMR2:
6272 : case Mips::PRECR_SRA_R_PH_W_MMR2:
6273 : case Mips::PREPEND_MMR2:
6274 : case Mips::SHLL_S_W_MM:
6275 : case Mips::SHRA_R_W_MM: {
6276 : // op: rt
6277 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6278 8 : Value |= (op & UINT64_C(31)) << 21;
6279 : // op: rs
6280 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6281 8 : Value |= (op & UINT64_C(31)) << 16;
6282 : // op: sa
6283 8 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6284 8 : Value |= (op & UINT64_C(31)) << 11;
6285 8 : break;
6286 : }
6287 : case Mips::SHLL_QB_MM:
6288 : case Mips::SHRA_QB_MMR2:
6289 : case Mips::SHRA_R_QB_MMR2:
6290 : case Mips::SHRL_QB_MM: {
6291 : // op: rt
6292 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6293 6 : Value |= (op & UINT64_C(31)) << 21;
6294 : // op: rs
6295 6 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6296 6 : Value |= (op & UINT64_C(31)) << 16;
6297 : // op: sa
6298 6 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6299 6 : Value |= (op & UINT64_C(7)) << 13;
6300 6 : break;
6301 : }
6302 : case Mips::MFC0_MMR6:
6303 : case Mips::MFGC0_MM:
6304 : case Mips::MFHC0_MMR6:
6305 : case Mips::MFHGC0_MM:
6306 : case Mips::RDHWR_MMR6: {
6307 : // op: rt
6308 11 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6309 11 : Value |= (op & UINT64_C(31)) << 21;
6310 : // op: rs
6311 11 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6312 11 : Value |= (op & UINT64_C(31)) << 16;
6313 : // op: sel
6314 11 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6315 11 : Value |= (op & UINT64_C(7)) << 11;
6316 11 : break;
6317 : }
6318 : case Mips::INS_MMR6: {
6319 : // op: rt
6320 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6321 1 : Value |= (op & UINT64_C(31)) << 21;
6322 : // op: rs
6323 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6324 1 : Value |= (op & UINT64_C(31)) << 16;
6325 : // op: size
6326 1 : op = getSizeInsEncoding(MI, 3, Fixups, STI);
6327 1 : Value |= (op & UINT64_C(31)) << 11;
6328 : // op: pos
6329 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6330 1 : Value |= (op & UINT64_C(31)) << 6;
6331 1 : break;
6332 : }
6333 : case Mips::EXT_MMR6: {
6334 : // op: rt
6335 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6336 1 : Value |= (op & UINT64_C(31)) << 21;
6337 : // op: rs
6338 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6339 1 : Value |= (op & UINT64_C(31)) << 16;
6340 : // op: size
6341 1 : op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
6342 1 : Value |= (op & UINT64_C(31)) << 11;
6343 : // op: pos
6344 1 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6345 1 : Value |= (op & UINT64_C(31)) << 6;
6346 1 : break;
6347 : }
6348 : case Mips::INSV_MM: {
6349 : // op: rt
6350 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6351 2 : Value |= (op & UINT64_C(31)) << 21;
6352 : // op: rs
6353 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6354 2 : Value |= (op & UINT64_C(31)) << 16;
6355 2 : break;
6356 : }
6357 : case Mips::EXTPDPV_MM:
6358 : case Mips::EXTPV_MM:
6359 : case Mips::EXTRV_RS_W_MM:
6360 : case Mips::EXTRV_R_W_MM:
6361 : case Mips::EXTRV_S_H_MM:
6362 : case Mips::EXTRV_W_MM: {
6363 : // op: rt
6364 12 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6365 12 : Value |= (op & UINT64_C(31)) << 21;
6366 : // op: rs
6367 12 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6368 12 : Value |= (op & UINT64_C(31)) << 16;
6369 : // op: ac
6370 12 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6371 12 : Value |= (op & UINT64_C(3)) << 14;
6372 12 : break;
6373 : }
6374 : case Mips::BGEZALC:
6375 : case Mips::BGEZC:
6376 : case Mips::BGEZC64:
6377 : case Mips::BLTZALC:
6378 : case Mips::BLTZC:
6379 : case Mips::BLTZC64: {
6380 : // op: rt
6381 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6382 8 : Value |= (op & UINT64_C(31)) << 21;
6383 8 : Value |= (op & UINT64_C(31)) << 16;
6384 : // op: offset
6385 8 : op = getBranchTargetOpValue(MI, 1, Fixups, STI);
6386 8 : Value |= op & UINT64_C(65535);
6387 8 : break;
6388 : }
6389 : case Mips::BGEZC_MMR6:
6390 : case Mips::BLTZC_MMR6: {
6391 : // op: rt
6392 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6393 2 : Value |= (op & UINT64_C(31)) << 21;
6394 2 : Value |= (op & UINT64_C(31)) << 16;
6395 : // op: offset
6396 2 : op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI);
6397 2 : Value |= op & UINT64_C(65535);
6398 2 : break;
6399 : }
6400 : case Mips::BGEZALC_MMR6:
6401 : case Mips::BLTZALC_MMR6: {
6402 : // op: rt
6403 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6404 2 : Value |= (op & UINT64_C(31)) << 21;
6405 2 : Value |= (op & UINT64_C(31)) << 16;
6406 : // op: offset
6407 2 : op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
6408 2 : Value |= op & UINT64_C(65535);
6409 2 : break;
6410 : }
6411 : case Mips::LWSP_MM:
6412 : case Mips::SWSP_MM:
6413 : case Mips::SWSP_MMR6: {
6414 : // op: rt
6415 21 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6416 21 : Value |= (op & UINT64_C(31)) << 5;
6417 : // op: offset
6418 21 : op = getMemEncodingMMSPImm5Lsl2(MI, 1, Fixups, STI);
6419 21 : Value |= op & UINT64_C(31);
6420 21 : break;
6421 : }
6422 : case Mips::NOT16_MM: {
6423 : // op: rt
6424 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6425 3 : Value |= (op & UINT64_C(7)) << 3;
6426 : // op: rs
6427 3 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6428 3 : Value |= op & UINT64_C(7);
6429 3 : break;
6430 : }
6431 : case Mips::LBU16_MM:
6432 : case Mips::SB16_MM:
6433 : case Mips::SB16_MMR6: {
6434 : // op: rt
6435 12 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6436 12 : Value |= (op & UINT64_C(7)) << 7;
6437 : // op: addr
6438 12 : op = getMemEncodingMMImm4(MI, 1, Fixups, STI);
6439 12 : Value |= op & UINT64_C(127);
6440 12 : break;
6441 : }
6442 : case Mips::LHU16_MM:
6443 : case Mips::SH16_MM:
6444 : case Mips::SH16_MMR6: {
6445 : // op: rt
6446 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6447 8 : Value |= (op & UINT64_C(7)) << 7;
6448 : // op: addr
6449 8 : op = getMemEncodingMMImm4Lsl1(MI, 1, Fixups, STI);
6450 8 : Value |= op & UINT64_C(127);
6451 8 : break;
6452 : }
6453 : case Mips::LW16_MM:
6454 : case Mips::SW16_MM:
6455 : case Mips::SW16_MMR6: {
6456 : // op: rt
6457 15 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6458 15 : Value |= (op & UINT64_C(7)) << 7;
6459 : // op: addr
6460 15 : op = getMemEncodingMMImm4Lsl2(MI, 1, Fixups, STI);
6461 15 : Value |= op & UINT64_C(127);
6462 15 : break;
6463 : }
6464 : case Mips::LWGP_MM: {
6465 : // op: rt
6466 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6467 6 : Value |= (op & UINT64_C(7)) << 7;
6468 : // op: offset
6469 6 : op = getMemEncodingMMGPImm7Lsl2(MI, 1, Fixups, STI);
6470 6 : Value |= op & UINT64_C(127);
6471 6 : break;
6472 : }
6473 : case Mips::NOT16_MMR6: {
6474 : // op: rt
6475 1 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6476 1 : Value |= (op & UINT64_C(7)) << 7;
6477 : // op: rs
6478 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6479 1 : Value |= (op & UINT64_C(7)) << 4;
6480 1 : break;
6481 : }
6482 : case Mips::SC64_R6:
6483 : case Mips::SCD_R6:
6484 : case Mips::SC_R6: {
6485 : // op: rt
6486 3 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6487 3 : Value |= (op & UINT64_C(31)) << 16;
6488 : // op: addr
6489 3 : op = getMemEncoding(MI, 2, Fixups, STI);
6490 3 : Value |= (op & UINT64_C(2031616)) << 5;
6491 3 : Value |= (op & UINT64_C(511)) << 7;
6492 3 : break;
6493 : }
6494 : case Mips::SC:
6495 : case Mips::SC64:
6496 : case Mips::SCD: {
6497 : // op: rt
6498 21 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6499 21 : Value |= (op & UINT64_C(31)) << 16;
6500 : // op: addr
6501 21 : op = getMemEncoding(MI, 2, Fixups, STI);
6502 21 : Value |= (op & UINT64_C(2031616)) << 5;
6503 21 : Value |= op & UINT64_C(65535);
6504 21 : break;
6505 : }
6506 : case Mips::CTC1:
6507 : case Mips::DMTC1:
6508 : case Mips::MTC1:
6509 : case Mips::MTC1_D64: {
6510 : // op: rt
6511 127 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6512 127 : Value |= (op & UINT64_C(31)) << 16;
6513 : // op: fs
6514 127 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6515 127 : Value |= (op & UINT64_C(31)) << 11;
6516 127 : break;
6517 : }
6518 : case Mips::DMTC0:
6519 : case Mips::DMTC2:
6520 : case Mips::DMTGC0:
6521 : case Mips::MTC0:
6522 : case Mips::MTC2:
6523 : case Mips::MTGC0:
6524 : case Mips::MTHGC0: {
6525 : // op: rt
6526 41 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6527 41 : Value |= (op & UINT64_C(31)) << 16;
6528 : // op: rd
6529 41 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6530 41 : Value |= (op & UINT64_C(31)) << 11;
6531 : // op: sel
6532 41 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6533 41 : Value |= op & UINT64_C(7);
6534 41 : break;
6535 : }
6536 : case Mips::MFTR:
6537 : case Mips::MTTR: {
6538 : // op: rt
6539 66 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6540 66 : Value |= (op & UINT64_C(31)) << 16;
6541 : // op: rd
6542 66 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6543 66 : Value |= (op & UINT64_C(31)) << 11;
6544 : // op: u
6545 66 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6546 66 : Value |= (op & UINT64_C(1)) << 5;
6547 : // op: h
6548 66 : op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6549 66 : Value |= (op & UINT64_C(1)) << 4;
6550 : // op: sel
6551 66 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6552 66 : Value |= op & UINT64_C(7);
6553 66 : break;
6554 : }
6555 : case Mips::SCE_MM: {
6556 : // op: rt
6557 6 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6558 6 : Value |= (op & UINT64_C(31)) << 21;
6559 : // op: addr
6560 6 : op = getMemEncoding(MI, 2, Fixups, STI);
6561 6 : Value |= op & UINT64_C(2031616);
6562 6 : Value |= op & UINT64_C(511);
6563 6 : break;
6564 : }
6565 : case Mips::SC_MM: {
6566 : // op: rt
6567 5 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6568 5 : Value |= (op & UINT64_C(31)) << 21;
6569 : // op: addr
6570 5 : op = getMemEncodingMMImm12(MI, 2, Fixups, STI);
6571 5 : Value |= op & UINT64_C(2031616);
6572 5 : Value |= op & UINT64_C(4095);
6573 5 : break;
6574 : }
6575 : case Mips::SC_MMR6: {
6576 : // op: rt
6577 1 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6578 1 : Value |= (op & UINT64_C(31)) << 21;
6579 : // op: addr
6580 1 : op = getMemEncodingMMImm9(MI, 2, Fixups, STI);
6581 1 : Value |= op & UINT64_C(2031616);
6582 1 : Value |= op & UINT64_C(511);
6583 1 : break;
6584 : }
6585 : case Mips::CTC1_MM:
6586 : case Mips::MTC1_D64_MM:
6587 : case Mips::MTC1_MM:
6588 : case Mips::MTC1_MMR6: {
6589 : // op: rt
6590 11 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6591 11 : Value |= (op & UINT64_C(31)) << 21;
6592 : // op: fs
6593 11 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6594 11 : Value |= (op & UINT64_C(31)) << 16;
6595 11 : break;
6596 : }
6597 : case Mips::CTC2_MM:
6598 : case Mips::MTC2_MMR6:
6599 : case Mips::MTHC2_MMR6: {
6600 : // op: rt
6601 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6602 4 : Value |= (op & UINT64_C(31)) << 21;
6603 : // op: impl
6604 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6605 4 : Value |= (op & UINT64_C(31)) << 16;
6606 4 : break;
6607 : }
6608 : case Mips::CMPU_EQ_QB_MM:
6609 : case Mips::CMPU_LE_QB_MM:
6610 : case Mips::CMPU_LT_QB_MM:
6611 : case Mips::CMP_EQ_PH_MM:
6612 : case Mips::CMP_LE_PH_MM:
6613 : case Mips::CMP_LT_PH_MM: {
6614 : // op: rt
6615 12 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6616 12 : Value |= (op & UINT64_C(31)) << 21;
6617 : // op: rs
6618 12 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6619 12 : Value |= (op & UINT64_C(31)) << 16;
6620 12 : break;
6621 : }
6622 : case Mips::BEQC_MMR6:
6623 : case Mips::BGEC_MMR6:
6624 : case Mips::BGEUC_MMR6:
6625 : case Mips::BLTC_MMR6:
6626 : case Mips::BLTUC_MMR6:
6627 : case Mips::BNEC_MMR6: {
6628 : // op: rt
6629 6 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6630 6 : Value |= (op & UINT64_C(31)) << 21;
6631 : // op: rs
6632 6 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6633 6 : Value |= (op & UINT64_C(31)) << 16;
6634 : // op: offset
6635 6 : op = getBranchTargetOpValueLsl2MMR6(MI, 2, Fixups, STI);
6636 6 : Value |= op & UINT64_C(65535);
6637 6 : break;
6638 : }
6639 : case Mips::MTC0_MMR6:
6640 : case Mips::MTGC0_MM:
6641 : case Mips::MTHC0_MMR6:
6642 : case Mips::MTHGC0_MM: {
6643 : // op: rt
6644 8 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6645 8 : Value |= (op & UINT64_C(31)) << 21;
6646 : // op: rs
6647 8 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6648 8 : Value |= (op & UINT64_C(31)) << 16;
6649 : // op: sel
6650 8 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6651 8 : Value |= (op & UINT64_C(7)) << 11;
6652 8 : break;
6653 : }
6654 : case Mips::MTHC1_D32:
6655 : case Mips::MTHC1_D64: {
6656 : // op: rt
6657 17 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6658 17 : Value |= (op & UINT64_C(31)) << 16;
6659 : // op: fs
6660 17 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6661 17 : Value |= (op & UINT64_C(31)) << 11;
6662 17 : break;
6663 : }
6664 : case Mips::SPLAT_B:
6665 : case Mips::SPLAT_D:
6666 : case Mips::SPLAT_H:
6667 : case Mips::SPLAT_W: {
6668 : // op: rt
6669 4 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6670 4 : Value |= (op & UINT64_C(31)) << 16;
6671 : // op: ws
6672 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6673 4 : Value |= (op & UINT64_C(31)) << 11;
6674 : // op: wd
6675 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6676 4 : Value |= (op & UINT64_C(31)) << 6;
6677 4 : break;
6678 : }
6679 : case Mips::MTHC1_D32_MM:
6680 : case Mips::MTHC1_D64_MM: {
6681 : // op: rt
6682 7 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6683 7 : Value |= (op & UINT64_C(31)) << 21;
6684 : // op: fs
6685 7 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6686 7 : Value |= (op & UINT64_C(31)) << 16;
6687 7 : break;
6688 : }
6689 : case Mips::DPAQX_SA_W_PH_MMR2:
6690 : case Mips::DPAQX_S_W_PH_MMR2:
6691 : case Mips::DPAQ_SA_L_W_MM:
6692 : case Mips::DPAQ_S_W_PH_MM:
6693 : case Mips::DPAU_H_QBL_MM:
6694 : case Mips::DPAU_H_QBR_MM:
6695 : case Mips::DPAX_W_PH_MMR2:
6696 : case Mips::DPA_W_PH_MMR2:
6697 : case Mips::DPSQX_SA_W_PH_MMR2:
6698 : case Mips::DPSQX_S_W_PH_MMR2:
6699 : case Mips::DPSQ_SA_L_W_MM:
6700 : case Mips::DPSQ_S_W_PH_MM:
6701 : case Mips::DPSU_H_QBL_MM:
6702 : case Mips::DPSU_H_QBR_MM:
6703 : case Mips::DPSX_W_PH_MMR2:
6704 : case Mips::DPS_W_PH_MMR2:
6705 : case Mips::MADDU_DSP_MM:
6706 : case Mips::MADD_DSP_MM:
6707 : case Mips::MAQ_SA_W_PHL_MM:
6708 : case Mips::MAQ_SA_W_PHR_MM:
6709 : case Mips::MAQ_S_W_PHL_MM:
6710 : case Mips::MAQ_S_W_PHR_MM:
6711 : case Mips::MSUBU_DSP_MM:
6712 : case Mips::MSUB_DSP_MM:
6713 : case Mips::MULSAQ_S_W_PH_MM:
6714 : case Mips::MULSA_W_PH_MMR2:
6715 : case Mips::MULTU_DSP_MM:
6716 : case Mips::MULT_DSP_MM: {
6717 : // op: rt
6718 42 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6719 42 : Value |= (op & UINT64_C(31)) << 21;
6720 : // op: rs
6721 42 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6722 42 : Value |= (op & UINT64_C(31)) << 16;
6723 : // op: ac
6724 42 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6725 42 : Value |= (op & UINT64_C(3)) << 14;
6726 42 : break;
6727 : }
6728 : case Mips::ADD_MM:
6729 : case Mips::ADDu_MM:
6730 : case Mips::AND_MM:
6731 : case Mips::CMPGU_EQ_QB_MM:
6732 : case Mips::CMPGU_LE_QB_MM:
6733 : case Mips::CMPGU_LT_QB_MM:
6734 : case Mips::MOVN_I_MM:
6735 : case Mips::MOVZ_I_MM:
6736 : case Mips::MUL_MM:
6737 : case Mips::NOR_MM:
6738 : case Mips::OR_MM:
6739 : case Mips::SLT_MM:
6740 : case Mips::SLTu_MM:
6741 : case Mips::SUB_MM:
6742 : case Mips::SUBu_MM:
6743 : case Mips::XOR_MM: {
6744 : // op: rt
6745 176 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6746 176 : Value |= (op & UINT64_C(31)) << 21;
6747 : // op: rs
6748 176 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6749 176 : Value |= (op & UINT64_C(31)) << 16;
6750 : // op: rd
6751 176 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6752 176 : Value |= (op & UINT64_C(31)) << 11;
6753 176 : break;
6754 : }
6755 : case Mips::AND16_MM:
6756 : case Mips::OR16_MM:
6757 : case Mips::XOR16_MM: {
6758 : // op: rt
6759 9 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6760 9 : Value |= (op & UINT64_C(7)) << 3;
6761 : // op: rs
6762 9 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6763 9 : Value |= op & UINT64_C(7);
6764 9 : break;
6765 : }
6766 : case Mips::AND16_MMR6:
6767 : case Mips::OR16_MMR6:
6768 : case Mips::XOR16_MMR6: {
6769 : // op: rt
6770 3 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6771 3 : Value |= (op & UINT64_C(7)) << 7;
6772 : // op: rs
6773 3 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6774 3 : Value |= (op & UINT64_C(7)) << 4;
6775 3 : break;
6776 : }
6777 : case Mips::SLD_B:
6778 : case Mips::SLD_D:
6779 : case Mips::SLD_H:
6780 : case Mips::SLD_W: {
6781 : // op: rt
6782 4 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6783 4 : Value |= (op & UINT64_C(31)) << 16;
6784 : // op: ws
6785 4 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6786 4 : Value |= (op & UINT64_C(31)) << 11;
6787 : // op: wd
6788 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6789 4 : Value |= (op & UINT64_C(31)) << 6;
6790 4 : break;
6791 : }
6792 45 : case Mips::LWM32_MM:
6793 : case Mips::SWM32_MM: {
6794 : // op: rt
6795 45 : op = getRegisterListOpValue(MI, 0, Fixups, STI);
6796 45 : Value |= (op & UINT64_C(31)) << 21;
6797 : // op: addr
6798 45 : op = getMemEncodingMMImm12(MI, 1, Fixups, STI);
6799 45 : Value |= op & UINT64_C(2031616);
6800 45 : Value |= op & UINT64_C(4095);
6801 45 : break;
6802 : }
6803 10 : case Mips::LWM16_MM:
6804 : case Mips::SWM16_MM: {
6805 : // op: rt
6806 10 : op = getRegisterListOpValue16(MI, 0, Fixups, STI);
6807 10 : Value |= (op & UINT64_C(3)) << 4;
6808 : // op: addr
6809 10 : op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI);
6810 10 : Value |= op & UINT64_C(15);
6811 10 : break;
6812 : }
6813 4 : case Mips::LWM16_MMR6:
6814 : case Mips::SWM16_MMR6: {
6815 : // op: rt
6816 4 : op = getRegisterListOpValue16(MI, 0, Fixups, STI);
6817 4 : Value |= (op & UINT64_C(3)) << 8;
6818 : // op: addr
6819 4 : op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI);
6820 4 : Value |= (op & UINT64_C(15)) << 4;
6821 4 : break;
6822 : }
6823 : case Mips::JrcRx16:
6824 : case Mips::JumpLinkReg16:
6825 : case Mips::SebRx16:
6826 : case Mips::SehRx16: {
6827 : // op: rx
6828 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6829 0 : Value |= (op & UINT64_C(7)) << 8;
6830 0 : break;
6831 : }
6832 : case Mips::AddiuRxRxImm16:
6833 : case Mips::BeqzRxImm16:
6834 : case Mips::BnezRxImm16:
6835 : case Mips::CmpiRxImm16:
6836 : case Mips::LiRxImm16:
6837 : case Mips::LwRxPcTcp16:
6838 : case Mips::SltiRxImm16:
6839 : case Mips::SltiuRxImm16: {
6840 : // op: rx
6841 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6842 0 : Value |= (op & UINT64_C(7)) << 8;
6843 : // op: imm8
6844 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6845 0 : Value |= op & UINT64_C(255);
6846 0 : break;
6847 : }
6848 : case Mips::Mfhi16:
6849 : case Mips::Mflo16: {
6850 : // op: rx
6851 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6852 0 : Value |= (op & UINT64_C(7)) << 8;
6853 : // op: ry
6854 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6855 0 : Value |= (op & UINT64_C(7)) << 5;
6856 0 : break;
6857 : }
6858 : case Mips::CmpRxRy16:
6859 : case Mips::DivRxRy16:
6860 : case Mips::DivuRxRy16:
6861 : case Mips::NegRxRy16:
6862 : case Mips::NotRxRy16:
6863 : case Mips::SltRxRy16:
6864 : case Mips::SltuRxRy16: {
6865 : // op: rx
6866 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6867 0 : Value |= (op & UINT64_C(7)) << 8;
6868 : // op: ry
6869 0 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6870 0 : Value |= (op & UINT64_C(7)) << 5;
6871 0 : break;
6872 : }
6873 : case Mips::AndRxRxRy16:
6874 : case Mips::OrRxRxRy16:
6875 : case Mips::SllvRxRy16:
6876 : case Mips::SravRxRy16:
6877 : case Mips::SrlvRxRy16:
6878 : case Mips::XorRxRxRy16: {
6879 : // op: rx
6880 0 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6881 0 : Value |= (op & UINT64_C(7)) << 8;
6882 : // op: ry
6883 0 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6884 0 : Value |= (op & UINT64_C(7)) << 5;
6885 0 : break;
6886 : }
6887 : case Mips::AdduRxRyRz16:
6888 : case Mips::SubuRxRyRz16: {
6889 : // op: rx
6890 0 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6891 0 : Value |= (op & UINT64_C(7)) << 8;
6892 : // op: ry
6893 0 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6894 0 : Value |= (op & UINT64_C(7)) << 5;
6895 : // op: rz
6896 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6897 0 : Value |= (op & UINT64_C(7)) << 2;
6898 0 : break;
6899 : }
6900 : case Mips::MoveR3216: {
6901 : // op: ry
6902 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6903 0 : Value |= (op & UINT64_C(15)) << 4;
6904 : // op: r32
6905 0 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6906 0 : Value |= op & UINT64_C(15);
6907 0 : break;
6908 : }
6909 : case Mips::LDI_B:
6910 : case Mips::LDI_D:
6911 : case Mips::LDI_H:
6912 : case Mips::LDI_W: {
6913 : // op: s10
6914 4 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6915 4 : Value |= (op & UINT64_C(1023)) << 11;
6916 : // op: wd
6917 4 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6918 4 : Value |= (op & UINT64_C(31)) << 6;
6919 4 : break;
6920 : }
6921 : case Mips::SllX16:
6922 : case Mips::SraX16:
6923 : case Mips::SrlX16: {
6924 : // op: sa6
6925 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6926 0 : Value |= (op & UINT64_C(31)) << 22;
6927 0 : Value |= (op & UINT64_C(32)) << 16;
6928 : // op: rx
6929 0 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6930 0 : Value |= (op & UINT64_C(7)) << 8;
6931 : // op: ry
6932 0 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6933 0 : Value |= (op & UINT64_C(7)) << 5;
6934 0 : break;
6935 : }
6936 : case Mips::SHILO_MM: {
6937 : // op: shift
6938 2 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6939 2 : Value |= (op & UINT64_C(63)) << 16;
6940 : // op: ac
6941 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6942 2 : Value |= (op & UINT64_C(3)) << 14;
6943 2 : break;
6944 : }
6945 : case Mips::SYNC_MM:
6946 : case Mips::SYNC_MMR6: {
6947 : // op: stype
6948 7 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6949 7 : Value |= (op & UINT64_C(31)) << 16;
6950 7 : break;
6951 : }
6952 : case Mips::SYNC: {
6953 : // op: stype
6954 34 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6955 34 : Value |= (op & UINT64_C(31)) << 6;
6956 34 : break;
6957 : }
6958 138 : case Mips::J:
6959 : case Mips::JAL:
6960 : case Mips::JALX:
6961 : case Mips::JALX_MM: {
6962 : // op: target
6963 138 : op = getJumpTargetOpValue(MI, 0, Fixups, STI);
6964 138 : Value |= op & UINT64_C(67108863);
6965 138 : break;
6966 : }
6967 30 : case Mips::JALS_MM:
6968 : case Mips::JAL_MM:
6969 : case Mips::J_MM: {
6970 : // op: target
6971 30 : op = getJumpTargetOpValueMM(MI, 0, Fixups, STI);
6972 30 : Value |= op & UINT64_C(67108863);
6973 30 : break;
6974 : }
6975 : case Mips::ANDI_B:
6976 : case Mips::NORI_B:
6977 : case Mips::ORI_B:
6978 : case Mips::SHF_B:
6979 : case Mips::SHF_H:
6980 : case Mips::SHF_W:
6981 : case Mips::XORI_B: {
6982 : // op: u8
6983 7 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6984 7 : Value |= (op & UINT64_C(255)) << 16;
6985 : // op: ws
6986 7 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6987 7 : Value |= (op & UINT64_C(31)) << 11;
6988 : // op: wd
6989 7 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6990 7 : Value |= (op & UINT64_C(31)) << 6;
6991 7 : break;
6992 : }
6993 : case Mips::BMNZI_B:
6994 : case Mips::BMZI_B:
6995 : case Mips::BSELI_B: {
6996 : // op: u8
6997 3 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6998 3 : Value |= (op & UINT64_C(255)) << 16;
6999 : // op: ws
7000 3 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7001 3 : Value |= (op & UINT64_C(31)) << 11;
7002 : // op: wd
7003 3 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7004 3 : Value |= (op & UINT64_C(31)) << 6;
7005 3 : break;
7006 : }
7007 : case Mips::FCLASS_D:
7008 : case Mips::FCLASS_W:
7009 : case Mips::FEXUPL_D:
7010 : case Mips::FEXUPL_W:
7011 : case Mips::FEXUPR_D:
7012 : case Mips::FEXUPR_W:
7013 : case Mips::FFINT_S_D:
7014 : case Mips::FFINT_S_W:
7015 : case Mips::FFINT_U_D:
7016 : case Mips::FFINT_U_W:
7017 : case Mips::FFQL_D:
7018 : case Mips::FFQL_W:
7019 : case Mips::FFQR_D:
7020 : case Mips::FFQR_W:
7021 : case Mips::FLOG2_D:
7022 : case Mips::FLOG2_W:
7023 : case Mips::FRCP_D:
7024 : case Mips::FRCP_W:
7025 : case Mips::FRINT_D:
7026 : case Mips::FRINT_W:
7027 : case Mips::FRSQRT_D:
7028 : case Mips::FRSQRT_W:
7029 : case Mips::FSQRT_D:
7030 : case Mips::FSQRT_W:
7031 : case Mips::FTINT_S_D:
7032 : case Mips::FTINT_S_W:
7033 : case Mips::FTINT_U_D:
7034 : case Mips::FTINT_U_W:
7035 : case Mips::FTRUNC_S_D:
7036 : case Mips::FTRUNC_S_W:
7037 : case Mips::FTRUNC_U_D:
7038 : case Mips::FTRUNC_U_W:
7039 : case Mips::MOVE_V:
7040 : case Mips::NLOC_B:
7041 : case Mips::NLOC_D:
7042 : case Mips::NLOC_H:
7043 : case Mips::NLOC_W:
7044 : case Mips::NLZC_B:
7045 : case Mips::NLZC_D:
7046 : case Mips::NLZC_H:
7047 : case Mips::NLZC_W:
7048 : case Mips::PCNT_B:
7049 : case Mips::PCNT_D:
7050 : case Mips::PCNT_H:
7051 : case Mips::PCNT_W: {
7052 : // op: ws
7053 45 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7054 45 : Value |= (op & UINT64_C(31)) << 11;
7055 : // op: wd
7056 45 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7057 45 : Value |= (op & UINT64_C(31)) << 6;
7058 45 : break;
7059 : }
7060 : case Mips::BCLRI_H:
7061 : case Mips::BNEGI_H:
7062 : case Mips::BSETI_H:
7063 : case Mips::SAT_S_H:
7064 : case Mips::SAT_U_H:
7065 : case Mips::SLLI_H:
7066 : case Mips::SRAI_H:
7067 : case Mips::SRARI_H:
7068 : case Mips::SRLI_H:
7069 : case Mips::SRLRI_H: {
7070 : // op: ws
7071 10 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7072 10 : Value |= (op & UINT64_C(31)) << 11;
7073 : // op: wd
7074 10 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7075 10 : Value |= (op & UINT64_C(31)) << 6;
7076 : // op: m
7077 10 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7078 10 : Value |= (op & UINT64_C(15)) << 16;
7079 10 : break;
7080 : }
7081 : case Mips::BCLRI_W:
7082 : case Mips::BNEGI_W:
7083 : case Mips::BSETI_W:
7084 : case Mips::SAT_S_W:
7085 : case Mips::SAT_U_W:
7086 : case Mips::SLLI_W:
7087 : case Mips::SRAI_W:
7088 : case Mips::SRARI_W:
7089 : case Mips::SRLI_W:
7090 : case Mips::SRLRI_W: {
7091 : // op: ws
7092 10 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7093 10 : Value |= (op & UINT64_C(31)) << 11;
7094 : // op: wd
7095 10 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7096 10 : Value |= (op & UINT64_C(31)) << 6;
7097 : // op: m
7098 10 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7099 10 : Value |= (op & UINT64_C(31)) << 16;
7100 10 : break;
7101 : }
7102 : case Mips::BCLRI_D:
7103 : case Mips::BNEGI_D:
7104 : case Mips::BSETI_D:
7105 : case Mips::SAT_S_D:
7106 : case Mips::SAT_U_D:
7107 : case Mips::SLLI_D:
7108 : case Mips::SRAI_D:
7109 : case Mips::SRARI_D:
7110 : case Mips::SRLI_D:
7111 : case Mips::SRLRI_D: {
7112 : // op: ws
7113 10 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7114 10 : Value |= (op & UINT64_C(31)) << 11;
7115 : // op: wd
7116 10 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7117 10 : Value |= (op & UINT64_C(31)) << 6;
7118 : // op: m
7119 10 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7120 10 : Value |= (op & UINT64_C(63)) << 16;
7121 10 : break;
7122 : }
7123 : case Mips::BCLRI_B:
7124 : case Mips::BNEGI_B:
7125 : case Mips::BSETI_B:
7126 : case Mips::SAT_S_B:
7127 : case Mips::SAT_U_B:
7128 : case Mips::SLLI_B:
7129 : case Mips::SRAI_B:
7130 : case Mips::SRARI_B:
7131 : case Mips::SRLI_B:
7132 : case Mips::SRLRI_B: {
7133 : // op: ws
7134 10 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7135 10 : Value |= (op & UINT64_C(31)) << 11;
7136 : // op: wd
7137 10 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7138 10 : Value |= (op & UINT64_C(31)) << 6;
7139 : // op: m
7140 10 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7141 10 : Value |= (op & UINT64_C(7)) << 16;
7142 10 : break;
7143 : }
7144 : case Mips::BINSLI_H:
7145 : case Mips::BINSRI_H: {
7146 : // op: ws
7147 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7148 2 : Value |= (op & UINT64_C(31)) << 11;
7149 : // op: wd
7150 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7151 2 : Value |= (op & UINT64_C(31)) << 6;
7152 : // op: m
7153 2 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7154 2 : Value |= (op & UINT64_C(15)) << 16;
7155 2 : break;
7156 : }
7157 : case Mips::BINSLI_W:
7158 : case Mips::BINSRI_W: {
7159 : // op: ws
7160 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7161 2 : Value |= (op & UINT64_C(31)) << 11;
7162 : // op: wd
7163 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7164 2 : Value |= (op & UINT64_C(31)) << 6;
7165 : // op: m
7166 2 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7167 2 : Value |= (op & UINT64_C(31)) << 16;
7168 2 : break;
7169 : }
7170 : case Mips::BINSLI_D:
7171 : case Mips::BINSRI_D: {
7172 : // op: ws
7173 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7174 2 : Value |= (op & UINT64_C(31)) << 11;
7175 : // op: wd
7176 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7177 2 : Value |= (op & UINT64_C(31)) << 6;
7178 : // op: m
7179 2 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7180 2 : Value |= (op & UINT64_C(63)) << 16;
7181 2 : break;
7182 : }
7183 : case Mips::BINSLI_B:
7184 : case Mips::BINSRI_B: {
7185 : // op: ws
7186 2 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7187 2 : Value |= (op & UINT64_C(31)) << 11;
7188 : // op: wd
7189 2 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7190 2 : Value |= (op & UINT64_C(31)) << 6;
7191 : // op: m
7192 2 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7193 2 : Value |= (op & UINT64_C(7)) << 16;
7194 2 : break;
7195 : }
7196 : case Mips::ADDS_A_B:
7197 : case Mips::ADDS_A_D:
7198 : case Mips::ADDS_A_H:
7199 : case Mips::ADDS_A_W:
7200 : case Mips::ADDS_S_B:
7201 : case Mips::ADDS_S_D:
7202 : case Mips::ADDS_S_H:
7203 : case Mips::ADDS_S_W:
7204 : case Mips::ADDS_U_B:
7205 : case Mips::ADDS_U_D:
7206 : case Mips::ADDS_U_H:
7207 : case Mips::ADDS_U_W:
7208 : case Mips::ADDV_B:
7209 : case Mips::ADDV_D:
7210 : case Mips::ADDV_H:
7211 : case Mips::ADDV_W:
7212 : case Mips::ADD_A_B:
7213 : case Mips::ADD_A_D:
7214 : case Mips::ADD_A_H:
7215 : case Mips::ADD_A_W:
7216 : case Mips::AND_V:
7217 : case Mips::ASUB_S_B:
7218 : case Mips::ASUB_S_D:
7219 : case Mips::ASUB_S_H:
7220 : case Mips::ASUB_S_W:
7221 : case Mips::ASUB_U_B:
7222 : case Mips::ASUB_U_D:
7223 : case Mips::ASUB_U_H:
7224 : case Mips::ASUB_U_W:
7225 : case Mips::AVER_S_B:
7226 : case Mips::AVER_S_D:
7227 : case Mips::AVER_S_H:
7228 : case Mips::AVER_S_W:
7229 : case Mips::AVER_U_B:
7230 : case Mips::AVER_U_D:
7231 : case Mips::AVER_U_H:
7232 : case Mips::AVER_U_W:
7233 : case Mips::AVE_S_B:
7234 : case Mips::AVE_S_D:
7235 : case Mips::AVE_S_H:
7236 : case Mips::AVE_S_W:
7237 : case Mips::AVE_U_B:
7238 : case Mips::AVE_U_D:
7239 : case Mips::AVE_U_H:
7240 : case Mips::AVE_U_W:
7241 : case Mips::BCLR_B:
7242 : case Mips::BCLR_D:
7243 : case Mips::BCLR_H:
7244 : case Mips::BCLR_W:
7245 : case Mips::BNEG_B:
7246 : case Mips::BNEG_D:
7247 : case Mips::BNEG_H:
7248 : case Mips::BNEG_W:
7249 : case Mips::BSET_B:
7250 : case Mips::BSET_D:
7251 : case Mips::BSET_H:
7252 : case Mips::BSET_W:
7253 : case Mips::CEQ_B:
7254 : case Mips::CEQ_D:
7255 : case Mips::CEQ_H:
7256 : case Mips::CEQ_W:
7257 : case Mips::CLE_S_B:
7258 : case Mips::CLE_S_D:
7259 : case Mips::CLE_S_H:
7260 : case Mips::CLE_S_W:
7261 : case Mips::CLE_U_B:
7262 : case Mips::CLE_U_D:
7263 : case Mips::CLE_U_H:
7264 : case Mips::CLE_U_W:
7265 : case Mips::CLT_S_B:
7266 : case Mips::CLT_S_D:
7267 : case Mips::CLT_S_H:
7268 : case Mips::CLT_S_W:
7269 : case Mips::CLT_U_B:
7270 : case Mips::CLT_U_D:
7271 : case Mips::CLT_U_H:
7272 : case Mips::CLT_U_W:
7273 : case Mips::DIV_S_B:
7274 : case Mips::DIV_S_D:
7275 : case Mips::DIV_S_H:
7276 : case Mips::DIV_S_W:
7277 : case Mips::DIV_U_B:
7278 : case Mips::DIV_U_D:
7279 : case Mips::DIV_U_H:
7280 : case Mips::DIV_U_W:
7281 : case Mips::DOTP_S_D:
7282 : case Mips::DOTP_S_H:
7283 : case Mips::DOTP_S_W:
7284 : case Mips::DOTP_U_D:
7285 : case Mips::DOTP_U_H:
7286 : case Mips::DOTP_U_W:
7287 : case Mips::FADD_D:
7288 : case Mips::FADD_W:
7289 : case Mips::FCAF_D:
7290 : case Mips::FCAF_W:
7291 : case Mips::FCEQ_D:
7292 : case Mips::FCEQ_W:
7293 : case Mips::FCLE_D:
7294 : case Mips::FCLE_W:
7295 : case Mips::FCLT_D:
7296 : case Mips::FCLT_W:
7297 : case Mips::FCNE_D:
7298 : case Mips::FCNE_W:
7299 : case Mips::FCOR_D:
7300 : case Mips::FCOR_W:
7301 : case Mips::FCUEQ_D:
7302 : case Mips::FCUEQ_W:
7303 : case Mips::FCULE_D:
7304 : case Mips::FCULE_W:
7305 : case Mips::FCULT_D:
7306 : case Mips::FCULT_W:
7307 : case Mips::FCUNE_D:
7308 : case Mips::FCUNE_W:
7309 : case Mips::FCUN_D:
7310 : case Mips::FCUN_W:
7311 : case Mips::FDIV_D:
7312 : case Mips::FDIV_W:
7313 : case Mips::FEXDO_H:
7314 : case Mips::FEXDO_W:
7315 : case Mips::FEXP2_D:
7316 : case Mips::FEXP2_W:
7317 : case Mips::FMAX_A_D:
7318 : case Mips::FMAX_A_W:
7319 : case Mips::FMAX_D:
7320 : case Mips::FMAX_W:
7321 : case Mips::FMIN_A_D:
7322 : case Mips::FMIN_A_W:
7323 : case Mips::FMIN_D:
7324 : case Mips::FMIN_W:
7325 : case Mips::FMUL_D:
7326 : case Mips::FMUL_W:
7327 : case Mips::FSAF_D:
7328 : case Mips::FSAF_W:
7329 : case Mips::FSEQ_D:
7330 : case Mips::FSEQ_W:
7331 : case Mips::FSLE_D:
7332 : case Mips::FSLE_W:
7333 : case Mips::FSLT_D:
7334 : case Mips::FSLT_W:
7335 : case Mips::FSNE_D:
7336 : case Mips::FSNE_W:
7337 : case Mips::FSOR_D:
7338 : case Mips::FSOR_W:
7339 : case Mips::FSUB_D:
7340 : case Mips::FSUB_W:
7341 : case Mips::FSUEQ_D:
7342 : case Mips::FSUEQ_W:
7343 : case Mips::FSULE_D:
7344 : case Mips::FSULE_W:
7345 : case Mips::FSULT_D:
7346 : case Mips::FSULT_W:
7347 : case Mips::FSUNE_D:
7348 : case Mips::FSUNE_W:
7349 : case Mips::FSUN_D:
7350 : case Mips::FSUN_W:
7351 : case Mips::FTQ_H:
7352 : case Mips::FTQ_W:
7353 : case Mips::HADD_S_D:
7354 : case Mips::HADD_S_H:
7355 : case Mips::HADD_S_W:
7356 : case Mips::HADD_U_D:
7357 : case Mips::HADD_U_H:
7358 : case Mips::HADD_U_W:
7359 : case Mips::HSUB_S_D:
7360 : case Mips::HSUB_S_H:
7361 : case Mips::HSUB_S_W:
7362 : case Mips::HSUB_U_D:
7363 : case Mips::HSUB_U_H:
7364 : case Mips::HSUB_U_W:
7365 : case Mips::ILVEV_B:
7366 : case Mips::ILVEV_D:
7367 : case Mips::ILVEV_H:
7368 : case Mips::ILVEV_W:
7369 : case Mips::ILVL_B:
7370 : case Mips::ILVL_D:
7371 : case Mips::ILVL_H:
7372 : case Mips::ILVL_W:
7373 : case Mips::ILVOD_B:
7374 : case Mips::ILVOD_D:
7375 : case Mips::ILVOD_H:
7376 : case Mips::ILVOD_W:
7377 : case Mips::ILVR_B:
7378 : case Mips::ILVR_D:
7379 : case Mips::ILVR_H:
7380 : case Mips::ILVR_W:
7381 : case Mips::MAX_A_B:
7382 : case Mips::MAX_A_D:
7383 : case Mips::MAX_A_H:
7384 : case Mips::MAX_A_W:
7385 : case Mips::MAX_S_B:
7386 : case Mips::MAX_S_D:
7387 : case Mips::MAX_S_H:
7388 : case Mips::MAX_S_W:
7389 : case Mips::MAX_U_B:
7390 : case Mips::MAX_U_D:
7391 : case Mips::MAX_U_H:
7392 : case Mips::MAX_U_W:
7393 : case Mips::MIN_A_B:
7394 : case Mips::MIN_A_D:
7395 : case Mips::MIN_A_H:
7396 : case Mips::MIN_A_W:
7397 : case Mips::MIN_S_B:
7398 : case Mips::MIN_S_D:
7399 : case Mips::MIN_S_H:
7400 : case Mips::MIN_S_W:
7401 : case Mips::MIN_U_B:
7402 : case Mips::MIN_U_D:
7403 : case Mips::MIN_U_H:
7404 : case Mips::MIN_U_W:
7405 : case Mips::MOD_S_B:
7406 : case Mips::MOD_S_D:
7407 : case Mips::MOD_S_H:
7408 : case Mips::MOD_S_W:
7409 : case Mips::MOD_U_B:
7410 : case Mips::MOD_U_D:
7411 : case Mips::MOD_U_H:
7412 : case Mips::MOD_U_W:
7413 : case Mips::MULR_Q_H:
7414 : case Mips::MULR_Q_W:
7415 : case Mips::MULV_B:
7416 : case Mips::MULV_D:
7417 : case Mips::MULV_H:
7418 : case Mips::MULV_W:
7419 : case Mips::MUL_Q_H:
7420 : case Mips::MUL_Q_W:
7421 : case Mips::NOR_V:
7422 : case Mips::OR_V:
7423 : case Mips::PCKEV_B:
7424 : case Mips::PCKEV_D:
7425 : case Mips::PCKEV_H:
7426 : case Mips::PCKEV_W:
7427 : case Mips::PCKOD_B:
7428 : case Mips::PCKOD_D:
7429 : case Mips::PCKOD_H:
7430 : case Mips::PCKOD_W:
7431 : case Mips::SLL_B:
7432 : case Mips::SLL_D:
7433 : case Mips::SLL_H:
7434 : case Mips::SLL_W:
7435 : case Mips::SRAR_B:
7436 : case Mips::SRAR_D:
7437 : case Mips::SRAR_H:
7438 : case Mips::SRAR_W:
7439 : case Mips::SRA_B:
7440 : case Mips::SRA_D:
7441 : case Mips::SRA_H:
7442 : case Mips::SRA_W:
7443 : case Mips::SRLR_B:
7444 : case Mips::SRLR_D:
7445 : case Mips::SRLR_H:
7446 : case Mips::SRLR_W:
7447 : case Mips::SRL_B:
7448 : case Mips::SRL_D:
7449 : case Mips::SRL_H:
7450 : case Mips::SRL_W:
7451 : case Mips::SUBSUS_U_B:
7452 : case Mips::SUBSUS_U_D:
7453 : case Mips::SUBSUS_U_H:
7454 : case Mips::SUBSUS_U_W:
7455 : case Mips::SUBSUU_S_B:
7456 : case Mips::SUBSUU_S_D:
7457 : case Mips::SUBSUU_S_H:
7458 : case Mips::SUBSUU_S_W:
7459 : case Mips::SUBS_S_B:
7460 : case Mips::SUBS_S_D:
7461 : case Mips::SUBS_S_H:
7462 : case Mips::SUBS_S_W:
7463 : case Mips::SUBS_U_B:
7464 : case Mips::SUBS_U_D:
7465 : case Mips::SUBS_U_H:
7466 : case Mips::SUBS_U_W:
7467 : case Mips::SUBV_B:
7468 : case Mips::SUBV_D:
7469 : case Mips::SUBV_H:
7470 : case Mips::SUBV_W:
7471 : case Mips::XOR_V: {
7472 : // op: wt
7473 282 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7474 282 : Value |= (op & UINT64_C(31)) << 16;
7475 : // op: ws
7476 282 : op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7477 282 : Value |= (op & UINT64_C(31)) << 11;
7478 : // op: wd
7479 282 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7480 282 : Value |= (op & UINT64_C(31)) << 6;
7481 282 : break;
7482 : }
7483 : case Mips::BINSL_B:
7484 : case Mips::BINSL_D:
7485 : case Mips::BINSL_H:
7486 : case Mips::BINSL_W:
7487 : case Mips::BINSR_B:
7488 : case Mips::BINSR_D:
7489 : case Mips::BINSR_H:
7490 : case Mips::BINSR_W:
7491 : case Mips::BMNZ_V:
7492 : case Mips::BMZ_V:
7493 : case Mips::BSEL_V:
7494 : case Mips::DPADD_S_D:
7495 : case Mips::DPADD_S_H:
7496 : case Mips::DPADD_S_W:
7497 : case Mips::DPADD_U_D:
7498 : case Mips::DPADD_U_H:
7499 : case Mips::DPADD_U_W:
7500 : case Mips::DPSUB_S_D:
7501 : case Mips::DPSUB_S_H:
7502 : case Mips::DPSUB_S_W:
7503 : case Mips::DPSUB_U_D:
7504 : case Mips::DPSUB_U_H:
7505 : case Mips::DPSUB_U_W:
7506 : case Mips::FMADD_D:
7507 : case Mips::FMADD_W:
7508 : case Mips::FMSUB_D:
7509 : case Mips::FMSUB_W:
7510 : case Mips::MADDR_Q_H:
7511 : case Mips::MADDR_Q_W:
7512 : case Mips::MADDV_B:
7513 : case Mips::MADDV_D:
7514 : case Mips::MADDV_H:
7515 : case Mips::MADDV_W:
7516 : case Mips::MADD_Q_H:
7517 : case Mips::MADD_Q_W:
7518 : case Mips::MSUBR_Q_H:
7519 : case Mips::MSUBR_Q_W:
7520 : case Mips::MSUBV_B:
7521 : case Mips::MSUBV_D:
7522 : case Mips::MSUBV_H:
7523 : case Mips::MSUBV_W:
7524 : case Mips::MSUB_Q_H:
7525 : case Mips::MSUB_Q_W:
7526 : case Mips::VSHF_B:
7527 : case Mips::VSHF_D:
7528 : case Mips::VSHF_H:
7529 : case Mips::VSHF_W: {
7530 : // op: wt
7531 47 : op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7532 47 : Value |= (op & UINT64_C(31)) << 16;
7533 : // op: ws
7534 47 : op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7535 47 : Value |= (op & UINT64_C(31)) << 11;
7536 : // op: wd
7537 47 : op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7538 47 : Value |= (op & UINT64_C(31)) << 6;
7539 47 : break;
7540 : }
7541 : default:
7542 : std::string msg;
7543 : raw_string_ostream Msg(msg);
7544 0 : Msg << "Not supported instr: " << MI;
7545 0 : report_fatal_error(Msg.str());
7546 : }
7547 42741 : return Value;
7548 : }
7549 :
7550 : #ifdef ENABLE_INSTR_PREDICATE_VERIFIER
7551 : #undef ENABLE_INSTR_PREDICATE_VERIFIER
7552 : #include <sstream>
7553 :
7554 : // Flags for subtarget features that participate in instruction matching.
7555 : enum SubtargetFeatureFlag : uint64_t {
7556 : Feature_HasMips2 = (1ULL << 10),
7557 : Feature_HasMips3_32 = (1ULL << 16),
7558 : Feature_HasMips3_32r2 = (1ULL << 17),
7559 : Feature_HasMips3 = (1ULL << 11),
7560 : Feature_NotMips3 = (1ULL << 44),
7561 : Feature_HasMips4_32 = (1ULL << 18),
7562 : Feature_NotMips4_32 = (1ULL << 46),
7563 : Feature_HasMips4_32r2 = (1ULL << 19),
7564 : Feature_HasMips5_32r2 = (1ULL << 20),
7565 : Feature_HasMips32 = (1ULL << 12),
7566 : Feature_HasMips32r2 = (1ULL << 13),
7567 : Feature_HasMips32r5 = (1ULL << 14),
7568 : Feature_HasMips32r6 = (1ULL << 15),
7569 : Feature_NotMips32r6 = (1ULL << 45),
7570 : Feature_IsGP64bit = (1ULL << 31),
7571 : Feature_IsGP32bit = (1ULL << 30),
7572 : Feature_IsPTR64bit = (1ULL << 35),
7573 : Feature_IsPTR32bit = (1ULL << 34),
7574 : Feature_HasMips64 = (1ULL << 21),
7575 : Feature_NotMips64 = (1ULL << 47),
7576 : Feature_HasMips64r2 = (1ULL << 22),
7577 : Feature_HasMips64r5 = (1ULL << 23),
7578 : Feature_HasMips64r6 = (1ULL << 24),
7579 : Feature_NotMips64r6 = (1ULL << 48),
7580 : Feature_InMips16Mode = (1ULL << 28),
7581 : Feature_NotInMips16Mode = (1ULL << 43),
7582 : Feature_HasCnMips = (1ULL << 1),
7583 : Feature_NotCnMips = (1ULL << 40),
7584 : Feature_IsSym32 = (1ULL << 37),
7585 : Feature_IsSym64 = (1ULL << 38),
7586 : Feature_HasStdEnc = (1ULL << 25),
7587 : Feature_InMicroMips = (1ULL << 27),
7588 : Feature_NotInMicroMips = (1ULL << 42),
7589 : Feature_HasEVA = (1ULL << 5),
7590 : Feature_HasMSA = (1ULL << 7),
7591 : Feature_HasMadd4 = (1ULL << 9),
7592 : Feature_HasMT = (1ULL << 8),
7593 : Feature_UseIndirectJumpsHazard = (1ULL << 49),
7594 : Feature_NoIndirectJumpGuards = (1ULL << 39),
7595 : Feature_HasCRC = (1ULL << 0),
7596 : Feature_HasVirt = (1ULL << 26),
7597 : Feature_HasGINV = (1ULL << 6),
7598 : Feature_IsFP64bit = (1ULL << 29),
7599 : Feature_NotFP64bit = (1ULL << 41),
7600 : Feature_IsSingleFloat = (1ULL << 36),
7601 : Feature_IsNotSingleFloat = (1ULL << 32),
7602 : Feature_IsNotSoftFloat = (1ULL << 33),
7603 : Feature_HasDSP = (1ULL << 2),
7604 : Feature_HasDSPR2 = (1ULL << 3),
7605 : Feature_HasDSPR3 = (1ULL << 4),
7606 : Feature_None = 0
7607 : };
7608 :
7609 : #ifndef NDEBUG
7610 : static const char *SubtargetFeatureNames[] = {
7611 : "Feature_HasCRC",
7612 : "Feature_HasCnMips",
7613 : "Feature_HasDSP",
7614 : "Feature_HasDSPR2",
7615 : "Feature_HasDSPR3",
7616 : "Feature_HasEVA",
7617 : "Feature_HasGINV",
7618 : "Feature_HasMSA",
7619 : "Feature_HasMT",
7620 : "Feature_HasMadd4",
7621 : "Feature_HasMips2",
7622 : "Feature_HasMips3",
7623 : "Feature_HasMips32",
7624 : "Feature_HasMips32r2",
7625 : "Feature_HasMips32r5",
7626 : "Feature_HasMips32r6",
7627 : "Feature_HasMips3_32",
7628 : "Feature_HasMips3_32r2",
7629 : "Feature_HasMips4_32",
7630 : "Feature_HasMips4_32r2",
7631 : "Feature_HasMips5_32r2",
7632 : "Feature_HasMips64",
7633 : "Feature_HasMips64r2",
7634 : "Feature_HasMips64r5",
7635 : "Feature_HasMips64r6",
7636 : "Feature_HasStdEnc",
7637 : "Feature_HasVirt",
7638 : "Feature_InMicroMips",
7639 : "Feature_InMips16Mode",
7640 : "Feature_IsFP64bit",
7641 : "Feature_IsGP32bit",
7642 : "Feature_IsGP64bit",
7643 : "Feature_IsNotSingleFloat",
7644 : "Feature_IsNotSoftFloat",
7645 : "Feature_IsPTR32bit",
7646 : "Feature_IsPTR64bit",
7647 : "Feature_IsSingleFloat",
7648 : "Feature_IsSym32",
7649 : "Feature_IsSym64",
7650 : "Feature_NoIndirectJumpGuards",
7651 : "Feature_NotCnMips",
7652 : "Feature_NotFP64bit",
7653 : "Feature_NotInMicroMips",
7654 : "Feature_NotInMips16Mode",
7655 : "Feature_NotMips3",
7656 : "Feature_NotMips32r6",
7657 : "Feature_NotMips4_32",
7658 : "Feature_NotMips64",
7659 : "Feature_NotMips64r6",
7660 : "Feature_UseIndirectJumpsHazard",
7661 : nullptr
7662 : };
7663 :
7664 : #endif // NDEBUG
7665 : uint64_t MipsMCCodeEmitter::
7666 : computeAvailableFeatures(const FeatureBitset& FB) const {
7667 : uint64_t Features = 0;
7668 : if ((FB[Mips::FeatureMips2]))
7669 : Features |= Feature_HasMips2;
7670 : if ((FB[Mips::FeatureMips3_32]))
7671 : Features |= Feature_HasMips3_32;
7672 : if ((FB[Mips::FeatureMips3_32r2]))
7673 : Features |= Feature_HasMips3_32r2;
7674 : if ((FB[Mips::FeatureMips3]))
7675 : Features |= Feature_HasMips3;
7676 : if ((!FB[Mips::FeatureMips3]))
7677 : Features |= Feature_NotMips3;
7678 : if ((FB[Mips::FeatureMips4_32]))
7679 : Features |= Feature_HasMips4_32;
7680 : if ((!FB[Mips::FeatureMips4_32]))
7681 : Features |= Feature_NotMips4_32;
7682 : if ((FB[Mips::FeatureMips4_32r2]))
7683 : Features |= Feature_HasMips4_32r2;
7684 : if ((FB[Mips::FeatureMips5_32r2]))
7685 : Features |= Feature_HasMips5_32r2;
7686 : if ((FB[Mips::FeatureMips32]))
7687 : Features |= Feature_HasMips32;
7688 : if ((FB[Mips::FeatureMips32r2]))
7689 : Features |= Feature_HasMips32r2;
7690 : if ((FB[Mips::FeatureMips32r5]))
7691 : Features |= Feature_HasMips32r5;
7692 : if ((FB[Mips::FeatureMips32r6]))
7693 : Features |= Feature_HasMips32r6;
7694 : if ((!FB[Mips::FeatureMips32r6]))
7695 : Features |= Feature_NotMips32r6;
7696 : if ((FB[Mips::FeatureGP64Bit]))
7697 : Features |= Feature_IsGP64bit;
7698 : if ((!FB[Mips::FeatureGP64Bit]))
7699 : Features |= Feature_IsGP32bit;
7700 : if ((FB[Mips::FeaturePTR64Bit]))
7701 : Features |= Feature_IsPTR64bit;
7702 : if ((!FB[Mips::FeaturePTR64Bit]))
7703 : Features |= Feature_IsPTR32bit;
7704 : if ((FB[Mips::FeatureMips64]))
7705 : Features |= Feature_HasMips64;
7706 : if ((!FB[Mips::FeatureMips64]))
7707 : Features |= Feature_NotMips64;
7708 : if ((FB[Mips::FeatureMips64r2]))
7709 : Features |= Feature_HasMips64r2;
7710 : if ((FB[Mips::FeatureMips64r5]))
7711 : Features |= Feature_HasMips64r5;
7712 : if ((FB[Mips::FeatureMips64r6]))
7713 : Features |= Feature_HasMips64r6;
7714 : if ((!FB[Mips::FeatureMips64r6]))
7715 : Features |= Feature_NotMips64r6;
7716 : if ((FB[Mips::FeatureMips16]))
7717 : Features |= Feature_InMips16Mode;
7718 : if ((!FB[Mips::FeatureMips16]))
7719 : Features |= Feature_NotInMips16Mode;
7720 : if ((FB[Mips::FeatureCnMips]))
7721 : Features |= Feature_HasCnMips;
7722 : if ((!FB[Mips::FeatureCnMips]))
7723 : Features |= Feature_NotCnMips;
7724 : if ((FB[Mips::FeatureSym32]))
7725 : Features |= Feature_IsSym32;
7726 : if ((!FB[Mips::FeatureSym32]))
7727 : Features |= Feature_IsSym64;
7728 : if ((!FB[Mips::FeatureMips16]))
7729 : Features |= Feature_HasStdEnc;
7730 : if ((FB[Mips::FeatureMicroMips]))
7731 : Features |= Feature_InMicroMips;
7732 : if ((!FB[Mips::FeatureMicroMips]))
7733 : Features |= Feature_NotInMicroMips;
7734 : if ((FB[Mips::FeatureEVA]))
7735 : Features |= Feature_HasEVA;
7736 : if ((FB[Mips::FeatureMSA]))
7737 : Features |= Feature_HasMSA;
7738 : if ((!FB[Mips::FeatureMadd4]))
7739 : Features |= Feature_HasMadd4;
7740 : if ((FB[Mips::FeatureMT]))
7741 : Features |= Feature_HasMT;
7742 : if ((FB[Mips::FeatureUseIndirectJumpsHazard]))
7743 : Features |= Feature_UseIndirectJumpsHazard;
7744 : if ((!FB[Mips::FeatureUseIndirectJumpsHazard]))
7745 : Features |= Feature_NoIndirectJumpGuards;
7746 : if ((FB[Mips::FeatureCRC]))
7747 : Features |= Feature_HasCRC;
7748 : if ((FB[Mips::FeatureVirt]))
7749 : Features |= Feature_HasVirt;
7750 : if ((FB[Mips::FeatureGINV]))
7751 : Features |= Feature_HasGINV;
7752 : if ((FB[Mips::FeatureFP64Bit]))
7753 : Features |= Feature_IsFP64bit;
7754 : if ((!FB[Mips::FeatureFP64Bit]))
7755 : Features |= Feature_NotFP64bit;
7756 : if ((FB[Mips::FeatureSingleFloat]))
7757 : Features |= Feature_IsSingleFloat;
7758 : if ((!FB[Mips::FeatureSingleFloat]))
7759 : Features |= Feature_IsNotSingleFloat;
7760 : if ((!FB[Mips::FeatureSoftFloat]))
7761 : Features |= Feature_IsNotSoftFloat;
7762 : if ((FB[Mips::FeatureDSP]))
7763 : Features |= Feature_HasDSP;
7764 : if ((FB[Mips::FeatureDSPR2]))
7765 : Features |= Feature_HasDSPR2;
7766 : if ((FB[Mips::FeatureDSPR3]))
7767 : Features |= Feature_HasDSPR3;
7768 : return Features;
7769 : }
7770 :
7771 : void MipsMCCodeEmitter::verifyInstructionPredicates(
7772 : const MCInst &Inst, uint64_t AvailableFeatures) const {
7773 : #ifndef NDEBUG
7774 : static uint64_t RequiredFeatures[] = {
7775 : 0, // PHI = 0
7776 : 0, // INLINEASM = 1
7777 : 0, // CFI_INSTRUCTION = 2
7778 : 0, // EH_LABEL = 3
7779 : 0, // GC_LABEL = 4
7780 : 0, // ANNOTATION_LABEL = 5
7781 : 0, // KILL = 6
7782 : 0, // EXTRACT_SUBREG = 7
7783 : 0, // INSERT_SUBREG = 8
7784 : 0, // IMPLICIT_DEF = 9
7785 : 0, // SUBREG_TO_REG = 10
7786 : 0, // COPY_TO_REGCLASS = 11
7787 : 0, // DBG_VALUE = 12
7788 : 0, // DBG_LABEL = 13
7789 : 0, // REG_SEQUENCE = 14
7790 : 0, // COPY = 15
7791 : 0, // BUNDLE = 16
7792 : 0, // LIFETIME_START = 17
7793 : 0, // LIFETIME_END = 18
7794 : 0, // STACKMAP = 19
7795 : 0, // FENTRY_CALL = 20
7796 : 0, // PATCHPOINT = 21
7797 : 0, // LOAD_STACK_GUARD = 22
7798 : 0, // STATEPOINT = 23
7799 : 0, // LOCAL_ESCAPE = 24
7800 : 0, // FAULTING_OP = 25
7801 : 0, // PATCHABLE_OP = 26
7802 : 0, // PATCHABLE_FUNCTION_ENTER = 27
7803 : 0, // PATCHABLE_RET = 28
7804 : 0, // PATCHABLE_FUNCTION_EXIT = 29
7805 : 0, // PATCHABLE_TAIL_CALL = 30
7806 : 0, // PATCHABLE_EVENT_CALL = 31
7807 : 0, // PATCHABLE_TYPED_EVENT_CALL = 32
7808 : 0, // ICALL_BRANCH_FUNNEL = 33
7809 : 0, // G_ADD = 34
7810 : 0, // G_SUB = 35
7811 : 0, // G_MUL = 36
7812 : 0, // G_SDIV = 37
7813 : 0, // G_UDIV = 38
7814 : 0, // G_SREM = 39
7815 : 0, // G_UREM = 40
7816 : 0, // G_AND = 41
7817 : 0, // G_OR = 42
7818 : 0, // G_XOR = 43
7819 : 0, // G_IMPLICIT_DEF = 44
7820 : 0, // G_PHI = 45
7821 : 0, // G_FRAME_INDEX = 46
7822 : 0, // G_GLOBAL_VALUE = 47
7823 : 0, // G_EXTRACT = 48
7824 : 0, // G_UNMERGE_VALUES = 49
7825 : 0, // G_INSERT = 50
7826 : 0, // G_MERGE_VALUES = 51
7827 : 0, // G_PTRTOINT = 52
7828 : 0, // G_INTTOPTR = 53
7829 : 0, // G_BITCAST = 54
7830 : 0, // G_INTRINSIC_TRUNC = 55
7831 : 0, // G_INTRINSIC_ROUND = 56
7832 : 0, // G_LOAD = 57
7833 : 0, // G_SEXTLOAD = 58
7834 : 0, // G_ZEXTLOAD = 59
7835 : 0, // G_STORE = 60
7836 : 0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 61
7837 : 0, // G_ATOMIC_CMPXCHG = 62
7838 : 0, // G_ATOMICRMW_XCHG = 63
7839 : 0, // G_ATOMICRMW_ADD = 64
7840 : 0, // G_ATOMICRMW_SUB = 65
7841 : 0, // G_ATOMICRMW_AND = 66
7842 : 0, // G_ATOMICRMW_NAND = 67
7843 : 0, // G_ATOMICRMW_OR = 68
7844 : 0, // G_ATOMICRMW_XOR = 69
7845 : 0, // G_ATOMICRMW_MAX = 70
7846 : 0, // G_ATOMICRMW_MIN = 71
7847 : 0, // G_ATOMICRMW_UMAX = 72
7848 : 0, // G_ATOMICRMW_UMIN = 73
7849 : 0, // G_BRCOND = 74
7850 : 0, // G_BRINDIRECT = 75
7851 : 0, // G_INTRINSIC = 76
7852 : 0, // G_INTRINSIC_W_SIDE_EFFECTS = 77
7853 : 0, // G_ANYEXT = 78
7854 : 0, // G_TRUNC = 79
7855 : 0, // G_CONSTANT = 80
7856 : 0, // G_FCONSTANT = 81
7857 : 0, // G_VASTART = 82
7858 : 0, // G_VAARG = 83
7859 : 0, // G_SEXT = 84
7860 : 0, // G_ZEXT = 85
7861 : 0, // G_SHL = 86
7862 : 0, // G_LSHR = 87
7863 : 0, // G_ASHR = 88
7864 : 0, // G_ICMP = 89
7865 : 0, // G_FCMP = 90
7866 : 0, // G_SELECT = 91
7867 : 0, // G_UADDO = 92
7868 : 0, // G_UADDE = 93
7869 : 0, // G_USUBO = 94
7870 : 0, // G_USUBE = 95
7871 : 0, // G_SADDO = 96
7872 : 0, // G_SADDE = 97
7873 : 0, // G_SSUBO = 98
7874 : 0, // G_SSUBE = 99
7875 : 0, // G_UMULO = 100
7876 : 0, // G_SMULO = 101
7877 : 0, // G_UMULH = 102
7878 : 0, // G_SMULH = 103
7879 : 0, // G_FADD = 104
7880 : 0, // G_FSUB = 105
7881 : 0, // G_FMUL = 106
7882 : 0, // G_FMA = 107
7883 : 0, // G_FDIV = 108
7884 : 0, // G_FREM = 109
7885 : 0, // G_FPOW = 110
7886 : 0, // G_FEXP = 111
7887 : 0, // G_FEXP2 = 112
7888 : 0, // G_FLOG = 113
7889 : 0, // G_FLOG2 = 114
7890 : 0, // G_FNEG = 115
7891 : 0, // G_FPEXT = 116
7892 : 0, // G_FPTRUNC = 117
7893 : 0, // G_FPTOSI = 118
7894 : 0, // G_FPTOUI = 119
7895 : 0, // G_SITOFP = 120
7896 : 0, // G_UITOFP = 121
7897 : 0, // G_FABS = 122
7898 : 0, // G_GEP = 123
7899 : 0, // G_PTR_MASK = 124
7900 : 0, // G_BR = 125
7901 : 0, // G_INSERT_VECTOR_ELT = 126
7902 : 0, // G_EXTRACT_VECTOR_ELT = 127
7903 : 0, // G_SHUFFLE_VECTOR = 128
7904 : 0, // G_CTTZ = 129
7905 : 0, // G_CTTZ_ZERO_UNDEF = 130
7906 : 0, // G_CTLZ = 131
7907 : 0, // G_CTLZ_ZERO_UNDEF = 132
7908 : 0, // G_CTPOP = 133
7909 : 0, // G_BSWAP = 134
7910 : 0, // G_ADDRSPACE_CAST = 135
7911 : 0, // G_BLOCK_ADDR = 136
7912 : 0, // ABSMacro = 137
7913 : 0, // ADJCALLSTACKDOWN = 138
7914 : 0, // ADJCALLSTACKUP = 139
7915 : Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_D_PSEUDO = 140
7916 : Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_H_PSEUDO = 141
7917 : Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_W_PSEUDO = 142
7918 : Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I16 = 143
7919 : Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I16_POSTRA = 144
7920 : Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I32 = 145
7921 : Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I32_POSTRA = 146
7922 : Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I64 = 147
7923 : Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I64_POSTRA = 148
7924 : Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I8 = 149
7925 : Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I8_POSTRA = 150
7926 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I16 = 151
7927 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I16_POSTRA = 152
7928 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I32 = 153
7929 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I32_POSTRA = 154
7930 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I64 = 155
7931 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I64_POSTRA = 156
7932 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I8 = 157
7933 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I8_POSTRA = 158
7934 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I16 = 159
7935 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I16_POSTRA = 160
7936 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I32 = 161
7937 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I32_POSTRA = 162
7938 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I64 = 163
7939 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I64_POSTRA = 164
7940 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I8 = 165
7941 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I8_POSTRA = 166
7942 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I16 = 167
7943 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I16_POSTRA = 168
7944 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I32 = 169
7945 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I32_POSTRA = 170
7946 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I64 = 171
7947 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I64_POSTRA = 172
7948 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I8 = 173
7949 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I8_POSTRA = 174
7950 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I16 = 175
7951 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I16_POSTRA = 176
7952 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I32 = 177
7953 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I32_POSTRA = 178
7954 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I64 = 179
7955 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I64_POSTRA = 180
7956 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I8 = 181
7957 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I8_POSTRA = 182
7958 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I16 = 183
7959 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I16_POSTRA = 184
7960 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I32 = 185
7961 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I32_POSTRA = 186
7962 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I64 = 187
7963 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I64_POSTRA = 188
7964 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I8 = 189
7965 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I8_POSTRA = 190
7966 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I16 = 191
7967 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I16_POSTRA = 192
7968 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I32 = 193
7969 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I32_POSTRA = 194
7970 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I64 = 195
7971 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I64_POSTRA = 196
7972 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I8 = 197
7973 : Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I8_POSTRA = 198
7974 : Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I16 = 199
7975 : Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I16_POSTRA = 200
7976 : Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I32 = 201
7977 : Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I32_POSTRA = 202
7978 : Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I64 = 203
7979 : Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I64_POSTRA = 204
7980 : Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I8 = 205
7981 : Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I8_POSTRA = 206
7982 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // B = 207
7983 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BAL_BR = 208
7984 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BAL_BR_MM = 209
7985 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BEQLImmMacro = 210
7986 : 0, // BGE = 211
7987 : 0, // BGEImmMacro = 212
7988 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEL = 213
7989 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGELImmMacro = 214
7990 : 0, // BGEU = 215
7991 : 0, // BGEUImmMacro = 216
7992 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEUL = 217
7993 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEULImmMacro = 218
7994 : 0, // BGT = 219
7995 : 0, // BGTImmMacro = 220
7996 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTL = 221
7997 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTLImmMacro = 222
7998 : 0, // BGTU = 223
7999 : 0, // BGTUImmMacro = 224
8000 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTUL = 225
8001 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTULImmMacro = 226
8002 : 0, // BLE = 227
8003 : 0, // BLEImmMacro = 228
8004 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEL = 229
8005 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLELImmMacro = 230
8006 : 0, // BLEU = 231
8007 : 0, // BLEUImmMacro = 232
8008 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEUL = 233
8009 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEULImmMacro = 234
8010 : 0, // BLT = 235
8011 : 0, // BLTImmMacro = 236
8012 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTL = 237
8013 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTLImmMacro = 238
8014 : 0, // BLTU = 239
8015 : 0, // BLTUImmMacro = 240
8016 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTUL = 241
8017 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTULImmMacro = 242
8018 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BNELImmMacro = 243
8019 : 0, // BPOSGE32_PSEUDO = 244
8020 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_D_PSEUDO = 245
8021 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_FD_PSEUDO = 246
8022 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_FW_PSEUDO = 247
8023 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_H_PSEUDO = 248
8024 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_W_PSEUDO = 249
8025 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // B_MM = 250
8026 : 0, // B_MMR6_Pseudo = 251
8027 : Feature_InMicroMips | 0, // B_MM_Pseudo = 252
8028 : 0, // BeqImm = 253
8029 : 0, // BneImm = 254
8030 : Feature_InMips16Mode | 0, // BteqzT8CmpX16 = 255
8031 : Feature_InMips16Mode | 0, // BteqzT8CmpiX16 = 256
8032 : Feature_InMips16Mode | 0, // BteqzT8SltX16 = 257
8033 : Feature_InMips16Mode | 0, // BteqzT8SltiX16 = 258
8034 : Feature_InMips16Mode | 0, // BteqzT8SltiuX16 = 259
8035 : Feature_InMips16Mode | 0, // BteqzT8SltuX16 = 260
8036 : Feature_InMips16Mode | 0, // BtnezT8CmpX16 = 261
8037 : Feature_InMips16Mode | 0, // BtnezT8CmpiX16 = 262
8038 : Feature_InMips16Mode | 0, // BtnezT8SltX16 = 263
8039 : Feature_InMips16Mode | 0, // BtnezT8SltiX16 = 264
8040 : Feature_InMips16Mode | 0, // BtnezT8SltiuX16 = 265
8041 : Feature_InMips16Mode | 0, // BtnezT8SltuX16 = 266
8042 : Feature_NotInMips16Mode | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // BuildPairF64 = 267
8043 : Feature_NotInMips16Mode | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // BuildPairF64_64 = 268
8044 : Feature_HasMT | 0, // CFTC1 = 269
8045 : Feature_InMips16Mode | 0, // CONSTPOOL_ENTRY = 270
8046 : Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_FD_PSEUDO = 271
8047 : Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_FW_PSEUDO = 272
8048 : Feature_HasMT | 0, // CTTC1 = 273
8049 : Feature_InMips16Mode | 0, // Constant32 = 274
8050 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULImmMacro = 275
8051 : Feature_HasMips3 | Feature_NotMips64r6 | Feature_NotCnMips | 0, // DMULMacro = 276
8052 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULOMacro = 277
8053 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULOUMacro = 278
8054 : Feature_HasStdEnc | Feature_HasMips64 | 0, // DROL = 279
8055 : Feature_HasStdEnc | Feature_HasMips64 | 0, // DROLImm = 280
8056 : Feature_HasStdEnc | Feature_HasMips64 | 0, // DROR = 281
8057 : Feature_HasStdEnc | Feature_HasMips64 | 0, // DRORImm = 282
8058 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDivIMacro = 283
8059 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDivMacro = 284
8060 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSRemIMacro = 285
8061 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSRemMacro = 286
8062 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDivIMacro = 287
8063 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDivMacro = 288
8064 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DURemIMacro = 289
8065 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DURemMacro = 290
8066 : Feature_NotInMips16Mode | 0, // ERet = 291
8067 : Feature_NotInMips16Mode | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // ExtractElementF64 = 292
8068 : Feature_NotInMips16Mode | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // ExtractElementF64_64 = 293
8069 : Feature_HasStdEnc | Feature_HasMSA | 0, // FABS_D = 294
8070 : Feature_HasStdEnc | Feature_HasMSA | 0, // FABS_W = 295
8071 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_D_1_PSEUDO = 296
8072 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_W_1_PSEUDO = 297
8073 : Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_FD_PSEUDO = 298
8074 : Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_FW_PSEUDO = 299
8075 : Feature_InMips16Mode | 0, // GotPrologue16 = 300
8076 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B_VIDX64_PSEUDO = 301
8077 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B_VIDX_PSEUDO = 302
8078 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_D_VIDX64_PSEUDO = 303
8079 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_D_VIDX_PSEUDO = 304
8080 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_PSEUDO = 305
8081 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_VIDX64_PSEUDO = 306
8082 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_VIDX_PSEUDO = 307
8083 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_PSEUDO = 308
8084 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_VIDX64_PSEUDO = 309
8085 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_VIDX_PSEUDO = 310
8086 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H_VIDX64_PSEUDO = 311
8087 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H_VIDX_PSEUDO = 312
8088 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W_VIDX64_PSEUDO = 313
8089 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W_VIDX_PSEUDO = 314
8090 : Feature_NotInMips16Mode | Feature_NoIndirectJumpGuards | 0, // JALR64Pseudo = 315
8091 : Feature_NotInMips16Mode | Feature_UseIndirectJumpsHazard | 0, // JALRHB64Pseudo = 316
8092 : Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // JALRHBPseudo = 317
8093 : Feature_HasStdEnc | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // JALRPseudo = 318
8094 : 0, // JalOneReg = 319
8095 : 0, // JalTwoReg = 320
8096 : Feature_HasStdEnc | Feature_NotMips3 | 0, // LDMacro = 321
8097 : Feature_HasMSA | 0, // LD_F16 = 322
8098 : Feature_NotInMips16Mode | 0, // LOAD_ACC128 = 323
8099 : Feature_NotInMips16Mode | 0, // LOAD_ACC64 = 324
8100 : Feature_NotInMips16Mode | 0, // LOAD_ACC64DSP = 325
8101 : Feature_NotInMips16Mode | 0, // LOAD_CCOND_DSP = 326
8102 : Feature_NotInMips16Mode | 0, // LONG_BRANCH_ADDiu = 327
8103 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LONG_BRANCH_DADDiu = 328
8104 : Feature_NotInMips16Mode | 0, // LONG_BRANCH_LUi = 329
8105 : Feature_InMicroMips | 0, // LWM_MM = 330
8106 : 0, // LoadAddrImm32 = 331
8107 : 0, // LoadAddrImm64 = 332
8108 : 0, // LoadAddrReg32 = 333
8109 : 0, // LoadAddrReg64 = 334
8110 : 0, // LoadImm32 = 335
8111 : 0, // LoadImm64 = 336
8112 : Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // LoadImmDoubleFGR = 337
8113 : Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // LoadImmDoubleFGR_32 = 338
8114 : 0, // LoadImmDoubleGPR = 339
8115 : Feature_IsNotSoftFloat | 0, // LoadImmSingleFGR = 340
8116 : 0, // LoadImmSingleGPR = 341
8117 : Feature_InMips16Mode | 0, // LwConstant32 = 342
8118 : Feature_HasMT | 0, // MFTACX = 343
8119 : Feature_HasMT | 0, // MFTC0 = 344
8120 : Feature_HasMT | 0, // MFTC1 = 345
8121 : Feature_HasMT | 0, // MFTDSP = 346
8122 : Feature_HasMT | 0, // MFTGPR = 347
8123 : Feature_HasMT | 0, // MFTHC1 = 348
8124 : Feature_HasMT | 0, // MFTHI = 349
8125 : Feature_HasMT | 0, // MFTLO = 350
8126 : 0, // MIPSeh_return32 = 351
8127 : 0, // MIPSeh_return64 = 352
8128 : Feature_HasMSA | 0, // MSA_FP_EXTEND_D_PSEUDO = 353
8129 : Feature_HasMSA | 0, // MSA_FP_EXTEND_W_PSEUDO = 354
8130 : Feature_HasMSA | 0, // MSA_FP_ROUND_D_PSEUDO = 355
8131 : Feature_HasMSA | 0, // MSA_FP_ROUND_W_PSEUDO = 356
8132 : Feature_HasMT | 0, // MTTACX = 357
8133 : Feature_HasMT | 0, // MTTC0 = 358
8134 : Feature_HasMT | 0, // MTTC1 = 359
8135 : Feature_HasMT | 0, // MTTDSP = 360
8136 : Feature_HasMT | 0, // MTTGPR = 361
8137 : Feature_HasMT | 0, // MTTHC1 = 362
8138 : Feature_HasMT | 0, // MTTHI = 363
8139 : Feature_HasMT | 0, // MTTLO = 364
8140 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULImmMacro = 365
8141 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULOMacro = 366
8142 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULOUMacro = 367
8143 : Feature_InMips16Mode | 0, // MultRxRy16 = 368
8144 : Feature_InMips16Mode | 0, // MultRxRyRz16 = 369
8145 : Feature_InMips16Mode | 0, // MultuRxRy16 = 370
8146 : Feature_InMips16Mode | 0, // MultuRxRyRz16 = 371
8147 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // NOP = 372
8148 : Feature_IsGP32bit | 0, // NORImm = 373
8149 : Feature_IsGP64bit | 0, // NORImm64 = 374
8150 : Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_D_PSEUDO = 375
8151 : Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_H_PSEUDO = 376
8152 : Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_W_PSEUDO = 377
8153 : Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_D_PSEUDO = 378
8154 : Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_H_PSEUDO = 379
8155 : Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_W_PSEUDO = 380
8156 : Feature_HasDSP | 0, // PseudoCMPU_EQ_QB = 381
8157 : Feature_HasDSP | 0, // PseudoCMPU_LE_QB = 382
8158 : Feature_HasDSP | 0, // PseudoCMPU_LT_QB = 383
8159 : Feature_HasDSP | 0, // PseudoCMP_EQ_PH = 384
8160 : Feature_HasDSP | 0, // PseudoCMP_LE_PH = 385
8161 : Feature_HasDSP | 0, // PseudoCMP_LT_PH = 386
8162 : Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D32_W = 387
8163 : Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D64_L = 388
8164 : Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D64_W = 389
8165 : Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_S_L = 390
8166 : Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_S_W = 391
8167 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDMULT = 392
8168 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDMULTu = 393
8169 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDSDIV = 394
8170 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDUDIV = 395
8171 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch = 396
8172 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch64 = 397
8173 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch64R6 = 398
8174 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranchR6 = 399
8175 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoIndirectBranch_MM = 400
8176 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // PseudoIndirectBranch_MMR6 = 401
8177 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndirectHazardBranch = 402
8178 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndirectHazardBranch64 = 403
8179 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndrectHazardBranch64R6 = 404
8180 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndrectHazardBranchR6 = 405
8181 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMADD = 406
8182 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMADDU = 407
8183 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMADDU_MM = 408
8184 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMADD_MM = 409
8185 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFHI = 410
8186 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFHI64 = 411
8187 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMFHI_MM = 412
8188 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFLO = 413
8189 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFLO64 = 414
8190 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMFLO_MM = 415
8191 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMSUB = 416
8192 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMSUBU = 417
8193 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMSUBU_MM = 418
8194 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMSUB_MM = 419
8195 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMTLOHI = 420
8196 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMTLOHI64 = 421
8197 : Feature_NotInMips16Mode | 0, // PseudoMTLOHI_DSP = 422
8198 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMTLOHI_MM = 423
8199 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMULT = 424
8200 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMULT_MM = 425
8201 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMULTu = 426
8202 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoMULTu_MM = 427
8203 : Feature_HasDSP | 0, // PseudoPICK_PH = 428
8204 : Feature_HasDSP | 0, // PseudoPICK_QB = 429
8205 : 0, // PseudoReturn = 430
8206 : 0, // PseudoReturn64 = 431
8207 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PseudoSDIV = 432
8208 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_D32 = 433
8209 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_D64 = 434
8210 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_I = 435
8211 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_I64 = 436
8212 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_S = 437
8213 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_D32 = 438
8214 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_D64 = 439
8215 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_I = 440
8216 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_I64 = 441
8217 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_S = 442
8218 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECT_D32 = 443
8219 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECT_D64 = 444
8220 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_I = 445
8221 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_I64 = 446
8222 : Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_S = 447
8223 : Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // PseudoTRUNC_W_D = 448
8224 : Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // PseudoTRUNC_W_D32 = 449
8225 : 0, // PseudoTRUNC_W_S = 450
8226 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PseudoUDIV = 451
8227 : 0, // ROL = 452
8228 : 0, // ROLImm = 453
8229 : 0, // ROR = 454
8230 : 0, // RORImm = 455
8231 : Feature_NotInMips16Mode | 0, // RetRA = 456
8232 : Feature_InMips16Mode | 0, // RetRA16 = 457
8233 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDIV_MM_Pseudo = 458
8234 : Feature_HasStdEnc | Feature_NotMips3 | 0, // SDMacro = 459
8235 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDivIMacro = 460
8236 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDivMacro = 461
8237 : Feature_NotCnMips | 0, // SEQIMacro = 462
8238 : Feature_NotCnMips | 0, // SEQMacro = 463
8239 : Feature_IsGP64bit | 0, // SLTImm64 = 464
8240 : Feature_IsGP64bit | 0, // SLTUImm64 = 465
8241 : 0, // SNZ_B_PSEUDO = 466
8242 : 0, // SNZ_D_PSEUDO = 467
8243 : 0, // SNZ_H_PSEUDO = 468
8244 : 0, // SNZ_V_PSEUDO = 469
8245 : 0, // SNZ_W_PSEUDO = 470
8246 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SRemIMacro = 471
8247 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SRemMacro = 472
8248 : Feature_NotInMips16Mode | 0, // STORE_ACC128 = 473
8249 : Feature_NotInMips16Mode | 0, // STORE_ACC64 = 474
8250 : Feature_NotInMips16Mode | 0, // STORE_ACC64DSP = 475
8251 : Feature_NotInMips16Mode | 0, // STORE_CCOND_DSP = 476
8252 : Feature_HasMSA | 0, // ST_F16 = 477
8253 : Feature_InMicroMips | 0, // SWM_MM = 478
8254 : 0, // SZ_B_PSEUDO = 479
8255 : 0, // SZ_D_PSEUDO = 480
8256 : 0, // SZ_H_PSEUDO = 481
8257 : 0, // SZ_V_PSEUDO = 482
8258 : 0, // SZ_W_PSEUDO = 483
8259 : Feature_InMips16Mode | 0, // SelBeqZ = 484
8260 : Feature_InMips16Mode | 0, // SelBneZ = 485
8261 : Feature_InMips16Mode | 0, // SelTBteqZCmp = 486
8262 : Feature_InMips16Mode | 0, // SelTBteqZCmpi = 487
8263 : Feature_InMips16Mode | 0, // SelTBteqZSlt = 488
8264 : Feature_InMips16Mode | 0, // SelTBteqZSlti = 489
8265 : Feature_InMips16Mode | 0, // SelTBteqZSltiu = 490
8266 : Feature_InMips16Mode | 0, // SelTBteqZSltu = 491
8267 : Feature_InMips16Mode | 0, // SelTBtneZCmp = 492
8268 : Feature_InMips16Mode | 0, // SelTBtneZCmpi = 493
8269 : Feature_InMips16Mode | 0, // SelTBtneZSlt = 494
8270 : Feature_InMips16Mode | 0, // SelTBtneZSlti = 495
8271 : Feature_InMips16Mode | 0, // SelTBtneZSltiu = 496
8272 : Feature_InMips16Mode | 0, // SelTBtneZSltu = 497
8273 : Feature_InMips16Mode | 0, // SltCCRxRy16 = 498
8274 : Feature_InMips16Mode | 0, // SltiCCRxImmX16 = 499
8275 : Feature_InMips16Mode | 0, // SltiuCCRxImmX16 = 500
8276 : Feature_InMips16Mode | 0, // SltuCCRxRy16 = 501
8277 : Feature_InMips16Mode | 0, // SltuRxRyRz16 = 502
8278 : Feature_HasStdEnc | Feature_NotInMips16Mode | Feature_NotInMicroMips | 0, // TAILCALL = 503
8279 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALL64R6REG = 504
8280 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLHB64R6REG = 505
8281 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLHBR6REG = 506
8282 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLR6REG = 507
8283 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLREG = 508
8284 : Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLREG64 = 509
8285 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLREGHB = 510
8286 : Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLREGHB64 = 511
8287 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // TAILCALLREG_MM = 512
8288 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // TAILCALLREG_MMR6 = 513
8289 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // TAILCALL_MM = 514
8290 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // TAILCALL_MMR6 = 515
8291 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TRAP = 516
8292 : Feature_InMicroMips | 0, // TRAP_MM = 517
8293 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDIV_MM_Pseudo = 518
8294 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDivIMacro = 519
8295 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDivMacro = 520
8296 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // URemIMacro = 521
8297 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // URemMacro = 522
8298 : 0, // Ulh = 523
8299 : 0, // Ulhu = 524
8300 : 0, // Ulw = 525
8301 : 0, // Ush = 526
8302 : 0, // Usw = 527
8303 : Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_D_PSEUDO = 528
8304 : Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_H_PSEUDO = 529
8305 : Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_W_PSEUDO = 530
8306 : Feature_HasDSP | 0, // ABSQ_S_PH = 531
8307 : Feature_InMicroMips | Feature_HasDSP | 0, // ABSQ_S_PH_MM = 532
8308 : Feature_HasDSPR2 | 0, // ABSQ_S_QB = 533
8309 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ABSQ_S_QB_MMR2 = 534
8310 : Feature_HasDSP | 0, // ABSQ_S_W = 535
8311 : Feature_InMicroMips | Feature_HasDSP | 0, // ABSQ_S_W_MM = 536
8312 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADD = 537
8313 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ADDIUPC = 538
8314 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDIUPC_MM = 539
8315 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDIUPC_MMR6 = 540
8316 : Feature_InMicroMips | 0, // ADDIUR1SP_MM = 541
8317 : Feature_InMicroMips | 0, // ADDIUR2_MM = 542
8318 : Feature_InMicroMips | 0, // ADDIUS5_MM = 543
8319 : Feature_InMicroMips | 0, // ADDIUSP_MM = 544
8320 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDIU_MMR6 = 545
8321 : Feature_HasDSPR2 | 0, // ADDQH_PH = 546
8322 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_PH_MMR2 = 547
8323 : Feature_HasDSPR2 | 0, // ADDQH_R_PH = 548
8324 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_R_PH_MMR2 = 549
8325 : Feature_HasDSPR2 | 0, // ADDQH_R_W = 550
8326 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_R_W_MMR2 = 551
8327 : Feature_HasDSPR2 | 0, // ADDQH_W = 552
8328 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_W_MMR2 = 553
8329 : Feature_HasDSP | 0, // ADDQ_PH = 554
8330 : Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_PH_MM = 555
8331 : Feature_HasDSP | 0, // ADDQ_S_PH = 556
8332 : Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_S_PH_MM = 557
8333 : Feature_HasDSP | 0, // ADDQ_S_W = 558
8334 : Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_S_W_MM = 559
8335 : Feature_HasDSP | 0, // ADDSC = 560
8336 : Feature_InMicroMips | Feature_HasDSP | 0, // ADDSC_MM = 561
8337 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_B = 562
8338 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_D = 563
8339 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_H = 564
8340 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_W = 565
8341 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_B = 566
8342 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_D = 567
8343 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_H = 568
8344 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_W = 569
8345 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_B = 570
8346 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_D = 571
8347 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_H = 572
8348 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_W = 573
8349 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDU16_MM = 574
8350 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDU16_MMR6 = 575
8351 : Feature_HasDSPR2 | 0, // ADDUH_QB = 576
8352 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDUH_QB_MMR2 = 577
8353 : Feature_HasDSPR2 | 0, // ADDUH_R_QB = 578
8354 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDUH_R_QB_MMR2 = 579
8355 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDU_MMR6 = 580
8356 : Feature_HasDSPR2 | 0, // ADDU_PH = 581
8357 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDU_PH_MMR2 = 582
8358 : Feature_HasDSP | 0, // ADDU_QB = 583
8359 : Feature_InMicroMips | Feature_HasDSP | 0, // ADDU_QB_MM = 584
8360 : Feature_HasDSPR2 | 0, // ADDU_S_PH = 585
8361 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDU_S_PH_MMR2 = 586
8362 : Feature_HasDSP | 0, // ADDU_S_QB = 587
8363 : Feature_InMicroMips | Feature_HasDSP | 0, // ADDU_S_QB_MM = 588
8364 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_B = 589
8365 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_D = 590
8366 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_H = 591
8367 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_W = 592
8368 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_B = 593
8369 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_D = 594
8370 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_H = 595
8371 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_W = 596
8372 : Feature_HasDSP | 0, // ADDWC = 597
8373 : Feature_InMicroMips | Feature_HasDSP | 0, // ADDWC_MM = 598
8374 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_B = 599
8375 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_D = 600
8376 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_H = 601
8377 : Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_W = 602
8378 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADD_MM = 603
8379 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADD_MMR6 = 604
8380 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // ADDi = 605
8381 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDi_MM = 606
8382 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADDiu = 607
8383 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDiu_MM = 608
8384 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADDu = 609
8385 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDu_MM = 610
8386 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ALIGN = 611
8387 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ALIGN_MMR6 = 612
8388 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ALUIPC = 613
8389 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ALUIPC_MMR6 = 614
8390 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // AND = 615
8391 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // AND16_MM = 616
8392 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // AND16_MMR6 = 617
8393 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // AND64 = 618
8394 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ANDI16_MM = 619
8395 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ANDI16_MMR6 = 620
8396 : Feature_HasStdEnc | Feature_HasMSA | 0, // ANDI_B = 621
8397 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ANDI_MMR6 = 622
8398 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // AND_MM = 623
8399 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // AND_MMR6 = 624
8400 : Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V = 625
8401 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ANDi = 626
8402 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // ANDi64 = 627
8403 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ANDi_MM = 628
8404 : Feature_HasDSPR2 | 0, // APPEND = 629
8405 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // APPEND_MMR2 = 630
8406 : Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_B = 631
8407 : Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_D = 632
8408 : Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_H = 633
8409 : Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_W = 634
8410 : Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_B = 635
8411 : Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_D = 636
8412 : Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_H = 637
8413 : Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_W = 638
8414 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // AUI = 639
8415 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // AUIPC = 640
8416 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // AUIPC_MMR6 = 641
8417 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // AUI_MMR6 = 642
8418 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_B = 643
8419 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_D = 644
8420 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_H = 645
8421 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_W = 646
8422 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_B = 647
8423 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_D = 648
8424 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_H = 649
8425 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_W = 650
8426 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_B = 651
8427 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_D = 652
8428 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_H = 653
8429 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_W = 654
8430 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_B = 655
8431 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_D = 656
8432 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_H = 657
8433 : Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_W = 658
8434 : Feature_InMips16Mode | 0, // AddiuRxImmX16 = 659
8435 : Feature_InMips16Mode | 0, // AddiuRxPcImmX16 = 660
8436 : Feature_InMips16Mode | 0, // AddiuRxRxImm16 = 661
8437 : Feature_InMips16Mode | 0, // AddiuRxRxImmX16 = 662
8438 : Feature_InMips16Mode | 0, // AddiuRxRyOffMemX16 = 663
8439 : Feature_InMips16Mode | 0, // AddiuSpImm16 = 664
8440 : Feature_InMips16Mode | 0, // AddiuSpImmX16 = 665
8441 : Feature_InMips16Mode | 0, // AdduRxRyRz16 = 666
8442 : Feature_InMips16Mode | 0, // AndRxRxRy16 = 667
8443 : Feature_InMicroMips | 0, // B16_MM = 668
8444 : Feature_HasCnMips | 0, // BADDu = 669
8445 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BAL = 670
8446 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BALC = 671
8447 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BALC_MMR6 = 672
8448 : Feature_HasDSPR2 | 0, // BALIGN = 673
8449 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // BALIGN_MMR2 = 674
8450 : Feature_HasCnMips | 0, // BBIT0 = 675
8451 : Feature_HasCnMips | 0, // BBIT032 = 676
8452 : Feature_HasCnMips | 0, // BBIT1 = 677
8453 : Feature_HasCnMips | 0, // BBIT132 = 678
8454 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC = 679
8455 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC16_MMR6 = 680
8456 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1EQZ = 681
8457 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // BC1EQZC_MMR6 = 682
8458 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1F = 683
8459 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1FL = 684
8460 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // BC1F_MM = 685
8461 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1NEZ = 686
8462 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // BC1NEZC_MMR6 = 687
8463 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1T = 688
8464 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1TL = 689
8465 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // BC1T_MM = 690
8466 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC2EQZ = 691
8467 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC2EQZC_MMR6 = 692
8468 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC2NEZ = 693
8469 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC2NEZC_MMR6 = 694
8470 : Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_B = 695
8471 : Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_D = 696
8472 : Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_H = 697
8473 : Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_W = 698
8474 : Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_B = 699
8475 : Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_D = 700
8476 : Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_H = 701
8477 : Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_W = 702
8478 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC_MMR6 = 703
8479 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BEQ = 704
8480 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BEQ64 = 705
8481 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQC = 706
8482 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BEQC64 = 707
8483 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQC_MMR6 = 708
8484 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BEQL = 709
8485 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQZ16_MM = 710
8486 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQZALC = 711
8487 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZALC_MMR6 = 712
8488 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQZC = 713
8489 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZC16_MMR6 = 714
8490 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BEQZC64 = 715
8491 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQZC_MM = 716
8492 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZC_MMR6 = 717
8493 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQ_MM = 718
8494 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEC = 719
8495 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEC64 = 720
8496 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEC_MMR6 = 721
8497 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEUC = 722
8498 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEUC64 = 723
8499 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEUC_MMR6 = 724
8500 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGEZ = 725
8501 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BGEZ64 = 726
8502 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZAL = 727
8503 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEZALC = 728
8504 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEZALC_MMR6 = 729
8505 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZALL = 730
8506 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZALS_MM = 731
8507 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZAL_MM = 732
8508 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEZC = 733
8509 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEZC64 = 734
8510 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEZC_MMR6 = 735
8511 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZL = 736
8512 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZ_MM = 737
8513 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGTZ = 738
8514 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BGTZ64 = 739
8515 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGTZALC = 740
8516 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGTZALC_MMR6 = 741
8517 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGTZC = 742
8518 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGTZC64 = 743
8519 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGTZC_MMR6 = 744
8520 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGTZL = 745
8521 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGTZ_MM = 746
8522 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_B = 747
8523 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_D = 748
8524 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_H = 749
8525 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_W = 750
8526 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_B = 751
8527 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_D = 752
8528 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_H = 753
8529 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_W = 754
8530 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_B = 755
8531 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_D = 756
8532 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_H = 757
8533 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_W = 758
8534 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_B = 759
8535 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_D = 760
8536 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_H = 761
8537 : Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_W = 762
8538 : Feature_HasDSP | 0, // BITREV = 763
8539 : Feature_InMicroMips | Feature_HasDSP | 0, // BITREV_MM = 764
8540 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BITSWAP = 765
8541 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BITSWAP_MMR6 = 766
8542 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLEZ = 767
8543 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BLEZ64 = 768
8544 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLEZALC = 769
8545 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLEZALC_MMR6 = 770
8546 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLEZC = 771
8547 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLEZC64 = 772
8548 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLEZC_MMR6 = 773
8549 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLEZL = 774
8550 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLEZ_MM = 775
8551 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTC = 776
8552 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTC64 = 777
8553 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTC_MMR6 = 778
8554 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTUC = 779
8555 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTUC64 = 780
8556 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTUC_MMR6 = 781
8557 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLTZ = 782
8558 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BLTZ64 = 783
8559 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZAL = 784
8560 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTZALC = 785
8561 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTZALC_MMR6 = 786
8562 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZALL = 787
8563 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZALS_MM = 788
8564 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZAL_MM = 789
8565 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTZC = 790
8566 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTZC64 = 791
8567 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTZC_MMR6 = 792
8568 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZL = 793
8569 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZ_MM = 794
8570 : Feature_HasStdEnc | Feature_HasMSA | 0, // BMNZI_B = 795
8571 : Feature_HasStdEnc | Feature_HasMSA | 0, // BMNZ_V = 796
8572 : Feature_HasStdEnc | Feature_HasMSA | 0, // BMZI_B = 797
8573 : Feature_HasStdEnc | Feature_HasMSA | 0, // BMZ_V = 798
8574 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BNE = 799
8575 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BNE64 = 800
8576 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEC = 801
8577 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BNEC64 = 802
8578 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEC_MMR6 = 803
8579 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_B = 804
8580 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_D = 805
8581 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_H = 806
8582 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_W = 807
8583 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_B = 808
8584 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_D = 809
8585 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_H = 810
8586 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_W = 811
8587 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BNEL = 812
8588 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNEZ16_MM = 813
8589 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEZALC = 814
8590 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZALC_MMR6 = 815
8591 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEZC = 816
8592 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZC16_MMR6 = 817
8593 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BNEZC64 = 818
8594 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNEZC_MM = 819
8595 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZC_MMR6 = 820
8596 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNE_MM = 821
8597 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNVC = 822
8598 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNVC_MMR6 = 823
8599 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_B = 824
8600 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_D = 825
8601 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_H = 826
8602 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_V = 827
8603 : Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_W = 828
8604 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BOVC = 829
8605 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BOVC_MMR6 = 830
8606 : Feature_HasDSP | Feature_NotInMicroMips | 0, // BPOSGE32 = 831
8607 : Feature_InMicroMips | Feature_HasDSPR3 | 0, // BPOSGE32C_MMR3 = 832
8608 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasDSP | 0, // BPOSGE32_MM = 833
8609 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BREAK = 834
8610 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // BREAK16_MM = 835
8611 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BREAK16_MMR6 = 836
8612 : Feature_InMicroMips | 0, // BREAK_MM = 837
8613 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // BREAK_MMR6 = 838
8614 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSELI_B = 839
8615 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_V = 840
8616 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_B = 841
8617 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_D = 842
8618 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_H = 843
8619 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_W = 844
8620 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_B = 845
8621 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_D = 846
8622 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_H = 847
8623 : Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_W = 848
8624 : Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_B = 849
8625 : Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_D = 850
8626 : Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_H = 851
8627 : Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_V = 852
8628 : Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_W = 853
8629 : Feature_InMips16Mode | 0, // BeqzRxImm16 = 854
8630 : Feature_InMips16Mode | 0, // BeqzRxImmX16 = 855
8631 : Feature_InMips16Mode | 0, // Bimm16 = 856
8632 : Feature_InMips16Mode | 0, // BimmX16 = 857
8633 : Feature_InMips16Mode | 0, // BnezRxImm16 = 858
8634 : Feature_InMips16Mode | 0, // BnezRxImmX16 = 859
8635 : Feature_InMips16Mode | 0, // Break16 = 860
8636 : Feature_InMips16Mode | 0, // Bteqz16 = 861
8637 : Feature_InMips16Mode | 0, // BteqzX16 = 862
8638 : Feature_InMips16Mode | 0, // Btnez16 = 863
8639 : Feature_InMips16Mode | 0, // BtnezX16 = 864
8640 : Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CACHE = 865
8641 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // CACHEE = 866
8642 : Feature_InMicroMips | Feature_HasEVA | 0, // CACHEE_MM = 867
8643 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // CACHE_MM = 868
8644 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // CACHE_MMR6 = 869
8645 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // CACHE_R6 = 870
8646 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_D64 = 871
8647 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_L_D_MMR6 = 872
8648 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_S = 873
8649 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_L_S_MMR6 = 874
8650 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_D32 = 875
8651 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_D64 = 876
8652 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_W_D_MMR6 = 877
8653 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CEIL_W_MM = 878
8654 : Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_S = 879
8655 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CEIL_W_S_MM = 880
8656 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_W_S_MMR6 = 881
8657 : Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_B = 882
8658 : Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_D = 883
8659 : Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_H = 884
8660 : Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_W = 885
8661 : Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_B = 886
8662 : Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_D = 887
8663 : Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_H = 888
8664 : Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_W = 889
8665 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CFC1 = 890
8666 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CFC1_MM = 891
8667 : Feature_InMicroMips | 0, // CFC2_MM = 892
8668 : Feature_HasStdEnc | Feature_HasMSA | 0, // CFCMSA = 893
8669 : Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS = 894
8670 : Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS32 = 895
8671 : Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS64_32 = 896
8672 : Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS_i32 = 897
8673 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CLASS_D = 898
8674 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLASS_D_MMR6 = 899
8675 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CLASS_S = 900
8676 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLASS_S_MMR6 = 901
8677 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_B = 902
8678 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_D = 903
8679 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_H = 904
8680 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_W = 905
8681 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_B = 906
8682 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_D = 907
8683 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_H = 908
8684 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_W = 909
8685 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_B = 910
8686 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_D = 911
8687 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_H = 912
8688 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_W = 913
8689 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_B = 914
8690 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_D = 915
8691 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_H = 916
8692 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_W = 917
8693 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CLO = 918
8694 : Feature_InMicroMips | 0, // CLO_MM = 919
8695 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLO_MMR6 = 920
8696 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CLO_R6 = 921
8697 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_B = 922
8698 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_D = 923
8699 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_H = 924
8700 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_W = 925
8701 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_B = 926
8702 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_D = 927
8703 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_H = 928
8704 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_W = 929
8705 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_B = 930
8706 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_D = 931
8707 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_H = 932
8708 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_W = 933
8709 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_B = 934
8710 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_D = 935
8711 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_H = 936
8712 : Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_W = 937
8713 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CLZ = 938
8714 : Feature_InMicroMips | 0, // CLZ_MM = 939
8715 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLZ_MMR6 = 940
8716 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CLZ_R6 = 941
8717 : Feature_HasDSPR2 | 0, // CMPGDU_EQ_QB = 942
8718 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_EQ_QB_MMR2 = 943
8719 : Feature_HasDSPR2 | 0, // CMPGDU_LE_QB = 944
8720 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_LE_QB_MMR2 = 945
8721 : Feature_HasDSPR2 | 0, // CMPGDU_LT_QB = 946
8722 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_LT_QB_MMR2 = 947
8723 : Feature_HasDSP | 0, // CMPGU_EQ_QB = 948
8724 : Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_EQ_QB_MM = 949
8725 : Feature_HasDSP | 0, // CMPGU_LE_QB = 950
8726 : Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_LE_QB_MM = 951
8727 : Feature_HasDSP | 0, // CMPGU_LT_QB = 952
8728 : Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_LT_QB_MM = 953
8729 : Feature_HasDSP | 0, // CMPU_EQ_QB = 954
8730 : Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_EQ_QB_MM = 955
8731 : Feature_HasDSP | 0, // CMPU_LE_QB = 956
8732 : Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_LE_QB_MM = 957
8733 : Feature_HasDSP | 0, // CMPU_LT_QB = 958
8734 : Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_LT_QB_MM = 959
8735 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_AF_D_MMR6 = 960
8736 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_AF_S_MMR6 = 961
8737 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_EQ_D = 962
8738 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_EQ_D_MMR6 = 963
8739 : Feature_HasDSP | 0, // CMP_EQ_PH = 964
8740 : Feature_InMicroMips | Feature_HasDSP | 0, // CMP_EQ_PH_MM = 965
8741 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_EQ_S = 966
8742 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_EQ_S_MMR6 = 967
8743 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_F_D = 968
8744 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_F_S = 969
8745 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LE_D = 970
8746 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LE_D_MMR6 = 971
8747 : Feature_HasDSP | 0, // CMP_LE_PH = 972
8748 : Feature_InMicroMips | Feature_HasDSP | 0, // CMP_LE_PH_MM = 973
8749 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LE_S = 974
8750 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LE_S_MMR6 = 975
8751 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LT_D = 976
8752 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LT_D_MMR6 = 977
8753 : Feature_HasDSP | 0, // CMP_LT_PH = 978
8754 : Feature_InMicroMips | Feature_HasDSP | 0, // CMP_LT_PH_MM = 979
8755 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LT_S = 980
8756 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LT_S_MMR6 = 981
8757 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SAF_D = 982
8758 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SAF_D_MMR6 = 983
8759 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SAF_S = 984
8760 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SAF_S_MMR6 = 985
8761 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SEQ_D = 986
8762 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SEQ_D_MMR6 = 987
8763 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SEQ_S = 988
8764 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SEQ_S_MMR6 = 989
8765 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLE_D = 990
8766 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLE_D_MMR6 = 991
8767 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLE_S = 992
8768 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLE_S_MMR6 = 993
8769 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLT_D = 994
8770 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLT_D_MMR6 = 995
8771 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLT_S = 996
8772 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLT_S_MMR6 = 997
8773 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUEQ_D = 998
8774 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUEQ_D_MMR6 = 999
8775 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUEQ_S = 1000
8776 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUEQ_S_MMR6 = 1001
8777 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULE_D = 1002
8778 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULE_D_MMR6 = 1003
8779 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULE_S = 1004
8780 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULE_S_MMR6 = 1005
8781 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULT_D = 1006
8782 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULT_D_MMR6 = 1007
8783 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULT_S = 1008
8784 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULT_S_MMR6 = 1009
8785 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUN_D = 1010
8786 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUN_D_MMR6 = 1011
8787 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUN_S = 1012
8788 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUN_S_MMR6 = 1013
8789 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UEQ_D = 1014
8790 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UEQ_D_MMR6 = 1015
8791 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UEQ_S = 1016
8792 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UEQ_S_MMR6 = 1017
8793 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULE_D = 1018
8794 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULE_D_MMR6 = 1019
8795 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULE_S = 1020
8796 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULE_S_MMR6 = 1021
8797 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULT_D = 1022
8798 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULT_D_MMR6 = 1023
8799 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULT_S = 1024
8800 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULT_S_MMR6 = 1025
8801 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UN_D = 1026
8802 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UN_D_MMR6 = 1027
8803 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UN_S = 1028
8804 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UN_S_MMR6 = 1029
8805 : Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_B = 1030
8806 : Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // COPY_S_D = 1031
8807 : Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_H = 1032
8808 : Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_W = 1033
8809 : Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_U_B = 1034
8810 : Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_U_H = 1035
8811 : Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // COPY_U_W = 1036
8812 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32B = 1037
8813 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CB = 1038
8814 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CD = 1039
8815 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CH = 1040
8816 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CW = 1041
8817 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32D = 1042
8818 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32H = 1043
8819 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32W = 1044
8820 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CTC1 = 1045
8821 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CTC1_MM = 1046
8822 : Feature_InMicroMips | 0, // CTC2_MM = 1047
8823 : Feature_HasStdEnc | Feature_HasMSA | 0, // CTCMSA = 1048
8824 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D32_S = 1049
8825 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D32_S_MM = 1050
8826 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D32_W = 1051
8827 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D32_W_MM = 1052
8828 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_L = 1053
8829 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_S = 1054
8830 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D64_S_MM = 1055
8831 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_W = 1056
8832 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D64_W_MM = 1057
8833 : Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_D_L_MMR6 = 1058
8834 : Feature_HasStdEnc | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_L_D64 = 1059
8835 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_L_D64_MM = 1060
8836 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_L_D_MMR6 = 1061
8837 : Feature_HasStdEnc | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_L_S = 1062
8838 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_L_S_MM = 1063
8839 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_L_S_MMR6 = 1064
8840 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_PS_S64 = 1065
8841 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_D32 = 1066
8842 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_S_D32_MM = 1067
8843 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_D64 = 1068
8844 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_S_D64_MM = 1069
8845 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_L = 1070
8846 : Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_S_L_MMR6 = 1071
8847 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_PL64 = 1072
8848 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_PU64 = 1073
8849 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_W = 1074
8850 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CVT_S_W_MM = 1075
8851 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_S_W_MMR6 = 1076
8852 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_D32 = 1077
8853 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_W_D32_MM = 1078
8854 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_D64 = 1079
8855 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_W_D64_MM = 1080
8856 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_S = 1081
8857 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CVT_W_S_MM = 1082
8858 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_W_S_MMR6 = 1083
8859 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_D32 = 1084
8860 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_D32_MM = 1085
8861 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_D64 = 1086
8862 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_D64_MM = 1087
8863 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_S = 1088
8864 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_S_MM = 1089
8865 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_D32 = 1090
8866 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_D32_MM = 1091
8867 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_D64 = 1092
8868 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_D64_MM = 1093
8869 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_S = 1094
8870 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_S_MM = 1095
8871 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_D32 = 1096
8872 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_D32_MM = 1097
8873 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_D64 = 1098
8874 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_D64_MM = 1099
8875 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_S = 1100
8876 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_S_MM = 1101
8877 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_D32 = 1102
8878 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_D32_MM = 1103
8879 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_D64 = 1104
8880 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_D64_MM = 1105
8881 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_S = 1106
8882 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_S_MM = 1107
8883 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_D32 = 1108
8884 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_D32_MM = 1109
8885 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_D64 = 1110
8886 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_D64_MM = 1111
8887 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_S = 1112
8888 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_S_MM = 1113
8889 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_D32 = 1114
8890 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_D32_MM = 1115
8891 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_D64 = 1116
8892 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_D64_MM = 1117
8893 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_S = 1118
8894 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_S_MM = 1119
8895 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_D32 = 1120
8896 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_D32_MM = 1121
8897 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_D64 = 1122
8898 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_D64_MM = 1123
8899 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_S = 1124
8900 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_S_MM = 1125
8901 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_D32 = 1126
8902 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_D32_MM = 1127
8903 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_D64 = 1128
8904 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_D64_MM = 1129
8905 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_S = 1130
8906 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_S_MM = 1131
8907 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_D32 = 1132
8908 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_D32_MM = 1133
8909 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_D64 = 1134
8910 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_D64_MM = 1135
8911 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_S = 1136
8912 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_S_MM = 1137
8913 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_D32 = 1138
8914 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_D32_MM = 1139
8915 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_D64 = 1140
8916 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_D64_MM = 1141
8917 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_S = 1142
8918 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_S_MM = 1143
8919 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_D32 = 1144
8920 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_D32_MM = 1145
8921 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_D64 = 1146
8922 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_D64_MM = 1147
8923 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_S = 1148
8924 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_S_MM = 1149
8925 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_D32 = 1150
8926 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_D32_MM = 1151
8927 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_D64 = 1152
8928 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_D64_MM = 1153
8929 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_S = 1154
8930 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_S_MM = 1155
8931 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_D32 = 1156
8932 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_D32_MM = 1157
8933 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_D64 = 1158
8934 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_D64_MM = 1159
8935 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_S = 1160
8936 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_S_MM = 1161
8937 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_D32 = 1162
8938 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_D32_MM = 1163
8939 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_D64 = 1164
8940 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_D64_MM = 1165
8941 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_S = 1166
8942 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_S_MM = 1167
8943 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_D32 = 1168
8944 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_D32_MM = 1169
8945 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_D64 = 1170
8946 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_D64_MM = 1171
8947 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_S = 1172
8948 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_S_MM = 1173
8949 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_D32 = 1174
8950 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_D32_MM = 1175
8951 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_D64 = 1176
8952 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_D64_MM = 1177
8953 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_S = 1178
8954 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_S_MM = 1179
8955 : Feature_InMips16Mode | 0, // CmpRxRy16 = 1180
8956 : Feature_InMips16Mode | 0, // CmpiRxImm16 = 1181
8957 : Feature_InMips16Mode | 0, // CmpiRxImmX16 = 1182
8958 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADD = 1183
8959 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DADDi = 1184
8960 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADDiu = 1185
8961 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADDu = 1186
8962 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DAHI = 1187
8963 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DALIGN = 1188
8964 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DATI = 1189
8965 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DAUI = 1190
8966 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DBITSWAP = 1191
8967 : Feature_HasStdEnc | Feature_HasMips64 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DCLO = 1192
8968 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLO_R6 = 1193
8969 : Feature_HasStdEnc | Feature_HasMips64 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DCLZ = 1194
8970 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLZ_R6 = 1195
8971 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DDIV = 1196
8972 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DDIVU = 1197
8973 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotInMicroMips | 0, // DERET = 1198
8974 : Feature_InMicroMips | 0, // DERET_MM = 1199
8975 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // DERET_MMR6 = 1200
8976 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXT = 1201
8977 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXT64_32 = 1202
8978 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXTM = 1203
8979 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXTU = 1204
8980 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // DI = 1205
8981 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINS = 1206
8982 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINSM = 1207
8983 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINSU = 1208
8984 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // DIV = 1209
8985 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // DIVU = 1210
8986 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // DIVU_MMR6 = 1211
8987 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // DIV_MMR6 = 1212
8988 : Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_B = 1213
8989 : Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_D = 1214
8990 : Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_H = 1215
8991 : Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_W = 1216
8992 : Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_B = 1217
8993 : Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_D = 1218
8994 : Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_H = 1219
8995 : Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_W = 1220
8996 : Feature_InMicroMips | 0, // DI_MM = 1221
8997 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // DI_MMR6 = 1222
8998 : Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // DLSA = 1223
8999 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DLSA_R6 = 1224
9000 : Feature_HasMips64 | 0, // DMFC0 = 1225
9001 : Feature_HasStdEnc | Feature_HasMips3 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // DMFC1 = 1226
9002 : Feature_HasMips64 | 0, // DMFC2 = 1227
9003 : Feature_HasCnMips | 0, // DMFC2_OCTEON = 1228
9004 : Feature_HasStdEnc | Feature_HasMips64r5 | Feature_HasVirt | 0, // DMFGC0 = 1229
9005 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMOD = 1230
9006 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMODU = 1231
9007 : Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // DMT = 1232
9008 : Feature_HasMips64 | 0, // DMTC0 = 1233
9009 : Feature_HasStdEnc | Feature_HasMips3 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // DMTC1 = 1234
9010 : Feature_HasMips64 | 0, // DMTC2 = 1235
9011 : Feature_HasCnMips | 0, // DMTC2_OCTEON = 1236
9012 : Feature_HasStdEnc | Feature_HasMips64r5 | Feature_HasVirt | 0, // DMTGC0 = 1237
9013 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUH = 1238
9014 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUHU = 1239
9015 : Feature_HasCnMips | 0, // DMUL = 1240
9016 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DMULT = 1241
9017 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DMULTu = 1242
9018 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMULU = 1243
9019 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUL_R6 = 1244
9020 : Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_D = 1245
9021 : Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_H = 1246
9022 : Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_W = 1247
9023 : Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_D = 1248
9024 : Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_H = 1249
9025 : Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_W = 1250
9026 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_D = 1251
9027 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_H = 1252
9028 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_W = 1253
9029 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_D = 1254
9030 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_H = 1255
9031 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_W = 1256
9032 : Feature_HasDSPR2 | 0, // DPAQX_SA_W_PH = 1257
9033 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAQX_SA_W_PH_MMR2 = 1258
9034 : Feature_HasDSPR2 | 0, // DPAQX_S_W_PH = 1259
9035 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAQX_S_W_PH_MMR2 = 1260
9036 : Feature_HasDSP | 0, // DPAQ_SA_L_W = 1261
9037 : Feature_InMicroMips | Feature_HasDSP | 0, // DPAQ_SA_L_W_MM = 1262
9038 : Feature_HasDSP | 0, // DPAQ_S_W_PH = 1263
9039 : Feature_InMicroMips | Feature_HasDSP | 0, // DPAQ_S_W_PH_MM = 1264
9040 : Feature_HasDSP | 0, // DPAU_H_QBL = 1265
9041 : Feature_InMicroMips | Feature_HasDSP | 0, // DPAU_H_QBL_MM = 1266
9042 : Feature_HasDSP | 0, // DPAU_H_QBR = 1267
9043 : Feature_InMicroMips | Feature_HasDSP | 0, // DPAU_H_QBR_MM = 1268
9044 : Feature_HasDSPR2 | 0, // DPAX_W_PH = 1269
9045 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAX_W_PH_MMR2 = 1270
9046 : Feature_HasDSPR2 | 0, // DPA_W_PH = 1271
9047 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPA_W_PH_MMR2 = 1272
9048 : Feature_HasCnMips | 0, // DPOP = 1273
9049 : Feature_HasDSPR2 | 0, // DPSQX_SA_W_PH = 1274
9050 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSQX_SA_W_PH_MMR2 = 1275
9051 : Feature_HasDSPR2 | 0, // DPSQX_S_W_PH = 1276
9052 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSQX_S_W_PH_MMR2 = 1277
9053 : Feature_HasDSP | 0, // DPSQ_SA_L_W = 1278
9054 : Feature_InMicroMips | Feature_HasDSP | 0, // DPSQ_SA_L_W_MM = 1279
9055 : Feature_HasDSP | 0, // DPSQ_S_W_PH = 1280
9056 : Feature_InMicroMips | Feature_HasDSP | 0, // DPSQ_S_W_PH_MM = 1281
9057 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_D = 1282
9058 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_H = 1283
9059 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_W = 1284
9060 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_D = 1285
9061 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_H = 1286
9062 : Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_W = 1287
9063 : Feature_HasDSP | 0, // DPSU_H_QBL = 1288
9064 : Feature_InMicroMips | Feature_HasDSP | 0, // DPSU_H_QBL_MM = 1289
9065 : Feature_HasDSP | 0, // DPSU_H_QBR = 1290
9066 : Feature_InMicroMips | Feature_HasDSP | 0, // DPSU_H_QBR_MM = 1291
9067 : Feature_HasDSPR2 | 0, // DPSX_W_PH = 1292
9068 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSX_W_PH_MMR2 = 1293
9069 : Feature_HasDSPR2 | 0, // DPS_W_PH = 1294
9070 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPS_W_PH_MMR2 = 1295
9071 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTR = 1296
9072 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTR32 = 1297
9073 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTRV = 1298
9074 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSBH = 1299
9075 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDIV = 1300
9076 : Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSHD = 1301
9077 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLL = 1302
9078 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLL32 = 1303
9079 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // DSLL64_32 = 1304
9080 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLLV = 1305
9081 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRA = 1306
9082 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRA32 = 1307
9083 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRAV = 1308
9084 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRL = 1309
9085 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRL32 = 1310
9086 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRLV = 1311
9087 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSUB = 1312
9088 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSUBu = 1313
9089 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDIV = 1314
9090 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // DVP = 1315
9091 : Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // DVPE = 1316
9092 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // DVP_MMR6 = 1317
9093 : Feature_InMips16Mode | 0, // DivRxRy16 = 1318
9094 : Feature_InMips16Mode | 0, // DivuRxRy16 = 1319
9095 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // EHB = 1320
9096 : Feature_InMicroMips | 0, // EHB_MM = 1321
9097 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // EHB_MMR6 = 1322
9098 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // EI = 1323
9099 : Feature_InMicroMips | 0, // EI_MM = 1324
9100 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // EI_MMR6 = 1325
9101 : Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // EMT = 1326
9102 : Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotInMicroMips | 0, // ERET = 1327
9103 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_NotInMicroMips | 0, // ERETNC = 1328
9104 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ERETNC_MMR6 = 1329
9105 : Feature_InMicroMips | 0, // ERET_MM = 1330
9106 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ERET_MMR6 = 1331
9107 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // EVP = 1332
9108 : Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // EVPE = 1333
9109 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // EVP_MMR6 = 1334
9110 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // EXT = 1335
9111 : Feature_HasDSP | 0, // EXTP = 1336
9112 : Feature_HasDSP | 0, // EXTPDP = 1337
9113 : Feature_HasDSP | 0, // EXTPDPV = 1338
9114 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTPDPV_MM = 1339
9115 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTPDP_MM = 1340
9116 : Feature_HasDSP | 0, // EXTPV = 1341
9117 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTPV_MM = 1342
9118 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTP_MM = 1343
9119 : Feature_HasDSP | 0, // EXTRV_RS_W = 1344
9120 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_RS_W_MM = 1345
9121 : Feature_HasDSP | 0, // EXTRV_R_W = 1346
9122 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_R_W_MM = 1347
9123 : Feature_HasDSP | 0, // EXTRV_S_H = 1348
9124 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_S_H_MM = 1349
9125 : Feature_HasDSP | 0, // EXTRV_W = 1350
9126 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_W_MM = 1351
9127 : Feature_HasDSP | 0, // EXTR_RS_W = 1352
9128 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_RS_W_MM = 1353
9129 : Feature_HasDSP | 0, // EXTR_R_W = 1354
9130 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_R_W_MM = 1355
9131 : Feature_HasDSP | 0, // EXTR_S_H = 1356
9132 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_S_H_MM = 1357
9133 : Feature_HasDSP | 0, // EXTR_W = 1358
9134 : Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_W_MM = 1359
9135 : Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // EXTS = 1360
9136 : Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // EXTS32 = 1361
9137 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // EXT_MM = 1362
9138 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // EXT_MMR6 = 1363
9139 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_D32 = 1364
9140 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FABS_D32_MM = 1365
9141 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_D64 = 1366
9142 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FABS_D64_MM = 1367
9143 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_S = 1368
9144 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FABS_S_MM = 1369
9145 : Feature_HasStdEnc | Feature_HasMSA | 0, // FADD_D = 1370
9146 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_D32 = 1371
9147 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FADD_D32_MM = 1372
9148 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_D64 = 1373
9149 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FADD_D64_MM = 1374
9150 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_S = 1375
9151 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FADD_S_MM = 1376
9152 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FADD_S_MMR6 = 1377
9153 : Feature_HasStdEnc | Feature_HasMSA | 0, // FADD_W = 1378
9154 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCAF_D = 1379
9155 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCAF_W = 1380
9156 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCEQ_D = 1381
9157 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCEQ_W = 1382
9158 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCLASS_D = 1383
9159 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCLASS_W = 1384
9160 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCLE_D = 1385
9161 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCLE_W = 1386
9162 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCLT_D = 1387
9163 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCLT_W = 1388
9164 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FCMP_D32 = 1389
9165 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // FCMP_D32_MM = 1390
9166 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // FCMP_D64 = 1391
9167 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FCMP_S32 = 1392
9168 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // FCMP_S32_MM = 1393
9169 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCNE_D = 1394
9170 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCNE_W = 1395
9171 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCOR_D = 1396
9172 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCOR_W = 1397
9173 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCUEQ_D = 1398
9174 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCUEQ_W = 1399
9175 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCULE_D = 1400
9176 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCULE_W = 1401
9177 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCULT_D = 1402
9178 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCULT_W = 1403
9179 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCUNE_D = 1404
9180 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCUNE_W = 1405
9181 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCUN_D = 1406
9182 : Feature_HasStdEnc | Feature_HasMSA | 0, // FCUN_W = 1407
9183 : Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_D = 1408
9184 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_D32 = 1409
9185 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FDIV_D32_MM = 1410
9186 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_D64 = 1411
9187 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FDIV_D64_MM = 1412
9188 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_S = 1413
9189 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FDIV_S_MM = 1414
9190 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FDIV_S_MMR6 = 1415
9191 : Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_W = 1416
9192 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXDO_H = 1417
9193 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXDO_W = 1418
9194 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_D = 1419
9195 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_W = 1420
9196 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPL_D = 1421
9197 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPL_W = 1422
9198 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPR_D = 1423
9199 : Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPR_W = 1424
9200 : Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_S_D = 1425
9201 : Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_S_W = 1426
9202 : Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_U_D = 1427
9203 : Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_U_W = 1428
9204 : Feature_HasStdEnc | Feature_HasMSA | 0, // FFQL_D = 1429
9205 : Feature_HasStdEnc | Feature_HasMSA | 0, // FFQL_W = 1430
9206 : Feature_HasStdEnc | Feature_HasMSA | 0, // FFQR_D = 1431
9207 : Feature_HasStdEnc | Feature_HasMSA | 0, // FFQR_W = 1432
9208 : Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_B = 1433
9209 : Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // FILL_D = 1434
9210 : Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_H = 1435
9211 : Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_W = 1436
9212 : Feature_HasStdEnc | Feature_HasMSA | 0, // FLOG2_D = 1437
9213 : Feature_HasStdEnc | Feature_HasMSA | 0, // FLOG2_W = 1438
9214 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_L_D64 = 1439
9215 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_L_D_MMR6 = 1440
9216 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_L_S = 1441
9217 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_L_S_MMR6 = 1442
9218 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_D32 = 1443
9219 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_D64 = 1444
9220 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_W_D_MMR6 = 1445
9221 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FLOOR_W_MM = 1446
9222 : Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_S = 1447
9223 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FLOOR_W_S_MM = 1448
9224 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_W_S_MMR6 = 1449
9225 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMADD_D = 1450
9226 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMADD_W = 1451
9227 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_A_D = 1452
9228 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_A_W = 1453
9229 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_D = 1454
9230 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_W = 1455
9231 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_A_D = 1456
9232 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_A_W = 1457
9233 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_D = 1458
9234 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_W = 1459
9235 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_D32 = 1460
9236 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FMOV_D32_MM = 1461
9237 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_D64 = 1462
9238 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FMOV_D64_MM = 1463
9239 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_S = 1464
9240 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FMOV_S_MM = 1465
9241 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FMOV_S_MMR6 = 1466
9242 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMSUB_D = 1467
9243 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMSUB_W = 1468
9244 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMUL_D = 1469
9245 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_D32 = 1470
9246 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FMUL_D32_MM = 1471
9247 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_D64 = 1472
9248 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FMUL_D64_MM = 1473
9249 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_S = 1474
9250 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FMUL_S_MM = 1475
9251 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FMUL_S_MMR6 = 1476
9252 : Feature_HasStdEnc | Feature_HasMSA | 0, // FMUL_W = 1477
9253 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FNEG_D32 = 1478
9254 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FNEG_D32_MM = 1479
9255 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FNEG_D64 = 1480
9256 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FNEG_D64_MM = 1481
9257 : Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // FNEG_S = 1482
9258 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FNEG_S_MM = 1483
9259 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FNEG_S_MMR6 = 1484
9260 : Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // FORK = 1485
9261 : Feature_HasStdEnc | Feature_HasMSA | 0, // FRCP_D = 1486
9262 : Feature_HasStdEnc | Feature_HasMSA | 0, // FRCP_W = 1487
9263 : Feature_HasStdEnc | Feature_HasMSA | 0, // FRINT_D = 1488
9264 : Feature_HasStdEnc | Feature_HasMSA | 0, // FRINT_W = 1489
9265 : Feature_HasStdEnc | Feature_HasMSA | 0, // FRSQRT_D = 1490
9266 : Feature_HasStdEnc | Feature_HasMSA | 0, // FRSQRT_W = 1491
9267 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSAF_D = 1492
9268 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSAF_W = 1493
9269 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSEQ_D = 1494
9270 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSEQ_W = 1495
9271 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSLE_D = 1496
9272 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSLE_W = 1497
9273 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSLT_D = 1498
9274 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSLT_W = 1499
9275 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSNE_D = 1500
9276 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSNE_W = 1501
9277 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSOR_D = 1502
9278 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSOR_W = 1503
9279 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSQRT_D = 1504
9280 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_D32 = 1505
9281 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FSQRT_D32_MM = 1506
9282 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_D64 = 1507
9283 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FSQRT_D64_MM = 1508
9284 : Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_S = 1509
9285 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FSQRT_S_MM = 1510
9286 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSQRT_W = 1511
9287 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSUB_D = 1512
9288 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_D32 = 1513
9289 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FSUB_D32_MM = 1514
9290 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_D64 = 1515
9291 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FSUB_D64_MM = 1516
9292 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_S = 1517
9293 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FSUB_S_MM = 1518
9294 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FSUB_S_MMR6 = 1519
9295 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSUB_W = 1520
9296 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSUEQ_D = 1521
9297 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSUEQ_W = 1522
9298 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSULE_D = 1523
9299 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSULE_W = 1524
9300 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSULT_D = 1525
9301 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSULT_W = 1526
9302 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSUNE_D = 1527
9303 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSUNE_W = 1528
9304 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSUN_D = 1529
9305 : Feature_HasStdEnc | Feature_HasMSA | 0, // FSUN_W = 1530
9306 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_S_D = 1531
9307 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_S_W = 1532
9308 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_U_D = 1533
9309 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_U_W = 1534
9310 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTQ_H = 1535
9311 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTQ_W = 1536
9312 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_S_D = 1537
9313 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_S_W = 1538
9314 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_U_D = 1539
9315 : Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_U_W = 1540
9316 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasGINV | Feature_NotInMicroMips | 0, // GINVI = 1541
9317 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_HasGINV | 0, // GINVI_MMR6 = 1542
9318 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasGINV | Feature_NotInMicroMips | 0, // GINVT = 1543
9319 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_HasGINV | 0, // GINVT_MMR6 = 1544
9320 : Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_D = 1545
9321 : Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_H = 1546
9322 : Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_W = 1547
9323 : Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_D = 1548
9324 : Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_H = 1549
9325 : Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_W = 1550
9326 : Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_D = 1551
9327 : Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_H = 1552
9328 : Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_W = 1553
9329 : Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_D = 1554
9330 : Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_H = 1555
9331 : Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_W = 1556
9332 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // HYPCALL = 1557
9333 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // HYPCALL_MM = 1558
9334 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_B = 1559
9335 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_D = 1560
9336 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_H = 1561
9337 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_W = 1562
9338 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_B = 1563
9339 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_D = 1564
9340 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_H = 1565
9341 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_W = 1566
9342 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_B = 1567
9343 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_D = 1568
9344 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_H = 1569
9345 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_W = 1570
9346 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_B = 1571
9347 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_D = 1572
9348 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_H = 1573
9349 : Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_W = 1574
9350 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // INS = 1575
9351 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B = 1576
9352 : Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // INSERT_D = 1577
9353 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H = 1578
9354 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W = 1579
9355 : Feature_HasDSP | 0, // INSV = 1580
9356 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_B = 1581
9357 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_D = 1582
9358 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_H = 1583
9359 : Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_W = 1584
9360 : Feature_InMicroMips | Feature_HasDSP | 0, // INSV_MM = 1585
9361 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // INS_MM = 1586
9362 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // INS_MMR6 = 1587
9363 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // J = 1588
9364 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // JAL = 1589
9365 : Feature_HasStdEnc | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // JALR = 1590
9366 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALR16_MM = 1591
9367 : Feature_NotInMips16Mode | 0, // JALR64 = 1592
9368 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC16_MMR6 = 1593
9369 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC_HB_MMR6 = 1594
9370 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC_MMR6 = 1595
9371 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALRS16_MM = 1596
9372 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALRS_MM = 1597
9373 : Feature_HasStdEnc | Feature_HasMips32 | 0, // JALR_HB = 1598
9374 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // JALR_HB64 = 1599
9375 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALR_MM = 1600
9376 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALS_MM = 1601
9377 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JALX = 1602
9378 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALX_MM = 1603
9379 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JAL_MM = 1604
9380 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JIALC = 1605
9381 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // JIALC64 = 1606
9382 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // JIALC_MMR6 = 1607
9383 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JIC = 1608
9384 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // JIC64 = 1609
9385 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // JIC_MMR6 = 1610
9386 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JR = 1611
9387 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JR16_MM = 1612
9388 : Feature_NotInMips16Mode | Feature_IsPTR64bit | Feature_NotInMicroMips | 0, // JR64 = 1613
9389 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JRADDIUSP = 1614
9390 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JRC16_MM = 1615
9391 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // JRC16_MMR6 = 1616
9392 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // JRCADDIUSP_MMR6 = 1617
9393 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // JR_HB = 1618
9394 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JR_HB64 = 1619
9395 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JR_HB64_R6 = 1620
9396 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JR_HB_R6 = 1621
9397 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // JR_MM = 1622
9398 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // J_MM = 1623
9399 : Feature_InMips16Mode | 0, // Jal16 = 1624
9400 : Feature_InMips16Mode | 0, // JalB16 = 1625
9401 : Feature_InMips16Mode | 0, // JrRa16 = 1626
9402 : Feature_InMips16Mode | 0, // JrcRa16 = 1627
9403 : Feature_InMips16Mode | 0, // JrcRx16 = 1628
9404 : Feature_InMips16Mode | 0, // JumpLinkReg16 = 1629
9405 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LB = 1630
9406 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LB64 = 1631
9407 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LBE = 1632
9408 : Feature_InMicroMips | Feature_HasEVA | 0, // LBE_MM = 1633
9409 : Feature_InMicroMips | 0, // LBU16_MM = 1634
9410 : Feature_HasDSP | 0, // LBUX = 1635
9411 : Feature_InMicroMips | Feature_HasDSP | 0, // LBUX_MM = 1636
9412 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LBU_MMR6 = 1637
9413 : Feature_InMicroMips | 0, // LB_MM = 1638
9414 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LB_MMR6 = 1639
9415 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LBu = 1640
9416 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LBu64 = 1641
9417 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LBuE = 1642
9418 : Feature_InMicroMips | Feature_HasEVA | 0, // LBuE_MM = 1643
9419 : Feature_InMicroMips | 0, // LBu_MM = 1644
9420 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // LD = 1645
9421 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDC1 = 1646
9422 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDC164 = 1647
9423 : Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // LDC1_D64_MMR6 = 1648
9424 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // LDC1_MM = 1649
9425 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LDC2 = 1650
9426 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LDC2_MMR6 = 1651
9427 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LDC2_R6 = 1652
9428 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // LDC3 = 1653
9429 : Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_B = 1654
9430 : Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_D = 1655
9431 : Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_H = 1656
9432 : Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_W = 1657
9433 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // LDL = 1658
9434 : Feature_HasStdEnc | Feature_HasMips64r6 | 0, // LDPC = 1659
9435 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // LDR = 1660
9436 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDXC1 = 1661
9437 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // LDXC164 = 1662
9438 : Feature_HasStdEnc | Feature_HasMSA | 0, // LD_B = 1663
9439 : Feature_HasStdEnc | Feature_HasMSA | 0, // LD_D = 1664
9440 : Feature_HasStdEnc | Feature_HasMSA | 0, // LD_H = 1665
9441 : Feature_HasStdEnc | Feature_HasMSA | 0, // LD_W = 1666
9442 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LEA_ADDiu = 1667
9443 : Feature_NotInMips16Mode | Feature_IsGP64bit | Feature_NotInMicroMips | 0, // LEA_ADDiu64 = 1668
9444 : Feature_InMicroMips | 0, // LEA_ADDiu_MM = 1669
9445 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LH = 1670
9446 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LH64 = 1671
9447 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LHE = 1672
9448 : Feature_InMicroMips | Feature_HasEVA | 0, // LHE_MM = 1673
9449 : Feature_InMicroMips | 0, // LHU16_MM = 1674
9450 : Feature_HasDSP | 0, // LHX = 1675
9451 : Feature_InMicroMips | Feature_HasDSP | 0, // LHX_MM = 1676
9452 : Feature_InMicroMips | 0, // LH_MM = 1677
9453 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LHu = 1678
9454 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LHu64 = 1679
9455 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LHuE = 1680
9456 : Feature_InMicroMips | Feature_HasEVA | 0, // LHuE_MM = 1681
9457 : Feature_InMicroMips | 0, // LHu_MM = 1682
9458 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // LI16_MM = 1683
9459 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LI16_MMR6 = 1684
9460 : Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LL = 1685
9461 : Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LL64 = 1686
9462 : Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // LL64_R6 = 1687
9463 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LLD = 1688
9464 : Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // LLD_R6 = 1689
9465 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LLE = 1690
9466 : Feature_InMicroMips | Feature_HasEVA | 0, // LLE_MM = 1691
9467 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // LL_MM = 1692
9468 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LL_MMR6 = 1693
9469 : Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LL_R6 = 1694
9470 : Feature_HasStdEnc | Feature_HasMSA | 0, // LSA = 1695
9471 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LSA_MMR6 = 1696
9472 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // LSA_R6 = 1697
9473 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LUI_MMR6 = 1698
9474 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LUXC1 = 1699
9475 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LUXC164 = 1700
9476 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // LUXC1_MM = 1701
9477 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LUi = 1702
9478 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LUi64 = 1703
9479 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // LUi_MM = 1704
9480 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LW = 1705
9481 : Feature_InMicroMips | 0, // LW16_MM = 1706
9482 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LW64 = 1707
9483 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LWC1 = 1708
9484 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // LWC1_MM = 1709
9485 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWC2 = 1710
9486 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWC2_MMR6 = 1711
9487 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LWC2_R6 = 1712
9488 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // LWC3 = 1713
9489 : Feature_NotInMips16Mode | Feature_HasDSP | 0, // LWDSP = 1714
9490 : Feature_InMicroMips | Feature_HasDSP | 0, // LWDSP_MM = 1715
9491 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWE = 1716
9492 : Feature_InMicroMips | Feature_HasEVA | 0, // LWE_MM = 1717
9493 : Feature_InMicroMips | 0, // LWGP_MM = 1718
9494 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWL = 1719
9495 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LWL64 = 1720
9496 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWLE = 1721
9497 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // LWLE_MM = 1722
9498 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWL_MM = 1723
9499 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWM16_MM = 1724
9500 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWM16_MMR6 = 1725
9501 : Feature_InMicroMips | 0, // LWM32_MM = 1726
9502 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // LWPC = 1727
9503 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWPC_MMR6 = 1728
9504 : Feature_InMicroMips | 0, // LWP_MM = 1729
9505 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWR = 1730
9506 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LWR64 = 1731
9507 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWRE = 1732
9508 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // LWRE_MM = 1733
9509 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWR_MM = 1734
9510 : Feature_InMicroMips | 0, // LWSP_MM = 1735
9511 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LWUPC = 1736
9512 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWU_MM = 1737
9513 : Feature_HasDSP | 0, // LWX = 1738
9514 : Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // LWXC1 = 1739
9515 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // LWXC1_MM = 1740
9516 : Feature_InMicroMips | 0, // LWXS_MM = 1741
9517 : Feature_InMicroMips | Feature_HasDSP | 0, // LWX_MM = 1742
9518 : Feature_InMicroMips | 0, // LW_MM = 1743
9519 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // LW_MMR6 = 1744
9520 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // LWu = 1745
9521 : Feature_InMips16Mode | 0, // LbRxRyOffMemX16 = 1746
9522 : Feature_InMips16Mode | 0, // LbuRxRyOffMemX16 = 1747
9523 : Feature_InMips16Mode | 0, // LhRxRyOffMemX16 = 1748
9524 : Feature_InMips16Mode | 0, // LhuRxRyOffMemX16 = 1749
9525 : Feature_InMips16Mode | 0, // LiRxImm16 = 1750
9526 : Feature_InMips16Mode | 0, // LiRxImmAlignX16 = 1751
9527 : Feature_InMips16Mode | 0, // LiRxImmX16 = 1752
9528 : Feature_InMips16Mode | 0, // LwRxPcTcp16 = 1753
9529 : Feature_InMips16Mode | 0, // LwRxPcTcpX16 = 1754
9530 : Feature_InMips16Mode | 0, // LwRxRyOffMemX16 = 1755
9531 : Feature_InMips16Mode | 0, // LwRxSpImmX16 = 1756
9532 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MADD = 1757
9533 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MADDF_D = 1758
9534 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MADDF_D_MMR6 = 1759
9535 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MADDF_S = 1760
9536 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MADDF_S_MMR6 = 1761
9537 : Feature_HasStdEnc | Feature_HasMSA | 0, // MADDR_Q_H = 1762
9538 : Feature_HasStdEnc | Feature_HasMSA | 0, // MADDR_Q_W = 1763
9539 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MADDU = 1764
9540 : Feature_HasDSP | 0, // MADDU_DSP = 1765
9541 : Feature_InMicroMips | Feature_HasDSP | 0, // MADDU_DSP_MM = 1766
9542 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MADDU_MM = 1767
9543 : Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_B = 1768
9544 : Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_D = 1769
9545 : Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_H = 1770
9546 : Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_W = 1771
9547 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_D32 = 1772
9548 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MADD_D32_MM = 1773
9549 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_D64 = 1774
9550 : Feature_HasDSP | 0, // MADD_DSP = 1775
9551 : Feature_InMicroMips | Feature_HasDSP | 0, // MADD_DSP_MM = 1776
9552 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MADD_MM = 1777
9553 : Feature_HasStdEnc | Feature_HasMSA | 0, // MADD_Q_H = 1778
9554 : Feature_HasStdEnc | Feature_HasMSA | 0, // MADD_Q_W = 1779
9555 : Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_S = 1780
9556 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MADD_S_MM = 1781
9557 : Feature_HasDSP | 0, // MAQ_SA_W_PHL = 1782
9558 : Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_SA_W_PHL_MM = 1783
9559 : Feature_HasDSP | 0, // MAQ_SA_W_PHR = 1784
9560 : Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_SA_W_PHR_MM = 1785
9561 : Feature_HasDSP | 0, // MAQ_S_W_PHL = 1786
9562 : Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_S_W_PHL_MM = 1787
9563 : Feature_HasDSP | 0, // MAQ_S_W_PHR = 1788
9564 : Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_S_W_PHR_MM = 1789
9565 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAXA_D = 1790
9566 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAXA_D_MMR6 = 1791
9567 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAXA_S = 1792
9568 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAXA_S_MMR6 = 1793
9569 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_B = 1794
9570 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_D = 1795
9571 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_H = 1796
9572 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_W = 1797
9573 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_B = 1798
9574 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_D = 1799
9575 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_H = 1800
9576 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_W = 1801
9577 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_B = 1802
9578 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_D = 1803
9579 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_H = 1804
9580 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_W = 1805
9581 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAX_D = 1806
9582 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAX_D_MMR6 = 1807
9583 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAX_S = 1808
9584 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_B = 1809
9585 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_D = 1810
9586 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_H = 1811
9587 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAX_S_MMR6 = 1812
9588 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_W = 1813
9589 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_B = 1814
9590 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_D = 1815
9591 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_H = 1816
9592 : Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_W = 1817
9593 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MFC0 = 1818
9594 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFC0_MMR6 = 1819
9595 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFC1 = 1820
9596 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFC1_D64 = 1821
9597 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // MFC1_MM = 1822
9598 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MFC1_MMR6 = 1823
9599 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MFC2 = 1824
9600 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFC2_MMR6 = 1825
9601 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MFGC0 = 1826
9602 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MFGC0_MM = 1827
9603 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFHC0_MMR6 = 1828
9604 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFHC1_D32 = 1829
9605 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // MFHC1_D32_MM = 1830
9606 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFHC1_D64 = 1831
9607 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MFHC1_D64_MM = 1832
9608 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFHC2_MMR6 = 1833
9609 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MFHGC0 = 1834
9610 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MFHGC0_MM = 1835
9611 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MFHI = 1836
9612 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFHI16_MM = 1837
9613 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MFHI64 = 1838
9614 : Feature_HasDSP | 0, // MFHI_DSP = 1839
9615 : Feature_InMicroMips | Feature_HasDSP | 0, // MFHI_DSP_MM = 1840
9616 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFHI_MM = 1841
9617 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MFLO = 1842
9618 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFLO16_MM = 1843
9619 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MFLO64 = 1844
9620 : Feature_HasDSP | 0, // MFLO_DSP = 1845
9621 : Feature_InMicroMips | Feature_HasDSP | 0, // MFLO_DSP_MM = 1846
9622 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFLO_MM = 1847
9623 : Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // MFTR = 1848
9624 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MINA_D = 1849
9625 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MINA_D_MMR6 = 1850
9626 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MINA_S = 1851
9627 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MINA_S_MMR6 = 1852
9628 : Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_B = 1853
9629 : Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_D = 1854
9630 : Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_H = 1855
9631 : Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_W = 1856
9632 : Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_B = 1857
9633 : Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_D = 1858
9634 : Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_H = 1859
9635 : Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_W = 1860
9636 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_B = 1861
9637 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_D = 1862
9638 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_H = 1863
9639 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_W = 1864
9640 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MIN_D = 1865
9641 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MIN_D_MMR6 = 1866
9642 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MIN_S = 1867
9643 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_B = 1868
9644 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_D = 1869
9645 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_H = 1870
9646 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MIN_S_MMR6 = 1871
9647 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_W = 1872
9648 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_B = 1873
9649 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_D = 1874
9650 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_H = 1875
9651 : Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_W = 1876
9652 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MOD = 1877
9653 : Feature_HasDSP | 0, // MODSUB = 1878
9654 : Feature_InMicroMips | Feature_HasDSP | 0, // MODSUB_MM = 1879
9655 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MODU = 1880
9656 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MODU_MMR6 = 1881
9657 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOD_MMR6 = 1882
9658 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_B = 1883
9659 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_D = 1884
9660 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_H = 1885
9661 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_W = 1886
9662 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_B = 1887
9663 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_D = 1888
9664 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_H = 1889
9665 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_W = 1890
9666 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVE16_MM = 1891
9667 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOVE16_MMR6 = 1892
9668 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVEP_MM = 1893
9669 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOVEP_MMR6 = 1894
9670 : Feature_HasStdEnc | Feature_HasMSA | 0, // MOVE_V = 1895
9671 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_D32 = 1896
9672 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_D32_MM = 1897
9673 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_D64 = 1898
9674 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_I = 1899
9675 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_I64 = 1900
9676 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_I_MM = 1901
9677 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_S = 1902
9678 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_S_MM = 1903
9679 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I64_D64 = 1904
9680 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I64_I = 1905
9681 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I64_I64 = 1906
9682 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I64_S = 1907
9683 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_D32 = 1908
9684 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVN_I_D32_MM = 1909
9685 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_D64 = 1910
9686 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I_I = 1911
9687 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I_I64 = 1912
9688 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVN_I_MM = 1913
9689 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_S = 1914
9690 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVN_I_S_MM = 1915
9691 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_D32 = 1916
9692 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_D32_MM = 1917
9693 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_D64 = 1918
9694 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_I = 1919
9695 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_I64 = 1920
9696 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_I_MM = 1921
9697 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_S = 1922
9698 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_S_MM = 1923
9699 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I64_D64 = 1924
9700 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I64_I = 1925
9701 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I64_I64 = 1926
9702 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I64_S = 1927
9703 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_D32 = 1928
9704 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVZ_I_D32_MM = 1929
9705 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_D64 = 1930
9706 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I_I = 1931
9707 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I_I64 = 1932
9708 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVZ_I_MM = 1933
9709 : Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_S = 1934
9710 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVZ_I_S_MM = 1935
9711 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MSUB = 1936
9712 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MSUBF_D = 1937
9713 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MSUBF_D_MMR6 = 1938
9714 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MSUBF_S = 1939
9715 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MSUBF_S_MMR6 = 1940
9716 : Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBR_Q_H = 1941
9717 : Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBR_Q_W = 1942
9718 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MSUBU = 1943
9719 : Feature_HasDSP | 0, // MSUBU_DSP = 1944
9720 : Feature_InMicroMips | Feature_HasDSP | 0, // MSUBU_DSP_MM = 1945
9721 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MSUBU_MM = 1946
9722 : Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_B = 1947
9723 : Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_D = 1948
9724 : Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_H = 1949
9725 : Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_W = 1950
9726 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_D32 = 1951
9727 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MSUB_D32_MM = 1952
9728 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_D64 = 1953
9729 : Feature_HasDSP | 0, // MSUB_DSP = 1954
9730 : Feature_InMicroMips | Feature_HasDSP | 0, // MSUB_DSP_MM = 1955
9731 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MSUB_MM = 1956
9732 : Feature_HasStdEnc | Feature_HasMSA | 0, // MSUB_Q_H = 1957
9733 : Feature_HasStdEnc | Feature_HasMSA | 0, // MSUB_Q_W = 1958
9734 : Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_S = 1959
9735 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MSUB_S_MM = 1960
9736 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MTC0 = 1961
9737 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTC0_MMR6 = 1962
9738 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTC1 = 1963
9739 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTC1_D64 = 1964
9740 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MTC1_D64_MM = 1965
9741 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // MTC1_MM = 1966
9742 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MTC1_MMR6 = 1967
9743 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MTC2 = 1968
9744 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTC2_MMR6 = 1969
9745 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MTGC0 = 1970
9746 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MTGC0_MM = 1971
9747 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTHC0_MMR6 = 1972
9748 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTHC1_D32 = 1973
9749 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // MTHC1_D32_MM = 1974
9750 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTHC1_D64 = 1975
9751 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MTHC1_D64_MM = 1976
9752 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTHC2_MMR6 = 1977
9753 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MTHGC0 = 1978
9754 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MTHGC0_MM = 1979
9755 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MTHI = 1980
9756 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTHI64 = 1981
9757 : Feature_HasDSP | 0, // MTHI_DSP = 1982
9758 : Feature_InMicroMips | Feature_HasDSP | 0, // MTHI_DSP_MM = 1983
9759 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MTHI_MM = 1984
9760 : Feature_HasDSP | 0, // MTHLIP = 1985
9761 : Feature_InMicroMips | Feature_HasDSP | 0, // MTHLIP_MM = 1986
9762 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MTLO = 1987
9763 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTLO64 = 1988
9764 : Feature_HasDSP | 0, // MTLO_DSP = 1989
9765 : Feature_InMicroMips | Feature_HasDSP | 0, // MTLO_DSP_MM = 1990
9766 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MTLO_MM = 1991
9767 : Feature_HasCnMips | 0, // MTM0 = 1992
9768 : Feature_HasCnMips | 0, // MTM1 = 1993
9769 : Feature_HasCnMips | 0, // MTM2 = 1994
9770 : Feature_HasCnMips | 0, // MTP0 = 1995
9771 : Feature_HasCnMips | 0, // MTP1 = 1996
9772 : Feature_HasCnMips | 0, // MTP2 = 1997
9773 : Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // MTTR = 1998
9774 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUH = 1999
9775 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUHU = 2000
9776 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUHU_MMR6 = 2001
9777 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUH_MMR6 = 2002
9778 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MUL = 2003
9779 : Feature_HasDSP | 0, // MULEQ_S_W_PHL = 2004
9780 : Feature_InMicroMips | Feature_HasDSP | 0, // MULEQ_S_W_PHL_MM = 2005
9781 : Feature_HasDSP | 0, // MULEQ_S_W_PHR = 2006
9782 : Feature_InMicroMips | Feature_HasDSP | 0, // MULEQ_S_W_PHR_MM = 2007
9783 : Feature_HasDSP | 0, // MULEU_S_PH_QBL = 2008
9784 : Feature_InMicroMips | Feature_HasDSP | 0, // MULEU_S_PH_QBL_MM = 2009
9785 : Feature_HasDSP | 0, // MULEU_S_PH_QBR = 2010
9786 : Feature_InMicroMips | Feature_HasDSP | 0, // MULEU_S_PH_QBR_MM = 2011
9787 : Feature_HasDSP | 0, // MULQ_RS_PH = 2012
9788 : Feature_InMicroMips | Feature_HasDSP | 0, // MULQ_RS_PH_MM = 2013
9789 : Feature_HasDSPR2 | 0, // MULQ_RS_W = 2014
9790 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_RS_W_MMR2 = 2015
9791 : Feature_HasDSPR2 | 0, // MULQ_S_PH = 2016
9792 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_S_PH_MMR2 = 2017
9793 : Feature_HasDSPR2 | 0, // MULQ_S_W = 2018
9794 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_S_W_MMR2 = 2019
9795 : Feature_HasStdEnc | Feature_HasMSA | 0, // MULR_Q_H = 2020
9796 : Feature_HasStdEnc | Feature_HasMSA | 0, // MULR_Q_W = 2021
9797 : Feature_HasDSP | 0, // MULSAQ_S_W_PH = 2022
9798 : Feature_InMicroMips | Feature_HasDSP | 0, // MULSAQ_S_W_PH_MM = 2023
9799 : Feature_HasDSPR2 | 0, // MULSA_W_PH = 2024
9800 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULSA_W_PH_MMR2 = 2025
9801 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MULT = 2026
9802 : Feature_HasDSP | 0, // MULTU_DSP = 2027
9803 : Feature_InMicroMips | Feature_HasDSP | 0, // MULTU_DSP_MM = 2028
9804 : Feature_HasDSP | 0, // MULT_DSP = 2029
9805 : Feature_InMicroMips | Feature_HasDSP | 0, // MULT_DSP_MM = 2030
9806 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MULT_MM = 2031
9807 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MULTu = 2032
9808 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MULTu_MM = 2033
9809 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MULU = 2034
9810 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MULU_MMR6 = 2035
9811 : Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_B = 2036
9812 : Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_D = 2037
9813 : Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_H = 2038
9814 : Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_W = 2039
9815 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // MUL_MM = 2040
9816 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUL_MMR6 = 2041
9817 : Feature_HasDSPR2 | 0, // MUL_PH = 2042
9818 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // MUL_PH_MMR2 = 2043
9819 : Feature_HasStdEnc | Feature_HasMSA | 0, // MUL_Q_H = 2044
9820 : Feature_HasStdEnc | Feature_HasMSA | 0, // MUL_Q_W = 2045
9821 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUL_R6 = 2046
9822 : Feature_HasDSPR2 | 0, // MUL_S_PH = 2047
9823 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // MUL_S_PH_MMR2 = 2048
9824 : Feature_InMips16Mode | 0, // Mfhi16 = 2049
9825 : Feature_InMips16Mode | 0, // Mflo16 = 2050
9826 : Feature_InMips16Mode | 0, // Move32R16 = 2051
9827 : Feature_InMips16Mode | 0, // MoveR3216 = 2052
9828 : Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_B = 2053
9829 : Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_D = 2054
9830 : Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_H = 2055
9831 : Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_W = 2056
9832 : Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_B = 2057
9833 : Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_D = 2058
9834 : Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_H = 2059
9835 : Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_W = 2060
9836 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_D32 = 2061
9837 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMADD_D32_MM = 2062
9838 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_D64 = 2063
9839 : Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_S = 2064
9840 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMADD_S_MM = 2065
9841 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_D32 = 2066
9842 : Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMSUB_D32_MM = 2067
9843 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_D64 = 2068
9844 : Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_S = 2069
9845 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMSUB_S_MM = 2070
9846 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // NOR = 2071
9847 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // NOR64 = 2072
9848 : Feature_HasStdEnc | Feature_HasMSA | 0, // NORI_B = 2073
9849 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // NOR_MM = 2074
9850 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // NOR_MMR6 = 2075
9851 : Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V = 2076
9852 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // NOT16_MM = 2077
9853 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // NOT16_MMR6 = 2078
9854 : Feature_InMips16Mode | 0, // NegRxRy16 = 2079
9855 : Feature_InMips16Mode | 0, // NotRxRy16 = 2080
9856 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // OR = 2081
9857 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // OR16_MM = 2082
9858 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // OR16_MMR6 = 2083
9859 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // OR64 = 2084
9860 : Feature_HasStdEnc | Feature_HasMSA | 0, // ORI_B = 2085
9861 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // ORI_MMR6 = 2086
9862 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // OR_MM = 2087
9863 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // OR_MMR6 = 2088
9864 : Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V = 2089
9865 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ORi = 2090
9866 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // ORi64 = 2091
9867 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // ORi_MM = 2092
9868 : Feature_InMips16Mode | 0, // OrRxRxRy16 = 2093
9869 : Feature_HasDSP | 0, // PACKRL_PH = 2094
9870 : Feature_InMicroMips | Feature_HasDSP | 0, // PACKRL_PH_MM = 2095
9871 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // PAUSE = 2096
9872 : Feature_InMicroMips | 0, // PAUSE_MM = 2097
9873 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // PAUSE_MMR6 = 2098
9874 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_B = 2099
9875 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_D = 2100
9876 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_H = 2101
9877 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_W = 2102
9878 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_B = 2103
9879 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_D = 2104
9880 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_H = 2105
9881 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_W = 2106
9882 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_B = 2107
9883 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_D = 2108
9884 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_H = 2109
9885 : Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_W = 2110
9886 : Feature_HasDSP | 0, // PICK_PH = 2111
9887 : Feature_InMicroMips | Feature_HasDSP | 0, // PICK_PH_MM = 2112
9888 : Feature_HasDSP | 0, // PICK_QB = 2113
9889 : Feature_InMicroMips | Feature_HasDSP | 0, // PICK_QB_MM = 2114
9890 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // PLL_PS64 = 2115
9891 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // PLU_PS64 = 2116
9892 : Feature_HasCnMips | 0, // POP = 2117
9893 : Feature_HasDSP | 0, // PRECEQU_PH_QBL = 2118
9894 : Feature_HasDSP | 0, // PRECEQU_PH_QBLA = 2119
9895 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBLA_MM = 2120
9896 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBL_MM = 2121
9897 : Feature_HasDSP | 0, // PRECEQU_PH_QBR = 2122
9898 : Feature_HasDSP | 0, // PRECEQU_PH_QBRA = 2123
9899 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBRA_MM = 2124
9900 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBR_MM = 2125
9901 : Feature_HasDSP | 0, // PRECEQ_W_PHL = 2126
9902 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQ_W_PHL_MM = 2127
9903 : Feature_HasDSP | 0, // PRECEQ_W_PHR = 2128
9904 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQ_W_PHR_MM = 2129
9905 : Feature_HasDSP | 0, // PRECEU_PH_QBL = 2130
9906 : Feature_HasDSP | 0, // PRECEU_PH_QBLA = 2131
9907 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBLA_MM = 2132
9908 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBL_MM = 2133
9909 : Feature_HasDSP | 0, // PRECEU_PH_QBR = 2134
9910 : Feature_HasDSP | 0, // PRECEU_PH_QBRA = 2135
9911 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBRA_MM = 2136
9912 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBR_MM = 2137
9913 : Feature_HasDSP | 0, // PRECRQU_S_QB_PH = 2138
9914 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQU_S_QB_PH_MM = 2139
9915 : Feature_HasDSP | 0, // PRECRQ_PH_W = 2140
9916 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_PH_W_MM = 2141
9917 : Feature_HasDSP | 0, // PRECRQ_QB_PH = 2142
9918 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_QB_PH_MM = 2143
9919 : Feature_HasDSP | 0, // PRECRQ_RS_PH_W = 2144
9920 : Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_RS_PH_W_MM = 2145
9921 : Feature_HasDSPR2 | 0, // PRECR_QB_PH = 2146
9922 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_QB_PH_MMR2 = 2147
9923 : Feature_HasDSPR2 | 0, // PRECR_SRA_PH_W = 2148
9924 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_SRA_PH_W_MMR2 = 2149
9925 : Feature_HasDSPR2 | 0, // PRECR_SRA_R_PH_W = 2150
9926 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_SRA_R_PH_W_MMR2 = 2151
9927 : Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PREF = 2152
9928 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // PREFE = 2153
9929 : Feature_InMicroMips | Feature_HasEVA | 0, // PREFE_MM = 2154
9930 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PREFX_MM = 2155
9931 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // PREF_MM = 2156
9932 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // PREF_MMR6 = 2157
9933 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // PREF_R6 = 2158
9934 : Feature_HasDSPR2 | 0, // PREPEND = 2159
9935 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // PREPEND_MMR2 = 2160
9936 : Feature_HasDSP | 0, // RADDU_W_QB = 2161
9937 : Feature_InMicroMips | Feature_HasDSP | 0, // RADDU_W_QB_MM = 2162
9938 : Feature_HasDSP | 0, // RDDSP = 2163
9939 : Feature_InMicroMips | Feature_HasDSP | 0, // RDDSP_MM = 2164
9940 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // RDHWR = 2165
9941 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // RDHWR64 = 2166
9942 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // RDHWR_MM = 2167
9943 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // RDHWR_MMR6 = 2168
9944 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // RDPGPR_MMR6 = 2169
9945 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_D32 = 2170
9946 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // RECIP_D32_MM = 2171
9947 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_D64 = 2172
9948 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // RECIP_D64_MM = 2173
9949 : Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_S = 2174
9950 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // RECIP_S_MM = 2175
9951 : Feature_HasDSP | 0, // REPLV_PH = 2176
9952 : Feature_InMicroMips | Feature_HasDSP | 0, // REPLV_PH_MM = 2177
9953 : Feature_HasDSP | 0, // REPLV_QB = 2178
9954 : Feature_InMicroMips | Feature_HasDSP | 0, // REPLV_QB_MM = 2179
9955 : Feature_HasDSP | 0, // REPL_PH = 2180
9956 : Feature_InMicroMips | Feature_HasDSP | 0, // REPL_PH_MM = 2181
9957 : Feature_HasDSP | 0, // REPL_QB = 2182
9958 : Feature_InMicroMips | Feature_HasDSP | 0, // REPL_QB_MM = 2183
9959 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RINT_D = 2184
9960 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // RINT_D_MMR6 = 2185
9961 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RINT_S = 2186
9962 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // RINT_S_MMR6 = 2187
9963 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // ROTR = 2188
9964 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // ROTRV = 2189
9965 : Feature_InMicroMips | 0, // ROTRV_MM = 2190
9966 : Feature_InMicroMips | 0, // ROTR_MM = 2191
9967 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_L_D64 = 2192
9968 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_L_D_MMR6 = 2193
9969 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_L_S = 2194
9970 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_L_S_MMR6 = 2195
9971 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_D32 = 2196
9972 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_D64 = 2197
9973 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_W_D_MMR6 = 2198
9974 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // ROUND_W_MM = 2199
9975 : Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_S = 2200
9976 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // ROUND_W_S_MM = 2201
9977 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_W_S_MMR6 = 2202
9978 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_D32 = 2203
9979 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // RSQRT_D32_MM = 2204
9980 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_D64 = 2205
9981 : Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // RSQRT_D64_MM = 2206
9982 : Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_S = 2207
9983 : Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // RSQRT_S_MM = 2208
9984 : Feature_InMips16Mode | 0, // Restore16 = 2209
9985 : Feature_InMips16Mode | 0, // RestoreX16 = 2210
9986 : Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_B = 2211
9987 : Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_D = 2212
9988 : Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_H = 2213
9989 : Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_W = 2214
9990 : Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_B = 2215
9991 : Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_D = 2216
9992 : Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_H = 2217
9993 : Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_W = 2218
9994 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SB = 2219
9995 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SB16_MM = 2220
9996 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SB16_MMR6 = 2221
9997 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SB64 = 2222
9998 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SBE = 2223
9999 : Feature_InMicroMips | Feature_HasEVA | 0, // SBE_MM = 2224
10000 : Feature_InMicroMips | 0, // SB_MM = 2225
10001 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SB_MMR6 = 2226
10002 : Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SC = 2227
10003 : Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SC64 = 2228
10004 : Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // SC64_R6 = 2229
10005 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SCD = 2230
10006 : Feature_HasStdEnc | Feature_HasMips32r6 | 0, // SCD_R6 = 2231
10007 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SCE = 2232
10008 : Feature_InMicroMips | Feature_HasEVA | 0, // SCE_MM = 2233
10009 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SC_MM = 2234
10010 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SC_MMR6 = 2235
10011 : Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SC_R6 = 2236
10012 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // SD = 2237
10013 : Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDBBP = 2238
10014 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SDBBP16_MM = 2239
10015 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDBBP16_MMR6 = 2240
10016 : Feature_InMicroMips | 0, // SDBBP_MM = 2241
10017 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDBBP_MMR6 = 2242
10018 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SDBBP_R6 = 2243
10019 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDC1 = 2244
10020 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDC164 = 2245
10021 : Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // SDC1_D64_MMR6 = 2246
10022 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // SDC1_MM = 2247
10023 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDC2 = 2248
10024 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDC2_MMR6 = 2249
10025 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SDC2_R6 = 2250
10026 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // SDC3 = 2251
10027 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDIV = 2252
10028 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SDIV_MM = 2253
10029 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDL = 2254
10030 : Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDR = 2255
10031 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDXC1 = 2256
10032 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // SDXC164 = 2257
10033 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SEB = 2258
10034 : Feature_HasStdEnc | Feature_HasMips32r2 | 0, // SEB64 = 2259
10035 : Feature_InMicroMips | 0, // SEB_MM = 2260
10036 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SEH = 2261
10037 : Feature_HasStdEnc | Feature_HasMips32r2 | 0, // SEH64 = 2262
10038 : Feature_InMicroMips | 0, // SEH_MM = 2263
10039 : Feature_HasStdEnc | Feature_IsGP32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SELEQZ = 2264
10040 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips32r6 | 0, // SELEQZ64 = 2265
10041 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELEQZ_D = 2266
10042 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_D_MMR6 = 2267
10043 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_MMR6 = 2268
10044 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELEQZ_S = 2269
10045 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_S_MMR6 = 2270
10046 : Feature_HasStdEnc | Feature_IsGP32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SELNEZ = 2271
10047 : Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips32r6 | 0, // SELNEZ64 = 2272
10048 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELNEZ_D = 2273
10049 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_D_MMR6 = 2274
10050 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_MMR6 = 2275
10051 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELNEZ_S = 2276
10052 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_S_MMR6 = 2277
10053 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SEL_D = 2278
10054 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SEL_D_MMR6 = 2279
10055 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SEL_S = 2280
10056 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SEL_S_MMR6 = 2281
10057 : Feature_HasCnMips | 0, // SEQ = 2282
10058 : Feature_HasCnMips | 0, // SEQi = 2283
10059 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SH = 2284
10060 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SH16_MM = 2285
10061 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SH16_MMR6 = 2286
10062 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SH64 = 2287
10063 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SHE = 2288
10064 : Feature_InMicroMips | Feature_HasEVA | 0, // SHE_MM = 2289
10065 : Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_B = 2290
10066 : Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_H = 2291
10067 : Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_W = 2292
10068 : Feature_HasDSP | 0, // SHILO = 2293
10069 : Feature_HasDSP | 0, // SHILOV = 2294
10070 : Feature_InMicroMips | Feature_HasDSP | 0, // SHILOV_MM = 2295
10071 : Feature_InMicroMips | Feature_HasDSP | 0, // SHILO_MM = 2296
10072 : Feature_HasDSP | 0, // SHLLV_PH = 2297
10073 : Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_PH_MM = 2298
10074 : Feature_HasDSP | 0, // SHLLV_QB = 2299
10075 : Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_QB_MM = 2300
10076 : Feature_HasDSP | 0, // SHLLV_S_PH = 2301
10077 : Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_S_PH_MM = 2302
10078 : Feature_HasDSP | 0, // SHLLV_S_W = 2303
10079 : Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_S_W_MM = 2304
10080 : Feature_HasDSP | 0, // SHLL_PH = 2305
10081 : Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_PH_MM = 2306
10082 : Feature_HasDSP | 0, // SHLL_QB = 2307
10083 : Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_QB_MM = 2308
10084 : Feature_HasDSP | 0, // SHLL_S_PH = 2309
10085 : Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_S_PH_MM = 2310
10086 : Feature_HasDSP | 0, // SHLL_S_W = 2311
10087 : Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_S_W_MM = 2312
10088 : Feature_HasDSP | 0, // SHRAV_PH = 2313
10089 : Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_PH_MM = 2314
10090 : Feature_HasDSPR2 | 0, // SHRAV_QB = 2315
10091 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRAV_QB_MMR2 = 2316
10092 : Feature_HasDSP | 0, // SHRAV_R_PH = 2317
10093 : Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_R_PH_MM = 2318
10094 : Feature_HasDSPR2 | 0, // SHRAV_R_QB = 2319
10095 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRAV_R_QB_MMR2 = 2320
10096 : Feature_HasDSP | 0, // SHRAV_R_W = 2321
10097 : Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_R_W_MM = 2322
10098 : Feature_HasDSP | 0, // SHRA_PH = 2323
10099 : Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_PH_MM = 2324
10100 : Feature_HasDSPR2 | 0, // SHRA_QB = 2325
10101 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRA_QB_MMR2 = 2326
10102 : Feature_HasDSP | 0, // SHRA_R_PH = 2327
10103 : Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_R_PH_MM = 2328
10104 : Feature_HasDSPR2 | 0, // SHRA_R_QB = 2329
10105 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRA_R_QB_MMR2 = 2330
10106 : Feature_HasDSP | 0, // SHRA_R_W = 2331
10107 : Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_R_W_MM = 2332
10108 : Feature_HasDSPR2 | 0, // SHRLV_PH = 2333
10109 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRLV_PH_MMR2 = 2334
10110 : Feature_HasDSP | 0, // SHRLV_QB = 2335
10111 : Feature_InMicroMips | Feature_HasDSP | 0, // SHRLV_QB_MM = 2336
10112 : Feature_HasDSPR2 | 0, // SHRL_PH = 2337
10113 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRL_PH_MMR2 = 2338
10114 : Feature_HasDSP | 0, // SHRL_QB = 2339
10115 : Feature_InMicroMips | Feature_HasDSP | 0, // SHRL_QB_MM = 2340
10116 : Feature_InMicroMips | 0, // SH_MM = 2341
10117 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SH_MMR6 = 2342
10118 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_B = 2343
10119 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_D = 2344
10120 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_H = 2345
10121 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_W = 2346
10122 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_B = 2347
10123 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_D = 2348
10124 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_H = 2349
10125 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_W = 2350
10126 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLL = 2351
10127 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SLL16_MM = 2352
10128 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SLL16_MMR6 = 2353
10129 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLL64_32 = 2354
10130 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLL64_64 = 2355
10131 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_B = 2356
10132 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_D = 2357
10133 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_H = 2358
10134 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_W = 2359
10135 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLLV = 2360
10136 : Feature_InMicroMips | 0, // SLLV_MM = 2361
10137 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_B = 2362
10138 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_D = 2363
10139 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_H = 2364
10140 : Feature_InMicroMips | 0, // SLL_MM = 2365
10141 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SLL_MMR6 = 2366
10142 : Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_W = 2367
10143 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLT = 2368
10144 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLT64 = 2369
10145 : Feature_InMicroMips | 0, // SLT_MM = 2370
10146 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTi = 2371
10147 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTi64 = 2372
10148 : Feature_InMicroMips | 0, // SLTi_MM = 2373
10149 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTiu = 2374
10150 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTiu64 = 2375
10151 : Feature_InMicroMips | 0, // SLTiu_MM = 2376
10152 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTu = 2377
10153 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTu64 = 2378
10154 : Feature_InMicroMips | 0, // SLTu_MM = 2379
10155 : Feature_HasCnMips | 0, // SNE = 2380
10156 : Feature_HasCnMips | 0, // SNEi = 2381
10157 : Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_B = 2382
10158 : Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_D = 2383
10159 : Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_H = 2384
10160 : Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_W = 2385
10161 : Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_B = 2386
10162 : Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_D = 2387
10163 : Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_H = 2388
10164 : Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_W = 2389
10165 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRA = 2390
10166 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_B = 2391
10167 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_D = 2392
10168 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_H = 2393
10169 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_W = 2394
10170 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_B = 2395
10171 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_D = 2396
10172 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_H = 2397
10173 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_W = 2398
10174 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_B = 2399
10175 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_D = 2400
10176 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_H = 2401
10177 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_W = 2402
10178 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRAV = 2403
10179 : Feature_InMicroMips | 0, // SRAV_MM = 2404
10180 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_B = 2405
10181 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_D = 2406
10182 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_H = 2407
10183 : Feature_InMicroMips | 0, // SRA_MM = 2408
10184 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_W = 2409
10185 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRL = 2410
10186 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SRL16_MM = 2411
10187 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SRL16_MMR6 = 2412
10188 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_B = 2413
10189 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_D = 2414
10190 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_H = 2415
10191 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_W = 2416
10192 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_B = 2417
10193 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_D = 2418
10194 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_H = 2419
10195 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_W = 2420
10196 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_B = 2421
10197 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_D = 2422
10198 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_H = 2423
10199 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_W = 2424
10200 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRLV = 2425
10201 : Feature_InMicroMips | 0, // SRLV_MM = 2426
10202 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_B = 2427
10203 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_D = 2428
10204 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_H = 2429
10205 : Feature_InMicroMips | 0, // SRL_MM = 2430
10206 : Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_W = 2431
10207 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SSNOP = 2432
10208 : Feature_InMicroMips | 0, // SSNOP_MM = 2433
10209 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SSNOP_MMR6 = 2434
10210 : Feature_HasStdEnc | Feature_HasMSA | 0, // ST_B = 2435
10211 : Feature_HasStdEnc | Feature_HasMSA | 0, // ST_D = 2436
10212 : Feature_HasStdEnc | Feature_HasMSA | 0, // ST_H = 2437
10213 : Feature_HasStdEnc | Feature_HasMSA | 0, // ST_W = 2438
10214 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SUB = 2439
10215 : Feature_HasDSPR2 | 0, // SUBQH_PH = 2440
10216 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_PH_MMR2 = 2441
10217 : Feature_HasDSPR2 | 0, // SUBQH_R_PH = 2442
10218 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_R_PH_MMR2 = 2443
10219 : Feature_HasDSPR2 | 0, // SUBQH_R_W = 2444
10220 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_R_W_MMR2 = 2445
10221 : Feature_HasDSPR2 | 0, // SUBQH_W = 2446
10222 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_W_MMR2 = 2447
10223 : Feature_HasDSP | 0, // SUBQ_PH = 2448
10224 : Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_PH_MM = 2449
10225 : Feature_HasDSP | 0, // SUBQ_S_PH = 2450
10226 : Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_S_PH_MM = 2451
10227 : Feature_HasDSP | 0, // SUBQ_S_W = 2452
10228 : Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_S_W_MM = 2453
10229 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_B = 2454
10230 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_D = 2455
10231 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_H = 2456
10232 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_W = 2457
10233 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_B = 2458
10234 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_D = 2459
10235 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_H = 2460
10236 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_W = 2461
10237 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_B = 2462
10238 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_D = 2463
10239 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_H = 2464
10240 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_W = 2465
10241 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_B = 2466
10242 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_D = 2467
10243 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_H = 2468
10244 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_W = 2469
10245 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUBU16_MM = 2470
10246 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUBU16_MMR6 = 2471
10247 : Feature_HasDSPR2 | 0, // SUBUH_QB = 2472
10248 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBUH_QB_MMR2 = 2473
10249 : Feature_HasDSPR2 | 0, // SUBUH_R_QB = 2474
10250 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBUH_R_QB_MMR2 = 2475
10251 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUBU_MMR6 = 2476
10252 : Feature_HasDSPR2 | 0, // SUBU_PH = 2477
10253 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBU_PH_MMR2 = 2478
10254 : Feature_HasDSP | 0, // SUBU_QB = 2479
10255 : Feature_InMicroMips | Feature_HasDSP | 0, // SUBU_QB_MM = 2480
10256 : Feature_HasDSPR2 | 0, // SUBU_S_PH = 2481
10257 : Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBU_S_PH_MMR2 = 2482
10258 : Feature_HasDSP | 0, // SUBU_S_QB = 2483
10259 : Feature_InMicroMips | Feature_HasDSP | 0, // SUBU_S_QB_MM = 2484
10260 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_B = 2485
10261 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_D = 2486
10262 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_H = 2487
10263 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_W = 2488
10264 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_B = 2489
10265 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_D = 2490
10266 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_H = 2491
10267 : Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_W = 2492
10268 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUB_MM = 2493
10269 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUB_MMR6 = 2494
10270 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SUBu = 2495
10271 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUBu_MM = 2496
10272 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SUXC1 = 2497
10273 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SUXC164 = 2498
10274 : Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // SUXC1_MM = 2499
10275 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SW = 2500
10276 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SW16_MM = 2501
10277 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SW16_MMR6 = 2502
10278 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SW64 = 2503
10279 : Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SWC1 = 2504
10280 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // SWC1_MM = 2505
10281 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWC2 = 2506
10282 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWC2_MMR6 = 2507
10283 : Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SWC2_R6 = 2508
10284 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // SWC3 = 2509
10285 : Feature_NotInMips16Mode | Feature_HasDSP | 0, // SWDSP = 2510
10286 : Feature_InMicroMips | Feature_HasDSP | 0, // SWDSP_MM = 2511
10287 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWE = 2512
10288 : Feature_InMicroMips | Feature_HasEVA | 0, // SWE_MM = 2513
10289 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWL = 2514
10290 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SWL64 = 2515
10291 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWLE = 2516
10292 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // SWLE_MM = 2517
10293 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWL_MM = 2518
10294 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWM16_MM = 2519
10295 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWM16_MMR6 = 2520
10296 : Feature_InMicroMips | 0, // SWM32_MM = 2521
10297 : Feature_InMicroMips | 0, // SWP_MM = 2522
10298 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWR = 2523
10299 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SWR64 = 2524
10300 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWRE = 2525
10301 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // SWRE_MM = 2526
10302 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWR_MM = 2527
10303 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWSP_MM = 2528
10304 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWSP_MMR6 = 2529
10305 : Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // SWXC1 = 2530
10306 : Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // SWXC1_MM = 2531
10307 : Feature_InMicroMips | 0, // SW_MM = 2532
10308 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SW_MMR6 = 2533
10309 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // SYNC = 2534
10310 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SYNCI = 2535
10311 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // SYNCI_MM = 2536
10312 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SYNCI_MMR6 = 2537
10313 : Feature_InMicroMips | 0, // SYNC_MM = 2538
10314 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // SYNC_MMR6 = 2539
10315 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SYSCALL = 2540
10316 : Feature_InMicroMips | 0, // SYSCALL_MM = 2541
10317 : Feature_InMips16Mode | 0, // Save16 = 2542
10318 : Feature_InMips16Mode | 0, // SaveX16 = 2543
10319 : Feature_InMips16Mode | 0, // SbRxRyOffMemX16 = 2544
10320 : Feature_InMips16Mode | 0, // SebRx16 = 2545
10321 : Feature_InMips16Mode | 0, // SehRx16 = 2546
10322 : Feature_InMips16Mode | 0, // ShRxRyOffMemX16 = 2547
10323 : Feature_InMips16Mode | 0, // SllX16 = 2548
10324 : Feature_InMips16Mode | 0, // SllvRxRy16 = 2549
10325 : Feature_InMips16Mode | 0, // SltRxRy16 = 2550
10326 : Feature_InMips16Mode | 0, // SltiRxImm16 = 2551
10327 : Feature_InMips16Mode | 0, // SltiRxImmX16 = 2552
10328 : Feature_InMips16Mode | 0, // SltiuRxImm16 = 2553
10329 : Feature_InMips16Mode | 0, // SltiuRxImmX16 = 2554
10330 : Feature_InMips16Mode | 0, // SltuRxRy16 = 2555
10331 : Feature_InMips16Mode | 0, // SraX16 = 2556
10332 : Feature_InMips16Mode | 0, // SravRxRy16 = 2557
10333 : Feature_InMips16Mode | 0, // SrlX16 = 2558
10334 : Feature_InMips16Mode | 0, // SrlvRxRy16 = 2559
10335 : Feature_InMips16Mode | 0, // SubuRxRyRz16 = 2560
10336 : Feature_InMips16Mode | 0, // SwRxRyOffMemX16 = 2561
10337 : Feature_InMips16Mode | 0, // SwRxSpImmX16 = 2562
10338 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TEQ = 2563
10339 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TEQI = 2564
10340 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // TEQI_MM = 2565
10341 : Feature_InMicroMips | 0, // TEQ_MM = 2566
10342 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TGE = 2567
10343 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TGEI = 2568
10344 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TGEIU = 2569
10345 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // TGEIU_MM = 2570
10346 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // TGEI_MM = 2571
10347 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TGEU = 2572
10348 : Feature_InMicroMips | 0, // TGEU_MM = 2573
10349 : Feature_InMicroMips | 0, // TGE_MM = 2574
10350 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGINV = 2575
10351 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGINVF = 2576
10352 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGINVF_MM = 2577
10353 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGINV_MM = 2578
10354 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGP = 2579
10355 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGP_MM = 2580
10356 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGR = 2581
10357 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGR_MM = 2582
10358 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGWI = 2583
10359 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGWI_MM = 2584
10360 : Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGWR = 2585
10361 : Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGWR_MM = 2586
10362 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // TLBINV = 2587
10363 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // TLBINVF = 2588
10364 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // TLBINVF_MMR6 = 2589
10365 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // TLBINV_MMR6 = 2590
10366 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBP = 2591
10367 : Feature_InMicroMips | 0, // TLBP_MM = 2592
10368 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBR = 2593
10369 : Feature_InMicroMips | 0, // TLBR_MM = 2594
10370 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBWI = 2595
10371 : Feature_InMicroMips | 0, // TLBWI_MM = 2596
10372 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBWR = 2597
10373 : Feature_InMicroMips | 0, // TLBWR_MM = 2598
10374 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TLT = 2599
10375 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TLTI = 2600
10376 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // TLTIU_MM = 2601
10377 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // TLTI_MM = 2602
10378 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TLTU = 2603
10379 : Feature_InMicroMips | 0, // TLTU_MM = 2604
10380 : Feature_InMicroMips | 0, // TLT_MM = 2605
10381 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TNE = 2606
10382 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TNEI = 2607
10383 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // TNEI_MM = 2608
10384 : Feature_InMicroMips | 0, // TNE_MM = 2609
10385 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_L_D64 = 2610
10386 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_L_D_MMR6 = 2611
10387 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_L_S = 2612
10388 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_L_S_MMR6 = 2613
10389 : Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_D32 = 2614
10390 : Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_D64 = 2615
10391 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_W_D_MMR6 = 2616
10392 : Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // TRUNC_W_MM = 2617
10393 : Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_S = 2618
10394 : Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // TRUNC_W_S_MM = 2619
10395 : Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_W_S_MMR6 = 2620
10396 : Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TTLTIU = 2621
10397 : Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // UDIV = 2622
10398 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // UDIV_MM = 2623
10399 : Feature_HasCnMips | 0, // V3MULU = 2624
10400 : Feature_HasCnMips | 0, // VMM0 = 2625
10401 : Feature_HasCnMips | 0, // VMULU = 2626
10402 : Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_B = 2627
10403 : Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_D = 2628
10404 : Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_H = 2629
10405 : Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_W = 2630
10406 : Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotInMicroMips | 0, // WAIT = 2631
10407 : Feature_InMicroMips | 0, // WAIT_MM = 2632
10408 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // WAIT_MMR6 = 2633
10409 : Feature_HasDSP | Feature_NotInMicroMips | 0, // WRDSP = 2634
10410 : Feature_InMicroMips | Feature_HasDSP | 0, // WRDSP_MM = 2635
10411 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // WRPGPR_MMR6 = 2636
10412 : Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // WSBH = 2637
10413 : Feature_InMicroMips | 0, // WSBH_MM = 2638
10414 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // WSBH_MMR6 = 2639
10415 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // XOR = 2640
10416 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // XOR16_MM = 2641
10417 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // XOR16_MMR6 = 2642
10418 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // XOR64 = 2643
10419 : Feature_HasStdEnc | Feature_HasMSA | 0, // XORI_B = 2644
10420 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // XORI_MMR6 = 2645
10421 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // XOR_MM = 2646
10422 : Feature_InMicroMips | Feature_HasMips32r6 | 0, // XOR_MMR6 = 2647
10423 : Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V = 2648
10424 : Feature_HasStdEnc | Feature_NotInMicroMips | 0, // XORi = 2649
10425 : Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // XORi64 = 2650
10426 : Feature_InMicroMips | Feature_NotMips32r6 | 0, // XORi_MM = 2651
10427 : Feature_InMips16Mode | 0, // XorRxRxRy16 = 2652
10428 : Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // YIELD = 2653
10429 : };
10430 :
10431 : assert(Inst.getOpcode() < 2654);
10432 : uint64_t MissingFeatures =
10433 : (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
10434 : RequiredFeatures[Inst.getOpcode()];
10435 : if (MissingFeatures) {
10436 : std::ostringstream Msg;
10437 : Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
10438 : << " instruction but the ";
10439 : for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
10440 : if (MissingFeatures & (1ULL << i))
10441 : Msg << SubtargetFeatureNames[i] << " ";
10442 : Msg << "predicate(s) are not met";
10443 : report_fatal_error(Msg.str());
10444 : }
10445 : #else
10446 : // Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
10447 : (void)MCII;
10448 : #endif // NDEBUG
10449 : }
10450 : #endif
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