LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/Sparc - SparcGenAsmMatcher.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 267 479 55.7 %
Date: 2018-06-17 00:07:59 Functions: 9 10 90.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Assembly Matcher Source Fragment                                           *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : 
      10             : #ifdef GET_ASSEMBLER_HEADER
      11             : #undef GET_ASSEMBLER_HEADER
      12             :   // This should be included into the middle of the declaration of
      13             :   // your subclasses implementation of MCTargetAsmParser.
      14             :   uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
      15             :   void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
      16             :                        const OperandVector &Operands);
      17             :   void convertToMapAndConstraints(unsigned Kind,
      18             :                            const OperandVector &Operands) override;
      19             :   unsigned MatchInstructionImpl(const OperandVector &Operands,
      20             :                                 MCInst &Inst,
      21             :                                 uint64_t &ErrorInfo,
      22             :                                 bool matchingInlineAsm,
      23             :                                 unsigned VariantID = 0);
      24             :   OperandMatchResultTy MatchOperandParserImpl(
      25             :     OperandVector &Operands,
      26             :     StringRef Mnemonic,
      27             :     bool ParseForAllFeatures = false);
      28             :   OperandMatchResultTy tryCustomParseOperand(
      29             :     OperandVector &Operands,
      30             :     unsigned MCK);
      31             : 
      32             : #endif // GET_ASSEMBLER_HEADER_INFO
      33             : 
      34             : 
      35             : #ifdef GET_OPERAND_DIAGNOSTIC_TYPES
      36             : #undef GET_OPERAND_DIAGNOSTIC_TYPES
      37             : 
      38             : #endif // GET_OPERAND_DIAGNOSTIC_TYPES
      39             : 
      40             : 
      41             : #ifdef GET_REGISTER_MATCHER
      42             : #undef GET_REGISTER_MATCHER
      43             : 
      44             : // Flags for subtarget features that participate in instruction matching.
      45             : enum SubtargetFeatureFlag : uint8_t {
      46             :   Feature_UseSoftMulDiv = (1ULL << 4),
      47             :   Feature_HasV9 = (1ULL << 0),
      48             :   Feature_HasVIS = (1ULL << 1),
      49             :   Feature_HasVIS2 = (1ULL << 2),
      50             :   Feature_HasVIS3 = (1ULL << 3),
      51             :   Feature_None = 0
      52             : };
      53             : 
      54             : #endif // GET_REGISTER_MATCHER
      55             : 
      56             : 
      57             : #ifdef GET_SUBTARGET_FEATURE_NAME
      58             : #undef GET_SUBTARGET_FEATURE_NAME
      59             : 
      60             : // User-level names for subtarget features that participate in
      61             : // instruction matching.
      62             : static const char *getSubtargetFeatureName(uint64_t Val) {
      63             :   switch(Val) {
      64             :   case Feature_UseSoftMulDiv: return "";
      65             :   case Feature_HasV9: return "";
      66             :   case Feature_HasVIS: return "";
      67             :   case Feature_HasVIS2: return "";
      68             :   case Feature_HasVIS3: return "";
      69             :   default: return "(unknown)";
      70             :   }
      71             : }
      72             : 
      73             : #endif // GET_SUBTARGET_FEATURE_NAME
      74             : 
      75             : 
      76             : #ifdef GET_MATCHER_IMPLEMENTATION
      77             : #undef GET_MATCHER_IMPLEMENTATION
      78             : 
      79        3536 : static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
      80        3536 :   switch (VariantID) {
      81             :     case 0:
      82        3536 :       switch (Mnemonic.size()) {
      83             :       default: break;
      84        1000 :       case 4:    // 7 strings to match.
      85        2000 :         switch (Mnemonic[0]) {
      86             :         default: break;
      87             :         case 'a':        // 1 string to match.
      88          12 :           if (memcmp(Mnemonic.data()+1, "ddc", 3) != 0)
      89             :             break;
      90           4 :           if ((Features & Feature_HasV9) == Feature_HasV9)   // "addc"
      91           2 :             Mnemonic = "addx";
      92             :           return;
      93             :         case 'l':        // 1 string to match.
      94          76 :           if (memcmp(Mnemonic.data()+1, "duw", 3) != 0)
      95             :             break;
      96          12 :           if ((Features & Feature_HasV9) == Feature_HasV9)   // "lduw"
      97           6 :             Mnemonic = "ld";
      98             :           return;
      99         104 :         case 's':        // 5 strings to match.
     100         104 :           switch (Mnemonic[1]) {
     101             :           default: break;
     102          36 :           case 't':      // 4 strings to match.
     103          36 :             switch (Mnemonic[2]) {
     104             :             default: break;
     105           8 :             case 's':    // 2 strings to match.
     106           8 :               switch (Mnemonic[3]) {
     107             :               default: break;
     108             :               case 'b':  // 1 string to match.
     109           4 :                 Mnemonic = "stb";      // "stsb"
     110           4 :                 return;
     111             :               case 'h':  // 1 string to match.
     112           4 :                 Mnemonic = "sth";      // "stsh"
     113           4 :                 return;
     114             :               }
     115             :               break;
     116           8 :             case 'u':    // 2 strings to match.
     117           8 :               switch (Mnemonic[3]) {
     118             :               default: break;
     119             :               case 'b':  // 1 string to match.
     120           4 :                 Mnemonic = "stb";      // "stub"
     121           4 :                 return;
     122             :               case 'h':  // 1 string to match.
     123           4 :                 Mnemonic = "sth";      // "stuh"
     124           4 :                 return;
     125             :               }
     126             :               break;
     127             :             }
     128             :             break;
     129             :           case 'u':      // 1 string to match.
     130           8 :             if (memcmp(Mnemonic.data()+2, "bc", 2) != 0)
     131             :               break;
     132           4 :             if ((Features & Feature_HasV9) == Feature_HasV9)         // "subc"
     133           2 :               Mnemonic = "subx";
     134             :             return;
     135             :           }
     136             :           break;
     137             :         }
     138             :         break;
     139         460 :       case 5:    // 5 strings to match.
     140         920 :         switch (Mnemonic[0]) {
     141             :         default: break;
     142             :         case 'l':        // 1 string to match.
     143          20 :           if (memcmp(Mnemonic.data()+1, "duwa", 4) != 0)
     144             :             break;
     145           4 :           if ((Features & Feature_HasV9) == Feature_HasV9)   // "lduwa"
     146           2 :             Mnemonic = "lda";
     147             :           return;
     148         112 :         case 's':        // 4 strings to match.
     149         112 :           if (Mnemonic[1] != 't')
     150             :             break;
     151          20 :           switch (Mnemonic[2]) {
     152             :           default: break;
     153           8 :           case 's':      // 2 strings to match.
     154           8 :             switch (Mnemonic[3]) {
     155             :             default: break;
     156           4 :             case 'b':    // 1 string to match.
     157           4 :               if (Mnemonic[4] != 'a')
     158             :                 break;
     159           4 :               Mnemonic = "stba";       // "stsba"
     160           4 :               return;
     161           4 :             case 'h':    // 1 string to match.
     162           4 :               if (Mnemonic[4] != 'a')
     163             :                 break;
     164           4 :               Mnemonic = "stha";       // "stsha"
     165           4 :               return;
     166             :             }
     167             :             break;
     168           8 :           case 'u':      // 2 strings to match.
     169           8 :             switch (Mnemonic[3]) {
     170             :             default: break;
     171           4 :             case 'b':    // 1 string to match.
     172           4 :               if (Mnemonic[4] != 'a')
     173             :                 break;
     174           4 :               Mnemonic = "stba";       // "stuba"
     175           4 :               return;
     176           4 :             case 'h':    // 1 string to match.
     177           4 :               if (Mnemonic[4] != 'a')
     178             :                 break;
     179           4 :               Mnemonic = "stha";       // "stuha"
     180           4 :               return;
     181             :             }
     182             :             break;
     183             :           }
     184             :           break;
     185             :         }
     186             :         break;
     187         148 :       case 6:    // 4 strings to match.
     188         296 :         switch (Mnemonic[0]) {
     189             :         default: break;
     190             :         case 'a':        // 1 string to match.
     191          12 :           if (memcmp(Mnemonic.data()+1, "ddccc", 5) != 0)
     192             :             break;
     193           4 :           if ((Features & Feature_HasV9) == Feature_HasV9)   // "addccc"
     194           2 :             Mnemonic = "addxcc";
     195             :           return;
     196             :         case 'i':        // 1 string to match.
     197           4 :           if (memcmp(Mnemonic.data()+1, "flush", 5) != 0)
     198             :             break;
     199           4 :           Mnemonic = "flush";  // "iflush"
     200           4 :           return;
     201             :         case 'r':        // 1 string to match.
     202           2 :           if (memcmp(Mnemonic.data()+1, "eturn", 5) != 0)
     203             :             break;
     204           2 :           if ((Features & Feature_HasV9) == Feature_HasV9)   // "return"
     205           2 :             Mnemonic = "rett";
     206             :           return;
     207             :         case 's':        // 1 string to match.
     208          16 :           if (memcmp(Mnemonic.data()+1, "ubccc", 5) != 0)
     209             :             break;
     210           4 :           if ((Features & Feature_HasV9) == Feature_HasV9)   // "subccc"
     211           2 :             Mnemonic = "subxcc";
     212             :           return;
     213             :         }
     214             :         break;
     215             :       }
     216             :     break;
     217             :   }
     218        3466 :   switch (Mnemonic.size()) {
     219             :   default: break;
     220         964 :   case 4:        // 7 strings to match.
     221        1928 :     switch (Mnemonic[0]) {
     222             :     default: break;
     223             :     case 'a':    // 1 string to match.
     224           8 :       if (memcmp(Mnemonic.data()+1, "ddc", 3) != 0)
     225             :         break;
     226           0 :       if ((Features & Feature_HasV9) == Feature_HasV9)       // "addc"
     227           0 :         Mnemonic = "addx";
     228             :       return;
     229             :     case 'l':    // 1 string to match.
     230          64 :       if (memcmp(Mnemonic.data()+1, "duw", 3) != 0)
     231             :         break;
     232           0 :       if ((Features & Feature_HasV9) == Feature_HasV9)       // "lduw"
     233           0 :         Mnemonic = "ld";
     234             :       return;
     235          84 :     case 's':    // 5 strings to match.
     236          84 :       switch (Mnemonic[1]) {
     237             :       default: break;
     238          20 :       case 't':  // 4 strings to match.
     239          20 :         switch (Mnemonic[2]) {
     240             :         default: break;
     241           0 :         case 's':        // 2 strings to match.
     242           0 :           switch (Mnemonic[3]) {
     243             :           default: break;
     244             :           case 'b':      // 1 string to match.
     245           0 :             Mnemonic = "stb";  // "stsb"
     246           0 :             return;
     247             :           case 'h':      // 1 string to match.
     248           0 :             Mnemonic = "sth";  // "stsh"
     249           0 :             return;
     250             :           }
     251             :           break;
     252           0 :         case 'u':        // 2 strings to match.
     253           0 :           switch (Mnemonic[3]) {
     254             :           default: break;
     255             :           case 'b':      // 1 string to match.
     256           0 :             Mnemonic = "stb";  // "stub"
     257           0 :             return;
     258             :           case 'h':      // 1 string to match.
     259           0 :             Mnemonic = "sth";  // "stuh"
     260           0 :             return;
     261             :           }
     262             :           break;
     263             :         }
     264             :         break;
     265             :       case 'u':  // 1 string to match.
     266           4 :         if (memcmp(Mnemonic.data()+2, "bc", 2) != 0)
     267             :           break;
     268           0 :         if ((Features & Feature_HasV9) == Feature_HasV9)     // "subc"
     269           0 :           Mnemonic = "subx";
     270             :         return;
     271             :       }
     272             :       break;
     273             :     }
     274             :     break;
     275         440 :   case 5:        // 5 strings to match.
     276         880 :     switch (Mnemonic[0]) {
     277             :     default: break;
     278             :     case 'l':    // 1 string to match.
     279          16 :       if (memcmp(Mnemonic.data()+1, "duwa", 4) != 0)
     280             :         break;
     281           0 :       if ((Features & Feature_HasV9) == Feature_HasV9)       // "lduwa"
     282           0 :         Mnemonic = "lda";
     283             :       return;
     284          96 :     case 's':    // 4 strings to match.
     285          96 :       if (Mnemonic[1] != 't')
     286             :         break;
     287           4 :       switch (Mnemonic[2]) {
     288             :       default: break;
     289           0 :       case 's':  // 2 strings to match.
     290           0 :         switch (Mnemonic[3]) {
     291             :         default: break;
     292           0 :         case 'b':        // 1 string to match.
     293           0 :           if (Mnemonic[4] != 'a')
     294             :             break;
     295           0 :           Mnemonic = "stba";   // "stsba"
     296           0 :           return;
     297           0 :         case 'h':        // 1 string to match.
     298           0 :           if (Mnemonic[4] != 'a')
     299             :             break;
     300           0 :           Mnemonic = "stha";   // "stsha"
     301           0 :           return;
     302             :         }
     303             :         break;
     304           0 :       case 'u':  // 2 strings to match.
     305           0 :         switch (Mnemonic[3]) {
     306             :         default: break;
     307           0 :         case 'b':        // 1 string to match.
     308           0 :           if (Mnemonic[4] != 'a')
     309             :             break;
     310           0 :           Mnemonic = "stba";   // "stuba"
     311           0 :           return;
     312           0 :         case 'h':        // 1 string to match.
     313           0 :           if (Mnemonic[4] != 'a')
     314             :             break;
     315           0 :           Mnemonic = "stha";   // "stuha"
     316           0 :           return;
     317             :         }
     318             :         break;
     319             :       }
     320             :       break;
     321             :     }
     322             :     break;
     323         134 :   case 6:        // 4 strings to match.
     324         268 :     switch (Mnemonic[0]) {
     325             :     default: break;
     326             :     case 'a':    // 1 string to match.
     327           8 :       if (memcmp(Mnemonic.data()+1, "ddccc", 5) != 0)
     328             :         break;
     329           0 :       if ((Features & Feature_HasV9) == Feature_HasV9)       // "addccc"
     330           0 :         Mnemonic = "addxcc";
     331             :       return;
     332             :     case 'i':    // 1 string to match.
     333           0 :       if (memcmp(Mnemonic.data()+1, "flush", 5) != 0)
     334             :         break;
     335           0 :       Mnemonic = "flush";      // "iflush"
     336           0 :       return;
     337             :     case 'r':    // 1 string to match.
     338           0 :       if (memcmp(Mnemonic.data()+1, "eturn", 5) != 0)
     339             :         break;
     340           0 :       if ((Features & Feature_HasV9) == Feature_HasV9)       // "return"
     341           0 :         Mnemonic = "rett";
     342             :       return;
     343             :     case 's':    // 1 string to match.
     344          12 :       if (memcmp(Mnemonic.data()+1, "ubccc", 5) != 0)
     345             :         break;
     346           0 :       if ((Features & Feature_HasV9) == Feature_HasV9)       // "subccc"
     347           0 :         Mnemonic = "subxcc";
     348             :       return;
     349             :     }
     350             :     break;
     351             :   }
     352             : }
     353             : 
     354             : enum {
     355             :   Tie0_1_1,
     356             :   Tie0_3_3,
     357             : };
     358             : 
     359             : const char TiedAsmOperandTable[][3] = {
     360             :   /* Tie0_1_1 */ { 0, 1, 1 },
     361             :   /* Tie0_3_3 */ { 0, 3, 3 },
     362             : };
     363             : 
     364             : namespace {
     365             : enum OperatorConversionKind {
     366             :   CVT_Done,
     367             :   CVT_Reg,
     368             :   CVT_Tied,
     369             :   CVT_95_Reg,
     370             :   CVT_95_addImmOperands,
     371             :   CVT_imm_95_8,
     372             :   CVT_imm_95_13,
     373             :   CVT_imm_95_5,
     374             :   CVT_imm_95_1,
     375             :   CVT_imm_95_10,
     376             :   CVT_imm_95_11,
     377             :   CVT_imm_95_12,
     378             :   CVT_imm_95_3,
     379             :   CVT_imm_95_2,
     380             :   CVT_imm_95_4,
     381             :   CVT_imm_95_0,
     382             :   CVT_imm_95_9,
     383             :   CVT_imm_95_6,
     384             :   CVT_imm_95_14,
     385             :   CVT_regG0,
     386             :   CVT_imm_95_15,
     387             :   CVT_imm_95_7,
     388             :   CVT_regO7,
     389             :   CVT_95_addMEMriOperands,
     390             :   CVT_95_addMEMrrOperands,
     391             :   CVT_regFCC0,
     392             :   CVT_NUM_CONVERTERS
     393             : };
     394             : 
     395             : enum InstructionConversionKind {
     396             :   Convert__Reg1_2__Reg1_0__Reg1_1,
     397             :   Convert__Reg1_2__Reg1_0__Imm1_1,
     398             :   Convert__Imm1_0__imm_95_8,
     399             :   Convert__Imm1_1__imm_95_8,
     400             :   Convert__Imm1_1__Imm1_0,
     401             :   Convert__Imm1_2__imm_95_8,
     402             :   Convert__Imm1_2__Imm1_0,
     403             :   Convert__Imm1_3__imm_95_8,
     404             :   Convert__Imm1_3__Imm1_0,
     405             :   Convert__Imm1_4__Imm1_0,
     406             :   Convert__Imm1_0,
     407             :   Convert__Imm1_0__imm_95_13,
     408             :   Convert__Imm1_1__imm_95_13,
     409             :   Convert__Imm1_2__imm_95_13,
     410             :   Convert__Imm1_3__imm_95_13,
     411             :   Convert__Reg1_1__Reg1_1__Reg1_0,
     412             :   Convert__Reg1_1__Reg1_1__Imm1_0,
     413             :   Convert__Imm1_0__imm_95_5,
     414             :   Convert__Imm1_1__imm_95_5,
     415             :   Convert__Imm1_2__imm_95_5,
     416             :   Convert__Imm1_3__imm_95_5,
     417             :   Convert__Imm1_0__imm_95_1,
     418             :   Convert__Imm1_1__imm_95_1,
     419             :   Convert__Imm1_2__imm_95_1,
     420             :   Convert__Imm1_3__imm_95_1,
     421             :   Convert__Imm1_0__imm_95_10,
     422             :   Convert__Imm1_1__imm_95_10,
     423             :   Convert__Imm1_2__imm_95_10,
     424             :   Convert__Imm1_3__imm_95_10,
     425             :   Convert__Imm1_0__imm_95_11,
     426             :   Convert__Imm1_1__imm_95_11,
     427             :   Convert__Imm1_2__imm_95_11,
     428             :   Convert__Imm1_3__imm_95_11,
     429             :   Convert__Imm1_0__imm_95_12,
     430             :   Convert__Imm1_1__imm_95_12,
     431             :   Convert__Imm1_2__imm_95_12,
     432             :   Convert__Imm1_3__imm_95_12,
     433             :   Convert__Imm1_0__imm_95_3,
     434             :   Convert__Imm1_1__imm_95_3,
     435             :   Convert__Imm1_2__imm_95_3,
     436             :   Convert__Imm1_3__imm_95_3,
     437             :   Convert__Imm1_0__imm_95_2,
     438             :   Convert__Imm1_1__imm_95_2,
     439             :   Convert__Imm1_2__imm_95_2,
     440             :   Convert__Imm1_3__imm_95_2,
     441             :   Convert__Imm1_0__imm_95_4,
     442             :   Convert__Imm1_1__imm_95_4,
     443             :   Convert__Imm1_2__imm_95_4,
     444             :   Convert__Imm1_3__imm_95_4,
     445             :   Convert__Imm1_0__imm_95_0,
     446             :   Convert__Imm1_1__imm_95_0,
     447             :   Convert__Imm1_2__imm_95_0,
     448             :   Convert__Imm1_3__imm_95_0,
     449             :   Convert__Imm1_0__imm_95_9,
     450             :   Convert__Imm1_1__imm_95_9,
     451             :   Convert__Imm1_2__imm_95_9,
     452             :   Convert__Imm1_3__imm_95_9,
     453             :   Convert__Imm1_0__imm_95_6,
     454             :   Convert__Imm1_1__imm_95_6,
     455             :   Convert__Imm1_2__imm_95_6,
     456             :   Convert__Imm1_3__imm_95_6,
     457             :   Convert__Imm1_0__imm_95_14,
     458             :   Convert__Imm1_1__imm_95_14,
     459             :   Convert__Imm1_2__imm_95_14,
     460             :   Convert__Imm1_3__imm_95_14,
     461             :   Convert__Reg1_0__Imm1_1,
     462             :   Convert__Reg1_1__Imm1_2,
     463             :   Convert__Reg1_2__Imm1_3,
     464             :   Convert__regG0__Reg1_1__Reg1_0,
     465             :   Convert__regG0__Reg1_1__Imm1_0,
     466             :   Convert__Imm1_0__imm_95_15,
     467             :   Convert__Imm1_1__imm_95_15,
     468             :   Convert__Imm1_2__imm_95_15,
     469             :   Convert__Imm1_3__imm_95_15,
     470             :   Convert__Imm1_0__imm_95_7,
     471             :   Convert__Imm1_1__imm_95_7,
     472             :   Convert__Imm1_2__imm_95_7,
     473             :   Convert__Imm1_3__imm_95_7,
     474             :   Convert__regO7__MEMri2_0,
     475             :   Convert__regO7__MEMrr2_0,
     476             :   Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1,
     477             :   Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1,
     478             :   Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3,
     479             :   Convert__Reg1_0__regG0__regG0,
     480             :   Convert__MEMri2_1__regG0,
     481             :   Convert__MEMrr2_1__regG0,
     482             :   Convert__Reg1_0,
     483             :   Convert__Reg1_0__Reg1_1,
     484             :   Convert__Reg1_0__Reg1_0__imm_95_1,
     485             :   Convert__Reg1_1__Reg1_0,
     486             :   Convert__Imm1_1__imm_95_8__Reg1_0,
     487             :   Convert__Imm1_2__imm_95_8__Reg1_1,
     488             :   Convert__Imm1_2__Imm1_0__Reg1_1,
     489             :   Convert__Imm1_3__imm_95_8__Reg1_2,
     490             :   Convert__Imm1_3__Imm1_0__Reg1_2,
     491             :   Convert__Imm1_4__Imm1_0__Reg1_3,
     492             :   Convert__Imm1_1__imm_95_9__Reg1_0,
     493             :   Convert__Imm1_2__imm_95_9__Reg1_1,
     494             :   Convert__Imm1_3__imm_95_9__Reg1_2,
     495             :   Convert__Imm1_1__imm_95_6__Reg1_0,
     496             :   Convert__Imm1_2__imm_95_6__Reg1_1,
     497             :   Convert__Imm1_3__imm_95_6__Reg1_2,
     498             :   Convert__Imm1_1__imm_95_11__Reg1_0,
     499             :   Convert__Imm1_2__imm_95_11__Reg1_1,
     500             :   Convert__Imm1_3__imm_95_11__Reg1_2,
     501             :   Convert__Imm1_1__imm_95_4__Reg1_0,
     502             :   Convert__Imm1_2__imm_95_4__Reg1_1,
     503             :   Convert__Imm1_3__imm_95_4__Reg1_2,
     504             :   Convert__Imm1_1__imm_95_13__Reg1_0,
     505             :   Convert__Imm1_2__imm_95_13__Reg1_1,
     506             :   Convert__Imm1_3__imm_95_13__Reg1_2,
     507             :   Convert__Imm1_1__imm_95_2__Reg1_0,
     508             :   Convert__Imm1_2__imm_95_2__Reg1_1,
     509             :   Convert__Imm1_3__imm_95_2__Reg1_2,
     510             :   Convert__Imm1_1__imm_95_0__Reg1_0,
     511             :   Convert__Imm1_2__imm_95_0__Reg1_1,
     512             :   Convert__Imm1_3__imm_95_0__Reg1_2,
     513             :   Convert__Imm1_1__imm_95_1__Reg1_0,
     514             :   Convert__Imm1_2__imm_95_1__Reg1_1,
     515             :   Convert__Imm1_3__imm_95_1__Reg1_2,
     516             :   Convert__Imm1_1__imm_95_15__Reg1_0,
     517             :   Convert__Imm1_2__imm_95_15__Reg1_1,
     518             :   Convert__Imm1_3__imm_95_15__Reg1_2,
     519             :   Convert__Imm1_1__imm_95_7__Reg1_0,
     520             :   Convert__Imm1_2__imm_95_7__Reg1_1,
     521             :   Convert__Imm1_3__imm_95_7__Reg1_2,
     522             :   Convert__Imm1_1__imm_95_10__Reg1_0,
     523             :   Convert__Imm1_2__imm_95_10__Reg1_1,
     524             :   Convert__Imm1_3__imm_95_10__Reg1_2,
     525             :   Convert__Imm1_1__imm_95_5__Reg1_0,
     526             :   Convert__Imm1_2__imm_95_5__Reg1_1,
     527             :   Convert__Imm1_3__imm_95_5__Reg1_2,
     528             :   Convert__Imm1_1__imm_95_12__Reg1_0,
     529             :   Convert__Imm1_2__imm_95_12__Reg1_1,
     530             :   Convert__Imm1_3__imm_95_12__Reg1_2,
     531             :   Convert__Imm1_1__imm_95_3__Reg1_0,
     532             :   Convert__Imm1_2__imm_95_3__Reg1_1,
     533             :   Convert__Imm1_3__imm_95_3__Reg1_2,
     534             :   Convert__Imm1_1__imm_95_14__Reg1_0,
     535             :   Convert__Imm1_2__imm_95_14__Reg1_1,
     536             :   Convert__Imm1_3__imm_95_14__Reg1_2,
     537             :   Convert__regFCC0__Reg1_0__Reg1_1,
     538             :   Convert__Reg1_0__Reg1_1__Reg1_2,
     539             :   Convert_NoOperands,
     540             :   Convert__MEMri2_0,
     541             :   Convert__MEMrr2_0,
     542             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8,
     543             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8,
     544             :   Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0,
     545             :   Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0,
     546             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13,
     547             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5,
     548             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1,
     549             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9,
     550             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10,
     551             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6,
     552             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11,
     553             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11,
     554             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12,
     555             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3,
     556             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4,
     557             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2,
     558             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13,
     559             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4,
     560             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2,
     561             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0,
     562             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0,
     563             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9,
     564             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1,
     565             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6,
     566             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15,
     567             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14,
     568             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7,
     569             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10,
     570             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5,
     571             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12,
     572             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3,
     573             :   Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14,
     574             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15,
     575             :   Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7,
     576             :   Convert__Reg1_0__Tie0_1_1,
     577             :   Convert__regG0__MEMri2_0,
     578             :   Convert__regG0__MEMrr2_0,
     579             :   Convert__Reg1_1__MEMri2_0,
     580             :   Convert__Reg1_1__MEMrr2_0,
     581             :   Convert__MEMri2_1,
     582             :   Convert__Reg1_3__MEMri2_1,
     583             :   Convert__MEMrr2_1,
     584             :   Convert__Reg1_3__MEMrr2_1,
     585             :   Convert__Reg1_4__MEMrr2_1__Imm1_3,
     586             :   Convert__Reg1_1,
     587             :   Convert__regG0__Reg1_0,
     588             :   Convert__Reg1_1__regG0__Reg1_0,
     589             :   Convert__regG0__Imm1_0,
     590             :   Convert__Reg1_1__regG0__Imm1_0,
     591             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8,
     592             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8,
     593             :   Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0,
     594             :   Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0,
     595             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13,
     596             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5,
     597             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1,
     598             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9,
     599             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10,
     600             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6,
     601             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11,
     602             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11,
     603             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12,
     604             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3,
     605             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4,
     606             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2,
     607             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13,
     608             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4,
     609             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2,
     610             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0,
     611             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0,
     612             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9,
     613             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1,
     614             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6,
     615             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15,
     616             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14,
     617             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7,
     618             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10,
     619             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5,
     620             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12,
     621             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3,
     622             :   Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14,
     623             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15,
     624             :   Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7,
     625             :   Convert__Reg1_0__regG0__Reg1_0,
     626             :   Convert__Reg1_0__Reg1_0__regG0,
     627             :   Convert__Reg1_1__Reg1_0__regG0,
     628             :   Convert__regG0__regG0__regG0,
     629             :   Convert__imm_95_8,
     630             :   Convert__Reg1_1__Imm1_0,
     631             :   Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0,
     632             :   Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0,
     633             :   Convert__MEMri2_2,
     634             :   Convert__MEMrr2_2,
     635             :   Convert__MEMri2_2__Reg1_0,
     636             :   Convert__MEMrr2_2__Reg1_0,
     637             :   Convert__MEMrr2_2__Reg1_0__Imm1_4,
     638             :   Convert__Reg1_3__MEMri2_1__Tie0_1_1,
     639             :   Convert__Reg1_3__MEMrr2_1__Tie0_1_1,
     640             :   Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1,
     641             :   Convert__regG0__Reg1_0__imm_95_8,
     642             :   Convert__regG0__Imm1_0__imm_95_8,
     643             :   Convert__regG0__Reg1_1__imm_95_8,
     644             :   Convert__regG0__Imm1_1__imm_95_8,
     645             :   Convert__Reg1_0__Reg1_2__imm_95_8,
     646             :   Convert__Reg1_0__Imm1_2__imm_95_8,
     647             :   Convert__Reg1_1__Reg1_3__imm_95_8,
     648             :   Convert__Reg1_1__Imm1_3__imm_95_8,
     649             :   Convert__Reg1_1__Reg1_3__Imm1_0,
     650             :   Convert__Reg1_1__Imm1_3__Imm1_0,
     651             :   Convert__Reg1_2__Reg1_4__Imm1_0,
     652             :   Convert__Reg1_2__Imm1_4__Imm1_0,
     653             :   Convert__regG0__Reg1_0__imm_95_13,
     654             :   Convert__regG0__Imm1_0__imm_95_13,
     655             :   Convert__regG0__Reg1_1__imm_95_13,
     656             :   Convert__regG0__Imm1_1__imm_95_13,
     657             :   Convert__Reg1_0__Reg1_2__imm_95_13,
     658             :   Convert__Reg1_0__Imm1_2__imm_95_13,
     659             :   Convert__Reg1_1__Reg1_3__imm_95_13,
     660             :   Convert__Reg1_1__Imm1_3__imm_95_13,
     661             :   Convert__regG0__Reg1_0__imm_95_5,
     662             :   Convert__regG0__Imm1_0__imm_95_5,
     663             :   Convert__regG0__Reg1_1__imm_95_5,
     664             :   Convert__regG0__Imm1_1__imm_95_5,
     665             :   Convert__Reg1_0__Reg1_2__imm_95_5,
     666             :   Convert__Reg1_0__Imm1_2__imm_95_5,
     667             :   Convert__Reg1_1__Reg1_3__imm_95_5,
     668             :   Convert__Reg1_1__Imm1_3__imm_95_5,
     669             :   Convert__regG0__Reg1_0__imm_95_1,
     670             :   Convert__regG0__Imm1_0__imm_95_1,
     671             :   Convert__regG0__Reg1_1__imm_95_1,
     672             :   Convert__regG0__Imm1_1__imm_95_1,
     673             :   Convert__Reg1_0__Reg1_2__imm_95_1,
     674             :   Convert__Reg1_0__Imm1_2__imm_95_1,
     675             :   Convert__Reg1_1__Reg1_3__imm_95_1,
     676             :   Convert__Reg1_1__Imm1_3__imm_95_1,
     677             :   Convert__regG0__Reg1_0__imm_95_10,
     678             :   Convert__regG0__Imm1_0__imm_95_10,
     679             :   Convert__regG0__Reg1_1__imm_95_10,
     680             :   Convert__regG0__Imm1_1__imm_95_10,
     681             :   Convert__Reg1_0__Reg1_2__imm_95_10,
     682             :   Convert__Reg1_0__Imm1_2__imm_95_10,
     683             :   Convert__Reg1_1__Reg1_3__imm_95_10,
     684             :   Convert__Reg1_1__Imm1_3__imm_95_10,
     685             :   Convert__regG0__Reg1_0__imm_95_11,
     686             :   Convert__regG0__Imm1_0__imm_95_11,
     687             :   Convert__regG0__Reg1_1__imm_95_11,
     688             :   Convert__regG0__Imm1_1__imm_95_11,
     689             :   Convert__Reg1_0__Reg1_2__imm_95_11,
     690             :   Convert__Reg1_0__Imm1_2__imm_95_11,
     691             :   Convert__Reg1_1__Reg1_3__imm_95_11,
     692             :   Convert__Reg1_1__Imm1_3__imm_95_11,
     693             :   Convert__regG0__Reg1_0__imm_95_12,
     694             :   Convert__regG0__Imm1_0__imm_95_12,
     695             :   Convert__regG0__Reg1_1__imm_95_12,
     696             :   Convert__regG0__Imm1_1__imm_95_12,
     697             :   Convert__Reg1_0__Reg1_2__imm_95_12,
     698             :   Convert__Reg1_0__Imm1_2__imm_95_12,
     699             :   Convert__Reg1_1__Reg1_3__imm_95_12,
     700             :   Convert__Reg1_1__Imm1_3__imm_95_12,
     701             :   Convert__regG0__Reg1_0__imm_95_3,
     702             :   Convert__regG0__Imm1_0__imm_95_3,
     703             :   Convert__regG0__Reg1_1__imm_95_3,
     704             :   Convert__regG0__Imm1_1__imm_95_3,
     705             :   Convert__Reg1_0__Reg1_2__imm_95_3,
     706             :   Convert__Reg1_0__Imm1_2__imm_95_3,
     707             :   Convert__Reg1_1__Reg1_3__imm_95_3,
     708             :   Convert__Reg1_1__Imm1_3__imm_95_3,
     709             :   Convert__regG0__Reg1_0__imm_95_2,
     710             :   Convert__regG0__Imm1_0__imm_95_2,
     711             :   Convert__regG0__Reg1_1__imm_95_2,
     712             :   Convert__regG0__Imm1_1__imm_95_2,
     713             :   Convert__Reg1_0__Reg1_2__imm_95_2,
     714             :   Convert__Reg1_0__Imm1_2__imm_95_2,
     715             :   Convert__Reg1_1__Reg1_3__imm_95_2,
     716             :   Convert__Reg1_1__Imm1_3__imm_95_2,
     717             :   Convert__regG0__Reg1_0__imm_95_4,
     718             :   Convert__regG0__Imm1_0__imm_95_4,
     719             :   Convert__regG0__Reg1_1__imm_95_4,
     720             :   Convert__regG0__Imm1_1__imm_95_4,
     721             :   Convert__Reg1_0__Reg1_2__imm_95_4,
     722             :   Convert__Reg1_0__Imm1_2__imm_95_4,
     723             :   Convert__Reg1_1__Reg1_3__imm_95_4,
     724             :   Convert__Reg1_1__Imm1_3__imm_95_4,
     725             :   Convert__regG0__Reg1_0__imm_95_0,
     726             :   Convert__regG0__Imm1_0__imm_95_0,
     727             :   Convert__regG0__Reg1_1__imm_95_0,
     728             :   Convert__regG0__Imm1_1__imm_95_0,
     729             :   Convert__Reg1_0__Reg1_2__imm_95_0,
     730             :   Convert__Reg1_0__Imm1_2__imm_95_0,
     731             :   Convert__Reg1_1__Reg1_3__imm_95_0,
     732             :   Convert__Reg1_1__Imm1_3__imm_95_0,
     733             :   Convert__regG0__Reg1_0__imm_95_9,
     734             :   Convert__regG0__Imm1_0__imm_95_9,
     735             :   Convert__regG0__Reg1_1__imm_95_9,
     736             :   Convert__regG0__Imm1_1__imm_95_9,
     737             :   Convert__Reg1_0__Reg1_2__imm_95_9,
     738             :   Convert__Reg1_0__Imm1_2__imm_95_9,
     739             :   Convert__Reg1_1__Reg1_3__imm_95_9,
     740             :   Convert__Reg1_1__Imm1_3__imm_95_9,
     741             :   Convert__regG0__Reg1_0__imm_95_6,
     742             :   Convert__regG0__Imm1_0__imm_95_6,
     743             :   Convert__regG0__Reg1_1__imm_95_6,
     744             :   Convert__regG0__Imm1_1__imm_95_6,
     745             :   Convert__Reg1_0__Reg1_2__imm_95_6,
     746             :   Convert__Reg1_0__Imm1_2__imm_95_6,
     747             :   Convert__Reg1_1__Reg1_3__imm_95_6,
     748             :   Convert__Reg1_1__Imm1_3__imm_95_6,
     749             :   Convert__regG0__Reg1_0__imm_95_14,
     750             :   Convert__regG0__Imm1_0__imm_95_14,
     751             :   Convert__regG0__Reg1_1__imm_95_14,
     752             :   Convert__regG0__Imm1_1__imm_95_14,
     753             :   Convert__Reg1_0__Reg1_2__imm_95_14,
     754             :   Convert__Reg1_0__Imm1_2__imm_95_14,
     755             :   Convert__Reg1_1__Reg1_3__imm_95_14,
     756             :   Convert__Reg1_1__Imm1_3__imm_95_14,
     757             :   Convert__regG0__Reg1_0__regG0,
     758             :   Convert__regG0__Reg1_0__imm_95_15,
     759             :   Convert__regG0__Imm1_0__imm_95_15,
     760             :   Convert__regG0__Reg1_1__imm_95_15,
     761             :   Convert__regG0__Imm1_1__imm_95_15,
     762             :   Convert__Reg1_0__Reg1_2__imm_95_15,
     763             :   Convert__Reg1_0__Imm1_2__imm_95_15,
     764             :   Convert__Reg1_1__Reg1_3__imm_95_15,
     765             :   Convert__Reg1_1__Imm1_3__imm_95_15,
     766             :   Convert__regG0__Reg1_0__imm_95_7,
     767             :   Convert__regG0__Imm1_0__imm_95_7,
     768             :   Convert__regG0__Reg1_1__imm_95_7,
     769             :   Convert__regG0__Imm1_1__imm_95_7,
     770             :   Convert__Reg1_0__Reg1_2__imm_95_7,
     771             :   Convert__Reg1_0__Imm1_2__imm_95_7,
     772             :   Convert__Reg1_1__Reg1_3__imm_95_7,
     773             :   Convert__Reg1_1__Imm1_3__imm_95_7,
     774             :   CVT_NUM_SIGNATURES
     775             : };
     776             : 
     777             : } // end anonymous namespace
     778             : 
     779             : static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = {
     780             :   // Convert__Reg1_2__Reg1_0__Reg1_1
     781             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
     782             :   // Convert__Reg1_2__Reg1_0__Imm1_1
     783             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
     784             :   // Convert__Imm1_0__imm_95_8
     785             :   { CVT_95_addImmOperands, 1, CVT_imm_95_8, 0, CVT_Done },
     786             :   // Convert__Imm1_1__imm_95_8
     787             :   { CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_Done },
     788             :   // Convert__Imm1_1__Imm1_0
     789             :   { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
     790             :   // Convert__Imm1_2__imm_95_8
     791             :   { CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_Done },
     792             :   // Convert__Imm1_2__Imm1_0
     793             :   { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
     794             :   // Convert__Imm1_3__imm_95_8
     795             :   { CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_Done },
     796             :   // Convert__Imm1_3__Imm1_0
     797             :   { CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
     798             :   // Convert__Imm1_4__Imm1_0
     799             :   { CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
     800             :   // Convert__Imm1_0
     801             :   { CVT_95_addImmOperands, 1, CVT_Done },
     802             :   // Convert__Imm1_0__imm_95_13
     803             :   { CVT_95_addImmOperands, 1, CVT_imm_95_13, 0, CVT_Done },
     804             :   // Convert__Imm1_1__imm_95_13
     805             :   { CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_Done },
     806             :   // Convert__Imm1_2__imm_95_13
     807             :   { CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_Done },
     808             :   // Convert__Imm1_3__imm_95_13
     809             :   { CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_Done },
     810             :   // Convert__Reg1_1__Reg1_1__Reg1_0
     811             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
     812             :   // Convert__Reg1_1__Reg1_1__Imm1_0
     813             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
     814             :   // Convert__Imm1_0__imm_95_5
     815             :   { CVT_95_addImmOperands, 1, CVT_imm_95_5, 0, CVT_Done },
     816             :   // Convert__Imm1_1__imm_95_5
     817             :   { CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_Done },
     818             :   // Convert__Imm1_2__imm_95_5
     819             :   { CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_Done },
     820             :   // Convert__Imm1_3__imm_95_5
     821             :   { CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_Done },
     822             :   // Convert__Imm1_0__imm_95_1
     823             :   { CVT_95_addImmOperands, 1, CVT_imm_95_1, 0, CVT_Done },
     824             :   // Convert__Imm1_1__imm_95_1
     825             :   { CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_Done },
     826             :   // Convert__Imm1_2__imm_95_1
     827             :   { CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done },
     828             :   // Convert__Imm1_3__imm_95_1
     829             :   { CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_Done },
     830             :   // Convert__Imm1_0__imm_95_10
     831             :   { CVT_95_addImmOperands, 1, CVT_imm_95_10, 0, CVT_Done },
     832             :   // Convert__Imm1_1__imm_95_10
     833             :   { CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_Done },
     834             :   // Convert__Imm1_2__imm_95_10
     835             :   { CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_Done },
     836             :   // Convert__Imm1_3__imm_95_10
     837             :   { CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_Done },
     838             :   // Convert__Imm1_0__imm_95_11
     839             :   { CVT_95_addImmOperands, 1, CVT_imm_95_11, 0, CVT_Done },
     840             :   // Convert__Imm1_1__imm_95_11
     841             :   { CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_Done },
     842             :   // Convert__Imm1_2__imm_95_11
     843             :   { CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_Done },
     844             :   // Convert__Imm1_3__imm_95_11
     845             :   { CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_Done },
     846             :   // Convert__Imm1_0__imm_95_12
     847             :   { CVT_95_addImmOperands, 1, CVT_imm_95_12, 0, CVT_Done },
     848             :   // Convert__Imm1_1__imm_95_12
     849             :   { CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_Done },
     850             :   // Convert__Imm1_2__imm_95_12
     851             :   { CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_Done },
     852             :   // Convert__Imm1_3__imm_95_12
     853             :   { CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_Done },
     854             :   // Convert__Imm1_0__imm_95_3
     855             :   { CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_Done },
     856             :   // Convert__Imm1_1__imm_95_3
     857             :   { CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_Done },
     858             :   // Convert__Imm1_2__imm_95_3
     859             :   { CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done },
     860             :   // Convert__Imm1_3__imm_95_3
     861             :   { CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_Done },
     862             :   // Convert__Imm1_0__imm_95_2
     863             :   { CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_Done },
     864             :   // Convert__Imm1_1__imm_95_2
     865             :   { CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_Done },
     866             :   // Convert__Imm1_2__imm_95_2
     867             :   { CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done },
     868             :   // Convert__Imm1_3__imm_95_2
     869             :   { CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_Done },
     870             :   // Convert__Imm1_0__imm_95_4
     871             :   { CVT_95_addImmOperands, 1, CVT_imm_95_4, 0, CVT_Done },
     872             :   // Convert__Imm1_1__imm_95_4
     873             :   { CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_Done },
     874             :   // Convert__Imm1_2__imm_95_4
     875             :   { CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_Done },
     876             :   // Convert__Imm1_3__imm_95_4
     877             :   { CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_Done },
     878             :   // Convert__Imm1_0__imm_95_0
     879             :   { CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done },
     880             :   // Convert__Imm1_1__imm_95_0
     881             :   { CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
     882             :   // Convert__Imm1_2__imm_95_0
     883             :   { CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done },
     884             :   // Convert__Imm1_3__imm_95_0
     885             :   { CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done },
     886             :   // Convert__Imm1_0__imm_95_9
     887             :   { CVT_95_addImmOperands, 1, CVT_imm_95_9, 0, CVT_Done },
     888             :   // Convert__Imm1_1__imm_95_9
     889             :   { CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_Done },
     890             :   // Convert__Imm1_2__imm_95_9
     891             :   { CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_Done },
     892             :   // Convert__Imm1_3__imm_95_9
     893             :   { CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_Done },
     894             :   // Convert__Imm1_0__imm_95_6
     895             :   { CVT_95_addImmOperands, 1, CVT_imm_95_6, 0, CVT_Done },
     896             :   // Convert__Imm1_1__imm_95_6
     897             :   { CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_Done },
     898             :   // Convert__Imm1_2__imm_95_6
     899             :   { CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_Done },
     900             :   // Convert__Imm1_3__imm_95_6
     901             :   { CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_Done },
     902             :   // Convert__Imm1_0__imm_95_14
     903             :   { CVT_95_addImmOperands, 1, CVT_imm_95_14, 0, CVT_Done },
     904             :   // Convert__Imm1_1__imm_95_14
     905             :   { CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_Done },
     906             :   // Convert__Imm1_2__imm_95_14
     907             :   { CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_Done },
     908             :   // Convert__Imm1_3__imm_95_14
     909             :   { CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_Done },
     910             :   // Convert__Reg1_0__Imm1_1
     911             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
     912             :   // Convert__Reg1_1__Imm1_2
     913             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
     914             :   // Convert__Reg1_2__Imm1_3
     915             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
     916             :   // Convert__regG0__Reg1_1__Reg1_0
     917             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
     918             :   // Convert__regG0__Reg1_1__Imm1_0
     919             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
     920             :   // Convert__Imm1_0__imm_95_15
     921             :   { CVT_95_addImmOperands, 1, CVT_imm_95_15, 0, CVT_Done },
     922             :   // Convert__Imm1_1__imm_95_15
     923             :   { CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_Done },
     924             :   // Convert__Imm1_2__imm_95_15
     925             :   { CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_Done },
     926             :   // Convert__Imm1_3__imm_95_15
     927             :   { CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_Done },
     928             :   // Convert__Imm1_0__imm_95_7
     929             :   { CVT_95_addImmOperands, 1, CVT_imm_95_7, 0, CVT_Done },
     930             :   // Convert__Imm1_1__imm_95_7
     931             :   { CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_Done },
     932             :   // Convert__Imm1_2__imm_95_7
     933             :   { CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_Done },
     934             :   // Convert__Imm1_3__imm_95_7
     935             :   { CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_Done },
     936             :   // Convert__regO7__MEMri2_0
     937             :   { CVT_regO7, 0, CVT_95_addMEMriOperands, 1, CVT_Done },
     938             :   // Convert__regO7__MEMrr2_0
     939             :   { CVT_regO7, 0, CVT_95_addMEMrrOperands, 1, CVT_Done },
     940             :   // Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1
     941             :   { CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Done },
     942             :   // Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1
     943             :   { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_Done },
     944             :   // Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3
     945             :   { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 4, CVT_Done },
     946             :   // Convert__Reg1_0__regG0__regG0
     947             :   { CVT_95_Reg, 1, CVT_regG0, 0, CVT_regG0, 0, CVT_Done },
     948             :   // Convert__MEMri2_1__regG0
     949             :   { CVT_95_addMEMriOperands, 2, CVT_regG0, 0, CVT_Done },
     950             :   // Convert__MEMrr2_1__regG0
     951             :   { CVT_95_addMEMrrOperands, 2, CVT_regG0, 0, CVT_Done },
     952             :   // Convert__Reg1_0
     953             :   { CVT_95_Reg, 1, CVT_Done },
     954             :   // Convert__Reg1_0__Reg1_1
     955             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
     956             :   // Convert__Reg1_0__Reg1_0__imm_95_1
     957             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
     958             :   // Convert__Reg1_1__Reg1_0
     959             :   { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
     960             :   // Convert__Imm1_1__imm_95_8__Reg1_0
     961             :   { CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_95_Reg, 1, CVT_Done },
     962             :   // Convert__Imm1_2__imm_95_8__Reg1_1
     963             :   { CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_95_Reg, 2, CVT_Done },
     964             :   // Convert__Imm1_2__Imm1_0__Reg1_1
     965             :   { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_Done },
     966             :   // Convert__Imm1_3__imm_95_8__Reg1_2
     967             :   { CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_95_Reg, 3, CVT_Done },
     968             :   // Convert__Imm1_3__Imm1_0__Reg1_2
     969             :   { CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_95_Reg, 3, CVT_Done },
     970             :   // Convert__Imm1_4__Imm1_0__Reg1_3
     971             :   { CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_95_Reg, 4, CVT_Done },
     972             :   // Convert__Imm1_1__imm_95_9__Reg1_0
     973             :   { CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_95_Reg, 1, CVT_Done },
     974             :   // Convert__Imm1_2__imm_95_9__Reg1_1
     975             :   { CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_95_Reg, 2, CVT_Done },
     976             :   // Convert__Imm1_3__imm_95_9__Reg1_2
     977             :   { CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_95_Reg, 3, CVT_Done },
     978             :   // Convert__Imm1_1__imm_95_6__Reg1_0
     979             :   { CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_95_Reg, 1, CVT_Done },
     980             :   // Convert__Imm1_2__imm_95_6__Reg1_1
     981             :   { CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_95_Reg, 2, CVT_Done },
     982             :   // Convert__Imm1_3__imm_95_6__Reg1_2
     983             :   { CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_95_Reg, 3, CVT_Done },
     984             :   // Convert__Imm1_1__imm_95_11__Reg1_0
     985             :   { CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_95_Reg, 1, CVT_Done },
     986             :   // Convert__Imm1_2__imm_95_11__Reg1_1
     987             :   { CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_95_Reg, 2, CVT_Done },
     988             :   // Convert__Imm1_3__imm_95_11__Reg1_2
     989             :   { CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_95_Reg, 3, CVT_Done },
     990             :   // Convert__Imm1_1__imm_95_4__Reg1_0
     991             :   { CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_95_Reg, 1, CVT_Done },
     992             :   // Convert__Imm1_2__imm_95_4__Reg1_1
     993             :   { CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_95_Reg, 2, CVT_Done },
     994             :   // Convert__Imm1_3__imm_95_4__Reg1_2
     995             :   { CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_95_Reg, 3, CVT_Done },
     996             :   // Convert__Imm1_1__imm_95_13__Reg1_0
     997             :   { CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_95_Reg, 1, CVT_Done },
     998             :   // Convert__Imm1_2__imm_95_13__Reg1_1
     999             :   { CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_95_Reg, 2, CVT_Done },
    1000             :   // Convert__Imm1_3__imm_95_13__Reg1_2
    1001             :   { CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_95_Reg, 3, CVT_Done },
    1002             :   // Convert__Imm1_1__imm_95_2__Reg1_0
    1003             :   { CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_95_Reg, 1, CVT_Done },
    1004             :   // Convert__Imm1_2__imm_95_2__Reg1_1
    1005             :   { CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_95_Reg, 2, CVT_Done },
    1006             :   // Convert__Imm1_3__imm_95_2__Reg1_2
    1007             :   { CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_95_Reg, 3, CVT_Done },
    1008             :   // Convert__Imm1_1__imm_95_0__Reg1_0
    1009             :   { CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_95_Reg, 1, CVT_Done },
    1010             :   // Convert__Imm1_2__imm_95_0__Reg1_1
    1011             :   { CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_Done },
    1012             :   // Convert__Imm1_3__imm_95_0__Reg1_2
    1013             :   { CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_95_Reg, 3, CVT_Done },
    1014             :   // Convert__Imm1_1__imm_95_1__Reg1_0
    1015             :   { CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_95_Reg, 1, CVT_Done },
    1016             :   // Convert__Imm1_2__imm_95_1__Reg1_1
    1017             :   { CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_95_Reg, 2, CVT_Done },
    1018             :   // Convert__Imm1_3__imm_95_1__Reg1_2
    1019             :   { CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_95_Reg, 3, CVT_Done },
    1020             :   // Convert__Imm1_1__imm_95_15__Reg1_0
    1021             :   { CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_95_Reg, 1, CVT_Done },
    1022             :   // Convert__Imm1_2__imm_95_15__Reg1_1
    1023             :   { CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_95_Reg, 2, CVT_Done },
    1024             :   // Convert__Imm1_3__imm_95_15__Reg1_2
    1025             :   { CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_95_Reg, 3, CVT_Done },
    1026             :   // Convert__Imm1_1__imm_95_7__Reg1_0
    1027             :   { CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_95_Reg, 1, CVT_Done },
    1028             :   // Convert__Imm1_2__imm_95_7__Reg1_1
    1029             :   { CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_95_Reg, 2, CVT_Done },
    1030             :   // Convert__Imm1_3__imm_95_7__Reg1_2
    1031             :   { CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_95_Reg, 3, CVT_Done },
    1032             :   // Convert__Imm1_1__imm_95_10__Reg1_0
    1033             :   { CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_95_Reg, 1, CVT_Done },
    1034             :   // Convert__Imm1_2__imm_95_10__Reg1_1
    1035             :   { CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_95_Reg, 2, CVT_Done },
    1036             :   // Convert__Imm1_3__imm_95_10__Reg1_2
    1037             :   { CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_95_Reg, 3, CVT_Done },
    1038             :   // Convert__Imm1_1__imm_95_5__Reg1_0
    1039             :   { CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_95_Reg, 1, CVT_Done },
    1040             :   // Convert__Imm1_2__imm_95_5__Reg1_1
    1041             :   { CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_95_Reg, 2, CVT_Done },
    1042             :   // Convert__Imm1_3__imm_95_5__Reg1_2
    1043             :   { CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_95_Reg, 3, CVT_Done },
    1044             :   // Convert__Imm1_1__imm_95_12__Reg1_0
    1045             :   { CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_95_Reg, 1, CVT_Done },
    1046             :   // Convert__Imm1_2__imm_95_12__Reg1_1
    1047             :   { CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_95_Reg, 2, CVT_Done },
    1048             :   // Convert__Imm1_3__imm_95_12__Reg1_2
    1049             :   { CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_95_Reg, 3, CVT_Done },
    1050             :   // Convert__Imm1_1__imm_95_3__Reg1_0
    1051             :   { CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_95_Reg, 1, CVT_Done },
    1052             :   // Convert__Imm1_2__imm_95_3__Reg1_1
    1053             :   { CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_95_Reg, 2, CVT_Done },
    1054             :   // Convert__Imm1_3__imm_95_3__Reg1_2
    1055             :   { CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_95_Reg, 3, CVT_Done },
    1056             :   // Convert__Imm1_1__imm_95_14__Reg1_0
    1057             :   { CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_95_Reg, 1, CVT_Done },
    1058             :   // Convert__Imm1_2__imm_95_14__Reg1_1
    1059             :   { CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_95_Reg, 2, CVT_Done },
    1060             :   // Convert__Imm1_3__imm_95_14__Reg1_2
    1061             :   { CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_95_Reg, 3, CVT_Done },
    1062             :   // Convert__regFCC0__Reg1_0__Reg1_1
    1063             :   { CVT_regFCC0, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
    1064             :   // Convert__Reg1_0__Reg1_1__Reg1_2
    1065             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    1066             :   // Convert_NoOperands
    1067             :   { CVT_Done },
    1068             :   // Convert__MEMri2_0
    1069             :   { CVT_95_addMEMriOperands, 1, CVT_Done },
    1070             :   // Convert__MEMrr2_0
    1071             :   { CVT_95_addMEMrrOperands, 1, CVT_Done },
    1072             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8
    1073             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
    1074             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8
    1075             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
    1076             :   // Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0
    1077             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
    1078             :   // Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0
    1079             :   { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
    1080             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13
    1081             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
    1082             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5
    1083             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
    1084             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1
    1085             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
    1086             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9
    1087             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
    1088             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10
    1089             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
    1090             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6
    1091             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
    1092             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11
    1093             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
    1094             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11
    1095             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
    1096             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12
    1097             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
    1098             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3
    1099             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
    1100             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4
    1101             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
    1102             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2
    1103             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
    1104             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13
    1105             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
    1106             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4
    1107             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
    1108             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2
    1109             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
    1110             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0
    1111             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
    1112             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0
    1113             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
    1114             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9
    1115             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
    1116             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1
    1117             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
    1118             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6
    1119             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
    1120             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15
    1121             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
    1122             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14
    1123             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
    1124             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7
    1125             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
    1126             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10
    1127             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
    1128             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5
    1129             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
    1130             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12
    1131             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
    1132             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3
    1133             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
    1134             :   // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14
    1135             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
    1136             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15
    1137             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
    1138             :   // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7
    1139             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
    1140             :   // Convert__Reg1_0__Tie0_1_1
    1141             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done },
    1142             :   // Convert__regG0__MEMri2_0
    1143             :   { CVT_regG0, 0, CVT_95_addMEMriOperands, 1, CVT_Done },
    1144             :   // Convert__regG0__MEMrr2_0
    1145             :   { CVT_regG0, 0, CVT_95_addMEMrrOperands, 1, CVT_Done },
    1146             :   // Convert__Reg1_1__MEMri2_0
    1147             :   { CVT_95_Reg, 2, CVT_95_addMEMriOperands, 1, CVT_Done },
    1148             :   // Convert__Reg1_1__MEMrr2_0
    1149             :   { CVT_95_Reg, 2, CVT_95_addMEMrrOperands, 1, CVT_Done },
    1150             :   // Convert__MEMri2_1
    1151             :   { CVT_95_addMEMriOperands, 2, CVT_Done },
    1152             :   // Convert__Reg1_3__MEMri2_1
    1153             :   { CVT_95_Reg, 4, CVT_95_addMEMriOperands, 2, CVT_Done },
    1154             :   // Convert__MEMrr2_1
    1155             :   { CVT_95_addMEMrrOperands, 2, CVT_Done },
    1156             :   // Convert__Reg1_3__MEMrr2_1
    1157             :   { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_Done },
    1158             :   // Convert__Reg1_4__MEMrr2_1__Imm1_3
    1159             :   { CVT_95_Reg, 5, CVT_95_addMEMrrOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
    1160             :   // Convert__Reg1_1
    1161             :   { CVT_95_Reg, 2, CVT_Done },
    1162             :   // Convert__regG0__Reg1_0
    1163             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
    1164             :   // Convert__Reg1_1__regG0__Reg1_0
    1165             :   { CVT_95_Reg, 2, CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
    1166             :   // Convert__regG0__Imm1_0
    1167             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_Done },
    1168             :   // Convert__Reg1_1__regG0__Imm1_0
    1169             :   { CVT_95_Reg, 2, CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_Done },
    1170             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8
    1171             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
    1172             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8
    1173             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
    1174             :   // Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0
    1175             :   { CVT_95_Reg, 4, CVT_95_addImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
    1176             :   // Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0
    1177             :   { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
    1178             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13
    1179             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
    1180             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5
    1181             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
    1182             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1
    1183             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
    1184             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9
    1185             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
    1186             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10
    1187             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
    1188             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6
    1189             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
    1190             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11
    1191             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
    1192             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11
    1193             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
    1194             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12
    1195             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
    1196             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3
    1197             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
    1198             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4
    1199             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
    1200             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2
    1201             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
    1202             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13
    1203             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
    1204             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4
    1205             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
    1206             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2
    1207             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
    1208             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0
    1209             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
    1210             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0
    1211             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
    1212             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9
    1213             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
    1214             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1
    1215             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
    1216             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6
    1217             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
    1218             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15
    1219             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
    1220             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14
    1221             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
    1222             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7
    1223             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
    1224             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10
    1225             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
    1226             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5
    1227             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
    1228             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12
    1229             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
    1230             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3
    1231             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
    1232             :   // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14
    1233             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
    1234             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15
    1235             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
    1236             :   // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7
    1237             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
    1238             :   // Convert__Reg1_0__regG0__Reg1_0
    1239             :   { CVT_95_Reg, 1, CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
    1240             :   // Convert__Reg1_0__Reg1_0__regG0
    1241             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
    1242             :   // Convert__Reg1_1__Reg1_0__regG0
    1243             :   { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
    1244             :   // Convert__regG0__regG0__regG0
    1245             :   { CVT_regG0, 0, CVT_regG0, 0, CVT_regG0, 0, CVT_Done },
    1246             :   // Convert__imm_95_8
    1247             :   { CVT_imm_95_8, 0, CVT_Done },
    1248             :   // Convert__Reg1_1__Imm1_0
    1249             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    1250             :   // Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0
    1251             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
    1252             :   // Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0
    1253             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
    1254             :   // Convert__MEMri2_2
    1255             :   { CVT_95_addMEMriOperands, 3, CVT_Done },
    1256             :   // Convert__MEMrr2_2
    1257             :   { CVT_95_addMEMrrOperands, 3, CVT_Done },
    1258             :   // Convert__MEMri2_2__Reg1_0
    1259             :   { CVT_95_addMEMriOperands, 3, CVT_95_Reg, 1, CVT_Done },
    1260             :   // Convert__MEMrr2_2__Reg1_0
    1261             :   { CVT_95_addMEMrrOperands, 3, CVT_95_Reg, 1, CVT_Done },
    1262             :   // Convert__MEMrr2_2__Reg1_0__Imm1_4
    1263             :   { CVT_95_addMEMrrOperands, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 5, CVT_Done },
    1264             :   // Convert__Reg1_3__MEMri2_1__Tie0_1_1
    1265             :   { CVT_95_Reg, 4, CVT_95_addMEMriOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
    1266             :   // Convert__Reg1_3__MEMrr2_1__Tie0_1_1
    1267             :   { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
    1268             :   // Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1
    1269             :   { CVT_95_Reg, 5, CVT_95_addMEMrrOperands, 2, CVT_95_addImmOperands, 4, CVT_Tied, Tie0_1_1, CVT_Done },
    1270             :   // Convert__regG0__Reg1_0__imm_95_8
    1271             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_8, 0, CVT_Done },
    1272             :   // Convert__regG0__Imm1_0__imm_95_8
    1273             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_8, 0, CVT_Done },
    1274             :   // Convert__regG0__Reg1_1__imm_95_8
    1275             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_8, 0, CVT_Done },
    1276             :   // Convert__regG0__Imm1_1__imm_95_8
    1277             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_Done },
    1278             :   // Convert__Reg1_0__Reg1_2__imm_95_8
    1279             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_8, 0, CVT_Done },
    1280             :   // Convert__Reg1_0__Imm1_2__imm_95_8
    1281             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_Done },
    1282             :   // Convert__Reg1_1__Reg1_3__imm_95_8
    1283             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_8, 0, CVT_Done },
    1284             :   // Convert__Reg1_1__Imm1_3__imm_95_8
    1285             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_Done },
    1286             :   // Convert__Reg1_1__Reg1_3__Imm1_0
    1287             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
    1288             :   // Convert__Reg1_1__Imm1_3__Imm1_0
    1289             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
    1290             :   // Convert__Reg1_2__Reg1_4__Imm1_0
    1291             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
    1292             :   // Convert__Reg1_2__Imm1_4__Imm1_0
    1293             :   { CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    1294             :   // Convert__regG0__Reg1_0__imm_95_13
    1295             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_13, 0, CVT_Done },
    1296             :   // Convert__regG0__Imm1_0__imm_95_13
    1297             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_13, 0, CVT_Done },
    1298             :   // Convert__regG0__Reg1_1__imm_95_13
    1299             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_13, 0, CVT_Done },
    1300             :   // Convert__regG0__Imm1_1__imm_95_13
    1301             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_Done },
    1302             :   // Convert__Reg1_0__Reg1_2__imm_95_13
    1303             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_13, 0, CVT_Done },
    1304             :   // Convert__Reg1_0__Imm1_2__imm_95_13
    1305             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_Done },
    1306             :   // Convert__Reg1_1__Reg1_3__imm_95_13
    1307             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_13, 0, CVT_Done },
    1308             :   // Convert__Reg1_1__Imm1_3__imm_95_13
    1309             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_Done },
    1310             :   // Convert__regG0__Reg1_0__imm_95_5
    1311             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_5, 0, CVT_Done },
    1312             :   // Convert__regG0__Imm1_0__imm_95_5
    1313             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_5, 0, CVT_Done },
    1314             :   // Convert__regG0__Reg1_1__imm_95_5
    1315             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_5, 0, CVT_Done },
    1316             :   // Convert__regG0__Imm1_1__imm_95_5
    1317             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_Done },
    1318             :   // Convert__Reg1_0__Reg1_2__imm_95_5
    1319             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_5, 0, CVT_Done },
    1320             :   // Convert__Reg1_0__Imm1_2__imm_95_5
    1321             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_Done },
    1322             :   // Convert__Reg1_1__Reg1_3__imm_95_5
    1323             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_5, 0, CVT_Done },
    1324             :   // Convert__Reg1_1__Imm1_3__imm_95_5
    1325             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_Done },
    1326             :   // Convert__regG0__Reg1_0__imm_95_1
    1327             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
    1328             :   // Convert__regG0__Imm1_0__imm_95_1
    1329             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_1, 0, CVT_Done },
    1330             :   // Convert__regG0__Reg1_1__imm_95_1
    1331             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
    1332             :   // Convert__regG0__Imm1_1__imm_95_1
    1333             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_Done },
    1334             :   // Convert__Reg1_0__Reg1_2__imm_95_1
    1335             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
    1336             :   // Convert__Reg1_0__Imm1_2__imm_95_1
    1337             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done },
    1338             :   // Convert__Reg1_1__Reg1_3__imm_95_1
    1339             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_1, 0, CVT_Done },
    1340             :   // Convert__Reg1_1__Imm1_3__imm_95_1
    1341             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_Done },
    1342             :   // Convert__regG0__Reg1_0__imm_95_10
    1343             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_10, 0, CVT_Done },
    1344             :   // Convert__regG0__Imm1_0__imm_95_10
    1345             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_10, 0, CVT_Done },
    1346             :   // Convert__regG0__Reg1_1__imm_95_10
    1347             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_10, 0, CVT_Done },
    1348             :   // Convert__regG0__Imm1_1__imm_95_10
    1349             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_Done },
    1350             :   // Convert__Reg1_0__Reg1_2__imm_95_10
    1351             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_10, 0, CVT_Done },
    1352             :   // Convert__Reg1_0__Imm1_2__imm_95_10
    1353             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_Done },
    1354             :   // Convert__Reg1_1__Reg1_3__imm_95_10
    1355             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_10, 0, CVT_Done },
    1356             :   // Convert__Reg1_1__Imm1_3__imm_95_10
    1357             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_Done },
    1358             :   // Convert__regG0__Reg1_0__imm_95_11
    1359             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_11, 0, CVT_Done },
    1360             :   // Convert__regG0__Imm1_0__imm_95_11
    1361             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_11, 0, CVT_Done },
    1362             :   // Convert__regG0__Reg1_1__imm_95_11
    1363             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_11, 0, CVT_Done },
    1364             :   // Convert__regG0__Imm1_1__imm_95_11
    1365             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_Done },
    1366             :   // Convert__Reg1_0__Reg1_2__imm_95_11
    1367             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_11, 0, CVT_Done },
    1368             :   // Convert__Reg1_0__Imm1_2__imm_95_11
    1369             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_Done },
    1370             :   // Convert__Reg1_1__Reg1_3__imm_95_11
    1371             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_11, 0, CVT_Done },
    1372             :   // Convert__Reg1_1__Imm1_3__imm_95_11
    1373             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_Done },
    1374             :   // Convert__regG0__Reg1_0__imm_95_12
    1375             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_12, 0, CVT_Done },
    1376             :   // Convert__regG0__Imm1_0__imm_95_12
    1377             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_12, 0, CVT_Done },
    1378             :   // Convert__regG0__Reg1_1__imm_95_12
    1379             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_12, 0, CVT_Done },
    1380             :   // Convert__regG0__Imm1_1__imm_95_12
    1381             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_Done },
    1382             :   // Convert__Reg1_0__Reg1_2__imm_95_12
    1383             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_12, 0, CVT_Done },
    1384             :   // Convert__Reg1_0__Imm1_2__imm_95_12
    1385             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_Done },
    1386             :   // Convert__Reg1_1__Reg1_3__imm_95_12
    1387             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_12, 0, CVT_Done },
    1388             :   // Convert__Reg1_1__Imm1_3__imm_95_12
    1389             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_Done },
    1390             :   // Convert__regG0__Reg1_0__imm_95_3
    1391             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_3, 0, CVT_Done },
    1392             :   // Convert__regG0__Imm1_0__imm_95_3
    1393             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_Done },
    1394             :   // Convert__regG0__Reg1_1__imm_95_3
    1395             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_3, 0, CVT_Done },
    1396             :   // Convert__regG0__Imm1_1__imm_95_3
    1397             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_Done },
    1398             :   // Convert__Reg1_0__Reg1_2__imm_95_3
    1399             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_3, 0, CVT_Done },
    1400             :   // Convert__Reg1_0__Imm1_2__imm_95_3
    1401             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done },
    1402             :   // Convert__Reg1_1__Reg1_3__imm_95_3
    1403             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_3, 0, CVT_Done },
    1404             :   // Convert__Reg1_1__Imm1_3__imm_95_3
    1405             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_Done },
    1406             :   // Convert__regG0__Reg1_0__imm_95_2
    1407             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_2, 0, CVT_Done },
    1408             :   // Convert__regG0__Imm1_0__imm_95_2
    1409             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_Done },
    1410             :   // Convert__regG0__Reg1_1__imm_95_2
    1411             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_2, 0, CVT_Done },
    1412             :   // Convert__regG0__Imm1_1__imm_95_2
    1413             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_Done },
    1414             :   // Convert__Reg1_0__Reg1_2__imm_95_2
    1415             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_2, 0, CVT_Done },
    1416             :   // Convert__Reg1_0__Imm1_2__imm_95_2
    1417             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done },
    1418             :   // Convert__Reg1_1__Reg1_3__imm_95_2
    1419             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_2, 0, CVT_Done },
    1420             :   // Convert__Reg1_1__Imm1_3__imm_95_2
    1421             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_Done },
    1422             :   // Convert__regG0__Reg1_0__imm_95_4
    1423             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_4, 0, CVT_Done },
    1424             :   // Convert__regG0__Imm1_0__imm_95_4
    1425             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_4, 0, CVT_Done },
    1426             :   // Convert__regG0__Reg1_1__imm_95_4
    1427             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_4, 0, CVT_Done },
    1428             :   // Convert__regG0__Imm1_1__imm_95_4
    1429             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_Done },
    1430             :   // Convert__Reg1_0__Reg1_2__imm_95_4
    1431             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_4, 0, CVT_Done },
    1432             :   // Convert__Reg1_0__Imm1_2__imm_95_4
    1433             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_Done },
    1434             :   // Convert__Reg1_1__Reg1_3__imm_95_4
    1435             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_4, 0, CVT_Done },
    1436             :   // Convert__Reg1_1__Imm1_3__imm_95_4
    1437             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_Done },
    1438             :   // Convert__regG0__Reg1_0__imm_95_0
    1439             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
    1440             :   // Convert__regG0__Imm1_0__imm_95_0
    1441             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done },
    1442             :   // Convert__regG0__Reg1_1__imm_95_0
    1443             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
    1444             :   // Convert__regG0__Imm1_1__imm_95_0
    1445             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
    1446             :   // Convert__Reg1_0__Reg1_2__imm_95_0
    1447             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
    1448             :   // Convert__Reg1_0__Imm1_2__imm_95_0
    1449             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done },
    1450             :   // Convert__Reg1_1__Reg1_3__imm_95_0
    1451             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done },
    1452             :   // Convert__Reg1_1__Imm1_3__imm_95_0
    1453             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done },
    1454             :   // Convert__regG0__Reg1_0__imm_95_9
    1455             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_9, 0, CVT_Done },
    1456             :   // Convert__regG0__Imm1_0__imm_95_9
    1457             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_9, 0, CVT_Done },
    1458             :   // Convert__regG0__Reg1_1__imm_95_9
    1459             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_9, 0, CVT_Done },
    1460             :   // Convert__regG0__Imm1_1__imm_95_9
    1461             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_Done },
    1462             :   // Convert__Reg1_0__Reg1_2__imm_95_9
    1463             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_9, 0, CVT_Done },
    1464             :   // Convert__Reg1_0__Imm1_2__imm_95_9
    1465             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_Done },
    1466             :   // Convert__Reg1_1__Reg1_3__imm_95_9
    1467             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_9, 0, CVT_Done },
    1468             :   // Convert__Reg1_1__Imm1_3__imm_95_9
    1469             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_Done },
    1470             :   // Convert__regG0__Reg1_0__imm_95_6
    1471             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_6, 0, CVT_Done },
    1472             :   // Convert__regG0__Imm1_0__imm_95_6
    1473             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_6, 0, CVT_Done },
    1474             :   // Convert__regG0__Reg1_1__imm_95_6
    1475             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_6, 0, CVT_Done },
    1476             :   // Convert__regG0__Imm1_1__imm_95_6
    1477             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_Done },
    1478             :   // Convert__Reg1_0__Reg1_2__imm_95_6
    1479             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_6, 0, CVT_Done },
    1480             :   // Convert__Reg1_0__Imm1_2__imm_95_6
    1481             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_Done },
    1482             :   // Convert__Reg1_1__Reg1_3__imm_95_6
    1483             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_6, 0, CVT_Done },
    1484             :   // Convert__Reg1_1__Imm1_3__imm_95_6
    1485             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_Done },
    1486             :   // Convert__regG0__Reg1_0__imm_95_14
    1487             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_14, 0, CVT_Done },
    1488             :   // Convert__regG0__Imm1_0__imm_95_14
    1489             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_14, 0, CVT_Done },
    1490             :   // Convert__regG0__Reg1_1__imm_95_14
    1491             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_14, 0, CVT_Done },
    1492             :   // Convert__regG0__Imm1_1__imm_95_14
    1493             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_Done },
    1494             :   // Convert__Reg1_0__Reg1_2__imm_95_14
    1495             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_14, 0, CVT_Done },
    1496             :   // Convert__Reg1_0__Imm1_2__imm_95_14
    1497             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_Done },
    1498             :   // Convert__Reg1_1__Reg1_3__imm_95_14
    1499             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_14, 0, CVT_Done },
    1500             :   // Convert__Reg1_1__Imm1_3__imm_95_14
    1501             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_Done },
    1502             :   // Convert__regG0__Reg1_0__regG0
    1503             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
    1504             :   // Convert__regG0__Reg1_0__imm_95_15
    1505             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_15, 0, CVT_Done },
    1506             :   // Convert__regG0__Imm1_0__imm_95_15
    1507             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_15, 0, CVT_Done },
    1508             :   // Convert__regG0__Reg1_1__imm_95_15
    1509             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_15, 0, CVT_Done },
    1510             :   // Convert__regG0__Imm1_1__imm_95_15
    1511             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_Done },
    1512             :   // Convert__Reg1_0__Reg1_2__imm_95_15
    1513             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_15, 0, CVT_Done },
    1514             :   // Convert__Reg1_0__Imm1_2__imm_95_15
    1515             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_Done },
    1516             :   // Convert__Reg1_1__Reg1_3__imm_95_15
    1517             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_15, 0, CVT_Done },
    1518             :   // Convert__Reg1_1__Imm1_3__imm_95_15
    1519             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_Done },
    1520             :   // Convert__regG0__Reg1_0__imm_95_7
    1521             :   { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_7, 0, CVT_Done },
    1522             :   // Convert__regG0__Imm1_0__imm_95_7
    1523             :   { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_7, 0, CVT_Done },
    1524             :   // Convert__regG0__Reg1_1__imm_95_7
    1525             :   { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_7, 0, CVT_Done },
    1526             :   // Convert__regG0__Imm1_1__imm_95_7
    1527             :   { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_Done },
    1528             :   // Convert__Reg1_0__Reg1_2__imm_95_7
    1529             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_7, 0, CVT_Done },
    1530             :   // Convert__Reg1_0__Imm1_2__imm_95_7
    1531             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_Done },
    1532             :   // Convert__Reg1_1__Reg1_3__imm_95_7
    1533             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_7, 0, CVT_Done },
    1534             :   // Convert__Reg1_1__Imm1_3__imm_95_7
    1535             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_Done },
    1536             : };
    1537             : 
    1538        1700 : void SparcAsmParser::
    1539             : convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
    1540             :                 const OperandVector &Operands) {
    1541             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
    1542        1700 :   const uint8_t *Converter = ConversionTable[Kind];
    1543             :   unsigned OpIdx;
    1544             :   Inst.setOpcode(Opcode);
    1545       10320 :   for (const uint8_t *p = Converter; *p; p+= 2) {
    1546        4310 :     OpIdx = *(p + 1);
    1547        4310 :     switch (*p) {
    1548           0 :     default: llvm_unreachable("invalid conversion entry!");
    1549           0 :     case CVT_Reg:
    1550           0 :       static_cast<SparcOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
    1551             :       break;
    1552         105 :     case CVT_Tied: {
    1553             :       assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
    1554             :                           std::begin(TiedAsmOperandTable)) &&
    1555             :              "Tied operand not found");
    1556         105 :       unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];
    1557             :       Inst.addOperand(Inst.getOperand(TiedResOpnd));
    1558             :       break;
    1559             :     }
    1560        1953 :     case CVT_95_Reg:
    1561        3906 :       static_cast<SparcOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
    1562             :       break;
    1563         908 :     case CVT_95_addImmOperands:
    1564         908 :       static_cast<SparcOperand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
    1565             :       break;
    1566             :     case CVT_imm_95_8:
    1567          84 :       Inst.addOperand(MCOperand::createImm(8));
    1568             :       break;
    1569             :     case CVT_imm_95_13:
    1570         102 :       Inst.addOperand(MCOperand::createImm(13));
    1571             :       break;
    1572             :     case CVT_imm_95_5:
    1573         104 :       Inst.addOperand(MCOperand::createImm(5));
    1574             :       break;
    1575             :     case CVT_imm_95_1:
    1576         150 :       Inst.addOperand(MCOperand::createImm(1));
    1577             :       break;
    1578             :     case CVT_imm_95_10:
    1579         100 :       Inst.addOperand(MCOperand::createImm(10));
    1580             :       break;
    1581             :     case CVT_imm_95_11:
    1582          98 :       Inst.addOperand(MCOperand::createImm(11));
    1583             :       break;
    1584             :     case CVT_imm_95_12:
    1585          98 :       Inst.addOperand(MCOperand::createImm(12));
    1586             :       break;
    1587             :     case CVT_imm_95_3:
    1588          98 :       Inst.addOperand(MCOperand::createImm(3));
    1589             :       break;
    1590             :     case CVT_imm_95_2:
    1591          98 :       Inst.addOperand(MCOperand::createImm(2));
    1592             :       break;
    1593             :     case CVT_imm_95_4:
    1594         100 :       Inst.addOperand(MCOperand::createImm(4));
    1595             :       break;
    1596             :     case CVT_imm_95_0:
    1597          66 :       Inst.addOperand(MCOperand::createImm(0));
    1598             :       break;
    1599             :     case CVT_imm_95_9:
    1600         112 :       Inst.addOperand(MCOperand::createImm(9));
    1601             :       break;
    1602             :     case CVT_imm_95_6:
    1603          96 :       Inst.addOperand(MCOperand::createImm(6));
    1604             :       break;
    1605             :     case CVT_imm_95_14:
    1606          98 :       Inst.addOperand(MCOperand::createImm(14));
    1607             :       break;
    1608             :     case CVT_regG0:
    1609         576 :       Inst.addOperand(MCOperand::createReg(SP::G0));
    1610             :       break;
    1611             :     case CVT_imm_95_15:
    1612          98 :       Inst.addOperand(MCOperand::createImm(15));
    1613             :       break;
    1614             :     case CVT_imm_95_7:
    1615          98 :       Inst.addOperand(MCOperand::createImm(7));
    1616             :       break;
    1617             :     case CVT_regO7:
    1618          20 :       Inst.addOperand(MCOperand::createReg(SP::O7));
    1619             :       break;
    1620          60 :     case CVT_95_addMEMriOperands:
    1621         120 :       static_cast<SparcOperand&>(*Operands[OpIdx]).addMEMriOperands(Inst, 2);
    1622             :       break;
    1623         174 :     case CVT_95_addMEMrrOperands:
    1624         348 :       static_cast<SparcOperand&>(*Operands[OpIdx]).addMEMrrOperands(Inst, 2);
    1625             :       break;
    1626             :     case CVT_regFCC0:
    1627          24 :       Inst.addOperand(MCOperand::createReg(SP::FCC0));
    1628             :       break;
    1629             :     }
    1630             :   }
    1631        1700 : }
    1632             : 
    1633           0 : void SparcAsmParser::
    1634             : convertToMapAndConstraints(unsigned Kind,
    1635             :                            const OperandVector &Operands) {
    1636             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
    1637             :   unsigned NumMCOperands = 0;
    1638           0 :   const uint8_t *Converter = ConversionTable[Kind];
    1639           0 :   for (const uint8_t *p = Converter; *p; p+= 2) {
    1640           0 :     switch (*p) {
    1641           0 :     default: llvm_unreachable("invalid conversion entry!");
    1642           0 :     case CVT_Reg:
    1643           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1644           0 :       Operands[*(p + 1)]->setConstraint("r");
    1645           0 :       ++NumMCOperands;
    1646           0 :       break;
    1647           0 :     case CVT_Tied:
    1648           0 :       ++NumMCOperands;
    1649           0 :       break;
    1650           0 :     case CVT_95_Reg:
    1651           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1652           0 :       Operands[*(p + 1)]->setConstraint("r");
    1653           0 :       NumMCOperands += 1;
    1654           0 :       break;
    1655           0 :     case CVT_95_addImmOperands:
    1656           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1657           0 :       Operands[*(p + 1)]->setConstraint("m");
    1658           0 :       NumMCOperands += 1;
    1659           0 :       break;
    1660           0 :     case CVT_imm_95_8:
    1661           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1662           0 :       Operands[*(p + 1)]->setConstraint("");
    1663           0 :       ++NumMCOperands;
    1664           0 :       break;
    1665           0 :     case CVT_imm_95_13:
    1666           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1667           0 :       Operands[*(p + 1)]->setConstraint("");
    1668           0 :       ++NumMCOperands;
    1669           0 :       break;
    1670           0 :     case CVT_imm_95_5:
    1671           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1672           0 :       Operands[*(p + 1)]->setConstraint("");
    1673           0 :       ++NumMCOperands;
    1674           0 :       break;
    1675           0 :     case CVT_imm_95_1:
    1676           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1677           0 :       Operands[*(p + 1)]->setConstraint("");
    1678           0 :       ++NumMCOperands;
    1679           0 :       break;
    1680           0 :     case CVT_imm_95_10:
    1681           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1682           0 :       Operands[*(p + 1)]->setConstraint("");
    1683           0 :       ++NumMCOperands;
    1684           0 :       break;
    1685           0 :     case CVT_imm_95_11:
    1686           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1687           0 :       Operands[*(p + 1)]->setConstraint("");
    1688           0 :       ++NumMCOperands;
    1689           0 :       break;
    1690           0 :     case CVT_imm_95_12:
    1691           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1692           0 :       Operands[*(p + 1)]->setConstraint("");
    1693           0 :       ++NumMCOperands;
    1694           0 :       break;
    1695           0 :     case CVT_imm_95_3:
    1696           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1697           0 :       Operands[*(p + 1)]->setConstraint("");
    1698           0 :       ++NumMCOperands;
    1699           0 :       break;
    1700           0 :     case CVT_imm_95_2:
    1701           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1702           0 :       Operands[*(p + 1)]->setConstraint("");
    1703           0 :       ++NumMCOperands;
    1704           0 :       break;
    1705           0 :     case CVT_imm_95_4:
    1706           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1707           0 :       Operands[*(p + 1)]->setConstraint("");
    1708           0 :       ++NumMCOperands;
    1709           0 :       break;
    1710           0 :     case CVT_imm_95_0:
    1711           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1712           0 :       Operands[*(p + 1)]->setConstraint("");
    1713           0 :       ++NumMCOperands;
    1714           0 :       break;
    1715           0 :     case CVT_imm_95_9:
    1716           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1717           0 :       Operands[*(p + 1)]->setConstraint("");
    1718           0 :       ++NumMCOperands;
    1719           0 :       break;
    1720           0 :     case CVT_imm_95_6:
    1721           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1722           0 :       Operands[*(p + 1)]->setConstraint("");
    1723           0 :       ++NumMCOperands;
    1724           0 :       break;
    1725           0 :     case CVT_imm_95_14:
    1726           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1727           0 :       Operands[*(p + 1)]->setConstraint("");
    1728           0 :       ++NumMCOperands;
    1729           0 :       break;
    1730           0 :     case CVT_regG0:
    1731           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1732           0 :       Operands[*(p + 1)]->setConstraint("m");
    1733           0 :       ++NumMCOperands;
    1734           0 :       break;
    1735           0 :     case CVT_imm_95_15:
    1736           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1737           0 :       Operands[*(p + 1)]->setConstraint("");
    1738           0 :       ++NumMCOperands;
    1739           0 :       break;
    1740           0 :     case CVT_imm_95_7:
    1741           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1742           0 :       Operands[*(p + 1)]->setConstraint("");
    1743           0 :       ++NumMCOperands;
    1744           0 :       break;
    1745           0 :     case CVT_regO7:
    1746           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1747           0 :       Operands[*(p + 1)]->setConstraint("m");
    1748           0 :       ++NumMCOperands;
    1749           0 :       break;
    1750           0 :     case CVT_95_addMEMriOperands:
    1751           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1752           0 :       Operands[*(p + 1)]->setConstraint("m");
    1753           0 :       NumMCOperands += 2;
    1754           0 :       break;
    1755           0 :     case CVT_95_addMEMrrOperands:
    1756           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1757           0 :       Operands[*(p + 1)]->setConstraint("m");
    1758           0 :       NumMCOperands += 2;
    1759           0 :       break;
    1760           0 :     case CVT_regFCC0:
    1761           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    1762           0 :       Operands[*(p + 1)]->setConstraint("m");
    1763           0 :       ++NumMCOperands;
    1764           0 :       break;
    1765             :     }
    1766             :   }
    1767           0 : }
    1768             : 
    1769             : namespace {
    1770             : 
    1771             : /// MatchClassKind - The kinds of classes which participate in
    1772             : /// instruction matching.
    1773             : enum MatchClassKind {
    1774             :   InvalidMatchClass = 0,
    1775             :   OptionalMatchClass = 1,
    1776             :   MCK__PCT_cq, // '%cq'
    1777             :   MCK__PCT_csr, // '%csr'
    1778             :   MCK__PCT_fcc0, // '%fcc0'
    1779             :   MCK__PCT_fq, // '%fq'
    1780             :   MCK__PCT_fsr, // '%fsr'
    1781             :   MCK__PCT_g0, // '%g0'
    1782             :   MCK__PCT_icc, // '%icc'
    1783             :   MCK__PCT_psr, // '%psr'
    1784             :   MCK__PCT_tbr, // '%tbr'
    1785             :   MCK__PCT_wim, // '%wim'
    1786             :   MCK__PCT_xcc, // '%xcc'
    1787             :   MCK__43_, // '+'
    1788             :   MCK_10, // '10'
    1789             :   MCK_3, // '3'
    1790             :   MCK_5, // '5'
    1791             :   MCK__91_, // '['
    1792             :   MCK__93_, // ']'
    1793             :   MCK_a, // 'a'
    1794             :   MCK_pn, // 'pn'
    1795             :   MCK_pt, // 'pt'
    1796             :   MCK_LAST_TOKEN = MCK_pt,
    1797             :   MCK_FCCRegs, // register class 'FCCRegs'
    1798             :   MCK_LowQFPRegs, // register class 'LowQFPRegs'
    1799             :   MCK_PRRegs, // register class 'PRRegs'
    1800             :   MCK_CoprocPair, // register class 'CoprocPair'
    1801             :   MCK_IntPair, // register class 'IntPair'
    1802             :   MCK_LowDFPRegs, // register class 'LowDFPRegs'
    1803             :   MCK_QFPRegs, // register class 'QFPRegs'
    1804             :   MCK_ASRRegs, // register class 'ASRRegs'
    1805             :   MCK_CoprocRegs, // register class 'CoprocRegs'
    1806             :   MCK_DFPRegs, // register class 'DFPRegs'
    1807             :   MCK_FPRegs, // register class 'FPRegs'
    1808             :   MCK_IntRegs, // register class 'IntRegs,I64Regs'
    1809             :   MCK_LAST_REGISTER = MCK_IntRegs,
    1810             :   MCK_Imm, // user defined class 'ImmAsmOperand'
    1811             :   MCK_MEMri, // user defined class 'SparcMEMriAsmOperand'
    1812             :   MCK_MEMrr, // user defined class 'SparcMEMrrAsmOperand'
    1813             :   NumMatchClassKinds
    1814             : };
    1815             : 
    1816             : }
    1817             : 
    1818             : static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
    1819             :   return MCTargetAsmParser::Match_InvalidOperand;
    1820             : }
    1821             : 
    1822        3995 : static MatchClassKind matchTokenString(StringRef Name) {
    1823        3995 :   switch (Name.size()) {
    1824             :   default: break;
    1825        2064 :   case 1:        // 6 strings to match.
    1826        2064 :     switch (Name[0]) {
    1827             :     default: break;
    1828             :     case '+':    // 1 string to match.
    1829             :       return MCK__43_;   // "+"
    1830           0 :     case '3':    // 1 string to match.
    1831           0 :       return MCK_3;      // "3"
    1832           0 :     case '5':    // 1 string to match.
    1833           0 :       return MCK_5;      // "5"
    1834         532 :     case '[':    // 1 string to match.
    1835         532 :       return MCK__91_;   // "["
    1836         316 :     case ']':    // 1 string to match.
    1837         316 :       return MCK__93_;   // "]"
    1838        1072 :     case 'a':    // 1 string to match.
    1839        1072 :       return MCK_a;      // "a"
    1840             :     }
    1841             :     break;
    1842         795 :   case 2:        // 3 strings to match.
    1843         795 :     switch (Name[0]) {
    1844             :     default: break;
    1845           0 :     case '1':    // 1 string to match.
    1846           0 :       if (Name[1] != '0')
    1847             :         break;
    1848             :       return MCK_10;     // "10"
    1849         795 :     case 'p':    // 2 strings to match.
    1850         795 :       switch (Name[1]) {
    1851             :       default: break;
    1852             :       case 'n':  // 1 string to match.
    1853             :         return MCK_pn;   // "pn"
    1854         452 :       case 't':  // 1 string to match.
    1855         452 :         return MCK_pt;   // "pt"
    1856             :       }
    1857             :       break;
    1858             :     }
    1859             :     break;
    1860          24 :   case 3:        // 3 strings to match.
    1861          24 :     if (Name[0] != '%')
    1862             :       break;
    1863          24 :     switch (Name[1]) {
    1864             :     default: break;
    1865           5 :     case 'c':    // 1 string to match.
    1866           5 :       if (Name[2] != 'q')
    1867             :         break;
    1868             :       return MCK__PCT_cq;        // "%cq"
    1869          19 :     case 'f':    // 1 string to match.
    1870          19 :       if (Name[2] != 'q')
    1871             :         break;
    1872             :       return MCK__PCT_fq;        // "%fq"
    1873           0 :     case 'g':    // 1 string to match.
    1874           0 :       if (Name[2] != '0')
    1875             :         break;
    1876             :       return MCK__PCT_g0;        // "%g0"
    1877             :     }
    1878             :     break;
    1879        1112 :   case 4:        // 7 strings to match.
    1880        1112 :     if (Name[0] != '%')
    1881             :       break;
    1882        1112 :     switch (Name[1]) {
    1883             :     default: break;
    1884             :     case 'c':    // 1 string to match.
    1885           8 :       if (memcmp(Name.data()+2, "sr", 2) != 0)
    1886             :         break;
    1887             :       return MCK__PCT_csr;       // "%csr"
    1888             :     case 'f':    // 1 string to match.
    1889          33 :       if (memcmp(Name.data()+2, "sr", 2) != 0)
    1890             :         break;
    1891             :       return MCK__PCT_fsr;       // "%fsr"
    1892             :     case 'i':    // 1 string to match.
    1893         329 :       if (memcmp(Name.data()+2, "cc", 2) != 0)
    1894             :         break;
    1895             :       return MCK__PCT_icc;       // "%icc"
    1896             :     case 'p':    // 1 string to match.
    1897          24 :       if (memcmp(Name.data()+2, "sr", 2) != 0)
    1898             :         break;
    1899             :       return MCK__PCT_psr;       // "%psr"
    1900             :     case 't':    // 1 string to match.
    1901          48 :       if (memcmp(Name.data()+2, "br", 2) != 0)
    1902             :         break;
    1903             :       return MCK__PCT_tbr;       // "%tbr"
    1904             :     case 'w':    // 1 string to match.
    1905          72 :       if (memcmp(Name.data()+2, "im", 2) != 0)
    1906             :         break;
    1907             :       return MCK__PCT_wim;       // "%wim"
    1908             :     case 'x':    // 1 string to match.
    1909         598 :       if (memcmp(Name.data()+2, "cc", 2) != 0)
    1910             :         break;
    1911             :       return MCK__PCT_xcc;       // "%xcc"
    1912             :     }
    1913             :     break;
    1914             :   case 5:        // 1 string to match.
    1915           0 :     if (memcmp(Name.data()+0, "%fcc0", 5) != 0)
    1916             :       break;
    1917             :     return MCK__PCT_fcc0;        // "%fcc0"
    1918             :   }
    1919             :   return InvalidMatchClass;
    1920             : }
    1921             : 
    1922             : /// isSubclass - Compute whether \p A is a subclass of \p B.
    1923             : static bool isSubclass(MatchClassKind A, MatchClassKind B) {
    1924       11898 :   if (A == B)
    1925             :     return true;
    1926             : 
    1927        2624 :   switch (A) {
    1928             :   default:
    1929             :     return false;
    1930             : 
    1931           0 :   case MCK_LowQFPRegs:
    1932           0 :     return B == MCK_QFPRegs;
    1933             : 
    1934           0 :   case MCK_LowDFPRegs:
    1935           0 :     return B == MCK_DFPRegs;
    1936             :   }
    1937             : }
    1938             : 
    1939       10813 : static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
    1940             :   SparcOperand &Operand = (SparcOperand&)GOp;
    1941       10813 :   if (Kind == InvalidMatchClass)
    1942             :     return MCTargetAsmParser::Match_InvalidOperand;
    1943             : 
    1944       10693 :   if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
    1945        7990 :     return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
    1946             :              MCTargetAsmParser::Match_Success :
    1947             :              MCTargetAsmParser::Match_InvalidOperand;
    1948             : 
    1949        6698 :   switch (Kind) {
    1950             :   default: break;
    1951             :   // 'Imm' class
    1952        1840 :   case MCK_Imm: {
    1953             :     DiagnosticPredicate DP(Operand.isImm());
    1954        1840 :     if (DP.isMatch())
    1955             :       return MCTargetAsmParser::Match_Success;
    1956             :     break;
    1957             :     }
    1958             :   // 'MEMri' class
    1959         314 :   case MCK_MEMri: {
    1960             :     DiagnosticPredicate DP(Operand.isMEMri());
    1961         314 :     if (DP.isMatch())
    1962             :       return MCTargetAsmParser::Match_Success;
    1963             :     break;
    1964             :     }
    1965             :   // 'MEMrr' class
    1966         251 :   case MCK_MEMrr: {
    1967             :     DiagnosticPredicate DP(Operand.isMEMrr());
    1968         251 :     if (DP.isMatch())
    1969             :       return MCTargetAsmParser::Match_Success;
    1970             :     break;
    1971             :     }
    1972             :   } // end switch (Kind)
    1973             : 
    1974        5310 :   if (Operand.isReg()) {
    1975             :     MatchClassKind OpKind;
    1976             :     switch (Operand.getReg()) {
    1977             :     default: OpKind = InvalidMatchClass; break;
    1978             :     case SP::FCC0: OpKind = MCK_FCCRegs; break;
    1979             :     case SP::FCC1: OpKind = MCK_FCCRegs; break;
    1980             :     case SP::FCC2: OpKind = MCK_FCCRegs; break;
    1981             :     case SP::FCC3: OpKind = MCK_FCCRegs; break;
    1982             :     case SP::Y: OpKind = MCK_ASRRegs; break;
    1983             :     case SP::ASR1: OpKind = MCK_ASRRegs; break;
    1984             :     case SP::ASR2: OpKind = MCK_ASRRegs; break;
    1985             :     case SP::ASR3: OpKind = MCK_ASRRegs; break;
    1986             :     case SP::ASR4: OpKind = MCK_ASRRegs; break;
    1987             :     case SP::ASR5: OpKind = MCK_ASRRegs; break;
    1988             :     case SP::ASR6: OpKind = MCK_ASRRegs; break;
    1989             :     case SP::ASR7: OpKind = MCK_ASRRegs; break;
    1990             :     case SP::ASR8: OpKind = MCK_ASRRegs; break;
    1991             :     case SP::ASR9: OpKind = MCK_ASRRegs; break;
    1992             :     case SP::ASR10: OpKind = MCK_ASRRegs; break;
    1993             :     case SP::ASR11: OpKind = MCK_ASRRegs; break;
    1994             :     case SP::ASR12: OpKind = MCK_ASRRegs; break;
    1995             :     case SP::ASR13: OpKind = MCK_ASRRegs; break;
    1996             :     case SP::ASR14: OpKind = MCK_ASRRegs; break;
    1997             :     case SP::ASR15: OpKind = MCK_ASRRegs; break;
    1998             :     case SP::ASR16: OpKind = MCK_ASRRegs; break;
    1999             :     case SP::ASR17: OpKind = MCK_ASRRegs; break;
    2000             :     case SP::ASR18: OpKind = MCK_ASRRegs; break;
    2001             :     case SP::ASR19: OpKind = MCK_ASRRegs; break;
    2002             :     case SP::ASR20: OpKind = MCK_ASRRegs; break;
    2003             :     case SP::ASR21: OpKind = MCK_ASRRegs; break;
    2004             :     case SP::ASR22: OpKind = MCK_ASRRegs; break;
    2005             :     case SP::ASR23: OpKind = MCK_ASRRegs; break;
    2006             :     case SP::ASR24: OpKind = MCK_ASRRegs; break;
    2007             :     case SP::ASR25: OpKind = MCK_ASRRegs; break;
    2008             :     case SP::ASR26: OpKind = MCK_ASRRegs; break;
    2009             :     case SP::ASR27: OpKind = MCK_ASRRegs; break;
    2010             :     case SP::ASR28: OpKind = MCK_ASRRegs; break;
    2011             :     case SP::ASR29: OpKind = MCK_ASRRegs; break;
    2012             :     case SP::ASR30: OpKind = MCK_ASRRegs; break;
    2013             :     case SP::ASR31: OpKind = MCK_ASRRegs; break;
    2014             :     case SP::TPC: OpKind = MCK_PRRegs; break;
    2015             :     case SP::TNPC: OpKind = MCK_PRRegs; break;
    2016             :     case SP::TSTATE: OpKind = MCK_PRRegs; break;
    2017             :     case SP::TT: OpKind = MCK_PRRegs; break;
    2018             :     case SP::TICK: OpKind = MCK_PRRegs; break;
    2019             :     case SP::TBA: OpKind = MCK_PRRegs; break;
    2020             :     case SP::PSTATE: OpKind = MCK_PRRegs; break;
    2021             :     case SP::TL: OpKind = MCK_PRRegs; break;
    2022             :     case SP::PIL: OpKind = MCK_PRRegs; break;
    2023             :     case SP::CWP: OpKind = MCK_PRRegs; break;
    2024             :     case SP::CANSAVE: OpKind = MCK_PRRegs; break;
    2025             :     case SP::CANRESTORE: OpKind = MCK_PRRegs; break;
    2026             :     case SP::CLEANWIN: OpKind = MCK_PRRegs; break;
    2027             :     case SP::OTHERWIN: OpKind = MCK_PRRegs; break;
    2028             :     case SP::WSTATE: OpKind = MCK_PRRegs; break;
    2029             :     case SP::G0: OpKind = MCK_IntRegs; break;
    2030             :     case SP::G1: OpKind = MCK_IntRegs; break;
    2031             :     case SP::G2: OpKind = MCK_IntRegs; break;
    2032             :     case SP::G3: OpKind = MCK_IntRegs; break;
    2033             :     case SP::G4: OpKind = MCK_IntRegs; break;
    2034             :     case SP::G5: OpKind = MCK_IntRegs; break;
    2035             :     case SP::G6: OpKind = MCK_IntRegs; break;
    2036             :     case SP::G7: OpKind = MCK_IntRegs; break;
    2037             :     case SP::O0: OpKind = MCK_IntRegs; break;
    2038             :     case SP::O1: OpKind = MCK_IntRegs; break;
    2039             :     case SP::O2: OpKind = MCK_IntRegs; break;
    2040             :     case SP::O3: OpKind = MCK_IntRegs; break;
    2041             :     case SP::O4: OpKind = MCK_IntRegs; break;
    2042             :     case SP::O5: OpKind = MCK_IntRegs; break;
    2043             :     case SP::O6: OpKind = MCK_IntRegs; break;
    2044             :     case SP::O7: OpKind = MCK_IntRegs; break;
    2045             :     case SP::L0: OpKind = MCK_IntRegs; break;
    2046             :     case SP::L1: OpKind = MCK_IntRegs; break;
    2047             :     case SP::L2: OpKind = MCK_IntRegs; break;
    2048             :     case SP::L3: OpKind = MCK_IntRegs; break;
    2049             :     case SP::L4: OpKind = MCK_IntRegs; break;
    2050             :     case SP::L5: OpKind = MCK_IntRegs; break;
    2051             :     case SP::L6: OpKind = MCK_IntRegs; break;
    2052             :     case SP::L7: OpKind = MCK_IntRegs; break;
    2053             :     case SP::I0: OpKind = MCK_IntRegs; break;
    2054             :     case SP::I1: OpKind = MCK_IntRegs; break;
    2055             :     case SP::I2: OpKind = MCK_IntRegs; break;
    2056             :     case SP::I3: OpKind = MCK_IntRegs; break;
    2057             :     case SP::I4: OpKind = MCK_IntRegs; break;
    2058             :     case SP::I5: OpKind = MCK_IntRegs; break;
    2059             :     case SP::I6: OpKind = MCK_IntRegs; break;
    2060             :     case SP::I7: OpKind = MCK_IntRegs; break;
    2061             :     case SP::F0: OpKind = MCK_FPRegs; break;
    2062             :     case SP::F1: OpKind = MCK_FPRegs; break;
    2063             :     case SP::F2: OpKind = MCK_FPRegs; break;
    2064             :     case SP::F3: OpKind = MCK_FPRegs; break;
    2065             :     case SP::F4: OpKind = MCK_FPRegs; break;
    2066             :     case SP::F5: OpKind = MCK_FPRegs; break;
    2067             :     case SP::F6: OpKind = MCK_FPRegs; break;
    2068             :     case SP::F7: OpKind = MCK_FPRegs; break;
    2069             :     case SP::F8: OpKind = MCK_FPRegs; break;
    2070             :     case SP::F9: OpKind = MCK_FPRegs; break;
    2071             :     case SP::F10: OpKind = MCK_FPRegs; break;
    2072             :     case SP::F11: OpKind = MCK_FPRegs; break;
    2073             :     case SP::F12: OpKind = MCK_FPRegs; break;
    2074             :     case SP::F13: OpKind = MCK_FPRegs; break;
    2075             :     case SP::F14: OpKind = MCK_FPRegs; break;
    2076             :     case SP::F15: OpKind = MCK_FPRegs; break;
    2077             :     case SP::F16: OpKind = MCK_FPRegs; break;
    2078             :     case SP::F17: OpKind = MCK_FPRegs; break;
    2079             :     case SP::F18: OpKind = MCK_FPRegs; break;
    2080             :     case SP::F19: OpKind = MCK_FPRegs; break;
    2081             :     case SP::F20: OpKind = MCK_FPRegs; break;
    2082             :     case SP::F21: OpKind = MCK_FPRegs; break;
    2083             :     case SP::F22: OpKind = MCK_FPRegs; break;
    2084             :     case SP::F23: OpKind = MCK_FPRegs; break;
    2085             :     case SP::F24: OpKind = MCK_FPRegs; break;
    2086             :     case SP::F25: OpKind = MCK_FPRegs; break;
    2087             :     case SP::F26: OpKind = MCK_FPRegs; break;
    2088             :     case SP::F27: OpKind = MCK_FPRegs; break;
    2089             :     case SP::F28: OpKind = MCK_FPRegs; break;
    2090             :     case SP::F29: OpKind = MCK_FPRegs; break;
    2091             :     case SP::F30: OpKind = MCK_FPRegs; break;
    2092             :     case SP::F31: OpKind = MCK_FPRegs; break;
    2093             :     case SP::D0: OpKind = MCK_LowDFPRegs; break;
    2094             :     case SP::D1: OpKind = MCK_LowDFPRegs; break;
    2095             :     case SP::D2: OpKind = MCK_LowDFPRegs; break;
    2096             :     case SP::D3: OpKind = MCK_LowDFPRegs; break;
    2097             :     case SP::D4: OpKind = MCK_LowDFPRegs; break;
    2098             :     case SP::D5: OpKind = MCK_LowDFPRegs; break;
    2099             :     case SP::D6: OpKind = MCK_LowDFPRegs; break;
    2100             :     case SP::D7: OpKind = MCK_LowDFPRegs; break;
    2101             :     case SP::D8: OpKind = MCK_LowDFPRegs; break;
    2102             :     case SP::D9: OpKind = MCK_LowDFPRegs; break;
    2103             :     case SP::D10: OpKind = MCK_LowDFPRegs; break;
    2104             :     case SP::D11: OpKind = MCK_LowDFPRegs; break;
    2105             :     case SP::D12: OpKind = MCK_LowDFPRegs; break;
    2106             :     case SP::D13: OpKind = MCK_LowDFPRegs; break;
    2107             :     case SP::D14: OpKind = MCK_LowDFPRegs; break;
    2108             :     case SP::D15: OpKind = MCK_LowDFPRegs; break;
    2109             :     case SP::C0: OpKind = MCK_CoprocRegs; break;
    2110             :     case SP::C1: OpKind = MCK_CoprocRegs; break;
    2111             :     case SP::C2: OpKind = MCK_CoprocRegs; break;
    2112             :     case SP::C3: OpKind = MCK_CoprocRegs; break;
    2113             :     case SP::C4: OpKind = MCK_CoprocRegs; break;
    2114             :     case SP::C5: OpKind = MCK_CoprocRegs; break;
    2115             :     case SP::C6: OpKind = MCK_CoprocRegs; break;
    2116             :     case SP::C7: OpKind = MCK_CoprocRegs; break;
    2117             :     case SP::C8: OpKind = MCK_CoprocRegs; break;
    2118             :     case SP::C9: OpKind = MCK_CoprocRegs; break;
    2119             :     case SP::C10: OpKind = MCK_CoprocRegs; break;
    2120             :     case SP::C11: OpKind = MCK_CoprocRegs; break;
    2121             :     case SP::C12: OpKind = MCK_CoprocRegs; break;
    2122             :     case SP::C13: OpKind = MCK_CoprocRegs; break;
    2123             :     case SP::C14: OpKind = MCK_CoprocRegs; break;
    2124             :     case SP::C15: OpKind = MCK_CoprocRegs; break;
    2125             :     case SP::C16: OpKind = MCK_CoprocRegs; break;
    2126             :     case SP::C17: OpKind = MCK_CoprocRegs; break;
    2127             :     case SP::C18: OpKind = MCK_CoprocRegs; break;
    2128             :     case SP::C19: OpKind = MCK_CoprocRegs; break;
    2129             :     case SP::C20: OpKind = MCK_CoprocRegs; break;
    2130             :     case SP::C21: OpKind = MCK_CoprocRegs; break;
    2131             :     case SP::C22: OpKind = MCK_CoprocRegs; break;
    2132             :     case SP::C23: OpKind = MCK_CoprocRegs; break;
    2133             :     case SP::C24: OpKind = MCK_CoprocRegs; break;
    2134             :     case SP::C25: OpKind = MCK_CoprocRegs; break;
    2135             :     case SP::C26: OpKind = MCK_CoprocRegs; break;
    2136             :     case SP::C27: OpKind = MCK_CoprocRegs; break;
    2137             :     case SP::C28: OpKind = MCK_CoprocRegs; break;
    2138             :     case SP::C29: OpKind = MCK_CoprocRegs; break;
    2139             :     case SP::C30: OpKind = MCK_CoprocRegs; break;
    2140             :     case SP::C31: OpKind = MCK_CoprocRegs; break;
    2141             :     case SP::D16: OpKind = MCK_DFPRegs; break;
    2142             :     case SP::D17: OpKind = MCK_DFPRegs; break;
    2143             :     case SP::D18: OpKind = MCK_DFPRegs; break;
    2144             :     case SP::D19: OpKind = MCK_DFPRegs; break;
    2145             :     case SP::D20: OpKind = MCK_DFPRegs; break;
    2146             :     case SP::D21: OpKind = MCK_DFPRegs; break;
    2147             :     case SP::D22: OpKind = MCK_DFPRegs; break;
    2148             :     case SP::D23: OpKind = MCK_DFPRegs; break;
    2149             :     case SP::D24: OpKind = MCK_DFPRegs; break;
    2150             :     case SP::D25: OpKind = MCK_DFPRegs; break;
    2151             :     case SP::D26: OpKind = MCK_DFPRegs; break;
    2152             :     case SP::D27: OpKind = MCK_DFPRegs; break;
    2153             :     case SP::D28: OpKind = MCK_DFPRegs; break;
    2154             :     case SP::D29: OpKind = MCK_DFPRegs; break;
    2155             :     case SP::D30: OpKind = MCK_DFPRegs; break;
    2156             :     case SP::D31: OpKind = MCK_DFPRegs; break;
    2157             :     case SP::Q0: OpKind = MCK_LowQFPRegs; break;
    2158             :     case SP::Q1: OpKind = MCK_LowQFPRegs; break;
    2159             :     case SP::Q2: OpKind = MCK_LowQFPRegs; break;
    2160             :     case SP::Q3: OpKind = MCK_LowQFPRegs; break;
    2161             :     case SP::Q4: OpKind = MCK_LowQFPRegs; break;
    2162             :     case SP::Q5: OpKind = MCK_LowQFPRegs; break;
    2163             :     case SP::Q6: OpKind = MCK_LowQFPRegs; break;
    2164             :     case SP::Q7: OpKind = MCK_LowQFPRegs; break;
    2165             :     case SP::Q8: OpKind = MCK_QFPRegs; break;
    2166             :     case SP::Q9: OpKind = MCK_QFPRegs; break;
    2167             :     case SP::Q10: OpKind = MCK_QFPRegs; break;
    2168             :     case SP::Q11: OpKind = MCK_QFPRegs; break;
    2169             :     case SP::Q12: OpKind = MCK_QFPRegs; break;
    2170             :     case SP::Q13: OpKind = MCK_QFPRegs; break;
    2171             :     case SP::Q14: OpKind = MCK_QFPRegs; break;
    2172             :     case SP::Q15: OpKind = MCK_QFPRegs; break;
    2173             :     case SP::G0_G1: OpKind = MCK_IntPair; break;
    2174             :     case SP::G2_G3: OpKind = MCK_IntPair; break;
    2175             :     case SP::G4_G5: OpKind = MCK_IntPair; break;
    2176             :     case SP::G6_G7: OpKind = MCK_IntPair; break;
    2177             :     case SP::O0_O1: OpKind = MCK_IntPair; break;
    2178             :     case SP::O2_O3: OpKind = MCK_IntPair; break;
    2179             :     case SP::O4_O5: OpKind = MCK_IntPair; break;
    2180             :     case SP::O6_O7: OpKind = MCK_IntPair; break;
    2181             :     case SP::L0_L1: OpKind = MCK_IntPair; break;
    2182             :     case SP::L2_L3: OpKind = MCK_IntPair; break;
    2183             :     case SP::L4_L5: OpKind = MCK_IntPair; break;
    2184             :     case SP::L6_L7: OpKind = MCK_IntPair; break;
    2185             :     case SP::I0_I1: OpKind = MCK_IntPair; break;
    2186             :     case SP::I2_I3: OpKind = MCK_IntPair; break;
    2187             :     case SP::I4_I5: OpKind = MCK_IntPair; break;
    2188             :     case SP::I6_I7: OpKind = MCK_IntPair; break;
    2189             :     case SP::C0_C1: OpKind = MCK_CoprocPair; break;
    2190             :     case SP::C2_C3: OpKind = MCK_CoprocPair; break;
    2191             :     case SP::C4_C5: OpKind = MCK_CoprocPair; break;
    2192             :     case SP::C6_C7: OpKind = MCK_CoprocPair; break;
    2193             :     case SP::C8_C9: OpKind = MCK_CoprocPair; break;
    2194             :     case SP::C10_C11: OpKind = MCK_CoprocPair; break;
    2195             :     case SP::C12_C13: OpKind = MCK_CoprocPair; break;
    2196             :     case SP::C14_C15: OpKind = MCK_CoprocPair; break;
    2197             :     case SP::C16_C17: OpKind = MCK_CoprocPair; break;
    2198             :     case SP::C18_C19: OpKind = MCK_CoprocPair; break;
    2199             :     case SP::C20_C21: OpKind = MCK_CoprocPair; break;
    2200             :     case SP::C22_C23: OpKind = MCK_CoprocPair; break;
    2201             :     case SP::C24_C25: OpKind = MCK_CoprocPair; break;
    2202             :     case SP::C26_C27: OpKind = MCK_CoprocPair; break;
    2203             :     case SP::C28_C29: OpKind = MCK_CoprocPair; break;
    2204             :     case SP::C30_C31: OpKind = MCK_CoprocPair; break;
    2205             :     }
    2206           0 :     return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
    2207             :                                       getDiagKindFromRegisterClass(Kind);
    2208             :   }
    2209             : 
    2210             :   if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
    2211             :     return getDiagKindFromRegisterClass(Kind);
    2212             : 
    2213             :   return MCTargetAsmParser::Match_InvalidOperand;
    2214             : }
    2215             : 
    2216             : #ifndef NDEBUG
    2217             : const char *getMatchClassName(MatchClassKind Kind) {
    2218             :   switch (Kind) {
    2219             :   case InvalidMatchClass: return "InvalidMatchClass";
    2220             :   case OptionalMatchClass: return "OptionalMatchClass";
    2221             :   case MCK__PCT_cq: return "MCK__PCT_cq";
    2222             :   case MCK__PCT_csr: return "MCK__PCT_csr";
    2223             :   case MCK__PCT_fcc0: return "MCK__PCT_fcc0";
    2224             :   case MCK__PCT_fq: return "MCK__PCT_fq";
    2225             :   case MCK__PCT_fsr: return "MCK__PCT_fsr";
    2226             :   case MCK__PCT_g0: return "MCK__PCT_g0";
    2227             :   case MCK__PCT_icc: return "MCK__PCT_icc";
    2228             :   case MCK__PCT_psr: return "MCK__PCT_psr";
    2229             :   case MCK__PCT_tbr: return "MCK__PCT_tbr";
    2230             :   case MCK__PCT_wim: return "MCK__PCT_wim";
    2231             :   case MCK__PCT_xcc: return "MCK__PCT_xcc";
    2232             :   case MCK__43_: return "MCK__43_";
    2233             :   case MCK_10: return "MCK_10";
    2234             :   case MCK_3: return "MCK_3";
    2235             :   case MCK_5: return "MCK_5";
    2236             :   case MCK__91_: return "MCK__91_";
    2237             :   case MCK__93_: return "MCK__93_";
    2238             :   case MCK_a: return "MCK_a";
    2239             :   case MCK_pn: return "MCK_pn";
    2240             :   case MCK_pt: return "MCK_pt";
    2241             :   case MCK_FCCRegs: return "MCK_FCCRegs";
    2242             :   case MCK_LowQFPRegs: return "MCK_LowQFPRegs";
    2243             :   case MCK_PRRegs: return "MCK_PRRegs";
    2244             :   case MCK_CoprocPair: return "MCK_CoprocPair";
    2245             :   case MCK_IntPair: return "MCK_IntPair";
    2246             :   case MCK_LowDFPRegs: return "MCK_LowDFPRegs";
    2247             :   case MCK_QFPRegs: return "MCK_QFPRegs";
    2248             :   case MCK_ASRRegs: return "MCK_ASRRegs";
    2249             :   case MCK_CoprocRegs: return "MCK_CoprocRegs";
    2250             :   case MCK_DFPRegs: return "MCK_DFPRegs";
    2251             :   case MCK_FPRegs: return "MCK_FPRegs";
    2252             :   case MCK_IntRegs: return "MCK_IntRegs";
    2253             :   case MCK_Imm: return "MCK_Imm";
    2254             :   case MCK_MEMri: return "MCK_MEMri";
    2255             :   case MCK_MEMrr: return "MCK_MEMrr";
    2256             :   case NumMatchClassKinds: return "NumMatchClassKinds";
    2257             :   }
    2258             :   llvm_unreachable("unhandled MatchClassKind!");
    2259             : }
    2260             : 
    2261             : #endif // NDEBUG
    2262         100 : uint64_t SparcAsmParser::
    2263             : ComputeAvailableFeatures(const FeatureBitset& FB) const {
    2264             :   uint64_t Features = 0;
    2265         100 :   if ((FB[Sparc::FeatureSoftMulDiv]))
    2266             :     Features |= Feature_UseSoftMulDiv;
    2267         100 :   if ((FB[Sparc::FeatureV9]))
    2268          44 :     Features |= Feature_HasV9;
    2269         100 :   if ((FB[Sparc::FeatureVIS]))
    2270           1 :     Features |= Feature_HasVIS;
    2271         100 :   if ((FB[Sparc::FeatureVIS2]))
    2272           1 :     Features |= Feature_HasVIS2;
    2273         100 :   if ((FB[Sparc::FeatureVIS3]))
    2274           0 :     Features |= Feature_HasVIS3;
    2275         100 :   return Features;
    2276             : }
    2277             : 
    2278        1700 : static bool checkAsmTiedOperandConstraints(unsigned Kind,
    2279             :                                const OperandVector &Operands,
    2280             :                                uint64_t &ErrorInfo) {
    2281             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
    2282        1700 :   const uint8_t *Converter = ConversionTable[Kind];
    2283       10320 :   for (const uint8_t *p = Converter; *p; p+= 2) {
    2284        4310 :     switch (*p) {
    2285         105 :     case CVT_Tied: {
    2286         105 :       unsigned OpIdx = *(p+1);
    2287             :       assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
    2288             :                               std::begin(TiedAsmOperandTable)) &&
    2289             :              "Tied operand not found");
    2290         105 :       unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
    2291         105 :       unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
    2292         105 :       if (OpndNum1 != OpndNum2) {
    2293           0 :         auto &SrcOp1 = Operands[OpndNum1];
    2294           0 :         auto &SrcOp2 = Operands[OpndNum2];
    2295           0 :         if (SrcOp1->isReg() && SrcOp2->isReg() &&
    2296           0 :             SrcOp1->getReg() != SrcOp2->getReg()) {
    2297           0 :           ErrorInfo = OpndNum2;
    2298           0 :           return false;
    2299             :         }
    2300             :       }
    2301             :       break;
    2302             :     }
    2303             :     default:
    2304             :       break;
    2305             :     }
    2306             :   }
    2307             :   return true;
    2308             : }
    2309             : 
    2310             : static const char *const MnemonicTable =
    2311             :     "\003add\005addcc\004addx\005addxc\006addxcc\007addxccc\talignaddr\nalig"
    2312             :     "naddrl\003and\005andcc\004andn\006andncc\007array16\007array32\006array"
    2313             :     "8\001b\002ba\003bcc\004bclr\003bcs\002be\003beq\002bg\003bge\004bgeu\003"
    2314             :     "bgu\002bl\003ble\004bleu\003blu\005bmask\002bn\003bne\004bneg\003bnz\004"
    2315             :     "bpos\005brgez\004brgz\005brlez\004brlz\004brnz\003brz\004bset\010bshuff"
    2316             :     "le\004btog\004btst\003bvc\003bvs\002bz\004call\003cas\004casa\004casx\002"
    2317             :     "cb\003cb0\004cb01\005cb012\005cb013\004cb02\005cb023\004cb03\003cb1\004"
    2318             :     "cb12\005cb123\004cb13\003cb2\004cb23\003cb3\003cba\003cbn\003clr\004clr"
    2319             :     "b\004clrh\007cmask16\007cmask32\006cmask8\003cmp\003dec\005deccc\006edg"
    2320             :     "e16\007edge16l\010edge16ln\007edge16n\006edge32\007edge32l\010edge32ln\007"
    2321             :     "edge32n\005edge8\006edge8l\007edge8ln\006edge8n\005fabsd\005fabsq\005fa"
    2322             :     "bss\005faddd\005faddq\005fadds\nfaligndata\004fand\010fandnot1\tfandnot"
    2323             :     "1s\010fandnot2\tfandnot2s\005fands\002fb\003fba\003fbe\003fbg\004fbge\003"
    2324             :     "fbl\004fble\004fblg\003fbn\004fbne\004fbnz\003fbo\003fbu\004fbue\004fbu"
    2325             :     "g\005fbuge\004fbul\005fbule\003fbz\010fchksm16\005fcmpd\006fcmped\006fc"
    2326             :     "mpeq\010fcmpeq16\010fcmpeq32\006fcmpes\010fcmpgt16\010fcmpgt32\010fcmpl"
    2327             :     "e16\010fcmple32\010fcmpne16\010fcmpne32\005fcmpq\005fcmps\005fdivd\005f"
    2328             :     "divq\005fdivs\006fdmulq\005fdtoi\005fdtoq\005fdtos\005fdtox\007fexpand\006"
    2329             :     "fhaddd\006fhadds\006fhsubd\006fhsubs\005fitod\005fitoq\005fitos\006flcm"
    2330             :     "pd\006flcmps\005flush\006flushw\007fmean16\005fmovd\006fmovda\007fmovdc"
    2331             :     "c\007fmovdcs\006fmovde\007fmovdeq\006fmovdg\007fmovdge\010fmovdgeu\007f"
    2332             :     "movdgu\006fmovdl\007fmovdle\010fmovdleu\007fmovdlg\007fmovdlu\006fmovdn"
    2333             :     "\007fmovdne\010fmovdneg\007fmovdnz\006fmovdo\010fmovdpos\006fmovdu\007f"
    2334             :     "movdue\007fmovdug\010fmovduge\007fmovdul\010fmovdule\007fmovdvc\007fmov"
    2335             :     "dvs\006fmovdz\005fmovq\006fmovqa\007fmovqcc\007fmovqcs\006fmovqe\007fmo"
    2336             :     "vqeq\006fmovqg\007fmovqge\010fmovqgeu\007fmovqgu\006fmovql\007fmovqle\010"
    2337             :     "fmovqleu\007fmovqlg\007fmovqlu\006fmovqn\007fmovqne\010fmovqneg\007fmov"
    2338             :     "qnz\006fmovqo\010fmovqpos\006fmovqu\007fmovque\007fmovqug\010fmovquge\007"
    2339             :     "fmovqul\010fmovqule\007fmovqvc\007fmovqvs\006fmovqz\tfmovrdgez\010fmovr"
    2340             :     "dgz\tfmovrdlez\010fmovrdlz\010fmovrdnz\007fmovrdz\tfmovrqgez\010fmovrqg"
    2341             :     "z\tfmovrqlez\010fmovrqlz\010fmovrqnz\007fmovrqz\tfmovrsgez\010fmovrsgz\t"
    2342             :     "fmovrslez\010fmovrslz\010fmovrsnz\007fmovrsz\005fmovs\006fmovsa\007fmov"
    2343             :     "scc\007fmovscs\006fmovse\007fmovseq\006fmovsg\007fmovsge\010fmovsgeu\007"
    2344             :     "fmovsgu\006fmovsl\007fmovsle\010fmovsleu\007fmovslg\007fmovslu\006fmovs"
    2345             :     "n\007fmovsne\010fmovsneg\007fmovsnz\006fmovso\010fmovspos\006fmovsu\007"
    2346             :     "fmovsue\007fmovsug\010fmovsuge\007fmovsul\010fmovsule\007fmovsvc\007fmo"
    2347             :     "vsvs\006fmovsz\nfmul8sux16\nfmul8ulx16\010fmul8x16\nfmul8x16al\nfmul8x1"
    2348             :     "6au\005fmuld\013fmuld8sux16\013fmuld8ulx16\005fmulq\005fmuls\006fnaddd\006"
    2349             :     "fnadds\005fnand\006fnands\005fnegd\005fnegq\005fnegs\007fnhaddd\007fnha"
    2350             :     "dds\004fnor\005fnors\005fnot1\006fnot1s\005fnot2\006fnot2s\004fone\005f"
    2351             :     "ones\003for\007fornot1\010fornot1s\007fornot2\010fornot2s\004fors\007fp"
    2352             :     "ack16\007fpack32\010fpackfix\007fpadd16\010fpadd16s\007fpadd32\010fpadd"
    2353             :     "32s\007fpadd64\007fpmerge\007fpsub16\010fpsub16S\007fpsub32\010fpsub32S"
    2354             :     "\005fqtod\005fqtoi\005fqtos\005fqtox\007fslas16\007fslas32\006fsll16\006"
    2355             :     "fsll32\006fsmuld\006fsqrtd\006fsqrtq\006fsqrts\006fsra16\006fsra32\005f"
    2356             :     "src1\006fsrc1s\005fsrc2\006fsrc2s\006fsrl16\006fsrl32\005fstod\005fstoi"
    2357             :     "\005fstoq\005fstox\005fsubd\005fsubq\005fsubs\005fxnor\006fxnors\004fxo"
    2358             :     "r\005fxors\005fxtod\005fxtoq\005fxtos\005fzero\006fzeros\003inc\005incc"
    2359             :     "c\003jmp\004jmpl\002ld\003lda\003ldd\004ldda\003ldq\004ldqa\004ldsb\005"
    2360             :     "ldsba\004ldsh\005ldsha\006ldstub\007ldstuba\004ldsw\004ldub\005lduba\004"
    2361             :     "lduh\005lduha\003ldx\005lzcnt\006membar\003mov\004mova\005movcc\005movc"
    2362             :     "s\007movdtox\004move\005moveq\004movg\005movge\006movgeu\005movgu\004mo"
    2363             :     "vl\005movle\006movleu\005movlg\005movlu\004movn\005movne\006movneg\005m"
    2364             :     "ovnz\004movo\006movpos\007movrgez\006movrgz\007movrlez\006movrlz\006mov"
    2365             :     "rnz\005movrz\010movstosw\010movstouw\004movu\005movue\005movug\006movug"
    2366             :     "e\005movul\006movule\005movvc\005movvs\004movz\006mulscc\004mulx\003neg"
    2367             :     "\003nop\003not\002or\004orcc\003orn\005orncc\005pdist\006pdistn\004popc"
    2368             :     "\002rd\004rdpr\007restore\003ret\004retl\004rett\004save\004sdiv\006sdi"
    2369             :     "vcc\005sdivx\003set\005sethi\010shutdown\004siam\005signx\003sll\004sll"
    2370             :     "x\004smac\004smul\006smulcc\003sra\004srax\003srl\004srlx\002st\003sta\003"
    2371             :     "stb\004stba\005stbar\003std\004stda\003sth\004stha\003stq\004stqa\003st"
    2372             :     "x\003sub\005subcc\004subx\006subxcc\004swap\005swapa\001t\002ta\006tadd"
    2373             :     "cc\010taddcctv\003tcc\003tcs\002te\003teq\002tg\003tge\004tgeu\003tgu\002"
    2374             :     "tl\003tle\004tleu\003tlu\002tn\003tne\004tneg\003tnz\004tpos\003tst\006"
    2375             :     "tsubcc\010tsubcctv\003tvc\003tvs\002tz\004udiv\006udivcc\005udivx\004um"
    2376             :     "ac\004umul\006umulcc\007umulxhi\005unimp\002wr\004wrpr\005xmulx\007xmul"
    2377             :     "xhi\004xnor\006xnorcc\003xor\005xorcc";
    2378             : 
    2379             : namespace {
    2380             :   struct MatchEntry {
    2381             :     uint16_t Mnemonic;
    2382             :     uint16_t Opcode;
    2383             :     uint16_t ConvertFn;
    2384             :     uint8_t RequiredFeatures;
    2385             :     uint8_t Classes[6];
    2386             :     StringRef getMnemonic() const {
    2387       32109 :       return StringRef(MnemonicTable + Mnemonic + 1,
    2388       32109 :                        MnemonicTable[Mnemonic]);
    2389             :     }
    2390             :   };
    2391             : 
    2392             :   // Predicate for searching for an opcode.
    2393             :   struct LessOpcode {
    2394             :     bool operator()(const MatchEntry &LHS, StringRef RHS) {
    2395       37962 :       return LHS.getMnemonic() < RHS;
    2396             :     }
    2397             :     bool operator()(StringRef LHS, const MatchEntry &RHS) {
    2398       26256 :       return LHS < RHS.getMnemonic();
    2399             :     }
    2400             :     bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
    2401             :       return LHS.getMnemonic() < RHS.getMnemonic();
    2402             :     }
    2403             :   };
    2404             : } // end anonymous namespace.
    2405             : 
    2406             : static const MatchEntry MatchTable0[] = {
    2407             :   { 0 /* add */, SP::ADDrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2408             :   { 0 /* add */, SP::ADDri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    2409             :   { 4 /* addcc */, SP::ADDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2410             :   { 4 /* addcc */, SP::ADDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    2411             :   { 10 /* addx */, SP::ADDCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2412             :   { 10 /* addx */, SP::ADDCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    2413             :   { 15 /* addxc */, SP::ADDXC, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2414             :   { 21 /* addxcc */, SP::ADDErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2415             :   { 21 /* addxcc */, SP::ADDEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    2416             :   { 28 /* addxccc */, SP::ADDXCCC, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2417             :   { 36 /* alignaddr */, SP::ALIGNADDR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2418             :   { 46 /* alignaddrl */, SP::ALIGNADDRL, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2419             :   { 57 /* and */, SP::ANDrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2420             :   { 57 /* and */, SP::ANDri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    2421             :   { 61 /* andcc */, SP::ANDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2422             :   { 61 /* andcc */, SP::ANDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    2423             :   { 67 /* andn */, SP::ANDNrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2424             :   { 67 /* andn */, SP::ANDNri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    2425             :   { 72 /* andncc */, SP::ANDNCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2426             :   { 72 /* andncc */, SP::ANDNCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    2427             :   { 79 /* array16 */, SP::ARRAY16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2428             :   { 87 /* array32 */, SP::ARRAY32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2429             :   { 95 /* array8 */, SP::ARRAY8, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2430             :   { 102 /* b */, SP::BCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
    2431             :   { 102 /* b */, SP::BPICC, Convert__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2432             :   { 102 /* b */, SP::BPXCC, Convert__Imm1_1__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2433             :   { 102 /* b */, SP::BCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
    2434             :   { 102 /* b */, SP::BCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
    2435             :   { 102 /* b */, SP::BPICCA, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2436             :   { 102 /* b */, SP::BPXCCA, Convert__Imm1_2__imm_95_8, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2437             :   { 102 /* b */, SP::BPICCNT, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2438             :   { 102 /* b */, SP::BPXCCNT, Convert__Imm1_2__imm_95_8, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2439             :   { 102 /* b */, SP::BPICC, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2440             :   { 102 /* b */, SP::BPXCC, Convert__Imm1_2__imm_95_8, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2441             :   { 102 /* b */, SP::BPICC, Convert__Imm1_2__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_Imm }, },
    2442             :   { 102 /* b */, SP::BPXCC, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_Imm }, },
    2443             :   { 102 /* b */, SP::BCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
    2444             :   { 102 /* b */, SP::BPICCANT, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2445             :   { 102 /* b */, SP::BPXCCANT, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2446             :   { 102 /* b */, SP::BPICCA, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2447             :   { 102 /* b */, SP::BPXCCA, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2448             :   { 102 /* b */, SP::BPICCA, Convert__Imm1_3__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2449             :   { 102 /* b */, SP::BPXCCA, Convert__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2450             :   { 102 /* b */, SP::BPICCNT, Convert__Imm1_3__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2451             :   { 102 /* b */, SP::BPXCCNT, Convert__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2452             :   { 102 /* b */, SP::BPICCANT, Convert__Imm1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2453             :   { 102 /* b */, SP::BPXCCANT, Convert__Imm1_4__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2454             :   { 104 /* ba */, SP::BA, Convert__Imm1_0, 0, { MCK_Imm }, },
    2455             :   { 104 /* ba */, SP::BCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
    2456             :   { 104 /* ba */, SP::BPICC, Convert__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2457             :   { 104 /* ba */, SP::BPXCC, Convert__Imm1_1__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2458             :   { 104 /* ba */, SP::BCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
    2459             :   { 104 /* ba */, SP::BPICCA, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2460             :   { 104 /* ba */, SP::BPXCCA, Convert__Imm1_2__imm_95_8, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2461             :   { 104 /* ba */, SP::BPICCNT, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2462             :   { 104 /* ba */, SP::BPXCCNT, Convert__Imm1_2__imm_95_8, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2463             :   { 104 /* ba */, SP::BPICC, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2464             :   { 104 /* ba */, SP::BPXCC, Convert__Imm1_2__imm_95_8, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2465             :   { 104 /* ba */, SP::BPICCANT, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2466             :   { 104 /* ba */, SP::BPXCCANT, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2467             :   { 104 /* ba */, SP::BPICCA, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2468             :   { 104 /* ba */, SP::BPXCCA, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2469             :   { 107 /* bcc */, SP::BCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
    2470             :   { 107 /* bcc */, SP::BPICC, Convert__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2471             :   { 107 /* bcc */, SP::BPXCC, Convert__Imm1_1__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2472             :   { 107 /* bcc */, SP::BCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
    2473             :   { 107 /* bcc */, SP::BPICCA, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2474             :   { 107 /* bcc */, SP::BPXCCA, Convert__Imm1_2__imm_95_13, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2475             :   { 107 /* bcc */, SP::BPICCNT, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2476             :   { 107 /* bcc */, SP::BPXCCNT, Convert__Imm1_2__imm_95_13, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2477             :   { 107 /* bcc */, SP::BPICC, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2478             :   { 107 /* bcc */, SP::BPXCC, Convert__Imm1_2__imm_95_13, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2479             :   { 107 /* bcc */, SP::BPICCANT, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2480             :   { 107 /* bcc */, SP::BPXCCANT, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2481             :   { 107 /* bcc */, SP::BPICCA, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2482             :   { 107 /* bcc */, SP::BPXCCA, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2483             :   { 111 /* bclr */, SP::ANDNrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
    2484             :   { 111 /* bclr */, SP::ANDNri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    2485             :   { 116 /* bcs */, SP::BCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
    2486             :   { 116 /* bcs */, SP::BPICC, Convert__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2487             :   { 116 /* bcs */, SP::BPXCC, Convert__Imm1_1__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2488             :   { 116 /* bcs */, SP::BCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
    2489             :   { 116 /* bcs */, SP::BPICCA, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2490             :   { 116 /* bcs */, SP::BPXCCA, Convert__Imm1_2__imm_95_5, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2491             :   { 116 /* bcs */, SP::BPICCNT, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2492             :   { 116 /* bcs */, SP::BPXCCNT, Convert__Imm1_2__imm_95_5, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2493             :   { 116 /* bcs */, SP::BPICC, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2494             :   { 116 /* bcs */, SP::BPXCC, Convert__Imm1_2__imm_95_5, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2495             :   { 116 /* bcs */, SP::BPICCANT, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2496             :   { 116 /* bcs */, SP::BPXCCANT, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2497             :   { 116 /* bcs */, SP::BPICCA, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2498             :   { 116 /* bcs */, SP::BPXCCA, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2499             :   { 120 /* be */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    2500             :   { 120 /* be */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2501             :   { 120 /* be */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2502             :   { 120 /* be */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
    2503             :   { 120 /* be */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2504             :   { 120 /* be */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2505             :   { 120 /* be */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2506             :   { 120 /* be */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2507             :   { 120 /* be */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2508             :   { 120 /* be */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2509             :   { 120 /* be */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2510             :   { 120 /* be */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2511             :   { 120 /* be */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2512             :   { 120 /* be */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2513             :   { 123 /* beq */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    2514             :   { 123 /* beq */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2515             :   { 123 /* beq */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2516             :   { 123 /* beq */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
    2517             :   { 123 /* beq */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2518             :   { 123 /* beq */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2519             :   { 123 /* beq */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2520             :   { 123 /* beq */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2521             :   { 123 /* beq */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2522             :   { 123 /* beq */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2523             :   { 123 /* beq */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2524             :   { 123 /* beq */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2525             :   { 123 /* beq */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2526             :   { 123 /* beq */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2527             :   { 127 /* bg */, SP::BCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
    2528             :   { 127 /* bg */, SP::BPICC, Convert__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2529             :   { 127 /* bg */, SP::BPXCC, Convert__Imm1_1__imm_95_10, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2530             :   { 127 /* bg */, SP::BCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
    2531             :   { 127 /* bg */, SP::BPICCA, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2532             :   { 127 /* bg */, SP::BPXCCA, Convert__Imm1_2__imm_95_10, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2533             :   { 127 /* bg */, SP::BPICCNT, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2534             :   { 127 /* bg */, SP::BPXCCNT, Convert__Imm1_2__imm_95_10, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2535             :   { 127 /* bg */, SP::BPICC, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2536             :   { 127 /* bg */, SP::BPXCC, Convert__Imm1_2__imm_95_10, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2537             :   { 127 /* bg */, SP::BPICCANT, Convert__Imm1_3__imm_95_10, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2538             :   { 127 /* bg */, SP::BPXCCANT, Convert__Imm1_3__imm_95_10, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2539             :   { 127 /* bg */, SP::BPICCA, Convert__Imm1_3__imm_95_10, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2540             :   { 127 /* bg */, SP::BPXCCA, Convert__Imm1_3__imm_95_10, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2541             :   { 130 /* bge */, SP::BCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
    2542             :   { 130 /* bge */, SP::BPICC, Convert__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2543             :   { 130 /* bge */, SP::BPXCC, Convert__Imm1_1__imm_95_11, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2544             :   { 130 /* bge */, SP::BCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
    2545             :   { 130 /* bge */, SP::BPICCA, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2546             :   { 130 /* bge */, SP::BPXCCA, Convert__Imm1_2__imm_95_11, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2547             :   { 130 /* bge */, SP::BPICCNT, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2548             :   { 130 /* bge */, SP::BPXCCNT, Convert__Imm1_2__imm_95_11, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2549             :   { 130 /* bge */, SP::BPICC, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2550             :   { 130 /* bge */, SP::BPXCC, Convert__Imm1_2__imm_95_11, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2551             :   { 130 /* bge */, SP::BPICCANT, Convert__Imm1_3__imm_95_11, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2552             :   { 130 /* bge */, SP::BPXCCANT, Convert__Imm1_3__imm_95_11, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2553             :   { 130 /* bge */, SP::BPICCA, Convert__Imm1_3__imm_95_11, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2554             :   { 130 /* bge */, SP::BPXCCA, Convert__Imm1_3__imm_95_11, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2555             :   { 134 /* bgeu */, SP::BCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
    2556             :   { 134 /* bgeu */, SP::BPICC, Convert__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2557             :   { 134 /* bgeu */, SP::BPXCC, Convert__Imm1_1__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2558             :   { 134 /* bgeu */, SP::BCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
    2559             :   { 134 /* bgeu */, SP::BPICCA, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2560             :   { 134 /* bgeu */, SP::BPXCCA, Convert__Imm1_2__imm_95_13, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2561             :   { 134 /* bgeu */, SP::BPICCNT, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2562             :   { 134 /* bgeu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_13, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2563             :   { 134 /* bgeu */, SP::BPICC, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2564             :   { 134 /* bgeu */, SP::BPXCC, Convert__Imm1_2__imm_95_13, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2565             :   { 134 /* bgeu */, SP::BPICCANT, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2566             :   { 134 /* bgeu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2567             :   { 134 /* bgeu */, SP::BPICCA, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2568             :   { 134 /* bgeu */, SP::BPXCCA, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2569             :   { 139 /* bgu */, SP::BCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
    2570             :   { 139 /* bgu */, SP::BPICC, Convert__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2571             :   { 139 /* bgu */, SP::BPXCC, Convert__Imm1_1__imm_95_12, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2572             :   { 139 /* bgu */, SP::BCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
    2573             :   { 139 /* bgu */, SP::BPICCA, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2574             :   { 139 /* bgu */, SP::BPXCCA, Convert__Imm1_2__imm_95_12, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2575             :   { 139 /* bgu */, SP::BPICCNT, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2576             :   { 139 /* bgu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_12, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2577             :   { 139 /* bgu */, SP::BPICC, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2578             :   { 139 /* bgu */, SP::BPXCC, Convert__Imm1_2__imm_95_12, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2579             :   { 139 /* bgu */, SP::BPICCANT, Convert__Imm1_3__imm_95_12, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2580             :   { 139 /* bgu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_12, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2581             :   { 139 /* bgu */, SP::BPICCA, Convert__Imm1_3__imm_95_12, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2582             :   { 139 /* bgu */, SP::BPXCCA, Convert__Imm1_3__imm_95_12, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2583             :   { 143 /* bl */, SP::BCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
    2584             :   { 143 /* bl */, SP::BPICC, Convert__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2585             :   { 143 /* bl */, SP::BPXCC, Convert__Imm1_1__imm_95_3, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2586             :   { 143 /* bl */, SP::BCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
    2587             :   { 143 /* bl */, SP::BPICCA, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2588             :   { 143 /* bl */, SP::BPXCCA, Convert__Imm1_2__imm_95_3, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2589             :   { 143 /* bl */, SP::BPICCNT, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2590             :   { 143 /* bl */, SP::BPXCCNT, Convert__Imm1_2__imm_95_3, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2591             :   { 143 /* bl */, SP::BPICC, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2592             :   { 143 /* bl */, SP::BPXCC, Convert__Imm1_2__imm_95_3, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2593             :   { 143 /* bl */, SP::BPICCANT, Convert__Imm1_3__imm_95_3, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2594             :   { 143 /* bl */, SP::BPXCCANT, Convert__Imm1_3__imm_95_3, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2595             :   { 143 /* bl */, SP::BPICCA, Convert__Imm1_3__imm_95_3, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2596             :   { 143 /* bl */, SP::BPXCCA, Convert__Imm1_3__imm_95_3, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2597             :   { 146 /* ble */, SP::BCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
    2598             :   { 146 /* ble */, SP::BPICC, Convert__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2599             :   { 146 /* ble */, SP::BPXCC, Convert__Imm1_1__imm_95_2, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2600             :   { 146 /* ble */, SP::BCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
    2601             :   { 146 /* ble */, SP::BPICCA, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2602             :   { 146 /* ble */, SP::BPXCCA, Convert__Imm1_2__imm_95_2, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2603             :   { 146 /* ble */, SP::BPICCNT, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2604             :   { 146 /* ble */, SP::BPXCCNT, Convert__Imm1_2__imm_95_2, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2605             :   { 146 /* ble */, SP::BPICC, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2606             :   { 146 /* ble */, SP::BPXCC, Convert__Imm1_2__imm_95_2, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2607             :   { 146 /* ble */, SP::BPICCANT, Convert__Imm1_3__imm_95_2, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2608             :   { 146 /* ble */, SP::BPXCCANT, Convert__Imm1_3__imm_95_2, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2609             :   { 146 /* ble */, SP::BPICCA, Convert__Imm1_3__imm_95_2, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2610             :   { 146 /* ble */, SP::BPXCCA, Convert__Imm1_3__imm_95_2, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2611             :   { 150 /* bleu */, SP::BCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
    2612             :   { 150 /* bleu */, SP::BPICC, Convert__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2613             :   { 150 /* bleu */, SP::BPXCC, Convert__Imm1_1__imm_95_4, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2614             :   { 150 /* bleu */, SP::BCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
    2615             :   { 150 /* bleu */, SP::BPICCA, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2616             :   { 150 /* bleu */, SP::BPXCCA, Convert__Imm1_2__imm_95_4, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2617             :   { 150 /* bleu */, SP::BPICCNT, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2618             :   { 150 /* bleu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_4, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2619             :   { 150 /* bleu */, SP::BPICC, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2620             :   { 150 /* bleu */, SP::BPXCC, Convert__Imm1_2__imm_95_4, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2621             :   { 150 /* bleu */, SP::BPICCANT, Convert__Imm1_3__imm_95_4, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2622             :   { 150 /* bleu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_4, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2623             :   { 150 /* bleu */, SP::BPICCA, Convert__Imm1_3__imm_95_4, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2624             :   { 150 /* bleu */, SP::BPXCCA, Convert__Imm1_3__imm_95_4, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2625             :   { 155 /* blu */, SP::BCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
    2626             :   { 155 /* blu */, SP::BPICC, Convert__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2627             :   { 155 /* blu */, SP::BPXCC, Convert__Imm1_1__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2628             :   { 155 /* blu */, SP::BCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
    2629             :   { 155 /* blu */, SP::BPICCA, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2630             :   { 155 /* blu */, SP::BPXCCA, Convert__Imm1_2__imm_95_5, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2631             :   { 155 /* blu */, SP::BPICCNT, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2632             :   { 155 /* blu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_5, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2633             :   { 155 /* blu */, SP::BPICC, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2634             :   { 155 /* blu */, SP::BPXCC, Convert__Imm1_2__imm_95_5, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2635             :   { 155 /* blu */, SP::BPICCANT, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2636             :   { 155 /* blu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2637             :   { 155 /* blu */, SP::BPICCA, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2638             :   { 155 /* blu */, SP::BPXCCA, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2639             :   { 159 /* bmask */, SP::BMASK, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2640             :   { 165 /* bn */, SP::BCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
    2641             :   { 165 /* bn */, SP::BPICC, Convert__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2642             :   { 165 /* bn */, SP::BPXCC, Convert__Imm1_1__imm_95_0, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2643             :   { 165 /* bn */, SP::BCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
    2644             :   { 165 /* bn */, SP::BPICCA, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2645             :   { 165 /* bn */, SP::BPXCCA, Convert__Imm1_2__imm_95_0, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2646             :   { 165 /* bn */, SP::BPICCNT, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2647             :   { 165 /* bn */, SP::BPXCCNT, Convert__Imm1_2__imm_95_0, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2648             :   { 165 /* bn */, SP::BPICC, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2649             :   { 165 /* bn */, SP::BPXCC, Convert__Imm1_2__imm_95_0, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2650             :   { 165 /* bn */, SP::BPICCANT, Convert__Imm1_3__imm_95_0, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2651             :   { 165 /* bn */, SP::BPXCCANT, Convert__Imm1_3__imm_95_0, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2652             :   { 165 /* bn */, SP::BPICCA, Convert__Imm1_3__imm_95_0, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2653             :   { 165 /* bn */, SP::BPXCCA, Convert__Imm1_3__imm_95_0, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2654             :   { 168 /* bne */, SP::BCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
    2655             :   { 168 /* bne */, SP::BPICC, Convert__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2656             :   { 168 /* bne */, SP::BPXCC, Convert__Imm1_1__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2657             :   { 168 /* bne */, SP::BCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
    2658             :   { 168 /* bne */, SP::BPICCA, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2659             :   { 168 /* bne */, SP::BPXCCA, Convert__Imm1_2__imm_95_9, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2660             :   { 168 /* bne */, SP::BPICCNT, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2661             :   { 168 /* bne */, SP::BPXCCNT, Convert__Imm1_2__imm_95_9, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2662             :   { 168 /* bne */, SP::BPICC, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2663             :   { 168 /* bne */, SP::BPXCC, Convert__Imm1_2__imm_95_9, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2664             :   { 168 /* bne */, SP::BPICCANT, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2665             :   { 168 /* bne */, SP::BPXCCANT, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2666             :   { 168 /* bne */, SP::BPICCA, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2667             :   { 168 /* bne */, SP::BPXCCA, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2668             :   { 172 /* bneg */, SP::BCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
    2669             :   { 172 /* bneg */, SP::BPICC, Convert__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2670             :   { 172 /* bneg */, SP::BPXCC, Convert__Imm1_1__imm_95_6, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2671             :   { 172 /* bneg */, SP::BCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
    2672             :   { 172 /* bneg */, SP::BPICCA, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2673             :   { 172 /* bneg */, SP::BPXCCA, Convert__Imm1_2__imm_95_6, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2674             :   { 172 /* bneg */, SP::BPICCNT, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2675             :   { 172 /* bneg */, SP::BPXCCNT, Convert__Imm1_2__imm_95_6, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2676             :   { 172 /* bneg */, SP::BPICC, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2677             :   { 172 /* bneg */, SP::BPXCC, Convert__Imm1_2__imm_95_6, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2678             :   { 172 /* bneg */, SP::BPICCANT, Convert__Imm1_3__imm_95_6, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2679             :   { 172 /* bneg */, SP::BPXCCANT, Convert__Imm1_3__imm_95_6, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2680             :   { 172 /* bneg */, SP::BPICCA, Convert__Imm1_3__imm_95_6, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2681             :   { 172 /* bneg */, SP::BPXCCA, Convert__Imm1_3__imm_95_6, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2682             :   { 177 /* bnz */, SP::BCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
    2683             :   { 177 /* bnz */, SP::BPICC, Convert__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2684             :   { 177 /* bnz */, SP::BPXCC, Convert__Imm1_1__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2685             :   { 177 /* bnz */, SP::BCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
    2686             :   { 177 /* bnz */, SP::BPICCA, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2687             :   { 177 /* bnz */, SP::BPXCCA, Convert__Imm1_2__imm_95_9, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2688             :   { 177 /* bnz */, SP::BPICCNT, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2689             :   { 177 /* bnz */, SP::BPXCCNT, Convert__Imm1_2__imm_95_9, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2690             :   { 177 /* bnz */, SP::BPICC, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2691             :   { 177 /* bnz */, SP::BPXCC, Convert__Imm1_2__imm_95_9, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2692             :   { 177 /* bnz */, SP::BPICCANT, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2693             :   { 177 /* bnz */, SP::BPXCCANT, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2694             :   { 177 /* bnz */, SP::BPICCA, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2695             :   { 177 /* bnz */, SP::BPXCCA, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2696             :   { 181 /* bpos */, SP::BCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
    2697             :   { 181 /* bpos */, SP::BPICC, Convert__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2698             :   { 181 /* bpos */, SP::BPXCC, Convert__Imm1_1__imm_95_14, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2699             :   { 181 /* bpos */, SP::BCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
    2700             :   { 181 /* bpos */, SP::BPICCA, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2701             :   { 181 /* bpos */, SP::BPXCCA, Convert__Imm1_2__imm_95_14, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2702             :   { 181 /* bpos */, SP::BPICCNT, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2703             :   { 181 /* bpos */, SP::BPXCCNT, Convert__Imm1_2__imm_95_14, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2704             :   { 181 /* bpos */, SP::BPICC, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2705             :   { 181 /* bpos */, SP::BPXCC, Convert__Imm1_2__imm_95_14, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2706             :   { 181 /* bpos */, SP::BPICCANT, Convert__Imm1_3__imm_95_14, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2707             :   { 181 /* bpos */, SP::BPXCCANT, Convert__Imm1_3__imm_95_14, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2708             :   { 181 /* bpos */, SP::BPICCA, Convert__Imm1_3__imm_95_14, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2709             :   { 181 /* bpos */, SP::BPXCCA, Convert__Imm1_3__imm_95_14, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2710             :   { 186 /* brgez */, SP::BPGEZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
    2711             :   { 186 /* brgez */, SP::BPGEZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
    2712             :   { 186 /* brgez */, SP::BPGEZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2713             :   { 186 /* brgez */, SP::BPGEZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2714             :   { 186 /* brgez */, SP::BPGEZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2715             :   { 186 /* brgez */, SP::BPGEZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2716             :   { 192 /* brgz */, SP::BPGZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
    2717             :   { 192 /* brgz */, SP::BPGZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
    2718             :   { 192 /* brgz */, SP::BPGZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2719             :   { 192 /* brgz */, SP::BPGZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2720             :   { 192 /* brgz */, SP::BPGZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2721             :   { 192 /* brgz */, SP::BPGZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2722             :   { 197 /* brlez */, SP::BPLEZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
    2723             :   { 197 /* brlez */, SP::BPLEZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
    2724             :   { 197 /* brlez */, SP::BPLEZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2725             :   { 197 /* brlez */, SP::BPLEZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2726             :   { 197 /* brlez */, SP::BPLEZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2727             :   { 197 /* brlez */, SP::BPLEZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2728             :   { 203 /* brlz */, SP::BPLZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
    2729             :   { 203 /* brlz */, SP::BPLZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
    2730             :   { 203 /* brlz */, SP::BPLZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2731             :   { 203 /* brlz */, SP::BPLZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2732             :   { 203 /* brlz */, SP::BPLZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2733             :   { 203 /* brlz */, SP::BPLZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2734             :   { 208 /* brnz */, SP::BPNZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
    2735             :   { 208 /* brnz */, SP::BPNZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
    2736             :   { 208 /* brnz */, SP::BPNZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2737             :   { 208 /* brnz */, SP::BPNZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2738             :   { 208 /* brnz */, SP::BPNZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2739             :   { 208 /* brnz */, SP::BPNZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2740             :   { 213 /* brz */, SP::BPZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
    2741             :   { 213 /* brz */, SP::BPZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
    2742             :   { 213 /* brz */, SP::BPZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2743             :   { 213 /* brz */, SP::BPZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2744             :   { 213 /* brz */, SP::BPZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
    2745             :   { 213 /* brz */, SP::BPZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
    2746             :   { 217 /* bset */, SP::ORrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
    2747             :   { 217 /* bset */, SP::ORri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    2748             :   { 222 /* bshuffle */, SP::BSHUFFLE, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    2749             :   { 231 /* btog */, SP::XORrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
    2750             :   { 231 /* btog */, SP::XORri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    2751             :   { 236 /* btst */, SP::ANDCCrr, Convert__regG0__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
    2752             :   { 236 /* btst */, SP::ANDCCri, Convert__regG0__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    2753             :   { 241 /* bvc */, SP::BCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
    2754             :   { 241 /* bvc */, SP::BPICC, Convert__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2755             :   { 241 /* bvc */, SP::BPXCC, Convert__Imm1_1__imm_95_15, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2756             :   { 241 /* bvc */, SP::BCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
    2757             :   { 241 /* bvc */, SP::BPICCA, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2758             :   { 241 /* bvc */, SP::BPXCCA, Convert__Imm1_2__imm_95_15, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2759             :   { 241 /* bvc */, SP::BPICCNT, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2760             :   { 241 /* bvc */, SP::BPXCCNT, Convert__Imm1_2__imm_95_15, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2761             :   { 241 /* bvc */, SP::BPICC, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2762             :   { 241 /* bvc */, SP::BPXCC, Convert__Imm1_2__imm_95_15, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2763             :   { 241 /* bvc */, SP::BPICCANT, Convert__Imm1_3__imm_95_15, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2764             :   { 241 /* bvc */, SP::BPXCCANT, Convert__Imm1_3__imm_95_15, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2765             :   { 241 /* bvc */, SP::BPICCA, Convert__Imm1_3__imm_95_15, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2766             :   { 241 /* bvc */, SP::BPXCCA, Convert__Imm1_3__imm_95_15, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2767             :   { 245 /* bvs */, SP::BCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
    2768             :   { 245 /* bvs */, SP::BPICC, Convert__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2769             :   { 245 /* bvs */, SP::BPXCC, Convert__Imm1_1__imm_95_7, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2770             :   { 245 /* bvs */, SP::BCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
    2771             :   { 245 /* bvs */, SP::BPICCA, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2772             :   { 245 /* bvs */, SP::BPXCCA, Convert__Imm1_2__imm_95_7, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2773             :   { 245 /* bvs */, SP::BPICCNT, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2774             :   { 245 /* bvs */, SP::BPXCCNT, Convert__Imm1_2__imm_95_7, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2775             :   { 245 /* bvs */, SP::BPICC, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2776             :   { 245 /* bvs */, SP::BPXCC, Convert__Imm1_2__imm_95_7, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2777             :   { 245 /* bvs */, SP::BPICCANT, Convert__Imm1_3__imm_95_7, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2778             :   { 245 /* bvs */, SP::BPXCCANT, Convert__Imm1_3__imm_95_7, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2779             :   { 245 /* bvs */, SP::BPICCA, Convert__Imm1_3__imm_95_7, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2780             :   { 245 /* bvs */, SP::BPXCCA, Convert__Imm1_3__imm_95_7, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2781             :   { 249 /* bz */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    2782             :   { 249 /* bz */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    2783             :   { 249 /* bz */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
    2784             :   { 249 /* bz */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
    2785             :   { 249 /* bz */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
    2786             :   { 249 /* bz */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
    2787             :   { 249 /* bz */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2788             :   { 249 /* bz */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2789             :   { 249 /* bz */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2790             :   { 249 /* bz */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2791             :   { 249 /* bz */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
    2792             :   { 249 /* bz */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
    2793             :   { 249 /* bz */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
    2794             :   { 249 /* bz */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
    2795             :   { 252 /* call */, SP::CALL, Convert__Imm1_0, 0, { MCK_Imm }, },
    2796             :   { 252 /* call */, SP::JMPLri, Convert__regO7__MEMri2_0, 0, { MCK_MEMri }, },
    2797             :   { 252 /* call */, SP::JMPLrr, Convert__regO7__MEMrr2_0, 0, { MCK_MEMrr }, },
    2798             :   { 257 /* cas */, SP::CASrr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1, Feature_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
    2799             :   { 261 /* casa */, SP::CASAasi10, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_10, MCK_IntRegs, MCK_IntRegs }, },
    2800             :   { 261 /* casa */, SP::CASArr, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_Imm, MCK_IntRegs, MCK_IntRegs }, },
    2801             :   { 266 /* casx */, SP::CASXrr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
    2802             :   { 271 /* cb */, SP::CBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
    2803             :   { 271 /* cb */, SP::CBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
    2804             :   { 271 /* cb */, SP::CBCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
    2805             :   { 271 /* cb */, SP::CBCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
    2806             :   { 274 /* cb0 */, SP::CBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
    2807             :   { 274 /* cb0 */, SP::CBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
    2808             :   { 278 /* cb01 */, SP::CBCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
    2809             :   { 278 /* cb01 */, SP::CBCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
    2810             :   { 283 /* cb012 */, SP::CBCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
    2811             :   { 283 /* cb012 */, SP::CBCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
    2812             :   { 289 /* cb013 */, SP::CBCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
    2813             :   { 289 /* cb013 */, SP::CBCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
    2814             :   { 295 /* cb02 */, SP::CBCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
    2815             :   { 295 /* cb02 */, SP::CBCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
    2816             :   { 300 /* cb023 */, SP::CBCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
    2817             :   { 300 /* cb023 */, SP::CBCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
    2818             :   { 306 /* cb03 */, SP::CBCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
    2819             :   { 306 /* cb03 */, SP::CBCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
    2820             :   { 311 /* cb1 */, SP::CBCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
    2821             :   { 311 /* cb1 */, SP::CBCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
    2822             :   { 315 /* cb12 */, SP::CBCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
    2823             :   { 315 /* cb12 */, SP::CBCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
    2824             :   { 320 /* cb123 */, SP::CBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    2825             :   { 320 /* cb123 */, SP::CBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
    2826             :   { 326 /* cb13 */, SP::CBCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
    2827             :   { 326 /* cb13 */, SP::CBCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
    2828             :   { 331 /* cb2 */, SP::CBCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
    2829             :   { 331 /* cb2 */, SP::CBCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
    2830             :   { 335 /* cb23 */, SP::CBCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
    2831             :   { 335 /* cb23 */, SP::CBCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
    2832             :   { 340 /* cb3 */, SP::CBCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
    2833             :   { 340 /* cb3 */, SP::CBCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
    2834             :   { 344 /* cba */, SP::CBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
    2835             :   { 344 /* cba */, SP::CBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
    2836             :   { 348 /* cbn */, SP::CBCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
    2837             :   { 348 /* cbn */, SP::CBCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
    2838             :   { 352 /* clr */, SP::ORrr, Convert__Reg1_0__regG0__regG0, 0, { MCK_IntRegs }, },
    2839             :   { 352 /* clr */, SP::STri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
    2840             :   { 352 /* clr */, SP::STrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
    2841             :   { 356 /* clrb */, SP::STBri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
    2842             :   { 356 /* clrb */, SP::STBrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
    2843             :   { 361 /* clrh */, SP::STHri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
    2844             :   { 361 /* clrh */, SP::STHrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
    2845             :   { 366 /* cmask16 */, SP::CMASK16, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
    2846             :   { 374 /* cmask32 */, SP::CMASK32, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
    2847             :   { 382 /* cmask8 */, SP::CMASK8, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
    2848             :   { 389 /* cmp */, SP::CMPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs }, },
    2849             :   { 389 /* cmp */, SP::CMPri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
    2850             :   { 393 /* dec */, SP::SUBri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
    2851             :   { 393 /* dec */, SP::SUBri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    2852             :   { 397 /* deccc */, SP::SUBCCri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
    2853             :   { 397 /* deccc */, SP::SUBCCri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    2854             :   { 403 /* edge16 */, SP::EDGE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2855             :   { 410 /* edge16l */, SP::EDGE16L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2856             :   { 418 /* edge16ln */, SP::EDGE16LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2857             :   { 427 /* edge16n */, SP::EDGE16N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2858             :   { 435 /* edge32 */, SP::EDGE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2859             :   { 442 /* edge32l */, SP::EDGE32L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2860             :   { 450 /* edge32ln */, SP::EDGE32LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2861             :   { 459 /* edge32n */, SP::EDGE32N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2862             :   { 467 /* edge8 */, SP::EDGE8, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2863             :   { 473 /* edge8l */, SP::EDGE8L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2864             :   { 480 /* edge8ln */, SP::EDGE8LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2865             :   { 488 /* edge8n */, SP::EDGE8N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    2866             :   { 495 /* fabsd */, SP::FABSD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
    2867             :   { 501 /* fabsq */, SP::FABSQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
    2868             :   { 507 /* fabss */, SP::FABSS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
    2869             :   { 513 /* faddd */, SP::FADDD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    2870             :   { 519 /* faddq */, SP::FADDQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    2871             :   { 525 /* fadds */, SP::FADDS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    2872             :   { 531 /* faligndata */, SP::FALIGNADATA, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    2873             :   { 542 /* fand */, SP::FAND, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    2874             :   { 547 /* fandnot1 */, SP::FANDNOT1, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    2875             :   { 556 /* fandnot1s */, SP::FANDNOT1S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    2876             :   { 566 /* fandnot2 */, SP::FANDNOT2, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    2877             :   { 575 /* fandnot2s */, SP::FANDNOT2S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    2878             :   { 585 /* fands */, SP::FANDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    2879             :   { 591 /* fb */, SP::FBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
    2880             :   { 591 /* fb */, SP::FBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
    2881             :   { 591 /* fb */, SP::BPFCC, Convert__Imm1_1__imm_95_8__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2882             :   { 591 /* fb */, SP::FBCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
    2883             :   { 591 /* fb */, SP::BPFCCA, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2884             :   { 591 /* fb */, SP::BPFCCNT, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2885             :   { 591 /* fb */, SP::BPFCC, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2886             :   { 591 /* fb */, SP::FBCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
    2887             :   { 591 /* fb */, SP::BPFCC, Convert__Imm1_2__Imm1_0__Reg1_1, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_Imm }, },
    2888             :   { 591 /* fb */, SP::BPFCCANT, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2889             :   { 591 /* fb */, SP::BPFCCA, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2890             :   { 591 /* fb */, SP::BPFCCA, Convert__Imm1_3__Imm1_0__Reg1_2, Feature_HasV9, { MCK_Imm, MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2891             :   { 591 /* fb */, SP::BPFCCNT, Convert__Imm1_3__Imm1_0__Reg1_2, Feature_HasV9, { MCK_Imm, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2892             :   { 591 /* fb */, SP::BPFCCANT, Convert__Imm1_4__Imm1_0__Reg1_3, Feature_HasV9, { MCK_Imm, MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2893             :   { 594 /* fba */, SP::FBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
    2894             :   { 594 /* fba */, SP::FBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
    2895             :   { 594 /* fba */, SP::BPFCC, Convert__Imm1_1__imm_95_8__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2896             :   { 594 /* fba */, SP::BPFCCA, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2897             :   { 594 /* fba */, SP::BPFCCNT, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2898             :   { 594 /* fba */, SP::BPFCC, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2899             :   { 594 /* fba */, SP::BPFCCANT, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2900             :   { 594 /* fba */, SP::BPFCCA, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2901             :   { 598 /* fbe */, SP::FBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
    2902             :   { 598 /* fbe */, SP::FBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
    2903             :   { 598 /* fbe */, SP::BPFCC, Convert__Imm1_1__imm_95_9__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2904             :   { 598 /* fbe */, SP::BPFCCA, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2905             :   { 598 /* fbe */, SP::BPFCCNT, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2906             :   { 598 /* fbe */, SP::BPFCC, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2907             :   { 598 /* fbe */, SP::BPFCCANT, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2908             :   { 598 /* fbe */, SP::BPFCCA, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2909             :   { 602 /* fbg */, SP::FBCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
    2910             :   { 602 /* fbg */, SP::FBCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
    2911             :   { 602 /* fbg */, SP::BPFCC, Convert__Imm1_1__imm_95_6__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2912             :   { 602 /* fbg */, SP::BPFCCA, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2913             :   { 602 /* fbg */, SP::BPFCCNT, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2914             :   { 602 /* fbg */, SP::BPFCC, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2915             :   { 602 /* fbg */, SP::BPFCCANT, Convert__Imm1_3__imm_95_6__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2916             :   { 602 /* fbg */, SP::BPFCCA, Convert__Imm1_3__imm_95_6__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2917             :   { 606 /* fbge */, SP::FBCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
    2918             :   { 606 /* fbge */, SP::FBCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
    2919             :   { 606 /* fbge */, SP::BPFCC, Convert__Imm1_1__imm_95_11__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2920             :   { 606 /* fbge */, SP::BPFCCA, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2921             :   { 606 /* fbge */, SP::BPFCCNT, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2922             :   { 606 /* fbge */, SP::BPFCC, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2923             :   { 606 /* fbge */, SP::BPFCCANT, Convert__Imm1_3__imm_95_11__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2924             :   { 606 /* fbge */, SP::BPFCCA, Convert__Imm1_3__imm_95_11__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2925             :   { 611 /* fbl */, SP::FBCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
    2926             :   { 611 /* fbl */, SP::FBCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
    2927             :   { 611 /* fbl */, SP::BPFCC, Convert__Imm1_1__imm_95_4__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2928             :   { 611 /* fbl */, SP::BPFCCA, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2929             :   { 611 /* fbl */, SP::BPFCCNT, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2930             :   { 611 /* fbl */, SP::BPFCC, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2931             :   { 611 /* fbl */, SP::BPFCCANT, Convert__Imm1_3__imm_95_4__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2932             :   { 611 /* fbl */, SP::BPFCCA, Convert__Imm1_3__imm_95_4__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2933             :   { 615 /* fble */, SP::FBCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
    2934             :   { 615 /* fble */, SP::FBCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
    2935             :   { 615 /* fble */, SP::BPFCC, Convert__Imm1_1__imm_95_13__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2936             :   { 615 /* fble */, SP::BPFCCA, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2937             :   { 615 /* fble */, SP::BPFCCNT, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2938             :   { 615 /* fble */, SP::BPFCC, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2939             :   { 615 /* fble */, SP::BPFCCANT, Convert__Imm1_3__imm_95_13__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2940             :   { 615 /* fble */, SP::BPFCCA, Convert__Imm1_3__imm_95_13__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2941             :   { 620 /* fblg */, SP::FBCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
    2942             :   { 620 /* fblg */, SP::FBCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
    2943             :   { 620 /* fblg */, SP::BPFCC, Convert__Imm1_1__imm_95_2__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2944             :   { 620 /* fblg */, SP::BPFCCA, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2945             :   { 620 /* fblg */, SP::BPFCCNT, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2946             :   { 620 /* fblg */, SP::BPFCC, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2947             :   { 620 /* fblg */, SP::BPFCCANT, Convert__Imm1_3__imm_95_2__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2948             :   { 620 /* fblg */, SP::BPFCCA, Convert__Imm1_3__imm_95_2__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2949             :   { 625 /* fbn */, SP::FBCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
    2950             :   { 625 /* fbn */, SP::FBCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
    2951             :   { 625 /* fbn */, SP::BPFCC, Convert__Imm1_1__imm_95_0__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2952             :   { 625 /* fbn */, SP::BPFCCA, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2953             :   { 625 /* fbn */, SP::BPFCCNT, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2954             :   { 625 /* fbn */, SP::BPFCC, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2955             :   { 625 /* fbn */, SP::BPFCCANT, Convert__Imm1_3__imm_95_0__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2956             :   { 625 /* fbn */, SP::BPFCCA, Convert__Imm1_3__imm_95_0__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2957             :   { 629 /* fbne */, SP::FBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    2958             :   { 629 /* fbne */, SP::FBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
    2959             :   { 629 /* fbne */, SP::BPFCC, Convert__Imm1_1__imm_95_1__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2960             :   { 629 /* fbne */, SP::BPFCCA, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2961             :   { 629 /* fbne */, SP::BPFCCNT, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2962             :   { 629 /* fbne */, SP::BPFCC, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2963             :   { 629 /* fbne */, SP::BPFCCANT, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2964             :   { 629 /* fbne */, SP::BPFCCA, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2965             :   { 634 /* fbnz */, SP::FBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    2966             :   { 634 /* fbnz */, SP::FBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
    2967             :   { 634 /* fbnz */, SP::BPFCC, Convert__Imm1_1__imm_95_1__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2968             :   { 634 /* fbnz */, SP::BPFCCA, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2969             :   { 634 /* fbnz */, SP::BPFCCNT, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2970             :   { 634 /* fbnz */, SP::BPFCC, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2971             :   { 634 /* fbnz */, SP::BPFCCANT, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2972             :   { 634 /* fbnz */, SP::BPFCCA, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2973             :   { 639 /* fbo */, SP::FBCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
    2974             :   { 639 /* fbo */, SP::FBCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
    2975             :   { 639 /* fbo */, SP::BPFCC, Convert__Imm1_1__imm_95_15__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2976             :   { 639 /* fbo */, SP::BPFCCA, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2977             :   { 639 /* fbo */, SP::BPFCCNT, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2978             :   { 639 /* fbo */, SP::BPFCC, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2979             :   { 639 /* fbo */, SP::BPFCCANT, Convert__Imm1_3__imm_95_15__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2980             :   { 639 /* fbo */, SP::BPFCCA, Convert__Imm1_3__imm_95_15__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2981             :   { 643 /* fbu */, SP::FBCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
    2982             :   { 643 /* fbu */, SP::FBCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
    2983             :   { 643 /* fbu */, SP::BPFCC, Convert__Imm1_1__imm_95_7__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2984             :   { 643 /* fbu */, SP::BPFCCA, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2985             :   { 643 /* fbu */, SP::BPFCCNT, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2986             :   { 643 /* fbu */, SP::BPFCC, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2987             :   { 643 /* fbu */, SP::BPFCCANT, Convert__Imm1_3__imm_95_7__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2988             :   { 643 /* fbu */, SP::BPFCCA, Convert__Imm1_3__imm_95_7__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2989             :   { 647 /* fbue */, SP::FBCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
    2990             :   { 647 /* fbue */, SP::FBCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
    2991             :   { 647 /* fbue */, SP::BPFCC, Convert__Imm1_1__imm_95_10__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    2992             :   { 647 /* fbue */, SP::BPFCCA, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    2993             :   { 647 /* fbue */, SP::BPFCCNT, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2994             :   { 647 /* fbue */, SP::BPFCC, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2995             :   { 647 /* fbue */, SP::BPFCCANT, Convert__Imm1_3__imm_95_10__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    2996             :   { 647 /* fbue */, SP::BPFCCA, Convert__Imm1_3__imm_95_10__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    2997             :   { 652 /* fbug */, SP::FBCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
    2998             :   { 652 /* fbug */, SP::FBCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
    2999             :   { 652 /* fbug */, SP::BPFCC, Convert__Imm1_1__imm_95_5__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    3000             :   { 652 /* fbug */, SP::BPFCCA, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    3001             :   { 652 /* fbug */, SP::BPFCCNT, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3002             :   { 652 /* fbug */, SP::BPFCC, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3003             :   { 652 /* fbug */, SP::BPFCCANT, Convert__Imm1_3__imm_95_5__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3004             :   { 652 /* fbug */, SP::BPFCCA, Convert__Imm1_3__imm_95_5__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3005             :   { 657 /* fbuge */, SP::FBCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
    3006             :   { 657 /* fbuge */, SP::FBCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
    3007             :   { 657 /* fbuge */, SP::BPFCC, Convert__Imm1_1__imm_95_12__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    3008             :   { 657 /* fbuge */, SP::BPFCCA, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    3009             :   { 657 /* fbuge */, SP::BPFCCNT, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3010             :   { 657 /* fbuge */, SP::BPFCC, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3011             :   { 657 /* fbuge */, SP::BPFCCANT, Convert__Imm1_3__imm_95_12__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3012             :   { 657 /* fbuge */, SP::BPFCCA, Convert__Imm1_3__imm_95_12__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3013             :   { 663 /* fbul */, SP::FBCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
    3014             :   { 663 /* fbul */, SP::FBCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
    3015             :   { 663 /* fbul */, SP::BPFCC, Convert__Imm1_1__imm_95_3__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    3016             :   { 663 /* fbul */, SP::BPFCCA, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    3017             :   { 663 /* fbul */, SP::BPFCCNT, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3018             :   { 663 /* fbul */, SP::BPFCC, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3019             :   { 663 /* fbul */, SP::BPFCCANT, Convert__Imm1_3__imm_95_3__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3020             :   { 663 /* fbul */, SP::BPFCCA, Convert__Imm1_3__imm_95_3__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3021             :   { 668 /* fbule */, SP::FBCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
    3022             :   { 668 /* fbule */, SP::FBCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
    3023             :   { 668 /* fbule */, SP::BPFCC, Convert__Imm1_1__imm_95_14__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    3024             :   { 668 /* fbule */, SP::BPFCCA, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    3025             :   { 668 /* fbule */, SP::BPFCCNT, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3026             :   { 668 /* fbule */, SP::BPFCC, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3027             :   { 668 /* fbule */, SP::BPFCCANT, Convert__Imm1_3__imm_95_14__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3028             :   { 668 /* fbule */, SP::BPFCCA, Convert__Imm1_3__imm_95_14__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3029             :   { 674 /* fbz */, SP::FBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
    3030             :   { 674 /* fbz */, SP::FBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
    3031             :   { 674 /* fbz */, SP::BPFCC, Convert__Imm1_1__imm_95_9__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
    3032             :   { 674 /* fbz */, SP::BPFCCA, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
    3033             :   { 674 /* fbz */, SP::BPFCCNT, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3034             :   { 674 /* fbz */, SP::BPFCC, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3035             :   { 674 /* fbz */, SP::BPFCCANT, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
    3036             :   { 674 /* fbz */, SP::BPFCCA, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
    3037             :   { 678 /* fchksm16 */, SP::FCHKSM16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3038             :   { 687 /* fcmpd */, SP::V9FCMPD, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
    3039             :   { 687 /* fcmpd */, SP::V9FCMPD, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3040             :   { 693 /* fcmped */, SP::V9FCMPED, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
    3041             :   { 693 /* fcmped */, SP::V9FCMPED, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3042             :   { 700 /* fcmpeq */, SP::V9FCMPEQ, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
    3043             :   { 700 /* fcmpeq */, SP::V9FCMPEQ, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3044             :   { 707 /* fcmpeq16 */, SP::FCMPEQ16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
    3045             :   { 716 /* fcmpeq32 */, SP::FCMPEQ32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
    3046             :   { 725 /* fcmpes */, SP::V9FCMPES, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs }, },
    3047             :   { 725 /* fcmpes */, SP::V9FCMPES, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3048             :   { 732 /* fcmpgt16 */, SP::FCMPGT16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
    3049             :   { 741 /* fcmpgt32 */, SP::FCMPGT32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
    3050             :   { 750 /* fcmple16 */, SP::FCMPLE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
    3051             :   { 759 /* fcmple32 */, SP::FCMPLE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
    3052             :   { 768 /* fcmpne16 */, SP::FCMPNE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
    3053             :   { 777 /* fcmpne32 */, SP::FCMPNE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
    3054             :   { 786 /* fcmpq */, SP::V9FCMPQ, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
    3055             :   { 786 /* fcmpq */, SP::V9FCMPQ, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3056             :   { 792 /* fcmps */, SP::V9FCMPS, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs }, },
    3057             :   { 792 /* fcmps */, SP::V9FCMPS, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3058             :   { 798 /* fdivd */, SP::FDIVD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3059             :   { 804 /* fdivq */, SP::FDIVQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3060             :   { 810 /* fdivs */, SP::FDIVS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3061             :   { 816 /* fdmulq */, SP::FDMULQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_QFPRegs }, },
    3062             :   { 823 /* fdtoi */, SP::FDTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
    3063             :   { 829 /* fdtoq */, SP::FDTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_QFPRegs }, },
    3064             :   { 835 /* fdtos */, SP::FDTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
    3065             :   { 841 /* fdtox */, SP::FDTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
    3066             :   { 847 /* fexpand */, SP::FEXPAND, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
    3067             :   { 855 /* fhaddd */, SP::FHADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3068             :   { 862 /* fhadds */, SP::FHADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3069             :   { 869 /* fhsubd */, SP::FHSUBD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3070             :   { 876 /* fhsubs */, SP::FHSUBS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3071             :   { 883 /* fitod */, SP::FITOD, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
    3072             :   { 889 /* fitoq */, SP::FITOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_QFPRegs }, },
    3073             :   { 895 /* fitos */, SP::FITOS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
    3074             :   { 901 /* flcmpd */, SP::FLCMPD, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVIS3, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3075             :   { 908 /* flcmps */, SP::FLCMPS, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVIS3, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3076             :   { 915 /* flush */, SP::FLUSH, Convert_NoOperands, 0, {  }, },
    3077             :   { 915 /* flush */, SP::FLUSH, Convert_NoOperands, 0, { MCK__PCT_g0 }, },
    3078             :   { 915 /* flush */, SP::FLUSHri, Convert__MEMri2_0, 0, { MCK_MEMri }, },
    3079             :   { 915 /* flush */, SP::FLUSHrr, Convert__MEMrr2_0, 0, { MCK_MEMrr }, },
    3080             :   { 921 /* flushw */, SP::FLUSHW, Convert_NoOperands, Feature_HasV9, {  }, },
    3081             :   { 928 /* fmean16 */, SP::FMEAN16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3082             :   { 936 /* fmovd */, SP::FMOVD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
    3083             :   { 936 /* fmovd */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3084             :   { 936 /* fmovd */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3085             :   { 936 /* fmovd */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3086             :   { 936 /* fmovd */, SP::FMOVD_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_DFPRegs, MCK_DFPRegs }, },
    3087             :   { 936 /* fmovd */, SP::FMOVD_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3088             :   { 936 /* fmovd */, SP::FMOVD_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3089             :   { 936 /* fmovd */, SP::V9FMOVD_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3090             :   { 942 /* fmovda */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3091             :   { 942 /* fmovda */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3092             :   { 942 /* fmovda */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3093             :   { 949 /* fmovdcc */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3094             :   { 949 /* fmovdcc */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3095             :   { 957 /* fmovdcs */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3096             :   { 957 /* fmovdcs */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3097             :   { 965 /* fmovde */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3098             :   { 965 /* fmovde */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3099             :   { 965 /* fmovde */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3100             :   { 972 /* fmovdeq */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3101             :   { 972 /* fmovdeq */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3102             :   { 980 /* fmovdg */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3103             :   { 980 /* fmovdg */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3104             :   { 980 /* fmovdg */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3105             :   { 987 /* fmovdge */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3106             :   { 987 /* fmovdge */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3107             :   { 987 /* fmovdge */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3108             :   { 995 /* fmovdgeu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3109             :   { 995 /* fmovdgeu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3110             :   { 1004 /* fmovdgu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3111             :   { 1004 /* fmovdgu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3112             :   { 1012 /* fmovdl */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3113             :   { 1012 /* fmovdl */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3114             :   { 1012 /* fmovdl */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3115             :   { 1019 /* fmovdle */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3116             :   { 1019 /* fmovdle */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3117             :   { 1019 /* fmovdle */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3118             :   { 1027 /* fmovdleu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3119             :   { 1027 /* fmovdleu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3120             :   { 1036 /* fmovdlg */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3121             :   { 1044 /* fmovdlu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3122             :   { 1044 /* fmovdlu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3123             :   { 1052 /* fmovdn */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3124             :   { 1052 /* fmovdn */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3125             :   { 1052 /* fmovdn */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3126             :   { 1059 /* fmovdne */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3127             :   { 1059 /* fmovdne */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3128             :   { 1059 /* fmovdne */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3129             :   { 1067 /* fmovdneg */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3130             :   { 1067 /* fmovdneg */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3131             :   { 1076 /* fmovdnz */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3132             :   { 1076 /* fmovdnz */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3133             :   { 1076 /* fmovdnz */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3134             :   { 1084 /* fmovdo */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3135             :   { 1091 /* fmovdpos */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3136             :   { 1091 /* fmovdpos */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3137             :   { 1100 /* fmovdu */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3138             :   { 1107 /* fmovdue */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3139             :   { 1115 /* fmovdug */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3140             :   { 1123 /* fmovduge */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3141             :   { 1132 /* fmovdul */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3142             :   { 1140 /* fmovdule */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3143             :   { 1149 /* fmovdvc */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3144             :   { 1149 /* fmovdvc */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3145             :   { 1157 /* fmovdvs */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3146             :   { 1157 /* fmovdvs */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3147             :   { 1165 /* fmovdz */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
    3148             :   { 1165 /* fmovdz */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
    3149             :   { 1165 /* fmovdz */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3150             :   { 1172 /* fmovq */, SP::FMOVQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
    3151             :   { 1172 /* fmovq */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3152             :   { 1172 /* fmovq */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3153             :   { 1172 /* fmovq */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3154             :   { 1172 /* fmovq */, SP::FMOVQ_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_QFPRegs, MCK_QFPRegs }, },
    3155             :   { 1172 /* fmovq */, SP::FMOVQ_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3156             :   { 1172 /* fmovq */, SP::FMOVQ_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3157             :   { 1172 /* fmovq */, SP::V9FMOVQ_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3158             :   { 1178 /* fmovqa */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3159             :   { 1178 /* fmovqa */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3160             :   { 1178 /* fmovqa */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3161             :   { 1185 /* fmovqcc */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3162             :   { 1185 /* fmovqcc */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3163             :   { 1193 /* fmovqcs */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3164             :   { 1193 /* fmovqcs */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3165             :   { 1201 /* fmovqe */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3166             :   { 1201 /* fmovqe */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3167             :   { 1201 /* fmovqe */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3168             :   { 1208 /* fmovqeq */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3169             :   { 1208 /* fmovqeq */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3170             :   { 1216 /* fmovqg */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3171             :   { 1216 /* fmovqg */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3172             :   { 1216 /* fmovqg */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3173             :   { 1223 /* fmovqge */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3174             :   { 1223 /* fmovqge */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3175             :   { 1223 /* fmovqge */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3176             :   { 1231 /* fmovqgeu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3177             :   { 1231 /* fmovqgeu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3178             :   { 1240 /* fmovqgu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3179             :   { 1240 /* fmovqgu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3180             :   { 1248 /* fmovql */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3181             :   { 1248 /* fmovql */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3182             :   { 1248 /* fmovql */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3183             :   { 1255 /* fmovqle */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3184             :   { 1255 /* fmovqle */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3185             :   { 1255 /* fmovqle */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3186             :   { 1263 /* fmovqleu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3187             :   { 1263 /* fmovqleu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3188             :   { 1272 /* fmovqlg */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3189             :   { 1280 /* fmovqlu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3190             :   { 1280 /* fmovqlu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3191             :   { 1288 /* fmovqn */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3192             :   { 1288 /* fmovqn */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3193             :   { 1288 /* fmovqn */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3194             :   { 1295 /* fmovqne */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3195             :   { 1295 /* fmovqne */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3196             :   { 1295 /* fmovqne */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3197             :   { 1303 /* fmovqneg */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3198             :   { 1303 /* fmovqneg */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3199             :   { 1312 /* fmovqnz */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3200             :   { 1312 /* fmovqnz */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3201             :   { 1312 /* fmovqnz */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3202             :   { 1320 /* fmovqo */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3203             :   { 1327 /* fmovqpos */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3204             :   { 1327 /* fmovqpos */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3205             :   { 1336 /* fmovqu */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3206             :   { 1343 /* fmovque */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3207             :   { 1351 /* fmovqug */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3208             :   { 1359 /* fmovquge */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3209             :   { 1368 /* fmovqul */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3210             :   { 1376 /* fmovqule */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3211             :   { 1385 /* fmovqvc */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3212             :   { 1385 /* fmovqvc */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3213             :   { 1393 /* fmovqvs */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3214             :   { 1393 /* fmovqvs */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3215             :   { 1401 /* fmovqz */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
    3216             :   { 1401 /* fmovqz */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
    3217             :   { 1401 /* fmovqz */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3218             :   { 1408 /* fmovrdgez */, SP::FMOVRGEZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3219             :   { 1418 /* fmovrdgz */, SP::FMOVRGZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3220             :   { 1427 /* fmovrdlez */, SP::FMOVRLEZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3221             :   { 1437 /* fmovrdlz */, SP::FMOVRLZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3222             :   { 1446 /* fmovrdnz */, SP::FMOVRNZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3223             :   { 1455 /* fmovrdz */, SP::FMOVRZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3224             :   { 1463 /* fmovrqgez */, SP::FMOVRGEZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3225             :   { 1473 /* fmovrqgz */, SP::FMOVRGZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3226             :   { 1482 /* fmovrqlez */, SP::FMOVRLEZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3227             :   { 1492 /* fmovrqlz */, SP::FMOVRLZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3228             :   { 1501 /* fmovrqnz */, SP::FMOVRNZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3229             :   { 1510 /* fmovrqz */, SP::FMOVRZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3230             :   { 1518 /* fmovrsgez */, SP::FMOVRGEZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3231             :   { 1528 /* fmovrsgz */, SP::FMOVRGZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3232             :   { 1537 /* fmovrslez */, SP::FMOVRLEZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3233             :   { 1547 /* fmovrslz */, SP::FMOVRLZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3234             :   { 1556 /* fmovrsnz */, SP::FMOVRNZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3235             :   { 1565 /* fmovrsz */, SP::FMOVRZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
    3236             :   { 1573 /* fmovs */, SP::FMOVS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
    3237             :   { 1573 /* fmovs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3238             :   { 1573 /* fmovs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3239             :   { 1573 /* fmovs */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3240             :   { 1573 /* fmovs */, SP::FMOVS_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_FPRegs, MCK_FPRegs }, },
    3241             :   { 1573 /* fmovs */, SP::FMOVS_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3242             :   { 1573 /* fmovs */, SP::FMOVS_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3243             :   { 1573 /* fmovs */, SP::V9FMOVS_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3244             :   { 1579 /* fmovsa */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3245             :   { 1579 /* fmovsa */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3246             :   { 1579 /* fmovsa */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3247             :   { 1586 /* fmovscc */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3248             :   { 1586 /* fmovscc */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3249             :   { 1594 /* fmovscs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3250             :   { 1594 /* fmovscs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3251             :   { 1602 /* fmovse */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3252             :   { 1602 /* fmovse */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3253             :   { 1602 /* fmovse */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3254             :   { 1609 /* fmovseq */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3255             :   { 1609 /* fmovseq */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3256             :   { 1617 /* fmovsg */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3257             :   { 1617 /* fmovsg */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3258             :   { 1617 /* fmovsg */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3259             :   { 1624 /* fmovsge */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3260             :   { 1624 /* fmovsge */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3261             :   { 1624 /* fmovsge */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3262             :   { 1632 /* fmovsgeu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3263             :   { 1632 /* fmovsgeu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3264             :   { 1641 /* fmovsgu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3265             :   { 1641 /* fmovsgu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3266             :   { 1649 /* fmovsl */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3267             :   { 1649 /* fmovsl */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3268             :   { 1649 /* fmovsl */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3269             :   { 1656 /* fmovsle */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3270             :   { 1656 /* fmovsle */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3271             :   { 1656 /* fmovsle */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3272             :   { 1664 /* fmovsleu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3273             :   { 1664 /* fmovsleu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3274             :   { 1673 /* fmovslg */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3275             :   { 1681 /* fmovslu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3276             :   { 1681 /* fmovslu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3277             :   { 1689 /* fmovsn */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3278             :   { 1689 /* fmovsn */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3279             :   { 1689 /* fmovsn */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3280             :   { 1696 /* fmovsne */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3281             :   { 1696 /* fmovsne */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3282             :   { 1696 /* fmovsne */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3283             :   { 1704 /* fmovsneg */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3284             :   { 1704 /* fmovsneg */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3285             :   { 1713 /* fmovsnz */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3286             :   { 1713 /* fmovsnz */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3287             :   { 1713 /* fmovsnz */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3288             :   { 1721 /* fmovso */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3289             :   { 1728 /* fmovspos */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3290             :   { 1728 /* fmovspos */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3291             :   { 1737 /* fmovsu */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3292             :   { 1744 /* fmovsue */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3293             :   { 1752 /* fmovsug */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3294             :   { 1760 /* fmovsuge */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3295             :   { 1769 /* fmovsul */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3296             :   { 1777 /* fmovsule */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3297             :   { 1786 /* fmovsvc */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3298             :   { 1786 /* fmovsvc */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3299             :   { 1794 /* fmovsvs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3300             :   { 1794 /* fmovsvs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3301             :   { 1802 /* fmovsz */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
    3302             :   { 1802 /* fmovsz */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
    3303             :   { 1802 /* fmovsz */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
    3304             :   { 1809 /* fmul8sux16 */, SP::FMUL8SUX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3305             :   { 1820 /* fmul8ulx16 */, SP::FMUL8ULX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3306             :   { 1831 /* fmul8x16 */, SP::FMUL8X16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3307             :   { 1840 /* fmul8x16al */, SP::FMUL8X16AL, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3308             :   { 1851 /* fmul8x16au */, SP::FMUL8X16AU, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3309             :   { 1862 /* fmuld */, SP::FMULD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3310             :   { 1868 /* fmuld8sux16 */, SP::FMULD8SUX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3311             :   { 1880 /* fmuld8ulx16 */, SP::FMULD8ULX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3312             :   { 1892 /* fmulq */, SP::FMULQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3313             :   { 1898 /* fmuls */, SP::FMULS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3314             :   { 1904 /* fnaddd */, SP::FNADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3315             :   { 1911 /* fnadds */, SP::FNADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3316             :   { 1918 /* fnand */, SP::FNAND, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3317             :   { 1924 /* fnands */, SP::FNANDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3318             :   { 1931 /* fnegd */, SP::FNEGD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
    3319             :   { 1937 /* fnegq */, SP::FNEGQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
    3320             :   { 1943 /* fnegs */, SP::FNEGS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
    3321             :   { 1949 /* fnhaddd */, SP::FNHADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3322             :   { 1949 /* fnhaddd */, SP::FNMULD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3323             :   { 1957 /* fnhadds */, SP::FNHADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3324             :   { 1957 /* fnhadds */, SP::FNMULS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3325             :   { 1957 /* fnhadds */, SP::FNSMULD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3326             :   { 1965 /* fnor */, SP::FNOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3327             :   { 1970 /* fnors */, SP::FNORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3328             :   { 1976 /* fnot1 */, SP::FNOT1, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
    3329             :   { 1982 /* fnot1s */, SP::FNOT1S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
    3330             :   { 1989 /* fnot2 */, SP::FNOT2, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
    3331             :   { 1995 /* fnot2s */, SP::FNOT2S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
    3332             :   { 2002 /* fone */, SP::FONE, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_DFPRegs }, },
    3333             :   { 2007 /* fones */, SP::FONES, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_FPRegs }, },
    3334             :   { 2013 /* for */, SP::FOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3335             :   { 2017 /* fornot1 */, SP::FORNOT1, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3336             :   { 2025 /* fornot1s */, SP::FORNOT1S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3337             :   { 2034 /* fornot2 */, SP::FORNOT2, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3338             :   { 2042 /* fornot2s */, SP::FORNOT2S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3339             :   { 2051 /* fors */, SP::FORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3340             :   { 2056 /* fpack16 */, SP::FPACK16, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
    3341             :   { 2064 /* fpack32 */, SP::FPACK32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3342             :   { 2072 /* fpackfix */, SP::FPACKFIX, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
    3343             :   { 2081 /* fpadd16 */, SP::FPADD16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3344             :   { 2089 /* fpadd16s */, SP::FPADD16S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3345             :   { 2098 /* fpadd32 */, SP::FPADD32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3346             :   { 2106 /* fpadd32s */, SP::FPADD32S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3347             :   { 2115 /* fpadd64 */, SP::FPADD64, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3348             :   { 2123 /* fpmerge */, SP::FPMERGE, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3349             :   { 2131 /* fpsub16 */, SP::FPSUB16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3350             :   { 2139 /* fpsub16S */, SP::FPSUB16S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3351             :   { 2148 /* fpsub32 */, SP::FPSUB32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3352             :   { 2156 /* fpsub32S */, SP::FPSUB32S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3353             :   { 2165 /* fqtod */, SP::FQTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_DFPRegs }, },
    3354             :   { 2171 /* fqtoi */, SP::FQTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_FPRegs }, },
    3355             :   { 2177 /* fqtos */, SP::FQTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_FPRegs }, },
    3356             :   { 2183 /* fqtox */, SP::FQTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_DFPRegs }, },
    3357             :   { 2189 /* fslas16 */, SP::FSLAS16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3358             :   { 2197 /* fslas32 */, SP::FSLAS32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3359             :   { 2205 /* fsll16 */, SP::FSLL16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3360             :   { 2212 /* fsll32 */, SP::FSLL32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3361             :   { 2219 /* fsmuld */, SP::FSMULD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_DFPRegs }, },
    3362             :   { 2226 /* fsqrtd */, SP::FSQRTD, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
    3363             :   { 2233 /* fsqrtq */, SP::FSQRTQ, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
    3364             :   { 2240 /* fsqrts */, SP::FSQRTS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
    3365             :   { 2247 /* fsra16 */, SP::FSRA16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3366             :   { 2254 /* fsra32 */, SP::FSRA32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3367             :   { 2261 /* fsrc1 */, SP::FSRC1, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
    3368             :   { 2267 /* fsrc1s */, SP::FSRC1S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
    3369             :   { 2274 /* fsrc2 */, SP::FSRC2, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
    3370             :   { 2280 /* fsrc2s */, SP::FSRC2S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
    3371             :   { 2287 /* fsrl16 */, SP::FSRL16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3372             :   { 2294 /* fsrl32 */, SP::FSRL32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3373             :   { 2301 /* fstod */, SP::FSTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
    3374             :   { 2307 /* fstoi */, SP::FSTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
    3375             :   { 2313 /* fstoq */, SP::FSTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_QFPRegs }, },
    3376             :   { 2319 /* fstox */, SP::FSTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
    3377             :   { 2325 /* fsubd */, SP::FSUBD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3378             :   { 2331 /* fsubq */, SP::FSUBQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
    3379             :   { 2337 /* fsubs */, SP::FSUBS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3380             :   { 2343 /* fxnor */, SP::FXNOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3381             :   { 2349 /* fxnors */, SP::FXNORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3382             :   { 2356 /* fxor */, SP::FXOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3383             :   { 2361 /* fxors */, SP::FXORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
    3384             :   { 2367 /* fxtod */, SP::FXTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
    3385             :   { 2373 /* fxtoq */, SP::FXTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_QFPRegs }, },
    3386             :   { 2379 /* fxtos */, SP::FXTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
    3387             :   { 2385 /* fzero */, SP::FZERO, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_DFPRegs }, },
    3388             :   { 2391 /* fzeros */, SP::FZEROS, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_FPRegs }, },
    3389             :   { 2398 /* inc */, SP::ADDri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
    3390             :   { 2398 /* inc */, SP::ADDri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    3391             :   { 2402 /* inccc */, SP::ADDCCri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
    3392             :   { 2402 /* inccc */, SP::ADDCCri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    3393             :   { 2408 /* jmp */, SP::JMPLri, Convert__regG0__MEMri2_0, 0, { MCK_MEMri }, },
    3394             :   { 2408 /* jmp */, SP::JMPLrr, Convert__regG0__MEMrr2_0, 0, { MCK_MEMrr }, },
    3395             :   { 2412 /* jmpl */, SP::JMPLri, Convert__Reg1_1__MEMri2_0, 0, { MCK_MEMri, MCK_IntRegs }, },
    3396             :   { 2412 /* jmpl */, SP::JMPLrr, Convert__Reg1_1__MEMrr2_0, 0, { MCK_MEMrr, MCK_IntRegs }, },
    3397             :   { 2417 /* ld */, SP::LDCSRri, Convert__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_csr }, },
    3398             :   { 2417 /* ld */, SP::LDFSRri, Convert__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_fsr }, },
    3399             :   { 2417 /* ld */, SP::LDCri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CoprocRegs }, },
    3400             :   { 2417 /* ld */, SP::LDFri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_FPRegs }, },
    3401             :   { 2417 /* ld */, SP::LDri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3402             :   { 2417 /* ld */, SP::LDCSRrr, Convert__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_csr }, },
    3403             :   { 2417 /* ld */, SP::LDFSRrr, Convert__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_fsr }, },
    3404             :   { 2417 /* ld */, SP::LDCrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CoprocRegs }, },
    3405             :   { 2417 /* ld */, SP::LDFrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_FPRegs }, },
    3406             :   { 2417 /* ld */, SP::LDrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3407             :   { 2420 /* lda */, SP::LDFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_FPRegs }, },
    3408             :   { 2420 /* lda */, SP::LDArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
    3409             :   { 2424 /* ldd */, SP::LDDCri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CoprocPair }, },
    3410             :   { 2424 /* ldd */, SP::LDDri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntPair }, },
    3411             :   { 2424 /* ldd */, SP::LDDFri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_DFPRegs }, },
    3412             :   { 2424 /* ldd */, SP::LDDCrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CoprocPair }, },
    3413             :   { 2424 /* ldd */, SP::LDDrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntPair }, },
    3414             :   { 2424 /* ldd */, SP::LDDFrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_DFPRegs }, },
    3415             :   { 2428 /* ldda */, SP::LDDArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntPair }, },
    3416             :   { 2428 /* ldda */, SP::LDDFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_DFPRegs }, },
    3417             :   { 2433 /* ldq */, SP::LDQFri, Convert__Reg1_3__MEMri2_1, Feature_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK_QFPRegs }, },
    3418             :   { 2433 /* ldq */, SP::LDQFrr, Convert__Reg1_3__MEMrr2_1, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_QFPRegs }, },
    3419             :   { 2437 /* ldqa */, SP::LDQFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_QFPRegs }, },
    3420             :   { 2442 /* ldsb */, SP::LDSBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3421             :   { 2442 /* ldsb */, SP::LDSBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3422             :   { 2447 /* ldsba */, SP::LDSBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
    3423             :   { 2453 /* ldsh */, SP::LDSHri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3424             :   { 2453 /* ldsh */, SP::LDSHrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3425             :   { 2458 /* ldsha */, SP::LDSHArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
    3426             :   { 2464 /* ldstub */, SP::LDSTUBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3427             :   { 2464 /* ldstub */, SP::LDSTUBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3428             :   { 2471 /* ldstuba */, SP::LDSTUBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
    3429             :   { 2479 /* ldsw */, SP::LDSWri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3430             :   { 2479 /* ldsw */, SP::LDSWrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3431             :   { 2484 /* ldub */, SP::LDUBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3432             :   { 2484 /* ldub */, SP::LDUBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3433             :   { 2489 /* lduba */, SP::LDUBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
    3434             :   { 2495 /* lduh */, SP::LDUHri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3435             :   { 2495 /* lduh */, SP::LDUHrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3436             :   { 2500 /* lduha */, SP::LDUHArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
    3437             :   { 2506 /* ldx */, SP::LDXFSRri, Convert__MEMri2_1, Feature_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_fsr }, },
    3438             :   { 2506 /* ldx */, SP::LDXri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3439             :   { 2506 /* ldx */, SP::LDXFSRrr, Convert__MEMrr2_1, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_fsr }, },
    3440             :   { 2506 /* ldx */, SP::LDXrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3441             :   { 2510 /* lzcnt */, SP::LZCNT, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs }, },
    3442             :   { 2516 /* membar */, SP::MEMBARi, Convert__Imm1_0, Feature_HasV9, { MCK_Imm }, },
    3443             :   { 2523 /* mov */, SP::RDPSR, Convert__Reg1_1, 0, { MCK__PCT_psr, MCK_IntRegs }, },
    3444             :   { 2523 /* mov */, SP::RDTBR, Convert__Reg1_1, 0, { MCK__PCT_tbr, MCK_IntRegs }, },
    3445             :   { 2523 /* mov */, SP::RDWIM, Convert__Reg1_1, 0, { MCK__PCT_wim, MCK_IntRegs }, },
    3446             :   { 2523 /* mov */, SP::RDASR, Convert__Reg1_1__Reg1_0, 0, { MCK_ASRRegs, MCK_IntRegs }, },
    3447             :   { 2523 /* mov */, SP::WRPSRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_psr }, },
    3448             :   { 2523 /* mov */, SP::WRTBRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_tbr }, },
    3449             :   { 2523 /* mov */, SP::WRWIMrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_wim }, },
    3450             :   { 2523 /* mov */, SP::WRASRrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_ASRRegs }, },
    3451             :   { 2523 /* mov */, SP::ORrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
    3452             :   { 2523 /* mov */, SP::WRPSRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_psr }, },
    3453             :   { 2523 /* mov */, SP::WRTBRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_tbr }, },
    3454             :   { 2523 /* mov */, SP::WRWIMri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_wim }, },
    3455             :   { 2523 /* mov */, SP::WRASRri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_ASRRegs }, },
    3456             :   { 2523 /* mov */, SP::ORri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    3457             :   { 2523 /* mov */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3458             :   { 2523 /* mov */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3459             :   { 2523 /* mov */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3460             :   { 2523 /* mov */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3461             :   { 2523 /* mov */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3462             :   { 2523 /* mov */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3463             :   { 2523 /* mov */, SP::MOVFCCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_IntRegs, MCK_IntRegs }, },
    3464             :   { 2523 /* mov */, SP::MOVFCCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_Imm, MCK_IntRegs }, },
    3465             :   { 2523 /* mov */, SP::MOVICCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3466             :   { 2523 /* mov */, SP::MOVICCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3467             :   { 2523 /* mov */, SP::MOVXCCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3468             :   { 2523 /* mov */, SP::MOVXCCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3469             :   { 2523 /* mov */, SP::V9MOVFCCrr, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3470             :   { 2523 /* mov */, SP::V9MOVFCCri, Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3471             :   { 2527 /* mova */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3472             :   { 2527 /* mova */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3473             :   { 2527 /* mova */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3474             :   { 2527 /* mova */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3475             :   { 2527 /* mova */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3476             :   { 2527 /* mova */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3477             :   { 2532 /* movcc */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3478             :   { 2532 /* movcc */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3479             :   { 2532 /* movcc */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3480             :   { 2532 /* movcc */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3481             :   { 2538 /* movcs */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3482             :   { 2538 /* movcs */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3483             :   { 2538 /* movcs */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3484             :   { 2538 /* movcs */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3485             :   { 2544 /* movdtox */, SP::MOVDTOX, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
    3486             :   { 2544 /* movdtox */, SP::MOVWTOS, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_DFPRegs }, },
    3487             :   { 2544 /* movdtox */, SP::MOVXTOD, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_DFPRegs }, },
    3488             :   { 2552 /* move */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3489             :   { 2552 /* move */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3490             :   { 2552 /* move */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3491             :   { 2552 /* move */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3492             :   { 2552 /* move */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3493             :   { 2552 /* move */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3494             :   { 2557 /* moveq */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3495             :   { 2557 /* moveq */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3496             :   { 2557 /* moveq */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3497             :   { 2557 /* moveq */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3498             :   { 2563 /* movg */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3499             :   { 2563 /* movg */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3500             :   { 2563 /* movg */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3501             :   { 2563 /* movg */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3502             :   { 2563 /* movg */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3503             :   { 2563 /* movg */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3504             :   { 2568 /* movge */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3505             :   { 2568 /* movge */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3506             :   { 2568 /* movge */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3507             :   { 2568 /* movge */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3508             :   { 2568 /* movge */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3509             :   { 2568 /* movge */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3510             :   { 2574 /* movgeu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3511             :   { 2574 /* movgeu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3512             :   { 2574 /* movgeu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3513             :   { 2574 /* movgeu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3514             :   { 2581 /* movgu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3515             :   { 2581 /* movgu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3516             :   { 2581 /* movgu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3517             :   { 2581 /* movgu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3518             :   { 2587 /* movl */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3519             :   { 2587 /* movl */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3520             :   { 2587 /* movl */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3521             :   { 2587 /* movl */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3522             :   { 2587 /* movl */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3523             :   { 2587 /* movl */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3524             :   { 2592 /* movle */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3525             :   { 2592 /* movle */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3526             :   { 2592 /* movle */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3527             :   { 2592 /* movle */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3528             :   { 2592 /* movle */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3529             :   { 2592 /* movle */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3530             :   { 2598 /* movleu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3531             :   { 2598 /* movleu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3532             :   { 2598 /* movleu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3533             :   { 2598 /* movleu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3534             :   { 2605 /* movlg */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3535             :   { 2605 /* movlg */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3536             :   { 2611 /* movlu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3537             :   { 2611 /* movlu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3538             :   { 2611 /* movlu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3539             :   { 2611 /* movlu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3540             :   { 2617 /* movn */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3541             :   { 2617 /* movn */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3542             :   { 2617 /* movn */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3543             :   { 2617 /* movn */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3544             :   { 2617 /* movn */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3545             :   { 2617 /* movn */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3546             :   { 2622 /* movne */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3547             :   { 2622 /* movne */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3548             :   { 2622 /* movne */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3549             :   { 2622 /* movne */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3550             :   { 2622 /* movne */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3551             :   { 2622 /* movne */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3552             :   { 2628 /* movneg */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3553             :   { 2628 /* movneg */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3554             :   { 2628 /* movneg */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3555             :   { 2628 /* movneg */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3556             :   { 2635 /* movnz */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3557             :   { 2635 /* movnz */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3558             :   { 2635 /* movnz */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3559             :   { 2635 /* movnz */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3560             :   { 2635 /* movnz */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3561             :   { 2635 /* movnz */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3562             :   { 2641 /* movo */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3563             :   { 2641 /* movo */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3564             :   { 2646 /* movpos */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3565             :   { 2646 /* movpos */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3566             :   { 2646 /* movpos */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3567             :   { 2646 /* movpos */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3568             :   { 2653 /* movrgez */, SP::MOVRGEZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3569             :   { 2653 /* movrgez */, SP::MOVRGEZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3570             :   { 2661 /* movrgz */, SP::MOVRGZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3571             :   { 2661 /* movrgz */, SP::MOVRGZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3572             :   { 2668 /* movrlez */, SP::MOVRLEZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3573             :   { 2668 /* movrlez */, SP::MOVRLEZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3574             :   { 2676 /* movrlz */, SP::MOVRLZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3575             :   { 2676 /* movrlz */, SP::MOVRLZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3576             :   { 2683 /* movrnz */, SP::MOVRNZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3577             :   { 2683 /* movrnz */, SP::MOVRNZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3578             :   { 2690 /* movrz */, SP::MOVRRZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3579             :   { 2690 /* movrz */, SP::MOVRRZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3580             :   { 2696 /* movstosw */, SP::MOVSTOSW, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
    3581             :   { 2705 /* movstouw */, SP::MOVSTOUW, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
    3582             :   { 2714 /* movu */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3583             :   { 2714 /* movu */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3584             :   { 2719 /* movue */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3585             :   { 2719 /* movue */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3586             :   { 2725 /* movug */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3587             :   { 2725 /* movug */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3588             :   { 2731 /* movuge */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3589             :   { 2731 /* movuge */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3590             :   { 2738 /* movul */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3591             :   { 2738 /* movul */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3592             :   { 2744 /* movule */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3593             :   { 2744 /* movule */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3594             :   { 2751 /* movvc */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3595             :   { 2751 /* movvc */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3596             :   { 2751 /* movvc */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3597             :   { 2751 /* movvc */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3598             :   { 2757 /* movvs */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3599             :   { 2757 /* movvs */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3600             :   { 2757 /* movvs */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3601             :   { 2757 /* movvs */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3602             :   { 2763 /* movz */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
    3603             :   { 2763 /* movz */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
    3604             :   { 2763 /* movz */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
    3605             :   { 2763 /* movz */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
    3606             :   { 2763 /* movz */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
    3607             :   { 2763 /* movz */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
    3608             :   { 2768 /* mulscc */, SP::MULSCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3609             :   { 2768 /* mulscc */, SP::MULSCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3610             :   { 2775 /* mulx */, SP::MULXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3611             :   { 2775 /* mulx */, SP::MULXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3612             :   { 2780 /* neg */, SP::SUBrr, Convert__Reg1_0__regG0__Reg1_0, 0, { MCK_IntRegs }, },
    3613             :   { 2780 /* neg */, SP::SUBrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
    3614             :   { 2784 /* nop */, SP::NOP, Convert_NoOperands, 0, {  }, },
    3615             :   { 2788 /* not */, SP::XNORrr, Convert__Reg1_0__Reg1_0__regG0, 0, { MCK_IntRegs }, },
    3616             :   { 2788 /* not */, SP::XNORrr, Convert__Reg1_1__Reg1_0__regG0, 0, { MCK_IntRegs, MCK_IntRegs }, },
    3617             :   { 2792 /* or */, SP::ORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3618             :   { 2792 /* or */, SP::ORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3619             :   { 2795 /* orcc */, SP::ORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3620             :   { 2795 /* orcc */, SP::ORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3621             :   { 2800 /* orn */, SP::ORNrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3622             :   { 2800 /* orn */, SP::ORNri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3623             :   { 2804 /* orncc */, SP::ORNCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3624             :   { 2804 /* orncc */, SP::ORNCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3625             :   { 2810 /* pdist */, SP::PDIST, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3626             :   { 2816 /* pdistn */, SP::PDISTN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
    3627             :   { 2823 /* popc */, SP::POPCrr, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs }, },
    3628             :   { 2828 /* rd */, SP::RDPSR, Convert__Reg1_1, 0, { MCK__PCT_psr, MCK_IntRegs }, },
    3629             :   { 2828 /* rd */, SP::RDTBR, Convert__Reg1_1, 0, { MCK__PCT_tbr, MCK_IntRegs }, },
    3630             :   { 2828 /* rd */, SP::RDWIM, Convert__Reg1_1, 0, { MCK__PCT_wim, MCK_IntRegs }, },
    3631             :   { 2828 /* rd */, SP::RDASR, Convert__Reg1_1__Reg1_0, 0, { MCK_ASRRegs, MCK_IntRegs }, },
    3632             :   { 2831 /* rdpr */, SP::RDPR, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_PRRegs, MCK_IntRegs }, },
    3633             :   { 2836 /* restore */, SP::RESTORErr, Convert__regG0__regG0__regG0, 0, {  }, },
    3634             :   { 2836 /* restore */, SP::RESTORErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3635             :   { 2836 /* restore */, SP::RESTOREri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3636             :   { 2844 /* ret */, SP::RET, Convert__imm_95_8, 0, {  }, },
    3637             :   { 2848 /* retl */, SP::RETL, Convert__imm_95_8, 0, {  }, },
    3638             :   { 2853 /* rett */, SP::RETTri, Convert__MEMri2_0, 0, { MCK_MEMri }, },
    3639             :   { 2853 /* rett */, SP::RETTrr, Convert__MEMrr2_0, 0, { MCK_MEMrr }, },
    3640             :   { 2858 /* save */, SP::SAVErr, Convert__regG0__regG0__regG0, 0, {  }, },
    3641             :   { 2858 /* save */, SP::SAVErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3642             :   { 2858 /* save */, SP::SAVEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3643             :   { 2863 /* sdiv */, SP::SDIVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3644             :   { 2863 /* sdiv */, SP::SDIVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3645             :   { 2868 /* sdivcc */, SP::SDIVCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3646             :   { 2868 /* sdivcc */, SP::SDIVCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3647             :   { 2875 /* sdivx */, SP::SDIVXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3648             :   { 2875 /* sdivx */, SP::SDIVXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3649             :   { 2881 /* set */, SP::SET, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    3650             :   { 2885 /* sethi */, SP::SETHIi, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
    3651             :   { 2891 /* shutdown */, SP::SHUTDOWN, Convert_NoOperands, Feature_HasVIS, {  }, },
    3652             :   { 2900 /* siam */, SP::SIAM, Convert_NoOperands, Feature_HasVIS2, {  }, },
    3653             :   { 2905 /* signx */, SP::SRArr, Convert__Reg1_0__Reg1_0__regG0, Feature_HasV9, { MCK_IntRegs }, },
    3654             :   { 2905 /* signx */, SP::SRArr, Convert__Reg1_1__Reg1_0__regG0, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs }, },
    3655             :   { 2911 /* sll */, SP::SLLrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3656             :   { 2911 /* sll */, SP::SLLri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3657             :   { 2915 /* sllx */, SP::SLLXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3658             :   { 2915 /* sllx */, SP::SLLXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3659             :   { 2920 /* smac */, SP::SMACrr, Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3660             :   { 2920 /* smac */, SP::SMACri, Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3661             :   { 2925 /* smul */, SP::SMULrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3662             :   { 2925 /* smul */, SP::SMULri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3663             :   { 2930 /* smulcc */, SP::SMULCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3664             :   { 2930 /* smulcc */, SP::SMULCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3665             :   { 2937 /* sra */, SP::SRArr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3666             :   { 2937 /* sra */, SP::SRAri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3667             :   { 2941 /* srax */, SP::SRAXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3668             :   { 2941 /* srax */, SP::SRAXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3669             :   { 2946 /* srl */, SP::SRLrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3670             :   { 2946 /* srl */, SP::SRLri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3671             :   { 2950 /* srlx */, SP::SRLXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3672             :   { 2950 /* srlx */, SP::SRLXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3673             :   { 2955 /* st */, SP::STCSRri, Convert__MEMri2_2, 0, { MCK__PCT_csr, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3674             :   { 2955 /* st */, SP::STCSRrr, Convert__MEMrr2_2, 0, { MCK__PCT_csr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3675             :   { 2955 /* st */, SP::STFSRri, Convert__MEMri2_2, 0, { MCK__PCT_fsr, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3676             :   { 2955 /* st */, SP::STFSRrr, Convert__MEMrr2_2, 0, { MCK__PCT_fsr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3677             :   { 2955 /* st */, SP::STCri, Convert__MEMri2_2__Reg1_0, 0, { MCK_CoprocRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3678             :   { 2955 /* st */, SP::STCrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_CoprocRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3679             :   { 2955 /* st */, SP::STFri, Convert__MEMri2_2__Reg1_0, 0, { MCK_FPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3680             :   { 2955 /* st */, SP::STFrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_FPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3681             :   { 2955 /* st */, SP::STri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3682             :   { 2955 /* st */, SP::STrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3683             :   { 2958 /* sta */, SP::STFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_FPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
    3684             :   { 2958 /* sta */, SP::STArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
    3685             :   { 2962 /* stb */, SP::STBri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3686             :   { 2962 /* stb */, SP::STBrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3687             :   { 2966 /* stba */, SP::STBArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
    3688             :   { 2971 /* stbar */, SP::STBAR, Convert_NoOperands, 0, {  }, },
    3689             :   { 2977 /* std */, SP::STDCQri, Convert__MEMri2_2, 0, { MCK__PCT_cq, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3690             :   { 2977 /* std */, SP::STDCQrr, Convert__MEMrr2_2, 0, { MCK__PCT_cq, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3691             :   { 2977 /* std */, SP::STDFQri, Convert__MEMri2_2, 0, { MCK__PCT_fq, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3692             :   { 2977 /* std */, SP::STDFQrr, Convert__MEMrr2_2, 0, { MCK__PCT_fq, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3693             :   { 2977 /* std */, SP::STDCri, Convert__MEMri2_2__Reg1_0, 0, { MCK_CoprocPair, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3694             :   { 2977 /* std */, SP::STDCrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_CoprocPair, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3695             :   { 2977 /* std */, SP::STDri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntPair, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3696             :   { 2977 /* std */, SP::STDrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntPair, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3697             :   { 2977 /* std */, SP::STDFri, Convert__MEMri2_2__Reg1_0, 0, { MCK_DFPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3698             :   { 2977 /* std */, SP::STDFrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_DFPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3699             :   { 2981 /* stda */, SP::STDArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntPair, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
    3700             :   { 2981 /* stda */, SP::STDFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_DFPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
    3701             :   { 2986 /* sth */, SP::STHri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3702             :   { 2986 /* sth */, SP::STHrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3703             :   { 2990 /* stha */, SP::STHArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
    3704             :   { 2995 /* stq */, SP::STQFri, Convert__MEMri2_2__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3705             :   { 2995 /* stq */, SP::STQFrr, Convert__MEMrr2_2__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3706             :   { 2999 /* stqa */, SP::STQFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
    3707             :   { 3004 /* stx */, SP::STXFSRri, Convert__MEMri2_2, Feature_HasV9, { MCK__PCT_fsr, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3708             :   { 3004 /* stx */, SP::STXFSRrr, Convert__MEMrr2_2, Feature_HasV9, { MCK__PCT_fsr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3709             :   { 3004 /* stx */, SP::STXri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
    3710             :   { 3004 /* stx */, SP::STXrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
    3711             :   { 3008 /* sub */, SP::SUBrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3712             :   { 3008 /* sub */, SP::SUBri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3713             :   { 3012 /* subcc */, SP::SUBCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3714             :   { 3012 /* subcc */, SP::SUBCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3715             :   { 3018 /* subx */, SP::SUBCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3716             :   { 3018 /* subx */, SP::SUBCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3717             :   { 3023 /* subxcc */, SP::SUBErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3718             :   { 3023 /* subxcc */, SP::SUBEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3719             :   { 3030 /* swap */, SP::SWAPri, Convert__Reg1_3__MEMri2_1__Tie0_1_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
    3720             :   { 3030 /* swap */, SP::SWAPrr, Convert__Reg1_3__MEMrr2_1__Tie0_1_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
    3721             :   { 3035 /* swapa */, SP::SWAPArr, Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
    3722             :   { 3041 /* t */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_8, 0, { MCK_IntRegs }, },
    3723             :   { 3041 /* t */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
    3724             :   { 3041 /* t */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3725             :   { 3041 /* t */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3726             :   { 3041 /* t */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3727             :   { 3041 /* t */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3728             :   { 3041 /* t */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3729             :   { 3041 /* t */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3730             :   { 3041 /* t */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3731             :   { 3041 /* t */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3732             :   { 3041 /* t */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3733             :   { 3041 /* t */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3734             :   { 3041 /* t */, SP::TRAPrr, Convert__Reg1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3735             :   { 3041 /* t */, SP::TRAPri, Convert__Reg1_1__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3736             :   { 3041 /* t */, SP::TICCrr, Convert__Reg1_2__Reg1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3737             :   { 3041 /* t */, SP::TICCri, Convert__Reg1_2__Imm1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3738             :   { 3041 /* t */, SP::TXCCrr, Convert__Reg1_2__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3739             :   { 3041 /* t */, SP::TXCCri, Convert__Reg1_2__Imm1_4__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3740             :   { 3043 /* ta */, SP::TA3, Convert_NoOperands, 0, { MCK_3 }, },
    3741             :   { 3043 /* ta */, SP::TA5, Convert_NoOperands, 0, { MCK_5 }, },
    3742             :   { 3043 /* ta */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_8, 0, { MCK_IntRegs }, },
    3743             :   { 3043 /* ta */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
    3744             :   { 3043 /* ta */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3745             :   { 3043 /* ta */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3746             :   { 3043 /* ta */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3747             :   { 3043 /* ta */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3748             :   { 3043 /* ta */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3749             :   { 3043 /* ta */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3750             :   { 3043 /* ta */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3751             :   { 3043 /* ta */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3752             :   { 3043 /* ta */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3753             :   { 3043 /* ta */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3754             :   { 3046 /* taddcc */, SP::TADDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3755             :   { 3046 /* taddcc */, SP::TADDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3756             :   { 3053 /* taddcctv */, SP::TADDCCTVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3757             :   { 3053 /* taddcctv */, SP::TADDCCTVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3758             :   { 3062 /* tcc */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_13, 0, { MCK_IntRegs }, },
    3759             :   { 3062 /* tcc */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
    3760             :   { 3062 /* tcc */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3761             :   { 3062 /* tcc */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3762             :   { 3062 /* tcc */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3763             :   { 3062 /* tcc */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3764             :   { 3062 /* tcc */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3765             :   { 3062 /* tcc */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3766             :   { 3062 /* tcc */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3767             :   { 3062 /* tcc */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3768             :   { 3062 /* tcc */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3769             :   { 3062 /* tcc */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3770             :   { 3066 /* tcs */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_5, 0, { MCK_IntRegs }, },
    3771             :   { 3066 /* tcs */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
    3772             :   { 3066 /* tcs */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3773             :   { 3066 /* tcs */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3774             :   { 3066 /* tcs */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3775             :   { 3066 /* tcs */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3776             :   { 3066 /* tcs */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3777             :   { 3066 /* tcs */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3778             :   { 3066 /* tcs */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3779             :   { 3066 /* tcs */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3780             :   { 3066 /* tcs */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3781             :   { 3066 /* tcs */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3782             :   { 3070 /* te */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
    3783             :   { 3070 /* te */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    3784             :   { 3070 /* te */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3785             :   { 3070 /* te */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3786             :   { 3070 /* te */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3787             :   { 3070 /* te */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3788             :   { 3070 /* te */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3789             :   { 3070 /* te */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3790             :   { 3070 /* te */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3791             :   { 3070 /* te */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3792             :   { 3070 /* te */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3793             :   { 3070 /* te */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3794             :   { 3073 /* teq */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
    3795             :   { 3073 /* teq */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    3796             :   { 3073 /* teq */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3797             :   { 3073 /* teq */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3798             :   { 3073 /* teq */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3799             :   { 3073 /* teq */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3800             :   { 3073 /* teq */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3801             :   { 3073 /* teq */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3802             :   { 3073 /* teq */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3803             :   { 3073 /* teq */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3804             :   { 3073 /* teq */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3805             :   { 3073 /* teq */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3806             :   { 3077 /* tg */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_10, 0, { MCK_IntRegs }, },
    3807             :   { 3077 /* tg */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
    3808             :   { 3077 /* tg */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3809             :   { 3077 /* tg */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3810             :   { 3077 /* tg */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3811             :   { 3077 /* tg */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3812             :   { 3077 /* tg */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_10, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3813             :   { 3077 /* tg */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_10, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3814             :   { 3077 /* tg */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3815             :   { 3077 /* tg */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3816             :   { 3077 /* tg */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3817             :   { 3077 /* tg */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3818             :   { 3080 /* tge */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_11, 0, { MCK_IntRegs }, },
    3819             :   { 3080 /* tge */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
    3820             :   { 3080 /* tge */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3821             :   { 3080 /* tge */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3822             :   { 3080 /* tge */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3823             :   { 3080 /* tge */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3824             :   { 3080 /* tge */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_11, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3825             :   { 3080 /* tge */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_11, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3826             :   { 3080 /* tge */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3827             :   { 3080 /* tge */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3828             :   { 3080 /* tge */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3829             :   { 3080 /* tge */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3830             :   { 3084 /* tgeu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_13, 0, { MCK_IntRegs }, },
    3831             :   { 3084 /* tgeu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
    3832             :   { 3084 /* tgeu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3833             :   { 3084 /* tgeu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3834             :   { 3084 /* tgeu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3835             :   { 3084 /* tgeu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3836             :   { 3084 /* tgeu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3837             :   { 3084 /* tgeu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3838             :   { 3084 /* tgeu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3839             :   { 3084 /* tgeu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3840             :   { 3084 /* tgeu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3841             :   { 3084 /* tgeu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3842             :   { 3089 /* tgu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_12, 0, { MCK_IntRegs }, },
    3843             :   { 3089 /* tgu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
    3844             :   { 3089 /* tgu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3845             :   { 3089 /* tgu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3846             :   { 3089 /* tgu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3847             :   { 3089 /* tgu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3848             :   { 3089 /* tgu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_12, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3849             :   { 3089 /* tgu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_12, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3850             :   { 3089 /* tgu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3851             :   { 3089 /* tgu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3852             :   { 3089 /* tgu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3853             :   { 3089 /* tgu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3854             :   { 3093 /* tl */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_3, 0, { MCK_IntRegs }, },
    3855             :   { 3093 /* tl */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
    3856             :   { 3093 /* tl */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3857             :   { 3093 /* tl */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3858             :   { 3093 /* tl */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3859             :   { 3093 /* tl */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3860             :   { 3093 /* tl */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_3, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3861             :   { 3093 /* tl */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_3, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3862             :   { 3093 /* tl */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3863             :   { 3093 /* tl */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3864             :   { 3093 /* tl */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3865             :   { 3093 /* tl */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3866             :   { 3096 /* tle */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_2, 0, { MCK_IntRegs }, },
    3867             :   { 3096 /* tle */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
    3868             :   { 3096 /* tle */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3869             :   { 3096 /* tle */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3870             :   { 3096 /* tle */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3871             :   { 3096 /* tle */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3872             :   { 3096 /* tle */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_2, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3873             :   { 3096 /* tle */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_2, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3874             :   { 3096 /* tle */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3875             :   { 3096 /* tle */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3876             :   { 3096 /* tle */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3877             :   { 3096 /* tle */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3878             :   { 3100 /* tleu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_4, 0, { MCK_IntRegs }, },
    3879             :   { 3100 /* tleu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
    3880             :   { 3100 /* tleu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3881             :   { 3100 /* tleu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3882             :   { 3100 /* tleu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3883             :   { 3100 /* tleu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3884             :   { 3100 /* tleu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_4, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3885             :   { 3100 /* tleu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_4, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3886             :   { 3100 /* tleu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3887             :   { 3100 /* tleu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3888             :   { 3100 /* tleu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3889             :   { 3100 /* tleu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3890             :   { 3105 /* tlu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_5, 0, { MCK_IntRegs }, },
    3891             :   { 3105 /* tlu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
    3892             :   { 3105 /* tlu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3893             :   { 3105 /* tlu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3894             :   { 3105 /* tlu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3895             :   { 3105 /* tlu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3896             :   { 3105 /* tlu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3897             :   { 3105 /* tlu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3898             :   { 3105 /* tlu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3899             :   { 3105 /* tlu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3900             :   { 3105 /* tlu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3901             :   { 3105 /* tlu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3902             :   { 3109 /* tn */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_0, 0, { MCK_IntRegs }, },
    3903             :   { 3109 /* tn */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
    3904             :   { 3109 /* tn */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3905             :   { 3109 /* tn */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3906             :   { 3109 /* tn */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3907             :   { 3109 /* tn */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3908             :   { 3109 /* tn */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3909             :   { 3109 /* tn */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_0, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3910             :   { 3109 /* tn */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3911             :   { 3109 /* tn */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3912             :   { 3109 /* tn */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3913             :   { 3109 /* tn */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3914             :   { 3112 /* tne */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_9, 0, { MCK_IntRegs }, },
    3915             :   { 3112 /* tne */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
    3916             :   { 3112 /* tne */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3917             :   { 3112 /* tne */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3918             :   { 3112 /* tne */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3919             :   { 3112 /* tne */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3920             :   { 3112 /* tne */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3921             :   { 3112 /* tne */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3922             :   { 3112 /* tne */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3923             :   { 3112 /* tne */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3924             :   { 3112 /* tne */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3925             :   { 3112 /* tne */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3926             :   { 3116 /* tneg */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_6, 0, { MCK_IntRegs }, },
    3927             :   { 3116 /* tneg */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
    3928             :   { 3116 /* tneg */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3929             :   { 3116 /* tneg */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3930             :   { 3116 /* tneg */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3931             :   { 3116 /* tneg */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3932             :   { 3116 /* tneg */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_6, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3933             :   { 3116 /* tneg */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_6, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3934             :   { 3116 /* tneg */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3935             :   { 3116 /* tneg */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3936             :   { 3116 /* tneg */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3937             :   { 3116 /* tneg */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3938             :   { 3121 /* tnz */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_9, 0, { MCK_IntRegs }, },
    3939             :   { 3121 /* tnz */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
    3940             :   { 3121 /* tnz */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3941             :   { 3121 /* tnz */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3942             :   { 3121 /* tnz */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3943             :   { 3121 /* tnz */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3944             :   { 3121 /* tnz */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3945             :   { 3121 /* tnz */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3946             :   { 3121 /* tnz */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3947             :   { 3121 /* tnz */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3948             :   { 3121 /* tnz */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3949             :   { 3121 /* tnz */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3950             :   { 3125 /* tpos */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_14, 0, { MCK_IntRegs }, },
    3951             :   { 3125 /* tpos */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
    3952             :   { 3125 /* tpos */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3953             :   { 3125 /* tpos */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3954             :   { 3125 /* tpos */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3955             :   { 3125 /* tpos */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3956             :   { 3125 /* tpos */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_14, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3957             :   { 3125 /* tpos */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_14, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3958             :   { 3125 /* tpos */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3959             :   { 3125 /* tpos */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3960             :   { 3125 /* tpos */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3961             :   { 3125 /* tpos */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3962             :   { 3130 /* tst */, SP::ORCCrr, Convert__regG0__Reg1_0__regG0, 0, { MCK_IntRegs }, },
    3963             :   { 3134 /* tsubcc */, SP::TSUBCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3964             :   { 3134 /* tsubcc */, SP::TSUBCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3965             :   { 3141 /* tsubcctv */, SP::TSUBCCTVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    3966             :   { 3141 /* tsubcctv */, SP::TSUBCCTVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    3967             :   { 3150 /* tvc */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_15, 0, { MCK_IntRegs }, },
    3968             :   { 3150 /* tvc */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
    3969             :   { 3150 /* tvc */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3970             :   { 3150 /* tvc */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3971             :   { 3150 /* tvc */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3972             :   { 3150 /* tvc */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3973             :   { 3150 /* tvc */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_15, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3974             :   { 3150 /* tvc */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_15, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3975             :   { 3150 /* tvc */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3976             :   { 3150 /* tvc */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3977             :   { 3150 /* tvc */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3978             :   { 3150 /* tvc */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3979             :   { 3154 /* tvs */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_7, 0, { MCK_IntRegs }, },
    3980             :   { 3154 /* tvs */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
    3981             :   { 3154 /* tvs */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3982             :   { 3154 /* tvs */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3983             :   { 3154 /* tvs */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3984             :   { 3154 /* tvs */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3985             :   { 3154 /* tvs */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_7, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3986             :   { 3154 /* tvs */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_7, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3987             :   { 3154 /* tvs */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3988             :   { 3154 /* tvs */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3989             :   { 3154 /* tvs */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3990             :   { 3154 /* tvs */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3991             :   { 3158 /* tz */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
    3992             :   { 3158 /* tz */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
    3993             :   { 3158 /* tz */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
    3994             :   { 3158 /* tz */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
    3995             :   { 3158 /* tz */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
    3996             :   { 3158 /* tz */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
    3997             :   { 3158 /* tz */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    3998             :   { 3158 /* tz */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
    3999             :   { 3158 /* tz */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    4000             :   { 3158 /* tz */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    4001             :   { 3158 /* tz */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
    4002             :   { 3158 /* tz */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
    4003             :   { 3161 /* udiv */, SP::UDIVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4004             :   { 3161 /* udiv */, SP::UDIVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4005             :   { 3166 /* udivcc */, SP::UDIVCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4006             :   { 3166 /* udivcc */, SP::UDIVCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4007             :   { 3173 /* udivx */, SP::UDIVXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4008             :   { 3173 /* udivx */, SP::UDIVXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4009             :   { 3179 /* umac */, SP::UMACrr, Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4010             :   { 3179 /* umac */, SP::UMACri, Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4011             :   { 3184 /* umul */, SP::UMULrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4012             :   { 3184 /* umul */, SP::UMULri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4013             :   { 3189 /* umulcc */, SP::UMULCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4014             :   { 3189 /* umulcc */, SP::UMULCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4015             :   { 3196 /* umulxhi */, SP::UMULXHI, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4016             :   { 3204 /* unimp */, SP::UNIMP, Convert__Imm1_0, 0, { MCK_Imm }, },
    4017             :   { 3210 /* wr */, SP::WRPSRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_psr }, },
    4018             :   { 3210 /* wr */, SP::WRTBRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_tbr }, },
    4019             :   { 3210 /* wr */, SP::WRWIMrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_wim }, },
    4020             :   { 3210 /* wr */, SP::WRASRrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_ASRRegs }, },
    4021             :   { 3210 /* wr */, SP::WRPSRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_psr }, },
    4022             :   { 3210 /* wr */, SP::WRTBRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_tbr }, },
    4023             :   { 3210 /* wr */, SP::WRWIMri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_wim }, },
    4024             :   { 3210 /* wr */, SP::WRASRri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_ASRRegs }, },
    4025             :   { 3210 /* wr */, SP::WRPSRrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_psr }, },
    4026             :   { 3210 /* wr */, SP::WRTBRrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_tbr }, },
    4027             :   { 3210 /* wr */, SP::WRWIMrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_wim }, },
    4028             :   { 3210 /* wr */, SP::WRASRrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_ASRRegs }, },
    4029             :   { 3210 /* wr */, SP::WRPSRri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_psr }, },
    4030             :   { 3210 /* wr */, SP::WRTBRri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_tbr }, },
    4031             :   { 3210 /* wr */, SP::WRWIMri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_wim }, },
    4032             :   { 3210 /* wr */, SP::WRASRri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_ASRRegs }, },
    4033             :   { 3213 /* wrpr */, SP::WRPRrr, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs, MCK_PRRegs }, },
    4034             :   { 3213 /* wrpr */, SP::WRPRri, Convert__Reg1_2__Reg1_0__Imm1_1, Feature_HasV9, { MCK_IntRegs, MCK_Imm, MCK_PRRegs }, },
    4035             :   { 3218 /* xmulx */, SP::XMULX, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4036             :   { 3224 /* xmulxhi */, SP::XMULXHI, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4037             :   { 3232 /* xnor */, SP::XNORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4038             :   { 3232 /* xnor */, SP::XNORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4039             :   { 3237 /* xnorcc */, SP::XNORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4040             :   { 3237 /* xnorcc */, SP::XNORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4041             :   { 3244 /* xor */, SP::XORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4042             :   { 3244 /* xor */, SP::XORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4043             :   { 3248 /* xorcc */, SP::XORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
    4044             :   { 3248 /* xorcc */, SP::XORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
    4045             : };
    4046             : 
    4047             : #include "llvm/Support/Debug.h"
    4048             : #include "llvm/Support/Format.h"
    4049             : 
    4050        1768 : unsigned SparcAsmParser::
    4051             : MatchInstructionImpl(const OperandVector &Operands,
    4052             :                      MCInst &Inst,
    4053             :                      uint64_t &ErrorInfo,
    4054             :                      bool matchingInlineAsm, unsigned VariantID) {
    4055             :   // Eliminate obvious mismatches.
    4056        1768 :   if (Operands.size() > 7) {
    4057           0 :     ErrorInfo = 7;
    4058           0 :     return Match_InvalidOperand;
    4059             :   }
    4060             : 
    4061             :   // Get the current feature set.
    4062        1768 :   uint64_t AvailableFeatures = getAvailableFeatures();
    4063             : 
    4064             :   // Get the instruction mnemonic, which is the first token.
    4065        3536 :   StringRef Mnemonic = ((SparcOperand&)*Operands[0]).getToken();
    4066             : 
    4067             :   // Process all MnemonicAliases to remap the mnemonic.
    4068        1768 :   applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
    4069             : 
    4070             :   // Some state to try to produce better error messages.
    4071             :   bool HadMatchOtherThanFeatures = false;
    4072             :   bool HadMatchOtherThanPredicate = false;
    4073             :   unsigned RetCode = Match_InvalidOperand;
    4074             :   uint64_t MissingFeatures = ~0ULL;
    4075             :   // Set ErrorInfo to the operand that mismatches if it is
    4076             :   // wrong for all instances of the instruction.
    4077        1768 :   ErrorInfo = ~0ULL;
    4078             :   // Find the appropriate table for this asm variant.
    4079             :   const MatchEntry *Start, *End;
    4080        1768 :   switch (VariantID) {
    4081           0 :   default: llvm_unreachable("invalid variant!");
    4082             :   case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
    4083             :   }
    4084             :   // Search the table.
    4085             :   auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
    4086             : 
    4087             :   DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
    4088             :   std::distance(MnemonicRange.first, MnemonicRange.second) << 
    4089             :   " encodings with mnemonic '" << Mnemonic << "'\n");
    4090             : 
    4091             :   // Return a more specific error code if no mnemonics match.
    4092        1768 :   if (MnemonicRange.first == MnemonicRange.second)
    4093             :     return Match_MnemonicFail;
    4094             : 
    4095        4520 :   for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
    4096        6280 :        it != ie; ++it) {
    4097        6220 :     bool HasRequiredFeatures =
    4098        6220 :       (AvailableFeatures & it->RequiredFeatures) == it->RequiredFeatures;
    4099             :     DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
    4100             :                                           << MII.getName(it->Opcode) << "\n");
    4101             :     // equal_range guarantees that instruction mnemonic matches.
    4102             :     assert(Mnemonic == it->getMnemonic());
    4103             :     bool OperandsValid = true;
    4104       18928 :     for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 6; ++FormalIdx) {
    4105       12564 :       auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
    4106             :       DEBUG_WITH_TYPE("asm-matcher",
    4107             :                       dbgs() << "  Matching formal operand class " << getMatchClassName(Formal)
    4108             :                              << " against actual operand at index " << ActualIdx);
    4109       12564 :       if (ActualIdx < Operands.size())
    4110             :         DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
    4111             :                         Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
    4112             :       else
    4113             :         DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
    4114       12564 :       if (ActualIdx >= Operands.size()) {
    4115             :         DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range ");
    4116        1751 :         OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass);
    4117           1 :         if (!OperandsValid) ErrorInfo = ActualIdx;
    4118             :         break;
    4119             :       }
    4120             :       MCParsedAsmOperand &Actual = *Operands[ActualIdx];
    4121       10813 :       unsigned Diag = validateOperandClass(Actual, Formal);
    4122       17015 :       if (Diag == Match_Success) {
    4123             :         DEBUG_WITH_TYPE("asm-matcher",
    4124             :                         dbgs() << "match success using generic matcher\n");
    4125        6202 :         ++ActualIdx;
    4126        6202 :         continue;
    4127             :       }
    4128             :       // If the generic handler indicates an invalid operand
    4129             :       // failure, check for a special case.
    4130             :       if (Diag != Match_Success) {
    4131        4611 :         unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
    4132        4763 :         if (TargetDiag == Match_Success) {
    4133             :           DEBUG_WITH_TYPE("asm-matcher",
    4134             :                           dbgs() << "match success using target matcher\n");
    4135         152 :           ++ActualIdx;
    4136         152 :           continue;
    4137             :         }
    4138             :         // If the target matcher returned a specific error code use
    4139             :         // that, else use the one from the generic matcher.
    4140        4459 :         if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
    4141             :           Diag = TargetDiag;
    4142             :       }
    4143             :       // If current formal operand wasn't matched and it is optional
    4144             :       // then try to match next formal operand
    4145        4459 :       if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
    4146             :         DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
    4147           0 :         continue;
    4148             :       }
    4149             :       // If this operand is broken for all of the instances of this
    4150             :       // mnemonic, keep track of it so we can report loc info.
    4151             :       // If we already had a match that only failed due to a
    4152             :       // target predicate, that diagnostic is preferred.
    4153        8918 :       if (!HadMatchOtherThanPredicate &&
    4154        3421 :           (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
    4155        3598 :         if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
    4156             :           RetCode = Diag;
    4157        3598 :         ErrorInfo = ActualIdx;
    4158             :       }
    4159             :       // Otherwise, just reject this instance of the mnemonic.
    4160             :       OperandsValid = false;
    4161             :       break;
    4162             :     }
    4163             : 
    4164        6220 :     if (!OperandsValid) {
    4165             :       DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
    4166             :                                                "operand mismatches, ignoring "
    4167             :                                                "this opcode\n");
    4168        4460 :       continue;
    4169             :     }
    4170        1760 :     if (!HasRequiredFeatures) {
    4171             :       HadMatchOtherThanFeatures = true;
    4172          60 :       uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
    4173             :       DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features: "
    4174             :                                             << format_hex(NewMissingFeatures, 18)
    4175             :                                             << "\n");
    4176          60 :       if (countPopulation(NewMissingFeatures) <=
    4177             :           countPopulation(MissingFeatures))
    4178             :         MissingFeatures = NewMissingFeatures;
    4179          60 :       continue;
    4180             :     }
    4181             : 
    4182             :     Inst.clear();
    4183             : 
    4184        1700 :     Inst.setOpcode(it->Opcode);
    4185             :     // We have a potential match but have not rendered the operands.
    4186             :     // Check the target predicate to handle any context sensitive
    4187             :     // constraints.
    4188             :     // For example, Ties that are referenced multiple times must be
    4189             :     // checked here to ensure the input is the same for each match
    4190             :     // constraints. If we leave it any later the ties will have been
    4191             :     // canonicalized
    4192             :     unsigned MatchResult;
    4193        1700 :     if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
    4194             :       Inst.clear();
    4195             :       DEBUG_WITH_TYPE(
    4196             :           "asm-matcher",
    4197             :           dbgs() << "Early target match predicate failed with diag code "
    4198             :                  << MatchResult << "\n");
    4199             :       RetCode = MatchResult;
    4200             :       HadMatchOtherThanPredicate = true;
    4201           0 :       continue;
    4202             :     }
    4203             : 
    4204        1700 :     if (matchingInlineAsm) {
    4205           0 :       convertToMapAndConstraints(it->ConvertFn, Operands);
    4206           0 :       if (!checkAsmTiedOperandConstraints(it->ConvertFn, Operands, ErrorInfo))
    4207             :         return Match_InvalidTiedOperand;
    4208             : 
    4209           0 :       return Match_Success;
    4210             :     }
    4211             : 
    4212             :     // We have selected a definite instruction, convert the parsed
    4213             :     // operands into the appropriate MCInst.
    4214        1700 :     convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
    4215             : 
    4216             :     // We have a potential match. Check the target predicate to
    4217             :     // handle any context sensitive constraints.
    4218        1700 :     if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
    4219             :       DEBUG_WITH_TYPE("asm-matcher",
    4220             :                       dbgs() << "Target match predicate failed with diag code "
    4221             :                              << MatchResult << "\n");
    4222             :       Inst.clear();
    4223             :       RetCode = MatchResult;
    4224             :       HadMatchOtherThanPredicate = true;
    4225           0 :       continue;
    4226             :     }
    4227             : 
    4228        1700 :     if (!checkAsmTiedOperandConstraints(it->ConvertFn, Operands, ErrorInfo))
    4229             :       return Match_InvalidTiedOperand;
    4230             : 
    4231             :     DEBUG_WITH_TYPE(
    4232             :         "asm-matcher",
    4233             :         dbgs() << "Opcode result: complete match, selecting this opcode\n");
    4234        1700 :     return Match_Success;
    4235             :   }
    4236             : 
    4237             :   // Okay, we had no match.  Try to return a useful error code.
    4238          60 :   if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
    4239             :     return RetCode;
    4240             : 
    4241             :   // Missing feature matches return which features were missing
    4242          60 :   ErrorInfo = MissingFeatures;
    4243          60 :   return Match_MissingFeature;
    4244             : }
    4245             : 
    4246             : namespace {
    4247             :   struct OperandMatchEntry {
    4248             :     uint8_t RequiredFeatures;
    4249             :     uint16_t Mnemonic;
    4250             :     uint8_t Class;
    4251             :     uint8_t OperandMask;
    4252             : 
    4253             :     StringRef getMnemonic() const {
    4254       37777 :       return StringRef(MnemonicTable + Mnemonic + 1,
    4255       37777 :                        MnemonicTable[Mnemonic]);
    4256             :     }
    4257             :   };
    4258             : 
    4259             :   // Predicate for searching for an opcode.
    4260             :   struct LessOpcodeOperand {
    4261             :     bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
    4262       47362 :       return LHS.getMnemonic()  < RHS;
    4263             :     }
    4264             :     bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
    4265       28192 :       return LHS < RHS.getMnemonic();
    4266             :     }
    4267             :     bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
    4268             :       return LHS.getMnemonic() < RHS.getMnemonic();
    4269             :     }
    4270             :   };
    4271             : } // end anonymous namespace.
    4272             : 
    4273             : static const OperandMatchEntry OperandMatchTable[100] = {
    4274             :   /* Operand List Mask, Mnemonic, Operand Class, Features */
    4275             :   { 0, 252 /* call */, MCK_MEMri, 1 /* 0 */ },
    4276             :   { 0, 252 /* call */, MCK_MEMrr, 1 /* 0 */ },
    4277             :   { 0, 352 /* clr */, MCK_MEMri, 2 /* 1 */ },
    4278             :   { 0, 352 /* clr */, MCK_MEMrr, 2 /* 1 */ },
    4279             :   { 0, 356 /* clrb */, MCK_MEMri, 2 /* 1 */ },
    4280             :   { 0, 356 /* clrb */, MCK_MEMrr, 2 /* 1 */ },
    4281             :   { 0, 361 /* clrh */, MCK_MEMri, 2 /* 1 */ },
    4282             :   { 0, 361 /* clrh */, MCK_MEMrr, 2 /* 1 */ },
    4283             :   { 0, 915 /* flush */, MCK_MEMri, 1 /* 0 */ },
    4284             :   { 0, 915 /* flush */, MCK_MEMrr, 1 /* 0 */ },
    4285             :   { 0, 2408 /* jmp */, MCK_MEMri, 1 /* 0 */ },
    4286             :   { 0, 2408 /* jmp */, MCK_MEMrr, 1 /* 0 */ },
    4287             :   { 0, 2412 /* jmpl */, MCK_MEMri, 1 /* 0 */ },
    4288             :   { 0, 2412 /* jmpl */, MCK_MEMrr, 1 /* 0 */ },
    4289             :   { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
    4290             :   { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
    4291             :   { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
    4292             :   { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
    4293             :   { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
    4294             :   { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
    4295             :   { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
    4296             :   { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
    4297             :   { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
    4298             :   { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
    4299             :   { Feature_HasV9, 2420 /* lda */, MCK_MEMrr, 2 /* 1 */ },
    4300             :   { 0, 2420 /* lda */, MCK_MEMrr, 2 /* 1 */ },
    4301             :   { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
    4302             :   { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
    4303             :   { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
    4304             :   { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
    4305             :   { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
    4306             :   { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
    4307             :   { 0, 2428 /* ldda */, MCK_MEMrr, 2 /* 1 */ },
    4308             :   { Feature_HasV9, 2428 /* ldda */, MCK_MEMrr, 2 /* 1 */ },
    4309             :   { Feature_HasV9, 2433 /* ldq */, MCK_MEMri, 2 /* 1 */ },
    4310             :   { Feature_HasV9, 2433 /* ldq */, MCK_MEMrr, 2 /* 1 */ },
    4311             :   { Feature_HasV9, 2437 /* ldqa */, MCK_MEMrr, 2 /* 1 */ },
    4312             :   { 0, 2442 /* ldsb */, MCK_MEMri, 2 /* 1 */ },
    4313             :   { 0, 2442 /* ldsb */, MCK_MEMrr, 2 /* 1 */ },
    4314             :   { 0, 2447 /* ldsba */, MCK_MEMrr, 2 /* 1 */ },
    4315             :   { 0, 2453 /* ldsh */, MCK_MEMri, 2 /* 1 */ },
    4316             :   { 0, 2453 /* ldsh */, MCK_MEMrr, 2 /* 1 */ },
    4317             :   { 0, 2458 /* ldsha */, MCK_MEMrr, 2 /* 1 */ },
    4318             :   { 0, 2464 /* ldstub */, MCK_MEMri, 2 /* 1 */ },
    4319             :   { 0, 2464 /* ldstub */, MCK_MEMrr, 2 /* 1 */ },
    4320             :   { 0, 2471 /* ldstuba */, MCK_MEMrr, 2 /* 1 */ },
    4321             :   { 0, 2479 /* ldsw */, MCK_MEMri, 2 /* 1 */ },
    4322             :   { 0, 2479 /* ldsw */, MCK_MEMrr, 2 /* 1 */ },
    4323             :   { 0, 2484 /* ldub */, MCK_MEMri, 2 /* 1 */ },
    4324             :   { 0, 2484 /* ldub */, MCK_MEMrr, 2 /* 1 */ },
    4325             :   { 0, 2489 /* lduba */, MCK_MEMrr, 2 /* 1 */ },
    4326             :   { 0, 2495 /* lduh */, MCK_MEMri, 2 /* 1 */ },
    4327             :   { 0, 2495 /* lduh */, MCK_MEMrr, 2 /* 1 */ },
    4328             :   { 0, 2500 /* lduha */, MCK_MEMrr, 2 /* 1 */ },
    4329             :   { Feature_HasV9, 2506 /* ldx */, MCK_MEMri, 2 /* 1 */ },
    4330             :   { 0, 2506 /* ldx */, MCK_MEMri, 2 /* 1 */ },
    4331             :   { Feature_HasV9, 2506 /* ldx */, MCK_MEMrr, 2 /* 1 */ },
    4332             :   { 0, 2506 /* ldx */, MCK_MEMrr, 2 /* 1 */ },
    4333             :   { 0, 2853 /* rett */, MCK_MEMri, 1 /* 0 */ },
    4334             :   { 0, 2853 /* rett */, MCK_MEMrr, 1 /* 0 */ },
    4335             :   { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
    4336             :   { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
    4337             :   { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
    4338             :   { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
    4339             :   { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
    4340             :   { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
    4341             :   { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
    4342             :   { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
    4343             :   { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
    4344             :   { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
    4345             :   { Feature_HasV9, 2958 /* sta */, MCK_MEMrr, 4 /* 2 */ },
    4346             :   { 0, 2958 /* sta */, MCK_MEMrr, 4 /* 2 */ },
    4347             :   { 0, 2962 /* stb */, MCK_MEMri, 4 /* 2 */ },
    4348             :   { 0, 2962 /* stb */, MCK_MEMrr, 4 /* 2 */ },
    4349             :   { 0, 2966 /* stba */, MCK_MEMrr, 4 /* 2 */ },
    4350             :   { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
    4351             :   { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
    4352             :   { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
    4353             :   { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
    4354             :   { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
    4355             :   { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
    4356             :   { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
    4357             :   { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
    4358             :   { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
    4359             :   { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
    4360             :   { 0, 2981 /* stda */, MCK_MEMrr, 4 /* 2 */ },
    4361             :   { Feature_HasV9, 2981 /* stda */, MCK_MEMrr, 4 /* 2 */ },
    4362             :   { 0, 2986 /* sth */, MCK_MEMri, 4 /* 2 */ },
    4363             :   { 0, 2986 /* sth */, MCK_MEMrr, 4 /* 2 */ },
    4364             :   { 0, 2990 /* stha */, MCK_MEMrr, 4 /* 2 */ },
    4365             :   { Feature_HasV9, 2995 /* stq */, MCK_MEMri, 4 /* 2 */ },
    4366             :   { Feature_HasV9, 2995 /* stq */, MCK_MEMrr, 4 /* 2 */ },
    4367             :   { Feature_HasV9, 2999 /* stqa */, MCK_MEMrr, 4 /* 2 */ },
    4368             :   { Feature_HasV9, 3004 /* stx */, MCK_MEMri, 4 /* 2 */ },
    4369             :   { Feature_HasV9, 3004 /* stx */, MCK_MEMrr, 4 /* 2 */ },
    4370             :   { 0, 3004 /* stx */, MCK_MEMri, 4 /* 2 */ },
    4371             :   { 0, 3004 /* stx */, MCK_MEMrr, 4 /* 2 */ },
    4372             :   { 0, 3030 /* swap */, MCK_MEMri, 2 /* 1 */ },
    4373             :   { 0, 3030 /* swap */, MCK_MEMrr, 2 /* 1 */ },
    4374             :   { 0, 3035 /* swapa */, MCK_MEMrr, 2 /* 1 */ },
    4375             : };
    4376             : 
    4377          57 : OperandMatchResultTy SparcAsmParser::
    4378             : tryCustomParseOperand(OperandVector &Operands,
    4379             :                       unsigned MCK) {
    4380             : 
    4381          57 :   switch(MCK) {
    4382          47 :   case MCK_MEMri:
    4383          47 :     return parseMEMOperand(Operands);
    4384          10 :   case MCK_MEMrr:
    4385          10 :     return parseMEMOperand(Operands);
    4386             :   default:
    4387             :     return MatchOperand_NoMatch;
    4388             :   }
    4389             :   return MatchOperand_NoMatch;
    4390             : }
    4391             : 
    4392        3582 : OperandMatchResultTy SparcAsmParser::
    4393             : MatchOperandParserImpl(OperandVector &Operands,
    4394             :                        StringRef Mnemonic,
    4395             :                        bool ParseForAllFeatures) {
    4396             :   // Get the current feature set.
    4397        3582 :   uint64_t AvailableFeatures = getAvailableFeatures();
    4398             : 
    4399             :   // Get the next operand index.
    4400        3582 :   unsigned NextOpNum = Operands.size() - 1;
    4401             :   // Search the table.
    4402             :   auto MnemonicRange =
    4403             :     std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
    4404             :                      Mnemonic, LessOpcodeOperand());
    4405             : 
    4406        3582 :   if (MnemonicRange.first == MnemonicRange.second)
    4407             :     return MatchOperand_NoMatch;
    4408             : 
    4409        2016 :   for (const OperandMatchEntry *it = MnemonicRange.first,
    4410        2481 :        *ie = MnemonicRange.second; it != ie; ++it) {
    4411             :     // equal_range guarantees that instruction mnemonic matches.
    4412             :     assert(Mnemonic == it->getMnemonic());
    4413             : 
    4414             :     // check if the available features match
    4415        2053 :     if (!ParseForAllFeatures && (AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures)
    4416          48 :         continue;
    4417             : 
    4418             :     // check if the operand in question has a custom parser.
    4419        2005 :     if (!(it->OperandMask & (1 << NextOpNum)))
    4420        1948 :       continue;
    4421             : 
    4422             :     // call custom parse method to handle the operand
    4423          57 :     OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class);
    4424          57 :     if (Result != MatchOperand_NoMatch)
    4425             :       return Result;
    4426             :   }
    4427             : 
    4428             :   // Okay, we had no match.
    4429             :   return MatchOperand_NoMatch;
    4430             : }
    4431             : 
    4432             : #endif // GET_MATCHER_IMPLEMENTATION
    4433             : 
    4434             : 
    4435             : #ifdef GET_MNEMONIC_SPELL_CHECKER
    4436             : #undef GET_MNEMONIC_SPELL_CHECKER
    4437             : 
    4438             : static std::string SparcMnemonicSpellCheck(StringRef S, uint64_t FBS, unsigned VariantID) {
    4439             :   const unsigned MaxEditDist = 2;
    4440             :   std::vector<StringRef> Candidates;
    4441             :   StringRef Prev = "";
    4442             : 
    4443             :   // Find the appropriate table for this asm variant.
    4444             :   const MatchEntry *Start, *End;
    4445             :   switch (VariantID) {
    4446             :   default: llvm_unreachable("invalid variant!");
    4447             :   case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
    4448             :   }
    4449             : 
    4450             :   for (auto I = Start; I < End; I++) {
    4451             :     // Ignore unsupported instructions.
    4452             :     if ((FBS & I->RequiredFeatures) != I->RequiredFeatures)
    4453             :       continue;
    4454             : 
    4455             :     StringRef T = I->getMnemonic();
    4456             :     // Avoid recomputing the edit distance for the same string.
    4457             :     if (T.equals(Prev))
    4458             :       continue;
    4459             : 
    4460             :     Prev = T;
    4461             :     unsigned Dist = S.edit_distance(T, false, MaxEditDist);
    4462             :     if (Dist <= MaxEditDist)
    4463             :       Candidates.push_back(T);
    4464             :   }
    4465             : 
    4466             :   if (Candidates.empty())
    4467             :     return "";
    4468             : 
    4469             :   std::string Res = ", did you mean: ";
    4470             :   unsigned i = 0;
    4471             :   for( ; i < Candidates.size() - 1; i++)
    4472             :     Res += Candidates[i].str() + ", ";
    4473             :   return Res + Candidates[i].str() + "?";
    4474             : }
    4475             : 
    4476             : #endif // GET_MNEMONIC_SPELL_CHECKER
    4477             : 

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