LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/Sparc - SparcGenInstrInfo.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 6 6 100.0 %
Date: 2017-09-14 15:23:50 Functions: 1 3 33.3 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Target Instruction Enum Values and Descriptors                             *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : #ifdef GET_INSTRINFO_ENUM
      10             : #undef GET_INSTRINFO_ENUM
      11             : namespace llvm {
      12             : 
      13             : namespace SP {
      14             :   enum {
      15             :     PHI = 0,
      16             :     INLINEASM   = 1,
      17             :     CFI_INSTRUCTION     = 2,
      18             :     EH_LABEL    = 3,
      19             :     GC_LABEL    = 4,
      20             :     ANNOTATION_LABEL    = 5,
      21             :     KILL        = 6,
      22             :     EXTRACT_SUBREG      = 7,
      23             :     INSERT_SUBREG       = 8,
      24             :     IMPLICIT_DEF        = 9,
      25             :     SUBREG_TO_REG       = 10,
      26             :     COPY_TO_REGCLASS    = 11,
      27             :     DBG_VALUE   = 12,
      28             :     REG_SEQUENCE        = 13,
      29             :     COPY        = 14,
      30             :     BUNDLE      = 15,
      31             :     LIFETIME_START      = 16,
      32             :     LIFETIME_END        = 17,
      33             :     STACKMAP    = 18,
      34             :     FENTRY_CALL = 19,
      35             :     PATCHPOINT  = 20,
      36             :     LOAD_STACK_GUARD    = 21,
      37             :     STATEPOINT  = 22,
      38             :     LOCAL_ESCAPE        = 23,
      39             :     FAULTING_OP = 24,
      40             :     PATCHABLE_OP        = 25,
      41             :     PATCHABLE_FUNCTION_ENTER    = 26,
      42             :     PATCHABLE_RET       = 27,
      43             :     PATCHABLE_FUNCTION_EXIT     = 28,
      44             :     PATCHABLE_TAIL_CALL = 29,
      45             :     PATCHABLE_EVENT_CALL        = 30,
      46             :     G_ADD       = 31,
      47             :     G_SUB       = 32,
      48             :     G_MUL       = 33,
      49             :     G_SDIV      = 34,
      50             :     G_UDIV      = 35,
      51             :     G_SREM      = 36,
      52             :     G_UREM      = 37,
      53             :     G_AND       = 38,
      54             :     G_OR        = 39,
      55             :     G_XOR       = 40,
      56             :     G_IMPLICIT_DEF      = 41,
      57             :     G_PHI       = 42,
      58             :     G_FRAME_INDEX       = 43,
      59             :     G_GLOBAL_VALUE      = 44,
      60             :     G_EXTRACT   = 45,
      61             :     G_UNMERGE_VALUES    = 46,
      62             :     G_INSERT    = 47,
      63             :     G_MERGE_VALUES      = 48,
      64             :     G_PTRTOINT  = 49,
      65             :     G_INTTOPTR  = 50,
      66             :     G_BITCAST   = 51,
      67             :     G_LOAD      = 52,
      68             :     G_STORE     = 53,
      69             :     G_BRCOND    = 54,
      70             :     G_BRINDIRECT        = 55,
      71             :     G_INTRINSIC = 56,
      72             :     G_INTRINSIC_W_SIDE_EFFECTS  = 57,
      73             :     G_ANYEXT    = 58,
      74             :     G_TRUNC     = 59,
      75             :     G_CONSTANT  = 60,
      76             :     G_FCONSTANT = 61,
      77             :     G_VASTART   = 62,
      78             :     G_VAARG     = 63,
      79             :     G_SEXT      = 64,
      80             :     G_ZEXT      = 65,
      81             :     G_SHL       = 66,
      82             :     G_LSHR      = 67,
      83             :     G_ASHR      = 68,
      84             :     G_ICMP      = 69,
      85             :     G_FCMP      = 70,
      86             :     G_SELECT    = 71,
      87             :     G_UADDE     = 72,
      88             :     G_USUBE     = 73,
      89             :     G_SADDO     = 74,
      90             :     G_SSUBO     = 75,
      91             :     G_UMULO     = 76,
      92             :     G_SMULO     = 77,
      93             :     G_UMULH     = 78,
      94             :     G_SMULH     = 79,
      95             :     G_FADD      = 80,
      96             :     G_FSUB      = 81,
      97             :     G_FMUL      = 82,
      98             :     G_FMA       = 83,
      99             :     G_FDIV      = 84,
     100             :     G_FREM      = 85,
     101             :     G_FPOW      = 86,
     102             :     G_FEXP      = 87,
     103             :     G_FEXP2     = 88,
     104             :     G_FLOG      = 89,
     105             :     G_FLOG2     = 90,
     106             :     G_FNEG      = 91,
     107             :     G_FPEXT     = 92,
     108             :     G_FPTRUNC   = 93,
     109             :     G_FPTOSI    = 94,
     110             :     G_FPTOUI    = 95,
     111             :     G_SITOFP    = 96,
     112             :     G_UITOFP    = 97,
     113             :     G_GEP       = 98,
     114             :     G_PTR_MASK  = 99,
     115             :     G_BR        = 100,
     116             :     G_INSERT_VECTOR_ELT = 101,
     117             :     G_EXTRACT_VECTOR_ELT        = 102,
     118             :     G_SHUFFLE_VECTOR    = 103,
     119             :     ADDCCri     = 104,
     120             :     ADDCCrr     = 105,
     121             :     ADDCri      = 106,
     122             :     ADDCrr      = 107,
     123             :     ADDEri      = 108,
     124             :     ADDErr      = 109,
     125             :     ADDXC       = 110,
     126             :     ADDXCCC     = 111,
     127             :     ADDXri      = 112,
     128             :     ADDXrr      = 113,
     129             :     ADDri       = 114,
     130             :     ADDrr       = 115,
     131             :     ADJCALLSTACKDOWN    = 116,
     132             :     ADJCALLSTACKUP      = 117,
     133             :     ALIGNADDR   = 118,
     134             :     ALIGNADDRL  = 119,
     135             :     ANDCCri     = 120,
     136             :     ANDCCrr     = 121,
     137             :     ANDNCCri    = 122,
     138             :     ANDNCCrr    = 123,
     139             :     ANDNri      = 124,
     140             :     ANDNrr      = 125,
     141             :     ANDXNrr     = 126,
     142             :     ANDXri      = 127,
     143             :     ANDXrr      = 128,
     144             :     ANDri       = 129,
     145             :     ANDrr       = 130,
     146             :     ARRAY16     = 131,
     147             :     ARRAY32     = 132,
     148             :     ARRAY8      = 133,
     149             :     BA  = 134,
     150             :     BCOND       = 135,
     151             :     BCONDA      = 136,
     152             :     BINDri      = 137,
     153             :     BINDrr      = 138,
     154             :     BMASK       = 139,
     155             :     BPFCC       = 140,
     156             :     BPFCCA      = 141,
     157             :     BPFCCANT    = 142,
     158             :     BPFCCNT     = 143,
     159             :     BPGEZapn    = 144,
     160             :     BPGEZapt    = 145,
     161             :     BPGEZnapn   = 146,
     162             :     BPGEZnapt   = 147,
     163             :     BPGZapn     = 148,
     164             :     BPGZapt     = 149,
     165             :     BPGZnapn    = 150,
     166             :     BPGZnapt    = 151,
     167             :     BPICC       = 152,
     168             :     BPICCA      = 153,
     169             :     BPICCANT    = 154,
     170             :     BPICCNT     = 155,
     171             :     BPLEZapn    = 156,
     172             :     BPLEZapt    = 157,
     173             :     BPLEZnapn   = 158,
     174             :     BPLEZnapt   = 159,
     175             :     BPLZapn     = 160,
     176             :     BPLZapt     = 161,
     177             :     BPLZnapn    = 162,
     178             :     BPLZnapt    = 163,
     179             :     BPNZapn     = 164,
     180             :     BPNZapt     = 165,
     181             :     BPNZnapn    = 166,
     182             :     BPNZnapt    = 167,
     183             :     BPXCC       = 168,
     184             :     BPXCCA      = 169,
     185             :     BPXCCANT    = 170,
     186             :     BPXCCNT     = 171,
     187             :     BPZapn      = 172,
     188             :     BPZapt      = 173,
     189             :     BPZnapn     = 174,
     190             :     BPZnapt     = 175,
     191             :     BSHUFFLE    = 176,
     192             :     CALL        = 177,
     193             :     CALLri      = 178,
     194             :     CALLrr      = 179,
     195             :     CASAasi10   = 180,
     196             :     CASArr      = 181,
     197             :     CASXrr      = 182,
     198             :     CASrr       = 183,
     199             :     CBCOND      = 184,
     200             :     CBCONDA     = 185,
     201             :     CMASK16     = 186,
     202             :     CMASK32     = 187,
     203             :     CMASK8      = 188,
     204             :     CMPri       = 189,
     205             :     CMPrr       = 190,
     206             :     EDGE16      = 191,
     207             :     EDGE16L     = 192,
     208             :     EDGE16LN    = 193,
     209             :     EDGE16N     = 194,
     210             :     EDGE32      = 195,
     211             :     EDGE32L     = 196,
     212             :     EDGE32LN    = 197,
     213             :     EDGE32N     = 198,
     214             :     EDGE8       = 199,
     215             :     EDGE8L      = 200,
     216             :     EDGE8LN     = 201,
     217             :     EDGE8N      = 202,
     218             :     EH_SJLJ_LONGJMP32ri = 203,
     219             :     EH_SJLJ_LONGJMP32rr = 204,
     220             :     EH_SJLJ_SETJMP32ri  = 205,
     221             :     EH_SJLJ_SETJMP32rr  = 206,
     222             :     FABSD       = 207,
     223             :     FABSQ       = 208,
     224             :     FABSS       = 209,
     225             :     FADDD       = 210,
     226             :     FADDQ       = 211,
     227             :     FADDS       = 212,
     228             :     FALIGNADATA = 213,
     229             :     FAND        = 214,
     230             :     FANDNOT1    = 215,
     231             :     FANDNOT1S   = 216,
     232             :     FANDNOT2    = 217,
     233             :     FANDNOT2S   = 218,
     234             :     FANDS       = 219,
     235             :     FBCOND      = 220,
     236             :     FBCONDA     = 221,
     237             :     FCHKSM16    = 222,
     238             :     FCMPD       = 223,
     239             :     FCMPEQ16    = 224,
     240             :     FCMPEQ32    = 225,
     241             :     FCMPGT16    = 226,
     242             :     FCMPGT32    = 227,
     243             :     FCMPLE16    = 228,
     244             :     FCMPLE32    = 229,
     245             :     FCMPNE16    = 230,
     246             :     FCMPNE32    = 231,
     247             :     FCMPQ       = 232,
     248             :     FCMPS       = 233,
     249             :     FDIVD       = 234,
     250             :     FDIVQ       = 235,
     251             :     FDIVS       = 236,
     252             :     FDMULQ      = 237,
     253             :     FDTOI       = 238,
     254             :     FDTOQ       = 239,
     255             :     FDTOS       = 240,
     256             :     FDTOX       = 241,
     257             :     FEXPAND     = 242,
     258             :     FHADDD      = 243,
     259             :     FHADDS      = 244,
     260             :     FHSUBD      = 245,
     261             :     FHSUBS      = 246,
     262             :     FITOD       = 247,
     263             :     FITOQ       = 248,
     264             :     FITOS       = 249,
     265             :     FLCMPD      = 250,
     266             :     FLCMPS      = 251,
     267             :     FLUSH       = 252,
     268             :     FLUSHW      = 253,
     269             :     FLUSHri     = 254,
     270             :     FLUSHrr     = 255,
     271             :     FMEAN16     = 256,
     272             :     FMOVD       = 257,
     273             :     FMOVD_FCC   = 258,
     274             :     FMOVD_ICC   = 259,
     275             :     FMOVD_XCC   = 260,
     276             :     FMOVQ       = 261,
     277             :     FMOVQ_FCC   = 262,
     278             :     FMOVQ_ICC   = 263,
     279             :     FMOVQ_XCC   = 264,
     280             :     FMOVRGEZD   = 265,
     281             :     FMOVRGEZQ   = 266,
     282             :     FMOVRGEZS   = 267,
     283             :     FMOVRGZD    = 268,
     284             :     FMOVRGZQ    = 269,
     285             :     FMOVRGZS    = 270,
     286             :     FMOVRLEZD   = 271,
     287             :     FMOVRLEZQ   = 272,
     288             :     FMOVRLEZS   = 273,
     289             :     FMOVRLZD    = 274,
     290             :     FMOVRLZQ    = 275,
     291             :     FMOVRLZS    = 276,
     292             :     FMOVRNZD    = 277,
     293             :     FMOVRNZQ    = 278,
     294             :     FMOVRNZS    = 279,
     295             :     FMOVRZD     = 280,
     296             :     FMOVRZQ     = 281,
     297             :     FMOVRZS     = 282,
     298             :     FMOVS       = 283,
     299             :     FMOVS_FCC   = 284,
     300             :     FMOVS_ICC   = 285,
     301             :     FMOVS_XCC   = 286,
     302             :     FMUL8SUX16  = 287,
     303             :     FMUL8ULX16  = 288,
     304             :     FMUL8X16    = 289,
     305             :     FMUL8X16AL  = 290,
     306             :     FMUL8X16AU  = 291,
     307             :     FMULD       = 292,
     308             :     FMULD8SUX16 = 293,
     309             :     FMULD8ULX16 = 294,
     310             :     FMULQ       = 295,
     311             :     FMULS       = 296,
     312             :     FNADDD      = 297,
     313             :     FNADDS      = 298,
     314             :     FNAND       = 299,
     315             :     FNANDS      = 300,
     316             :     FNEGD       = 301,
     317             :     FNEGQ       = 302,
     318             :     FNEGS       = 303,
     319             :     FNHADDD     = 304,
     320             :     FNHADDS     = 305,
     321             :     FNMULD      = 306,
     322             :     FNMULS      = 307,
     323             :     FNOR        = 308,
     324             :     FNORS       = 309,
     325             :     FNOT1       = 310,
     326             :     FNOT1S      = 311,
     327             :     FNOT2       = 312,
     328             :     FNOT2S      = 313,
     329             :     FNSMULD     = 314,
     330             :     FONE        = 315,
     331             :     FONES       = 316,
     332             :     FOR = 317,
     333             :     FORNOT1     = 318,
     334             :     FORNOT1S    = 319,
     335             :     FORNOT2     = 320,
     336             :     FORNOT2S    = 321,
     337             :     FORS        = 322,
     338             :     FPACK16     = 323,
     339             :     FPACK32     = 324,
     340             :     FPACKFIX    = 325,
     341             :     FPADD16     = 326,
     342             :     FPADD16S    = 327,
     343             :     FPADD32     = 328,
     344             :     FPADD32S    = 329,
     345             :     FPADD64     = 330,
     346             :     FPMERGE     = 331,
     347             :     FPSUB16     = 332,
     348             :     FPSUB16S    = 333,
     349             :     FPSUB32     = 334,
     350             :     FPSUB32S    = 335,
     351             :     FQTOD       = 336,
     352             :     FQTOI       = 337,
     353             :     FQTOS       = 338,
     354             :     FQTOX       = 339,
     355             :     FSLAS16     = 340,
     356             :     FSLAS32     = 341,
     357             :     FSLL16      = 342,
     358             :     FSLL32      = 343,
     359             :     FSMULD      = 344,
     360             :     FSQRTD      = 345,
     361             :     FSQRTQ      = 346,
     362             :     FSQRTS      = 347,
     363             :     FSRA16      = 348,
     364             :     FSRA32      = 349,
     365             :     FSRC1       = 350,
     366             :     FSRC1S      = 351,
     367             :     FSRC2       = 352,
     368             :     FSRC2S      = 353,
     369             :     FSRL16      = 354,
     370             :     FSRL32      = 355,
     371             :     FSTOD       = 356,
     372             :     FSTOI       = 357,
     373             :     FSTOQ       = 358,
     374             :     FSTOX       = 359,
     375             :     FSUBD       = 360,
     376             :     FSUBQ       = 361,
     377             :     FSUBS       = 362,
     378             :     FXNOR       = 363,
     379             :     FXNORS      = 364,
     380             :     FXOR        = 365,
     381             :     FXORS       = 366,
     382             :     FXTOD       = 367,
     383             :     FXTOQ       = 368,
     384             :     FXTOS       = 369,
     385             :     FZERO       = 370,
     386             :     FZEROS      = 371,
     387             :     GETPCX      = 372,
     388             :     JMPLri      = 373,
     389             :     JMPLrr      = 374,
     390             :     LDArr       = 375,
     391             :     LDCSRri     = 376,
     392             :     LDCSRrr     = 377,
     393             :     LDCri       = 378,
     394             :     LDCrr       = 379,
     395             :     LDDArr      = 380,
     396             :     LDDCri      = 381,
     397             :     LDDCrr      = 382,
     398             :     LDDFArr     = 383,
     399             :     LDDFri      = 384,
     400             :     LDDFrr      = 385,
     401             :     LDDri       = 386,
     402             :     LDDrr       = 387,
     403             :     LDFArr      = 388,
     404             :     LDFSRri     = 389,
     405             :     LDFSRrr     = 390,
     406             :     LDFri       = 391,
     407             :     LDFrr       = 392,
     408             :     LDQFArr     = 393,
     409             :     LDQFri      = 394,
     410             :     LDQFrr      = 395,
     411             :     LDSBArr     = 396,
     412             :     LDSBri      = 397,
     413             :     LDSBrr      = 398,
     414             :     LDSHArr     = 399,
     415             :     LDSHri      = 400,
     416             :     LDSHrr      = 401,
     417             :     LDSTUBArr   = 402,
     418             :     LDSTUBri    = 403,
     419             :     LDSTUBrr    = 404,
     420             :     LDSWri      = 405,
     421             :     LDSWrr      = 406,
     422             :     LDUBArr     = 407,
     423             :     LDUBri      = 408,
     424             :     LDUBrr      = 409,
     425             :     LDUHArr     = 410,
     426             :     LDUHri      = 411,
     427             :     LDUHrr      = 412,
     428             :     LDXFSRri    = 413,
     429             :     LDXFSRrr    = 414,
     430             :     LDXri       = 415,
     431             :     LDXrr       = 416,
     432             :     LDri        = 417,
     433             :     LDrr        = 418,
     434             :     LEAX_ADDri  = 419,
     435             :     LEA_ADDri   = 420,
     436             :     LZCNT       = 421,
     437             :     MEMBARi     = 422,
     438             :     MOVDTOX     = 423,
     439             :     MOVFCCri    = 424,
     440             :     MOVFCCrr    = 425,
     441             :     MOVICCri    = 426,
     442             :     MOVICCrr    = 427,
     443             :     MOVRGEZri   = 428,
     444             :     MOVRGEZrr   = 429,
     445             :     MOVRGZri    = 430,
     446             :     MOVRGZrr    = 431,
     447             :     MOVRLEZri   = 432,
     448             :     MOVRLEZrr   = 433,
     449             :     MOVRLZri    = 434,
     450             :     MOVRLZrr    = 435,
     451             :     MOVRNZri    = 436,
     452             :     MOVRNZrr    = 437,
     453             :     MOVRRZri    = 438,
     454             :     MOVRRZrr    = 439,
     455             :     MOVSTOSW    = 440,
     456             :     MOVSTOUW    = 441,
     457             :     MOVWTOS     = 442,
     458             :     MOVXCCri    = 443,
     459             :     MOVXCCrr    = 444,
     460             :     MOVXTOD     = 445,
     461             :     MULSCCri    = 446,
     462             :     MULSCCrr    = 447,
     463             :     MULXri      = 448,
     464             :     MULXrr      = 449,
     465             :     NOP = 450,
     466             :     ORCCri      = 451,
     467             :     ORCCrr      = 452,
     468             :     ORNCCri     = 453,
     469             :     ORNCCrr     = 454,
     470             :     ORNri       = 455,
     471             :     ORNrr       = 456,
     472             :     ORXNrr      = 457,
     473             :     ORXri       = 458,
     474             :     ORXrr       = 459,
     475             :     ORri        = 460,
     476             :     ORrr        = 461,
     477             :     PDIST       = 462,
     478             :     PDISTN      = 463,
     479             :     POPCrr      = 464,
     480             :     RDASR       = 465,
     481             :     RDPR        = 466,
     482             :     RDPSR       = 467,
     483             :     RDTBR       = 468,
     484             :     RDWIM       = 469,
     485             :     RESTOREri   = 470,
     486             :     RESTORErr   = 471,
     487             :     RET = 472,
     488             :     RETL        = 473,
     489             :     RETTri      = 474,
     490             :     RETTrr      = 475,
     491             :     SAVEri      = 476,
     492             :     SAVErr      = 477,
     493             :     SDIVCCri    = 478,
     494             :     SDIVCCrr    = 479,
     495             :     SDIVXri     = 480,
     496             :     SDIVXrr     = 481,
     497             :     SDIVri      = 482,
     498             :     SDIVrr      = 483,
     499             :     SELECT_CC_DFP_FCC   = 484,
     500             :     SELECT_CC_DFP_ICC   = 485,
     501             :     SELECT_CC_FP_FCC    = 486,
     502             :     SELECT_CC_FP_ICC    = 487,
     503             :     SELECT_CC_Int_FCC   = 488,
     504             :     SELECT_CC_Int_ICC   = 489,
     505             :     SELECT_CC_QFP_FCC   = 490,
     506             :     SELECT_CC_QFP_ICC   = 491,
     507             :     SET = 492,
     508             :     SETHIXi     = 493,
     509             :     SETHIi      = 494,
     510             :     SHUTDOWN    = 495,
     511             :     SIAM        = 496,
     512             :     SLLXri      = 497,
     513             :     SLLXrr      = 498,
     514             :     SLLri       = 499,
     515             :     SLLrr       = 500,
     516             :     SMACri      = 501,
     517             :     SMACrr      = 502,
     518             :     SMULCCri    = 503,
     519             :     SMULCCrr    = 504,
     520             :     SMULri      = 505,
     521             :     SMULrr      = 506,
     522             :     SRAXri      = 507,
     523             :     SRAXrr      = 508,
     524             :     SRAri       = 509,
     525             :     SRArr       = 510,
     526             :     SRLXri      = 511,
     527             :     SRLXrr      = 512,
     528             :     SRLri       = 513,
     529             :     SRLrr       = 514,
     530             :     STArr       = 515,
     531             :     STBAR       = 516,
     532             :     STBArr      = 517,
     533             :     STBri       = 518,
     534             :     STBrr       = 519,
     535             :     STCSRri     = 520,
     536             :     STCSRrr     = 521,
     537             :     STCri       = 522,
     538             :     STCrr       = 523,
     539             :     STDArr      = 524,
     540             :     STDCQri     = 525,
     541             :     STDCQrr     = 526,
     542             :     STDCri      = 527,
     543             :     STDCrr      = 528,
     544             :     STDFArr     = 529,
     545             :     STDFQri     = 530,
     546             :     STDFQrr     = 531,
     547             :     STDFri      = 532,
     548             :     STDFrr      = 533,
     549             :     STDri       = 534,
     550             :     STDrr       = 535,
     551             :     STFArr      = 536,
     552             :     STFSRri     = 537,
     553             :     STFSRrr     = 538,
     554             :     STFri       = 539,
     555             :     STFrr       = 540,
     556             :     STHArr      = 541,
     557             :     STHri       = 542,
     558             :     STHrr       = 543,
     559             :     STQFArr     = 544,
     560             :     STQFri      = 545,
     561             :     STQFrr      = 546,
     562             :     STXFSRri    = 547,
     563             :     STXFSRrr    = 548,
     564             :     STXri       = 549,
     565             :     STXrr       = 550,
     566             :     STri        = 551,
     567             :     STrr        = 552,
     568             :     SUBCCri     = 553,
     569             :     SUBCCrr     = 554,
     570             :     SUBCri      = 555,
     571             :     SUBCrr      = 556,
     572             :     SUBEri      = 557,
     573             :     SUBErr      = 558,
     574             :     SUBXri      = 559,
     575             :     SUBXrr      = 560,
     576             :     SUBri       = 561,
     577             :     SUBrr       = 562,
     578             :     SWAPArr     = 563,
     579             :     SWAPri      = 564,
     580             :     SWAPrr      = 565,
     581             :     TA3 = 566,
     582             :     TA5 = 567,
     583             :     TADDCCTVri  = 568,
     584             :     TADDCCTVrr  = 569,
     585             :     TADDCCri    = 570,
     586             :     TADDCCrr    = 571,
     587             :     TICCri      = 572,
     588             :     TICCrr      = 573,
     589             :     TLS_ADDXrr  = 574,
     590             :     TLS_ADDrr   = 575,
     591             :     TLS_CALL    = 576,
     592             :     TLS_LDXrr   = 577,
     593             :     TLS_LDrr    = 578,
     594             :     TRAPri      = 579,
     595             :     TRAPrr      = 580,
     596             :     TSUBCCTVri  = 581,
     597             :     TSUBCCTVrr  = 582,
     598             :     TSUBCCri    = 583,
     599             :     TSUBCCrr    = 584,
     600             :     TXCCri      = 585,
     601             :     TXCCrr      = 586,
     602             :     UDIVCCri    = 587,
     603             :     UDIVCCrr    = 588,
     604             :     UDIVXri     = 589,
     605             :     UDIVXrr     = 590,
     606             :     UDIVri      = 591,
     607             :     UDIVrr      = 592,
     608             :     UMACri      = 593,
     609             :     UMACrr      = 594,
     610             :     UMULCCri    = 595,
     611             :     UMULCCrr    = 596,
     612             :     UMULXHI     = 597,
     613             :     UMULri      = 598,
     614             :     UMULrr      = 599,
     615             :     UNIMP       = 600,
     616             :     V9FCMPD     = 601,
     617             :     V9FCMPED    = 602,
     618             :     V9FCMPEQ    = 603,
     619             :     V9FCMPES    = 604,
     620             :     V9FCMPQ     = 605,
     621             :     V9FCMPS     = 606,
     622             :     V9FMOVD_FCC = 607,
     623             :     V9FMOVQ_FCC = 608,
     624             :     V9FMOVS_FCC = 609,
     625             :     V9MOVFCCri  = 610,
     626             :     V9MOVFCCrr  = 611,
     627             :     WRASRri     = 612,
     628             :     WRASRrr     = 613,
     629             :     WRPRri      = 614,
     630             :     WRPRrr      = 615,
     631             :     WRPSRri     = 616,
     632             :     WRPSRrr     = 617,
     633             :     WRTBRri     = 618,
     634             :     WRTBRrr     = 619,
     635             :     WRWIMri     = 620,
     636             :     WRWIMrr     = 621,
     637             :     XMULX       = 622,
     638             :     XMULXHI     = 623,
     639             :     XNORCCri    = 624,
     640             :     XNORCCrr    = 625,
     641             :     XNORXrr     = 626,
     642             :     XNORri      = 627,
     643             :     XNORrr      = 628,
     644             :     XORCCri     = 629,
     645             :     XORCCrr     = 630,
     646             :     XORXri      = 631,
     647             :     XORXrr      = 632,
     648             :     XORri       = 633,
     649             :     XORrr       = 634,
     650             :     INSTRUCTION_LIST_END = 635
     651             :   };
     652             : 
     653             : namespace Sched {
     654             :   enum {
     655             :     NoInstrModel        = 0,
     656             :     IIC_iu_instr        = 1,
     657             :     IIC_fpu_normal_instr        = 2,
     658             :     IIC_jmp_or_call     = 3,
     659             :     IIC_fpu_abs = 4,
     660             :     IIC_fpu_fast_instr  = 5,
     661             :     IIC_fpu_divd        = 6,
     662             :     IIC_fpu_divs        = 7,
     663             :     IIC_fpu_muld        = 8,
     664             :     IIC_fpu_muls        = 9,
     665             :     IIC_fpu_negs        = 10,
     666             :     IIC_fpu_sqrtd       = 11,
     667             :     IIC_fpu_sqrts       = 12,
     668             :     IIC_fpu_stod        = 13,
     669             :     IIC_ldd     = 14,
     670             :     IIC_iu_or_fpu_instr = 15,
     671             :     IIC_iu_div  = 16,
     672             :     IIC_smac_umac       = 17,
     673             :     IIC_iu_smul = 18,
     674             :     IIC_st      = 19,
     675             :     IIC_std     = 20,
     676             :     IIC_iu_umul = 21,
     677             :     SCHED_LIST_END = 22
     678             :   };
     679             : } // end Sched namespace
     680             : } // end SP namespace
     681             : } // end llvm namespace
     682             : #endif // GET_INSTRINFO_ENUM
     683             : 
     684             : #ifdef GET_INSTRINFO_MC_DESC
     685             : #undef GET_INSTRINFO_MC_DESC
     686             : namespace llvm {
     687             : 
     688             : static const MCPhysReg ImplicitList1[] = { SP::ICC, 0 };
     689             : static const MCPhysReg ImplicitList2[] = { SP::O6, 0 };
     690             : static const MCPhysReg ImplicitList3[] = { SP::WIM, 0 };
     691             : static const MCPhysReg ImplicitList4[] = { SP::FCC0, 0 };
     692             : static const MCPhysReg ImplicitList5[] = { SP::O7, 0 };
     693             : static const MCPhysReg ImplicitList6[] = { SP::CPSR, 0 };
     694             : static const MCPhysReg ImplicitList7[] = { SP::FSR, 0 };
     695             : static const MCPhysReg ImplicitList8[] = { SP::Y, SP::ICC, 0 };
     696             : static const MCPhysReg ImplicitList9[] = { SP::PSR, 0 };
     697             : static const MCPhysReg ImplicitList10[] = { SP::TBR, 0 };
     698             : static const MCPhysReg ImplicitList11[] = { SP::Y, 0 };
     699             : static const MCPhysReg ImplicitList12[] = { SP::Y, SP::ASR18, 0 };
     700             : static const MCPhysReg ImplicitList13[] = { SP::CPQ, 0 };
     701             : static const MCPhysReg ImplicitList14[] = { SP::FQ, 0 };
     702             : 
     703             : static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     704             : static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     705             : static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     706             : static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     707             : static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     708             : static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     709             : static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     710             : static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     711             : static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     712             : static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     713             : static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     714             : static const MCOperandInfo OperandInfo13[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     715             : static const MCOperandInfo OperandInfo14[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     716             : static const MCOperandInfo OperandInfo15[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     717             : static const MCOperandInfo OperandInfo16[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     718             : static const MCOperandInfo OperandInfo17[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     719             : static const MCOperandInfo OperandInfo18[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     720             : static const MCOperandInfo OperandInfo19[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     721             : static const MCOperandInfo OperandInfo20[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     722             : static const MCOperandInfo OperandInfo21[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     723             : static const MCOperandInfo OperandInfo22[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     724             : static const MCOperandInfo OperandInfo23[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     725             : static const MCOperandInfo OperandInfo24[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     726             : static const MCOperandInfo OperandInfo25[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     727             : static const MCOperandInfo OperandInfo26[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     728             : static const MCOperandInfo OperandInfo27[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     729             : static const MCOperandInfo OperandInfo28[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     730             : static const MCOperandInfo OperandInfo29[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     731             : static const MCOperandInfo OperandInfo30[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     732             : static const MCOperandInfo OperandInfo31[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     733             : static const MCOperandInfo OperandInfo32[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     734             : static const MCOperandInfo OperandInfo33[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     735             : static const MCOperandInfo OperandInfo34[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     736             : static const MCOperandInfo OperandInfo35[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     737             : static const MCOperandInfo OperandInfo36[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     738             : static const MCOperandInfo OperandInfo37[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     739             : static const MCOperandInfo OperandInfo38[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     740             : static const MCOperandInfo OperandInfo39[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     741             : static const MCOperandInfo OperandInfo40[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     742             : static const MCOperandInfo OperandInfo41[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     743             : static const MCOperandInfo OperandInfo42[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     744             : static const MCOperandInfo OperandInfo43[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     745             : static const MCOperandInfo OperandInfo44[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     746             : static const MCOperandInfo OperandInfo45[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     747             : static const MCOperandInfo OperandInfo46[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     748             : static const MCOperandInfo OperandInfo47[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     749             : static const MCOperandInfo OperandInfo48[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     750             : static const MCOperandInfo OperandInfo49[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     751             : static const MCOperandInfo OperandInfo50[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     752             : static const MCOperandInfo OperandInfo51[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     753             : static const MCOperandInfo OperandInfo52[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     754             : static const MCOperandInfo OperandInfo53[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     755             : static const MCOperandInfo OperandInfo54[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     756             : static const MCOperandInfo OperandInfo55[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     757             : static const MCOperandInfo OperandInfo56[] = { { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     758             : static const MCOperandInfo OperandInfo57[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     759             : static const MCOperandInfo OperandInfo58[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     760             : static const MCOperandInfo OperandInfo59[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     761             : static const MCOperandInfo OperandInfo60[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     762             : static const MCOperandInfo OperandInfo61[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     763             : static const MCOperandInfo OperandInfo62[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     764             : static const MCOperandInfo OperandInfo63[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     765             : static const MCOperandInfo OperandInfo64[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     766             : static const MCOperandInfo OperandInfo65[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     767             : static const MCOperandInfo OperandInfo66[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     768             : static const MCOperandInfo OperandInfo67[] = { { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     769             : static const MCOperandInfo OperandInfo68[] = { { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     770             : static const MCOperandInfo OperandInfo69[] = { { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     771             : static const MCOperandInfo OperandInfo70[] = { { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     772             : static const MCOperandInfo OperandInfo71[] = { { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     773             : static const MCOperandInfo OperandInfo72[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     774             : static const MCOperandInfo OperandInfo73[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     775             : static const MCOperandInfo OperandInfo74[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     776             : static const MCOperandInfo OperandInfo75[] = { { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     777             : static const MCOperandInfo OperandInfo76[] = { { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     778             : static const MCOperandInfo OperandInfo77[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     779             : static const MCOperandInfo OperandInfo78[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     780             : static const MCOperandInfo OperandInfo79[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     781             : static const MCOperandInfo OperandInfo80[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     782             : static const MCOperandInfo OperandInfo81[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     783             : static const MCOperandInfo OperandInfo82[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     784             : static const MCOperandInfo OperandInfo83[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     785             : static const MCOperandInfo OperandInfo84[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     786             : static const MCOperandInfo OperandInfo85[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     787             : static const MCOperandInfo OperandInfo86[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     788             : static const MCOperandInfo OperandInfo87[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     789             : static const MCOperandInfo OperandInfo88[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     790             : static const MCOperandInfo OperandInfo89[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     791             : static const MCOperandInfo OperandInfo90[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     792             : static const MCOperandInfo OperandInfo91[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     793             : static const MCOperandInfo OperandInfo92[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     794             : static const MCOperandInfo OperandInfo93[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     795             : static const MCOperandInfo OperandInfo94[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     796             : static const MCOperandInfo OperandInfo95[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     797             : static const MCOperandInfo OperandInfo96[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     798             : static const MCOperandInfo OperandInfo97[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     799             : static const MCOperandInfo OperandInfo98[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     800             : static const MCOperandInfo OperandInfo99[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     801             : static const MCOperandInfo OperandInfo100[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     802             : static const MCOperandInfo OperandInfo101[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     803             : static const MCOperandInfo OperandInfo102[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     804             : static const MCOperandInfo OperandInfo103[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     805             : static const MCOperandInfo OperandInfo104[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     806             : static const MCOperandInfo OperandInfo105[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     807             : static const MCOperandInfo OperandInfo106[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     808             : static const MCOperandInfo OperandInfo107[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     809             : static const MCOperandInfo OperandInfo108[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     810             : static const MCOperandInfo OperandInfo109[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     811             : static const MCOperandInfo OperandInfo110[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     812             : static const MCOperandInfo OperandInfo111[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     813             : static const MCOperandInfo OperandInfo112[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     814             : static const MCOperandInfo OperandInfo113[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     815             : static const MCOperandInfo OperandInfo114[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     816             : static const MCOperandInfo OperandInfo115[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     817             : static const MCOperandInfo OperandInfo116[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     818             : static const MCOperandInfo OperandInfo117[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     819             : static const MCOperandInfo OperandInfo118[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     820             : static const MCOperandInfo OperandInfo119[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     821             : static const MCOperandInfo OperandInfo120[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     822             : static const MCOperandInfo OperandInfo121[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     823             : static const MCOperandInfo OperandInfo122[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     824             : static const MCOperandInfo OperandInfo123[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     825             : static const MCOperandInfo OperandInfo124[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     826             : static const MCOperandInfo OperandInfo125[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     827             : static const MCOperandInfo OperandInfo126[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     828             : static const MCOperandInfo OperandInfo127[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     829             : static const MCOperandInfo OperandInfo128[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     830             : static const MCOperandInfo OperandInfo129[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     831             : static const MCOperandInfo OperandInfo130[] = { { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     832             : static const MCOperandInfo OperandInfo131[] = { { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     833             : static const MCOperandInfo OperandInfo132[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     834             : static const MCOperandInfo OperandInfo133[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     835             : static const MCOperandInfo OperandInfo134[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     836             : static const MCOperandInfo OperandInfo135[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     837             : static const MCOperandInfo OperandInfo136[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     838             : static const MCOperandInfo OperandInfo137[] = { { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     839             : static const MCOperandInfo OperandInfo138[] = { { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     840             : static const MCOperandInfo OperandInfo139[] = { { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     841             : static const MCOperandInfo OperandInfo140[] = { { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     842             : 
     843             : extern const MCInstrDesc SparcInsts[] = {
     844             :   { 0,  1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #0 = PHI
     845             :   { 1,  0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1 = INLINEASM
     846             :   { 2,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #2 = CFI_INSTRUCTION
     847             :   { 3,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #3 = EH_LABEL
     848             :   { 4,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #4 = GC_LABEL
     849             :   { 5,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #5 = ANNOTATION_LABEL
     850             :   { 6,  0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #6 = KILL
     851             :   { 7,  3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #7 = EXTRACT_SUBREG
     852             :   { 8,  4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr },  // Inst #8 = INSERT_SUBREG
     853             :   { 9,  1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #9 = IMPLICIT_DEF
     854             :   { 10, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr },  // Inst #10 = SUBREG_TO_REG
     855             :   { 11, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #11 = COPY_TO_REGCLASS
     856             :   { 12, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #12 = DBG_VALUE
     857             :   { 13, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #13 = REG_SEQUENCE
     858             :   { 14, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #14 = COPY
     859             :   { 15, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #15 = BUNDLE
     860             :   { 16, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #16 = LIFETIME_START
     861             :   { 17, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #17 = LIFETIME_END
     862             :   { 18, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #18 = STACKMAP
     863             :   { 19, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #19 = FENTRY_CALL
     864             :   { 20, 6,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr },  // Inst #20 = PATCHPOINT
     865             :   { 21, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr },  // Inst #21 = LOAD_STACK_GUARD
     866             :   { 22, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #22 = STATEPOINT
     867             :   { 23, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #23 = LOCAL_ESCAPE
     868             :   { 24, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #24 = FAULTING_OP
     869             :   { 25, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #25 = PATCHABLE_OP
     870             :   { 26, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #26 = PATCHABLE_FUNCTION_ENTER
     871             :   { 27, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #27 = PATCHABLE_RET
     872             :   { 28, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #28 = PATCHABLE_FUNCTION_EXIT
     873             :   { 29, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #29 = PATCHABLE_TAIL_CALL
     874             :   { 30, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #30 = PATCHABLE_EVENT_CALL
     875             :   { 31, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #31 = G_ADD
     876             :   { 32, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #32 = G_SUB
     877             :   { 33, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #33 = G_MUL
     878             :   { 34, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #34 = G_SDIV
     879             :   { 35, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #35 = G_UDIV
     880             :   { 36, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #36 = G_SREM
     881             :   { 37, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #37 = G_UREM
     882             :   { 38, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #38 = G_AND
     883             :   { 39, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #39 = G_OR
     884             :   { 40, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #40 = G_XOR
     885             :   { 41, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #41 = G_IMPLICIT_DEF
     886             :   { 42, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #42 = G_PHI
     887             :   { 43, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #43 = G_FRAME_INDEX
     888             :   { 44, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #44 = G_GLOBAL_VALUE
     889             :   { 45, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #45 = G_EXTRACT
     890             :   { 46, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #46 = G_UNMERGE_VALUES
     891             :   { 47, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #47 = G_INSERT
     892             :   { 48, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #48 = G_MERGE_VALUES
     893             :   { 49, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #49 = G_PTRTOINT
     894             :   { 50, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #50 = G_INTTOPTR
     895             :   { 51, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #51 = G_BITCAST
     896             :   { 52, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #52 = G_LOAD
     897             :   { 53, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #53 = G_STORE
     898             :   { 54, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #54 = G_BRCOND
     899             :   { 55, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #55 = G_BRINDIRECT
     900             :   { 56, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #56 = G_INTRINSIC
     901             :   { 57, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #57 = G_INTRINSIC_W_SIDE_EFFECTS
     902             :   { 58, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #58 = G_ANYEXT
     903             :   { 59, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #59 = G_TRUNC
     904             :   { 60, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #60 = G_CONSTANT
     905             :   { 61, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #61 = G_FCONSTANT
     906             :   { 62, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #62 = G_VASTART
     907             :   { 63, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #63 = G_VAARG
     908             :   { 64, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #64 = G_SEXT
     909             :   { 65, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #65 = G_ZEXT
     910             :   { 66, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #66 = G_SHL
     911             :   { 67, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #67 = G_LSHR
     912             :   { 68, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #68 = G_ASHR
     913             :   { 69, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #69 = G_ICMP
     914             :   { 70, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #70 = G_FCMP
     915             :   { 71, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #71 = G_SELECT
     916             :   { 72, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #72 = G_UADDE
     917             :   { 73, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #73 = G_USUBE
     918             :   { 74, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #74 = G_SADDO
     919             :   { 75, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #75 = G_SSUBO
     920             :   { 76, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #76 = G_UMULO
     921             :   { 77, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #77 = G_SMULO
     922             :   { 78, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #78 = G_UMULH
     923             :   { 79, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #79 = G_SMULH
     924             :   { 80, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #80 = G_FADD
     925             :   { 81, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #81 = G_FSUB
     926             :   { 82, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #82 = G_FMUL
     927             :   { 83, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #83 = G_FMA
     928             :   { 84, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #84 = G_FDIV
     929             :   { 85, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #85 = G_FREM
     930             :   { 86, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #86 = G_FPOW
     931             :   { 87, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #87 = G_FEXP
     932             :   { 88, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #88 = G_FEXP2
     933             :   { 89, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #89 = G_FLOG
     934             :   { 90, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #90 = G_FLOG2
     935             :   { 91, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #91 = G_FNEG
     936             :   { 92, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #92 = G_FPEXT
     937             :   { 93, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #93 = G_FPTRUNC
     938             :   { 94, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #94 = G_FPTOSI
     939             :   { 95, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #95 = G_FPTOUI
     940             :   { 96, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #96 = G_SITOFP
     941             :   { 97, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #97 = G_UITOFP
     942             :   { 98, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #98 = G_GEP
     943             :   { 99, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #99 = G_PTR_MASK
     944             :   { 100,        1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #100 = G_BR
     945             :   { 101,        4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #101 = G_INSERT_VECTOR_ELT
     946             :   { 102,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr },  // Inst #102 = G_EXTRACT_VECTOR_ELT
     947             :   { 103,        4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #103 = G_SHUFFLE_VECTOR
     948             :   { 104,        3,      1,      4,      1,      0, 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #104 = ADDCCri
     949             :   { 105,        3,      1,      4,      1,      0, 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #105 = ADDCCrr
     950             :   { 106,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #106 = ADDCri
     951             :   { 107,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #107 = ADDCrr
     952             :   { 108,        3,      1,      4,      1,      0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #108 = ADDEri
     953             :   { 109,        3,      1,      4,      1,      0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #109 = ADDErr
     954             :   { 110,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #110 = ADDXC
     955             :   { 111,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo30, -1 ,nullptr },  // Inst #111 = ADDXCCC
     956             :   { 112,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #112 = ADDXri
     957             :   { 113,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #113 = ADDXrr
     958             :   { 114,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #114 = ADDri
     959             :   { 115,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #115 = ADDrr
     960             :   { 116,        2,      0,      4,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList2, ImplicitList2, OperandInfo8, -1 ,nullptr },  // Inst #116 = ADJCALLSTACKDOWN
     961             :   { 117,        2,      0,      4,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList2, ImplicitList2, OperandInfo8, -1 ,nullptr },  // Inst #117 = ADJCALLSTACKUP
     962             :   { 118,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #118 = ALIGNADDR
     963             :   { 119,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #119 = ALIGNADDRL
     964             :   { 120,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #120 = ANDCCri
     965             :   { 121,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #121 = ANDCCrr
     966             :   { 122,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #122 = ANDNCCri
     967             :   { 123,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #123 = ANDNCCrr
     968             :   { 124,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #124 = ANDNri
     969             :   { 125,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #125 = ANDNrr
     970             :   { 126,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #126 = ANDXNrr
     971             :   { 127,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #127 = ANDXri
     972             :   { 128,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #128 = ANDXrr
     973             :   { 129,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #129 = ANDri
     974             :   { 130,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #130 = ANDrr
     975             :   { 131,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #131 = ARRAY16
     976             :   { 132,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #132 = ARRAY32
     977             :   { 133,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #133 = ARRAY8
     978             :   { 134,        1,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #134 = BA
     979             :   { 135,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #135 = BCOND
     980             :   { 136,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #136 = BCONDA
     981             :   { 137,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #137 = BINDri
     982             :   { 138,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #138 = BINDrr
     983             :   { 139,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #139 = BMASK
     984             :   { 140,        3,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #140 = BPFCC
     985             :   { 141,        3,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #141 = BPFCCA
     986             :   { 142,        3,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #142 = BPFCCANT
     987             :   { 143,        3,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #143 = BPFCCNT
     988             :   { 144,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #144 = BPGEZapn
     989             :   { 145,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #145 = BPGEZapt
     990             :   { 146,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #146 = BPGEZnapn
     991             :   { 147,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #147 = BPGEZnapt
     992             :   { 148,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #148 = BPGZapn
     993             :   { 149,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #149 = BPGZapt
     994             :   { 150,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #150 = BPGZnapn
     995             :   { 151,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #151 = BPGZnapt
     996             :   { 152,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #152 = BPICC
     997             :   { 153,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #153 = BPICCA
     998             :   { 154,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #154 = BPICCANT
     999             :   { 155,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #155 = BPICCNT
    1000             :   { 156,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #156 = BPLEZapn
    1001             :   { 157,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #157 = BPLEZapt
    1002             :   { 158,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #158 = BPLEZnapn
    1003             :   { 159,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #159 = BPLEZnapt
    1004             :   { 160,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #160 = BPLZapn
    1005             :   { 161,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #161 = BPLZapt
    1006             :   { 162,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #162 = BPLZnapn
    1007             :   { 163,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #163 = BPLZnapt
    1008             :   { 164,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #164 = BPNZapn
    1009             :   { 165,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #165 = BPNZapt
    1010             :   { 166,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #166 = BPNZnapn
    1011             :   { 167,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #167 = BPNZnapt
    1012             :   { 168,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #168 = BPXCC
    1013             :   { 169,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #169 = BPXCCA
    1014             :   { 170,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #170 = BPXCCANT
    1015             :   { 171,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #171 = BPXCCNT
    1016             :   { 172,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #172 = BPZapn
    1017             :   { 173,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #173 = BPZapt
    1018             :   { 174,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #174 = BPZnapn
    1019             :   { 175,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #175 = BPZnapt
    1020             :   { 176,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #176 = BSHUFFLE
    1021             :   { 177,        1,      0,      4,      3,      0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList2, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #177 = CALL
    1022             :   { 178,        2,      0,      4,      3,      0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList2, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #178 = CALLri
    1023             :   { 179,        2,      0,      4,      3,      0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList2, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #179 = CALLrr
    1024             :   { 180,        4,      1,      4,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #180 = CASAasi10
    1025             :   { 181,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #181 = CASArr
    1026             :   { 182,        4,      1,      4,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #182 = CASXrr
    1027             :   { 183,        4,      1,      4,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #183 = CASrr
    1028             :   { 184,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #184 = CBCOND
    1029             :   { 185,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #185 = CBCONDA
    1030             :   { 186,        1,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #186 = CMASK16
    1031             :   { 187,        1,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #187 = CMASK32
    1032             :   { 188,        1,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #188 = CMASK8
    1033             :   { 189,        2,      0,      4,      1,      0, 0x0ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #189 = CMPri
    1034             :   { 190,        2,      0,      4,      1,      0, 0x0ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #190 = CMPrr
    1035             :   { 191,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #191 = EDGE16
    1036             :   { 192,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #192 = EDGE16L
    1037             :   { 193,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #193 = EDGE16LN
    1038             :   { 194,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #194 = EDGE16N
    1039             :   { 195,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #195 = EDGE32
    1040             :   { 196,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #196 = EDGE32L
    1041             :   { 197,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #197 = EDGE32LN
    1042             :   { 198,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #198 = EDGE32N
    1043             :   { 199,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #199 = EDGE8
    1044             :   { 200,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #200 = EDGE8L
    1045             :   { 201,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #201 = EDGE8LN
    1046             :   { 202,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #202 = EDGE8N
    1047             :   { 203,        2,      0,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #203 = EH_SJLJ_LONGJMP32ri
    1048             :   { 204,        2,      0,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #204 = EH_SJLJ_LONGJMP32rr
    1049             :   { 205,        3,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, OperandInfo43, -1 ,nullptr },  // Inst #205 = EH_SJLJ_SETJMP32ri
    1050             :   { 206,        3,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #206 = EH_SJLJ_SETJMP32rr
    1051             :   { 207,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #207 = FABSD
    1052             :   { 208,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #208 = FABSQ
    1053             :   { 209,        2,      1,      4,      4,      0, 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #209 = FABSS
    1054             :   { 210,        3,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #210 = FADDD
    1055             :   { 211,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #211 = FADDQ
    1056             :   { 212,        3,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #212 = FADDS
    1057             :   { 213,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #213 = FALIGNADATA
    1058             :   { 214,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #214 = FAND
    1059             :   { 215,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #215 = FANDNOT1
    1060             :   { 216,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #216 = FANDNOT1S
    1061             :   { 217,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #217 = FANDNOT2
    1062             :   { 218,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #218 = FANDNOT2S
    1063             :   { 219,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #219 = FANDS
    1064             :   { 220,        2,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #220 = FBCOND
    1065             :   { 221,        2,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #221 = FBCONDA
    1066             :   { 222,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #222 = FCHKSM16
    1067             :   { 223,        2,      0,      4,      5,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo45, -1 ,nullptr },  // Inst #223 = FCMPD
    1068             :   { 224,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #224 = FCMPEQ16
    1069             :   { 225,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #225 = FCMPEQ32
    1070             :   { 226,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #226 = FCMPGT16
    1071             :   { 227,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #227 = FCMPGT32
    1072             :   { 228,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #228 = FCMPLE16
    1073             :   { 229,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #229 = FCMPLE32
    1074             :   { 230,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #230 = FCMPNE16
    1075             :   { 231,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #231 = FCMPNE32
    1076             :   { 232,        2,      0,      4,      0,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo46, -1 ,nullptr },  // Inst #232 = FCMPQ
    1077             :   { 233,        2,      0,      4,      5,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo47, -1 ,nullptr },  // Inst #233 = FCMPS
    1078             :   { 234,        3,      1,      4,      6,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #234 = FDIVD
    1079             :   { 235,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #235 = FDIVQ
    1080             :   { 236,        3,      1,      4,      7,      0, 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #236 = FDIVS
    1081             :   { 237,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #237 = FDMULQ
    1082             :   { 238,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #238 = FDTOI
    1083             :   { 239,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #239 = FDTOQ
    1084             :   { 240,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #240 = FDTOS
    1085             :   { 241,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #241 = FDTOX
    1086             :   { 242,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #242 = FEXPAND
    1087             :   { 243,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #243 = FHADDD
    1088             :   { 244,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #244 = FHADDS
    1089             :   { 245,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #245 = FHSUBD
    1090             :   { 246,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #246 = FHSUBS
    1091             :   { 247,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #247 = FITOD
    1092             :   { 248,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #248 = FITOQ
    1093             :   { 249,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #249 = FITOS
    1094             :   { 250,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #250 = FLCMPD
    1095             :   { 251,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #251 = FLCMPS
    1096             :   { 252,        0,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #252 = FLUSH
    1097             :   { 253,        0,      0,      4,      1,      0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #253 = FLUSHW
    1098             :   { 254,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #254 = FLUSHri
    1099             :   { 255,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #255 = FLUSHrr
    1100             :   { 256,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #256 = FMEAN16
    1101             :   { 257,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #257 = FMOVD
    1102             :   { 258,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #258 = FMOVD_FCC
    1103             :   { 259,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #259 = FMOVD_ICC
    1104             :   { 260,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #260 = FMOVD_XCC
    1105             :   { 261,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #261 = FMOVQ
    1106             :   { 262,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #262 = FMOVQ_FCC
    1107             :   { 263,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #263 = FMOVQ_ICC
    1108             :   { 264,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #264 = FMOVQ_XCC
    1109             :   { 265,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #265 = FMOVRGEZD
    1110             :   { 266,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #266 = FMOVRGEZQ
    1111             :   { 267,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #267 = FMOVRGEZS
    1112             :   { 268,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #268 = FMOVRGZD
    1113             :   { 269,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #269 = FMOVRGZQ
    1114             :   { 270,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #270 = FMOVRGZS
    1115             :   { 271,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #271 = FMOVRLEZD
    1116             :   { 272,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #272 = FMOVRLEZQ
    1117             :   { 273,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #273 = FMOVRLEZS
    1118             :   { 274,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #274 = FMOVRLZD
    1119             :   { 275,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #275 = FMOVRLZQ
    1120             :   { 276,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #276 = FMOVRLZS
    1121             :   { 277,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #277 = FMOVRNZD
    1122             :   { 278,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #278 = FMOVRNZQ
    1123             :   { 279,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #279 = FMOVRNZS
    1124             :   { 280,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #280 = FMOVRZD
    1125             :   { 281,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #281 = FMOVRZQ
    1126             :   { 282,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #282 = FMOVRZS
    1127             :   { 283,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #283 = FMOVS
    1128             :   { 284,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #284 = FMOVS_FCC
    1129             :   { 285,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #285 = FMOVS_ICC
    1130             :   { 286,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #286 = FMOVS_XCC
    1131             :   { 287,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #287 = FMUL8SUX16
    1132             :   { 288,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #288 = FMUL8ULX16
    1133             :   { 289,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #289 = FMUL8X16
    1134             :   { 290,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #290 = FMUL8X16AL
    1135             :   { 291,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #291 = FMUL8X16AU
    1136             :   { 292,        3,      1,      4,      8,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #292 = FMULD
    1137             :   { 293,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #293 = FMULD8SUX16
    1138             :   { 294,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #294 = FMULD8ULX16
    1139             :   { 295,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #295 = FMULQ
    1140             :   { 296,        3,      1,      4,      9,      0, 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #296 = FMULS
    1141             :   { 297,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #297 = FNADDD
    1142             :   { 298,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #298 = FNADDS
    1143             :   { 299,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #299 = FNAND
    1144             :   { 300,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #300 = FNANDS
    1145             :   { 301,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #301 = FNEGD
    1146             :   { 302,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #302 = FNEGQ
    1147             :   { 303,        2,      1,      4,      10,     0, 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #303 = FNEGS
    1148             :   { 304,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #304 = FNHADDD
    1149             :   { 305,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #305 = FNHADDS
    1150             :   { 306,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #306 = FNMULD
    1151             :   { 307,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #307 = FNMULS
    1152             :   { 308,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #308 = FNOR
    1153             :   { 309,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #309 = FNORS
    1154             :   { 310,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #310 = FNOT1
    1155             :   { 311,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #311 = FNOT1S
    1156             :   { 312,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #312 = FNOT2
    1157             :   { 313,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #313 = FNOT2S
    1158             :   { 314,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #314 = FNSMULD
    1159             :   { 315,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #315 = FONE
    1160             :   { 316,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #316 = FONES
    1161             :   { 317,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #317 = FOR
    1162             :   { 318,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #318 = FORNOT1
    1163             :   { 319,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #319 = FORNOT1S
    1164             :   { 320,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #320 = FORNOT2
    1165             :   { 321,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #321 = FORNOT2S
    1166             :   { 322,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #322 = FORS
    1167             :   { 323,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #323 = FPACK16
    1168             :   { 324,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #324 = FPACK32
    1169             :   { 325,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #325 = FPACKFIX
    1170             :   { 326,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #326 = FPADD16
    1171             :   { 327,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #327 = FPADD16S
    1172             :   { 328,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #328 = FPADD32
    1173             :   { 329,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #329 = FPADD32S
    1174             :   { 330,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #330 = FPADD64
    1175             :   { 331,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #331 = FPMERGE
    1176             :   { 332,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #332 = FPSUB16
    1177             :   { 333,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #333 = FPSUB16S
    1178             :   { 334,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #334 = FPSUB32
    1179             :   { 335,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #335 = FPSUB32S
    1180             :   { 336,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #336 = FQTOD
    1181             :   { 337,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #337 = FQTOI
    1182             :   { 338,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #338 = FQTOS
    1183             :   { 339,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #339 = FQTOX
    1184             :   { 340,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #340 = FSLAS16
    1185             :   { 341,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #341 = FSLAS32
    1186             :   { 342,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #342 = FSLL16
    1187             :   { 343,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #343 = FSLL32
    1188             :   { 344,        3,      1,      4,      8,      0, 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #344 = FSMULD
    1189             :   { 345,        2,      1,      4,      11,     0, 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #345 = FSQRTD
    1190             :   { 346,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #346 = FSQRTQ
    1191             :   { 347,        2,      1,      4,      12,     0, 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #347 = FSQRTS
    1192             :   { 348,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #348 = FSRA16
    1193             :   { 349,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #349 = FSRA32
    1194             :   { 350,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #350 = FSRC1
    1195             :   { 351,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #351 = FSRC1S
    1196             :   { 352,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #352 = FSRC2
    1197             :   { 353,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #353 = FSRC2S
    1198             :   { 354,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #354 = FSRL16
    1199             :   { 355,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #355 = FSRL32
    1200             :   { 356,        2,      1,      4,      13,     0, 0x0ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #356 = FSTOD
    1201             :   { 357,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #357 = FSTOI
    1202             :   { 358,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #358 = FSTOQ
    1203             :   { 359,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #359 = FSTOX
    1204             :   { 360,        3,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #360 = FSUBD
    1205             :   { 361,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #361 = FSUBQ
    1206             :   { 362,        3,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #362 = FSUBS
    1207             :   { 363,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #363 = FXNOR
    1208             :   { 364,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #364 = FXNORS
    1209             :   { 365,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #365 = FXOR
    1210             :   { 366,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #366 = FXORS
    1211             :   { 367,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #367 = FXTOD
    1212             :   { 368,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #368 = FXTOQ
    1213             :   { 369,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #369 = FXTOS
    1214             :   { 370,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #370 = FZERO
    1215             :   { 371,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #371 = FZEROS
    1216             :   { 372,        1,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList5, OperandInfo2, -1 ,nullptr },  // Inst #372 = GETPCX
    1217             :   { 373,        3,      1,      4,      3,      0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #373 = JMPLri
    1218             :   { 374,        3,      1,      4,      3,      0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #374 = JMPLrr
    1219             :   { 375,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #375 = LDArr
    1220             :   { 376,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #376 = LDCSRri
    1221             :   { 377,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #377 = LDCSRrr
    1222             :   { 378,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr },  // Inst #378 = LDCri
    1223             :   { 379,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo68, -1 ,nullptr },  // Inst #379 = LDCrr
    1224             :   { 380,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo69, -1 ,nullptr },  // Inst #380 = LDDArr
    1225             :   { 381,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #381 = LDDCri
    1226             :   { 382,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #382 = LDDCrr
    1227             :   { 383,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #383 = LDDFArr
    1228             :   { 384,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #384 = LDDFri
    1229             :   { 385,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #385 = LDDFrr
    1230             :   { 386,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #386 = LDDri
    1231             :   { 387,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr },  // Inst #387 = LDDrr
    1232             :   { 388,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #388 = LDFArr
    1233             :   { 389,        2,      0,      4,      15,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo32, -1 ,nullptr },  // Inst #389 = LDFSRri
    1234             :   { 390,        2,      0,      4,      15,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo33, -1 ,nullptr },  // Inst #390 = LDFSRrr
    1235             :   { 391,        3,      1,      4,      15,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #391 = LDFri
    1236             :   { 392,        3,      1,      4,      15,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #392 = LDFrr
    1237             :   { 393,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr },  // Inst #393 = LDQFArr
    1238             :   { 394,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr },  // Inst #394 = LDQFri
    1239             :   { 395,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #395 = LDQFrr
    1240             :   { 396,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #396 = LDSBArr
    1241             :   { 397,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #397 = LDSBri
    1242             :   { 398,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #398 = LDSBrr
    1243             :   { 399,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #399 = LDSHArr
    1244             :   { 400,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #400 = LDSHri
    1245             :   { 401,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #401 = LDSHrr
    1246             :   { 402,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #402 = LDSTUBArr
    1247             :   { 403,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #403 = LDSTUBri
    1248             :   { 404,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #404 = LDSTUBrr
    1249             :   { 405,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #405 = LDSWri
    1250             :   { 406,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #406 = LDSWrr
    1251             :   { 407,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #407 = LDUBArr
    1252             :   { 408,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #408 = LDUBri
    1253             :   { 409,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #409 = LDUBrr
    1254             :   { 410,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #410 = LDUHArr
    1255             :   { 411,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #411 = LDUHri
    1256             :   { 412,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #412 = LDUHrr
    1257             :   { 413,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo32, -1 ,nullptr },  // Inst #413 = LDXFSRri
    1258             :   { 414,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo33, -1 ,nullptr },  // Inst #414 = LDXFSRrr
    1259             :   { 415,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #415 = LDXri
    1260             :   { 416,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #416 = LDXrr
    1261             :   { 417,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #417 = LDri
    1262             :   { 418,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #418 = LDrr
    1263             :   { 419,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #419 = LEAX_ADDri
    1264             :   { 420,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #420 = LEA_ADDri
    1265             :   { 421,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #421 = LZCNT
    1266             :   { 422,        1,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #422 = MEMBARi
    1267             :   { 423,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #423 = MOVDTOX
    1268             :   { 424,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #424 = MOVFCCri
    1269             :   { 425,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #425 = MOVFCCrr
    1270             :   { 426,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #426 = MOVICCri
    1271             :   { 427,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #427 = MOVICCrr
    1272             :   { 428,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #428 = MOVRGEZri
    1273             :   { 429,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #429 = MOVRGEZrr
    1274             :   { 430,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #430 = MOVRGZri
    1275             :   { 431,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #431 = MOVRGZrr
    1276             :   { 432,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #432 = MOVRLEZri
    1277             :   { 433,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #433 = MOVRLEZrr
    1278             :   { 434,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #434 = MOVRLZri
    1279             :   { 435,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #435 = MOVRLZrr
    1280             :   { 436,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #436 = MOVRNZri
    1281             :   { 437,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #437 = MOVRNZrr
    1282             :   { 438,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #438 = MOVRRZri
    1283             :   { 439,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #439 = MOVRRZrr
    1284             :   { 440,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #440 = MOVSTOSW
    1285             :   { 441,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #441 = MOVSTOUW
    1286             :   { 442,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #442 = MOVWTOS
    1287             :   { 443,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #443 = MOVXCCri
    1288             :   { 444,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList1, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #444 = MOVXCCrr
    1289             :   { 445,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #445 = MOVXTOD
    1290             :   { 446,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList8, ImplicitList8, OperandInfo28, -1 ,nullptr },  // Inst #446 = MULSCCri
    1291             :   { 447,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList8, ImplicitList8, OperandInfo29, -1 ,nullptr },  // Inst #447 = MULSCCrr
    1292             :   { 448,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #448 = MULXri
    1293             :   { 449,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #449 = MULXrr
    1294             :   { 450,        0,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #450 = NOP
    1295             :   { 451,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #451 = ORCCri
    1296             :   { 452,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #452 = ORCCrr
    1297             :   { 453,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #453 = ORNCCri
    1298             :   { 454,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #454 = ORNCCrr
    1299             :   { 455,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #455 = ORNri
    1300             :   { 456,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #456 = ORNrr
    1301             :   { 457,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #457 = ORXNrr
    1302             :   { 458,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #458 = ORXri
    1303             :   { 459,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #459 = ORXrr
    1304             :   { 460,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #460 = ORri
    1305             :   { 461,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #461 = ORrr
    1306             :   { 462,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #462 = PDIST
    1307             :   { 463,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #463 = PDISTN
    1308             :   { 464,        2,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #464 = POPCrr
    1309             :   { 465,        2,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #465 = RDASR
    1310             :   { 466,        2,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo93, -1 ,nullptr },  // Inst #466 = RDPR
    1311             :   { 467,        1,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList9, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #467 = RDPSR
    1312             :   { 468,        1,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #468 = RDTBR
    1313             :   { 469,        1,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList3, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #469 = RDWIM
    1314             :   { 470,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #470 = RESTOREri
    1315             :   { 471,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #471 = RESTORErr
    1316             :   { 472,        1,      0,      4,      3,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #472 = RET
    1317             :   { 473,        1,      0,      4,      3,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #473 = RETL
    1318             :   { 474,        2,      0,      4,      3,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #474 = RETTri
    1319             :   { 475,        2,      0,      4,      3,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #475 = RETTrr
    1320             :   { 476,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #476 = SAVEri
    1321             :   { 477,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #477 = SAVErr
    1322             :   { 478,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList8, OperandInfo28, -1 ,nullptr },  // Inst #478 = SDIVCCri
    1323             :   { 479,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList8, OperandInfo29, -1 ,nullptr },  // Inst #479 = SDIVCCrr
    1324             :   { 480,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #480 = SDIVXri
    1325             :   { 481,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #481 = SDIVXrr
    1326             :   { 482,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList11, OperandInfo28, -1 ,nullptr },  // Inst #482 = SDIVri
    1327             :   { 483,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList11, OperandInfo29, -1 ,nullptr },  // Inst #483 = SDIVrr
    1328             :   { 484,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #484 = SELECT_CC_DFP_FCC
    1329             :   { 485,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #485 = SELECT_CC_DFP_ICC
    1330             :   { 486,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo96, -1 ,nullptr },  // Inst #486 = SELECT_CC_FP_FCC
    1331             :   { 487,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo96, -1 ,nullptr },  // Inst #487 = SELECT_CC_FP_ICC
    1332             :   { 488,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #488 = SELECT_CC_Int_FCC
    1333             :   { 489,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #489 = SELECT_CC_Int_ICC
    1334             :   { 490,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #490 = SELECT_CC_QFP_FCC
    1335             :   { 491,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #491 = SELECT_CC_QFP_ICC
    1336             :   { 492,        2,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #492 = SET
    1337             :   { 493,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #493 = SETHIXi
    1338             :   { 494,        2,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #494 = SETHIi
    1339             :   { 495,        0,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #495 = SHUTDOWN
    1340             :   { 496,        0,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #496 = SIAM
    1341             :   { 497,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #497 = SLLXri
    1342             :   { 498,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #498 = SLLXrr
    1343             :   { 499,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #499 = SLLri
    1344             :   { 500,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #500 = SLLrr
    1345             :   { 501,        4,      1,      4,      17,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList12, OperandInfo100, -1 ,nullptr },  // Inst #501 = SMACri
    1346             :   { 502,        4,      1,      4,      17,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList12, OperandInfo101, -1 ,nullptr },  // Inst #502 = SMACrr
    1347             :   { 503,        3,      1,      4,      18,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList8, OperandInfo28, -1 ,nullptr },  // Inst #503 = SMULCCri
    1348             :   { 504,        3,      1,      4,      18,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList8, OperandInfo29, -1 ,nullptr },  // Inst #504 = SMULCCrr
    1349             :   { 505,        3,      1,      4,      18,     0, 0x0ULL, nullptr, ImplicitList11, OperandInfo28, -1 ,nullptr },  // Inst #505 = SMULri
    1350             :   { 506,        3,      1,      4,      18,     0, 0x0ULL, nullptr, ImplicitList11, OperandInfo29, -1 ,nullptr },  // Inst #506 = SMULrr
    1351             :   { 507,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #507 = SRAXri
    1352             :   { 508,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #508 = SRAXrr
    1353             :   { 509,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #509 = SRAri
    1354             :   { 510,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #510 = SRArr
    1355             :   { 511,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #511 = SRLXri
    1356             :   { 512,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #512 = SRLXrr
    1357             :   { 513,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #513 = SRLri
    1358             :   { 514,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #514 = SRLrr
    1359             :   { 515,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #515 = STArr
    1360             :   { 516,        0,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #516 = STBAR
    1361             :   { 517,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #517 = STBArr
    1362             :   { 518,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #518 = STBri
    1363             :   { 519,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr },  // Inst #519 = STBrr
    1364             :   { 520,        2,      1,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #520 = STCSRri
    1365             :   { 521,        2,      1,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #521 = STCSRrr
    1366             :   { 522,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo105, -1 ,nullptr },  // Inst #522 = STCri
    1367             :   { 523,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #523 = STCrr
    1368             :   { 524,        4,      0,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #524 = STDArr
    1369             :   { 525,        2,      1,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList13, OperandInfo32, -1 ,nullptr },  // Inst #525 = STDCQri
    1370             :   { 526,        2,      1,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList13, OperandInfo33, -1 ,nullptr },  // Inst #526 = STDCQrr
    1371             :   { 527,        3,      0,      4,      20,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #527 = STDCri
    1372             :   { 528,        3,      0,      4,      20,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #528 = STDCrr
    1373             :   { 529,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo110, -1 ,nullptr },  // Inst #529 = STDFArr
    1374             :   { 530,        2,      1,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList14, OperandInfo32, -1 ,nullptr },  // Inst #530 = STDFQri
    1375             :   { 531,        2,      1,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList14, OperandInfo33, -1 ,nullptr },  // Inst #531 = STDFQrr
    1376             :   { 532,        3,      0,      4,      20,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #532 = STDFri
    1377             :   { 533,        3,      0,      4,      20,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #533 = STDFrr
    1378             :   { 534,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #534 = STDri
    1379             :   { 535,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #535 = STDrr
    1380             :   { 536,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #536 = STFArr
    1381             :   { 537,        2,      1,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo32, -1 ,nullptr },  // Inst #537 = STFSRri
    1382             :   { 538,        2,      1,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo33, -1 ,nullptr },  // Inst #538 = STFSRrr
    1383             :   { 539,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #539 = STFri
    1384             :   { 540,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #540 = STFrr
    1385             :   { 541,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #541 = STHArr
    1386             :   { 542,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #542 = STHri
    1387             :   { 543,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr },  // Inst #543 = STHrr
    1388             :   { 544,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr },  // Inst #544 = STQFArr
    1389             :   { 545,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #545 = STQFri
    1390             :   { 546,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #546 = STQFrr
    1391             :   { 547,        2,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo32, -1 ,nullptr },  // Inst #547 = STXFSRri
    1392             :   { 548,        2,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo33, -1 ,nullptr },  // Inst #548 = STXFSRrr
    1393             :   { 549,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #549 = STXri
    1394             :   { 550,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #550 = STXrr
    1395             :   { 551,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #551 = STri
    1396             :   { 552,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr },  // Inst #552 = STrr
    1397             :   { 553,        3,      1,      4,      1,      0, 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #553 = SUBCCri
    1398             :   { 554,        3,      1,      4,      1,      0, 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #554 = SUBCCrr
    1399             :   { 555,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #555 = SUBCri
    1400             :   { 556,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #556 = SUBCrr
    1401             :   { 557,        3,      1,      4,      1,      0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #557 = SUBEri
    1402             :   { 558,        3,      1,      4,      1,      0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #558 = SUBErr
    1403             :   { 559,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #559 = SUBXri
    1404             :   { 560,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #560 = SUBXrr
    1405             :   { 561,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #561 = SUBri
    1406             :   { 562,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #562 = SUBrr
    1407             :   { 563,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #563 = SWAPArr
    1408             :   { 564,        4,      1,      4,      1,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #564 = SWAPri
    1409             :   { 565,        4,      1,      4,      1,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #565 = SWAPrr
    1410             :   { 566,        0,      0,      4,      1,      0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #566 = TA3
    1411             :   { 567,        0,      0,      4,      1,      0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #567 = TA5
    1412             :   { 568,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #568 = TADDCCTVri
    1413             :   { 569,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #569 = TADDCCTVrr
    1414             :   { 570,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #570 = TADDCCri
    1415             :   { 571,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #571 = TADDCCrr
    1416             :   { 572,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #572 = TICCri
    1417             :   { 573,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #573 = TICCrr
    1418             :   { 574,        4,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #574 = TLS_ADDXrr
    1419             :   { 575,        4,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #575 = TLS_ADDrr
    1420             :   { 576,        2,      0,      4,      3,      0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList2, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #576 = TLS_CALL
    1421             :   { 577,        4,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #577 = TLS_LDXrr
    1422             :   { 578,        4,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #578 = TLS_LDrr
    1423             :   { 579,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #579 = TRAPri
    1424             :   { 580,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #580 = TRAPrr
    1425             :   { 581,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #581 = TSUBCCTVri
    1426             :   { 582,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #582 = TSUBCCTVrr
    1427             :   { 583,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #583 = TSUBCCri
    1428             :   { 584,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #584 = TSUBCCrr
    1429             :   { 585,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #585 = TXCCri
    1430             :   { 586,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #586 = TXCCrr
    1431             :   { 587,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList8, OperandInfo28, -1 ,nullptr },  // Inst #587 = UDIVCCri
    1432             :   { 588,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList8, OperandInfo29, -1 ,nullptr },  // Inst #588 = UDIVCCrr
    1433             :   { 589,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #589 = UDIVXri
    1434             :   { 590,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #590 = UDIVXrr
    1435             :   { 591,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList11, OperandInfo28, -1 ,nullptr },  // Inst #591 = UDIVri
    1436             :   { 592,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList11, OperandInfo29, -1 ,nullptr },  // Inst #592 = UDIVrr
    1437             :   { 593,        4,      1,      4,      17,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList12, OperandInfo100, -1 ,nullptr },  // Inst #593 = UMACri
    1438             :   { 594,        4,      1,      4,      17,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList12, OperandInfo101, -1 ,nullptr },  // Inst #594 = UMACrr
    1439             :   { 595,        3,      1,      4,      21,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList8, OperandInfo28, -1 ,nullptr },  // Inst #595 = UMULCCri
    1440             :   { 596,        3,      1,      4,      21,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList8, OperandInfo29, -1 ,nullptr },  // Inst #596 = UMULCCrr
    1441             :   { 597,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #597 = UMULXHI
    1442             :   { 598,        3,      1,      4,      21,     0, 0x0ULL, nullptr, ImplicitList11, OperandInfo28, -1 ,nullptr },  // Inst #598 = UMULri
    1443             :   { 599,        3,      1,      4,      21,     0, 0x0ULL, nullptr, ImplicitList11, OperandInfo29, -1 ,nullptr },  // Inst #599 = UMULrr
    1444             :   { 600,        1,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #600 = UNIMP
    1445             :   { 601,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #601 = V9FCMPD
    1446             :   { 602,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #602 = V9FCMPED
    1447             :   { 603,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #603 = V9FCMPEQ
    1448             :   { 604,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #604 = V9FCMPES
    1449             :   { 605,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #605 = V9FCMPQ
    1450             :   { 606,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #606 = V9FCMPS
    1451             :   { 607,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #607 = V9FMOVD_FCC
    1452             :   { 608,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo133, -1 ,nullptr },  // Inst #608 = V9FMOVQ_FCC
    1453             :   { 609,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #609 = V9FMOVS_FCC
    1454             :   { 610,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #610 = V9MOVFCCri
    1455             :   { 611,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #611 = V9MOVFCCrr
    1456             :   { 612,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr },  // Inst #612 = WRASRri
    1457             :   { 613,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #613 = WRASRrr
    1458             :   { 614,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #614 = WRPRri
    1459             :   { 615,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #615 = WRPRrr
    1460             :   { 616,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList9, OperandInfo41, -1 ,nullptr },  // Inst #616 = WRPSRri
    1461             :   { 617,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList9, OperandInfo42, -1 ,nullptr },  // Inst #617 = WRPSRrr
    1462             :   { 618,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList10, OperandInfo41, -1 ,nullptr },  // Inst #618 = WRTBRri
    1463             :   { 619,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList10, OperandInfo42, -1 ,nullptr },  // Inst #619 = WRTBRrr
    1464             :   { 620,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, OperandInfo41, -1 ,nullptr },  // Inst #620 = WRWIMri
    1465             :   { 621,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, OperandInfo42, -1 ,nullptr },  // Inst #621 = WRWIMrr
    1466             :   { 622,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #622 = XMULX
    1467             :   { 623,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #623 = XMULXHI
    1468             :   { 624,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #624 = XNORCCri
    1469             :   { 625,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #625 = XNORCCrr
    1470             :   { 626,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #626 = XNORXrr
    1471             :   { 627,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #627 = XNORri
    1472             :   { 628,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #628 = XNORrr
    1473             :   { 629,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr },  // Inst #629 = XORCCri
    1474             :   { 630,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr },  // Inst #630 = XORCCrr
    1475             :   { 631,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #631 = XORXri
    1476             :   { 632,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #632 = XORXrr
    1477             :   { 633,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #633 = XORri
    1478             :   { 634,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #634 = XORrr
    1479             : };
    1480             : 
    1481             : extern const char SparcInstrNameData[] = {
    1482             :   /* 0 */ 'C', 'A', 'S', 'A', 'a', 's', 'i', '1', '0', 0,
    1483             :   /* 10 */ 'F', 'S', 'R', 'C', '1', 0,
    1484             :   /* 16 */ 'F', 'A', 'N', 'D', 'N', 'O', 'T', '1', 0,
    1485             :   /* 25 */ 'F', 'N', 'O', 'T', '1', 0,
    1486             :   /* 31 */ 'F', 'O', 'R', 'N', 'O', 'T', '1', 0,
    1487             :   /* 39 */ 'F', 'S', 'R', 'A', '3', '2', 0,
    1488             :   /* 46 */ 'F', 'P', 'S', 'U', 'B', '3', '2', 0,
    1489             :   /* 54 */ 'F', 'P', 'A', 'D', 'D', '3', '2', 0,
    1490             :   /* 62 */ 'E', 'D', 'G', 'E', '3', '2', 0,
    1491             :   /* 69 */ 'F', 'C', 'M', 'P', 'L', 'E', '3', '2', 0,
    1492             :   /* 78 */ 'F', 'C', 'M', 'P', 'N', 'E', '3', '2', 0,
    1493             :   /* 87 */ 'F', 'P', 'A', 'C', 'K', '3', '2', 0,
    1494             :   /* 95 */ 'C', 'M', 'A', 'S', 'K', '3', '2', 0,
    1495             :   /* 103 */ 'F', 'S', 'L', 'L', '3', '2', 0,
    1496             :   /* 110 */ 'F', 'S', 'R', 'L', '3', '2', 0,
    1497             :   /* 117 */ 'F', 'C', 'M', 'P', 'E', 'Q', '3', '2', 0,
    1498             :   /* 126 */ 'F', 'S', 'L', 'A', 'S', '3', '2', 0,
    1499             :   /* 134 */ 'F', 'C', 'M', 'P', 'G', 'T', '3', '2', 0,
    1500             :   /* 143 */ 'A', 'R', 'R', 'A', 'Y', '3', '2', 0,
    1501             :   /* 151 */ 'F', 'S', 'R', 'C', '2', 0,
    1502             :   /* 157 */ 'G', '_', 'F', 'L', 'O', 'G', '2', 0,
    1503             :   /* 165 */ 'G', '_', 'F', 'E', 'X', 'P', '2', 0,
    1504             :   /* 173 */ 'F', 'A', 'N', 'D', 'N', 'O', 'T', '2', 0,
    1505             :   /* 182 */ 'F', 'N', 'O', 'T', '2', 0,
    1506             :   /* 188 */ 'F', 'O', 'R', 'N', 'O', 'T', '2', 0,
    1507             :   /* 196 */ 'T', 'A', '3', 0,
    1508             :   /* 200 */ 'F', 'P', 'A', 'D', 'D', '6', '4', 0,
    1509             :   /* 208 */ 'T', 'A', '5', 0,
    1510             :   /* 212 */ 'F', 'S', 'R', 'A', '1', '6', 0,
    1511             :   /* 219 */ 'F', 'P', 'S', 'U', 'B', '1', '6', 0,
    1512             :   /* 227 */ 'F', 'P', 'A', 'D', 'D', '1', '6', 0,
    1513             :   /* 235 */ 'E', 'D', 'G', 'E', '1', '6', 0,
    1514             :   /* 242 */ 'F', 'C', 'M', 'P', 'L', 'E', '1', '6', 0,
    1515             :   /* 251 */ 'F', 'C', 'M', 'P', 'N', 'E', '1', '6', 0,
    1516             :   /* 260 */ 'F', 'P', 'A', 'C', 'K', '1', '6', 0,
    1517             :   /* 268 */ 'C', 'M', 'A', 'S', 'K', '1', '6', 0,
    1518             :   /* 276 */ 'F', 'S', 'L', 'L', '1', '6', 0,
    1519             :   /* 283 */ 'F', 'S', 'R', 'L', '1', '6', 0,
    1520             :   /* 290 */ 'F', 'C', 'H', 'K', 'S', 'M', '1', '6', 0,
    1521             :   /* 299 */ 'F', 'M', 'E', 'A', 'N', '1', '6', 0,
    1522             :   /* 307 */ 'F', 'C', 'M', 'P', 'E', 'Q', '1', '6', 0,
    1523             :   /* 316 */ 'F', 'S', 'L', 'A', 'S', '1', '6', 0,
    1524             :   /* 324 */ 'F', 'C', 'M', 'P', 'G', 'T', '1', '6', 0,
    1525             :   /* 333 */ 'F', 'M', 'U', 'L', '8', 'X', '1', '6', 0,
    1526             :   /* 342 */ 'F', 'M', 'U', 'L', 'D', '8', 'U', 'L', 'X', '1', '6', 0,
    1527             :   /* 354 */ 'F', 'M', 'U', 'L', '8', 'U', 'L', 'X', '1', '6', 0,
    1528             :   /* 365 */ 'F', 'M', 'U', 'L', 'D', '8', 'S', 'U', 'X', '1', '6', 0,
    1529             :   /* 377 */ 'F', 'M', 'U', 'L', '8', 'S', 'U', 'X', '1', '6', 0,
    1530             :   /* 388 */ 'A', 'R', 'R', 'A', 'Y', '1', '6', 0,
    1531             :   /* 396 */ 'E', 'D', 'G', 'E', '8', 0,
    1532             :   /* 402 */ 'C', 'M', 'A', 'S', 'K', '8', 0,
    1533             :   /* 409 */ 'A', 'R', 'R', 'A', 'Y', '8', 0,
    1534             :   /* 416 */ 'B', 'A', 0,
    1535             :   /* 419 */ 'B', 'P', 'F', 'C', 'C', 'A', 0,
    1536             :   /* 426 */ 'B', 'P', 'I', 'C', 'C', 'A', 0,
    1537             :   /* 433 */ 'B', 'P', 'X', 'C', 'C', 'A', 0,
    1538             :   /* 440 */ 'C', 'B', 'C', 'O', 'N', 'D', 'A', 0,
    1539             :   /* 448 */ 'F', 'B', 'C', 'O', 'N', 'D', 'A', 0,
    1540             :   /* 456 */ 'G', '_', 'F', 'M', 'A', 0,
    1541             :   /* 462 */ 'F', 'A', 'L', 'I', 'G', 'N', 'A', 'D', 'A', 'T', 'A', 0,
    1542             :   /* 474 */ 'G', '_', 'F', 'S', 'U', 'B', 0,
    1543             :   /* 481 */ 'G', '_', 'S', 'U', 'B', 0,
    1544             :   /* 487 */ 'A', 'D', 'D', 'X', 'C', 'C', 'C', 0,
    1545             :   /* 495 */ 'B', 'P', 'F', 'C', 'C', 0,
    1546             :   /* 501 */ 'V', '9', 'F', 'M', 'O', 'V', 'D', '_', 'F', 'C', 'C', 0,
    1547             :   /* 513 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'D', 'F', 'P', '_', 'F', 'C', 'C', 0,
    1548             :   /* 531 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'F', 'P', '_', 'F', 'C', 'C', 0,
    1549             :   /* 549 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'F', 'P', '_', 'F', 'C', 'C', 0,
    1550             :   /* 566 */ 'V', '9', 'F', 'M', 'O', 'V', 'Q', '_', 'F', 'C', 'C', 0,
    1551             :   /* 578 */ 'V', '9', 'F', 'M', 'O', 'V', 'S', '_', 'F', 'C', 'C', 0,
    1552             :   /* 590 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'I', 'n', 't', '_', 'F', 'C', 'C', 0,
    1553             :   /* 608 */ 'B', 'P', 'I', 'C', 'C', 0,
    1554             :   /* 614 */ 'F', 'M', 'O', 'V', 'D', '_', 'I', 'C', 'C', 0,
    1555             :   /* 624 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'D', 'F', 'P', '_', 'I', 'C', 'C', 0,
    1556             :   /* 642 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'F', 'P', '_', 'I', 'C', 'C', 0,
    1557             :   /* 660 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'F', 'P', '_', 'I', 'C', 'C', 0,
    1558             :   /* 677 */ 'F', 'M', 'O', 'V', 'Q', '_', 'I', 'C', 'C', 0,
    1559             :   /* 687 */ 'F', 'M', 'O', 'V', 'S', '_', 'I', 'C', 'C', 0,
    1560             :   /* 697 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'I', 'n', 't', '_', 'I', 'C', 'C', 0,
    1561             :   /* 715 */ 'B', 'P', 'X', 'C', 'C', 0,
    1562             :   /* 721 */ 'F', 'M', 'O', 'V', 'D', '_', 'X', 'C', 'C', 0,
    1563             :   /* 731 */ 'F', 'M', 'O', 'V', 'Q', '_', 'X', 'C', 'C', 0,
    1564             :   /* 741 */ 'F', 'M', 'O', 'V', 'S', '_', 'X', 'C', 'C', 0,
    1565             :   /* 751 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', 0,
    1566             :   /* 763 */ 'G', '_', 'F', 'P', 'T', 'R', 'U', 'N', 'C', 0,
    1567             :   /* 773 */ 'G', '_', 'T', 'R', 'U', 'N', 'C', 0,
    1568             :   /* 781 */ 'A', 'D', 'D', 'X', 'C', 0,
    1569             :   /* 787 */ 'G', '_', 'L', 'O', 'A', 'D', 0,
    1570             :   /* 794 */ 'F', 'S', 'U', 'B', 'D', 0,
    1571             :   /* 800 */ 'F', 'H', 'S', 'U', 'B', 'D', 0,
    1572             :   /* 807 */ 'G', '_', 'F', 'A', 'D', 'D', 0,
    1573             :   /* 814 */ 'G', '_', 'A', 'D', 'D', 0,
    1574             :   /* 820 */ 'F', 'A', 'D', 'D', 'D', 0,
    1575             :   /* 826 */ 'F', 'H', 'A', 'D', 'D', 'D', 0,
    1576             :   /* 833 */ 'F', 'N', 'H', 'A', 'D', 'D', 'D', 0,
    1577             :   /* 841 */ 'F', 'N', 'A', 'D', 'D', 'D', 0,
    1578             :   /* 848 */ 'V', '9', 'F', 'C', 'M', 'P', 'E', 'D', 0,
    1579             :   /* 857 */ 'F', 'N', 'E', 'G', 'D', 0,
    1580             :   /* 863 */ 'F', 'M', 'U', 'L', 'D', 0,
    1581             :   /* 869 */ 'F', 'N', 'M', 'U', 'L', 'D', 0,
    1582             :   /* 876 */ 'F', 'S', 'M', 'U', 'L', 'D', 0,
    1583             :   /* 883 */ 'F', 'N', 'S', 'M', 'U', 'L', 'D', 0,
    1584             :   /* 891 */ 'F', 'A', 'N', 'D', 0,
    1585             :   /* 896 */ 'F', 'N', 'A', 'N', 'D', 0,
    1586             :   /* 902 */ 'F', 'E', 'X', 'P', 'A', 'N', 'D', 0,
    1587             :   /* 910 */ 'G', '_', 'A', 'N', 'D', 0,
    1588             :   /* 916 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0,
    1589             :   /* 929 */ 'C', 'B', 'C', 'O', 'N', 'D', 0,
    1590             :   /* 936 */ 'F', 'B', 'C', 'O', 'N', 'D', 0,
    1591             :   /* 943 */ 'G', '_', 'B', 'R', 'C', 'O', 'N', 'D', 0,
    1592             :   /* 952 */ 'F', 'I', 'T', 'O', 'D', 0,
    1593             :   /* 958 */ 'F', 'Q', 'T', 'O', 'D', 0,
    1594             :   /* 964 */ 'F', 'S', 'T', 'O', 'D', 0,
    1595             :   /* 970 */ 'F', 'X', 'T', 'O', 'D', 0,
    1596             :   /* 976 */ 'M', 'O', 'V', 'X', 'T', 'O', 'D', 0,
    1597             :   /* 984 */ 'V', '9', 'F', 'C', 'M', 'P', 'D', 0,
    1598             :   /* 992 */ 'F', 'L', 'C', 'M', 'P', 'D', 0,
    1599             :   /* 999 */ 'L', 'O', 'A', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'G', 'U', 'A', 'R', 'D', 0,
    1600             :   /* 1016 */ 'F', 'A', 'B', 'S', 'D', 0,
    1601             :   /* 1022 */ 'F', 'S', 'Q', 'R', 'T', 'D', 0,
    1602             :   /* 1029 */ 'F', 'D', 'I', 'V', 'D', 0,
    1603             :   /* 1035 */ 'F', 'M', 'O', 'V', 'D', 0,
    1604             :   /* 1041 */ 'F', 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'D', 0,
    1605             :   /* 1051 */ 'F', 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'D', 0,
    1606             :   /* 1061 */ 'F', 'M', 'O', 'V', 'R', 'G', 'Z', 'D', 0,
    1607             :   /* 1070 */ 'F', 'M', 'O', 'V', 'R', 'L', 'Z', 'D', 0,
    1608             :   /* 1079 */ 'F', 'M', 'O', 'V', 'R', 'N', 'Z', 'D', 0,
    1609             :   /* 1088 */ 'F', 'M', 'O', 'V', 'R', 'Z', 'D', 0,
    1610             :   /* 1096 */ 'G', '_', 'U', 'S', 'U', 'B', 'E', 0,
    1611             :   /* 1104 */ 'R', 'E', 'G', '_', 'S', 'E', 'Q', 'U', 'E', 'N', 'C', 'E', 0,
    1612             :   /* 1117 */ 'G', '_', 'U', 'A', 'D', 'D', 'E', 0,
    1613             :   /* 1125 */ 'F', 'P', 'M', 'E', 'R', 'G', 'E', 0,
    1614             :   /* 1133 */ 'B', 'U', 'N', 'D', 'L', 'E', 0,
    1615             :   /* 1140 */ 'B', 'S', 'H', 'U', 'F', 'F', 'L', 'E', 0,
    1616             :   /* 1149 */ 'F', 'O', 'N', 'E', 0,
    1617             :   /* 1154 */ 'L', 'O', 'C', 'A', 'L', '_', 'E', 'S', 'C', 'A', 'P', 'E', 0,
    1618             :   /* 1167 */ 'G', '_', 'S', 'T', 'O', 'R', 'E', 0,
    1619             :   /* 1175 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0,
    1620             :   /* 1185 */ 'G', '_', 'G', 'L', 'O', 'B', 'A', 'L', '_', 'V', 'A', 'L', 'U', 'E', 0,
    1621             :   /* 1200 */ 'G', '_', 'I', 'M', 'P', 'L', 'I', 'C', 'I', 'T', '_', 'D', 'E', 'F', 0,
    1622             :   /* 1215 */ 'G', '_', 'F', 'N', 'E', 'G', 0,
    1623             :   /* 1222 */ 'E', 'X', 'T', 'R', 'A', 'C', 'T', '_', 'S', 'U', 'B', 'R', 'E', 'G', 0,
    1624             :   /* 1237 */ 'I', 'N', 'S', 'E', 'R', 'T', '_', 'S', 'U', 'B', 'R', 'E', 'G', 0,
    1625             :   /* 1251 */ 'S', 'U', 'B', 'R', 'E', 'G', '_', 'T', 'O', '_', 'R', 'E', 'G', 0,
    1626             :   /* 1265 */ 'G', '_', 'F', 'L', 'O', 'G', 0,
    1627             :   /* 1272 */ 'G', '_', 'V', 'A', 'A', 'R', 'G', 0,
    1628             :   /* 1280 */ 'G', '_', 'S', 'M', 'U', 'L', 'H', 0,
    1629             :   /* 1288 */ 'G', '_', 'U', 'M', 'U', 'L', 'H', 0,
    1630             :   /* 1296 */ 'F', 'L', 'U', 'S', 'H', 0,
    1631             :   /* 1302 */ 'G', '_', 'P', 'H', 'I', 0,
    1632             :   /* 1308 */ 'U', 'M', 'U', 'L', 'X', 'H', 'I', 0,
    1633             :   /* 1316 */ 'X', 'M', 'U', 'L', 'X', 'H', 'I', 0,
    1634             :   /* 1324 */ 'F', 'D', 'T', 'O', 'I', 0,
    1635             :   /* 1330 */ 'F', 'Q', 'T', 'O', 'I', 0,
    1636             :   /* 1336 */ 'F', 'S', 'T', 'O', 'I', 0,
    1637             :   /* 1342 */ 'G', '_', 'F', 'P', 'T', 'O', 'S', 'I', 0,
    1638             :   /* 1351 */ 'G', '_', 'F', 'P', 'T', 'O', 'U', 'I', 0,
    1639             :   /* 1360 */ 'B', 'M', 'A', 'S', 'K', 0,
    1640             :   /* 1366 */ 'G', '_', 'P', 'T', 'R', '_', 'M', 'A', 'S', 'K', 0,
    1641             :   /* 1377 */ 'E', 'D', 'G', 'E', '3', '2', 'L', 0,
    1642             :   /* 1385 */ 'E', 'D', 'G', 'E', '1', '6', 'L', 0,
    1643             :   /* 1393 */ 'E', 'D', 'G', 'E', '8', 'L', 0,
    1644             :   /* 1400 */ 'F', 'M', 'U', 'L', '8', 'X', '1', '6', 'A', 'L', 0,
    1645             :   /* 1411 */ 'G', 'C', '_', 'L', 'A', 'B', 'E', 'L', 0,
    1646             :   /* 1420 */ 'E', 'H', '_', 'L', 'A', 'B', 'E', 'L', 0,
    1647             :   /* 1429 */ 'A', 'N', 'N', 'O', 'T', 'A', 'T', 'I', 'O', 'N', '_', 'L', 'A', 'B', 'E', 'L', 0,
    1648             :   /* 1446 */ 'G', '_', 'S', 'H', 'L', 0,
    1649             :   /* 1452 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'T', 'A', 'I', 'L', '_', 'C', 'A', 'L', 'L', 0,
    1650             :   /* 1472 */ 'T', 'L', 'S', '_', 'C', 'A', 'L', 'L', 0,
    1651             :   /* 1481 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'E', 'V', 'E', 'N', 'T', '_', 'C', 'A', 'L', 'L', 0,
    1652             :   /* 1502 */ 'F', 'E', 'N', 'T', 'R', 'Y', '_', 'C', 'A', 'L', 'L', 0,
    1653             :   /* 1514 */ 'K', 'I', 'L', 'L', 0,
    1654             :   /* 1519 */ 'A', 'L', 'I', 'G', 'N', 'A', 'D', 'D', 'R', 'L', 0,
    1655             :   /* 1530 */ 'R', 'E', 'T', 'L', 0,
    1656             :   /* 1535 */ 'G', '_', 'F', 'M', 'U', 'L', 0,
    1657             :   /* 1542 */ 'G', '_', 'M', 'U', 'L', 0,
    1658             :   /* 1548 */ 'S', 'I', 'A', 'M', 0,
    1659             :   /* 1553 */ 'G', '_', 'F', 'R', 'E', 'M', 0,
    1660             :   /* 1560 */ 'G', '_', 'S', 'R', 'E', 'M', 0,
    1661             :   /* 1567 */ 'G', '_', 'U', 'R', 'E', 'M', 0,
    1662             :   /* 1574 */ 'R', 'D', 'W', 'I', 'M', 0,
    1663             :   /* 1580 */ 'I', 'N', 'L', 'I', 'N', 'E', 'A', 'S', 'M', 0,
    1664             :   /* 1590 */ 'E', 'D', 'G', 'E', '3', '2', 'N', 0,
    1665             :   /* 1598 */ 'E', 'D', 'G', 'E', '1', '6', 'N', 0,
    1666             :   /* 1606 */ 'E', 'D', 'G', 'E', '8', 'N', 0,
    1667             :   /* 1613 */ 'E', 'D', 'G', 'E', '3', '2', 'L', 'N', 0,
    1668             :   /* 1622 */ 'E', 'D', 'G', 'E', '1', '6', 'L', 'N', 0,
    1669             :   /* 1631 */ 'E', 'D', 'G', 'E', '8', 'L', 'N', 0,
    1670             :   /* 1639 */ 'C', 'F', 'I', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 0,
    1671             :   /* 1655 */ 'P', 'D', 'I', 'S', 'T', 'N', 0,
    1672             :   /* 1662 */ 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 0,
    1673             :   /* 1679 */ 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0,
    1674             :   /* 1688 */ 'G', '_', 'S', 'S', 'U', 'B', 'O', 0,
    1675             :   /* 1696 */ 'G', '_', 'S', 'A', 'D', 'D', 'O', 0,
    1676             :   /* 1704 */ 'G', '_', 'S', 'M', 'U', 'L', 'O', 0,
    1677             :   /* 1712 */ 'G', '_', 'U', 'M', 'U', 'L', 'O', 0,
    1678             :   /* 1720 */ 'F', 'Z', 'E', 'R', 'O', 0,
    1679             :   /* 1726 */ 'S', 'T', 'A', 'C', 'K', 'M', 'A', 'P', 0,
    1680             :   /* 1735 */ 'G', '_', 'G', 'E', 'P', 0,
    1681             :   /* 1741 */ 'G', '_', 'S', 'I', 'T', 'O', 'F', 'P', 0,
    1682             :   /* 1750 */ 'G', '_', 'U', 'I', 'T', 'O', 'F', 'P', 0,
    1683             :   /* 1759 */ 'G', '_', 'F', 'C', 'M', 'P', 0,
    1684             :   /* 1766 */ 'G', '_', 'I', 'C', 'M', 'P', 0,
    1685             :   /* 1773 */ 'U', 'N', 'I', 'M', 'P', 0,
    1686             :   /* 1779 */ 'N', 'O', 'P', 0,
    1687             :   /* 1783 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'O', 'P', 0,
    1688             :   /* 1796 */ 'F', 'A', 'U', 'L', 'T', 'I', 'N', 'G', '_', 'O', 'P', 0,
    1689             :   /* 1808 */ 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 0,
    1690             :   /* 1823 */ 'G', '_', 'F', 'E', 'X', 'P', 0,
    1691             :   /* 1830 */ 'F', 'S', 'U', 'B', 'Q', 0,
    1692             :   /* 1836 */ 'F', 'A', 'D', 'D', 'Q', 0,
    1693             :   /* 1842 */ 'V', '9', 'F', 'C', 'M', 'P', 'E', 'Q', 0,
    1694             :   /* 1851 */ 'F', 'N', 'E', 'G', 'Q', 0,
    1695             :   /* 1857 */ 'F', 'D', 'M', 'U', 'L', 'Q', 0,
    1696             :   /* 1864 */ 'F', 'M', 'U', 'L', 'Q', 0,
    1697             :   /* 1870 */ 'F', 'D', 'T', 'O', 'Q', 0,
    1698             :   /* 1876 */ 'F', 'I', 'T', 'O', 'Q', 0,
    1699             :   /* 1882 */ 'F', 'S', 'T', 'O', 'Q', 0,
    1700             :   /* 1888 */ 'F', 'X', 'T', 'O', 'Q', 0,
    1701             :   /* 1894 */ 'V', '9', 'F', 'C', 'M', 'P', 'Q', 0,
    1702             :   /* 1902 */ 'F', 'A', 'B', 'S', 'Q', 0,
    1703             :   /* 1908 */ 'F', 'S', 'Q', 'R', 'T', 'Q', 0,
    1704             :   /* 1915 */ 'F', 'D', 'I', 'V', 'Q', 0,
    1705             :   /* 1921 */ 'F', 'M', 'O', 'V', 'Q', 0,
    1706             :   /* 1927 */ 'F', 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'Q', 0,
    1707             :   /* 1937 */ 'F', 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'Q', 0,
    1708             :   /* 1947 */ 'F', 'M', 'O', 'V', 'R', 'G', 'Z', 'Q', 0,
    1709             :   /* 1956 */ 'F', 'M', 'O', 'V', 'R', 'L', 'Z', 'Q', 0,
    1710             :   /* 1965 */ 'F', 'M', 'O', 'V', 'R', 'N', 'Z', 'Q', 0,
    1711             :   /* 1974 */ 'F', 'M', 'O', 'V', 'R', 'Z', 'Q', 0,
    1712             :   /* 1982 */ 'S', 'T', 'B', 'A', 'R', 0,
    1713             :   /* 1988 */ 'R', 'D', 'T', 'B', 'R', 0,
    1714             :   /* 1994 */ 'G', '_', 'B', 'R', 0,
    1715             :   /* 1999 */ 'A', 'L', 'I', 'G', 'N', 'A', 'D', 'D', 'R', 0,
    1716             :   /* 2009 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '_', 'E', 'N', 'T', 'E', 'R', 0,
    1717             :   /* 2034 */ 'G', '_', 'A', 'S', 'H', 'R', 0,
    1718             :   /* 2041 */ 'G', '_', 'L', 'S', 'H', 'R', 0,
    1719             :   /* 2048 */ 'F', 'O', 'R', 0,
    1720             :   /* 2052 */ 'F', 'N', 'O', 'R', 0,
    1721             :   /* 2057 */ 'F', 'X', 'N', 'O', 'R', 0,
    1722             :   /* 2063 */ 'G', '_', 'S', 'H', 'U', 'F', 'F', 'L', 'E', '_', 'V', 'E', 'C', 'T', 'O', 'R', 0,
    1723             :   /* 2080 */ 'F', 'X', 'O', 'R', 0,
    1724             :   /* 2085 */ 'G', '_', 'X', 'O', 'R', 0,
    1725             :   /* 2091 */ 'G', '_', 'O', 'R', 0,
    1726             :   /* 2096 */ 'R', 'D', 'P', 'R', 0,
    1727             :   /* 2101 */ 'R', 'D', 'A', 'S', 'R', 0,
    1728             :   /* 2107 */ 'R', 'D', 'P', 'S', 'R', 0,
    1729             :   /* 2113 */ 'G', '_', 'I', 'N', 'T', 'T', 'O', 'P', 'T', 'R', 0,
    1730             :   /* 2124 */ 'F', 'S', 'R', 'C', '1', 'S', 0,
    1731             :   /* 2131 */ 'F', 'A', 'N', 'D', 'N', 'O', 'T', '1', 'S', 0,
    1732             :   /* 2141 */ 'F', 'N', 'O', 'T', '1', 'S', 0,
    1733             :   /* 2148 */ 'F', 'O', 'R', 'N', 'O', 'T', '1', 'S', 0,
    1734             :   /* 2157 */ 'F', 'P', 'S', 'U', 'B', '3', '2', 'S', 0,
    1735             :   /* 2166 */ 'F', 'P', 'A', 'D', 'D', '3', '2', 'S', 0,
    1736             :   /* 2175 */ 'F', 'S', 'R', 'C', '2', 'S', 0,
    1737             :   /* 2182 */ 'F', 'A', 'N', 'D', 'N', 'O', 'T', '2', 'S', 0,
    1738             :   /* 2192 */ 'F', 'N', 'O', 'T', '2', 'S', 0,
    1739             :   /* 2199 */ 'F', 'O', 'R', 'N', 'O', 'T', '2', 'S', 0,
    1740             :   /* 2208 */ 'F', 'P', 'S', 'U', 'B', '1', '6', 'S', 0,
    1741             :   /* 2217 */ 'F', 'P', 'A', 'D', 'D', '1', '6', 'S', 0,
    1742             :   /* 2226 */ 'F', 'S', 'U', 'B', 'S', 0,
    1743             :   /* 2232 */ 'F', 'H', 'S', 'U', 'B', 'S', 0,
    1744             :   /* 2239 */ 'F', 'A', 'D', 'D', 'S', 0,
    1745             :   /* 2245 */ 'F', 'H', 'A', 'D', 'D', 'S', 0,
    1746             :   /* 2252 */ 'F', 'N', 'H', 'A', 'D', 'D', 'S', 0,
    1747             :   /* 2260 */ 'F', 'N', 'A', 'D', 'D', 'S', 0,
    1748             :   /* 2267 */ 'F', 'A', 'N', 'D', 'S', 0,
    1749             :   /* 2273 */ 'F', 'N', 'A', 'N', 'D', 'S', 0,
    1750             :   /* 2280 */ 'F', 'O', 'N', 'E', 'S', 0,
    1751             :   /* 2286 */ 'V', '9', 'F', 'C', 'M', 'P', 'E', 'S', 0,
    1752             :   /* 2295 */ 'G', '_', 'U', 'N', 'M', 'E', 'R', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', 'S', 0,
    1753             :   /* 2312 */ 'G', '_', 'M', 'E', 'R', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', 'S', 0,
    1754             :   /* 2327 */ 'F', 'N', 'E', 'G', 'S', 0,
    1755             :   /* 2333 */ 'F', 'M', 'U', 'L', 'S', 0,
    1756             :   /* 2339 */ 'F', 'N', 'M', 'U', 'L', 'S', 0,
    1757             :   /* 2346 */ 'F', 'Z', 'E', 'R', 'O', 'S', 0,
    1758             :   /* 2353 */ 'F', 'D', 'T', 'O', 'S', 0,
    1759             :   /* 2359 */ 'F', 'I', 'T', 'O', 'S', 0,
    1760             :   /* 2365 */ 'F', 'Q', 'T', 'O', 'S', 0,
    1761             :   /* 2371 */ 'M', 'O', 'V', 'W', 'T', 'O', 'S', 0,
    1762             :   /* 2379 */ 'F', 'X', 'T', 'O', 'S', 0,
    1763             :   /* 2385 */ 'V', '9', 'F', 'C', 'M', 'P', 'S', 0,
    1764             :   /* 2393 */ 'F', 'L', 'C', 'M', 'P', 'S', 0,
    1765             :   /* 2400 */ 'F', 'O', 'R', 'S', 0,
    1766             :   /* 2405 */ 'F', 'N', 'O', 'R', 'S', 0,
    1767             :   /* 2411 */ 'F', 'X', 'N', 'O', 'R', 'S', 0,
    1768             :   /* 2418 */ 'F', 'X', 'O', 'R', 'S', 0,
    1769             :   /* 2424 */ 'C', 'O', 'P', 'Y', '_', 'T', 'O', '_', 'R', 'E', 'G', 'C', 'L', 'A', 'S', 'S', 0,
    1770             :   /* 2441 */ 'F', 'A', 'B', 'S', 'S', 0,
    1771             :   /* 2447 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', '_', 'W', '_', 'S', 'I', 'D', 'E', '_', 'E', 'F', 'F', 'E', 'C', 'T', 'S', 0,
    1772             :   /* 2474 */ 'F', 'S', 'Q', 'R', 'T', 'S', 0,
    1773             :   /* 2481 */ 'F', 'D', 'I', 'V', 'S', 0,
    1774             :   /* 2487 */ 'F', 'M', 'O', 'V', 'S', 0,
    1775             :   /* 2493 */ 'F', 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'S', 0,
    1776             :   /* 2503 */ 'F', 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'S', 0,
    1777             :   /* 2513 */ 'F', 'M', 'O', 'V', 'R', 'G', 'Z', 'S', 0,
    1778             :   /* 2522 */ 'F', 'M', 'O', 'V', 'R', 'L', 'Z', 'S', 0,
    1779             :   /* 2531 */ 'F', 'M', 'O', 'V', 'R', 'N', 'Z', 'S', 0,
    1780             :   /* 2540 */ 'F', 'M', 'O', 'V', 'R', 'Z', 'S', 0,
    1781             :   /* 2548 */ 'G', '_', 'E', 'X', 'T', 'R', 'A', 'C', 'T', 0,
    1782             :   /* 2558 */ 'G', '_', 'S', 'E', 'L', 'E', 'C', 'T', 0,
    1783             :   /* 2567 */ 'G', '_', 'B', 'R', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', 0,
    1784             :   /* 2580 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'R', 'E', 'T', 0,
    1785             :   /* 2594 */ 'S', 'E', 'T', 0,
    1786             :   /* 2598 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '_', 'E', 'X', 'I', 'T', 0,
    1787             :   /* 2622 */ 'G', '_', 'E', 'X', 'T', 'R', 'A', 'C', 'T', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'L', 'T', 0,
    1788             :   /* 2643 */ 'G', '_', 'I', 'N', 'S', 'E', 'R', 'T', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'L', 'T', 0,
    1789             :   /* 2663 */ 'B', 'P', 'F', 'C', 'C', 'A', 'N', 'T', 0,
    1790             :   /* 2672 */ 'B', 'P', 'I', 'C', 'C', 'A', 'N', 'T', 0,
    1791             :   /* 2681 */ 'B', 'P', 'X', 'C', 'C', 'A', 'N', 'T', 0,
    1792             :   /* 2690 */ 'G', '_', 'F', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 0,
    1793             :   /* 2702 */ 'G', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 0,
    1794             :   /* 2713 */ 'B', 'P', 'F', 'C', 'C', 'N', 'T', 0,
    1795             :   /* 2721 */ 'B', 'P', 'I', 'C', 'C', 'N', 'T', 0,
    1796             :   /* 2729 */ 'B', 'P', 'X', 'C', 'C', 'N', 'T', 0,
    1797             :   /* 2737 */ 'L', 'Z', 'C', 'N', 'T', 0,
    1798             :   /* 2743 */ 'S', 'T', 'A', 'T', 'E', 'P', 'O', 'I', 'N', 'T', 0,
    1799             :   /* 2754 */ 'P', 'A', 'T', 'C', 'H', 'P', 'O', 'I', 'N', 'T', 0,
    1800             :   /* 2765 */ 'G', '_', 'P', 'T', 'R', 'T', 'O', 'I', 'N', 'T', 0,
    1801             :   /* 2776 */ 'G', '_', 'V', 'A', 'S', 'T', 'A', 'R', 'T', 0,
    1802             :   /* 2786 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0,
    1803             :   /* 2801 */ 'G', '_', 'I', 'N', 'S', 'E', 'R', 'T', 0,
    1804             :   /* 2810 */ 'G', '_', 'B', 'I', 'T', 'C', 'A', 'S', 'T', 0,
    1805             :   /* 2820 */ 'P', 'D', 'I', 'S', 'T', 0,
    1806             :   /* 2826 */ 'G', '_', 'F', 'P', 'E', 'X', 'T', 0,
    1807             :   /* 2834 */ 'G', '_', 'S', 'E', 'X', 'T', 0,
    1808             :   /* 2841 */ 'G', '_', 'A', 'N', 'Y', 'E', 'X', 'T', 0,
    1809             :   /* 2850 */ 'G', '_', 'Z', 'E', 'X', 'T', 0,
    1810             :   /* 2857 */ 'F', 'M', 'U', 'L', '8', 'X', '1', '6', 'A', 'U', 0,
    1811             :   /* 2868 */ 'G', '_', 'F', 'D', 'I', 'V', 0,
    1812             :   /* 2875 */ 'G', '_', 'S', 'D', 'I', 'V', 0,
    1813             :   /* 2882 */ 'G', '_', 'U', 'D', 'I', 'V', 0,
    1814             :   /* 2889 */ 'F', 'L', 'U', 'S', 'H', 'W', 0,
    1815             :   /* 2896 */ 'G', '_', 'F', 'P', 'O', 'W', 0,
    1816             :   /* 2903 */ 'M', 'O', 'V', 'S', 'T', 'O', 'S', 'W', 0,
    1817             :   /* 2912 */ 'M', 'O', 'V', 'S', 'T', 'O', 'U', 'W', 0,
    1818             :   /* 2921 */ 'G', 'E', 'T', 'P', 'C', 'X', 0,
    1819             :   /* 2928 */ 'G', '_', 'F', 'R', 'A', 'M', 'E', '_', 'I', 'N', 'D', 'E', 'X', 0,
    1820             :   /* 2942 */ 'F', 'P', 'A', 'C', 'K', 'F', 'I', 'X', 0,
    1821             :   /* 2951 */ 'X', 'M', 'U', 'L', 'X', 0,
    1822             :   /* 2957 */ 'F', 'D', 'T', 'O', 'X', 0,
    1823             :   /* 2963 */ 'M', 'O', 'V', 'D', 'T', 'O', 'X', 0,
    1824             :   /* 2971 */ 'F', 'Q', 'T', 'O', 'X', 0,
    1825             :   /* 2977 */ 'F', 'S', 'T', 'O', 'X', 0,
    1826             :   /* 2983 */ 'C', 'O', 'P', 'Y', 0,
    1827             :   /* 2988 */ 'S', 'E', 'T', 'H', 'I', 'i', 0,
    1828             :   /* 2995 */ 'M', 'E', 'M', 'B', 'A', 'R', 'i', 0,
    1829             :   /* 3003 */ 'S', 'E', 'T', 'H', 'I', 'X', 'i', 0,
    1830             :   /* 3011 */ 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'L', 'O', 'N', 'G', 'J', 'M', 'P', '3', '2', 'r', 'i', 0,
    1831             :   /* 3031 */ 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'S', 'E', 'T', 'J', 'M', 'P', '3', '2', 'r', 'i', 0,
    1832             :   /* 3050 */ 'S', 'R', 'A', 'r', 'i', 0,
    1833             :   /* 3056 */ 'L', 'D', 'S', 'B', 'r', 'i', 0,
    1834             :   /* 3063 */ 'S', 'T', 'B', 'r', 'i', 0,
    1835             :   /* 3069 */ 'L', 'D', 'U', 'B', 'r', 'i', 0,
    1836             :   /* 3076 */ 'S', 'U', 'B', 'r', 'i', 0,
    1837             :   /* 3082 */ 'L', 'D', 'S', 'T', 'U', 'B', 'r', 'i', 0,
    1838             :   /* 3091 */ 'S', 'M', 'A', 'C', 'r', 'i', 0,
    1839             :   /* 3098 */ 'U', 'M', 'A', 'C', 'r', 'i', 0,
    1840             :   /* 3105 */ 'S', 'U', 'B', 'C', 'r', 'i', 0,
    1841             :   /* 3112 */ 'T', 'S', 'U', 'B', 'C', 'C', 'r', 'i', 0,
    1842             :   /* 3121 */ 'T', 'A', 'D', 'D', 'C', 'C', 'r', 'i', 0,
    1843             :   /* 3130 */ 'A', 'N', 'D', 'C', 'C', 'r', 'i', 0,
    1844             :   /* 3138 */ 'V', '9', 'M', 'O', 'V', 'F', 'C', 'C', 'r', 'i', 0,
    1845             :   /* 3149 */ 'T', 'I', 'C', 'C', 'r', 'i', 0,
    1846             :   /* 3156 */ 'M', 'O', 'V', 'I', 'C', 'C', 'r', 'i', 0,
    1847             :   /* 3165 */ 'S', 'M', 'U', 'L', 'C', 'C', 'r', 'i', 0,
    1848             :   /* 3174 */ 'U', 'M', 'U', 'L', 'C', 'C', 'r', 'i', 0,
    1849             :   /* 3183 */ 'A', 'N', 'D', 'N', 'C', 'C', 'r', 'i', 0,
    1850             :   /* 3192 */ 'O', 'R', 'N', 'C', 'C', 'r', 'i', 0,
    1851             :   /* 3200 */ 'X', 'N', 'O', 'R', 'C', 'C', 'r', 'i', 0,
    1852             :   /* 3209 */ 'X', 'O', 'R', 'C', 'C', 'r', 'i', 0,
    1853             :   /* 3217 */ 'M', 'U', 'L', 'S', 'C', 'C', 'r', 'i', 0,
    1854             :   /* 3226 */ 'S', 'D', 'I', 'V', 'C', 'C', 'r', 'i', 0,
    1855             :   /* 3235 */ 'U', 'D', 'I', 'V', 'C', 'C', 'r', 'i', 0,
    1856             :   /* 3244 */ 'T', 'X', 'C', 'C', 'r', 'i', 0,
    1857             :   /* 3251 */ 'M', 'O', 'V', 'X', 'C', 'C', 'r', 'i', 0,
    1858             :   /* 3260 */ 'A', 'D', 'D', 'C', 'r', 'i', 0,
    1859             :   /* 3267 */ 'L', 'D', 'D', 'C', 'r', 'i', 0,
    1860             :   /* 3274 */ 'L', 'D', 'C', 'r', 'i', 0,
    1861             :   /* 3280 */ 'S', 'T', 'D', 'C', 'r', 'i', 0,
    1862             :   /* 3287 */ 'S', 'T', 'C', 'r', 'i', 0,
    1863             :   /* 3293 */ 'L', 'E', 'A', '_', 'A', 'D', 'D', 'r', 'i', 0,
    1864             :   /* 3303 */ 'L', 'E', 'A', 'X', '_', 'A', 'D', 'D', 'r', 'i', 0,
    1865             :   /* 3314 */ 'L', 'D', 'D', 'r', 'i', 0,
    1866             :   /* 3320 */ 'L', 'D', 'r', 'i', 0,
    1867             :   /* 3325 */ 'A', 'N', 'D', 'r', 'i', 0,
    1868             :   /* 3331 */ 'B', 'I', 'N', 'D', 'r', 'i', 0,
    1869             :   /* 3338 */ 'S', 'T', 'D', 'r', 'i', 0,
    1870             :   /* 3344 */ 'S', 'U', 'B', 'E', 'r', 'i', 0,
    1871             :   /* 3351 */ 'A', 'D', 'D', 'E', 'r', 'i', 0,
    1872             :   /* 3358 */ 'R', 'E', 'S', 'T', 'O', 'R', 'E', 'r', 'i', 0,
    1873             :   /* 3368 */ 'S', 'A', 'V', 'E', 'r', 'i', 0,
    1874             :   /* 3375 */ 'L', 'D', 'D', 'F', 'r', 'i', 0,
    1875             :   /* 3382 */ 'L', 'D', 'F', 'r', 'i', 0,
    1876             :   /* 3388 */ 'S', 'T', 'D', 'F', 'r', 'i', 0,
    1877             :   /* 3395 */ 'L', 'D', 'Q', 'F', 'r', 'i', 0,
    1878             :   /* 3402 */ 'S', 'T', 'Q', 'F', 'r', 'i', 0,
    1879             :   /* 3409 */ 'S', 'T', 'F', 'r', 'i', 0,
    1880             :   /* 3415 */ 'L', 'D', 'S', 'H', 'r', 'i', 0,
    1881             :   /* 3422 */ 'F', 'L', 'U', 'S', 'H', 'r', 'i', 0,
    1882             :   /* 3430 */ 'S', 'T', 'H', 'r', 'i', 0,
    1883             :   /* 3436 */ 'L', 'D', 'U', 'H', 'r', 'i', 0,
    1884             :   /* 3443 */ 'C', 'A', 'L', 'L', 'r', 'i', 0,
    1885             :   /* 3450 */ 'S', 'L', 'L', 'r', 'i', 0,
    1886             :   /* 3456 */ 'J', 'M', 'P', 'L', 'r', 'i', 0,
    1887             :   /* 3463 */ 'S', 'R', 'L', 'r', 'i', 0,
    1888             :   /* 3469 */ 'S', 'M', 'U', 'L', 'r', 'i', 0,
    1889             :   /* 3476 */ 'U', 'M', 'U', 'L', 'r', 'i', 0,
    1890             :   /* 3483 */ 'W', 'R', 'W', 'I', 'M', 'r', 'i', 0,
    1891             :   /* 3491 */ 'A', 'N', 'D', 'N', 'r', 'i', 0,
    1892             :   /* 3498 */ 'O', 'R', 'N', 'r', 'i', 0,
    1893             :   /* 3504 */ 'T', 'R', 'A', 'P', 'r', 'i', 0,
    1894             :   /* 3511 */ 'S', 'W', 'A', 'P', 'r', 'i', 0,
    1895             :   /* 3518 */ 'C', 'M', 'P', 'r', 'i', 0,
    1896             :   /* 3524 */ 'S', 'T', 'D', 'C', 'Q', 'r', 'i', 0,
    1897             :   /* 3532 */ 'S', 'T', 'D', 'F', 'Q', 'r', 'i', 0,
    1898             :   /* 3540 */ 'W', 'R', 'T', 'B', 'R', 'r', 'i', 0,
    1899             :   /* 3548 */ 'X', 'N', 'O', 'R', 'r', 'i', 0,
    1900             :   /* 3555 */ 'X', 'O', 'R', 'r', 'i', 0,
    1901             :   /* 3561 */ 'W', 'R', 'P', 'R', 'r', 'i', 0,
    1902             :   /* 3568 */ 'W', 'R', 'A', 'S', 'R', 'r', 'i', 0,
    1903             :   /* 3576 */ 'L', 'D', 'C', 'S', 'R', 'r', 'i', 0,
    1904             :   /* 3584 */ 'S', 'T', 'C', 'S', 'R', 'r', 'i', 0,
    1905             :   /* 3592 */ 'L', 'D', 'F', 'S', 'R', 'r', 'i', 0,
    1906             :   /* 3600 */ 'S', 'T', 'F', 'S', 'R', 'r', 'i', 0,
    1907             :   /* 3608 */ 'L', 'D', 'X', 'F', 'S', 'R', 'r', 'i', 0,
    1908             :   /* 3617 */ 'S', 'T', 'X', 'F', 'S', 'R', 'r', 'i', 0,
    1909             :   /* 3626 */ 'W', 'R', 'P', 'S', 'R', 'r', 'i', 0,
    1910             :   /* 3634 */ 'S', 'T', 'r', 'i', 0,
    1911             :   /* 3639 */ 'R', 'E', 'T', 'T', 'r', 'i', 0,
    1912             :   /* 3646 */ 'S', 'D', 'I', 'V', 'r', 'i', 0,
    1913             :   /* 3653 */ 'U', 'D', 'I', 'V', 'r', 'i', 0,
    1914             :   /* 3660 */ 'T', 'S', 'U', 'B', 'C', 'C', 'T', 'V', 'r', 'i', 0,
    1915             :   /* 3671 */ 'T', 'A', 'D', 'D', 'C', 'C', 'T', 'V', 'r', 'i', 0,
    1916             :   /* 3682 */ 'L', 'D', 'S', 'W', 'r', 'i', 0,
    1917             :   /* 3689 */ 'S', 'R', 'A', 'X', 'r', 'i', 0,
    1918             :   /* 3696 */ 'S', 'U', 'B', 'X', 'r', 'i', 0,
    1919             :   /* 3703 */ 'A', 'D', 'D', 'X', 'r', 'i', 0,
    1920             :   /* 3710 */ 'L', 'D', 'X', 'r', 'i', 0,
    1921             :   /* 3716 */ 'A', 'N', 'D', 'X', 'r', 'i', 0,
    1922             :   /* 3723 */ 'S', 'L', 'L', 'X', 'r', 'i', 0,
    1923             :   /* 3730 */ 'S', 'R', 'L', 'X', 'r', 'i', 0,
    1924             :   /* 3737 */ 'M', 'U', 'L', 'X', 'r', 'i', 0,
    1925             :   /* 3744 */ 'X', 'O', 'R', 'X', 'r', 'i', 0,
    1926             :   /* 3751 */ 'S', 'T', 'X', 'r', 'i', 0,
    1927             :   /* 3757 */ 'S', 'D', 'I', 'V', 'X', 'r', 'i', 0,
    1928             :   /* 3765 */ 'U', 'D', 'I', 'V', 'X', 'r', 'i', 0,
    1929             :   /* 3773 */ 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'r', 'i', 0,
    1930             :   /* 3783 */ 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'r', 'i', 0,
    1931             :   /* 3793 */ 'M', 'O', 'V', 'R', 'G', 'Z', 'r', 'i', 0,
    1932             :   /* 3802 */ 'M', 'O', 'V', 'R', 'L', 'Z', 'r', 'i', 0,
    1933             :   /* 3811 */ 'M', 'O', 'V', 'R', 'N', 'Z', 'r', 'i', 0,
    1934             :   /* 3820 */ 'M', 'O', 'V', 'R', 'R', 'Z', 'r', 'i', 0,
    1935             :   /* 3829 */ 'B', 'P', 'G', 'E', 'Z', 'a', 'p', 'n', 0,
    1936             :   /* 3838 */ 'B', 'P', 'L', 'E', 'Z', 'a', 'p', 'n', 0,
    1937             :   /* 3847 */ 'B', 'P', 'G', 'Z', 'a', 'p', 'n', 0,
    1938             :   /* 3855 */ 'B', 'P', 'L', 'Z', 'a', 'p', 'n', 0,
    1939             :   /* 3863 */ 'B', 'P', 'N', 'Z', 'a', 'p', 'n', 0,
    1940             :   /* 3871 */ 'B', 'P', 'Z', 'a', 'p', 'n', 0,
    1941             :   /* 3878 */ 'B', 'P', 'G', 'E', 'Z', 'n', 'a', 'p', 'n', 0,
    1942             :   /* 3888 */ 'B', 'P', 'L', 'E', 'Z', 'n', 'a', 'p', 'n', 0,
    1943             :   /* 3898 */ 'B', 'P', 'G', 'Z', 'n', 'a', 'p', 'n', 0,
    1944             :   /* 3907 */ 'B', 'P', 'L', 'Z', 'n', 'a', 'p', 'n', 0,
    1945             :   /* 3916 */ 'B', 'P', 'N', 'Z', 'n', 'a', 'p', 'n', 0,
    1946             :   /* 3925 */ 'B', 'P', 'Z', 'n', 'a', 'p', 'n', 0,
    1947             :   /* 3933 */ 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'L', 'O', 'N', 'G', 'J', 'M', 'P', '3', '2', 'r', 'r', 0,
    1948             :   /* 3953 */ 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'S', 'E', 'T', 'J', 'M', 'P', '3', '2', 'r', 'r', 0,
    1949             :   /* 3972 */ 'L', 'D', 'S', 'B', 'A', 'r', 'r', 0,
    1950             :   /* 3980 */ 'S', 'T', 'B', 'A', 'r', 'r', 0,
    1951             :   /* 3987 */ 'L', 'D', 'U', 'B', 'A', 'r', 'r', 0,
    1952             :   /* 3995 */ 'L', 'D', 'S', 'T', 'U', 'B', 'A', 'r', 'r', 0,
    1953             :   /* 4005 */ 'L', 'D', 'D', 'A', 'r', 'r', 0,
    1954             :   /* 4012 */ 'L', 'D', 'A', 'r', 'r', 0,
    1955             :   /* 4018 */ 'S', 'T', 'D', 'A', 'r', 'r', 0,
    1956             :   /* 4025 */ 'L', 'D', 'D', 'F', 'A', 'r', 'r', 0,
    1957             :   /* 4033 */ 'L', 'D', 'F', 'A', 'r', 'r', 0,
    1958             :   /* 4040 */ 'S', 'T', 'D', 'F', 'A', 'r', 'r', 0,
    1959             :   /* 4048 */ 'L', 'D', 'Q', 'F', 'A', 'r', 'r', 0,
    1960             :   /* 4056 */ 'S', 'T', 'Q', 'F', 'A', 'r', 'r', 0,
    1961             :   /* 4064 */ 'S', 'T', 'F', 'A', 'r', 'r', 0,
    1962             :   /* 4071 */ 'L', 'D', 'S', 'H', 'A', 'r', 'r', 0,
    1963             :   /* 4079 */ 'S', 'T', 'H', 'A', 'r', 'r', 0,
    1964             :   /* 4086 */ 'L', 'D', 'U', 'H', 'A', 'r', 'r', 0,
    1965             :   /* 4094 */ 'S', 'W', 'A', 'P', 'A', 'r', 'r', 0,
    1966             :   /* 4102 */ 'S', 'R', 'A', 'r', 'r', 0,
    1967             :   /* 4108 */ 'C', 'A', 'S', 'A', 'r', 'r', 0,
    1968             :   /* 4115 */ 'S', 'T', 'A', 'r', 'r', 0,
    1969             :   /* 4121 */ 'L', 'D', 'S', 'B', 'r', 'r', 0,
    1970             :   /* 4128 */ 'S', 'T', 'B', 'r', 'r', 0,
    1971             :   /* 4134 */ 'L', 'D', 'U', 'B', 'r', 'r', 0,
    1972             :   /* 4141 */ 'S', 'U', 'B', 'r', 'r', 0,
    1973             :   /* 4147 */ 'L', 'D', 'S', 'T', 'U', 'B', 'r', 'r', 0,
    1974             :   /* 4156 */ 'S', 'M', 'A', 'C', 'r', 'r', 0,
    1975             :   /* 4163 */ 'U', 'M', 'A', 'C', 'r', 'r', 0,
    1976             :   /* 4170 */ 'S', 'U', 'B', 'C', 'r', 'r', 0,
    1977             :   /* 4177 */ 'T', 'S', 'U', 'B', 'C', 'C', 'r', 'r', 0,
    1978             :   /* 4186 */ 'T', 'A', 'D', 'D', 'C', 'C', 'r', 'r', 0,
    1979             :   /* 4195 */ 'A', 'N', 'D', 'C', 'C', 'r', 'r', 0,
    1980             :   /* 4203 */ 'V', '9', 'M', 'O', 'V', 'F', 'C', 'C', 'r', 'r', 0,
    1981             :   /* 4214 */ 'T', 'I', 'C', 'C', 'r', 'r', 0,
    1982             :   /* 4221 */ 'M', 'O', 'V', 'I', 'C', 'C', 'r', 'r', 0,
    1983             :   /* 4230 */ 'S', 'M', 'U', 'L', 'C', 'C', 'r', 'r', 0,
    1984             :   /* 4239 */ 'U', 'M', 'U', 'L', 'C', 'C', 'r', 'r', 0,
    1985             :   /* 4248 */ 'A', 'N', 'D', 'N', 'C', 'C', 'r', 'r', 0,
    1986             :   /* 4257 */ 'O', 'R', 'N', 'C', 'C', 'r', 'r', 0,
    1987             :   /* 4265 */ 'X', 'N', 'O', 'R', 'C', 'C', 'r', 'r', 0,
    1988             :   /* 4274 */ 'X', 'O', 'R', 'C', 'C', 'r', 'r', 0,
    1989             :   /* 4282 */ 'M', 'U', 'L', 'S', 'C', 'C', 'r', 'r', 0,
    1990             :   /* 4291 */ 'S', 'D', 'I', 'V', 'C', 'C', 'r', 'r', 0,
    1991             :   /* 4300 */ 'U', 'D', 'I', 'V', 'C', 'C', 'r', 'r', 0,
    1992             :   /* 4309 */ 'T', 'X', 'C', 'C', 'r', 'r', 0,
    1993             :   /* 4316 */ 'M', 'O', 'V', 'X', 'C', 'C', 'r', 'r', 0,
    1994             :   /* 4325 */ 'A', 'D', 'D', 'C', 'r', 'r', 0,
    1995             :   /* 4332 */ 'L', 'D', 'D', 'C', 'r', 'r', 0,
    1996             :   /* 4339 */ 'L', 'D', 'C', 'r', 'r', 0,
    1997             :   /* 4345 */ 'S', 'T', 'D', 'C', 'r', 'r', 0,
    1998             :   /* 4352 */ 'P', 'O', 'P', 'C', 'r', 'r', 0,
    1999             :   /* 4359 */ 'S', 'T', 'C', 'r', 'r', 0,
    2000             :   /* 4365 */ 'T', 'L', 'S', '_', 'A', 'D', 'D', 'r', 'r', 0,
    2001             :   /* 4375 */ 'L', 'D', 'D', 'r', 'r', 0,
    2002             :   /* 4381 */ 'T', 'L', 'S', '_', 'L', 'D', 'r', 'r', 0,
    2003             :   /* 4390 */ 'A', 'N', 'D', 'r', 'r', 0,
    2004             :   /* 4396 */ 'B', 'I', 'N', 'D', 'r', 'r', 0,
    2005             :   /* 4403 */ 'S', 'T', 'D', 'r', 'r', 0,
    2006             :   /* 4409 */ 'S', 'U', 'B', 'E', 'r', 'r', 0,
    2007             :   /* 4416 */ 'A', 'D', 'D', 'E', 'r', 'r', 0,
    2008             :   /* 4423 */ 'R', 'E', 'S', 'T', 'O', 'R', 'E', 'r', 'r', 0,
    2009             :   /* 4433 */ 'S', 'A', 'V', 'E', 'r', 'r', 0,
    2010             :   /* 4440 */ 'L', 'D', 'D', 'F', 'r', 'r', 0,
    2011             :   /* 4447 */ 'L', 'D', 'F', 'r', 'r', 0,
    2012             :   /* 4453 */ 'S', 'T', 'D', 'F', 'r', 'r', 0,
    2013             :   /* 4460 */ 'L', 'D', 'Q', 'F', 'r', 'r', 0,
    2014             :   /* 4467 */ 'S', 'T', 'Q', 'F', 'r', 'r', 0,
    2015             :   /* 4474 */ 'S', 'T', 'F', 'r', 'r', 0,
    2016             :   /* 4480 */ 'L', 'D', 'S', 'H', 'r', 'r', 0,
    2017             :   /* 4487 */ 'F', 'L', 'U', 'S', 'H', 'r', 'r', 0,
    2018             :   /* 4495 */ 'S', 'T', 'H', 'r', 'r', 0,
    2019             :   /* 4501 */ 'L', 'D', 'U', 'H', 'r', 'r', 0,
    2020             :   /* 4508 */ 'C', 'A', 'L', 'L', 'r', 'r', 0,
    2021             :   /* 4515 */ 'S', 'L', 'L', 'r', 'r', 0,
    2022             :   /* 4521 */ 'J', 'M', 'P', 'L', 'r', 'r', 0,
    2023             :   /* 4528 */ 'S', 'R', 'L', 'r', 'r', 0,
    2024             :   /* 4534 */ 'S', 'M', 'U', 'L', 'r', 'r', 0,
    2025             :   /* 4541 */ 'U', 'M', 'U', 'L', 'r', 'r', 0,
    2026             :   /* 4548 */ 'W', 'R', 'W', 'I', 'M', 'r', 'r', 0,
    2027             :   /* 4556 */ 'A', 'N', 'D', 'N', 'r', 'r', 0,
    2028             :   /* 4563 */ 'O', 'R', 'N', 'r', 'r', 0,
    2029             :   /* 4569 */ 'A', 'N', 'D', 'X', 'N', 'r', 'r', 0,
    2030             :   /* 4577 */ 'O', 'R', 'X', 'N', 'r', 'r', 0,
    2031             :   /* 4584 */ 'T', 'R', 'A', 'P', 'r', 'r', 0,
    2032             :   /* 4591 */ 'S', 'W', 'A', 'P', 'r', 'r', 0,
    2033             :   /* 4598 */ 'C', 'M', 'P', 'r', 'r', 0,
    2034             :   /* 4604 */ 'S', 'T', 'D', 'C', 'Q', 'r', 'r', 0,
    2035             :   /* 4612 */ 'S', 'T', 'D', 'F', 'Q', 'r', 'r', 0,
    2036             :   /* 4620 */ 'W', 'R', 'T', 'B', 'R', 'r', 'r', 0,
    2037             :   /* 4628 */ 'X', 'N', 'O', 'R', 'r', 'r', 0,
    2038             :   /* 4635 */ 'X', 'O', 'R', 'r', 'r', 0,
    2039             :   /* 4641 */ 'W', 'R', 'P', 'R', 'r', 'r', 0,
    2040             :   /* 4648 */ 'W', 'R', 'A', 'S', 'R', 'r', 'r', 0,
    2041             :   /* 4656 */ 'L', 'D', 'C', 'S', 'R', 'r', 'r', 0,
    2042             :   /* 4664 */ 'S', 'T', 'C', 'S', 'R', 'r', 'r', 0,
    2043             :   /* 4672 */ 'L', 'D', 'F', 'S', 'R', 'r', 'r', 0,
    2044             :   /* 4680 */ 'S', 'T', 'F', 'S', 'R', 'r', 'r', 0,
    2045             :   /* 4688 */ 'L', 'D', 'X', 'F', 'S', 'R', 'r', 'r', 0,
    2046             :   /* 4697 */ 'S', 'T', 'X', 'F', 'S', 'R', 'r', 'r', 0,
    2047             :   /* 4706 */ 'W', 'R', 'P', 'S', 'R', 'r', 'r', 0,
    2048             :   /* 4714 */ 'C', 'A', 'S', 'r', 'r', 0,
    2049             :   /* 4720 */ 'S', 'T', 'r', 'r', 0,
    2050             :   /* 4725 */ 'R', 'E', 'T', 'T', 'r', 'r', 0,
    2051             :   /* 4732 */ 'S', 'D', 'I', 'V', 'r', 'r', 0,
    2052             :   /* 4739 */ 'U', 'D', 'I', 'V', 'r', 'r', 0,
    2053             :   /* 4746 */ 'T', 'S', 'U', 'B', 'C', 'C', 'T', 'V', 'r', 'r', 0,
    2054             :   /* 4757 */ 'T', 'A', 'D', 'D', 'C', 'C', 'T', 'V', 'r', 'r', 0,
    2055             :   /* 4768 */ 'L', 'D', 'S', 'W', 'r', 'r', 0,
    2056             :   /* 4775 */ 'S', 'R', 'A', 'X', 'r', 'r', 0,
    2057             :   /* 4782 */ 'S', 'U', 'B', 'X', 'r', 'r', 0,
    2058             :   /* 4789 */ 'T', 'L', 'S', '_', 'A', 'D', 'D', 'X', 'r', 'r', 0,
    2059             :   /* 4800 */ 'T', 'L', 'S', '_', 'L', 'D', 'X', 'r', 'r', 0,
    2060             :   /* 4810 */ 'A', 'N', 'D', 'X', 'r', 'r', 0,
    2061             :   /* 4817 */ 'S', 'L', 'L', 'X', 'r', 'r', 0,
    2062             :   /* 4824 */ 'S', 'R', 'L', 'X', 'r', 'r', 0,
    2063             :   /* 4831 */ 'M', 'U', 'L', 'X', 'r', 'r', 0,
    2064             :   /* 4838 */ 'X', 'N', 'O', 'R', 'X', 'r', 'r', 0,
    2065             :   /* 4846 */ 'X', 'O', 'R', 'X', 'r', 'r', 0,
    2066             :   /* 4853 */ 'C', 'A', 'S', 'X', 'r', 'r', 0,
    2067             :   /* 4860 */ 'S', 'T', 'X', 'r', 'r', 0,
    2068             :   /* 4866 */ 'S', 'D', 'I', 'V', 'X', 'r', 'r', 0,
    2069             :   /* 4874 */ 'U', 'D', 'I', 'V', 'X', 'r', 'r', 0,
    2070             :   /* 4882 */ 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'r', 'r', 0,
    2071             :   /* 4892 */ 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'r', 'r', 0,
    2072             :   /* 4902 */ 'M', 'O', 'V', 'R', 'G', 'Z', 'r', 'r', 0,
    2073             :   /* 4911 */ 'M', 'O', 'V', 'R', 'L', 'Z', 'r', 'r', 0,
    2074             :   /* 4920 */ 'M', 'O', 'V', 'R', 'N', 'Z', 'r', 'r', 0,
    2075             :   /* 4929 */ 'M', 'O', 'V', 'R', 'R', 'Z', 'r', 'r', 0,
    2076             :   /* 4938 */ 'B', 'P', 'G', 'E', 'Z', 'a', 'p', 't', 0,
    2077             :   /* 4947 */ 'B', 'P', 'L', 'E', 'Z', 'a', 'p', 't', 0,
    2078             :   /* 4956 */ 'B', 'P', 'G', 'Z', 'a', 'p', 't', 0,
    2079             :   /* 4964 */ 'B', 'P', 'L', 'Z', 'a', 'p', 't', 0,
    2080             :   /* 4972 */ 'B', 'P', 'N', 'Z', 'a', 'p', 't', 0,
    2081             :   /* 4980 */ 'B', 'P', 'Z', 'a', 'p', 't', 0,
    2082             :   /* 4987 */ 'B', 'P', 'G', 'E', 'Z', 'n', 'a', 'p', 't', 0,
    2083             :   /* 4997 */ 'B', 'P', 'L', 'E', 'Z', 'n', 'a', 'p', 't', 0,
    2084             :   /* 5007 */ 'B', 'P', 'G', 'Z', 'n', 'a', 'p', 't', 0,
    2085             :   /* 5016 */ 'B', 'P', 'L', 'Z', 'n', 'a', 'p', 't', 0,
    2086             :   /* 5025 */ 'B', 'P', 'N', 'Z', 'n', 'a', 'p', 't', 0,
    2087             :   /* 5034 */ 'B', 'P', 'Z', 'n', 'a', 'p', 't', 0,
    2088             : };
    2089             : 
    2090             : extern const unsigned SparcInstrNameIndices[] = {
    2091             :     1304U, 1580U, 1639U, 1420U, 1411U, 1429U, 1514U, 1222U, 
    2092             :     1237U, 1202U, 1251U, 2424U, 1175U, 1104U, 2983U, 1133U, 
    2093             :     2786U, 916U, 1726U, 1502U, 2754U, 999U, 2743U, 1154U, 
    2094             :     1796U, 1783U, 2009U, 2580U, 2598U, 1452U, 1481U, 814U, 
    2095             :     481U, 1542U, 2875U, 2882U, 1560U, 1567U, 910U, 2091U, 
    2096             :     2085U, 1200U, 1302U, 2928U, 1185U, 2548U, 2295U, 2801U, 
    2097             :     2312U, 2765U, 2113U, 2810U, 787U, 1167U, 943U, 2567U, 
    2098             :     751U, 2447U, 2841U, 773U, 2702U, 2690U, 2776U, 1272U, 
    2099             :     2834U, 2850U, 1446U, 2041U, 2034U, 1766U, 1759U, 2558U, 
    2100             :     1117U, 1096U, 1696U, 1688U, 1712U, 1704U, 1288U, 1280U, 
    2101             :     807U, 474U, 1535U, 456U, 2868U, 1553U, 2896U, 1823U, 
    2102             :     165U, 1265U, 157U, 1215U, 2826U, 763U, 1342U, 1351U, 
    2103             :     1741U, 1750U, 1735U, 1366U, 1994U, 2643U, 2622U, 2063U, 
    2104             :     3122U, 4187U, 3260U, 4325U, 3351U, 4416U, 781U, 487U, 
    2105             :     3703U, 4793U, 3297U, 4369U, 1662U, 1808U, 1999U, 1519U, 
    2106             :     3130U, 4195U, 3183U, 4248U, 3491U, 4556U, 4569U, 3716U, 
    2107             :     4810U, 3325U, 4390U, 388U, 143U, 409U, 416U, 930U, 
    2108             :     441U, 3331U, 4396U, 1360U, 495U, 419U, 2663U, 2713U, 
    2109             :     3829U, 4938U, 3878U, 4987U, 3847U, 4956U, 3898U, 5007U, 
    2110             :     608U, 426U, 2672U, 2721U, 3838U, 4947U, 3888U, 4997U, 
    2111             :     3855U, 4964U, 3907U, 5016U, 3863U, 4972U, 3916U, 5025U, 
    2112             :     715U, 433U, 2681U, 2729U, 3871U, 4980U, 3925U, 5034U, 
    2113             :     1140U, 1467U, 3443U, 4508U, 0U, 4108U, 4853U, 4714U, 
    2114             :     929U, 440U, 268U, 95U, 402U, 3518U, 4598U, 235U, 
    2115             :     1385U, 1622U, 1598U, 62U, 1377U, 1613U, 1590U, 396U, 
    2116             :     1393U, 1631U, 1606U, 3011U, 3933U, 3031U, 3953U, 1016U, 
    2117             :     1902U, 2441U, 820U, 1836U, 2239U, 462U, 891U, 16U, 
    2118             :     2131U, 173U, 2182U, 2267U, 936U, 448U, 290U, 986U, 
    2119             :     307U, 117U, 324U, 134U, 242U, 69U, 251U, 78U, 
    2120             :     1896U, 2387U, 1029U, 1915U, 2481U, 1857U, 1324U, 1870U, 
    2121             :     2353U, 2957U, 902U, 826U, 2245U, 800U, 2232U, 952U, 
    2122             :     1876U, 2359U, 992U, 2393U, 1296U, 2889U, 3422U, 4487U, 
    2123             :     299U, 1035U, 503U, 614U, 721U, 1921U, 568U, 677U, 
    2124             :     731U, 1041U, 1927U, 2493U, 1061U, 1947U, 2513U, 1051U, 
    2125             :     1937U, 2503U, 1070U, 1956U, 2522U, 1079U, 1965U, 2531U, 
    2126             :     1088U, 1974U, 2540U, 2487U, 580U, 687U, 741U, 377U, 
    2127             :     354U, 333U, 1400U, 2857U, 863U, 365U, 342U, 1864U, 
    2128             :     2333U, 841U, 2260U, 896U, 2273U, 857U, 1851U, 2327U, 
    2129             :     833U, 2252U, 869U, 2339U, 2052U, 2405U, 25U, 2141U, 
    2130             :     182U, 2192U, 883U, 1149U, 2280U, 2048U, 31U, 2148U, 
    2131             :     188U, 2199U, 2400U, 260U, 87U, 2942U, 227U, 2217U, 
    2132             :     54U, 2166U, 200U, 1125U, 219U, 2208U, 46U, 2157U, 
    2133             :     958U, 1330U, 2365U, 2971U, 316U, 126U, 276U, 103U, 
    2134             :     876U, 1022U, 1908U, 2474U, 212U, 39U, 10U, 2124U, 
    2135             :     151U, 2175U, 283U, 110U, 964U, 1336U, 1882U, 2977U, 
    2136             :     794U, 1830U, 2226U, 2057U, 2411U, 2080U, 2418U, 970U, 
    2137             :     1888U, 2379U, 1720U, 2346U, 2921U, 3456U, 4521U, 4012U, 
    2138             :     3576U, 4656U, 3274U, 4339U, 4005U, 3267U, 4332U, 4025U, 
    2139             :     3375U, 4440U, 3314U, 4375U, 4033U, 3592U, 4672U, 3382U, 
    2140             :     4447U, 4048U, 3395U, 4460U, 3972U, 3056U, 4121U, 4071U, 
    2141             :     3415U, 4480U, 3995U, 3082U, 4147U, 3682U, 4768U, 3987U, 
    2142             :     3069U, 4134U, 4086U, 3436U, 4501U, 3608U, 4688U, 3710U, 
    2143             :     4804U, 3320U, 4385U, 3303U, 3293U, 2737U, 2995U, 2963U, 
    2144             :     3140U, 4205U, 3156U, 4221U, 3773U, 4882U, 3793U, 4902U, 
    2145             :     3783U, 4892U, 3802U, 4911U, 3811U, 4920U, 3820U, 4929U, 
    2146             :     2903U, 2912U, 2371U, 3251U, 4316U, 976U, 3217U, 4282U, 
    2147             :     3737U, 4831U, 1779U, 3202U, 4267U, 3192U, 4257U, 3498U, 
    2148             :     4563U, 4577U, 3745U, 4840U, 3550U, 4630U, 2820U, 1655U, 
    2149             :     4352U, 2101U, 2096U, 2107U, 1988U, 1574U, 3358U, 4423U, 
    2150             :     2590U, 1530U, 3639U, 4725U, 3368U, 4433U, 3226U, 4291U, 
    2151             :     3757U, 4866U, 3646U, 4732U, 513U, 624U, 549U, 660U, 
    2152             :     590U, 697U, 531U, 642U, 2594U, 3003U, 2988U, 1679U, 
    2153             :     1548U, 3723U, 4817U, 3450U, 4515U, 3091U, 4156U, 3165U, 
    2154             :     4230U, 3469U, 4534U, 3689U, 4775U, 3050U, 4102U, 3730U, 
    2155             :     4824U, 3463U, 4528U, 4115U, 1982U, 3980U, 3063U, 4128U, 
    2156             :     3584U, 4664U, 3287U, 4359U, 4018U, 3524U, 4604U, 3280U, 
    2157             :     4345U, 4040U, 3532U, 4612U, 3388U, 4453U, 3338U, 4403U, 
    2158             :     4064U, 3600U, 4680U, 3409U, 4474U, 4079U, 3430U, 4495U, 
    2159             :     4056U, 3402U, 4467U, 3617U, 4697U, 3751U, 4860U, 3634U, 
    2160             :     4720U, 3113U, 4178U, 3105U, 4170U, 3344U, 4409U, 3696U, 
    2161             :     4782U, 3076U, 4141U, 4094U, 3511U, 4591U, 196U, 208U, 
    2162             :     3671U, 4757U, 3121U, 4186U, 3149U, 4214U, 4789U, 4365U, 
    2163             :     1472U, 4800U, 4381U, 3504U, 4584U, 3660U, 4746U, 3112U, 
    2164             :     4177U, 3244U, 4309U, 3235U, 4300U, 3765U, 4874U, 3653U, 
    2165             :     4739U, 3098U, 4163U, 3174U, 4239U, 1308U, 3476U, 4541U, 
    2166             :     1773U, 984U, 848U, 1842U, 2286U, 1894U, 2385U, 501U, 
    2167             :     566U, 578U, 3138U, 4203U, 3568U, 4648U, 3561U, 4641U, 
    2168             :     3626U, 4706U, 3540U, 4620U, 3483U, 4548U, 2951U, 1316U, 
    2169             :     3200U, 4265U, 4838U, 3548U, 4628U, 3209U, 4274U, 3744U, 
    2170             :     4846U, 3555U, 4635U, 
    2171             : };
    2172             : 
    2173             : static inline void InitSparcMCInstrInfo(MCInstrInfo *II) {
    2174         304 :   II->InitMCInstrInfo(SparcInsts, SparcInstrNameIndices, SparcInstrNameData, 635);
    2175             : }
    2176             : 
    2177             : } // end llvm namespace
    2178             : #endif // GET_INSTRINFO_MC_DESC
    2179             : 
    2180             : #ifdef GET_INSTRINFO_HEADER
    2181             : #undef GET_INSTRINFO_HEADER
    2182             : namespace llvm {
    2183             : struct SparcGenInstrInfo : public TargetInstrInfo {
    2184             :   explicit SparcGenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1, int ReturnOpcode = -1);
    2185         370 :   ~SparcGenInstrInfo() override = default;
    2186             : };
    2187             : } // end llvm namespace
    2188             : #endif // GET_INSTRINFO_HEADER
    2189             : 
    2190             : #ifdef GET_INSTRINFO_CTOR_DTOR
    2191             : #undef GET_INSTRINFO_CTOR_DTOR
    2192             : namespace llvm {
    2193             : extern const MCInstrDesc SparcInsts[];
    2194             : extern const unsigned SparcInstrNameIndices[];
    2195             : extern const char SparcInstrNameData[];
    2196         376 : SparcGenInstrInfo::SparcGenInstrInfo(int CFSetupOpcode, int CFDestroyOpcode, int CatchRetOpcode, int ReturnOpcode)
    2197         752 :   : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) {
    2198         752 :   InitMCInstrInfo(SparcInsts, SparcInstrNameIndices, SparcInstrNameData, 635);
    2199         376 : }
    2200             : } // end llvm namespace
    2201             : #endif // GET_INSTRINFO_CTOR_DTOR
    2202             : 
    2203             : #ifdef GET_INSTRINFO_OPERAND_ENUM
    2204             : #undef GET_INSTRINFO_OPERAND_ENUM
    2205             : namespace llvm {
    2206             : namespace SP {
    2207             : namespace OpName {
    2208             : enum {
    2209             : OPERAND_LAST
    2210             : };
    2211             : } // end namespace OpName
    2212             : } // end namespace SP
    2213             : } // end namespace llvm
    2214             : #endif //GET_INSTRINFO_OPERAND_ENUM
    2215             : 
    2216             : #ifdef GET_INSTRINFO_NAMED_OPS
    2217             : #undef GET_INSTRINFO_NAMED_OPS
    2218             : namespace llvm {
    2219             : namespace SP {
    2220             : LLVM_READONLY
    2221             : int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {
    2222             :   return -1;
    2223             : }
    2224             : } // end namespace SP
    2225             : } // end namespace llvm
    2226             : #endif //GET_INSTRINFO_NAMED_OPS
    2227             : 
    2228             : #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM
    2229             : #undef GET_INSTRINFO_OPERAND_TYPES_ENUM
    2230             : namespace llvm {
    2231             : namespace SP {
    2232             : namespace OpTypes {
    2233             : enum OperandType {
    2234             :   CCOp = 0,
    2235             :   MEMri = 1,
    2236             :   MEMrr = 2,
    2237             :   TLSSym = 3,
    2238             :   bprtarget = 4,
    2239             :   bprtarget16 = 5,
    2240             :   brtarget = 6,
    2241             :   calltarget = 7,
    2242             :   f32imm = 8,
    2243             :   f64imm = 9,
    2244             :   getPCX = 10,
    2245             :   i16imm = 11,
    2246             :   i1imm = 12,
    2247             :   i32imm = 13,
    2248             :   i64imm = 14,
    2249             :   i8imm = 15,
    2250             :   simm13Op = 16,
    2251             :   type0 = 17,
    2252             :   type1 = 18,
    2253             :   type2 = 19,
    2254             :   type3 = 20,
    2255             :   type4 = 21,
    2256             :   type5 = 22,
    2257             :   OPERAND_TYPE_LIST_END
    2258             : };
    2259             : } // end namespace OpTypes
    2260             : } // end namespace SP
    2261             : } // end namespace llvm
    2262             : #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM
    2263             : 

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