LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/Sparc - SparcGenInstrInfo.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 3 4 75.0 %
Date: 2018-10-19 05:06:59 Functions: 1 3 33.3 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Target Instruction Enum Values and Descriptors                             *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : #ifdef GET_INSTRINFO_ENUM
      10             : #undef GET_INSTRINFO_ENUM
      11             : namespace llvm {
      12             : 
      13             : namespace SP {
      14             :   enum {
      15             :     PHI = 0,
      16             :     INLINEASM   = 1,
      17             :     CFI_INSTRUCTION     = 2,
      18             :     EH_LABEL    = 3,
      19             :     GC_LABEL    = 4,
      20             :     ANNOTATION_LABEL    = 5,
      21             :     KILL        = 6,
      22             :     EXTRACT_SUBREG      = 7,
      23             :     INSERT_SUBREG       = 8,
      24             :     IMPLICIT_DEF        = 9,
      25             :     SUBREG_TO_REG       = 10,
      26             :     COPY_TO_REGCLASS    = 11,
      27             :     DBG_VALUE   = 12,
      28             :     DBG_LABEL   = 13,
      29             :     REG_SEQUENCE        = 14,
      30             :     COPY        = 15,
      31             :     BUNDLE      = 16,
      32             :     LIFETIME_START      = 17,
      33             :     LIFETIME_END        = 18,
      34             :     STACKMAP    = 19,
      35             :     FENTRY_CALL = 20,
      36             :     PATCHPOINT  = 21,
      37             :     LOAD_STACK_GUARD    = 22,
      38             :     STATEPOINT  = 23,
      39             :     LOCAL_ESCAPE        = 24,
      40             :     FAULTING_OP = 25,
      41             :     PATCHABLE_OP        = 26,
      42             :     PATCHABLE_FUNCTION_ENTER    = 27,
      43             :     PATCHABLE_RET       = 28,
      44             :     PATCHABLE_FUNCTION_EXIT     = 29,
      45             :     PATCHABLE_TAIL_CALL = 30,
      46             :     PATCHABLE_EVENT_CALL        = 31,
      47             :     PATCHABLE_TYPED_EVENT_CALL  = 32,
      48             :     ICALL_BRANCH_FUNNEL = 33,
      49             :     G_ADD       = 34,
      50             :     G_SUB       = 35,
      51             :     G_MUL       = 36,
      52             :     G_SDIV      = 37,
      53             :     G_UDIV      = 38,
      54             :     G_SREM      = 39,
      55             :     G_UREM      = 40,
      56             :     G_AND       = 41,
      57             :     G_OR        = 42,
      58             :     G_XOR       = 43,
      59             :     G_IMPLICIT_DEF      = 44,
      60             :     G_PHI       = 45,
      61             :     G_FRAME_INDEX       = 46,
      62             :     G_GLOBAL_VALUE      = 47,
      63             :     G_EXTRACT   = 48,
      64             :     G_UNMERGE_VALUES    = 49,
      65             :     G_INSERT    = 50,
      66             :     G_MERGE_VALUES      = 51,
      67             :     G_PTRTOINT  = 52,
      68             :     G_INTTOPTR  = 53,
      69             :     G_BITCAST   = 54,
      70             :     G_INTRINSIC_TRUNC   = 55,
      71             :     G_INTRINSIC_ROUND   = 56,
      72             :     G_LOAD      = 57,
      73             :     G_SEXTLOAD  = 58,
      74             :     G_ZEXTLOAD  = 59,
      75             :     G_STORE     = 60,
      76             :     G_ATOMIC_CMPXCHG_WITH_SUCCESS       = 61,
      77             :     G_ATOMIC_CMPXCHG    = 62,
      78             :     G_ATOMICRMW_XCHG    = 63,
      79             :     G_ATOMICRMW_ADD     = 64,
      80             :     G_ATOMICRMW_SUB     = 65,
      81             :     G_ATOMICRMW_AND     = 66,
      82             :     G_ATOMICRMW_NAND    = 67,
      83             :     G_ATOMICRMW_OR      = 68,
      84             :     G_ATOMICRMW_XOR     = 69,
      85             :     G_ATOMICRMW_MAX     = 70,
      86             :     G_ATOMICRMW_MIN     = 71,
      87             :     G_ATOMICRMW_UMAX    = 72,
      88             :     G_ATOMICRMW_UMIN    = 73,
      89             :     G_BRCOND    = 74,
      90             :     G_BRINDIRECT        = 75,
      91             :     G_INTRINSIC = 76,
      92             :     G_INTRINSIC_W_SIDE_EFFECTS  = 77,
      93             :     G_ANYEXT    = 78,
      94             :     G_TRUNC     = 79,
      95             :     G_CONSTANT  = 80,
      96             :     G_FCONSTANT = 81,
      97             :     G_VASTART   = 82,
      98             :     G_VAARG     = 83,
      99             :     G_SEXT      = 84,
     100             :     G_ZEXT      = 85,
     101             :     G_SHL       = 86,
     102             :     G_LSHR      = 87,
     103             :     G_ASHR      = 88,
     104             :     G_ICMP      = 89,
     105             :     G_FCMP      = 90,
     106             :     G_SELECT    = 91,
     107             :     G_UADDO     = 92,
     108             :     G_UADDE     = 93,
     109             :     G_USUBO     = 94,
     110             :     G_USUBE     = 95,
     111             :     G_SADDO     = 96,
     112             :     G_SADDE     = 97,
     113             :     G_SSUBO     = 98,
     114             :     G_SSUBE     = 99,
     115             :     G_UMULO     = 100,
     116             :     G_SMULO     = 101,
     117             :     G_UMULH     = 102,
     118             :     G_SMULH     = 103,
     119             :     G_FADD      = 104,
     120             :     G_FSUB      = 105,
     121             :     G_FMUL      = 106,
     122             :     G_FMA       = 107,
     123             :     G_FDIV      = 108,
     124             :     G_FREM      = 109,
     125             :     G_FPOW      = 110,
     126             :     G_FEXP      = 111,
     127             :     G_FEXP2     = 112,
     128             :     G_FLOG      = 113,
     129             :     G_FLOG2     = 114,
     130             :     G_FNEG      = 115,
     131             :     G_FPEXT     = 116,
     132             :     G_FPTRUNC   = 117,
     133             :     G_FPTOSI    = 118,
     134             :     G_FPTOUI    = 119,
     135             :     G_SITOFP    = 120,
     136             :     G_UITOFP    = 121,
     137             :     G_FABS      = 122,
     138             :     G_GEP       = 123,
     139             :     G_PTR_MASK  = 124,
     140             :     G_BR        = 125,
     141             :     G_INSERT_VECTOR_ELT = 126,
     142             :     G_EXTRACT_VECTOR_ELT        = 127,
     143             :     G_SHUFFLE_VECTOR    = 128,
     144             :     G_CTTZ      = 129,
     145             :     G_CTTZ_ZERO_UNDEF   = 130,
     146             :     G_CTLZ      = 131,
     147             :     G_CTLZ_ZERO_UNDEF   = 132,
     148             :     G_CTPOP     = 133,
     149             :     G_BSWAP     = 134,
     150             :     G_ADDRSPACE_CAST    = 135,
     151             :     G_BLOCK_ADDR        = 136,
     152             :     ADJCALLSTACKDOWN    = 137,
     153             :     ADJCALLSTACKUP      = 138,
     154             :     GETPCX      = 139,
     155             :     SELECT_CC_DFP_FCC   = 140,
     156             :     SELECT_CC_DFP_ICC   = 141,
     157             :     SELECT_CC_FP_FCC    = 142,
     158             :     SELECT_CC_FP_ICC    = 143,
     159             :     SELECT_CC_Int_FCC   = 144,
     160             :     SELECT_CC_Int_ICC   = 145,
     161             :     SELECT_CC_QFP_FCC   = 146,
     162             :     SELECT_CC_QFP_ICC   = 147,
     163             :     SET = 148,
     164             :     ADDCCri     = 149,
     165             :     ADDCCrr     = 150,
     166             :     ADDCri      = 151,
     167             :     ADDCrr      = 152,
     168             :     ADDEri      = 153,
     169             :     ADDErr      = 154,
     170             :     ADDXC       = 155,
     171             :     ADDXCCC     = 156,
     172             :     ADDXri      = 157,
     173             :     ADDXrr      = 158,
     174             :     ADDri       = 159,
     175             :     ADDrr       = 160,
     176             :     ALIGNADDR   = 161,
     177             :     ALIGNADDRL  = 162,
     178             :     ANDCCri     = 163,
     179             :     ANDCCrr     = 164,
     180             :     ANDNCCri    = 165,
     181             :     ANDNCCrr    = 166,
     182             :     ANDNri      = 167,
     183             :     ANDNrr      = 168,
     184             :     ANDXNrr     = 169,
     185             :     ANDXri      = 170,
     186             :     ANDXrr      = 171,
     187             :     ANDri       = 172,
     188             :     ANDrr       = 173,
     189             :     ARRAY16     = 174,
     190             :     ARRAY32     = 175,
     191             :     ARRAY8      = 176,
     192             :     BA  = 177,
     193             :     BCOND       = 178,
     194             :     BCONDA      = 179,
     195             :     BINDri      = 180,
     196             :     BINDrr      = 181,
     197             :     BMASK       = 182,
     198             :     BPFCC       = 183,
     199             :     BPFCCA      = 184,
     200             :     BPFCCANT    = 185,
     201             :     BPFCCNT     = 186,
     202             :     BPGEZapn    = 187,
     203             :     BPGEZapt    = 188,
     204             :     BPGEZnapn   = 189,
     205             :     BPGEZnapt   = 190,
     206             :     BPGZapn     = 191,
     207             :     BPGZapt     = 192,
     208             :     BPGZnapn    = 193,
     209             :     BPGZnapt    = 194,
     210             :     BPICC       = 195,
     211             :     BPICCA      = 196,
     212             :     BPICCANT    = 197,
     213             :     BPICCNT     = 198,
     214             :     BPLEZapn    = 199,
     215             :     BPLEZapt    = 200,
     216             :     BPLEZnapn   = 201,
     217             :     BPLEZnapt   = 202,
     218             :     BPLZapn     = 203,
     219             :     BPLZapt     = 204,
     220             :     BPLZnapn    = 205,
     221             :     BPLZnapt    = 206,
     222             :     BPNZapn     = 207,
     223             :     BPNZapt     = 208,
     224             :     BPNZnapn    = 209,
     225             :     BPNZnapt    = 210,
     226             :     BPXCC       = 211,
     227             :     BPXCCA      = 212,
     228             :     BPXCCANT    = 213,
     229             :     BPXCCNT     = 214,
     230             :     BPZapn      = 215,
     231             :     BPZapt      = 216,
     232             :     BPZnapn     = 217,
     233             :     BPZnapt     = 218,
     234             :     BSHUFFLE    = 219,
     235             :     CALL        = 220,
     236             :     CALLri      = 221,
     237             :     CALLrr      = 222,
     238             :     CASAasi10   = 223,
     239             :     CASArr      = 224,
     240             :     CASXrr      = 225,
     241             :     CASrr       = 226,
     242             :     CBCOND      = 227,
     243             :     CBCONDA     = 228,
     244             :     CMASK16     = 229,
     245             :     CMASK32     = 230,
     246             :     CMASK8      = 231,
     247             :     CMPri       = 232,
     248             :     CMPrr       = 233,
     249             :     EDGE16      = 234,
     250             :     EDGE16L     = 235,
     251             :     EDGE16LN    = 236,
     252             :     EDGE16N     = 237,
     253             :     EDGE32      = 238,
     254             :     EDGE32L     = 239,
     255             :     EDGE32LN    = 240,
     256             :     EDGE32N     = 241,
     257             :     EDGE8       = 242,
     258             :     EDGE8L      = 243,
     259             :     EDGE8LN     = 244,
     260             :     EDGE8N      = 245,
     261             :     FABSD       = 246,
     262             :     FABSQ       = 247,
     263             :     FABSS       = 248,
     264             :     FADDD       = 249,
     265             :     FADDQ       = 250,
     266             :     FADDS       = 251,
     267             :     FALIGNADATA = 252,
     268             :     FAND        = 253,
     269             :     FANDNOT1    = 254,
     270             :     FANDNOT1S   = 255,
     271             :     FANDNOT2    = 256,
     272             :     FANDNOT2S   = 257,
     273             :     FANDS       = 258,
     274             :     FBCOND      = 259,
     275             :     FBCONDA     = 260,
     276             :     FCHKSM16    = 261,
     277             :     FCMPD       = 262,
     278             :     FCMPEQ16    = 263,
     279             :     FCMPEQ32    = 264,
     280             :     FCMPGT16    = 265,
     281             :     FCMPGT32    = 266,
     282             :     FCMPLE16    = 267,
     283             :     FCMPLE32    = 268,
     284             :     FCMPNE16    = 269,
     285             :     FCMPNE32    = 270,
     286             :     FCMPQ       = 271,
     287             :     FCMPS       = 272,
     288             :     FDIVD       = 273,
     289             :     FDIVQ       = 274,
     290             :     FDIVS       = 275,
     291             :     FDMULQ      = 276,
     292             :     FDTOI       = 277,
     293             :     FDTOQ       = 278,
     294             :     FDTOS       = 279,
     295             :     FDTOX       = 280,
     296             :     FEXPAND     = 281,
     297             :     FHADDD      = 282,
     298             :     FHADDS      = 283,
     299             :     FHSUBD      = 284,
     300             :     FHSUBS      = 285,
     301             :     FITOD       = 286,
     302             :     FITOQ       = 287,
     303             :     FITOS       = 288,
     304             :     FLCMPD      = 289,
     305             :     FLCMPS      = 290,
     306             :     FLUSH       = 291,
     307             :     FLUSHW      = 292,
     308             :     FLUSHri     = 293,
     309             :     FLUSHrr     = 294,
     310             :     FMEAN16     = 295,
     311             :     FMOVD       = 296,
     312             :     FMOVD_FCC   = 297,
     313             :     FMOVD_ICC   = 298,
     314             :     FMOVD_XCC   = 299,
     315             :     FMOVQ       = 300,
     316             :     FMOVQ_FCC   = 301,
     317             :     FMOVQ_ICC   = 302,
     318             :     FMOVQ_XCC   = 303,
     319             :     FMOVRGEZD   = 304,
     320             :     FMOVRGEZQ   = 305,
     321             :     FMOVRGEZS   = 306,
     322             :     FMOVRGZD    = 307,
     323             :     FMOVRGZQ    = 308,
     324             :     FMOVRGZS    = 309,
     325             :     FMOVRLEZD   = 310,
     326             :     FMOVRLEZQ   = 311,
     327             :     FMOVRLEZS   = 312,
     328             :     FMOVRLZD    = 313,
     329             :     FMOVRLZQ    = 314,
     330             :     FMOVRLZS    = 315,
     331             :     FMOVRNZD    = 316,
     332             :     FMOVRNZQ    = 317,
     333             :     FMOVRNZS    = 318,
     334             :     FMOVRZD     = 319,
     335             :     FMOVRZQ     = 320,
     336             :     FMOVRZS     = 321,
     337             :     FMOVS       = 322,
     338             :     FMOVS_FCC   = 323,
     339             :     FMOVS_ICC   = 324,
     340             :     FMOVS_XCC   = 325,
     341             :     FMUL8SUX16  = 326,
     342             :     FMUL8ULX16  = 327,
     343             :     FMUL8X16    = 328,
     344             :     FMUL8X16AL  = 329,
     345             :     FMUL8X16AU  = 330,
     346             :     FMULD       = 331,
     347             :     FMULD8SUX16 = 332,
     348             :     FMULD8ULX16 = 333,
     349             :     FMULQ       = 334,
     350             :     FMULS       = 335,
     351             :     FNADDD      = 336,
     352             :     FNADDS      = 337,
     353             :     FNAND       = 338,
     354             :     FNANDS      = 339,
     355             :     FNEGD       = 340,
     356             :     FNEGQ       = 341,
     357             :     FNEGS       = 342,
     358             :     FNHADDD     = 343,
     359             :     FNHADDS     = 344,
     360             :     FNMULD      = 345,
     361             :     FNMULS      = 346,
     362             :     FNOR        = 347,
     363             :     FNORS       = 348,
     364             :     FNOT1       = 349,
     365             :     FNOT1S      = 350,
     366             :     FNOT2       = 351,
     367             :     FNOT2S      = 352,
     368             :     FNSMULD     = 353,
     369             :     FONE        = 354,
     370             :     FONES       = 355,
     371             :     FOR = 356,
     372             :     FORNOT1     = 357,
     373             :     FORNOT1S    = 358,
     374             :     FORNOT2     = 359,
     375             :     FORNOT2S    = 360,
     376             :     FORS        = 361,
     377             :     FPACK16     = 362,
     378             :     FPACK32     = 363,
     379             :     FPACKFIX    = 364,
     380             :     FPADD16     = 365,
     381             :     FPADD16S    = 366,
     382             :     FPADD32     = 367,
     383             :     FPADD32S    = 368,
     384             :     FPADD64     = 369,
     385             :     FPMERGE     = 370,
     386             :     FPSUB16     = 371,
     387             :     FPSUB16S    = 372,
     388             :     FPSUB32     = 373,
     389             :     FPSUB32S    = 374,
     390             :     FQTOD       = 375,
     391             :     FQTOI       = 376,
     392             :     FQTOS       = 377,
     393             :     FQTOX       = 378,
     394             :     FSLAS16     = 379,
     395             :     FSLAS32     = 380,
     396             :     FSLL16      = 381,
     397             :     FSLL32      = 382,
     398             :     FSMULD      = 383,
     399             :     FSQRTD      = 384,
     400             :     FSQRTQ      = 385,
     401             :     FSQRTS      = 386,
     402             :     FSRA16      = 387,
     403             :     FSRA32      = 388,
     404             :     FSRC1       = 389,
     405             :     FSRC1S      = 390,
     406             :     FSRC2       = 391,
     407             :     FSRC2S      = 392,
     408             :     FSRL16      = 393,
     409             :     FSRL32      = 394,
     410             :     FSTOD       = 395,
     411             :     FSTOI       = 396,
     412             :     FSTOQ       = 397,
     413             :     FSTOX       = 398,
     414             :     FSUBD       = 399,
     415             :     FSUBQ       = 400,
     416             :     FSUBS       = 401,
     417             :     FXNOR       = 402,
     418             :     FXNORS      = 403,
     419             :     FXOR        = 404,
     420             :     FXORS       = 405,
     421             :     FXTOD       = 406,
     422             :     FXTOQ       = 407,
     423             :     FXTOS       = 408,
     424             :     FZERO       = 409,
     425             :     FZEROS      = 410,
     426             :     JMPLri      = 411,
     427             :     JMPLrr      = 412,
     428             :     LDArr       = 413,
     429             :     LDCSRri     = 414,
     430             :     LDCSRrr     = 415,
     431             :     LDCri       = 416,
     432             :     LDCrr       = 417,
     433             :     LDDArr      = 418,
     434             :     LDDCri      = 419,
     435             :     LDDCrr      = 420,
     436             :     LDDFArr     = 421,
     437             :     LDDFri      = 422,
     438             :     LDDFrr      = 423,
     439             :     LDDri       = 424,
     440             :     LDDrr       = 425,
     441             :     LDFArr      = 426,
     442             :     LDFSRri     = 427,
     443             :     LDFSRrr     = 428,
     444             :     LDFri       = 429,
     445             :     LDFrr       = 430,
     446             :     LDQFArr     = 431,
     447             :     LDQFri      = 432,
     448             :     LDQFrr      = 433,
     449             :     LDSBArr     = 434,
     450             :     LDSBri      = 435,
     451             :     LDSBrr      = 436,
     452             :     LDSHArr     = 437,
     453             :     LDSHri      = 438,
     454             :     LDSHrr      = 439,
     455             :     LDSTUBArr   = 440,
     456             :     LDSTUBri    = 441,
     457             :     LDSTUBrr    = 442,
     458             :     LDSWri      = 443,
     459             :     LDSWrr      = 444,
     460             :     LDUBArr     = 445,
     461             :     LDUBri      = 446,
     462             :     LDUBrr      = 447,
     463             :     LDUHArr     = 448,
     464             :     LDUHri      = 449,
     465             :     LDUHrr      = 450,
     466             :     LDXFSRri    = 451,
     467             :     LDXFSRrr    = 452,
     468             :     LDXri       = 453,
     469             :     LDXrr       = 454,
     470             :     LDri        = 455,
     471             :     LDrr        = 456,
     472             :     LEAX_ADDri  = 457,
     473             :     LEA_ADDri   = 458,
     474             :     LZCNT       = 459,
     475             :     MEMBARi     = 460,
     476             :     MOVDTOX     = 461,
     477             :     MOVFCCri    = 462,
     478             :     MOVFCCrr    = 463,
     479             :     MOVICCri    = 464,
     480             :     MOVICCrr    = 465,
     481             :     MOVRGEZri   = 466,
     482             :     MOVRGEZrr   = 467,
     483             :     MOVRGZri    = 468,
     484             :     MOVRGZrr    = 469,
     485             :     MOVRLEZri   = 470,
     486             :     MOVRLEZrr   = 471,
     487             :     MOVRLZri    = 472,
     488             :     MOVRLZrr    = 473,
     489             :     MOVRNZri    = 474,
     490             :     MOVRNZrr    = 475,
     491             :     MOVRRZri    = 476,
     492             :     MOVRRZrr    = 477,
     493             :     MOVSTOSW    = 478,
     494             :     MOVSTOUW    = 479,
     495             :     MOVWTOS     = 480,
     496             :     MOVXCCri    = 481,
     497             :     MOVXCCrr    = 482,
     498             :     MOVXTOD     = 483,
     499             :     MULSCCri    = 484,
     500             :     MULSCCrr    = 485,
     501             :     MULXri      = 486,
     502             :     MULXrr      = 487,
     503             :     NOP = 488,
     504             :     ORCCri      = 489,
     505             :     ORCCrr      = 490,
     506             :     ORNCCri     = 491,
     507             :     ORNCCrr     = 492,
     508             :     ORNri       = 493,
     509             :     ORNrr       = 494,
     510             :     ORXNrr      = 495,
     511             :     ORXri       = 496,
     512             :     ORXrr       = 497,
     513             :     ORri        = 498,
     514             :     ORrr        = 499,
     515             :     PDIST       = 500,
     516             :     PDISTN      = 501,
     517             :     POPCrr      = 502,
     518             :     PWRPSRri    = 503,
     519             :     PWRPSRrr    = 504,
     520             :     RDASR       = 505,
     521             :     RDPR        = 506,
     522             :     RDPSR       = 507,
     523             :     RDTBR       = 508,
     524             :     RDWIM       = 509,
     525             :     RESTOREri   = 510,
     526             :     RESTORErr   = 511,
     527             :     RET = 512,
     528             :     RETL        = 513,
     529             :     RETTri      = 514,
     530             :     RETTrr      = 515,
     531             :     SAVEri      = 516,
     532             :     SAVErr      = 517,
     533             :     SDIVCCri    = 518,
     534             :     SDIVCCrr    = 519,
     535             :     SDIVXri     = 520,
     536             :     SDIVXrr     = 521,
     537             :     SDIVri      = 522,
     538             :     SDIVrr      = 523,
     539             :     SETHIXi     = 524,
     540             :     SETHIi      = 525,
     541             :     SHUTDOWN    = 526,
     542             :     SIAM        = 527,
     543             :     SLLXri      = 528,
     544             :     SLLXrr      = 529,
     545             :     SLLri       = 530,
     546             :     SLLrr       = 531,
     547             :     SMACri      = 532,
     548             :     SMACrr      = 533,
     549             :     SMULCCri    = 534,
     550             :     SMULCCrr    = 535,
     551             :     SMULri      = 536,
     552             :     SMULrr      = 537,
     553             :     SRAXri      = 538,
     554             :     SRAXrr      = 539,
     555             :     SRAri       = 540,
     556             :     SRArr       = 541,
     557             :     SRLXri      = 542,
     558             :     SRLXrr      = 543,
     559             :     SRLri       = 544,
     560             :     SRLrr       = 545,
     561             :     STArr       = 546,
     562             :     STBAR       = 547,
     563             :     STBArr      = 548,
     564             :     STBri       = 549,
     565             :     STBrr       = 550,
     566             :     STCSRri     = 551,
     567             :     STCSRrr     = 552,
     568             :     STCri       = 553,
     569             :     STCrr       = 554,
     570             :     STDArr      = 555,
     571             :     STDCQri     = 556,
     572             :     STDCQrr     = 557,
     573             :     STDCri      = 558,
     574             :     STDCrr      = 559,
     575             :     STDFArr     = 560,
     576             :     STDFQri     = 561,
     577             :     STDFQrr     = 562,
     578             :     STDFri      = 563,
     579             :     STDFrr      = 564,
     580             :     STDri       = 565,
     581             :     STDrr       = 566,
     582             :     STFArr      = 567,
     583             :     STFSRri     = 568,
     584             :     STFSRrr     = 569,
     585             :     STFri       = 570,
     586             :     STFrr       = 571,
     587             :     STHArr      = 572,
     588             :     STHri       = 573,
     589             :     STHrr       = 574,
     590             :     STQFArr     = 575,
     591             :     STQFri      = 576,
     592             :     STQFrr      = 577,
     593             :     STXFSRri    = 578,
     594             :     STXFSRrr    = 579,
     595             :     STXri       = 580,
     596             :     STXrr       = 581,
     597             :     STri        = 582,
     598             :     STrr        = 583,
     599             :     SUBCCri     = 584,
     600             :     SUBCCrr     = 585,
     601             :     SUBCri      = 586,
     602             :     SUBCrr      = 587,
     603             :     SUBEri      = 588,
     604             :     SUBErr      = 589,
     605             :     SUBXri      = 590,
     606             :     SUBXrr      = 591,
     607             :     SUBri       = 592,
     608             :     SUBrr       = 593,
     609             :     SWAPArr     = 594,
     610             :     SWAPri      = 595,
     611             :     SWAPrr      = 596,
     612             :     TA1 = 597,
     613             :     TA3 = 598,
     614             :     TA5 = 599,
     615             :     TADDCCTVri  = 600,
     616             :     TADDCCTVrr  = 601,
     617             :     TADDCCri    = 602,
     618             :     TADDCCrr    = 603,
     619             :     TICCri      = 604,
     620             :     TICCrr      = 605,
     621             :     TLS_ADDXrr  = 606,
     622             :     TLS_ADDrr   = 607,
     623             :     TLS_CALL    = 608,
     624             :     TLS_LDXrr   = 609,
     625             :     TLS_LDrr    = 610,
     626             :     TRAPri      = 611,
     627             :     TRAPrr      = 612,
     628             :     TSUBCCTVri  = 613,
     629             :     TSUBCCTVrr  = 614,
     630             :     TSUBCCri    = 615,
     631             :     TSUBCCrr    = 616,
     632             :     TXCCri      = 617,
     633             :     TXCCrr      = 618,
     634             :     UDIVCCri    = 619,
     635             :     UDIVCCrr    = 620,
     636             :     UDIVXri     = 621,
     637             :     UDIVXrr     = 622,
     638             :     UDIVri      = 623,
     639             :     UDIVrr      = 624,
     640             :     UMACri      = 625,
     641             :     UMACrr      = 626,
     642             :     UMULCCri    = 627,
     643             :     UMULCCrr    = 628,
     644             :     UMULXHI     = 629,
     645             :     UMULri      = 630,
     646             :     UMULrr      = 631,
     647             :     UNIMP       = 632,
     648             :     V9FCMPD     = 633,
     649             :     V9FCMPED    = 634,
     650             :     V9FCMPEQ    = 635,
     651             :     V9FCMPES    = 636,
     652             :     V9FCMPQ     = 637,
     653             :     V9FCMPS     = 638,
     654             :     V9FMOVD_FCC = 639,
     655             :     V9FMOVQ_FCC = 640,
     656             :     V9FMOVS_FCC = 641,
     657             :     V9MOVFCCri  = 642,
     658             :     V9MOVFCCrr  = 643,
     659             :     WRASRri     = 644,
     660             :     WRASRrr     = 645,
     661             :     WRPRri      = 646,
     662             :     WRPRrr      = 647,
     663             :     WRPSRri     = 648,
     664             :     WRPSRrr     = 649,
     665             :     WRTBRri     = 650,
     666             :     WRTBRrr     = 651,
     667             :     WRWIMri     = 652,
     668             :     WRWIMrr     = 653,
     669             :     XMULX       = 654,
     670             :     XMULXHI     = 655,
     671             :     XNORCCri    = 656,
     672             :     XNORCCrr    = 657,
     673             :     XNORXrr     = 658,
     674             :     XNORri      = 659,
     675             :     XNORrr      = 660,
     676             :     XORCCri     = 661,
     677             :     XORCCrr     = 662,
     678             :     XORXri      = 663,
     679             :     XORXrr      = 664,
     680             :     XORri       = 665,
     681             :     XORrr       = 666,
     682             :     INSTRUCTION_LIST_END = 667
     683             :   };
     684             : 
     685             : } // end SP namespace
     686             : } // end llvm namespace
     687             : #endif // GET_INSTRINFO_ENUM
     688             : 
     689             : #ifdef GET_INSTRINFO_SCHED_ENUM
     690             : #undef GET_INSTRINFO_SCHED_ENUM
     691             : namespace llvm {
     692             : 
     693             : namespace SP {
     694             : namespace Sched {
     695             :   enum {
     696             :     NoInstrModel        = 0,
     697             :     IIC_iu_instr        = 1,
     698             :     IIC_fpu_normal_instr        = 2,
     699             :     IIC_jmp_or_call     = 3,
     700             :     IIC_fpu_abs = 4,
     701             :     IIC_fpu_fast_instr  = 5,
     702             :     IIC_fpu_divd        = 6,
     703             :     IIC_fpu_divs        = 7,
     704             :     IIC_fpu_muld        = 8,
     705             :     IIC_fpu_muls        = 9,
     706             :     IIC_fpu_negs        = 10,
     707             :     IIC_fpu_sqrtd       = 11,
     708             :     IIC_fpu_sqrts       = 12,
     709             :     IIC_fpu_stod        = 13,
     710             :     IIC_ldd     = 14,
     711             :     IIC_iu_or_fpu_instr = 15,
     712             :     IIC_iu_div  = 16,
     713             :     IIC_smac_umac       = 17,
     714             :     IIC_iu_smul = 18,
     715             :     IIC_st      = 19,
     716             :     IIC_std     = 20,
     717             :     IIC_iu_umul = 21,
     718             :     SCHED_LIST_END = 22
     719             :   };
     720             : } // end Sched namespace
     721             : } // end SP namespace
     722             : } // end llvm namespace
     723             : #endif // GET_INSTRINFO_SCHED_ENUM
     724             : 
     725             : #ifdef GET_INSTRINFO_MC_DESC
     726             : #undef GET_INSTRINFO_MC_DESC
     727             : namespace llvm {
     728             : 
     729             : static const MCPhysReg ImplicitList1[] = { SP::O6, 0 };
     730             : static const MCPhysReg ImplicitList2[] = { SP::O7, 0 };
     731             : static const MCPhysReg ImplicitList3[] = { SP::FCC0, 0 };
     732             : static const MCPhysReg ImplicitList4[] = { SP::ICC, 0 };
     733             : static const MCPhysReg ImplicitList5[] = { SP::CPSR, 0 };
     734             : static const MCPhysReg ImplicitList6[] = { SP::FSR, 0 };
     735             : static const MCPhysReg ImplicitList7[] = { SP::Y, SP::ICC, 0 };
     736             : static const MCPhysReg ImplicitList8[] = { SP::PSR, 0 };
     737             : static const MCPhysReg ImplicitList9[] = { SP::TBR, 0 };
     738             : static const MCPhysReg ImplicitList10[] = { SP::WIM, 0 };
     739             : static const MCPhysReg ImplicitList11[] = { SP::Y, 0 };
     740             : static const MCPhysReg ImplicitList12[] = { SP::Y, SP::ASR18, 0 };
     741             : static const MCPhysReg ImplicitList13[] = { SP::CPQ, 0 };
     742             : static const MCPhysReg ImplicitList14[] = { SP::FQ, 0 };
     743             : 
     744             : static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     745             : static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     746             : static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     747             : static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     748             : static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     749             : static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     750             : static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     751             : static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     752             : static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     753             : static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     754             : static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     755             : static const MCOperandInfo OperandInfo13[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     756             : static const MCOperandInfo OperandInfo14[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     757             : static const MCOperandInfo OperandInfo15[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     758             : static const MCOperandInfo OperandInfo16[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     759             : static const MCOperandInfo OperandInfo17[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     760             : static const MCOperandInfo OperandInfo18[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     761             : static const MCOperandInfo OperandInfo19[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     762             : static const MCOperandInfo OperandInfo20[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     763             : static const MCOperandInfo OperandInfo21[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     764             : static const MCOperandInfo OperandInfo22[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     765             : static const MCOperandInfo OperandInfo23[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     766             : static const MCOperandInfo OperandInfo24[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     767             : static const MCOperandInfo OperandInfo25[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
     768             : static const MCOperandInfo OperandInfo26[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
     769             : static const MCOperandInfo OperandInfo27[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     770             : static const MCOperandInfo OperandInfo28[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     771             : static const MCOperandInfo OperandInfo29[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     772             : static const MCOperandInfo OperandInfo30[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
     773             : static const MCOperandInfo OperandInfo31[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     774             : static const MCOperandInfo OperandInfo32[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     775             : static const MCOperandInfo OperandInfo33[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     776             : static const MCOperandInfo OperandInfo34[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     777             : static const MCOperandInfo OperandInfo35[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     778             : static const MCOperandInfo OperandInfo36[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     779             : static const MCOperandInfo OperandInfo37[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     780             : static const MCOperandInfo OperandInfo38[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     781             : static const MCOperandInfo OperandInfo39[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     782             : static const MCOperandInfo OperandInfo40[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     783             : static const MCOperandInfo OperandInfo41[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     784             : static const MCOperandInfo OperandInfo42[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     785             : static const MCOperandInfo OperandInfo43[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     786             : static const MCOperandInfo OperandInfo44[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     787             : static const MCOperandInfo OperandInfo45[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     788             : static const MCOperandInfo OperandInfo46[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     789             : static const MCOperandInfo OperandInfo47[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     790             : static const MCOperandInfo OperandInfo48[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     791             : static const MCOperandInfo OperandInfo49[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     792             : static const MCOperandInfo OperandInfo50[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     793             : static const MCOperandInfo OperandInfo51[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     794             : static const MCOperandInfo OperandInfo52[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     795             : static const MCOperandInfo OperandInfo53[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     796             : static const MCOperandInfo OperandInfo54[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     797             : static const MCOperandInfo OperandInfo55[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     798             : static const MCOperandInfo OperandInfo56[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     799             : static const MCOperandInfo OperandInfo57[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     800             : static const MCOperandInfo OperandInfo58[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     801             : static const MCOperandInfo OperandInfo59[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     802             : static const MCOperandInfo OperandInfo60[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     803             : static const MCOperandInfo OperandInfo61[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     804             : static const MCOperandInfo OperandInfo62[] = { { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     805             : static const MCOperandInfo OperandInfo63[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     806             : static const MCOperandInfo OperandInfo64[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     807             : static const MCOperandInfo OperandInfo65[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     808             : static const MCOperandInfo OperandInfo66[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     809             : static const MCOperandInfo OperandInfo67[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     810             : static const MCOperandInfo OperandInfo68[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     811             : static const MCOperandInfo OperandInfo69[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     812             : static const MCOperandInfo OperandInfo70[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     813             : static const MCOperandInfo OperandInfo71[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     814             : static const MCOperandInfo OperandInfo72[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     815             : static const MCOperandInfo OperandInfo73[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     816             : static const MCOperandInfo OperandInfo74[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     817             : static const MCOperandInfo OperandInfo75[] = { { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     818             : static const MCOperandInfo OperandInfo76[] = { { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     819             : static const MCOperandInfo OperandInfo77[] = { { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     820             : static const MCOperandInfo OperandInfo78[] = { { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     821             : static const MCOperandInfo OperandInfo79[] = { { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     822             : static const MCOperandInfo OperandInfo80[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     823             : static const MCOperandInfo OperandInfo81[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     824             : static const MCOperandInfo OperandInfo82[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     825             : static const MCOperandInfo OperandInfo83[] = { { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     826             : static const MCOperandInfo OperandInfo84[] = { { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     827             : static const MCOperandInfo OperandInfo85[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     828             : static const MCOperandInfo OperandInfo86[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     829             : static const MCOperandInfo OperandInfo87[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     830             : static const MCOperandInfo OperandInfo88[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     831             : static const MCOperandInfo OperandInfo89[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     832             : static const MCOperandInfo OperandInfo90[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     833             : static const MCOperandInfo OperandInfo91[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     834             : static const MCOperandInfo OperandInfo92[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
     835             : static const MCOperandInfo OperandInfo93[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     836             : static const MCOperandInfo OperandInfo94[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     837             : static const MCOperandInfo OperandInfo95[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     838             : static const MCOperandInfo OperandInfo96[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     839             : static const MCOperandInfo OperandInfo97[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     840             : static const MCOperandInfo OperandInfo98[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     841             : static const MCOperandInfo OperandInfo99[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     842             : static const MCOperandInfo OperandInfo100[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     843             : static const MCOperandInfo OperandInfo101[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     844             : static const MCOperandInfo OperandInfo102[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     845             : static const MCOperandInfo OperandInfo103[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     846             : static const MCOperandInfo OperandInfo104[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     847             : static const MCOperandInfo OperandInfo105[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     848             : static const MCOperandInfo OperandInfo106[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     849             : static const MCOperandInfo OperandInfo107[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     850             : static const MCOperandInfo OperandInfo108[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     851             : static const MCOperandInfo OperandInfo109[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     852             : static const MCOperandInfo OperandInfo110[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     853             : static const MCOperandInfo OperandInfo111[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     854             : static const MCOperandInfo OperandInfo112[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     855             : static const MCOperandInfo OperandInfo113[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     856             : static const MCOperandInfo OperandInfo114[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     857             : static const MCOperandInfo OperandInfo115[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     858             : static const MCOperandInfo OperandInfo116[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     859             : static const MCOperandInfo OperandInfo117[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     860             : static const MCOperandInfo OperandInfo118[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     861             : static const MCOperandInfo OperandInfo119[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     862             : static const MCOperandInfo OperandInfo120[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     863             : static const MCOperandInfo OperandInfo121[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
     864             : static const MCOperandInfo OperandInfo122[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     865             : static const MCOperandInfo OperandInfo123[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     866             : static const MCOperandInfo OperandInfo124[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     867             : static const MCOperandInfo OperandInfo125[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     868             : static const MCOperandInfo OperandInfo126[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     869             : static const MCOperandInfo OperandInfo127[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     870             : static const MCOperandInfo OperandInfo128[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
     871             : static const MCOperandInfo OperandInfo129[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     872             : static const MCOperandInfo OperandInfo130[] = { { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     873             : static const MCOperandInfo OperandInfo131[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     874             : static const MCOperandInfo OperandInfo132[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     875             : static const MCOperandInfo OperandInfo133[] = { { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     876             : static const MCOperandInfo OperandInfo134[] = { { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     877             : static const MCOperandInfo OperandInfo135[] = { { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     878             : static const MCOperandInfo OperandInfo136[] = { { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     879             : static const MCOperandInfo OperandInfo137[] = { { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     880             : static const MCOperandInfo OperandInfo138[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     881             : static const MCOperandInfo OperandInfo139[] = { { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     882             : static const MCOperandInfo OperandInfo140[] = { { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     883             : static const MCOperandInfo OperandInfo141[] = { { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     884             : static const MCOperandInfo OperandInfo142[] = { { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
     885             : static const MCOperandInfo OperandInfo143[] = { { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
     886             : 
     887             : extern const MCInstrDesc SparcInsts[] = {
     888             :   { 0,  1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #0 = PHI
     889             :   { 1,  0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1 = INLINEASM
     890             :   { 2,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #2 = CFI_INSTRUCTION
     891             :   { 3,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #3 = EH_LABEL
     892             :   { 4,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #4 = GC_LABEL
     893             :   { 5,  1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #5 = ANNOTATION_LABEL
     894             :   { 6,  0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #6 = KILL
     895             :   { 7,  3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #7 = EXTRACT_SUBREG
     896             :   { 8,  4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr },  // Inst #8 = INSERT_SUBREG
     897             :   { 9,  1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #9 = IMPLICIT_DEF
     898             :   { 10, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr },  // Inst #10 = SUBREG_TO_REG
     899             :   { 11, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #11 = COPY_TO_REGCLASS
     900             :   { 12, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #12 = DBG_VALUE
     901             :   { 13, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #13 = DBG_LABEL
     902             :   { 14, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #14 = REG_SEQUENCE
     903             :   { 15, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #15 = COPY
     904             :   { 16, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #16 = BUNDLE
     905             :   { 17, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #17 = LIFETIME_START
     906             :   { 18, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #18 = LIFETIME_END
     907             :   { 19, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #19 = STACKMAP
     908             :   { 20, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #20 = FENTRY_CALL
     909             :   { 21, 6,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr },  // Inst #21 = PATCHPOINT
     910             :   { 22, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr },  // Inst #22 = LOAD_STACK_GUARD
     911             :   { 23, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #23 = STATEPOINT
     912             :   { 24, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #24 = LOCAL_ESCAPE
     913             :   { 25, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #25 = FAULTING_OP
     914             :   { 26, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #26 = PATCHABLE_OP
     915             :   { 27, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #27 = PATCHABLE_FUNCTION_ENTER
     916             :   { 28, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #28 = PATCHABLE_RET
     917             :   { 29, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #29 = PATCHABLE_FUNCTION_EXIT
     918             :   { 30, 0,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #30 = PATCHABLE_TAIL_CALL
     919             :   { 31, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #31 = PATCHABLE_EVENT_CALL
     920             :   { 32, 3,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #32 = PATCHABLE_TYPED_EVENT_CALL
     921             :   { 33, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #33 = ICALL_BRANCH_FUNNEL
     922             :   { 34, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #34 = G_ADD
     923             :   { 35, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #35 = G_SUB
     924             :   { 36, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #36 = G_MUL
     925             :   { 37, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #37 = G_SDIV
     926             :   { 38, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #38 = G_UDIV
     927             :   { 39, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #39 = G_SREM
     928             :   { 40, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #40 = G_UREM
     929             :   { 41, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #41 = G_AND
     930             :   { 42, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #42 = G_OR
     931             :   { 43, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #43 = G_XOR
     932             :   { 44, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #44 = G_IMPLICIT_DEF
     933             :   { 45, 1,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #45 = G_PHI
     934             :   { 46, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #46 = G_FRAME_INDEX
     935             :   { 47, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #47 = G_GLOBAL_VALUE
     936             :   { 48, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #48 = G_EXTRACT
     937             :   { 49, 2,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #49 = G_UNMERGE_VALUES
     938             :   { 50, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #50 = G_INSERT
     939             :   { 51, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #51 = G_MERGE_VALUES
     940             :   { 52, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #52 = G_PTRTOINT
     941             :   { 53, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #53 = G_INTTOPTR
     942             :   { 54, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #54 = G_BITCAST
     943             :   { 55, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #55 = G_INTRINSIC_TRUNC
     944             :   { 56, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #56 = G_INTRINSIC_ROUND
     945             :   { 57, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #57 = G_LOAD
     946             :   { 58, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #58 = G_SEXTLOAD
     947             :   { 59, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #59 = G_ZEXTLOAD
     948             :   { 60, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #60 = G_STORE
     949             :   { 61, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #61 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
     950             :   { 62, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #62 = G_ATOMIC_CMPXCHG
     951             :   { 63, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #63 = G_ATOMICRMW_XCHG
     952             :   { 64, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #64 = G_ATOMICRMW_ADD
     953             :   { 65, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #65 = G_ATOMICRMW_SUB
     954             :   { 66, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #66 = G_ATOMICRMW_AND
     955             :   { 67, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #67 = G_ATOMICRMW_NAND
     956             :   { 68, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #68 = G_ATOMICRMW_OR
     957             :   { 69, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #69 = G_ATOMICRMW_XOR
     958             :   { 70, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #70 = G_ATOMICRMW_MAX
     959             :   { 71, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #71 = G_ATOMICRMW_MIN
     960             :   { 72, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #72 = G_ATOMICRMW_UMAX
     961             :   { 73, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #73 = G_ATOMICRMW_UMIN
     962             :   { 74, 2,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #74 = G_BRCOND
     963             :   { 75, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #75 = G_BRINDIRECT
     964             :   { 76, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #76 = G_INTRINSIC
     965             :   { 77, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #77 = G_INTRINSIC_W_SIDE_EFFECTS
     966             :   { 78, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #78 = G_ANYEXT
     967             :   { 79, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #79 = G_TRUNC
     968             :   { 80, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #80 = G_CONSTANT
     969             :   { 81, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #81 = G_FCONSTANT
     970             :   { 82, 1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #82 = G_VASTART
     971             :   { 83, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #83 = G_VAARG
     972             :   { 84, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #84 = G_SEXT
     973             :   { 85, 2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #85 = G_ZEXT
     974             :   { 86, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #86 = G_SHL
     975             :   { 87, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #87 = G_LSHR
     976             :   { 88, 3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #88 = G_ASHR
     977             :   { 89, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #89 = G_ICMP
     978             :   { 90, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #90 = G_FCMP
     979             :   { 91, 4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #91 = G_SELECT
     980             :   { 92, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #92 = G_UADDO
     981             :   { 93, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #93 = G_UADDE
     982             :   { 94, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #94 = G_USUBO
     983             :   { 95, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #95 = G_USUBE
     984             :   { 96, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #96 = G_SADDO
     985             :   { 97, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #97 = G_SADDE
     986             :   { 98, 4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #98 = G_SSUBO
     987             :   { 99, 5,      2,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #99 = G_SSUBE
     988             :   { 100,        4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #100 = G_UMULO
     989             :   { 101,        4,      2,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #101 = G_SMULO
     990             :   { 102,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #102 = G_UMULH
     991             :   { 103,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #103 = G_SMULH
     992             :   { 104,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #104 = G_FADD
     993             :   { 105,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #105 = G_FSUB
     994             :   { 106,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #106 = G_FMUL
     995             :   { 107,        4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #107 = G_FMA
     996             :   { 108,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #108 = G_FDIV
     997             :   { 109,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #109 = G_FREM
     998             :   { 110,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #110 = G_FPOW
     999             :   { 111,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #111 = G_FEXP
    1000             :   { 112,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #112 = G_FEXP2
    1001             :   { 113,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #113 = G_FLOG
    1002             :   { 114,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #114 = G_FLOG2
    1003             :   { 115,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #115 = G_FNEG
    1004             :   { 116,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #116 = G_FPEXT
    1005             :   { 117,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #117 = G_FPTRUNC
    1006             :   { 118,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #118 = G_FPTOSI
    1007             :   { 119,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #119 = G_FPTOUI
    1008             :   { 120,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #120 = G_SITOFP
    1009             :   { 121,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #121 = G_UITOFP
    1010             :   { 122,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #122 = G_FABS
    1011             :   { 123,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr },  // Inst #123 = G_GEP
    1012             :   { 124,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #124 = G_PTR_MASK
    1013             :   { 125,        1,      0,      0,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #125 = G_BR
    1014             :   { 126,        4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #126 = G_INSERT_VECTOR_ELT
    1015             :   { 127,        3,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #127 = G_EXTRACT_VECTOR_ELT
    1016             :   { 128,        4,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #128 = G_SHUFFLE_VECTOR
    1017             :   { 129,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #129 = G_CTTZ
    1018             :   { 130,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #130 = G_CTTZ_ZERO_UNDEF
    1019             :   { 131,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #131 = G_CTLZ
    1020             :   { 132,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #132 = G_CTLZ_ZERO_UNDEF
    1021             :   { 133,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #133 = G_CTPOP
    1022             :   { 134,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #134 = G_BSWAP
    1023             :   { 135,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #135 = G_ADDRSPACE_CAST
    1024             :   { 136,        2,      1,      0,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #136 = G_BLOCK_ADDR
    1025             :   { 137,        2,      0,      4,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo8, -1 ,nullptr },  // Inst #137 = ADJCALLSTACKDOWN
    1026             :   { 138,        2,      0,      4,      0,      0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo8, -1 ,nullptr },  // Inst #138 = ADJCALLSTACKUP
    1027             :   { 139,        1,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #139 = GETPCX
    1028             :   { 140,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList3, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #140 = SELECT_CC_DFP_FCC
    1029             :   { 141,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #141 = SELECT_CC_DFP_ICC
    1030             :   { 142,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList3, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #142 = SELECT_CC_FP_FCC
    1031             :   { 143,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #143 = SELECT_CC_FP_ICC
    1032             :   { 144,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList3, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #144 = SELECT_CC_Int_FCC
    1033             :   { 145,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #145 = SELECT_CC_Int_ICC
    1034             :   { 146,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList3, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #146 = SELECT_CC_QFP_FCC
    1035             :   { 147,        4,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #147 = SELECT_CC_QFP_ICC
    1036             :   { 148,        2,      1,      4,      0,      0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #148 = SET
    1037             :   { 149,        3,      1,      4,      1,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #149 = ADDCCri
    1038             :   { 150,        3,      1,      4,      1,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #150 = ADDCCrr
    1039             :   { 151,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #151 = ADDCri
    1040             :   { 152,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #152 = ADDCrr
    1041             :   { 153,        3,      1,      4,      1,      0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #153 = ADDEri
    1042             :   { 154,        3,      1,      4,      1,      0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #154 = ADDErr
    1043             :   { 155,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #155 = ADDXC
    1044             :   { 156,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo38, -1 ,nullptr },  // Inst #156 = ADDXCCC
    1045             :   { 157,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #157 = ADDXri
    1046             :   { 158,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #158 = ADDXrr
    1047             :   { 159,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #159 = ADDri
    1048             :   { 160,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #160 = ADDrr
    1049             :   { 161,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #161 = ALIGNADDR
    1050             :   { 162,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #162 = ALIGNADDRL
    1051             :   { 163,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #163 = ANDCCri
    1052             :   { 164,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #164 = ANDCCrr
    1053             :   { 165,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #165 = ANDNCCri
    1054             :   { 166,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #166 = ANDNCCrr
    1055             :   { 167,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #167 = ANDNri
    1056             :   { 168,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #168 = ANDNrr
    1057             :   { 169,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #169 = ANDXNrr
    1058             :   { 170,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #170 = ANDXri
    1059             :   { 171,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #171 = ANDXrr
    1060             :   { 172,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #172 = ANDri
    1061             :   { 173,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #173 = ANDrr
    1062             :   { 174,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #174 = ARRAY16
    1063             :   { 175,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #175 = ARRAY32
    1064             :   { 176,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #176 = ARRAY8
    1065             :   { 177,        1,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #177 = BA
    1066             :   { 178,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #178 = BCOND
    1067             :   { 179,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #179 = BCONDA
    1068             :   { 180,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #180 = BINDri
    1069             :   { 181,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #181 = BINDrr
    1070             :   { 182,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #182 = BMASK
    1071             :   { 183,        3,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #183 = BPFCC
    1072             :   { 184,        3,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #184 = BPFCCA
    1073             :   { 185,        3,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #185 = BPFCCANT
    1074             :   { 186,        3,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #186 = BPFCCNT
    1075             :   { 187,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #187 = BPGEZapn
    1076             :   { 188,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #188 = BPGEZapt
    1077             :   { 189,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #189 = BPGEZnapn
    1078             :   { 190,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #190 = BPGEZnapt
    1079             :   { 191,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #191 = BPGZapn
    1080             :   { 192,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #192 = BPGZapt
    1081             :   { 193,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #193 = BPGZnapn
    1082             :   { 194,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #194 = BPGZnapt
    1083             :   { 195,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #195 = BPICC
    1084             :   { 196,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #196 = BPICCA
    1085             :   { 197,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #197 = BPICCANT
    1086             :   { 198,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #198 = BPICCNT
    1087             :   { 199,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #199 = BPLEZapn
    1088             :   { 200,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #200 = BPLEZapt
    1089             :   { 201,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #201 = BPLEZnapn
    1090             :   { 202,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #202 = BPLEZnapt
    1091             :   { 203,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #203 = BPLZapn
    1092             :   { 204,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #204 = BPLZapt
    1093             :   { 205,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #205 = BPLZnapn
    1094             :   { 206,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #206 = BPLZnapt
    1095             :   { 207,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #207 = BPNZapn
    1096             :   { 208,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #208 = BPNZapt
    1097             :   { 209,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #209 = BPNZnapn
    1098             :   { 210,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #210 = BPNZnapt
    1099             :   { 211,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #211 = BPXCC
    1100             :   { 212,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #212 = BPXCCA
    1101             :   { 213,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #213 = BPXCCANT
    1102             :   { 214,        2,      0,      4,      1,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #214 = BPXCCNT
    1103             :   { 215,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #215 = BPZapn
    1104             :   { 216,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #216 = BPZapt
    1105             :   { 217,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #217 = BPZnapn
    1106             :   { 218,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #218 = BPZnapt
    1107             :   { 219,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #219 = BSHUFFLE
    1108             :   { 220,        1,      0,      4,      3,      0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #220 = CALL
    1109             :   { 221,        2,      0,      4,      3,      0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList1, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #221 = CALLri
    1110             :   { 222,        2,      0,      4,      3,      0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList1, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #222 = CALLrr
    1111             :   { 223,        4,      1,      4,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #223 = CASAasi10
    1112             :   { 224,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #224 = CASArr
    1113             :   { 225,        4,      1,      4,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #225 = CASXrr
    1114             :   { 226,        4,      1,      4,      0,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #226 = CASrr
    1115             :   { 227,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #227 = CBCOND
    1116             :   { 228,        2,      0,      4,      0,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #228 = CBCONDA
    1117             :   { 229,        1,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #229 = CMASK16
    1118             :   { 230,        1,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #230 = CMASK32
    1119             :   { 231,        1,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #231 = CMASK8
    1120             :   { 232,        2,      0,      4,      1,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo49, -1 ,nullptr },  // Inst #232 = CMPri
    1121             :   { 233,        2,      0,      4,      1,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo50, -1 ,nullptr },  // Inst #233 = CMPrr
    1122             :   { 234,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #234 = EDGE16
    1123             :   { 235,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #235 = EDGE16L
    1124             :   { 236,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #236 = EDGE16LN
    1125             :   { 237,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #237 = EDGE16N
    1126             :   { 238,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #238 = EDGE32
    1127             :   { 239,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #239 = EDGE32L
    1128             :   { 240,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #240 = EDGE32LN
    1129             :   { 241,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #241 = EDGE32N
    1130             :   { 242,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #242 = EDGE8
    1131             :   { 243,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #243 = EDGE8L
    1132             :   { 244,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #244 = EDGE8LN
    1133             :   { 245,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #245 = EDGE8N
    1134             :   { 246,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #246 = FABSD
    1135             :   { 247,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #247 = FABSQ
    1136             :   { 248,        2,      1,      4,      4,      0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #248 = FABSS
    1137             :   { 249,        3,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #249 = FADDD
    1138             :   { 250,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #250 = FADDQ
    1139             :   { 251,        3,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #251 = FADDS
    1140             :   { 252,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #252 = FALIGNADATA
    1141             :   { 253,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #253 = FAND
    1142             :   { 254,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #254 = FANDNOT1
    1143             :   { 255,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #255 = FANDNOT1S
    1144             :   { 256,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #256 = FANDNOT2
    1145             :   { 257,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #257 = FANDNOT2S
    1146             :   { 258,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #258 = FANDS
    1147             :   { 259,        2,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList3, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #259 = FBCOND
    1148             :   { 260,        2,      0,      4,      2,      0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList3, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #260 = FBCONDA
    1149             :   { 261,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #261 = FCHKSM16
    1150             :   { 262,        2,      0,      4,      5,      0, 0x0ULL, nullptr, ImplicitList3, OperandInfo51, -1 ,nullptr },  // Inst #262 = FCMPD
    1151             :   { 263,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #263 = FCMPEQ16
    1152             :   { 264,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #264 = FCMPEQ32
    1153             :   { 265,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #265 = FCMPGT16
    1154             :   { 266,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #266 = FCMPGT32
    1155             :   { 267,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #267 = FCMPLE16
    1156             :   { 268,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #268 = FCMPLE32
    1157             :   { 269,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #269 = FCMPNE16
    1158             :   { 270,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #270 = FCMPNE32
    1159             :   { 271,        2,      0,      4,      0,      0, 0x0ULL, nullptr, ImplicitList3, OperandInfo52, -1 ,nullptr },  // Inst #271 = FCMPQ
    1160             :   { 272,        2,      0,      4,      5,      0, 0x0ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr },  // Inst #272 = FCMPS
    1161             :   { 273,        3,      1,      4,      6,      0, 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #273 = FDIVD
    1162             :   { 274,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #274 = FDIVQ
    1163             :   { 275,        3,      1,      4,      7,      0, 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #275 = FDIVS
    1164             :   { 276,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #276 = FDMULQ
    1165             :   { 277,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #277 = FDTOI
    1166             :   { 278,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #278 = FDTOQ
    1167             :   { 279,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #279 = FDTOS
    1168             :   { 280,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #280 = FDTOX
    1169             :   { 281,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #281 = FEXPAND
    1170             :   { 282,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #282 = FHADDD
    1171             :   { 283,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #283 = FHADDS
    1172             :   { 284,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #284 = FHSUBD
    1173             :   { 285,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #285 = FHSUBS
    1174             :   { 286,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #286 = FITOD
    1175             :   { 287,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #287 = FITOQ
    1176             :   { 288,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #288 = FITOS
    1177             :   { 289,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #289 = FLCMPD
    1178             :   { 290,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #290 = FLCMPS
    1179             :   { 291,        0,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #291 = FLUSH
    1180             :   { 292,        0,      0,      4,      1,      0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #292 = FLUSHW
    1181             :   { 293,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #293 = FLUSHri
    1182             :   { 294,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #294 = FLUSHrr
    1183             :   { 295,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #295 = FMEAN16
    1184             :   { 296,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #296 = FMOVD
    1185             :   { 297,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList3, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #297 = FMOVD_FCC
    1186             :   { 298,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #298 = FMOVD_ICC
    1187             :   { 299,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #299 = FMOVD_XCC
    1188             :   { 300,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #300 = FMOVQ
    1189             :   { 301,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList3, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #301 = FMOVQ_FCC
    1190             :   { 302,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #302 = FMOVQ_ICC
    1191             :   { 303,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #303 = FMOVQ_XCC
    1192             :   { 304,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #304 = FMOVRGEZD
    1193             :   { 305,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #305 = FMOVRGEZQ
    1194             :   { 306,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #306 = FMOVRGEZS
    1195             :   { 307,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #307 = FMOVRGZD
    1196             :   { 308,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #308 = FMOVRGZQ
    1197             :   { 309,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #309 = FMOVRGZS
    1198             :   { 310,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #310 = FMOVRLEZD
    1199             :   { 311,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #311 = FMOVRLEZQ
    1200             :   { 312,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #312 = FMOVRLEZS
    1201             :   { 313,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #313 = FMOVRLZD
    1202             :   { 314,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #314 = FMOVRLZQ
    1203             :   { 315,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #315 = FMOVRLZS
    1204             :   { 316,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #316 = FMOVRNZD
    1205             :   { 317,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #317 = FMOVRNZQ
    1206             :   { 318,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #318 = FMOVRNZS
    1207             :   { 319,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #319 = FMOVRZD
    1208             :   { 320,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #320 = FMOVRZQ
    1209             :   { 321,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #321 = FMOVRZS
    1210             :   { 322,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #322 = FMOVS
    1211             :   { 323,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList3, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #323 = FMOVS_FCC
    1212             :   { 324,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #324 = FMOVS_ICC
    1213             :   { 325,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #325 = FMOVS_XCC
    1214             :   { 326,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #326 = FMUL8SUX16
    1215             :   { 327,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #327 = FMUL8ULX16
    1216             :   { 328,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #328 = FMUL8X16
    1217             :   { 329,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #329 = FMUL8X16AL
    1218             :   { 330,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #330 = FMUL8X16AU
    1219             :   { 331,        3,      1,      4,      8,      0, 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #331 = FMULD
    1220             :   { 332,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #332 = FMULD8SUX16
    1221             :   { 333,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #333 = FMULD8ULX16
    1222             :   { 334,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #334 = FMULQ
    1223             :   { 335,        3,      1,      4,      9,      0, 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #335 = FMULS
    1224             :   { 336,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #336 = FNADDD
    1225             :   { 337,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #337 = FNADDS
    1226             :   { 338,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #338 = FNAND
    1227             :   { 339,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #339 = FNANDS
    1228             :   { 340,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #340 = FNEGD
    1229             :   { 341,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #341 = FNEGQ
    1230             :   { 342,        2,      1,      4,      10,     0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #342 = FNEGS
    1231             :   { 343,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #343 = FNHADDD
    1232             :   { 344,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #344 = FNHADDS
    1233             :   { 345,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #345 = FNMULD
    1234             :   { 346,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #346 = FNMULS
    1235             :   { 347,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #347 = FNOR
    1236             :   { 348,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #348 = FNORS
    1237             :   { 349,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #349 = FNOT1
    1238             :   { 350,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #350 = FNOT1S
    1239             :   { 351,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #351 = FNOT2
    1240             :   { 352,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #352 = FNOT2S
    1241             :   { 353,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #353 = FNSMULD
    1242             :   { 354,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr },  // Inst #354 = FONE
    1243             :   { 355,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo68, -1 ,nullptr },  // Inst #355 = FONES
    1244             :   { 356,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #356 = FOR
    1245             :   { 357,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #357 = FORNOT1
    1246             :   { 358,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #358 = FORNOT1S
    1247             :   { 359,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #359 = FORNOT2
    1248             :   { 360,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #360 = FORNOT2S
    1249             :   { 361,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #361 = FORS
    1250             :   { 362,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #362 = FPACK16
    1251             :   { 363,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #363 = FPACK32
    1252             :   { 364,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #364 = FPACKFIX
    1253             :   { 365,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #365 = FPADD16
    1254             :   { 366,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #366 = FPADD16S
    1255             :   { 367,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #367 = FPADD32
    1256             :   { 368,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #368 = FPADD32S
    1257             :   { 369,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #369 = FPADD64
    1258             :   { 370,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #370 = FPMERGE
    1259             :   { 371,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #371 = FPSUB16
    1260             :   { 372,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #372 = FPSUB16S
    1261             :   { 373,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #373 = FPSUB32
    1262             :   { 374,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #374 = FPSUB32S
    1263             :   { 375,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo69, -1 ,nullptr },  // Inst #375 = FQTOD
    1264             :   { 376,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #376 = FQTOI
    1265             :   { 377,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #377 = FQTOS
    1266             :   { 378,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo69, -1 ,nullptr },  // Inst #378 = FQTOX
    1267             :   { 379,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #379 = FSLAS16
    1268             :   { 380,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #380 = FSLAS32
    1269             :   { 381,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #381 = FSLL16
    1270             :   { 382,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #382 = FSLL32
    1271             :   { 383,        3,      1,      4,      8,      0, 0x0ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #383 = FSMULD
    1272             :   { 384,        2,      1,      4,      11,     0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #384 = FSQRTD
    1273             :   { 385,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #385 = FSQRTQ
    1274             :   { 386,        2,      1,      4,      12,     0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #386 = FSQRTS
    1275             :   { 387,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #387 = FSRA16
    1276             :   { 388,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #388 = FSRA32
    1277             :   { 389,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #389 = FSRC1
    1278             :   { 390,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #390 = FSRC1S
    1279             :   { 391,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #391 = FSRC2
    1280             :   { 392,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #392 = FSRC2S
    1281             :   { 393,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #393 = FSRL16
    1282             :   { 394,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #394 = FSRL32
    1283             :   { 395,        2,      1,      4,      13,     0, 0x0ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #395 = FSTOD
    1284             :   { 396,        2,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #396 = FSTOI
    1285             :   { 397,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #397 = FSTOQ
    1286             :   { 398,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #398 = FSTOX
    1287             :   { 399,        3,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #399 = FSUBD
    1288             :   { 400,        3,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #400 = FSUBQ
    1289             :   { 401,        3,      1,      4,      5,      0, 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #401 = FSUBS
    1290             :   { 402,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #402 = FXNOR
    1291             :   { 403,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #403 = FXNORS
    1292             :   { 404,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #404 = FXOR
    1293             :   { 405,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #405 = FXORS
    1294             :   { 406,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #406 = FXTOD
    1295             :   { 407,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #407 = FXTOQ
    1296             :   { 408,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #408 = FXTOS
    1297             :   { 409,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr },  // Inst #409 = FZERO
    1298             :   { 410,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo68, -1 ,nullptr },  // Inst #410 = FZEROS
    1299             :   { 411,        3,      1,      4,      3,      0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #411 = JMPLri
    1300             :   { 412,        3,      1,      4,      3,      0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #412 = JMPLrr
    1301             :   { 413,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #413 = LDArr
    1302             :   { 414,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList5, OperandInfo40, -1 ,nullptr },  // Inst #414 = LDCSRri
    1303             :   { 415,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList5, OperandInfo41, -1 ,nullptr },  // Inst #415 = LDCSRrr
    1304             :   { 416,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #416 = LDCri
    1305             :   { 417,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr },  // Inst #417 = LDCrr
    1306             :   { 418,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #418 = LDDArr
    1307             :   { 419,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #419 = LDDCri
    1308             :   { 420,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #420 = LDDCrr
    1309             :   { 421,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr },  // Inst #421 = LDDFArr
    1310             :   { 422,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr },  // Inst #422 = LDDFri
    1311             :   { 423,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #423 = LDDFrr
    1312             :   { 424,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #424 = LDDri
    1313             :   { 425,        3,      1,      4,      14,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #425 = LDDrr
    1314             :   { 426,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #426 = LDFArr
    1315             :   { 427,        2,      0,      4,      15,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo40, -1 ,nullptr },  // Inst #427 = LDFSRri
    1316             :   { 428,        2,      0,      4,      15,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo41, -1 ,nullptr },  // Inst #428 = LDFSRrr
    1317             :   { 429,        3,      1,      4,      15,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #429 = LDFri
    1318             :   { 430,        3,      1,      4,      15,     0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #430 = LDFrr
    1319             :   { 431,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #431 = LDQFArr
    1320             :   { 432,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #432 = LDQFri
    1321             :   { 433,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #433 = LDQFrr
    1322             :   { 434,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #434 = LDSBArr
    1323             :   { 435,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #435 = LDSBri
    1324             :   { 436,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #436 = LDSBrr
    1325             :   { 437,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #437 = LDSHArr
    1326             :   { 438,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #438 = LDSHri
    1327             :   { 439,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #439 = LDSHrr
    1328             :   { 440,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #440 = LDSTUBArr
    1329             :   { 441,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #441 = LDSTUBri
    1330             :   { 442,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #442 = LDSTUBrr
    1331             :   { 443,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #443 = LDSWri
    1332             :   { 444,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #444 = LDSWrr
    1333             :   { 445,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #445 = LDUBArr
    1334             :   { 446,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #446 = LDUBri
    1335             :   { 447,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #447 = LDUBrr
    1336             :   { 448,        4,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #448 = LDUHArr
    1337             :   { 449,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #449 = LDUHri
    1338             :   { 450,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #450 = LDUHrr
    1339             :   { 451,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo40, -1 ,nullptr },  // Inst #451 = LDXFSRri
    1340             :   { 452,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo41, -1 ,nullptr },  // Inst #452 = LDXFSRrr
    1341             :   { 453,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #453 = LDXri
    1342             :   { 454,        3,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #454 = LDXrr
    1343             :   { 455,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #455 = LDri
    1344             :   { 456,        3,      1,      4,      0,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #456 = LDrr
    1345             :   { 457,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #457 = LEAX_ADDri
    1346             :   { 458,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #458 = LEA_ADDri
    1347             :   { 459,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo93, -1 ,nullptr },  // Inst #459 = LZCNT
    1348             :   { 460,        1,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #460 = MEMBARi
    1349             :   { 461,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #461 = MOVDTOX
    1350             :   { 462,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList3, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #462 = MOVFCCri
    1351             :   { 463,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList3, nullptr, OperandInfo96, -1 ,nullptr },  // Inst #463 = MOVFCCrr
    1352             :   { 464,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #464 = MOVICCri
    1353             :   { 465,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo96, -1 ,nullptr },  // Inst #465 = MOVICCrr
    1354             :   { 466,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #466 = MOVRGEZri
    1355             :   { 467,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #467 = MOVRGEZrr
    1356             :   { 468,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #468 = MOVRGZri
    1357             :   { 469,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #469 = MOVRGZrr
    1358             :   { 470,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #470 = MOVRLEZri
    1359             :   { 471,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #471 = MOVRLEZrr
    1360             :   { 472,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #472 = MOVRLZri
    1361             :   { 473,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #473 = MOVRLZrr
    1362             :   { 474,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #474 = MOVRNZri
    1363             :   { 475,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #475 = MOVRNZrr
    1364             :   { 476,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #476 = MOVRRZri
    1365             :   { 477,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #477 = MOVRRZrr
    1366             :   { 478,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #478 = MOVSTOSW
    1367             :   { 479,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #479 = MOVSTOUW
    1368             :   { 480,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #480 = MOVWTOS
    1369             :   { 481,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #481 = MOVXCCri
    1370             :   { 482,        4,      1,      4,      0,      0, 0x0ULL, ImplicitList4, nullptr, OperandInfo96, -1 ,nullptr },  // Inst #482 = MOVXCCrr
    1371             :   { 483,        2,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #483 = MOVXTOD
    1372             :   { 484,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList7, ImplicitList7, OperandInfo36, -1 ,nullptr },  // Inst #484 = MULSCCri
    1373             :   { 485,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList7, ImplicitList7, OperandInfo37, -1 ,nullptr },  // Inst #485 = MULSCCrr
    1374             :   { 486,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #486 = MULXri
    1375             :   { 487,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #487 = MULXrr
    1376             :   { 488,        0,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #488 = NOP
    1377             :   { 489,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #489 = ORCCri
    1378             :   { 490,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #490 = ORCCrr
    1379             :   { 491,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #491 = ORNCCri
    1380             :   { 492,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #492 = ORNCCrr
    1381             :   { 493,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #493 = ORNri
    1382             :   { 494,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #494 = ORNrr
    1383             :   { 495,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #495 = ORXNrr
    1384             :   { 496,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #496 = ORXri
    1385             :   { 497,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #497 = ORXrr
    1386             :   { 498,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #498 = ORri
    1387             :   { 499,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #499 = ORrr
    1388             :   { 500,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #500 = PDIST
    1389             :   { 501,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #501 = PDISTN
    1390             :   { 502,        2,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #502 = POPCrr
    1391             :   { 503,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList8, OperandInfo49, -1 ,nullptr },  // Inst #503 = PWRPSRri
    1392             :   { 504,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList8, OperandInfo50, -1 ,nullptr },  // Inst #504 = PWRPSRrr
    1393             :   { 505,        2,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #505 = RDASR
    1394             :   { 506,        2,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #506 = RDPR
    1395             :   { 507,        1,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList8, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #507 = RDPSR
    1396             :   { 508,        1,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList9, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #508 = RDTBR
    1397             :   { 509,        1,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #509 = RDWIM
    1398             :   { 510,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #510 = RESTOREri
    1399             :   { 511,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #511 = RESTORErr
    1400             :   { 512,        1,      0,      4,      3,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #512 = RET
    1401             :   { 513,        1,      0,      4,      3,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #513 = RETL
    1402             :   { 514,        2,      0,      4,      3,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #514 = RETTri
    1403             :   { 515,        2,      0,      4,      3,      0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #515 = RETTrr
    1404             :   { 516,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #516 = SAVEri
    1405             :   { 517,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #517 = SAVErr
    1406             :   { 518,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList7, OperandInfo36, -1 ,nullptr },  // Inst #518 = SDIVCCri
    1407             :   { 519,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList7, OperandInfo37, -1 ,nullptr },  // Inst #519 = SDIVCCrr
    1408             :   { 520,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #520 = SDIVXri
    1409             :   { 521,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #521 = SDIVXrr
    1410             :   { 522,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList11, OperandInfo36, -1 ,nullptr },  // Inst #522 = SDIVri
    1411             :   { 523,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList11, OperandInfo37, -1 ,nullptr },  // Inst #523 = SDIVrr
    1412             :   { 524,        2,      1,      4,      0,      0, 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #524 = SETHIXi
    1413             :   { 525,        2,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #525 = SETHIi
    1414             :   { 526,        0,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #526 = SHUTDOWN
    1415             :   { 527,        0,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #527 = SIAM
    1416             :   { 528,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #528 = SLLXri
    1417             :   { 529,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #529 = SLLXrr
    1418             :   { 530,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #530 = SLLri
    1419             :   { 531,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #531 = SLLrr
    1420             :   { 532,        4,      1,      4,      17,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList12, OperandInfo103, -1 ,nullptr },  // Inst #532 = SMACri
    1421             :   { 533,        4,      1,      4,      17,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList12, OperandInfo104, -1 ,nullptr },  // Inst #533 = SMACrr
    1422             :   { 534,        3,      1,      4,      18,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo36, -1 ,nullptr },  // Inst #534 = SMULCCri
    1423             :   { 535,        3,      1,      4,      18,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo37, -1 ,nullptr },  // Inst #535 = SMULCCrr
    1424             :   { 536,        3,      1,      4,      18,     0, 0x0ULL, nullptr, ImplicitList11, OperandInfo36, -1 ,nullptr },  // Inst #536 = SMULri
    1425             :   { 537,        3,      1,      4,      18,     0, 0x0ULL, nullptr, ImplicitList11, OperandInfo37, -1 ,nullptr },  // Inst #537 = SMULrr
    1426             :   { 538,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #538 = SRAXri
    1427             :   { 539,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #539 = SRAXrr
    1428             :   { 540,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #540 = SRAri
    1429             :   { 541,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #541 = SRArr
    1430             :   { 542,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #542 = SRLXri
    1431             :   { 543,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #543 = SRLXrr
    1432             :   { 544,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #544 = SRLri
    1433             :   { 545,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #545 = SRLrr
    1434             :   { 546,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo105, -1 ,nullptr },  // Inst #546 = STArr
    1435             :   { 547,        0,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #547 = STBAR
    1436             :   { 548,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo105, -1 ,nullptr },  // Inst #548 = STBArr
    1437             :   { 549,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #549 = STBri
    1438             :   { 550,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #550 = STBrr
    1439             :   { 551,        2,      1,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList5, OperandInfo40, -1 ,nullptr },  // Inst #551 = STCSRri
    1440             :   { 552,        2,      1,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList5, OperandInfo41, -1 ,nullptr },  // Inst #552 = STCSRrr
    1441             :   { 553,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #553 = STCri
    1442             :   { 554,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #554 = STCrr
    1443             :   { 555,        4,      0,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo110, -1 ,nullptr },  // Inst #555 = STDArr
    1444             :   { 556,        2,      1,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList13, OperandInfo40, -1 ,nullptr },  // Inst #556 = STDCQri
    1445             :   { 557,        2,      1,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList13, OperandInfo41, -1 ,nullptr },  // Inst #557 = STDCQrr
    1446             :   { 558,        3,      0,      4,      20,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #558 = STDCri
    1447             :   { 559,        3,      0,      4,      20,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #559 = STDCrr
    1448             :   { 560,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #560 = STDFArr
    1449             :   { 561,        2,      1,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList14, OperandInfo40, -1 ,nullptr },  // Inst #561 = STDFQri
    1450             :   { 562,        2,      1,      4,      20,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList14, OperandInfo41, -1 ,nullptr },  // Inst #562 = STDFQrr
    1451             :   { 563,        3,      0,      4,      20,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #563 = STDFri
    1452             :   { 564,        3,      0,      4,      20,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #564 = STDFrr
    1453             :   { 565,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #565 = STDri
    1454             :   { 566,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #566 = STDrr
    1455             :   { 567,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr },  // Inst #567 = STFArr
    1456             :   { 568,        2,      1,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo40, -1 ,nullptr },  // Inst #568 = STFSRri
    1457             :   { 569,        2,      1,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo41, -1 ,nullptr },  // Inst #569 = STFSRrr
    1458             :   { 570,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #570 = STFri
    1459             :   { 571,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #571 = STFrr
    1460             :   { 572,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo105, -1 ,nullptr },  // Inst #572 = STHArr
    1461             :   { 573,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #573 = STHri
    1462             :   { 574,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #574 = STHrr
    1463             :   { 575,        4,      0,      4,      19,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #575 = STQFArr
    1464             :   { 576,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #576 = STQFri
    1465             :   { 577,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #577 = STQFrr
    1466             :   { 578,        2,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo40, -1 ,nullptr },  // Inst #578 = STXFSRri
    1467             :   { 579,        2,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo41, -1 ,nullptr },  // Inst #579 = STXFSRrr
    1468             :   { 580,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #580 = STXri
    1469             :   { 581,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #581 = STXrr
    1470             :   { 582,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #582 = STri
    1471             :   { 583,        3,      0,      4,      19,     0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #583 = STrr
    1472             :   { 584,        3,      1,      4,      1,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #584 = SUBCCri
    1473             :   { 585,        3,      1,      4,      1,      0, 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #585 = SUBCCrr
    1474             :   { 586,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #586 = SUBCri
    1475             :   { 587,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #587 = SUBCrr
    1476             :   { 588,        3,      1,      4,      1,      0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #588 = SUBEri
    1477             :   { 589,        3,      1,      4,      1,      0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #589 = SUBErr
    1478             :   { 590,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #590 = SUBXri
    1479             :   { 591,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #591 = SUBXrr
    1480             :   { 592,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #592 = SUBri
    1481             :   { 593,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #593 = SUBrr
    1482             :   { 594,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #594 = SWAPArr
    1483             :   { 595,        4,      1,      4,      1,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #595 = SWAPri
    1484             :   { 596,        4,      1,      4,      1,      0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #596 = SWAPrr
    1485             :   { 597,        0,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #597 = TA1
    1486             :   { 598,        0,      0,      4,      1,      0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #598 = TA3
    1487             :   { 599,        0,      0,      4,      1,      0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #599 = TA5
    1488             :   { 600,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #600 = TADDCCTVri
    1489             :   { 601,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #601 = TADDCCTVrr
    1490             :   { 602,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #602 = TADDCCri
    1491             :   { 603,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #603 = TADDCCrr
    1492             :   { 604,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #604 = TICCri
    1493             :   { 605,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #605 = TICCrr
    1494             :   { 606,        4,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #606 = TLS_ADDXrr
    1495             :   { 607,        4,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #607 = TLS_ADDrr
    1496             :   { 608,        2,      0,      4,      3,      0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #608 = TLS_CALL
    1497             :   { 609,        4,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #609 = TLS_LDXrr
    1498             :   { 610,        4,      1,      4,      1,      0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #610 = TLS_LDrr
    1499             :   { 611,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #611 = TRAPri
    1500             :   { 612,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #612 = TRAPrr
    1501             :   { 613,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #613 = TSUBCCTVri
    1502             :   { 614,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #614 = TSUBCCTVrr
    1503             :   { 615,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #615 = TSUBCCri
    1504             :   { 616,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #616 = TSUBCCrr
    1505             :   { 617,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #617 = TXCCri
    1506             :   { 618,        3,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #618 = TXCCrr
    1507             :   { 619,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList7, OperandInfo36, -1 ,nullptr },  // Inst #619 = UDIVCCri
    1508             :   { 620,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList7, OperandInfo37, -1 ,nullptr },  // Inst #620 = UDIVCCrr
    1509             :   { 621,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #621 = UDIVXri
    1510             :   { 622,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #622 = UDIVXrr
    1511             :   { 623,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList11, OperandInfo36, -1 ,nullptr },  // Inst #623 = UDIVri
    1512             :   { 624,        3,      1,      4,      16,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList11, OperandInfo37, -1 ,nullptr },  // Inst #624 = UDIVrr
    1513             :   { 625,        4,      1,      4,      17,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList12, OperandInfo103, -1 ,nullptr },  // Inst #625 = UMACri
    1514             :   { 626,        4,      1,      4,      17,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList12, OperandInfo104, -1 ,nullptr },  // Inst #626 = UMACrr
    1515             :   { 627,        3,      1,      4,      21,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo36, -1 ,nullptr },  // Inst #627 = UMULCCri
    1516             :   { 628,        3,      1,      4,      21,     0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList7, OperandInfo37, -1 ,nullptr },  // Inst #628 = UMULCCrr
    1517             :   { 629,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #629 = UMULXHI
    1518             :   { 630,        3,      1,      4,      21,     0, 0x0ULL, nullptr, ImplicitList11, OperandInfo36, -1 ,nullptr },  // Inst #630 = UMULri
    1519             :   { 631,        3,      1,      4,      21,     0, 0x0ULL, nullptr, ImplicitList11, OperandInfo37, -1 ,nullptr },  // Inst #631 = UMULrr
    1520             :   { 632,        1,      0,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #632 = UNIMP
    1521             :   { 633,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #633 = V9FCMPD
    1522             :   { 634,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #634 = V9FCMPED
    1523             :   { 635,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo133, -1 ,nullptr },  // Inst #635 = V9FCMPEQ
    1524             :   { 636,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #636 = V9FCMPES
    1525             :   { 637,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo133, -1 ,nullptr },  // Inst #637 = V9FCMPQ
    1526             :   { 638,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #638 = V9FCMPS
    1527             :   { 639,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #639 = V9FMOVD_FCC
    1528             :   { 640,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #640 = V9FMOVQ_FCC
    1529             :   { 641,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr },  // Inst #641 = V9FMOVS_FCC
    1530             :   { 642,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #642 = V9MOVFCCri
    1531             :   { 643,        5,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #643 = V9MOVFCCrr
    1532             :   { 644,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #644 = WRASRri
    1533             :   { 645,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo141, -1 ,nullptr },  // Inst #645 = WRASRrr
    1534             :   { 646,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr },  // Inst #646 = WRPRri
    1535             :   { 647,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo143, -1 ,nullptr },  // Inst #647 = WRPRrr
    1536             :   { 648,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList8, OperandInfo49, -1 ,nullptr },  // Inst #648 = WRPSRri
    1537             :   { 649,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList8, OperandInfo50, -1 ,nullptr },  // Inst #649 = WRPSRrr
    1538             :   { 650,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList9, OperandInfo49, -1 ,nullptr },  // Inst #650 = WRTBRri
    1539             :   { 651,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList9, OperandInfo50, -1 ,nullptr },  // Inst #651 = WRTBRrr
    1540             :   { 652,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList10, OperandInfo49, -1 ,nullptr },  // Inst #652 = WRWIMri
    1541             :   { 653,        2,      0,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList10, OperandInfo50, -1 ,nullptr },  // Inst #653 = WRWIMrr
    1542             :   { 654,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #654 = XMULX
    1543             :   { 655,        3,      1,      4,      0,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #655 = XMULXHI
    1544             :   { 656,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #656 = XNORCCri
    1545             :   { 657,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #657 = XNORCCrr
    1546             :   { 658,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #658 = XNORXrr
    1547             :   { 659,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #659 = XNORri
    1548             :   { 660,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #660 = XNORrr
    1549             :   { 661,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #661 = XORCCri
    1550             :   { 662,        3,      1,      4,      1,      0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo37, -1 ,nullptr },  // Inst #662 = XORCCrr
    1551             :   { 663,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #663 = XORXri
    1552             :   { 664,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #664 = XORXrr
    1553             :   { 665,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #665 = XORri
    1554             :   { 666,        3,      1,      4,      1,      0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #666 = XORrr
    1555             : };
    1556             : 
    1557             : extern const char SparcInstrNameData[] = {
    1558             :   /* 0 */ 'C', 'A', 'S', 'A', 'a', 's', 'i', '1', '0', 0,
    1559             :   /* 10 */ 'T', 'A', '1', 0,
    1560             :   /* 14 */ 'F', 'S', 'R', 'C', '1', 0,
    1561             :   /* 20 */ 'F', 'A', 'N', 'D', 'N', 'O', 'T', '1', 0,
    1562             :   /* 29 */ 'F', 'N', 'O', 'T', '1', 0,
    1563             :   /* 35 */ 'F', 'O', 'R', 'N', 'O', 'T', '1', 0,
    1564             :   /* 43 */ 'F', 'S', 'R', 'A', '3', '2', 0,
    1565             :   /* 50 */ 'F', 'P', 'S', 'U', 'B', '3', '2', 0,
    1566             :   /* 58 */ 'F', 'P', 'A', 'D', 'D', '3', '2', 0,
    1567             :   /* 66 */ 'E', 'D', 'G', 'E', '3', '2', 0,
    1568             :   /* 73 */ 'F', 'C', 'M', 'P', 'L', 'E', '3', '2', 0,
    1569             :   /* 82 */ 'F', 'C', 'M', 'P', 'N', 'E', '3', '2', 0,
    1570             :   /* 91 */ 'F', 'P', 'A', 'C', 'K', '3', '2', 0,
    1571             :   /* 99 */ 'C', 'M', 'A', 'S', 'K', '3', '2', 0,
    1572             :   /* 107 */ 'F', 'S', 'L', 'L', '3', '2', 0,
    1573             :   /* 114 */ 'F', 'S', 'R', 'L', '3', '2', 0,
    1574             :   /* 121 */ 'F', 'C', 'M', 'P', 'E', 'Q', '3', '2', 0,
    1575             :   /* 130 */ 'F', 'S', 'L', 'A', 'S', '3', '2', 0,
    1576             :   /* 138 */ 'F', 'C', 'M', 'P', 'G', 'T', '3', '2', 0,
    1577             :   /* 147 */ 'A', 'R', 'R', 'A', 'Y', '3', '2', 0,
    1578             :   /* 155 */ 'F', 'S', 'R', 'C', '2', 0,
    1579             :   /* 161 */ 'G', '_', 'F', 'L', 'O', 'G', '2', 0,
    1580             :   /* 169 */ 'G', '_', 'F', 'E', 'X', 'P', '2', 0,
    1581             :   /* 177 */ 'F', 'A', 'N', 'D', 'N', 'O', 'T', '2', 0,
    1582             :   /* 186 */ 'F', 'N', 'O', 'T', '2', 0,
    1583             :   /* 192 */ 'F', 'O', 'R', 'N', 'O', 'T', '2', 0,
    1584             :   /* 200 */ 'T', 'A', '3', 0,
    1585             :   /* 204 */ 'F', 'P', 'A', 'D', 'D', '6', '4', 0,
    1586             :   /* 212 */ 'T', 'A', '5', 0,
    1587             :   /* 216 */ 'F', 'S', 'R', 'A', '1', '6', 0,
    1588             :   /* 223 */ 'F', 'P', 'S', 'U', 'B', '1', '6', 0,
    1589             :   /* 231 */ 'F', 'P', 'A', 'D', 'D', '1', '6', 0,
    1590             :   /* 239 */ 'E', 'D', 'G', 'E', '1', '6', 0,
    1591             :   /* 246 */ 'F', 'C', 'M', 'P', 'L', 'E', '1', '6', 0,
    1592             :   /* 255 */ 'F', 'C', 'M', 'P', 'N', 'E', '1', '6', 0,
    1593             :   /* 264 */ 'F', 'P', 'A', 'C', 'K', '1', '6', 0,
    1594             :   /* 272 */ 'C', 'M', 'A', 'S', 'K', '1', '6', 0,
    1595             :   /* 280 */ 'F', 'S', 'L', 'L', '1', '6', 0,
    1596             :   /* 287 */ 'F', 'S', 'R', 'L', '1', '6', 0,
    1597             :   /* 294 */ 'F', 'C', 'H', 'K', 'S', 'M', '1', '6', 0,
    1598             :   /* 303 */ 'F', 'M', 'E', 'A', 'N', '1', '6', 0,
    1599             :   /* 311 */ 'F', 'C', 'M', 'P', 'E', 'Q', '1', '6', 0,
    1600             :   /* 320 */ 'F', 'S', 'L', 'A', 'S', '1', '6', 0,
    1601             :   /* 328 */ 'F', 'C', 'M', 'P', 'G', 'T', '1', '6', 0,
    1602             :   /* 337 */ 'F', 'M', 'U', 'L', '8', 'X', '1', '6', 0,
    1603             :   /* 346 */ 'F', 'M', 'U', 'L', 'D', '8', 'U', 'L', 'X', '1', '6', 0,
    1604             :   /* 358 */ 'F', 'M', 'U', 'L', '8', 'U', 'L', 'X', '1', '6', 0,
    1605             :   /* 369 */ 'F', 'M', 'U', 'L', 'D', '8', 'S', 'U', 'X', '1', '6', 0,
    1606             :   /* 381 */ 'F', 'M', 'U', 'L', '8', 'S', 'U', 'X', '1', '6', 0,
    1607             :   /* 392 */ 'A', 'R', 'R', 'A', 'Y', '1', '6', 0,
    1608             :   /* 400 */ 'E', 'D', 'G', 'E', '8', 0,
    1609             :   /* 406 */ 'C', 'M', 'A', 'S', 'K', '8', 0,
    1610             :   /* 413 */ 'A', 'R', 'R', 'A', 'Y', '8', 0,
    1611             :   /* 420 */ 'B', 'A', 0,
    1612             :   /* 423 */ 'B', 'P', 'F', 'C', 'C', 'A', 0,
    1613             :   /* 430 */ 'B', 'P', 'I', 'C', 'C', 'A', 0,
    1614             :   /* 437 */ 'B', 'P', 'X', 'C', 'C', 'A', 0,
    1615             :   /* 444 */ 'C', 'B', 'C', 'O', 'N', 'D', 'A', 0,
    1616             :   /* 452 */ 'F', 'B', 'C', 'O', 'N', 'D', 'A', 0,
    1617             :   /* 460 */ 'G', '_', 'F', 'M', 'A', 0,
    1618             :   /* 466 */ 'F', 'A', 'L', 'I', 'G', 'N', 'A', 'D', 'A', 'T', 'A', 0,
    1619             :   /* 478 */ 'G', '_', 'F', 'S', 'U', 'B', 0,
    1620             :   /* 485 */ 'G', '_', 'S', 'U', 'B', 0,
    1621             :   /* 491 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'S', 'U', 'B', 0,
    1622             :   /* 507 */ 'A', 'D', 'D', 'X', 'C', 'C', 'C', 0,
    1623             :   /* 515 */ 'B', 'P', 'F', 'C', 'C', 0,
    1624             :   /* 521 */ 'V', '9', 'F', 'M', 'O', 'V', 'D', '_', 'F', 'C', 'C', 0,
    1625             :   /* 533 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'D', 'F', 'P', '_', 'F', 'C', 'C', 0,
    1626             :   /* 551 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'F', 'P', '_', 'F', 'C', 'C', 0,
    1627             :   /* 569 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'F', 'P', '_', 'F', 'C', 'C', 0,
    1628             :   /* 586 */ 'V', '9', 'F', 'M', 'O', 'V', 'Q', '_', 'F', 'C', 'C', 0,
    1629             :   /* 598 */ 'V', '9', 'F', 'M', 'O', 'V', 'S', '_', 'F', 'C', 'C', 0,
    1630             :   /* 610 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'I', 'n', 't', '_', 'F', 'C', 'C', 0,
    1631             :   /* 628 */ 'B', 'P', 'I', 'C', 'C', 0,
    1632             :   /* 634 */ 'F', 'M', 'O', 'V', 'D', '_', 'I', 'C', 'C', 0,
    1633             :   /* 644 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'D', 'F', 'P', '_', 'I', 'C', 'C', 0,
    1634             :   /* 662 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'F', 'P', '_', 'I', 'C', 'C', 0,
    1635             :   /* 680 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'F', 'P', '_', 'I', 'C', 'C', 0,
    1636             :   /* 697 */ 'F', 'M', 'O', 'V', 'Q', '_', 'I', 'C', 'C', 0,
    1637             :   /* 707 */ 'F', 'M', 'O', 'V', 'S', '_', 'I', 'C', 'C', 0,
    1638             :   /* 717 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'I', 'n', 't', '_', 'I', 'C', 'C', 0,
    1639             :   /* 735 */ 'B', 'P', 'X', 'C', 'C', 0,
    1640             :   /* 741 */ 'F', 'M', 'O', 'V', 'D', '_', 'X', 'C', 'C', 0,
    1641             :   /* 751 */ 'F', 'M', 'O', 'V', 'Q', '_', 'X', 'C', 'C', 0,
    1642             :   /* 761 */ 'F', 'M', 'O', 'V', 'S', '_', 'X', 'C', 'C', 0,
    1643             :   /* 771 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', 0,
    1644             :   /* 783 */ 'G', '_', 'F', 'P', 'T', 'R', 'U', 'N', 'C', 0,
    1645             :   /* 793 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', '_', 'T', 'R', 'U', 'N', 'C', 0,
    1646             :   /* 811 */ 'G', '_', 'T', 'R', 'U', 'N', 'C', 0,
    1647             :   /* 819 */ 'A', 'D', 'D', 'X', 'C', 0,
    1648             :   /* 825 */ 'G', '_', 'S', 'E', 'X', 'T', 'L', 'O', 'A', 'D', 0,
    1649             :   /* 836 */ 'G', '_', 'Z', 'E', 'X', 'T', 'L', 'O', 'A', 'D', 0,
    1650             :   /* 847 */ 'G', '_', 'L', 'O', 'A', 'D', 0,
    1651             :   /* 854 */ 'F', 'S', 'U', 'B', 'D', 0,
    1652             :   /* 860 */ 'F', 'H', 'S', 'U', 'B', 'D', 0,
    1653             :   /* 867 */ 'G', '_', 'F', 'A', 'D', 'D', 0,
    1654             :   /* 874 */ 'G', '_', 'A', 'D', 'D', 0,
    1655             :   /* 880 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'A', 'D', 'D', 0,
    1656             :   /* 896 */ 'F', 'A', 'D', 'D', 'D', 0,
    1657             :   /* 902 */ 'F', 'H', 'A', 'D', 'D', 'D', 0,
    1658             :   /* 909 */ 'F', 'N', 'H', 'A', 'D', 'D', 'D', 0,
    1659             :   /* 917 */ 'F', 'N', 'A', 'D', 'D', 'D', 0,
    1660             :   /* 924 */ 'V', '9', 'F', 'C', 'M', 'P', 'E', 'D', 0,
    1661             :   /* 933 */ 'F', 'N', 'E', 'G', 'D', 0,
    1662             :   /* 939 */ 'F', 'M', 'U', 'L', 'D', 0,
    1663             :   /* 945 */ 'F', 'N', 'M', 'U', 'L', 'D', 0,
    1664             :   /* 952 */ 'F', 'S', 'M', 'U', 'L', 'D', 0,
    1665             :   /* 959 */ 'F', 'N', 'S', 'M', 'U', 'L', 'D', 0,
    1666             :   /* 967 */ 'F', 'A', 'N', 'D', 0,
    1667             :   /* 972 */ 'F', 'N', 'A', 'N', 'D', 0,
    1668             :   /* 978 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'N', 'A', 'N', 'D', 0,
    1669             :   /* 995 */ 'F', 'E', 'X', 'P', 'A', 'N', 'D', 0,
    1670             :   /* 1003 */ 'G', '_', 'A', 'N', 'D', 0,
    1671             :   /* 1009 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'A', 'N', 'D', 0,
    1672             :   /* 1025 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0,
    1673             :   /* 1038 */ 'C', 'B', 'C', 'O', 'N', 'D', 0,
    1674             :   /* 1045 */ 'F', 'B', 'C', 'O', 'N', 'D', 0,
    1675             :   /* 1052 */ 'G', '_', 'B', 'R', 'C', 'O', 'N', 'D', 0,
    1676             :   /* 1061 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', '_', 'R', 'O', 'U', 'N', 'D', 0,
    1677             :   /* 1079 */ 'F', 'I', 'T', 'O', 'D', 0,
    1678             :   /* 1085 */ 'F', 'Q', 'T', 'O', 'D', 0,
    1679             :   /* 1091 */ 'F', 'S', 'T', 'O', 'D', 0,
    1680             :   /* 1097 */ 'F', 'X', 'T', 'O', 'D', 0,
    1681             :   /* 1103 */ 'M', 'O', 'V', 'X', 'T', 'O', 'D', 0,
    1682             :   /* 1111 */ 'V', '9', 'F', 'C', 'M', 'P', 'D', 0,
    1683             :   /* 1119 */ 'F', 'L', 'C', 'M', 'P', 'D', 0,
    1684             :   /* 1126 */ 'L', 'O', 'A', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'G', 'U', 'A', 'R', 'D', 0,
    1685             :   /* 1143 */ 'F', 'A', 'B', 'S', 'D', 0,
    1686             :   /* 1149 */ 'F', 'S', 'Q', 'R', 'T', 'D', 0,
    1687             :   /* 1156 */ 'F', 'D', 'I', 'V', 'D', 0,
    1688             :   /* 1162 */ 'F', 'M', 'O', 'V', 'D', 0,
    1689             :   /* 1168 */ 'F', 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'D', 0,
    1690             :   /* 1178 */ 'F', 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'D', 0,
    1691             :   /* 1188 */ 'F', 'M', 'O', 'V', 'R', 'G', 'Z', 'D', 0,
    1692             :   /* 1197 */ 'F', 'M', 'O', 'V', 'R', 'L', 'Z', 'D', 0,
    1693             :   /* 1206 */ 'F', 'M', 'O', 'V', 'R', 'N', 'Z', 'D', 0,
    1694             :   /* 1215 */ 'F', 'M', 'O', 'V', 'R', 'Z', 'D', 0,
    1695             :   /* 1223 */ 'G', '_', 'S', 'S', 'U', 'B', 'E', 0,
    1696             :   /* 1231 */ 'G', '_', 'U', 'S', 'U', 'B', 'E', 0,
    1697             :   /* 1239 */ 'R', 'E', 'G', '_', 'S', 'E', 'Q', 'U', 'E', 'N', 'C', 'E', 0,
    1698             :   /* 1252 */ 'G', '_', 'S', 'A', 'D', 'D', 'E', 0,
    1699             :   /* 1260 */ 'G', '_', 'U', 'A', 'D', 'D', 'E', 0,
    1700             :   /* 1268 */ 'F', 'P', 'M', 'E', 'R', 'G', 'E', 0,
    1701             :   /* 1276 */ 'B', 'U', 'N', 'D', 'L', 'E', 0,
    1702             :   /* 1283 */ 'B', 'S', 'H', 'U', 'F', 'F', 'L', 'E', 0,
    1703             :   /* 1292 */ 'F', 'O', 'N', 'E', 0,
    1704             :   /* 1297 */ 'L', 'O', 'C', 'A', 'L', '_', 'E', 'S', 'C', 'A', 'P', 'E', 0,
    1705             :   /* 1310 */ 'G', '_', 'S', 'T', 'O', 'R', 'E', 0,
    1706             :   /* 1318 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0,
    1707             :   /* 1328 */ 'G', '_', 'G', 'L', 'O', 'B', 'A', 'L', '_', 'V', 'A', 'L', 'U', 'E', 0,
    1708             :   /* 1343 */ 'G', '_', 'C', 'T', 'L', 'Z', '_', 'Z', 'E', 'R', 'O', '_', 'U', 'N', 'D', 'E', 'F', 0,
    1709             :   /* 1361 */ 'G', '_', 'C', 'T', 'T', 'Z', '_', 'Z', 'E', 'R', 'O', '_', 'U', 'N', 'D', 'E', 'F', 0,
    1710             :   /* 1379 */ 'G', '_', 'I', 'M', 'P', 'L', 'I', 'C', 'I', 'T', '_', 'D', 'E', 'F', 0,
    1711             :   /* 1394 */ 'G', '_', 'F', 'N', 'E', 'G', 0,
    1712             :   /* 1401 */ 'E', 'X', 'T', 'R', 'A', 'C', 'T', '_', 'S', 'U', 'B', 'R', 'E', 'G', 0,
    1713             :   /* 1416 */ 'I', 'N', 'S', 'E', 'R', 'T', '_', 'S', 'U', 'B', 'R', 'E', 'G', 0,
    1714             :   /* 1430 */ 'S', 'U', 'B', 'R', 'E', 'G', '_', 'T', 'O', '_', 'R', 'E', 'G', 0,
    1715             :   /* 1444 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'M', 'P', 'X', 'C', 'H', 'G', 0,
    1716             :   /* 1461 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'X', 'C', 'H', 'G', 0,
    1717             :   /* 1478 */ 'G', '_', 'F', 'L', 'O', 'G', 0,
    1718             :   /* 1485 */ 'G', '_', 'V', 'A', 'A', 'R', 'G', 0,
    1719             :   /* 1493 */ 'G', '_', 'S', 'M', 'U', 'L', 'H', 0,
    1720             :   /* 1501 */ 'G', '_', 'U', 'M', 'U', 'L', 'H', 0,
    1721             :   /* 1509 */ 'F', 'L', 'U', 'S', 'H', 0,
    1722             :   /* 1515 */ 'G', '_', 'P', 'H', 'I', 0,
    1723             :   /* 1521 */ 'U', 'M', 'U', 'L', 'X', 'H', 'I', 0,
    1724             :   /* 1529 */ 'X', 'M', 'U', 'L', 'X', 'H', 'I', 0,
    1725             :   /* 1537 */ 'F', 'D', 'T', 'O', 'I', 0,
    1726             :   /* 1543 */ 'F', 'Q', 'T', 'O', 'I', 0,
    1727             :   /* 1549 */ 'F', 'S', 'T', 'O', 'I', 0,
    1728             :   /* 1555 */ 'G', '_', 'F', 'P', 'T', 'O', 'S', 'I', 0,
    1729             :   /* 1564 */ 'G', '_', 'F', 'P', 'T', 'O', 'U', 'I', 0,
    1730             :   /* 1573 */ 'B', 'M', 'A', 'S', 'K', 0,
    1731             :   /* 1579 */ 'G', '_', 'P', 'T', 'R', '_', 'M', 'A', 'S', 'K', 0,
    1732             :   /* 1590 */ 'E', 'D', 'G', 'E', '3', '2', 'L', 0,
    1733             :   /* 1598 */ 'E', 'D', 'G', 'E', '1', '6', 'L', 0,
    1734             :   /* 1606 */ 'E', 'D', 'G', 'E', '8', 'L', 0,
    1735             :   /* 1613 */ 'F', 'M', 'U', 'L', '8', 'X', '1', '6', 'A', 'L', 0,
    1736             :   /* 1624 */ 'G', 'C', '_', 'L', 'A', 'B', 'E', 'L', 0,
    1737             :   /* 1633 */ 'D', 'B', 'G', '_', 'L', 'A', 'B', 'E', 'L', 0,
    1738             :   /* 1643 */ 'E', 'H', '_', 'L', 'A', 'B', 'E', 'L', 0,
    1739             :   /* 1652 */ 'A', 'N', 'N', 'O', 'T', 'A', 'T', 'I', 'O', 'N', '_', 'L', 'A', 'B', 'E', 'L', 0,
    1740             :   /* 1669 */ 'I', 'C', 'A', 'L', 'L', '_', 'B', 'R', 'A', 'N', 'C', 'H', '_', 'F', 'U', 'N', 'N', 'E', 'L', 0,
    1741             :   /* 1689 */ 'G', '_', 'S', 'H', 'L', 0,
    1742             :   /* 1695 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'T', 'A', 'I', 'L', '_', 'C', 'A', 'L', 'L', 0,
    1743             :   /* 1715 */ 'T', 'L', 'S', '_', 'C', 'A', 'L', 'L', 0,
    1744             :   /* 1724 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'T', 'Y', 'P', 'E', 'D', '_', 'E', 'V', 'E', 'N', 'T', '_', 'C', 'A', 'L', 'L', 0,
    1745             :   /* 1751 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'E', 'V', 'E', 'N', 'T', '_', 'C', 'A', 'L', 'L', 0,
    1746             :   /* 1772 */ 'F', 'E', 'N', 'T', 'R', 'Y', '_', 'C', 'A', 'L', 'L', 0,
    1747             :   /* 1784 */ 'K', 'I', 'L', 'L', 0,
    1748             :   /* 1789 */ 'A', 'L', 'I', 'G', 'N', 'A', 'D', 'D', 'R', 'L', 0,
    1749             :   /* 1800 */ 'R', 'E', 'T', 'L', 0,
    1750             :   /* 1805 */ 'G', '_', 'F', 'M', 'U', 'L', 0,
    1751             :   /* 1812 */ 'G', '_', 'M', 'U', 'L', 0,
    1752             :   /* 1818 */ 'S', 'I', 'A', 'M', 0,
    1753             :   /* 1823 */ 'G', '_', 'F', 'R', 'E', 'M', 0,
    1754             :   /* 1830 */ 'G', '_', 'S', 'R', 'E', 'M', 0,
    1755             :   /* 1837 */ 'G', '_', 'U', 'R', 'E', 'M', 0,
    1756             :   /* 1844 */ 'R', 'D', 'W', 'I', 'M', 0,
    1757             :   /* 1850 */ 'I', 'N', 'L', 'I', 'N', 'E', 'A', 'S', 'M', 0,
    1758             :   /* 1860 */ 'E', 'D', 'G', 'E', '3', '2', 'N', 0,
    1759             :   /* 1868 */ 'E', 'D', 'G', 'E', '1', '6', 'N', 0,
    1760             :   /* 1876 */ 'E', 'D', 'G', 'E', '8', 'N', 0,
    1761             :   /* 1883 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'U', 'M', 'I', 'N', 0,
    1762             :   /* 1900 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'M', 'I', 'N', 0,
    1763             :   /* 1916 */ 'E', 'D', 'G', 'E', '3', '2', 'L', 'N', 0,
    1764             :   /* 1925 */ 'E', 'D', 'G', 'E', '1', '6', 'L', 'N', 0,
    1765             :   /* 1934 */ 'E', 'D', 'G', 'E', '8', 'L', 'N', 0,
    1766             :   /* 1942 */ 'C', 'F', 'I', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 0,
    1767             :   /* 1958 */ 'P', 'D', 'I', 'S', 'T', 'N', 0,
    1768             :   /* 1965 */ 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 0,
    1769             :   /* 1982 */ 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0,
    1770             :   /* 1991 */ 'G', '_', 'S', 'S', 'U', 'B', 'O', 0,
    1771             :   /* 1999 */ 'G', '_', 'U', 'S', 'U', 'B', 'O', 0,
    1772             :   /* 2007 */ 'G', '_', 'S', 'A', 'D', 'D', 'O', 0,
    1773             :   /* 2015 */ 'G', '_', 'U', 'A', 'D', 'D', 'O', 0,
    1774             :   /* 2023 */ 'G', '_', 'S', 'M', 'U', 'L', 'O', 0,
    1775             :   /* 2031 */ 'G', '_', 'U', 'M', 'U', 'L', 'O', 0,
    1776             :   /* 2039 */ 'F', 'Z', 'E', 'R', 'O', 0,
    1777             :   /* 2045 */ 'S', 'T', 'A', 'C', 'K', 'M', 'A', 'P', 0,
    1778             :   /* 2054 */ 'G', '_', 'B', 'S', 'W', 'A', 'P', 0,
    1779             :   /* 2062 */ 'G', '_', 'G', 'E', 'P', 0,
    1780             :   /* 2068 */ 'G', '_', 'S', 'I', 'T', 'O', 'F', 'P', 0,
    1781             :   /* 2077 */ 'G', '_', 'U', 'I', 'T', 'O', 'F', 'P', 0,
    1782             :   /* 2086 */ 'G', '_', 'F', 'C', 'M', 'P', 0,
    1783             :   /* 2093 */ 'G', '_', 'I', 'C', 'M', 'P', 0,
    1784             :   /* 2100 */ 'U', 'N', 'I', 'M', 'P', 0,
    1785             :   /* 2106 */ 'N', 'O', 'P', 0,
    1786             :   /* 2110 */ 'G', '_', 'C', 'T', 'P', 'O', 'P', 0,
    1787             :   /* 2118 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'O', 'P', 0,
    1788             :   /* 2131 */ 'F', 'A', 'U', 'L', 'T', 'I', 'N', 'G', '_', 'O', 'P', 0,
    1789             :   /* 2143 */ 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 0,
    1790             :   /* 2158 */ 'G', '_', 'F', 'E', 'X', 'P', 0,
    1791             :   /* 2165 */ 'F', 'S', 'U', 'B', 'Q', 0,
    1792             :   /* 2171 */ 'F', 'A', 'D', 'D', 'Q', 0,
    1793             :   /* 2177 */ 'V', '9', 'F', 'C', 'M', 'P', 'E', 'Q', 0,
    1794             :   /* 2186 */ 'F', 'N', 'E', 'G', 'Q', 0,
    1795             :   /* 2192 */ 'F', 'D', 'M', 'U', 'L', 'Q', 0,
    1796             :   /* 2199 */ 'F', 'M', 'U', 'L', 'Q', 0,
    1797             :   /* 2205 */ 'F', 'D', 'T', 'O', 'Q', 0,
    1798             :   /* 2211 */ 'F', 'I', 'T', 'O', 'Q', 0,
    1799             :   /* 2217 */ 'F', 'S', 'T', 'O', 'Q', 0,
    1800             :   /* 2223 */ 'F', 'X', 'T', 'O', 'Q', 0,
    1801             :   /* 2229 */ 'V', '9', 'F', 'C', 'M', 'P', 'Q', 0,
    1802             :   /* 2237 */ 'F', 'A', 'B', 'S', 'Q', 0,
    1803             :   /* 2243 */ 'F', 'S', 'Q', 'R', 'T', 'Q', 0,
    1804             :   /* 2250 */ 'F', 'D', 'I', 'V', 'Q', 0,
    1805             :   /* 2256 */ 'F', 'M', 'O', 'V', 'Q', 0,
    1806             :   /* 2262 */ 'F', 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'Q', 0,
    1807             :   /* 2272 */ 'F', 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'Q', 0,
    1808             :   /* 2282 */ 'F', 'M', 'O', 'V', 'R', 'G', 'Z', 'Q', 0,
    1809             :   /* 2291 */ 'F', 'M', 'O', 'V', 'R', 'L', 'Z', 'Q', 0,
    1810             :   /* 2300 */ 'F', 'M', 'O', 'V', 'R', 'N', 'Z', 'Q', 0,
    1811             :   /* 2309 */ 'F', 'M', 'O', 'V', 'R', 'Z', 'Q', 0,
    1812             :   /* 2317 */ 'S', 'T', 'B', 'A', 'R', 0,
    1813             :   /* 2323 */ 'R', 'D', 'T', 'B', 'R', 0,
    1814             :   /* 2329 */ 'G', '_', 'B', 'R', 0,
    1815             :   /* 2334 */ 'A', 'L', 'I', 'G', 'N', 'A', 'D', 'D', 'R', 0,
    1816             :   /* 2344 */ 'G', '_', 'B', 'L', 'O', 'C', 'K', '_', 'A', 'D', 'D', 'R', 0,
    1817             :   /* 2357 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '_', 'E', 'N', 'T', 'E', 'R', 0,
    1818             :   /* 2382 */ 'G', '_', 'A', 'S', 'H', 'R', 0,
    1819             :   /* 2389 */ 'G', '_', 'L', 'S', 'H', 'R', 0,
    1820             :   /* 2396 */ 'F', 'O', 'R', 0,
    1821             :   /* 2400 */ 'F', 'N', 'O', 'R', 0,
    1822             :   /* 2405 */ 'F', 'X', 'N', 'O', 'R', 0,
    1823             :   /* 2411 */ 'G', '_', 'S', 'H', 'U', 'F', 'F', 'L', 'E', '_', 'V', 'E', 'C', 'T', 'O', 'R', 0,
    1824             :   /* 2428 */ 'F', 'X', 'O', 'R', 0,
    1825             :   /* 2433 */ 'G', '_', 'X', 'O', 'R', 0,
    1826             :   /* 2439 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'X', 'O', 'R', 0,
    1827             :   /* 2455 */ 'G', '_', 'O', 'R', 0,
    1828             :   /* 2460 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'O', 'R', 0,
    1829             :   /* 2475 */ 'R', 'D', 'P', 'R', 0,
    1830             :   /* 2480 */ 'R', 'D', 'A', 'S', 'R', 0,
    1831             :   /* 2486 */ 'R', 'D', 'P', 'S', 'R', 0,
    1832             :   /* 2492 */ 'G', '_', 'I', 'N', 'T', 'T', 'O', 'P', 'T', 'R', 0,
    1833             :   /* 2503 */ 'F', 'S', 'R', 'C', '1', 'S', 0,
    1834             :   /* 2510 */ 'F', 'A', 'N', 'D', 'N', 'O', 'T', '1', 'S', 0,
    1835             :   /* 2520 */ 'F', 'N', 'O', 'T', '1', 'S', 0,
    1836             :   /* 2527 */ 'F', 'O', 'R', 'N', 'O', 'T', '1', 'S', 0,
    1837             :   /* 2536 */ 'F', 'P', 'S', 'U', 'B', '3', '2', 'S', 0,
    1838             :   /* 2545 */ 'F', 'P', 'A', 'D', 'D', '3', '2', 'S', 0,
    1839             :   /* 2554 */ 'F', 'S', 'R', 'C', '2', 'S', 0,
    1840             :   /* 2561 */ 'F', 'A', 'N', 'D', 'N', 'O', 'T', '2', 'S', 0,
    1841             :   /* 2571 */ 'F', 'N', 'O', 'T', '2', 'S', 0,
    1842             :   /* 2578 */ 'F', 'O', 'R', 'N', 'O', 'T', '2', 'S', 0,
    1843             :   /* 2587 */ 'F', 'P', 'S', 'U', 'B', '1', '6', 'S', 0,
    1844             :   /* 2596 */ 'F', 'P', 'A', 'D', 'D', '1', '6', 'S', 0,
    1845             :   /* 2605 */ 'G', '_', 'F', 'A', 'B', 'S', 0,
    1846             :   /* 2612 */ 'F', 'S', 'U', 'B', 'S', 0,
    1847             :   /* 2618 */ 'F', 'H', 'S', 'U', 'B', 'S', 0,
    1848             :   /* 2625 */ 'F', 'A', 'D', 'D', 'S', 0,
    1849             :   /* 2631 */ 'F', 'H', 'A', 'D', 'D', 'S', 0,
    1850             :   /* 2638 */ 'F', 'N', 'H', 'A', 'D', 'D', 'S', 0,
    1851             :   /* 2646 */ 'F', 'N', 'A', 'D', 'D', 'S', 0,
    1852             :   /* 2653 */ 'F', 'A', 'N', 'D', 'S', 0,
    1853             :   /* 2659 */ 'F', 'N', 'A', 'N', 'D', 'S', 0,
    1854             :   /* 2666 */ 'F', 'O', 'N', 'E', 'S', 0,
    1855             :   /* 2672 */ 'V', '9', 'F', 'C', 'M', 'P', 'E', 'S', 0,
    1856             :   /* 2681 */ 'G', '_', 'U', 'N', 'M', 'E', 'R', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', 'S', 0,
    1857             :   /* 2698 */ 'G', '_', 'M', 'E', 'R', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', 'S', 0,
    1858             :   /* 2713 */ 'F', 'N', 'E', 'G', 'S', 0,
    1859             :   /* 2719 */ 'F', 'M', 'U', 'L', 'S', 0,
    1860             :   /* 2725 */ 'F', 'N', 'M', 'U', 'L', 'S', 0,
    1861             :   /* 2732 */ 'F', 'Z', 'E', 'R', 'O', 'S', 0,
    1862             :   /* 2739 */ 'F', 'D', 'T', 'O', 'S', 0,
    1863             :   /* 2745 */ 'F', 'I', 'T', 'O', 'S', 0,
    1864             :   /* 2751 */ 'F', 'Q', 'T', 'O', 'S', 0,
    1865             :   /* 2757 */ 'M', 'O', 'V', 'W', 'T', 'O', 'S', 0,
    1866             :   /* 2765 */ 'F', 'X', 'T', 'O', 'S', 0,
    1867             :   /* 2771 */ 'V', '9', 'F', 'C', 'M', 'P', 'S', 0,
    1868             :   /* 2779 */ 'F', 'L', 'C', 'M', 'P', 'S', 0,
    1869             :   /* 2786 */ 'F', 'O', 'R', 'S', 0,
    1870             :   /* 2791 */ 'F', 'N', 'O', 'R', 'S', 0,
    1871             :   /* 2797 */ 'F', 'X', 'N', 'O', 'R', 'S', 0,
    1872             :   /* 2804 */ 'F', 'X', 'O', 'R', 'S', 0,
    1873             :   /* 2810 */ 'C', 'O', 'P', 'Y', '_', 'T', 'O', '_', 'R', 'E', 'G', 'C', 'L', 'A', 'S', 'S', 0,
    1874             :   /* 2827 */ 'F', 'A', 'B', 'S', 'S', 0,
    1875             :   /* 2833 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'M', 'P', 'X', 'C', 'H', 'G', '_', 'W', 'I', 'T', 'H', '_', 'S', 'U', 'C', 'C', 'E', 'S', 'S', 0,
    1876             :   /* 2863 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', '_', 'W', '_', 'S', 'I', 'D', 'E', '_', 'E', 'F', 'F', 'E', 'C', 'T', 'S', 0,
    1877             :   /* 2890 */ 'F', 'S', 'Q', 'R', 'T', 'S', 0,
    1878             :   /* 2897 */ 'F', 'D', 'I', 'V', 'S', 0,
    1879             :   /* 2903 */ 'F', 'M', 'O', 'V', 'S', 0,
    1880             :   /* 2909 */ 'F', 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'S', 0,
    1881             :   /* 2919 */ 'F', 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'S', 0,
    1882             :   /* 2929 */ 'F', 'M', 'O', 'V', 'R', 'G', 'Z', 'S', 0,
    1883             :   /* 2938 */ 'F', 'M', 'O', 'V', 'R', 'L', 'Z', 'S', 0,
    1884             :   /* 2947 */ 'F', 'M', 'O', 'V', 'R', 'N', 'Z', 'S', 0,
    1885             :   /* 2956 */ 'F', 'M', 'O', 'V', 'R', 'Z', 'S', 0,
    1886             :   /* 2964 */ 'G', '_', 'E', 'X', 'T', 'R', 'A', 'C', 'T', 0,
    1887             :   /* 2974 */ 'G', '_', 'S', 'E', 'L', 'E', 'C', 'T', 0,
    1888             :   /* 2983 */ 'G', '_', 'B', 'R', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', 0,
    1889             :   /* 2996 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'R', 'E', 'T', 0,
    1890             :   /* 3010 */ 'S', 'E', 'T', 0,
    1891             :   /* 3014 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '_', 'E', 'X', 'I', 'T', 0,
    1892             :   /* 3038 */ 'G', '_', 'E', 'X', 'T', 'R', 'A', 'C', 'T', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'L', 'T', 0,
    1893             :   /* 3059 */ 'G', '_', 'I', 'N', 'S', 'E', 'R', 'T', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'L', 'T', 0,
    1894             :   /* 3079 */ 'B', 'P', 'F', 'C', 'C', 'A', 'N', 'T', 0,
    1895             :   /* 3088 */ 'B', 'P', 'I', 'C', 'C', 'A', 'N', 'T', 0,
    1896             :   /* 3097 */ 'B', 'P', 'X', 'C', 'C', 'A', 'N', 'T', 0,
    1897             :   /* 3106 */ 'G', '_', 'F', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 0,
    1898             :   /* 3118 */ 'G', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 0,
    1899             :   /* 3129 */ 'B', 'P', 'F', 'C', 'C', 'N', 'T', 0,
    1900             :   /* 3137 */ 'B', 'P', 'I', 'C', 'C', 'N', 'T', 0,
    1901             :   /* 3145 */ 'B', 'P', 'X', 'C', 'C', 'N', 'T', 0,
    1902             :   /* 3153 */ 'L', 'Z', 'C', 'N', 'T', 0,
    1903             :   /* 3159 */ 'S', 'T', 'A', 'T', 'E', 'P', 'O', 'I', 'N', 'T', 0,
    1904             :   /* 3170 */ 'P', 'A', 'T', 'C', 'H', 'P', 'O', 'I', 'N', 'T', 0,
    1905             :   /* 3181 */ 'G', '_', 'P', 'T', 'R', 'T', 'O', 'I', 'N', 'T', 0,
    1906             :   /* 3192 */ 'G', '_', 'V', 'A', 'S', 'T', 'A', 'R', 'T', 0,
    1907             :   /* 3202 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0,
    1908             :   /* 3217 */ 'G', '_', 'I', 'N', 'S', 'E', 'R', 'T', 0,
    1909             :   /* 3226 */ 'G', '_', 'B', 'I', 'T', 'C', 'A', 'S', 'T', 0,
    1910             :   /* 3236 */ 'G', '_', 'A', 'D', 'D', 'R', 'S', 'P', 'A', 'C', 'E', '_', 'C', 'A', 'S', 'T', 0,
    1911             :   /* 3253 */ 'P', 'D', 'I', 'S', 'T', 0,
    1912             :   /* 3259 */ 'G', '_', 'F', 'P', 'E', 'X', 'T', 0,
    1913             :   /* 3267 */ 'G', '_', 'S', 'E', 'X', 'T', 0,
    1914             :   /* 3274 */ 'G', '_', 'A', 'N', 'Y', 'E', 'X', 'T', 0,
    1915             :   /* 3283 */ 'G', '_', 'Z', 'E', 'X', 'T', 0,
    1916             :   /* 3290 */ 'F', 'M', 'U', 'L', '8', 'X', '1', '6', 'A', 'U', 0,
    1917             :   /* 3301 */ 'G', '_', 'F', 'D', 'I', 'V', 0,
    1918             :   /* 3308 */ 'G', '_', 'S', 'D', 'I', 'V', 0,
    1919             :   /* 3315 */ 'G', '_', 'U', 'D', 'I', 'V', 0,
    1920             :   /* 3322 */ 'F', 'L', 'U', 'S', 'H', 'W', 0,
    1921             :   /* 3329 */ 'G', '_', 'F', 'P', 'O', 'W', 0,
    1922             :   /* 3336 */ 'M', 'O', 'V', 'S', 'T', 'O', 'S', 'W', 0,
    1923             :   /* 3345 */ 'M', 'O', 'V', 'S', 'T', 'O', 'U', 'W', 0,
    1924             :   /* 3354 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'U', 'M', 'A', 'X', 0,
    1925             :   /* 3371 */ 'G', '_', 'A', 'T', 'O', 'M', 'I', 'C', 'R', 'M', 'W', '_', 'M', 'A', 'X', 0,
    1926             :   /* 3387 */ 'G', 'E', 'T', 'P', 'C', 'X', 0,
    1927             :   /* 3394 */ 'G', '_', 'F', 'R', 'A', 'M', 'E', '_', 'I', 'N', 'D', 'E', 'X', 0,
    1928             :   /* 3408 */ 'F', 'P', 'A', 'C', 'K', 'F', 'I', 'X', 0,
    1929             :   /* 3417 */ 'X', 'M', 'U', 'L', 'X', 0,
    1930             :   /* 3423 */ 'F', 'D', 'T', 'O', 'X', 0,
    1931             :   /* 3429 */ 'M', 'O', 'V', 'D', 'T', 'O', 'X', 0,
    1932             :   /* 3437 */ 'F', 'Q', 'T', 'O', 'X', 0,
    1933             :   /* 3443 */ 'F', 'S', 'T', 'O', 'X', 0,
    1934             :   /* 3449 */ 'C', 'O', 'P', 'Y', 0,
    1935             :   /* 3454 */ 'G', '_', 'C', 'T', 'L', 'Z', 0,
    1936             :   /* 3461 */ 'G', '_', 'C', 'T', 'T', 'Z', 0,
    1937             :   /* 3468 */ 'S', 'E', 'T', 'H', 'I', 'i', 0,
    1938             :   /* 3475 */ 'M', 'E', 'M', 'B', 'A', 'R', 'i', 0,
    1939             :   /* 3483 */ 'S', 'E', 'T', 'H', 'I', 'X', 'i', 0,
    1940             :   /* 3491 */ 'S', 'R', 'A', 'r', 'i', 0,
    1941             :   /* 3497 */ 'L', 'D', 'S', 'B', 'r', 'i', 0,
    1942             :   /* 3504 */ 'S', 'T', 'B', 'r', 'i', 0,
    1943             :   /* 3510 */ 'L', 'D', 'U', 'B', 'r', 'i', 0,
    1944             :   /* 3517 */ 'S', 'U', 'B', 'r', 'i', 0,
    1945             :   /* 3523 */ 'L', 'D', 'S', 'T', 'U', 'B', 'r', 'i', 0,
    1946             :   /* 3532 */ 'S', 'M', 'A', 'C', 'r', 'i', 0,
    1947             :   /* 3539 */ 'U', 'M', 'A', 'C', 'r', 'i', 0,
    1948             :   /* 3546 */ 'S', 'U', 'B', 'C', 'r', 'i', 0,
    1949             :   /* 3553 */ 'T', 'S', 'U', 'B', 'C', 'C', 'r', 'i', 0,
    1950             :   /* 3562 */ 'T', 'A', 'D', 'D', 'C', 'C', 'r', 'i', 0,
    1951             :   /* 3571 */ 'A', 'N', 'D', 'C', 'C', 'r', 'i', 0,
    1952             :   /* 3579 */ 'V', '9', 'M', 'O', 'V', 'F', 'C', 'C', 'r', 'i', 0,
    1953             :   /* 3590 */ 'T', 'I', 'C', 'C', 'r', 'i', 0,
    1954             :   /* 3597 */ 'M', 'O', 'V', 'I', 'C', 'C', 'r', 'i', 0,
    1955             :   /* 3606 */ 'S', 'M', 'U', 'L', 'C', 'C', 'r', 'i', 0,
    1956             :   /* 3615 */ 'U', 'M', 'U', 'L', 'C', 'C', 'r', 'i', 0,
    1957             :   /* 3624 */ 'A', 'N', 'D', 'N', 'C', 'C', 'r', 'i', 0,
    1958             :   /* 3633 */ 'O', 'R', 'N', 'C', 'C', 'r', 'i', 0,
    1959             :   /* 3641 */ 'X', 'N', 'O', 'R', 'C', 'C', 'r', 'i', 0,
    1960             :   /* 3650 */ 'X', 'O', 'R', 'C', 'C', 'r', 'i', 0,
    1961             :   /* 3658 */ 'M', 'U', 'L', 'S', 'C', 'C', 'r', 'i', 0,
    1962             :   /* 3667 */ 'S', 'D', 'I', 'V', 'C', 'C', 'r', 'i', 0,
    1963             :   /* 3676 */ 'U', 'D', 'I', 'V', 'C', 'C', 'r', 'i', 0,
    1964             :   /* 3685 */ 'T', 'X', 'C', 'C', 'r', 'i', 0,
    1965             :   /* 3692 */ 'M', 'O', 'V', 'X', 'C', 'C', 'r', 'i', 0,
    1966             :   /* 3701 */ 'A', 'D', 'D', 'C', 'r', 'i', 0,
    1967             :   /* 3708 */ 'L', 'D', 'D', 'C', 'r', 'i', 0,
    1968             :   /* 3715 */ 'L', 'D', 'C', 'r', 'i', 0,
    1969             :   /* 3721 */ 'S', 'T', 'D', 'C', 'r', 'i', 0,
    1970             :   /* 3728 */ 'S', 'T', 'C', 'r', 'i', 0,
    1971             :   /* 3734 */ 'L', 'E', 'A', '_', 'A', 'D', 'D', 'r', 'i', 0,
    1972             :   /* 3744 */ 'L', 'E', 'A', 'X', '_', 'A', 'D', 'D', 'r', 'i', 0,
    1973             :   /* 3755 */ 'L', 'D', 'D', 'r', 'i', 0,
    1974             :   /* 3761 */ 'L', 'D', 'r', 'i', 0,
    1975             :   /* 3766 */ 'A', 'N', 'D', 'r', 'i', 0,
    1976             :   /* 3772 */ 'B', 'I', 'N', 'D', 'r', 'i', 0,
    1977             :   /* 3779 */ 'S', 'T', 'D', 'r', 'i', 0,
    1978             :   /* 3785 */ 'S', 'U', 'B', 'E', 'r', 'i', 0,
    1979             :   /* 3792 */ 'A', 'D', 'D', 'E', 'r', 'i', 0,
    1980             :   /* 3799 */ 'R', 'E', 'S', 'T', 'O', 'R', 'E', 'r', 'i', 0,
    1981             :   /* 3809 */ 'S', 'A', 'V', 'E', 'r', 'i', 0,
    1982             :   /* 3816 */ 'L', 'D', 'D', 'F', 'r', 'i', 0,
    1983             :   /* 3823 */ 'L', 'D', 'F', 'r', 'i', 0,
    1984             :   /* 3829 */ 'S', 'T', 'D', 'F', 'r', 'i', 0,
    1985             :   /* 3836 */ 'L', 'D', 'Q', 'F', 'r', 'i', 0,
    1986             :   /* 3843 */ 'S', 'T', 'Q', 'F', 'r', 'i', 0,
    1987             :   /* 3850 */ 'S', 'T', 'F', 'r', 'i', 0,
    1988             :   /* 3856 */ 'L', 'D', 'S', 'H', 'r', 'i', 0,
    1989             :   /* 3863 */ 'F', 'L', 'U', 'S', 'H', 'r', 'i', 0,
    1990             :   /* 3871 */ 'S', 'T', 'H', 'r', 'i', 0,
    1991             :   /* 3877 */ 'L', 'D', 'U', 'H', 'r', 'i', 0,
    1992             :   /* 3884 */ 'C', 'A', 'L', 'L', 'r', 'i', 0,
    1993             :   /* 3891 */ 'S', 'L', 'L', 'r', 'i', 0,
    1994             :   /* 3897 */ 'J', 'M', 'P', 'L', 'r', 'i', 0,
    1995             :   /* 3904 */ 'S', 'R', 'L', 'r', 'i', 0,
    1996             :   /* 3910 */ 'S', 'M', 'U', 'L', 'r', 'i', 0,
    1997             :   /* 3917 */ 'U', 'M', 'U', 'L', 'r', 'i', 0,
    1998             :   /* 3924 */ 'W', 'R', 'W', 'I', 'M', 'r', 'i', 0,
    1999             :   /* 3932 */ 'A', 'N', 'D', 'N', 'r', 'i', 0,
    2000             :   /* 3939 */ 'O', 'R', 'N', 'r', 'i', 0,
    2001             :   /* 3945 */ 'T', 'R', 'A', 'P', 'r', 'i', 0,
    2002             :   /* 3952 */ 'S', 'W', 'A', 'P', 'r', 'i', 0,
    2003             :   /* 3959 */ 'C', 'M', 'P', 'r', 'i', 0,
    2004             :   /* 3965 */ 'S', 'T', 'D', 'C', 'Q', 'r', 'i', 0,
    2005             :   /* 3973 */ 'S', 'T', 'D', 'F', 'Q', 'r', 'i', 0,
    2006             :   /* 3981 */ 'W', 'R', 'T', 'B', 'R', 'r', 'i', 0,
    2007             :   /* 3989 */ 'X', 'N', 'O', 'R', 'r', 'i', 0,
    2008             :   /* 3996 */ 'X', 'O', 'R', 'r', 'i', 0,
    2009             :   /* 4002 */ 'W', 'R', 'P', 'R', 'r', 'i', 0,
    2010             :   /* 4009 */ 'W', 'R', 'A', 'S', 'R', 'r', 'i', 0,
    2011             :   /* 4017 */ 'L', 'D', 'C', 'S', 'R', 'r', 'i', 0,
    2012             :   /* 4025 */ 'S', 'T', 'C', 'S', 'R', 'r', 'i', 0,
    2013             :   /* 4033 */ 'L', 'D', 'F', 'S', 'R', 'r', 'i', 0,
    2014             :   /* 4041 */ 'S', 'T', 'F', 'S', 'R', 'r', 'i', 0,
    2015             :   /* 4049 */ 'L', 'D', 'X', 'F', 'S', 'R', 'r', 'i', 0,
    2016             :   /* 4058 */ 'S', 'T', 'X', 'F', 'S', 'R', 'r', 'i', 0,
    2017             :   /* 4067 */ 'P', 'W', 'R', 'P', 'S', 'R', 'r', 'i', 0,
    2018             :   /* 4076 */ 'S', 'T', 'r', 'i', 0,
    2019             :   /* 4081 */ 'R', 'E', 'T', 'T', 'r', 'i', 0,
    2020             :   /* 4088 */ 'S', 'D', 'I', 'V', 'r', 'i', 0,
    2021             :   /* 4095 */ 'U', 'D', 'I', 'V', 'r', 'i', 0,
    2022             :   /* 4102 */ 'T', 'S', 'U', 'B', 'C', 'C', 'T', 'V', 'r', 'i', 0,
    2023             :   /* 4113 */ 'T', 'A', 'D', 'D', 'C', 'C', 'T', 'V', 'r', 'i', 0,
    2024             :   /* 4124 */ 'L', 'D', 'S', 'W', 'r', 'i', 0,
    2025             :   /* 4131 */ 'S', 'R', 'A', 'X', 'r', 'i', 0,
    2026             :   /* 4138 */ 'S', 'U', 'B', 'X', 'r', 'i', 0,
    2027             :   /* 4145 */ 'A', 'D', 'D', 'X', 'r', 'i', 0,
    2028             :   /* 4152 */ 'L', 'D', 'X', 'r', 'i', 0,
    2029             :   /* 4158 */ 'A', 'N', 'D', 'X', 'r', 'i', 0,
    2030             :   /* 4165 */ 'S', 'L', 'L', 'X', 'r', 'i', 0,
    2031             :   /* 4172 */ 'S', 'R', 'L', 'X', 'r', 'i', 0,
    2032             :   /* 4179 */ 'M', 'U', 'L', 'X', 'r', 'i', 0,
    2033             :   /* 4186 */ 'X', 'O', 'R', 'X', 'r', 'i', 0,
    2034             :   /* 4193 */ 'S', 'T', 'X', 'r', 'i', 0,
    2035             :   /* 4199 */ 'S', 'D', 'I', 'V', 'X', 'r', 'i', 0,
    2036             :   /* 4207 */ 'U', 'D', 'I', 'V', 'X', 'r', 'i', 0,
    2037             :   /* 4215 */ 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'r', 'i', 0,
    2038             :   /* 4225 */ 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'r', 'i', 0,
    2039             :   /* 4235 */ 'M', 'O', 'V', 'R', 'G', 'Z', 'r', 'i', 0,
    2040             :   /* 4244 */ 'M', 'O', 'V', 'R', 'L', 'Z', 'r', 'i', 0,
    2041             :   /* 4253 */ 'M', 'O', 'V', 'R', 'N', 'Z', 'r', 'i', 0,
    2042             :   /* 4262 */ 'M', 'O', 'V', 'R', 'R', 'Z', 'r', 'i', 0,
    2043             :   /* 4271 */ 'B', 'P', 'G', 'E', 'Z', 'a', 'p', 'n', 0,
    2044             :   /* 4280 */ 'B', 'P', 'L', 'E', 'Z', 'a', 'p', 'n', 0,
    2045             :   /* 4289 */ 'B', 'P', 'G', 'Z', 'a', 'p', 'n', 0,
    2046             :   /* 4297 */ 'B', 'P', 'L', 'Z', 'a', 'p', 'n', 0,
    2047             :   /* 4305 */ 'B', 'P', 'N', 'Z', 'a', 'p', 'n', 0,
    2048             :   /* 4313 */ 'B', 'P', 'Z', 'a', 'p', 'n', 0,
    2049             :   /* 4320 */ 'B', 'P', 'G', 'E', 'Z', 'n', 'a', 'p', 'n', 0,
    2050             :   /* 4330 */ 'B', 'P', 'L', 'E', 'Z', 'n', 'a', 'p', 'n', 0,
    2051             :   /* 4340 */ 'B', 'P', 'G', 'Z', 'n', 'a', 'p', 'n', 0,
    2052             :   /* 4349 */ 'B', 'P', 'L', 'Z', 'n', 'a', 'p', 'n', 0,
    2053             :   /* 4358 */ 'B', 'P', 'N', 'Z', 'n', 'a', 'p', 'n', 0,
    2054             :   /* 4367 */ 'B', 'P', 'Z', 'n', 'a', 'p', 'n', 0,
    2055             :   /* 4375 */ 'L', 'D', 'S', 'B', 'A', 'r', 'r', 0,
    2056             :   /* 4383 */ 'S', 'T', 'B', 'A', 'r', 'r', 0,
    2057             :   /* 4390 */ 'L', 'D', 'U', 'B', 'A', 'r', 'r', 0,
    2058             :   /* 4398 */ 'L', 'D', 'S', 'T', 'U', 'B', 'A', 'r', 'r', 0,
    2059             :   /* 4408 */ 'L', 'D', 'D', 'A', 'r', 'r', 0,
    2060             :   /* 4415 */ 'L', 'D', 'A', 'r', 'r', 0,
    2061             :   /* 4421 */ 'S', 'T', 'D', 'A', 'r', 'r', 0,
    2062             :   /* 4428 */ 'L', 'D', 'D', 'F', 'A', 'r', 'r', 0,
    2063             :   /* 4436 */ 'L', 'D', 'F', 'A', 'r', 'r', 0,
    2064             :   /* 4443 */ 'S', 'T', 'D', 'F', 'A', 'r', 'r', 0,
    2065             :   /* 4451 */ 'L', 'D', 'Q', 'F', 'A', 'r', 'r', 0,
    2066             :   /* 4459 */ 'S', 'T', 'Q', 'F', 'A', 'r', 'r', 0,
    2067             :   /* 4467 */ 'S', 'T', 'F', 'A', 'r', 'r', 0,
    2068             :   /* 4474 */ 'L', 'D', 'S', 'H', 'A', 'r', 'r', 0,
    2069             :   /* 4482 */ 'S', 'T', 'H', 'A', 'r', 'r', 0,
    2070             :   /* 4489 */ 'L', 'D', 'U', 'H', 'A', 'r', 'r', 0,
    2071             :   /* 4497 */ 'S', 'W', 'A', 'P', 'A', 'r', 'r', 0,
    2072             :   /* 4505 */ 'S', 'R', 'A', 'r', 'r', 0,
    2073             :   /* 4511 */ 'C', 'A', 'S', 'A', 'r', 'r', 0,
    2074             :   /* 4518 */ 'S', 'T', 'A', 'r', 'r', 0,
    2075             :   /* 4524 */ 'L', 'D', 'S', 'B', 'r', 'r', 0,
    2076             :   /* 4531 */ 'S', 'T', 'B', 'r', 'r', 0,
    2077             :   /* 4537 */ 'L', 'D', 'U', 'B', 'r', 'r', 0,
    2078             :   /* 4544 */ 'S', 'U', 'B', 'r', 'r', 0,
    2079             :   /* 4550 */ 'L', 'D', 'S', 'T', 'U', 'B', 'r', 'r', 0,
    2080             :   /* 4559 */ 'S', 'M', 'A', 'C', 'r', 'r', 0,
    2081             :   /* 4566 */ 'U', 'M', 'A', 'C', 'r', 'r', 0,
    2082             :   /* 4573 */ 'S', 'U', 'B', 'C', 'r', 'r', 0,
    2083             :   /* 4580 */ 'T', 'S', 'U', 'B', 'C', 'C', 'r', 'r', 0,
    2084             :   /* 4589 */ 'T', 'A', 'D', 'D', 'C', 'C', 'r', 'r', 0,
    2085             :   /* 4598 */ 'A', 'N', 'D', 'C', 'C', 'r', 'r', 0,
    2086             :   /* 4606 */ 'V', '9', 'M', 'O', 'V', 'F', 'C', 'C', 'r', 'r', 0,
    2087             :   /* 4617 */ 'T', 'I', 'C', 'C', 'r', 'r', 0,
    2088             :   /* 4624 */ 'M', 'O', 'V', 'I', 'C', 'C', 'r', 'r', 0,
    2089             :   /* 4633 */ 'S', 'M', 'U', 'L', 'C', 'C', 'r', 'r', 0,
    2090             :   /* 4642 */ 'U', 'M', 'U', 'L', 'C', 'C', 'r', 'r', 0,
    2091             :   /* 4651 */ 'A', 'N', 'D', 'N', 'C', 'C', 'r', 'r', 0,
    2092             :   /* 4660 */ 'O', 'R', 'N', 'C', 'C', 'r', 'r', 0,
    2093             :   /* 4668 */ 'X', 'N', 'O', 'R', 'C', 'C', 'r', 'r', 0,
    2094             :   /* 4677 */ 'X', 'O', 'R', 'C', 'C', 'r', 'r', 0,
    2095             :   /* 4685 */ 'M', 'U', 'L', 'S', 'C', 'C', 'r', 'r', 0,
    2096             :   /* 4694 */ 'S', 'D', 'I', 'V', 'C', 'C', 'r', 'r', 0,
    2097             :   /* 4703 */ 'U', 'D', 'I', 'V', 'C', 'C', 'r', 'r', 0,
    2098             :   /* 4712 */ 'T', 'X', 'C', 'C', 'r', 'r', 0,
    2099             :   /* 4719 */ 'M', 'O', 'V', 'X', 'C', 'C', 'r', 'r', 0,
    2100             :   /* 4728 */ 'A', 'D', 'D', 'C', 'r', 'r', 0,
    2101             :   /* 4735 */ 'L', 'D', 'D', 'C', 'r', 'r', 0,
    2102             :   /* 4742 */ 'L', 'D', 'C', 'r', 'r', 0,
    2103             :   /* 4748 */ 'S', 'T', 'D', 'C', 'r', 'r', 0,
    2104             :   /* 4755 */ 'P', 'O', 'P', 'C', 'r', 'r', 0,
    2105             :   /* 4762 */ 'S', 'T', 'C', 'r', 'r', 0,
    2106             :   /* 4768 */ 'T', 'L', 'S', '_', 'A', 'D', 'D', 'r', 'r', 0,
    2107             :   /* 4778 */ 'L', 'D', 'D', 'r', 'r', 0,
    2108             :   /* 4784 */ 'T', 'L', 'S', '_', 'L', 'D', 'r', 'r', 0,
    2109             :   /* 4793 */ 'A', 'N', 'D', 'r', 'r', 0,
    2110             :   /* 4799 */ 'B', 'I', 'N', 'D', 'r', 'r', 0,
    2111             :   /* 4806 */ 'S', 'T', 'D', 'r', 'r', 0,
    2112             :   /* 4812 */ 'S', 'U', 'B', 'E', 'r', 'r', 0,
    2113             :   /* 4819 */ 'A', 'D', 'D', 'E', 'r', 'r', 0,
    2114             :   /* 4826 */ 'R', 'E', 'S', 'T', 'O', 'R', 'E', 'r', 'r', 0,
    2115             :   /* 4836 */ 'S', 'A', 'V', 'E', 'r', 'r', 0,
    2116             :   /* 4843 */ 'L', 'D', 'D', 'F', 'r', 'r', 0,
    2117             :   /* 4850 */ 'L', 'D', 'F', 'r', 'r', 0,
    2118             :   /* 4856 */ 'S', 'T', 'D', 'F', 'r', 'r', 0,
    2119             :   /* 4863 */ 'L', 'D', 'Q', 'F', 'r', 'r', 0,
    2120             :   /* 4870 */ 'S', 'T', 'Q', 'F', 'r', 'r', 0,
    2121             :   /* 4877 */ 'S', 'T', 'F', 'r', 'r', 0,
    2122             :   /* 4883 */ 'L', 'D', 'S', 'H', 'r', 'r', 0,
    2123             :   /* 4890 */ 'F', 'L', 'U', 'S', 'H', 'r', 'r', 0,
    2124             :   /* 4898 */ 'S', 'T', 'H', 'r', 'r', 0,
    2125             :   /* 4904 */ 'L', 'D', 'U', 'H', 'r', 'r', 0,
    2126             :   /* 4911 */ 'C', 'A', 'L', 'L', 'r', 'r', 0,
    2127             :   /* 4918 */ 'S', 'L', 'L', 'r', 'r', 0,
    2128             :   /* 4924 */ 'J', 'M', 'P', 'L', 'r', 'r', 0,
    2129             :   /* 4931 */ 'S', 'R', 'L', 'r', 'r', 0,
    2130             :   /* 4937 */ 'S', 'M', 'U', 'L', 'r', 'r', 0,
    2131             :   /* 4944 */ 'U', 'M', 'U', 'L', 'r', 'r', 0,
    2132             :   /* 4951 */ 'W', 'R', 'W', 'I', 'M', 'r', 'r', 0,
    2133             :   /* 4959 */ 'A', 'N', 'D', 'N', 'r', 'r', 0,
    2134             :   /* 4966 */ 'O', 'R', 'N', 'r', 'r', 0,
    2135             :   /* 4972 */ 'A', 'N', 'D', 'X', 'N', 'r', 'r', 0,
    2136             :   /* 4980 */ 'O', 'R', 'X', 'N', 'r', 'r', 0,
    2137             :   /* 4987 */ 'T', 'R', 'A', 'P', 'r', 'r', 0,
    2138             :   /* 4994 */ 'S', 'W', 'A', 'P', 'r', 'r', 0,
    2139             :   /* 5001 */ 'C', 'M', 'P', 'r', 'r', 0,
    2140             :   /* 5007 */ 'S', 'T', 'D', 'C', 'Q', 'r', 'r', 0,
    2141             :   /* 5015 */ 'S', 'T', 'D', 'F', 'Q', 'r', 'r', 0,
    2142             :   /* 5023 */ 'W', 'R', 'T', 'B', 'R', 'r', 'r', 0,
    2143             :   /* 5031 */ 'X', 'N', 'O', 'R', 'r', 'r', 0,
    2144             :   /* 5038 */ 'X', 'O', 'R', 'r', 'r', 0,
    2145             :   /* 5044 */ 'W', 'R', 'P', 'R', 'r', 'r', 0,
    2146             :   /* 5051 */ 'W', 'R', 'A', 'S', 'R', 'r', 'r', 0,
    2147             :   /* 5059 */ 'L', 'D', 'C', 'S', 'R', 'r', 'r', 0,
    2148             :   /* 5067 */ 'S', 'T', 'C', 'S', 'R', 'r', 'r', 0,
    2149             :   /* 5075 */ 'L', 'D', 'F', 'S', 'R', 'r', 'r', 0,
    2150             :   /* 5083 */ 'S', 'T', 'F', 'S', 'R', 'r', 'r', 0,
    2151             :   /* 5091 */ 'L', 'D', 'X', 'F', 'S', 'R', 'r', 'r', 0,
    2152             :   /* 5100 */ 'S', 'T', 'X', 'F', 'S', 'R', 'r', 'r', 0,
    2153             :   /* 5109 */ 'P', 'W', 'R', 'P', 'S', 'R', 'r', 'r', 0,
    2154             :   /* 5118 */ 'C', 'A', 'S', 'r', 'r', 0,
    2155             :   /* 5124 */ 'S', 'T', 'r', 'r', 0,
    2156             :   /* 5129 */ 'R', 'E', 'T', 'T', 'r', 'r', 0,
    2157             :   /* 5136 */ 'S', 'D', 'I', 'V', 'r', 'r', 0,
    2158             :   /* 5143 */ 'U', 'D', 'I', 'V', 'r', 'r', 0,
    2159             :   /* 5150 */ 'T', 'S', 'U', 'B', 'C', 'C', 'T', 'V', 'r', 'r', 0,
    2160             :   /* 5161 */ 'T', 'A', 'D', 'D', 'C', 'C', 'T', 'V', 'r', 'r', 0,
    2161             :   /* 5172 */ 'L', 'D', 'S', 'W', 'r', 'r', 0,
    2162             :   /* 5179 */ 'S', 'R', 'A', 'X', 'r', 'r', 0,
    2163             :   /* 5186 */ 'S', 'U', 'B', 'X', 'r', 'r', 0,
    2164             :   /* 5193 */ 'T', 'L', 'S', '_', 'A', 'D', 'D', 'X', 'r', 'r', 0,
    2165             :   /* 5204 */ 'T', 'L', 'S', '_', 'L', 'D', 'X', 'r', 'r', 0,
    2166             :   /* 5214 */ 'A', 'N', 'D', 'X', 'r', 'r', 0,
    2167             :   /* 5221 */ 'S', 'L', 'L', 'X', 'r', 'r', 0,
    2168             :   /* 5228 */ 'S', 'R', 'L', 'X', 'r', 'r', 0,
    2169             :   /* 5235 */ 'M', 'U', 'L', 'X', 'r', 'r', 0,
    2170             :   /* 5242 */ 'X', 'N', 'O', 'R', 'X', 'r', 'r', 0,
    2171             :   /* 5250 */ 'X', 'O', 'R', 'X', 'r', 'r', 0,
    2172             :   /* 5257 */ 'C', 'A', 'S', 'X', 'r', 'r', 0,
    2173             :   /* 5264 */ 'S', 'T', 'X', 'r', 'r', 0,
    2174             :   /* 5270 */ 'S', 'D', 'I', 'V', 'X', 'r', 'r', 0,
    2175             :   /* 5278 */ 'U', 'D', 'I', 'V', 'X', 'r', 'r', 0,
    2176             :   /* 5286 */ 'M', 'O', 'V', 'R', 'G', 'E', 'Z', 'r', 'r', 0,
    2177             :   /* 5296 */ 'M', 'O', 'V', 'R', 'L', 'E', 'Z', 'r', 'r', 0,
    2178             :   /* 5306 */ 'M', 'O', 'V', 'R', 'G', 'Z', 'r', 'r', 0,
    2179             :   /* 5315 */ 'M', 'O', 'V', 'R', 'L', 'Z', 'r', 'r', 0,
    2180             :   /* 5324 */ 'M', 'O', 'V', 'R', 'N', 'Z', 'r', 'r', 0,
    2181             :   /* 5333 */ 'M', 'O', 'V', 'R', 'R', 'Z', 'r', 'r', 0,
    2182             :   /* 5342 */ 'B', 'P', 'G', 'E', 'Z', 'a', 'p', 't', 0,
    2183             :   /* 5351 */ 'B', 'P', 'L', 'E', 'Z', 'a', 'p', 't', 0,
    2184             :   /* 5360 */ 'B', 'P', 'G', 'Z', 'a', 'p', 't', 0,
    2185             :   /* 5368 */ 'B', 'P', 'L', 'Z', 'a', 'p', 't', 0,
    2186             :   /* 5376 */ 'B', 'P', 'N', 'Z', 'a', 'p', 't', 0,
    2187             :   /* 5384 */ 'B', 'P', 'Z', 'a', 'p', 't', 0,
    2188             :   /* 5391 */ 'B', 'P', 'G', 'E', 'Z', 'n', 'a', 'p', 't', 0,
    2189             :   /* 5401 */ 'B', 'P', 'L', 'E', 'Z', 'n', 'a', 'p', 't', 0,
    2190             :   /* 5411 */ 'B', 'P', 'G', 'Z', 'n', 'a', 'p', 't', 0,
    2191             :   /* 5420 */ 'B', 'P', 'L', 'Z', 'n', 'a', 'p', 't', 0,
    2192             :   /* 5429 */ 'B', 'P', 'N', 'Z', 'n', 'a', 'p', 't', 0,
    2193             :   /* 5438 */ 'B', 'P', 'Z', 'n', 'a', 'p', 't', 0,
    2194             : };
    2195             : 
    2196             : extern const unsigned SparcInstrNameIndices[] = {
    2197             :     1517U, 1850U, 1942U, 1643U, 1624U, 1652U, 1784U, 1401U, 
    2198             :     1416U, 1381U, 1430U, 2810U, 1318U, 1633U, 1239U, 3449U, 
    2199             :     1276U, 3202U, 1025U, 2045U, 1772U, 3170U, 1126U, 3159U, 
    2200             :     1297U, 2131U, 2118U, 2357U, 2996U, 3014U, 1695U, 1751U, 
    2201             :     1724U, 1669U, 874U, 485U, 1812U, 3308U, 3315U, 1830U, 
    2202             :     1837U, 1003U, 2455U, 2433U, 1379U, 1515U, 3394U, 1328U, 
    2203             :     2964U, 2681U, 3217U, 2698U, 3181U, 2492U, 3226U, 793U, 
    2204             :     1061U, 847U, 825U, 836U, 1310U, 2833U, 1444U, 1461U, 
    2205             :     880U, 491U, 1009U, 978U, 2460U, 2439U, 3371U, 1900U, 
    2206             :     3354U, 1883U, 1052U, 2983U, 771U, 2863U, 3274U, 811U, 
    2207             :     3118U, 3106U, 3192U, 1485U, 3267U, 3283U, 1689U, 2389U, 
    2208             :     2382U, 2093U, 2086U, 2974U, 2015U, 1260U, 1999U, 1231U, 
    2209             :     2007U, 1252U, 1991U, 1223U, 2031U, 2023U, 1501U, 1493U, 
    2210             :     867U, 478U, 1805U, 460U, 3301U, 1823U, 3329U, 2158U, 
    2211             :     169U, 1478U, 161U, 1394U, 3259U, 783U, 1555U, 1564U, 
    2212             :     2068U, 2077U, 2605U, 2062U, 1579U, 2329U, 3059U, 3038U, 
    2213             :     2411U, 3461U, 1361U, 3454U, 1343U, 2110U, 2054U, 3236U, 
    2214             :     2344U, 1965U, 2143U, 3387U, 533U, 644U, 569U, 680U, 
    2215             :     610U, 717U, 551U, 662U, 3010U, 3563U, 4590U, 3701U, 
    2216             :     4728U, 3792U, 4819U, 819U, 507U, 4145U, 5197U, 3738U, 
    2217             :     4772U, 2334U, 1789U, 3571U, 4598U, 3624U, 4651U, 3932U, 
    2218             :     4959U, 4972U, 4158U, 5214U, 3766U, 4793U, 392U, 147U, 
    2219             :     413U, 420U, 1039U, 445U, 3772U, 4799U, 1573U, 515U, 
    2220             :     423U, 3079U, 3129U, 4271U, 5342U, 4320U, 5391U, 4289U, 
    2221             :     5360U, 4340U, 5411U, 628U, 430U, 3088U, 3137U, 4280U, 
    2222             :     5351U, 4330U, 5401U, 4297U, 5368U, 4349U, 5420U, 4305U, 
    2223             :     5376U, 4358U, 5429U, 735U, 437U, 3097U, 3145U, 4313U, 
    2224             :     5384U, 4367U, 5438U, 1283U, 1710U, 3884U, 4911U, 0U, 
    2225             :     4511U, 5257U, 5118U, 1038U, 444U, 272U, 99U, 406U, 
    2226             :     3959U, 5001U, 239U, 1598U, 1925U, 1868U, 66U, 1590U, 
    2227             :     1916U, 1860U, 400U, 1606U, 1934U, 1876U, 1143U, 2237U, 
    2228             :     2827U, 896U, 2171U, 2625U, 466U, 967U, 20U, 2510U, 
    2229             :     177U, 2561U, 2653U, 1045U, 452U, 294U, 1113U, 311U, 
    2230             :     121U, 328U, 138U, 246U, 73U, 255U, 82U, 2231U, 
    2231             :     2773U, 1156U, 2250U, 2897U, 2192U, 1537U, 2205U, 2739U, 
    2232             :     3423U, 995U, 902U, 2631U, 860U, 2618U, 1079U, 2211U, 
    2233             :     2745U, 1119U, 2779U, 1509U, 3322U, 3863U, 4890U, 303U, 
    2234             :     1162U, 523U, 634U, 741U, 2256U, 588U, 697U, 751U, 
    2235             :     1168U, 2262U, 2909U, 1188U, 2282U, 2929U, 1178U, 2272U, 
    2236             :     2919U, 1197U, 2291U, 2938U, 1206U, 2300U, 2947U, 1215U, 
    2237             :     2309U, 2956U, 2903U, 600U, 707U, 761U, 381U, 358U, 
    2238             :     337U, 1613U, 3290U, 939U, 369U, 346U, 2199U, 2719U, 
    2239             :     917U, 2646U, 972U, 2659U, 933U, 2186U, 2713U, 909U, 
    2240             :     2638U, 945U, 2725U, 2400U, 2791U, 29U, 2520U, 186U, 
    2241             :     2571U, 959U, 1292U, 2666U, 2396U, 35U, 2527U, 192U, 
    2242             :     2578U, 2786U, 264U, 91U, 3408U, 231U, 2596U, 58U, 
    2243             :     2545U, 204U, 1268U, 223U, 2587U, 50U, 2536U, 1085U, 
    2244             :     1543U, 2751U, 3437U, 320U, 130U, 280U, 107U, 952U, 
    2245             :     1149U, 2243U, 2890U, 216U, 43U, 14U, 2503U, 155U, 
    2246             :     2554U, 287U, 114U, 1091U, 1549U, 2217U, 3443U, 854U, 
    2247             :     2165U, 2612U, 2405U, 2797U, 2428U, 2804U, 1097U, 2223U, 
    2248             :     2765U, 2039U, 2732U, 3897U, 4924U, 4415U, 4017U, 5059U, 
    2249             :     3715U, 4742U, 4408U, 3708U, 4735U, 4428U, 3816U, 4843U, 
    2250             :     3755U, 4778U, 4436U, 4033U, 5075U, 3823U, 4850U, 4451U, 
    2251             :     3836U, 4863U, 4375U, 3497U, 4524U, 4474U, 3856U, 4883U, 
    2252             :     4398U, 3523U, 4550U, 4124U, 5172U, 4390U, 3510U, 4537U, 
    2253             :     4489U, 3877U, 4904U, 4049U, 5091U, 4152U, 5208U, 3761U, 
    2254             :     4788U, 3744U, 3734U, 3153U, 3475U, 3429U, 3581U, 4608U, 
    2255             :     3597U, 4624U, 4215U, 5286U, 4235U, 5306U, 4225U, 5296U, 
    2256             :     4244U, 5315U, 4253U, 5324U, 4262U, 5333U, 3336U, 3345U, 
    2257             :     2757U, 3692U, 4719U, 1103U, 3658U, 4685U, 4179U, 5235U, 
    2258             :     2106U, 3643U, 4670U, 3633U, 4660U, 3939U, 4966U, 4980U, 
    2259             :     4187U, 5244U, 3991U, 5033U, 3253U, 1958U, 4755U, 4067U, 
    2260             :     5109U, 2480U, 2475U, 2486U, 2323U, 1844U, 3799U, 4826U, 
    2261             :     3006U, 1800U, 4081U, 5129U, 3809U, 4836U, 3667U, 4694U, 
    2262             :     4199U, 5270U, 4088U, 5136U, 3483U, 3468U, 1982U, 1818U, 
    2263             :     4165U, 5221U, 3891U, 4918U, 3532U, 4559U, 3606U, 4633U, 
    2264             :     3910U, 4937U, 4131U, 5179U, 3491U, 4505U, 4172U, 5228U, 
    2265             :     3904U, 4931U, 4518U, 2317U, 4383U, 3504U, 4531U, 4025U, 
    2266             :     5067U, 3728U, 4762U, 4421U, 3965U, 5007U, 3721U, 4748U, 
    2267             :     4443U, 3973U, 5015U, 3829U, 4856U, 3779U, 4806U, 4467U, 
    2268             :     4041U, 5083U, 3850U, 4877U, 4482U, 3871U, 4898U, 4459U, 
    2269             :     3843U, 4870U, 4058U, 5100U, 4193U, 5264U, 4076U, 5124U, 
    2270             :     3554U, 4581U, 3546U, 4573U, 3785U, 4812U, 4138U, 5186U, 
    2271             :     3517U, 4544U, 4497U, 3952U, 4994U, 10U, 200U, 212U, 
    2272             :     4113U, 5161U, 3562U, 4589U, 3590U, 4617U, 5193U, 4768U, 
    2273             :     1715U, 5204U, 4784U, 3945U, 4987U, 4102U, 5150U, 3553U, 
    2274             :     4580U, 3685U, 4712U, 3676U, 4703U, 4207U, 5278U, 4095U, 
    2275             :     5143U, 3539U, 4566U, 3615U, 4642U, 1521U, 3917U, 4944U, 
    2276             :     2100U, 1111U, 924U, 2177U, 2672U, 2229U, 2771U, 521U, 
    2277             :     586U, 598U, 3579U, 4606U, 4009U, 5051U, 4002U, 5044U, 
    2278             :     4068U, 5110U, 3981U, 5023U, 3924U, 4951U, 3417U, 1529U, 
    2279             :     3641U, 4668U, 5242U, 3989U, 5031U, 3650U, 4677U, 4186U, 
    2280             :     5250U, 3996U, 5038U, 
    2281             : };
    2282             : 
    2283             : static inline void InitSparcMCInstrInfo(MCInstrInfo *II) {
    2284             :   II->InitMCInstrInfo(SparcInsts, SparcInstrNameIndices, SparcInstrNameData, 667);
    2285             : }
    2286             : 
    2287             : } // end llvm namespace
    2288             : #endif // GET_INSTRINFO_MC_DESC
    2289             : 
    2290             : #ifdef GET_INSTRINFO_HEADER
    2291             : #undef GET_INSTRINFO_HEADER
    2292             : namespace llvm {
    2293             : struct SparcGenInstrInfo : public TargetInstrInfo {
    2294             :   explicit SparcGenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1, int ReturnOpcode = -1);
    2295           0 :   ~SparcGenInstrInfo() override = default;
    2296             : 
    2297             : };
    2298             : } // end llvm namespace
    2299             : #endif // GET_INSTRINFO_HEADER
    2300             : 
    2301             : #ifdef GET_INSTRINFO_CTOR_DTOR
    2302             : #undef GET_INSTRINFO_CTOR_DTOR
    2303             : namespace llvm {
    2304             : extern const MCInstrDesc SparcInsts[];
    2305             : extern const unsigned SparcInstrNameIndices[];
    2306             : extern const char SparcInstrNameData[];
    2307         419 : SparcGenInstrInfo::SparcGenInstrInfo(int CFSetupOpcode, int CFDestroyOpcode, int CatchRetOpcode, int ReturnOpcode)
    2308         838 :   : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) {
    2309             :   InitMCInstrInfo(SparcInsts, SparcInstrNameIndices, SparcInstrNameData, 667);
    2310         419 : }
    2311             : } // end llvm namespace
    2312             : #endif // GET_INSTRINFO_CTOR_DTOR
    2313             : 
    2314             : #ifdef GET_INSTRINFO_OPERAND_ENUM
    2315             : #undef GET_INSTRINFO_OPERAND_ENUM
    2316             : namespace llvm {
    2317             : namespace SP {
    2318             : namespace OpName {
    2319             : enum {
    2320             : OPERAND_LAST
    2321             : };
    2322             : } // end namespace OpName
    2323             : } // end namespace SP
    2324             : } // end namespace llvm
    2325             : #endif //GET_INSTRINFO_OPERAND_ENUM
    2326             : 
    2327             : #ifdef GET_INSTRINFO_NAMED_OPS
    2328             : #undef GET_INSTRINFO_NAMED_OPS
    2329             : namespace llvm {
    2330             : namespace SP {
    2331             : LLVM_READONLY
    2332             : int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {
    2333             :   return -1;
    2334             : }
    2335             : } // end namespace SP
    2336             : } // end namespace llvm
    2337             : #endif //GET_INSTRINFO_NAMED_OPS
    2338             : 
    2339             : #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM
    2340             : #undef GET_INSTRINFO_OPERAND_TYPES_ENUM
    2341             : namespace llvm {
    2342             : namespace SP {
    2343             : namespace OpTypes {
    2344             : enum OperandType {
    2345             :   CCOp = 0,
    2346             :   MEMri = 1,
    2347             :   MEMrr = 2,
    2348             :   TLSSym = 3,
    2349             :   bprtarget = 4,
    2350             :   bprtarget16 = 5,
    2351             :   brtarget = 6,
    2352             :   calltarget = 7,
    2353             :   f32imm = 8,
    2354             :   f64imm = 9,
    2355             :   getPCX = 10,
    2356             :   i16imm = 11,
    2357             :   i1imm = 12,
    2358             :   i32imm = 13,
    2359             :   i64imm = 14,
    2360             :   i8imm = 15,
    2361             :   ptype0 = 16,
    2362             :   ptype1 = 17,
    2363             :   ptype2 = 18,
    2364             :   ptype3 = 19,
    2365             :   ptype4 = 20,
    2366             :   ptype5 = 21,
    2367             :   simm13Op = 22,
    2368             :   type0 = 23,
    2369             :   type1 = 24,
    2370             :   type2 = 25,
    2371             :   type3 = 26,
    2372             :   type4 = 27,
    2373             :   type5 = 28,
    2374             :   OPERAND_TYPE_LIST_END
    2375             : };
    2376             : } // end namespace OpTypes
    2377             : } // end namespace SP
    2378             : } // end namespace llvm
    2379             : #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM
    2380             : 

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